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@SEZJV

SEZJV

Secure-Enhanced ZJV

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  1. ZJV2-difftest ZJV2-difftest Public

    ZJV2's difftest framework based on Verilator, QEMU and GDB.

    C 8 1

  2. riscv-tests riscv-tests Public

    Forked from riscv-software-src/riscv-tests

    C 3

  3. zjv2-env zjv2-env Public

    Dockerized environment for developing Chisel based CPU core.

    Dockerfile 3

  4. zjv-core zjv-core Public

    10 stage RISC-V (riscv) core capable of booting RV64 Linux and Debian on FPGA

    Scala 2

  5. riscv-isa-sim riscv-isa-sim Public

    Forked from riscv-software-src/riscv-isa-sim

    Device extention for Spike(a RISC-V ISA Simulator)

    C

  6. rt-thread rt-thread Public

    Forked from RT-Thread/rt-thread

    RT-Thread is an open source IoT operating system.

    C

Repositories

Showing 9 of 9 repositories
  • ZJV2-difftest Public

    ZJV2's difftest framework based on Verilator, QEMU and GDB.

    SEZJV/ZJV2-difftest’s past year of commit activity
    C 8 1 0 0 Updated Jul 11, 2022
  • zjv2-env Public

    Dockerized environment for developing Chisel based CPU core.

    SEZJV/zjv2-env’s past year of commit activity
    Dockerfile 3 MIT 0 0 0 Updated Dec 22, 2021
  • riscv-tests Public Forked from riscv-software-src/riscv-tests
    SEZJV/riscv-tests’s past year of commit activity
    C 3 477 0 0 Updated Dec 9, 2021
  • zjv-core Public

    10 stage RISC-V (riscv) core capable of booting RV64 Linux and Debian on FPGA

    SEZJV/zjv-core’s past year of commit activity
    Scala 2 0 0 0 Updated Jun 21, 2021
  • riscv-isa-sim Public Forked from riscv-software-src/riscv-isa-sim

    Device extention for Spike(a RISC-V ISA Simulator)

    SEZJV/riscv-isa-sim’s past year of commit activity
    C 0 888 0 0 Updated Jun 15, 2021
  • zjv-soc-test Public
    SEZJV/zjv-soc-test’s past year of commit activity
    Assembly 0 0 0 0 Updated Feb 26, 2021
  • rt-thread Public Forked from RT-Thread/rt-thread

    RT-Thread is an open source IoT operating system.

    SEZJV/rt-thread’s past year of commit activity
    C 0 Apache-2.0 5,101 0 0 Updated Nov 27, 2020
  • xv6-riscv Public Forked from mit-pdos/xv6-riscv

    Xv6 for RISC-V

    SEZJV/xv6-riscv’s past year of commit activity
    C 0 2,743 0 0 Updated Nov 23, 2020
  • coremark Public Forked from eembc/coremark

    CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).

    SEZJV/coremark’s past year of commit activity
    C 0 331 0 0 Updated Nov 12, 2020

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