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rsx: Discard color mask writes with reserved bits #14545

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merged 1 commit into from
Aug 25, 2023
Merged

rsx: Discard color mask writes with reserved bits #14545

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6 changes: 5 additions & 1 deletion rpcs3/Emu/RSX/RSXDisAsm.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -167,7 +167,11 @@ void RSXDisAsm::Write(std::string_view str, s32 count, bool is_non_inc, u32 id)
{
last_opcode.clear();

if (count >= 0)
if (count == 1 && !is_non_inc)
{
fmt::append(last_opcode, "[%08x] ( )", dump_pc);
}
else if (count >= 0)
{
fmt::append(last_opcode, "[%08x] (%s%u)", dump_pc, is_non_inc ? "+" : "", count);
}
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13 changes: 12 additions & 1 deletion rpcs3/Emu/RSX/rsx_decode.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1592,7 +1592,7 @@ struct registers_decoder<NV4097_SET_SURFACE_ZETA_OFFSET>

static void dump(std::string& out, const decoded_type& decoded)
{
fmt::append(out, "Surface: Z offset: %u", decoded.surface_z_offset());
fmt::append(out, "Surface: Z offset: 0x%x", decoded.surface_z_offset());
}
};

Expand Down Expand Up @@ -3040,10 +3040,21 @@ struct registers_decoder<NV4097_SET_COLOR_MASK>
{
return value != 0;
}

u32 is_invalid() const
{
return (value & 0xfefefefe) ? value : 0;
}
};

static void dump(std::string& out, const decoded_type& decoded)
{
if (u32 invalid_value = decoded.is_invalid())
{
fmt::append(out, "Surface: color mask: invalid = 0x%08x", invalid_value);
return;
}

fmt::append(out, "Surface: color mask A = %s R = %s G = %s B = %s"
, print_boolean(decoded.color_a()), print_boolean(decoded.color_r()), print_boolean(decoded.color_g()), print_boolean(decoded.color_b()));
}
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19 changes: 18 additions & 1 deletion rpcs3/Emu/RSX/rsx_methods.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -849,6 +849,23 @@ namespace rsx
}
}

void set_color_mask(thread* rsx, u32 reg, u32 arg)
{
if (arg == method_registers.register_previous_value)
{
return;
}

if (method_registers.decode<NV4097_SET_COLOR_MASK>(arg).is_invalid()) [[ unlikely ]]
{
method_registers.decode(reg, method_registers.register_previous_value);
}
else
{
set_surface_options_dirty_bit(rsx, reg, arg);
}
}

void set_stencil_op(thread* rsx, u32 reg, u32 arg)
{
if (arg == method_registers.register_previous_value)
Expand Down Expand Up @@ -3550,7 +3567,7 @@ namespace rsx
bind(NV4097_SET_DEPTH_TEST_ENABLE, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_DEPTH_FUNC, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_DEPTH_MASK, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_COLOR_MASK, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_COLOR_MASK, nv4097::set_color_mask);
bind(NV4097_SET_COLOR_MASK_MRT, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_TWO_SIDED_STENCIL_TEST_ENABLE, nv4097::set_surface_options_dirty_bit);
bind(NV4097_SET_STENCIL_TEST_ENABLE, nv4097::set_surface_options_dirty_bit);
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2 changes: 1 addition & 1 deletion rpcs3/rpcs3qt/syntax_highlighter.cpp
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Expand Up @@ -67,7 +67,7 @@ LogHighlighter::LogHighlighter(QTextDocument* parent) : Highlighter(parent)

AsmHighlighter::AsmHighlighter(QTextDocument *parent) : Highlighter(parent)
{
addRule("^\b[A-Z0-9]+\b", Qt::darkBlue); // Instructions
addRule("^\\b[A-Z0-9]+\\b", Qt::darkBlue); // Instructions
addRule("-?R\\d[^,;\\s]*", Qt::darkRed); // -R0.*
addRule("-?H\\d[^,;\\s]*", Qt::red); // -H1.*
addRule("-?v\\[\\d\\]*[^,;\\s]*", Qt::darkCyan); // -v[xyz].*
Expand Down