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periph_i2c: Adapt i2c test to support read register #55
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As mentioned in RIOT-OS#53 the logic should reset when a start bit is sent. This means that proper repeated read registers should be supported. This changes the test to expect the repeated read success instead of say not supported.
The test seems to be correct now 😄 However, the other test case where the master must not lock if a slave does not react correctly on a repeated start and clocks out a 0x00 byte that overwrites the address field might be still interesting. Would it be possible to realize such a behavior with PHiLIP? If I understand it right, PHiLIP realizes the I2C slave using the hardware implementation. Theoretically, it should be possible to use a combination of I2C slave implementation and GPIO settings. This is, the first read operation without the STOP condition would be realized with I2C hardware implementation and after that a bit-banging implementation would be used with same GPIOs which waits for the repeated START and then pulls the SDA line to LOW during the address field 🤔 |
I do want to try to reproduce this on a sensor. I remember seeing this I just need to verify what was going on. Yes it could be possible. One limitation that I have is the speed of reaction, the more that I try to do in the i2c interrupt the longer it takes until the point where I cannot respond to the register in time (this may already occur if the clock is very high). Soon I will work on prepping a new release of PHiLIP and this will be at the top of the list. |
The For the
Having a look into the history, this check was introduced by you with RIOT-OS/RIOT#10610 and RIOT-OS/RIOT#12007, respectively. Since this behavior is not documented in the API, it is not implemented in that way on other platforms. We have to decide what the behavior should be:
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I took a closer look at the i2c while trying to lockup PHiLIP and I noticed that a read_bytes with Is there an easy way (or patch) to test what happens if it is ACKed? I tried in |
I agree, there needs to be some clarification and improvements. I will be investigating over the next little while to make sure the API and functionality match. |
As mentioned in #53 the logic should reset when a start bit is sent.
This means that proper repeated read registers should be supported.
This changes the test to expect the repeated read success instead of saying not supported.
Testing Procedure
Check the CI, investigate if any lockup occurs and if it does occur what is causing it.