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RIOT port for the KW01Z128 SiP and Phytec PhyWave-KW01 Evaluations-Board #2328
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# tell the Makefile.base which module to build | ||
MODULE = $(BOARD)_base | ||
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include $(RIOTBASE)/Makefile.base |
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FEATURES_PROVIDED += periph_uart | ||
FEATURES_PROVIDED += periph_gpio | ||
FEATURES_PROVIDED += periph_i2c | ||
FEATURES_PROVIDED += periph_rtt | ||
FEATURES_PROVIDED += periph_rtc | ||
FEATURES_PROVIDED += periph_cpuid | ||
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# define the cpu used by the phyWAVE-KW01 Board | ||
export CPU = kw0x | ||
export CPU_MODEL = kw01z128 | ||
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#define the default port depending on the host OS | ||
OS := $(shell uname) | ||
ifeq ($(OS),Linux) | ||
PORT ?= /dev/ttyACM0 | ||
else ifeq ($(OS),Darwin) | ||
PORT ?= $(shell ls -1 /dev/tty.SLAB_USBtoUART* | head -n 1) | ||
else | ||
$(info CAUTION: No flash tool for your host system found!) | ||
endif | ||
export PORT | ||
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# define tools used for building the project | ||
export PREFIX = arm-none-eabi- | ||
export CC = $(PREFIX)gcc | ||
export AR = $(PREFIX)ar | ||
export AS = $(PREFIX)as | ||
export LINK = $(PREFIX)gcc | ||
export SIZE = $(PREFIX)size | ||
export OBJCOPY = $(PREFIX)objcopy | ||
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm | ||
export FLASHER = $(RIOTBOARD)/$(BOARD)/dist/flash.sh | ||
export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh | ||
export RESET = $(RIOTBOARD)/$(BOARD)/dist/reset.sh | ||
export DEBUGSERVER = openocd | ||
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# define build specific options | ||
CPU_USAGE = -mcpu=cortex-m0 -mabi=aapcs | ||
FPU_USAGE = -msoft-float | ||
export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mno-thumb-interwork -nostartfiles | ||
export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin | ||
export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian | ||
export LINKFLAGS += -g3 -ggdb -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles | ||
export LINKFLAGS += -T$(LINKERSCRIPT) | ||
export OFLAGS = -O binary | ||
export FFLAGS = $(HEXFILE) | ||
export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(ELFFILE) | ||
export TERMFLAGS = -p $(PORT) | ||
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# use newLib nano-specs if available | ||
ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null </dev/null ; echo $$?),0) | ||
export LINKFLAGS += -specs=nano.specs -lc -lnosys | ||
endif | ||
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# export board specific includes to the global includes-listing | ||
export INCLUDES += -I$(RIOTBOARD)/$(BOARD)/include/ |
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/* | ||
* Copyright (C) 2014 Freie Universität Berlin | ||
* Copyright (C) 2015 PHYTEC Messtechnik GmbH | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser General | ||
* Public License v2.1. See the file LICENSE in the top level directory for more | ||
* details. | ||
*/ | ||
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/** | ||
* @ingroup board_pba-d-01-kw01 | ||
* @{ | ||
* | ||
* @file | ||
* @brief Board specific implementations for the Phytec | ||
* phyWAVE-KW01 evaluation board (KW01Z128 Module). | ||
* | ||
* @author Johann Fischer <[email protected]> | ||
* | ||
* @} | ||
*/ | ||
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#include "board.h" | ||
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static void leds_init(void); | ||
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void board_init(void) | ||
{ | ||
leds_init(); | ||
cpu_init(); | ||
} | ||
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/** | ||
* @brief Initialize the boards on-board RGB-LED | ||
* | ||
*/ | ||
static void leds_init(void) | ||
{ | ||
/* enable clock */ | ||
LED_B_PORT_CLKEN(); | ||
LED_G_PORT_CLKEN(); | ||
LED_R_PORT_CLKEN(); | ||
/* configure pins as gpio */ | ||
LED_B_PORT->PCR[LED_B_PIN] = PORT_PCR_MUX(1); | ||
LED_G_PORT->PCR[LED_G_PIN] = PORT_PCR_MUX(1); | ||
LED_R_PORT->PCR[LED_R_PIN] = PORT_PCR_MUX(1); | ||
LED_B_GPIO->PDDR |= (1 << LED_B_PIN); | ||
LED_G_GPIO->PDDR |= (1 << LED_G_PIN); | ||
LED_R_GPIO->PDDR |= (1 << LED_R_PIN); | ||
/* turn all LEDs off */ | ||
LED_B_GPIO->PSOR |= (1 << LED_B_PIN); | ||
LED_G_GPIO->PSOR |= (1 << LED_G_PIN); | ||
LED_R_GPIO->PSOR |= (1 << LED_R_PIN); | ||
} |
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#!/bin/bash | ||
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# Based on iot-lab_M3 debug.sh script. | ||
# Author: Jonas Remmert [email protected] | ||
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red='\033[0;31m' | ||
green='\033[0;32m' | ||
NC='\033[0m' | ||
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openocd -f "$RIOTBASE/boards/pba-d-01-kw01/dist/mkw01z128.cfg" \ | ||
-c "tcl_port 6333" \ | ||
-c "telnet_port 4444" \ | ||
-c "init" \ | ||
-c "targets" \ | ||
-c "reset halt" \ | ||
-l /dev/null & | ||
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# save pid to terminate afterwards | ||
OCD_PID=$? | ||
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# needed for openocd to set up | ||
sleep 1 | ||
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retval=$(arm-none-eabi-readelf -x .fcfield $2 | awk '/0x00000400/ {print $2 $3 $4 $5}') | ||
unlocked_fcfield="fffffffffffffffffffffffffeffffff" | ||
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if [ "$retval" == "$unlocked_fcfield" ]; then | ||
echo -e "Flash configuration tested...${green} [OK]${NC}" | ||
arm-none-eabi-gdb -tui --command=${1} ${2} | ||
#cgdb -d arm-none-eabi-gdb --command=${1} ${2} | ||
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else | ||
echo "Hexdump, .fcfield of $2" | ||
retval=$(arm-none-eabi-readelf -x .fcfield $2) | ||
echo $retval | ||
echo -e "Fcfield not fitting to MKW01Z128, danger of bricking the device during flash...${red} [ABORT]${NC}" | ||
fi | ||
kill ${OCD_PID} |
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#!/bin/bash | ||
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# Based on iot-lab_M3 debug.sh script. | ||
# Author: Jonas Remmert [email protected] | ||
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elffile=`echo $1 | sed 's/.hex/.elf/'` | ||
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red='\033[0;31m' | ||
green='\033[0;32m' | ||
NC='\033[0m' | ||
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echo The file: $elffile will be flashed to the board: $BOARD . | ||
echo Press y to proceed, v to proceed with verify or any other key to abort. | ||
read x | ||
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retval=$(arm-none-eabi-readelf -x .fcfield $elffile | awk '/0x00000400/ {print $2 $3 $4 $5}') | ||
unlocked_fcfield="fffffffffffffffffffffffffeffffff" | ||
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if [ "$retval" != "$unlocked_fcfield" ]; then | ||
echo "Hexdump, .fcfield of $elffile" | ||
retval=$(arm-none-eabi-readelf -x .fcfield $elffile) | ||
echo $retval | ||
echo -e "Fcfield not fitting to MKW01Z128, danger of bricking the device during flash...${red} [ABORT]${NC}" | ||
exit 0 | ||
fi | ||
echo -e "Flash configuration tested...${green} [OK]${NC}" | ||
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# flash without verify | ||
#if [ $x = "y" ] || [ $x = "v" ];# -o $x -eq v ]; | ||
#then | ||
echo -e "${red}Flashing device, do not disconnect or reset the target until this script exits!!!${NC}" | ||
openocd -f "$RIOTBASE/boards/pba-d-01-kw01/dist/mkw01z128.cfg" \ | ||
-c "init" \ | ||
-c "reset halt" \ | ||
-c "flash write_image erase $elffile" \ | ||
-c "reset run" \ | ||
-c "exit" | ||
#fi | ||
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# verify | ||
#if [ "$x" = "v" ]; | ||
#then | ||
#echo -e "${red}Flashing device, do not disconnect or reset the target until this script exits!!!${NC}" | ||
#openocd -f "$RIOTBASE/boards/pba-d-01-kw01/dist/mkw01z128.cfg" \ | ||
# -c "init" \ | ||
# -c "reset halt" \ | ||
# -c "verify_image $elffile" \ | ||
# -c "reset run" \ | ||
# -c "exit" | ||
#fi | ||
echo -e "${green}done...${NC}" |
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target remote localhost:3333 | ||
monitor reset halt | ||
set print pretty | ||
set arm force-mode thumb |
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# | ||
# Freescale Kinetis MKW01Z128 devices | ||
# | ||
source [find interface/cmsis-dap.cfg] | ||
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# | ||
# K21 devices support both JTAG and SWD transports. | ||
# | ||
source [find target/swj-dp.tcl] | ||
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if { [info exists CHIPNAME] } { | ||
set _CHIPNAME $CHIPNAME | ||
} else { | ||
set _CHIPNAME kw01z128 | ||
} | ||
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# Work-area is a space in RAM used for flash programming | ||
set WORKAREASIZE 0x1000 | ||
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if { [info exists WORKAREASIZE] } { | ||
set _WORKAREASIZE $WORKAREASIZE | ||
} else { | ||
set _WORKAREASIZE 0x1000 | ||
} | ||
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if { [info exists ENDIAN] } { | ||
set _ENDIAN $ENDIAN | ||
} else { | ||
set _ENDIAN little | ||
} | ||
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if { [info exists CPUTAPID] } { | ||
set _CPUTAPID $CPUTAPID | ||
} else { | ||
set _CPUTAPID 0x0bc11477 | ||
} | ||
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set _TARGETNAME $_CHIPNAME.cpu | ||
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID | ||
#swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID | ||
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target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu | ||
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$_CHIPNAME.cpu configure -event examine-start { puts "START..." ; } | ||
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# It is important that "kinetis mdm check_security" is called for | ||
# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start' | ||
# causes "kinetis mdm check_security" to fail the first time openocd | ||
# calls it when it tries to connect after the CPU has been power-cycled. | ||
$_CHIPNAME.cpu configure -event examine-end { | ||
kinetis mdm check_security | ||
} | ||
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 | ||
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set _FLASHNAME $_CHIPNAME.flash | ||
flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME | ||
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#reset_config srst_only srst_nogate connect_assert_srst | ||
adapter_khz 10000 | ||
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if {![using_hla]} { | ||
# if srst is not fitted use SYSRESETREQ to | ||
# perform a soft reset | ||
cortex_m reset_config sysresetreq | ||
} | ||
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$_TARGETNAME configure -event reset-init { | ||
adapter_khz 24000 | ||
} |
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#!/bin/bash | ||
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openocd -f "$RIOTBASE/boards/pba-d-01-kw01/dist/mkw01z128.cfg" \ | ||
-c "init" \ | ||
-c "reset run" \ | ||
-c "shutdown" |
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/* | ||
* Copyright (C) 2014 Freie Universität Berlin | ||
* Copyright (C) 2015 PHYTEC Messtechnik GmbH | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser General | ||
* Public License v2.1. See the file LICENSE in the top level directory for more | ||
* details. | ||
*/ | ||
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/** | ||
* @defgroup board_pba-d-01-kw01 phyWAVE-KW01 Evalboard | ||
* @ingroup boards | ||
* @brief Board specific implementations for the phyWAVE-KW01 evaluation board | ||
* @{ | ||
* | ||
* @file | ||
* @brief Board specific definitions for the phyWAVE-KW01 evaluation board | ||
* | ||
* @author Johann Fischer <[email protected]> | ||
*/ | ||
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#ifndef __BOARD_H | ||
#define __BOARD_H | ||
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#include "cpu.h" | ||
#include "periph_conf.h" | ||
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#ifdef __cplusplus | ||
extern "C" | ||
{ | ||
#endif | ||
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/** | ||
* Define the nominal CPU core clock in this board | ||
*/ | ||
#define F_CPU CLOCK_CORECLOCK | ||
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/** | ||
* @name Define UART device and baudrate for stdio | ||
* @{ | ||
*/ | ||
#define STDIO UART_0 | ||
#define STDIO_RX_BUFSIZE (64U) | ||
#define STDIO_BAUDRATE (115200U) | ||
/** @} */ | ||
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/** | ||
* @name LED pin definitions | ||
* @{ | ||
*/ | ||
#define LED_R_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK)) /**< Clock Enable for PORTD*/ | ||
#define LED_G_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK)) /**< Clock Enable for PORTD*/ | ||
#define LED_B_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTC_MASK)) /**< Clock Enable for PORTA*/ | ||
#define LED_R_PORT PORTA /**< PORT for Red LED */ | ||
#define LED_R_GPIO GPIOA /**< GPIO-Device for Red LED */ | ||
#define LED_G_PORT PORTB /**< PORT for Green LED */ | ||
#define LED_G_GPIO GPIOB /**< GPIO-Device for Green LED */ | ||
#define LED_B_PORT PORTC /**< PORT for Blue LED */ | ||
#define LED_B_GPIO GPIOC /**< GPIO-Device for Blue LED */ | ||
#define LED_R_PIN 4 /**< Red LED connected to PINx */ | ||
#define LED_G_PIN 2 /**< Green LED connected to PINx */ | ||
#define LED_B_PIN 3 /**< Blue LED connected to PINx */ | ||
/** @} */ | ||
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/** | ||
* @name Macros for controlling the on-board LEDs. | ||
* @{ | ||
*/ | ||
#define LED_B_ON (LED_B_GPIO->PCOR |= (1 << LED_B_PIN)) | ||
#define LED_B_OFF (LED_B_GPIO->PSOR |= (1 << LED_B_PIN)) | ||
#define LED_B_TOGGLE (LED_B_GPIO->PTOR |= (1 << LED_B_PIN)) | ||
#define LED_G_ON (LED_G_GPIO->PCOR |= (1 << LED_G_PIN)) | ||
#define LED_G_OFF (LED_G_GPIO->PSOR |= (1 << LED_G_PIN)) | ||
#define LED_G_TOGGLE (LED_G_GPIO->PTOR |= (1 << LED_G_PIN)) | ||
#define LED_R_ON (LED_R_GPIO->PCOR |= (1 << LED_R_PIN)) | ||
#define LED_R_OFF (LED_R_GPIO->PSOR |= (1 << LED_R_PIN)) | ||
#define LED_R_TOGGLE (LED_R_GPIO->PTOR |= (1 << LED_R_PIN)) | ||
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/* for compatability to other boards */ | ||
#define LED_GREEN_ON LED_G_ON | ||
#define LED_GREEN_OFF LED_G_OFF | ||
#define LED_GREEN_TOGGLE LED_G_TOGGLE | ||
#define LED_RED_ON LED_R_ON | ||
#define LED_RED_OFF LED_R_OFF | ||
#define LED_RED_TOGGLE LED_R_TOGGLE | ||
/** @} */ | ||
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/** | ||
* Define the type for the radio packet length for the transceiver | ||
*/ | ||
typedef uint8_t radio_packet_length_t; | ||
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/** | ||
* @brief Initialize board specific hardware, including clock, LEDs and std-IO | ||
*/ | ||
void board_init(void); | ||
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#ifdef __cplusplus | ||
} | ||
#endif | ||
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#endif /** __BOARD_H */ | ||
/** @} */ |
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Please add
FEATURES_MCU_GROUP = cortex_m0