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tests/periph/uart_locate_pins: new test/utility app #20253

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merged 2 commits into from
Jan 18, 2024

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maribu
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@maribu maribu commented Jan 14, 2024

Contribution description

This application uses soft_uart to bit-bang the name of a number of configured GPIO pins via said pins at 9600 Bd. This way attaching an USB UART bridge to one pin at a time easily reveals which MCU GPIO pin a given pin on a board corresponds to. This is useful when no schematic and no silkscreen labeling is available, or when the information is misleading or outright incorrect (looking at the E180-ZG120B-TB).

Testing procedure

  1. Extend the list of pins in main.c to contain some pins to detect where they are routed to on the board.
    • beware: Some pins shouldn't be configured as output (e.g. pins connected to a crystal
  2. Flash the app on a board
  3. Connect an USB UART bridge configured at 9600 Bd to one pin at a time. Each pin should tell you its name

Issues/PRs references

None

@maribu maribu added Type: new feature The issue requests / The PR implemements a new feature for RIOT CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels Jan 14, 2024
@github-actions github-actions bot added Area: doc Area: Documentation Area: tests Area: tests and testing framework labels Jan 14, 2024
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riot-ci commented Jan 14, 2024

Murdock results

✔️ PASSED

b17b2b0 core/lib/init: skip boot message if stdio_null is used

Success Failures Total Runtime
8110 0 8110 12m:10s

Artifacts

@maribu maribu force-pushed the tests/periph/uart_locate_pins branch 2 times, most recently from ea5767c to 1e4932d Compare January 14, 2024 16:44

ifneq ($(MCU),esp32)
# We only need 1 thread (+ the Idle thread on some platforms) and we really
# want this app working on all boards.
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I guess you could even do

DISBALE_MODULE += core_thread

Mind you that esp32 is not the only platform that uses core_idle_thread

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That's why it is 2 (because of the idle thread) or 3 on ESP (because of some ESP32 specific worker thread)

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ah ok - is that also true for esp8266?

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I think not, but then again I'm not sure. But DISABLE_MODULE += core_thread works even better anyway.

static char buf[32];
size_t len = snprintf(buf, sizeof(buf), "P%u.%u / P%c%u\n",
pins[i].port_num, pins[i].pin_num,
(int)'A' + (int)pins[i].port_num, pins[i].pin_num);
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If you want to save ROM you could use fmt and set CONFIG_SKIP_BOOT_MSG=1

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I added a commit to just skip the boot message with stdio_null regardless of CONFIG_SKIP_BOOT_MSG. If the output is thrown away anyway, we can just as well safe the ROM/CPU cycles needed to prepare the output.

@github-actions github-actions bot added Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: core Area: RIOT kernel. Handle PRs marked with this with care! Area: cpu Area: CPU/MCU ports labels Jan 18, 2024
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maribu commented Jan 18, 2024

Tested with

diff --git a/tests/periph/uart_locate_pins/main.c b/tests/periph/uart_locate_pins/main.c
index eeed7b9cd2..e2eb33605c 100644
--- a/tests/periph/uart_locate_pins/main.c
+++ b/tests/periph/uart_locate_pins/main.c
@@ -38,9 +38,41 @@ static const struct {
     uint8_t port_num;
     uint8_t pin_num;
 } pins[] = {
+    {
+        .port_num = 1,
+        .pin_num = 8,
+    },
+    {
+        .port_num = 1,
+        .pin_num = 7,
+    },
+    {
+        .port_num = 1,
+        .pin_num = 6,
+    },
+    {
+        .port_num = 1,
+        .pin_num = 5,
+    },
+    {
+        .port_num = 1,
+        .pin_num = 4,
+    },
+    {
+        .port_num = 1,
+        .pin_num = 3,
+    },
+    {
+        .port_num = 0,
+        .pin_num = 27,
+    },
+    {
+        .port_num = 0,
+        .pin_num = 26,
+    },
     {
         .port_num = 0,
-        .pin_num = 0,
+        .pin_num = 2,
     },
 };
 

and got:

bt -b 9600     
No port specified, using ttyUSB0 (last registered). Use -l to list ports.
Trying port ttyUSB0... Connected to ttyUSB0 at 9600 bps.
Escape character is 'Ctrl-]'. Use escape followed by '?' for help.
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.8 / PB8
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
P1.7 / PB7
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P1.7 / PB7
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
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P1.6 / PB6
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P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
P1.6 / PB6
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P1.6 / PB6
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
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P1.5 / PB5
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P1.5 / PB5
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P1.5 / PB5
P1.5 / PB5
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P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
P1.5 / PB5
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P1.5 / PB5
P1.5 / PB5
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
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P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.4 / PB4
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P1.3 / PB3
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
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P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
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P0.27 / PA27
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P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.27 / PA27
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26
P0.26 / PA26

This application uses `soft_uart` to bit-bang the name of a number of
configured GPIO pins via said pins at 9600 Bd. This way attaching an
USB UART bridge to one pin at a time easily reveals which MCU GPIO
pin a given pin on a board corresponds to. This is useful when no
schematic and no silkscreen labeling is available, or when the
information is misleading or outright incorrect (looking at the
E180-ZG120B-TB).
With `stdio_null` no one is reading the boot message anyway, so let's
safe some ROM.
@maribu maribu force-pushed the tests/periph/uart_locate_pins branch from 35b1a6c to b17b2b0 Compare January 18, 2024 09:42
@github-actions github-actions bot removed Platform: ARM Platform: This PR/issue effects ARM-based platforms Area: cpu Area: CPU/MCU ports labels Jan 18, 2024
@maribu
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maribu commented Jan 18, 2024

Sorry, an unrelated commit sneaked in. I had to force push to get rid of it

@maribu maribu enabled auto-merge January 18, 2024 11:02
@maribu maribu added this pull request to the merge queue Jan 18, 2024
Merged via the queue into RIOT-OS:master with commit a1d2089 Jan 18, 2024
28 checks passed
@MrKevinWeiss MrKevinWeiss added this to the Release 2024.01 milestone Feb 7, 2024
@maribu maribu deleted the tests/periph/uart_locate_pins branch March 1, 2024 17:38
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4 participants