boards: add stm32l496g-disco support #19576

gschorcht · 2023-05-10T11:26:22Z

Contribution description

The PR adds the board definition for the STM2L496G-DISO board.

It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition p-l496g-cell02. However, stm32l496g-disco provides a complete configuration of the board and supports the following features in addition to p-l496g-cell02:

> FEATURES_PROVIDED += periph_adc
> FEATURES_PROVIDED += periph_dac
> FEATURES_PROVIDED += periph_dma
> FEATURES_PROVIDED += periph_pwm
> FEATURES_PROVIDED += periph_uart_hw_fc
> FEATURES_PROVIDED += arduino

In the long term, p-l496g-cell02 is to be based on the new full stm32l496g-disco board definition.

The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral.

Testing procedure

All basic tests should work with the new board definition. The following tests were executed and did succeed:

tests/periph/adc
tests/periph/dac
tests/periph/i2c for I2C_DEV(0), I2C_DEV(1) is not exposed and not tested
tests/periph/pwm
tests/periph/spi for SPI_DEV(0), `SPI_DEV(1) connection not soldered and not tested
tests/periph/timer for TIMER_DEV(0) and TIMER_DEV(1)
tests/periph/uart for UART_DEV(0), UART_DEV(1) and UART_DEV(2)
tests/usbus_cdc_ecm together with stdio_cdc_acm

Issues/PRs references

~~Depends on PR #19571~~
~~Depends on PR #19572~~
~~Depends on PR #19573~~

boards/stm32l496g-disco/include/arduino_board.h

riot-ci · 2023-05-10T13:38:34Z

Murdock results

✔️ PASSED

f7e026a boards: add stm32l496g-disco support

Success	Failures	Total	Runtime
546	0	546	02m:57s

Artifacts

Documentation preview

maribu · 2023-05-17T07:39:51Z

This still depends on #19572 according to the PR description.

aabadie · 2023-05-21T15:58:27Z

This PR also depends on #19618. I can test #19618 on nucleo-l476rg tomorrow. I don't have access to a wb.

gschorcht · 2023-05-22T14:49:49Z

This PR also depends on #19618. I can test #19618 on nucleo-l476rg tomorrow. I don't have access to a wb.

Not really, the PR includes the fix for L4.

19602: dist/tools/compile_commands: add another workaround r=chrysn a=maribu ### Contribution description Filter out GCC only `--param=min-pagesize=0` in `clangd` mode. This fixes compilation of rust applications, that now fails with: thread 'main' panicked at 'Unable to generate bindings: ClangDiagnostic("error: argument unused during compilation: '--param=min-pagesize=0' [-Wunused-command-line-argument]\n")', /home/maribu/.cargo/git/checkouts/rust-riot-sys-d12733b89271907c/b4bd4bd/build.rs:224:10 19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19643: examples/suit_update: some test fixes r=aabadie a=kaspar030 Co-authored-by: Marian Buschsieweke <[email protected]> Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Kaspar Schleiser <[email protected]>

19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19643: examples/suit_update: some test fixes r=aabadie a=kaspar030 Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Kaspar Schleiser <[email protected]>

19618: cpu/stm32: fix riotboot settings for L4 and WB r=aabadie a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19636: sys: model ecc, evtimer, pipe and shell_lock in kconfig r=aabadie a=aabadie 19639: tests/net/gnrc_mac_timeout: add automated test r=aabadie a=aabadie Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]>

19618: cpu/stm32: fix riotboot settings for L4 and WB r=benpicco a=gschorcht ### Contribution description This PR fixes the `riotboot` configuration for L4 and WB. The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4. Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576. ### Testing procedure 1. Green CI. 2. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN ``` In master these commands give ``` 0x400 ``` With this PR these commands give ``` 0x200 ``` as expected. 3. Use the following commands: ``` BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN ``` In master these commands give ``` 0x1000 ``` With this PR these commands give ``` 0x2000 ``` as expected. ### Issues/PRs references 19639: tests/net/gnrc_mac_timeout: add automated test r=aabadie a=aabadie 19644: gnrc_ipv6_nib: include RIO with all subnets in downstream RA r=benpicco a=benpicco 19649: gnrc_sixlowpan_iphc: prefix bits outside context must be zero r=benpicco a=benpicco 19656: gnrc/ipv6_auto_subnets: allow to configure minimal prefix length r=benpicco a=benpicco Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Benjamin Valentin <[email protected]>

aabadie · 2023-05-24T09:45:28Z

bors merge

18005: pkg/semtech-loramac: model in Kconfig r=aabadie a=aabadie 19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>

bors · 2023-05-24T10:00:17Z

Build failed (retrying...):

Murdock

aabadie · 2023-05-24T11:47:57Z

There are remaining problems with kconfig spotted by Murdock.

bors cancel

for now

bors · 2023-05-24T11:47:59Z

Canceled.

aabadie · 2023-05-24T12:28:28Z

Let's reschedule that as it seems #18005 was in cause with the Murdock failure.

bors merge

19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ 19650: drivers/nrf24l01p: model in kconfig r=aabadie a=aabadie 19660: cpu/rpx0xx: Fix kconfig model r=aabadie a=MrKevinWeiss ### Contribution description Broken master due to incorrect model of the periph_pio in kconfig. ### Testing procedure Green murdock (now that the board is added to the list) ### Issues/PRs references Look at the master CI... Co-authored-by: Gunar Schorcht <[email protected]> Co-authored-by: Alexandre Abadie <[email protected]> Co-authored-by: MrKevinWeiss <[email protected]>

bors · 2023-05-24T12:56:54Z

Build failed (retrying...):

Murdock

19576: boards: add stm32l496g-disco support r=aabadie a=gschorcht ### Contribution description The PR adds the board definition for the STM2L496G-DISO board. It is the same board that is also shipped with the P-L496G-CELL02 LTE pack for which we already have the board definition `p-l496g-cell02`. However, `stm32l496g-disco` provides a complete configuration of the board and supports the following features in addition to `p-l496g-cell02`: ``` > FEATURES_PROVIDED += periph_adc > FEATURES_PROVIDED += periph_dac > FEATURES_PROVIDED += periph_dma > FEATURES_PROVIDED += periph_pwm > FEATURES_PROVIDED += periph_uart_hw_fc > FEATURES_PROVIDED += arduino ``` In the long term, `p-l496g-cell02` is to be based on the new full `stm32l496g-disco` board definition. The CPT and the LCD display are not yet supported since they are connected to/controlled by the MFX (a STM32L152-based sub-system) and the FMC peripheral. ### Testing procedure All basic tests should work with the new board definition. The following tests were executed and did succeed: - [x] `tests/periph/adc` - [x] `tests/periph/dac` - [x] `tests/periph/i2c` for `I2C_DEV(0)`, `I2C_DEV(1)` is not exposed and not tested - [x] `tests/periph/pwm` - [x] `tests/periph/spi` for `SPI_DEV(0)`, `SPI_DEV(1) connection not soldered and not tested - [x] `tests/periph/timer` for `TIMER_DEV(0)` and `TIMER_DEV(1)` - [x] `tests/periph/uart` for `UART_DEV(0)`, `UART_DEV(1)` and `UART_DEV(2)` - [x] `tests/usbus_cdc_ecm` together with `stdio_cdc_acm` ### Issues/PRs references ~Depends on PR #19571~ ~Depends on PR #19572~ ~Depends on PR #19573~ Co-authored-by: Gunar Schorcht <[email protected]>

bors · 2023-05-24T13:09:14Z

Build failed:

Murdock

gschorcht · 2023-05-24T16:37:03Z

I had to fix a small problem with the backight pin (commit 1d8f075).

aabadie · 2023-05-25T09:55:16Z

I enabled the "CI: no fast fail" so Murdock will report all problems at once. And there are still a few :)

aabadie · 2023-05-25T18:56:48Z

please squash!

aabadie · 2023-05-27T15:08:38Z

bors merge

bors · 2023-05-27T15:33:08Z

Build succeeded!

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gschorcht · 2023-05-28T15:41:37Z

Thanks for reviewing and merging.

gschorcht requested review from leandrolanzieri, jia200x and MrKevinWeiss as code owners May 10, 2023 11:26

github-actions bot added Area: boards Area: Board ports Area: doc Area: Documentation Area: Kconfig Area: Kconfig integration labels May 10, 2023

gschorcht force-pushed the boards/stm32l496g-disco branch from 54ef0d9 to 3ef4180 Compare May 10, 2023 11:27

gschorcht requested a review from aabadie May 10, 2023 11:29

gschorcht added Type: new feature The issue requests / The PR implemements a new feature for RIOT CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR labels May 10, 2023

aabadie reviewed May 10, 2023

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maribu added the State: waiting for other PR State: The PR requires another PR to be merged first label May 17, 2023

gschorcht force-pushed the boards/stm32l496g-disco branch from 3ef4180 to b98a422 Compare May 18, 2023 23:53

gschorcht requested review from fjmolinas, DipSwitch and vincent-d as code owners May 19, 2023 00:44

github-actions bot added Area: build system Area: Build system Area: cpu Area: CPU/MCU ports Platform: ARM Platform: This PR/issue effects ARM-based platforms labels May 19, 2023

gschorcht force-pushed the boards/stm32l496g-disco branch from 3a0922f to a632910 Compare May 19, 2023 00:46

gschorcht mentioned this pull request May 19, 2023

cpu/stm32: fix riotboot settings for L4 and WB #19618

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gschorcht removed the State: waiting for other PR State: The PR requires another PR to be merged first label May 21, 2023

gschorcht force-pushed the boards/stm32l496g-disco branch from a632910 to 2531a00 Compare May 21, 2023 15:16

benpicco approved these changes May 24, 2023

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gschorcht force-pushed the boards/stm32l496g-disco branch from 196e89d to 49eb931 Compare May 25, 2023 15:24

github-actions bot removed Area: build system Area: Build system Area: cpu Area: CPU/MCU ports Platform: ARM Platform: This PR/issue effects ARM-based platforms labels May 25, 2023

boards: add stm32l496g-disco support

f7e026a

gschorcht force-pushed the boards/stm32l496g-disco branch from 49eb931 to f7e026a Compare May 27, 2023 08:47

bors bot merged commit af83e73 into RIOT-OS:master May 27, 2023

gschorcht deleted the boards/stm32l496g-disco branch June 9, 2023 13:01

benpicco added this to the Release 2023.07 milestone Aug 2, 2023

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boards: add stm32l496g-disco support #19576

boards: add stm32l496g-disco support #19576

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Testing procedure

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