WIP: introduce periph_sleepmem #11369
Conversation
kaspar030
added
State: WIP
|
This issue has been automatically marked as stale because it has not had recent activity. It will be closed if no further activity occurs. If you want me to ignore this issue, please mark it with the "State: don't stale" label. Thank you for your contributions. |
stale
bot
added
the
State: stale
|
Still useful. |
kaspar030
removed
the
State: stale
|
Yea the sam0 RTC also has a bunch of registers that can be used for this very purpose. |
| size_t sleepmem_put(void *src, size_t n); | ||
| size_t sleepmem_get(void *target, size_t n); |
There was a problem hiding this comment.
The API is a bit strange though.
- add an offset so we don't always have to write the whole memory at once
- just return an error if the buffer won't fit, partial writes are not really useful
There was a problem hiding this comment.
* add an offset so we don't always have to write the whole memory at once
I didn't add an offset because I assumed that it might require extra logic if the sleep memory has to be written as a whole.
* just return an error if the buffer won't fit, partial writes are not really useful
totally, will fix
There was a problem hiding this comment.
I assumed that it might require extra logic if the sleep memory has to be written as a whole.
Is that the case on STM32?
On sam0 you can just write individual registers.
There was a problem hiding this comment.
no, stm32 can also write individual registers.
|
Another question would be if this API should also cover I2C RTCs like |
I'd say, why not? At that point, a pointer based interface should be considered. |
|
This seems useful.. |
| #include "cpu.h" | ||
|
|
||
| #ifndef RTC_BKP_NUMBER | ||
| #define RTC_BKP_NUMBER (20u) |
There was a problem hiding this comment.
is this true for all stm32?
There was a problem hiding this comment.
Nope, from a quick scan L4 has 32, L1 has UP TO 32
Contribution description
Some MCU's offer a couple of registers or memory that retain(s) state even in the deepest sleep mode (when e.g., RAM is not retained). This PR tries to come up with a generic API to make those usable, and an implementation for stm32's RTC backup registers.
While working fine on stm32f4, this is otherwise completely WIP and missing licenses, docs, test application, ...
Testing procedure
I'd say this is in planning phase, so please check if the API makes sense.
Issues/PRs references
Briefly discussed backup registers in #11258 (comment).