cpu, cc2538: cleanup periph gpio

RIOT-OS · Jul 5, 2017 · 94b8f99 · 94b8f99
1 parent 9b98414
commit 94b8f99
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Showing 6 changed files with 39 additions and 31 deletions.
diff --git a/boards/remote-pa/include/board.h b/boards/remote-pa/include/board.h
@@ -72,9 +72,10 @@
  */
 #define RF_SWITCH_PORT      GPIO_D
 #define RF_SWITCH_PIN       (4)
-#define RF_SWITCH_EXTERNAL  (RF_SWITCH_PORT->DATA |= (1 << RF_SWITCH_PIN))
-#define RF_SWITCH_INTERNAL  (RF_SWITCH_PORT->DATA &= ~(1 << RF_SWITCH_PIN))
-#define RF_SWITCH_TOGGLE    (RF_SWITCH_PORT->DATA ^= (1 << RF_SWITCH_PIN))
+#define RF_SWITCH_GPIO      GPIO_PIN(3, 4)                  /**< GPIO_PD4 */
+#define RF_SWITCH_EXTERNAL  gpio_set(RF_SWITCH_GPIO)
+#define RF_SWITCH_INTERNAL  gpio_clear(RF_SWITCH_GPIO)
+#define RF_SWITCH_TOGGLE    gpio_toggle(RF_SWITCH_GPIO)
 /** @} */
 
 /**

diff --git a/boards/remote-reva/include/board.h b/boards/remote-reva/include/board.h
@@ -84,7 +84,7 @@
  *
  * @{
  */
-#define RF_SWITCH_GPIO      GPIO_PD2
+#define RF_SWITCH_GPIO      GPIO_PIN(3, 2)                  /**< GPIO_PD2 */
 #define RF_SWITCH_SUB_GHZ   gpio_set(RF_SWITCH_GPIO)
 #define RF_SWITCH_2_4_GHZ   gpio_clear(RF_SWITCH_GPIO)
 #define RF_SWITCH_TOGGLE    gpio_toggle(RF_SWITCH_GPIO)
@@ -94,22 +94,22 @@
  * @name Shutdown enable/done pins
  * @{
  */
-#define SHUTDOWN_DONE_GPIO  GPIO_PD0
-#define SHUTDOWN_EN_GPIO    GPIO_PD1
+#define SHUTDOWN_DONE_GPIO  GPIO_PIN(3, 0)                  /**< GPIO_PD0 */
+#define SHUTDOWN_EN_GPIO    GPIO_PIN(3, 1)                  /**< GPIO_PD1 */
 /** @} */
 
 /**
  * @name CC1200 SPI and pins definitions
  * @{
  */
 #define CC1200_SPI_DEV      SSI0
-#define CC1200_MOSI_GPIO    GPIO_PB1
-#define CC1200_MISO_GPIO    GPIO_PB3
-#define CC1200_SCLK_GPIO    GPIO_PB2
-#define CC1200_CSN_GPIO     GPIO_PB5
-#define CC1200_RESET_GPIO   GPIO_PC7
-#define CC1200_GPD0_GPIO    GPIO_PB4
-#define CC1200_GPD2_GPIO    GPIO_PB0
+#define CC1200_MOSI_GPIO    GPIO_PIN(1, 1)                  /**< GPIO_PB1 */
+#define CC1200_MISO_GPIO    GPIO_PIN(1, 3)                  /**< GPIO_PB3 */
+#define CC1200_SCLK_GPIO    GPIO_PIN(1, 2)                  /**< GPIO_PB2 */
+#define CC1200_CSN_GPIO     GPIO_PIN(1, 5)                  /**< GPIO_PB5 */
+#define CC1200_RESET_GPIO   GPIO_PIN(2, 7)                  /**< GPIO_PC7 */
+#define CC1200_GPD0_GPIO    GPIO_PIN(1, 4)                  /**< GPIO_PB4 */
+#define CC1200_GPD2_GPIO    GPIO_PIN(1, 0)                  /**< GPIO_PB0 */
 /** @} */
 
 /**

diff --git a/boards/remote-revb/include/board.h b/boards/remote-revb/include/board.h
@@ -84,7 +84,7 @@
  *
  * @{
  */
-#define RF_SWITCH_GPIO      GPIO_PD2
+#define RF_SWITCH_GPIO      GPIO_PIN(3, 2)              /**< GPIO_PD2 */
 #define RF_SWITCH_SUB_GHZ   gpio_set(RF_SWITCH_GPIO)
 #define RF_SWITCH_2_4_GHZ   gpio_clear(RF_SWITCH_GPIO)
 #define RF_SWITCH_TOGGLE    gpio_toggle(RF_SWITCH_GPIO)
@@ -94,21 +94,21 @@
  * @name Power management enable pin
  * @{
  */
-#define SHUTDOWN_EN_GPIO    GPIO_PD1
+#define SHUTDOWN_EN_GPIO    GPIO_PIN(3, 1)              /**< GPIO_PD1 */
 /** @} */
 
 /**
  * @name CC1200 SPI and pins definitions
  * @{
  */
 #define CC1200_SPI_DEV      SSI0
-#define CC1200_MOSI_GPIO    GPIO_PB1
-#define CC1200_MISO_GPIO    GPIO_PB3
-#define CC1200_SCLK_GPIO    GPIO_PB2
-#define CC1200_CSN_GPIO     GPIO_PB5
-#define CC1200_RESET_GPIO   GPIO_PC7
-#define CC1200_GPD0_GPIO    GPIO_PB4
-#define CC1200_GPD2_GPIO    GPIO_PB0
+#define CC1200_MOSI_GPIO    GPIO_PIN(1, 1)              /**< GPIO_PB1 */
+#define CC1200_MISO_GPIO    GPIO_PIN(1, 3)              /**< GPIO_PB3 */
+#define CC1200_SCLK_GPIO    GPIO_PIN(1, 2)              /**< GPIO_PB2 */
+#define CC1200_CSN_GPIO     GPIO_PIN(1, 5)              /**< GPIO_PB5 */
+#define CC1200_RESET_GPIO   GPIO_PIN(2, 7)              /**< GPIO_PC7 */
+#define CC1200_GPD0_GPIO    GPIO_PIN(1, 4)              /**< GPIO_PB4 */
+#define CC1200_GPD2_GPIO    GPIO_PIN(1, 0)              /**< GPIO_PB0 */
 /** @} */
 
 /**

diff --git a/cpu/cc2538/cpu.c b/cpu/cc2538/cpu.c
@@ -21,6 +21,7 @@
 
 #include "cpu.h"
 #include "periph/init.h"
+#include "periph/gpio.h"
 
 #define BIT(n)          ( 1UL << (n) )
 
@@ -68,24 +69,27 @@ static void cpu_clock_init(void)
 
 #if SYS_CTRL_OSC32K_USE_XTAL
     /* Set the XOSC32K_Q pads to analog for the external crystal: */
-    gpio_software_control(GPIO_PD6);
-    gpio_dir_input(GPIO_PD6);
-    IOC_PXX_OVER[GPIO_PD6] = IOC_OVERRIDE_ANA;
+    gpio_t pd6 = GPIO_PIN(3, 6);
+    gpio_sw_ctrl(pd6);
+    gpio_init(pd6, GPIO_IN);
+    IOC_PXX_OVER[gpio_pp_num(pd6)] = IOC_OVERRIDE_ANA;
 
-    gpio_software_control(GPIO_PD7);
-    gpio_dir_input(GPIO_PD7);
-    IOC_PXX_OVER[GPIO_PD7] = IOC_OVERRIDE_ANA;
+    gpio_t pd7 = GPIO_PIN(3, 7);
+    gpio_sw_ctrl(pd7);
+    gpio_init(pd7, GPIO_IN);
+    IOC_PXX_OVER[gpio_pp_num(pd7)] = IOC_OVERRIDE_ANA;
 #endif
 
     /* Configure the clock settings: */
     SYS_CTRL->cc2538_sys_ctrl_clk_ctrl.CLOCK_CTRL = CLOCK_CTRL_VALUE;
 
     /* Wait for the new clock settings to take effect: */
-    while ((SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STA ^ CLOCK_CTRL_VALUE) & CLOCK_STA_MASK);
+    while ((SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STA ^ CLOCK_CTRL_VALUE) &
+           CLOCK_STA_MASK) {}
 
 #if SYS_CTRL_OSC32K_USE_XTAL
     /* Wait for the 32-kHz crystal oscillator to stabilize: */
-    while ( SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K);
-    while (!SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K);
+    while ( SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K) {}
+    while (!SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K) {}
 #endif
 }
diff --git a/cpu/cc2538/include/cc2538_gpio.h b/cpu/cc2538/include/cc2538_gpio.h
@@ -32,6 +32,7 @@
 extern "C" {
 #endif
 
+#if 0 /* USE RIOT GPIO API */
 /**
  * @name Numeric representation of the four GPIO ports
  * @{
@@ -189,6 +190,7 @@ enum {
 };
 /** @} */
 
+#endif /* USE RIOT GPIO API */
 /**
  * @brief GPIO port component registers
  */

diff --git a/cpu/cc2538/include/periph_cpu.h b/cpu/cc2538/include/periph_cpu.h
@@ -54,6 +54,7 @@ typedef uint32_t gpio_t;
 #define PORTNUM_SHIFT       (12U)           /**< bit shift for GPIO port      */
 #define PIN_MASK            (0x00000007)    /**< bit mask for GPIO pin [0-7]  */
 #define GPIO_MASK           (0xfffff000)    /**< bit mask for GPIO port addr  */
+#define GPIO_BITS_PER_PORT  (8U)            /**< number of GPIO pins per port */
 /** @} */
 
 /**