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19777: cpu/avr8_common: Prepare for rework ISR r=benpicco a=nandojve ### Contribution description This prepares for rework how ISR is handled for AVR-8 platform. It is not expected changes on the behavior but tests on other boards were welcome to avoid regressions. #### Improvements * Split UART state from ISR states. Now it is necessary two variables and GPIORx registers are automatically selected when available. * UART states now supports up to 8 UARTs. * Added AVR8_ISR macro do clean-up and hide internals related to ISR processing. This allows changes on ISR without any other changes on drivers. ### Testing procedure Tests were conducted using atmega328p-xplained-mini and atxmega-a1u-xpro and the zigduino board was only built. The example thread_duel was used to test regressions. Co-authored-by: Gerson Fernando Budke <[email protected]>
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@@ -2,6 +2,8 @@ | |
* Copyright (C) 2015 HAW Hamburg | ||
* 2016 INRIA | ||
* 2023 Hugues Larrive | ||
* 2023 Gerson Fernando Budke | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser | ||
* General Public License v2.1. See the file LICENSE in the top level | ||
|
@@ -23,6 +25,7 @@ | |
* @author Torben Petersen <[email protected]> | ||
* @author Marian Buschsieweke <[email protected]> | ||
* @author Hugues Larrive <[email protected]> | ||
* @author Gerson Fernando Budke <[email protected]> | ||
* | ||
* @} | ||
*/ | ||
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@@ -32,6 +35,7 @@ | |
#include <avr/interrupt.h> | ||
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#include "cpu.h" | ||
#include "irq.h" | ||
#include "board.h" | ||
#include "periph/gpio.h" | ||
#include "periph_conf.h" | ||
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@@ -368,16 +372,13 @@ void gpio_irq_disable(gpio_t pin) | |
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static inline void irq_handler(uint8_t int_num) | ||
{ | ||
avr8_enter_isr(); | ||
config[int_num].cb(config[int_num].arg); | ||
avr8_exit_isr(); | ||
} | ||
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#ifdef ENABLE_PCINT | ||
/* inline function that is used by the PCINT ISR */ | ||
static inline void pcint_handler(uint8_t bank, uint8_t enabled_pcints) | ||
{ | ||
avr8_enter_isr(); | ||
/* Find right item */ | ||
uint8_t idx = 0; | ||
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@@ -406,89 +407,50 @@ static inline void pcint_handler(uint8_t bank, uint8_t enabled_pcints) | |
enabled_pcints = enabled_pcints >> 1; | ||
idx++; | ||
} | ||
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avr8_exit_isr(); | ||
} | ||
#ifdef MODULE_ATMEGA_PCINT0 | ||
ISR(PCINT0_vect, ISR_BLOCK) | ||
{ | ||
pcint_handler(PCINT0_IDX, PCMSK0); | ||
} | ||
AVR8_ISR(PCINT0_vect, pcint_handler, PCINT0_IDX, PCMSK0); | ||
#endif /* MODULE_ATMEGA_PCINT0 */ | ||
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#ifdef MODULE_ATMEGA_PCINT1 | ||
ISR(PCINT1_vect, ISR_BLOCK) | ||
{ | ||
pcint_handler(PCINT1_IDX, PCMSK1); | ||
} | ||
AVR8_ISR(PCINT1_vect, pcint_handler, PCINT1_IDX, PCMSK1); | ||
#endif /* MODULE_ATMEGA_PCINT1 */ | ||
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#ifdef MODULE_ATMEGA_PCINT2 | ||
ISR(PCINT2_vect, ISR_BLOCK) | ||
{ | ||
pcint_handler(PCINT2_IDX, PCMSK2); | ||
} | ||
AVR8_ISR(PCINT2_vect, pcint_handler, PCINT2_IDX, PCMSK2); | ||
#endif /* MODULE_ATMEGA_PCINT2 */ | ||
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#ifdef MODULE_ATMEGA_PCINT3 | ||
ISR(PCINT3_vect, ISR_BLOCK) | ||
{ | ||
pcint_handler(PCINT3_IDX, PCMSK3); | ||
} | ||
AVR8_ISR(PCINT3_vect, pcint_handler, PCINT3_IDX, PCMSK3); | ||
#endif /* MODULE_ATMEGA_PCINT3 */ | ||
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#endif /* ENABLE_PCINT */ | ||
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ISR(INT0_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(0); /**< predefined interrupt pin */ | ||
} | ||
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ISR(INT1_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(1); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT0_vect, irq_handler, 0); /**< predefined interrupt pin */ | ||
AVR8_ISR(INT1_vect, irq_handler, 1); /**< predefined interrupt pin */ | ||
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#if defined(INT2_vect) | ||
ISR(INT2_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(2); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT2_vect, irq_handler, 2); /**< predefined interrupt pin */ | ||
#endif | ||
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#if defined(INT3_vect) | ||
ISR(INT3_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(3); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT3_vect, irq_handler, 3); /**< predefined interrupt pin */ | ||
#endif | ||
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#if defined(INT4_vect) | ||
ISR(INT4_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(4); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT4_vect, irq_handler, 4); /**< predefined interrupt pin */ | ||
#endif | ||
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#if defined(INT5_vect) | ||
ISR(INT5_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(5); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT5_vect, irq_handler, 5); /**< predefined interrupt pin */ | ||
#endif | ||
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#if defined(INT6_vect) | ||
ISR(INT6_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(6); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT6_vect, irq_handler, 6); /**< predefined interrupt pin */ | ||
#endif | ||
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#if defined(INT7_vect) | ||
ISR(INT7_vect, ISR_BLOCK) | ||
{ | ||
irq_handler(7); /**< predefined interrupt pin */ | ||
} | ||
AVR8_ISR(INT7_vect, irq_handler, 7); /**< predefined interrupt pin */ | ||
#endif | ||
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#endif /* MODULE_PERIPH_GPIO_IRQ */ |
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|
@@ -2,6 +2,7 @@ | |
* Copyright (C) 2015 HAW Hamburg | ||
* 2016 INRIA | ||
* 2022 Otto-von-Guericke-Universität Magdeburg | ||
* 2023 Gerson Fernando Budke | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser General | ||
* Public License v2.1. See the file LICENSE in the top level directory for more | ||
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@@ -22,6 +23,7 @@ | |
* @author Robert Hartung <[email protected]> | ||
* @author Torben Petersen <[email protected]> | ||
* @author Marian Buschsieweke <[email protected]> | ||
* @author Gerson Fernando Budke <[email protected]> | ||
* | ||
* @} | ||
*/ | ||
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@@ -117,63 +119,37 @@ int gpio_ll_irq(gpio_port_t port, uint8_t pin, gpio_irq_trig_t trig, | |
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static void isr_exti(uint8_t exti) | ||
{ | ||
avr8_enter_isr(); | ||
isr_ctx[exti].cb(isr_ctx[exti].arg); | ||
avr8_exit_isr(); | ||
} | ||
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#ifdef INT0_vect | ||
ISR(INT0_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(0); | ||
} | ||
AVR8_ISR(INT0_vect, isr_exti, 0); | ||
#endif | ||
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#ifdef INT1_vect | ||
ISR(INT1_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(1); | ||
} | ||
AVR8_ISR(INT1_vect, isr_exti, 1); | ||
#endif | ||
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#ifdef INT2_vect | ||
ISR(INT2_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(2); | ||
} | ||
AVR8_ISR(INT2_vect, isr_exti, 2); | ||
#endif | ||
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#ifdef INT3_vect | ||
ISR(INT3_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(3); | ||
} | ||
AVR8_ISR(INT3_vect, isr_exti, 3); | ||
#endif | ||
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#ifdef INT4_vect | ||
ISR(INT4_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(4); | ||
} | ||
AVR8_ISR(INT4_vect, isr_exti, 4); | ||
#endif | ||
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#ifdef INT5_vect | ||
ISR(INT5_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(5); | ||
} | ||
AVR8_ISR(INT5_vect, isr_exti, 5); | ||
#endif | ||
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#ifdef INT6_vect | ||
ISR(INT6_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(6); | ||
} | ||
AVR8_ISR(INT6_vect, isr_exti, 6); | ||
#endif | ||
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#ifdef INT7_vect | ||
ISR(INT7_vect, ISR_BLOCK) | ||
{ | ||
isr_exti(7); | ||
} | ||
AVR8_ISR(INT7_vect, isr_exti, 7); | ||
#endif |
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@@ -1,5 +1,6 @@ | ||
/* | ||
* Copyright (C) 2020 Benjamin Valentin | ||
* 2023 Gerson Fernando Budke | ||
* | ||
* This file is subject to the terms and conditions of the GNU Lesser General | ||
* Public License v2.1. See the file LICENSE in the top level directory for more | ||
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@@ -17,10 +18,12 @@ | |
* time across reboots or deep sleep. | ||
* | ||
* @author Benjamin Valentin <[email protected]> | ||
* @author Gerson Fernando Budke <[email protected]> | ||
* | ||
* @} | ||
*/ | ||
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#include "irq.h" | ||
#include "periph/rtc.h" | ||
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/* In .noinit so we don't reset the counter on reboot */ | ||
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@@ -31,20 +34,17 @@ static rtc_alarm_cb_t alarm_cb; | |
static void *alarm_cb_arg; | ||
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/* will be called every second */ | ||
ISR(TIMER2_OVF_vect) | ||
static inline void tmr2_ovf_handler(void) | ||
{ | ||
avr8_enter_isr(); | ||
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if (++tm_now.tm_sec > 59) { | ||
rtc_tm_normalize(&tm_now); | ||
} | ||
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if (alarm_cb && rtc_tm_compare(&tm_now, &tm_alarm) == 0) { | ||
alarm_cb(alarm_cb_arg); | ||
} | ||
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avr8_exit_isr(); | ||
} | ||
AVR8_ISR(TIMER2_OVF_vect, tmr2_ovf_handler); | ||
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void rtc_init(void) | ||
{ | ||
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