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Relax wire_order restrictions in circuit visualization #9893

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Jul 13, 2023
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2 changes: 1 addition & 1 deletion qiskit/opflow/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@

Operators and State functions are the building blocks of Quantum Algorithms.

A library for Quantum Algorithms & Applications is more than a collection of
A library for Quantum Algorithms & Applications (QA&A) is more than a collection of
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This is unrelated. I just saw it around and noticed that QA&A is not a very common acronym.

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It'd probably be better to revert this, especially with opflow deprecated. It's a problem that's existed forever (and capitalising unexpected words in a sentence like this is a not-altogether-unheard-of way of implicitly defining an acronym anyway).

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@1ucian0 1ucian0 Jul 13, 2023

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done in b94ac8d

algorithms wrapped in Python functions. It needs to provide tools to make writing
algorithms simple and easy. This is the layer of modules between the circuits and algorithms,
providing the language and computational primitives for QA&A research.
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51 changes: 33 additions & 18 deletions qiskit/visualization/circuit/circuit_visualization.py
Original file line number Diff line number Diff line change
Expand Up @@ -204,27 +204,42 @@ def circuit_drawer(
raise VisualizationError(
"The wire_order option cannot be set when the reverse_bits option is True."
)
if wire_order is not None and len(wire_order) != circuit.num_qubits + circuit.num_clbits:
raise VisualizationError(
"The wire_order list must be the same "
"length as the sum of the number of qubits and clbits in the circuit."
)
if wire_order is not None and set(wire_order) != set(
range(circuit.num_qubits + circuit.num_clbits)
):
raise VisualizationError(
"There must be one and only one entry in the "
"wire_order list for the index of each qubit and each clbit in the circuit."
)
complete_wire_order = None
if wire_order is not None:
if set(wire_order) > set(range(circuit.num_qubits + circuit.num_clbits)):
raise VisualizationError(
"The wire_order list should be a subset of the index for each qubit "
"and each clbit in the circuit."
)

if len(set(wire_order)) != len(wire_order):
raise VisualizationError(
"There must be one and only one entry in the "
"wire_order list for the index of each qubit and each clbit in the circuit."
)

if len(set(wire_order)) != len(wire_order):
raise VisualizationError("The wire_order list should not have repeated elements.")

rest_of_wires = list(range(circuit.num_qubits + circuit.num_clbits))
for wire in set(wire_order):
rest_of_wires.remove(wire)
complete_wire_order = wire_order + rest_of_wires

if circuit.clbits and (reverse_bits or wire_order is not None):
if (
circuit.clbits
and (reverse_bits or wire_order is not None)
and not set(wire_order or []).issubset(set(range(circuit.num_qubits)))
):
if cregbundle:
warn(
"cregbundle set to False since either reverse_bits or wire_order has been set.",
"cregbundle set to False since either reverse_bits or wire_order "
"(over classical bit) has been set.",
RuntimeWarning,
2,
)
cregbundle = False

if output == "text":
return _text_circuit_drawer(
circuit,
Expand All @@ -238,7 +253,7 @@ def circuit_drawer(
fold=fold,
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=wire_order,
wire_order=complete_wire_order,
)
elif output == "latex":
image = _latex_circuit_drawer(
Expand All @@ -253,7 +268,7 @@ def circuit_drawer(
with_layout=with_layout,
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=wire_order,
wire_order=complete_wire_order,
)
elif output == "latex_source":
return _generate_latex_source(
Expand All @@ -268,7 +283,7 @@ def circuit_drawer(
with_layout=with_layout,
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=wire_order,
wire_order=complete_wire_order,
)
elif output == "mpl":
image = _matplotlib_circuit_drawer(
Expand All @@ -285,7 +300,7 @@ def circuit_drawer(
ax=ax,
initial_state=initial_state,
cregbundle=cregbundle,
wire_order=wire_order,
wire_order=complete_wire_order,
)
else:
raise VisualizationError(
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Original file line number Diff line number Diff line change
@@ -0,0 +1,34 @@
---
features:
- |
Some restrictions when using ``wire_order`` in the circuit drawers had been relaxed.
Now, ``wire_order`` does not need to be a complete list and it can be used
with ``cregbundle=True`` when the order is not affecting the classical bits.

.. code-block::

from qiskit import QuantumCircuit, QuantumRegister, ClassicalRegister

qr = QuantumRegister(4, "q")
cr = ClassicalRegister(4, "c")
cr2 = ClassicalRegister(2, "ca")
circuit = QuantumCircuit(qr, cr, cr2)
circuit.h(0)
circuit.h(3)
circuit.x(1)
circuit.x(3).c_if(cr, 10)
circuit.draw('text', wire_order=[2, 3], cregbundle=True)

.. parsed-literal::

q_2: ────────────
┌───┐ ┌───┐
q_3: ┤ H ├─┤ X ├─
├───┤ └─╥─┘
q_0: ┤ H ├───╫───
├───┤ ║
q_1: ┤ X ├───╫───
└───┘┌──╨──┐
c: 4/═════╡ 0xa ╞
└─────┘
ca: 2/════════════
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I don't think this example will work after the new changes any more because of the partial wire order. We should replace it with one that assigns all qubits.

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@1ucian0 1ucian0 Jul 13, 2023

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oops... fixed in d2224cd

Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
\documentclass[border=2px]{standalone}

\usepackage[braket, qm]{qcircuit}
\usepackage{graphicx}

\begin{document}
\scalebox{1.0}{
\Qcircuit @C=1.0em @R=0.2em @!R { \\
\nghost{{q}_{2} : } & \lstick{{q}_{2} : } & \qw & \qw & \qw & \qw\\
\nghost{{q}_{1} : } & \lstick{{q}_{1} : } & \gate{\mathrm{X}} & \qw & \qw & \qw\\
\nghost{{q}_{0} : } & \lstick{{q}_{0} : } & \gate{\mathrm{H}} & \qw & \qw & \qw\\
\nghost{{q}_{3} : } & \lstick{{q}_{3} : } & \gate{\mathrm{H}} & \gate{\mathrm{X}} & \qw & \qw\\
\nghost{{c}_{0} : } & \lstick{{c}_{0} : } & \cw & \controlo \cw \cwx[-1] & \cw & \cw\\
\nghost{{c}_{1} : } & \lstick{{c}_{1} : } & \cw & \controlo \cw \cwx[-1] & \cw & \cw\\
\nghost{{c}_{2} : } & \lstick{{c}_{2} : } & \cw & \control \cw \cwx[-1] & \cw & \cw\\
\nghost{{c}_{3} : } & \lstick{{c}_{3} : } & \cw & \control \cw^(0.0){^{\mathtt{0xc}}} \cwx[-1] & \cw & \cw\\
\nghost{{ca}_{0} : } & \lstick{{ca}_{0} : } & \cw & \cw & \cw & \cw\\
\nghost{{ca}_{1} : } & \lstick{{ca}_{1} : } & \cw & \cw & \cw & \cw\\
\\ }}
\end{document}
2 changes: 0 additions & 2 deletions test/python/visualization/test_circuit_drawer.py
Original file line number Diff line number Diff line change
Expand Up @@ -108,8 +108,6 @@ def test_wire_order_raises(self):

circuit = QuantumCircuit(3, 3)
circuit.x(1)
with self.assertRaisesRegex(VisualizationError, "the same length as"):
visualization.circuit_drawer(circuit, wire_order=[0, 1, 2])

with self.assertRaisesRegex(VisualizationError, "one and only one entry"):
visualization.circuit_drawer(circuit, wire_order=[2, 1, 0, 3, 1, 5])
Expand Down
20 changes: 20 additions & 0 deletions test/python/visualization/test_circuit_latex.py
Original file line number Diff line number Diff line change
Expand Up @@ -699,6 +699,26 @@ def test_wire_order(self):
)
self.assertEqualToReference(filename)

def test_wire_order_partial(self):
"""Test the wire_order partial list to latex drawer"""
filename = self._get_resource_path("test_latex_wire_order_partial.tex")
qr = QuantumRegister(4, "q")
cr = ClassicalRegister(4, "c")
cr2 = ClassicalRegister(2, "ca")
circuit = QuantumCircuit(qr, cr, cr2)
circuit.h(0)
circuit.h(3)
circuit.x(1)
circuit.x(3).c_if(cr, 12)
circuit_drawer(
circuit,
cregbundle=False,
wire_order=[2, 1],
filename=filename,
output="latex_source",
)
self.assertEqualToReference(filename)


if __name__ == "__main__":
unittest.main(verbosity=2)
27 changes: 27 additions & 0 deletions test/python/visualization/test_circuit_text_drawer.py
Original file line number Diff line number Diff line change
Expand Up @@ -341,6 +341,33 @@ def test_wire_order(self):
str(_text_circuit_drawer(circuit, wire_order=[2, 1, 3, 0, 6, 8, 9, 5, 4, 7])), expected
)

def test_wire_order_partial(self):
"""Test the wire_order option with a smaller list"""
expected = "\n".join(
[
" ",
"q_2: |0>────────────",
" ┌───┐ ",
"q_1: |0>┤ X ├───────",
" ├───┤ ┌───┐ ",
"q_3: |0>┤ H ├─┤ X ├─",
" ├───┤ └─╥─┘ ",
"q_0: |0>┤ H ├───╫───",
" └───┘┌──╨──┐",
" c: 0 4/═════╡ 0xa ╞",
" └─────┘",
]
)
qr = QuantumRegister(4, "q")
cr = ClassicalRegister(4, "c")
cr2 = ClassicalRegister(2, "ca")
circuit = QuantumCircuit(qr, cr, cr2)
circuit.h(0)
circuit.h(3)
circuit.x(1)
circuit.x(3).c_if(cr, 10)
self.assertEqual(str(_text_circuit_drawer(circuit, wire_order=[2, 1, 3, 0, 6])), expected)

def test_text_swap(self):
"""Swap drawing."""
expected = "\n".join(
Expand Down