Efficiency Bug

[anormanhogan]

Environment

• Qiskit Terra version: 0.18.3
• Python version: 3.8
• Operating system: Mac OS Monterey 12.0.1

What is happening?

My quantum circuit's gates are inefficiently transpiling, causing my x sx gates to become rz sx rz gates. This brings my gates from 2->3 introducing noise

How can we reproduce the issue?

    qc.barrier()
    qc.cx(0, 1)
    qc.barrier()

    qc.x(0)

    qc.sx(0)

    qc.barrier()
    qc.cx(0, 2)
    qc.barrier()

What should happen?

The transpiler should see if there is a more efficient way to create the circuit (if possible)

Any suggestions?

No response

[levbishop]

Thanks for the report. In this case the warning was overzealous and we muted it with #7124
For most hardware (eg IBM platforms) rz.sx.rz is actually preferable to x.sx because rz is an instantaneous frame-update (which introduces no error) as opposed to x and sx which actually cause drive pulses to be emitted and these do introduce error.
There ongoing work to more properly handle tolerances and noise for 1-qubit gates in #7084 and once that merges we will likely re-enable a corrected version of the check that produced the warning you saw.

Closing as duplicate of #7224 but re-open if I missed something.

[anormanhogan]

Hey! I'm following up on this since the error seems to have come back. Is there a way to mute it, as the output for long circuits greatly increases run time?

[jakelishman]

Do you have a reproducer for the new error? As far as I know, nothing new should have changed in the 0.19.2 release that happened right before you wrote your comment, so it'd be good to know what's causing it. Are you using the latest version of Terra?

[anormanhogan]

Hi Jake, I just checked and I am actually not running the latest version like I thought; I’m actually on version 0.18.3. As far as what causes the error, I think its when I use the sx gate just before an x gate, which ends up transpiling to rz sx rz reguardless of what backend is chosen. It’s hard to tell exactly where it’s happening since I am randomizing the placement of Pauli gates in a circuit containing an sx gate, but I am fairly certain it is that exact combination that causes it, since the message outputs for every occurrence of this in the circuit. Thank you for your response! Best, Norman

…

On Feb 16, 2022, at 11:54 AM, Jake Lishman ***@***.***> wrote: Reopened #7352 <https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FQiskit%2Fqiskit-terra%2Fissues%2F7352&data=04%7C01%7Cahogan9%40groute.uic.edu%7C8dc8d6f699944f1bcd4e08d9f16d024c%7Ce202cd477a564baa99e3e3b71a7c77dd%7C0%7C0%7C637806272764888120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=OM3wwJlR2g4VprcMfUOuT3TK%2BbeVBBgaeJtcvfSKuII%3D&reserved=0>. — Reply to this email directly, view it on GitHub <https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FQiskit%2Fqiskit-terra%2Fissues%2F7352%23event-6084331311&data=04%7C01%7Cahogan9%40groute.uic.edu%7C8dc8d6f699944f1bcd4e08d9f16d024c%7Ce202cd477a564baa99e3e3b71a7c77dd%7C0%7C0%7C637806272764888120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=xozb9qIrDpcydHEO8zqW084HJkMemKqorqh2d50pp6A%3D&reserved=0>, or unsubscribe <https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fnotifications%2Funsubscribe-auth%2FAWO5S4A24AY5P6OJP4ZEMHLU3PJETANCNFSM5JKCZHRQ&data=04%7C01%7Cahogan9%40groute.uic.edu%7C8dc8d6f699944f1bcd4e08d9f16d024c%7Ce202cd477a564baa99e3e3b71a7c77dd%7C0%7C0%7C637806272764888120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=Az7uDoxCoGDB2d1izjy3uqPfI1yo6TDvK3As7ihYRE0%3D&reserved=0>. Triage notifications on the go with GitHub Mobile for iOS <https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fapps.apple.com%2Fapp%2Fapple-store%2Fid1477376905%3Fct%3Dnotification-email%26mt%3D8%26pt%3D524675&data=04%7C01%7Cahogan9%40groute.uic.edu%7C8dc8d6f699944f1bcd4e08d9f16d024c%7Ce202cd477a564baa99e3e3b71a7c77dd%7C0%7C0%7C637806272764888120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=e1CdVPz8zCQM8t6KfPyJf2oGedDoIbsHGc8oQ4A2TIw%3D&reserved=0> or Android <https://nam04.safelinks.protection.outlook.com/?url=https%3A%2F%2Fplay.google.com%2Fstore%2Fapps%2Fdetails%3Fid%3Dcom.github.android%26referrer%3Dutm_campaign%253Dnotification-email%2526utm_medium%253Demail%2526utm_source%253Dgithub&data=04%7C01%7Cahogan9%40groute.uic.edu%7C8dc8d6f699944f1bcd4e08d9f16d024c%7Ce202cd477a564baa99e3e3b71a7c77dd%7C0%7C0%7C637806272764888120%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&sdata=B6uKiabTQWg02XtvL8ma%2By%2BQPHsOUqzLifmwonlLjZs%3D&reserved=0>. You are receiving this because you authored the thread.

[jakelishman]

Ok, in that case I think it's the same situation we were in before - Terra 0.19 should no longer be issuing those warnings, which hopefully should fix your immediate run-time issues. Please let us know if that's not the case by opening a new issue, since that would be a new bug.

What Lev said before about RZ and Z being effectively error-free on all hardware (that I can think of) still holds true - they're essentially equivalent to adding some phase offsets into the control fields, which is just a numerical trick on the classical side. In theory, the transpiler should be correct from a noise standpoint to do what it's currently doing.

I'm not certain what the status of the work on making the synthesis cleverer about noise in non-standard cases here is - #7084 seems to have stalled for the time being on performance grounds, but I don't know if there's something else in the works. For now, I'll re-close this, because we're tracking the same issue in #7033 (contains exactly the same circuit as yours) and #7042 - it's just helpful to keep stuff in fewer places.