Outdated docs for Transpiler, layout-stage // DensityLayout doesn't default for control flow operations anymore

[GuillermoAbadLopez]

Issue summary:

Outdated documentation for the layout-stage in Transpiler init docs, more concretely, where we talk about DensityLayout being the default Layout when control flow operations are present (with optimizer_level=1).

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Issue origin:

After a quick discussion in Slack with @mtreinish, I pointed out what was written in the Transpiler documentation, more concretely where it talks about the DenseLayout in the Layout stage section:

"DenseLayout is used for optimization level 1 if there are control flow operations (such as IfElseOp) present in the circuit."

To which Matthew answered:

Oh that's out of date can you open an issue for that so we can update the docs? When control flow was first added in 2022 this was true, but since sabre has been updated to handle control flow too.

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Links to the relevant documentation:

• Source code link , around line 687 in main:

  :class:`~.DenseLayout`: Finds the sub-graph of the device with greatest connectivity
  that has the same number of qubits as the circuit. Used for
  optimization level 1 if there are control flow operations (such as
  :class:`~.IfElseOp`) present in the circuit.

• Documentation build link, image red square: