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Fix: Move qubit ordering check to python
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- Add more accurate estimate of num_edges.
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raynelfss committed Aug 26, 2024
1 parent feb4dbb commit 923ae3f
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Showing 2 changed files with 15 additions and 11 deletions.
12 changes: 1 addition & 11 deletions crates/circuit/src/dag_circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6422,11 +6422,6 @@ impl DAGCircuit {

// Pre-process the instructions
let qubit_set: Vec<Qubit> = if let Some(qubit_ordering) = &qubit_order {
if qubit_ordering.len() != num_qubits {
return Err(PyValueError::new_err(
"'qubit_order' does not contain exactly the same qubits as the circuit",
));
};
let mut qubits = vec![];
for qubit in qubit_ordering {
let bound = qubit.bind(py);
Expand All @@ -6447,11 +6442,6 @@ impl DAGCircuit {
(0..num_qubits as u32).map(Qubit).collect()
};
let clbit_set: Vec<Clbit> = if let Some(clbit_ordering) = &clbit_order {
if clbit_ordering.len() != num_clbits {
return Err(PyValueError::new_err(
"'clbit_order' does not contain exactly the same clbits as the circuit",
));
};
let mut clbits = vec![];
for clbit in clbit_ordering {
let bound = clbit.bind(py);
Expand Down Expand Up @@ -6509,7 +6499,7 @@ impl DAGCircuit {
num_clbits,
Some(num_ops),
Some(num_vars),
Some(num_edges),
Some(num_edges + (num_ops / 2) * num_vars),
)?;

// Assign other necessary data
Expand Down
14 changes: 14 additions & 0 deletions qiskit/converters/circuit_to_dag.py
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,20 @@ def circuit_to_dag(circuit, copy_operations=True, *, qubit_order=None, clbit_ord
circ.rz(0.5, q[1]).c_if(c, 2)
dag = circuit_to_dag(circ)
"""
if qubit_order is None:
qubits = circuit.qubits
elif len(qubit_order) != circuit.num_qubits or set(qubit_order) != set(circuit.qubits):
raise ValueError("'qubit_order' does not contain exactly the same qubits as the circuit")
else:
qubits = qubit_order

if clbit_order is None:
clbits = circuit.clbits
elif len(clbit_order) != circuit.num_clbits or set(clbit_order) != set(circuit.clbits):
raise ValueError("'clbit_order' does not contain exactly the same clbits as the circuit")
else:
clbits = clbit_order

dagcircuit = core_circuit_to_dag(circuit, qubit_order, clbit_order)

dagcircuit.duration = circuit.duration
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