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Fix README
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mn416 committed Apr 10, 2019
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Expand Up @@ -174,6 +174,9 @@ and a data cache.

<img align="center" src="doc/figures/tile.png">

Note that there is also experimental support for [custom
accelerators](doc/custom) in tiles.

#### Tinsel FPGA

Each FPGA contains two *Tinsel Slices*, with each slice comprising
Expand All @@ -183,9 +186,6 @@ the edges of the NoC are the inter-FPGA links.

<img align="center" src="doc/figures/fpga.png">

Note that there is also experimental support for [custom
accelerators](doc/custom) in tiles.

#### FPGA Triplet

An FPGA triplet consists of three worker FPGAs connected in a ring via
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