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Add support for the RISC-V architecture #14
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Thank you for the comment. I will draw it to the attention of the JIT maintainer. |
Supporting more cpus never hurt. Unfortunately I don't have much time lately, so this is unlikely happen in the close future. |
There is an experimental risc-v support in the jit compiler now. It is only tested with qemu, so there might be cache flush issues. |
Released with PCRE2 10.41 |
@PhilipHazel Could you please confirm that the RISC-V is now JIT supported since 10.41? Thank you |
I cannot confirm, but @zherczeg will be able to. |
I haven't tried it on real hw yet. |
I did test it in two rv64g systems (thanks to the gcc compile farm) before it was released; there was one bug that was fixed before the final sync and since autodetection is enabled it is IMHO available for broader use (AFAIK it has been enabled at least in alpine linux already). It doesn't use compressed instructions or the vector extensions, and assumes hard-float, so it is not "finished" but it should be an improvement over the interpreter in the currently supported configurations and therefore it should be enabled in distributions. |
I've built the new 10.42 version on RISC-V Fedora builders and the pcre2-jit test passes, which I assume should test the JIT support. |
This is great news! Thank you for the feedback. |
I haven't been able to test in Godot since we're unable to update PCRE2 for other reasons, but it sounds like everything is working great so I'll close this issue as completed. Thank you everyone! |
Update sources location (moved to Github) RISC-V is now JIT enabled according to: PCRE2Project/pcre2#14 Resolves: #2151744
This is a low-priority feature request, but one that would make sense to be done eventually.
https://github.com/PhilipHazel/pcre2/tree/master/src/sljit
Based on the files in this folder, it seems that currently PCRE supports many architectures, including x86, ARM, PPC, MIPS, SPARC, and S390X. RISC-V is a new open source ISA supported by several Linux distros, and it would be nice if PCRE supported RISC-V.
Specifically, I am only interested in 64-bit RISC-V aka RV64 (32-bit and 128-bit exist too), and as for extensions, I recommend just supporting the general purpose extensions, so
-march=rv64g
(or-march=rv64gc
). The abbreviation of RISC-V to just RV is very common and is the preferred option in some situations, so feel free to use that name.The text was updated successfully, but these errors were encountered: