This is my Master Thesis work at Université Libre de Bruxelles for the Master's Degree in Electronics and Information Technology Engineering during the year 2022-2023.
This is about a Transcient Effet Ring Oscillator Physical Unclonable Function (TERO-PUF) implementation on Artix-7 FPGA (Basys-3 from Diligent). For more informations, see the report.
The VDHL framework is based on a previous Master Thesis about Ring Oscillator PUF that can be found here. Thanks to brentdewe for providing the implementation.