Version 0.0.7 initial commit

* Added Compile All.
* Generated files are moved to ./build
* Minor ts types improvements

.gitignore

@@ -1,3 +1,4 @@
 node_modules
 .vsix
 out
+*.vsix

.vscode/settings.json

@@ -0,0 +1,7 @@
+{
+  "workbench.colorCustomizations": {
+    "[Material Theme Darker]": {
+      "statusBar.debuggingBackground": "#212121"
+    }
+  }
+}

CHANGELOG.md

@@ -1,5 +1,11 @@
 # Verilog Change Log
 
+### [0.0.6] 2021-03-16
+
+* Added Compile All.
+* Generated files are moved to ./build
+* Minor ts types improvements
+
 ## [0.0.6] 2019-06-25
 
 * Remove redundant code.

LICENSE

@@ -1,6 +1,7 @@
 MIT License
 
 Copyright (c) 2017 leafvmaple
+Copyright (c) 2021 Mohammad Kurjieh
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1,10 +1,19 @@
+# A Fork Of This [Extension](https://github.com/leafvmaple/vscode-verilog)
+
+## Major new Features:
+* Compile all verilog files in a directory
+* Output moved to ./build
+
+<br />
+<br />
+
 # Verilog Language README
 
 The Visual Studio Code extenstion for Verilog HDL Language support.
 
 ## Installation
 
-Install it from [VS Code Marketplace](https://marketplace.visualstudio.com/items/itemName=leafvmaple.verilog)
+Install it from [VS Code Marketplace](https://marketplace.visualstudio.com/items?itemName=MohammadKurjieh.verilogrunner)
 
 ## Run Code
 
@@ -20,12 +29,22 @@ Install it from [VS Code Marketplace](https://marketplace.visualstudio.com/items
 
     Use Icarus Verilog to run the current code.
 
+* **Compile all Verilog HDL Files in a directory**
+
+    Use Icarus Verilog to all the files in the directory.
+
 * **Stop Running**
 
     Stop Running Code.
 
 ## Release Notes
 
+### Version 0.0.7
+
+* Added Compile All.
+* Generated files are moved to ./build
+* Minor ts types improvements
+
 ### Version 0.0.6
 
 * Remove redundant code.

package.json

@@ -1,9 +1,9 @@
 {
-    "name": "verilog",
-    "displayName": "Verilog HDL",
+    "name": "verilogrunner",
+    "displayName": "Verilog Compiler & Runner",
     "description": "Verilog HDL Language Support for Visual Studio Code.",
-    "version": "0.0.6",
-    "publisher": "leafvmaple",
+    "version": "0.0.7",
+    "publisher": "mohammadkurjieh",
     "icon": "images/icon.png",
     "engines": {
         "vscode": "^1.17.0"
@@ -14,57 +14,74 @@
     "license": "MIT",
     "repository": {
         "type": "git",
-        "url": "https://github.com/leafvmaple/vscode-verilog"
+        "url": "https://github.com/MohammadKurjieh/vscode-verilog"
     },
     "activationEvents": [
-        "onCommand:verilog.run",
-        "onCommand:verilog.stop"
+        "onCommand:verilogrunner.run",
+        "onCommand:verilogrunner.compileAll",
+        "onCommand:verilogrunner.stop"
     ],
     "main": "./out/extension",
     "contributes": {
         "commands": [
             {
-                "command": "verilog.run",
-                "title": "Verilog: Run Verilog HDL Code",
-                "icon": "images/icon.png"
+                "command": "verilogrunner.run",
+                "title": "Verilog: Compile & Run",
+                "icon": "$(notebook-execute)"
             },
             {
-                "command": "verilog.stop",
+                "command": "verilogrunner.compileAll",
+                "title": "Verilog: Compile All Files",
+                "icon": "$(notebook-kernel-select)"
+            },
+            {
+                "command": "verilogrunner.stop",
                 "title": "Verilog: Stop Running"
             }
         ],
         "menus": {
             "editor/title": [
                 {
-                    "when": "resourceLangId == verilog && config.verilog.showRunIconInEditorTitleMenu",
-                    "command": "verilog.run",
+                    "when": "resourceLangId == verilog && config.verilogrunner.showRunIconInEditorTitleMenu",
+                    "command": "verilogrunner.run",
+                    "group": "navigation"
+                },
+                {
+                    "when": "resourceLangId == verilog && config.verilogrunner.showRunIconInEditorTitleMenu",
+                    "command": "verilogrunner.compileAll",
                     "group": "navigation"
                 }
             ]
         },
         "configuration": {
             "type": "object",
-            "title": "Verilog configuration",
+            "title": "Verilog Runner configuration",
             "properties": {
-                "verilog.showRunIconInEditorTitleMenu": {
+                "verilogrunner.showRunIconInEditorTitleMenu": {
                     "type": "boolean",
                     "default": true,
-                    "description": "Whether to show 'Run Verilog HDL' icon in editor title menu.",
+                    "description": "Whether to show 'Run Verilog' icon in editor title menu.",
                     "scope": "resource"
                 },
-                "verilog.runInTerminal": {
+                "verilogrunner.openVCD": {
+                    "type": "boolean",
+                    "default": true,
+                    "description": "(DEV) Whether to open the vcd file in editor when done.",
+                    "scope": "resource"
+                },
+                "verilogrunner.runInTerminal": {
                     "type": "boolean",
                     "default": false,
                     "description": "Whether to run code in Integrated Terminal.",
                     "scope": "resource"
                 },
-                "verilog.clearPreviousOutput": {
+                "verilogrunner.clearPreviousOutput": {
                     "type": "boolean",
-                    "default": false,
+                    "default": true,
                     "description": "Whether to clear previous output before each run.",
                     "scope": "resource"
                 },
-                "verilog.preserveFocus": {
+                "verilogrunner.preserveFocus": {
                     "type": "boolean",
                     "default": true,
                     "description": "Whether to preserve focus on code editor after code run is triggered.",
@@ -81,7 +98,8 @@
                 ],
                 "extensions": [
                     ".v",
-                    ".vh"
+                    ".vh",
+                    ".sv"
                 ],
                 "configuration": "./language-configuration.json"
             }
@@ -90,7 +108,7 @@
             {
                 "language": "verilog",
                 "scopeName": "source.verilog",
-                "path": "./syntaxes/verilog.tmLanguage.json"
+                "path": "./syntaxes/verilog_runner.tmLanguage.json"
             }
         ],
         "snippets": [
@@ -107,13 +125,13 @@
         "postinstall": "node ./node_modules/vscode/bin/install"
     },
     "dependencies": {
-        "tree-kill": "^1.1.0",
-        "iconv-lite": "^0.4.24"
+        "iconv-lite": "^0.4.24",
+        "tree-kill": "^1.2.2"
     },
     "devDependencies": {
         "@types/mocha": "^2.2.42",
         "@types/node": "^7.10.6",
         "typescript": "^2.6.1",
         "vscode": "^1.1.34"
     }
-}
+}