Rename, clean up boards/variants

.github/workflows/test-builds.yml

@@ -90,6 +90,7 @@ jobs:
         - NUCLEO_F767ZI
         - REMRAM_V1
         - BTT_SKR_SE_BX
+        - chitu_f103
 
         # Put lengthy tests last
 

buildroot/share/PlatformIO/boards/BTT_SKR_SE_BX.json → buildroot/share/PlatformIO/boards/marlin_BTT_SKR_SE_BX.json

@@ -5,7 +5,7 @@
     "extra_flags": "-DSTM32H743xx",
     "f_cpu": "400000000L",
     "mcu": "stm32h743iit6",
-    "variant": "BTT_SKR_SE_BX"
+    "variant": "MARLIN_BTT_SKR_SE_BX"
   },
   "debug": {
     "jlink_device": "STM32H743II",

buildroot/share/PlatformIO/boards/BigTree_Btt002.json → buildroot/share/PlatformIO/boards/marlin_BigTree_BTT002.json

@@ -15,7 +15,7 @@
       ]
     ],
     "mcu": "stm32f407vgt6",
-    "variant": "BIGTREE_BTT002"
+    "variant": "MARLIN_BIGTREE_BTT002"
   },
   "debug": {
     "jlink_device": "STM32F407VG",

buildroot/share/PlatformIO/boards/BigTree_GTR_v1.json → buildroot/share/PlatformIO/boards/marlin_BigTree_GTR_v1.json

@@ -15,7 +15,7 @@
       ]
     ],
     "mcu": "stm32f407zgt6",
-    "variant": "BIGTREE_GTR_V1"
+    "variant": "MARLIN_BIGTREE_GTR_V1"
   },
   "debug": {
     "jlink_device": "STM32F407ZG",

buildroot/share/PlatformIO/boards/BigTree_SKR_Pro.json → buildroot/share/PlatformIO/boards/marlin_BigTree_SKR_Pro.json

@@ -15,7 +15,7 @@
       ]
     ],
     "mcu": "stm32f407zgt6",
-    "variant": "BIGTREE_SKR_PRO_1v1"
+    "variant": "MARLIN_BIGTREE_SKR_PRO_11"
   },
   "debug": {
     "jlink_device": "STM32F407ZG",

buildroot/share/PlatformIO/boards/CHITU_F103.json → buildroot/share/PlatformIO/boards/marlin_CHITU_F103.json

@@ -15,8 +15,7 @@
       ]
     ],
     "mcu": "stm32f103zet6",
-    "variant": "CHITU_F103",
-    "ldscript": "chitu_f103.ld"
+    "variant": "marlin_CHITU_F103"
   },
   "debug": {
     "jlink_device": "STM32F103ZE",

buildroot/share/PlatformIO/boards/FYSETC_CHEETAH_V20.json → buildroot/share/PlatformIO/boards/marlin_FYSETC_CHEETAH_V20.json

@@ -16,7 +16,7 @@
     ],
     "ldscript": "stm32f401rc.ld",
     "mcu": "stm32f401rct6",
-    "variant": "FYSETC_CHEETAH_V20"
+    "variant": "MARLIN_FYSETC_CHEETAH_V20"
   },
   "debug": {
     "jlink_device": "STM32F401RC",

buildroot/share/PlatformIO/boards/MEEB_3DP.json → buildroot/share/PlatformIO/boards/marlin_MEEB_3DP.json

@@ -18,7 +18,7 @@
       "ldscript": "stm32f103xc.ld"
     },
     "mcu": "stm32f103rct6",
-    "variant": "MEEB_3DP"
+    "variant": "marlin_MEEB_3DP"
   },
   "debug": {
     "jlink_device": "STM32F103RC",

buildroot/share/PlatformIO/boards/STEVAL_STM32F401VE.json → buildroot/share/PlatformIO/boards/marlin_STEVAL_STM32F401VE.json

@@ -14,9 +14,8 @@
         "0x3748"
       ]
     ],
-    "ldscript": "stm32f401xe.ld",
     "mcu": "stm32f401vet6",
-    "variant": "STEVAL_F401VE"
+    "variant": "MARLIN_STEVAL_F401VE"
   },
   "debug": {
     "jlink_device": "STM32F401VE",

buildroot/share/PlatformIO/boards/FLYF407ZG.json → buildroot/share/PlatformIO/boards/marlin_STM32F407ZGT6.json

@@ -14,8 +14,7 @@
         "0x3748"
       ]
     ],
-    "mcu": "stm32f407zgt6",
-    "variant": "FLY_F407ZG"
+    "mcu": "stm32f407zgt6"
   },
   "debug": {
     "jlink_device": "STM32F407ZG",
@@ -49,7 +48,7 @@
     "disable_flushing": false,
     "maximum_ram_size": 196608,
     "maximum_size": 1048576,
-    "protocol": "dfu",
+    "protocol": "stlink",
     "protocols": [
       "stlink",
       "dfu",

buildroot/share/PlatformIO/boards/archim.json → buildroot/share/PlatformIO/boards/marlin_archim.json

@@ -21,7 +21,7 @@
     "ldscript": "linker_scripts/gcc/flash.ld",
     "mcu": "at91sam3x8e",
     "usb_product": "Archim",
-    "variant": "archim"
+    "variant": "MARLIN_ARCHIM"
   },
   "connectivity": [
     "can"

buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py

@@ -1,5 +1,5 @@
 #
-# STM32F103RC_MEEB_3DP.py
+# buildroot/share/PlatformIO/scripts/STM32F103RC_MEEB_3DP.py
 #
 try:
     import configparser
@@ -54,9 +54,5 @@ def after_upload(source, target, env):
 print('Use the {0:s} address as the marlin app entry point.'.format(vect_tab_addr))
 print('Use the {0:d}KB flash version of stm32f103rct6 chip.'.format(flash_size))
 
-custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103RC_MEEB_3DP.ld")
-for i, flag in enumerate(env["LINKFLAGS"]):
-    if "-Wl,-T" in flag:
-        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
-    elif flag == "-T":
-        env["LINKFLAGS"][i + 1] = custom_ld_script
+import marlin
+marlin.custom_ld_script("STM32F103RC_MEEB_3DP.ld")

buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py

@@ -1,24 +1,11 @@
 #
-# STM32F103RC_fysetc.py
+# buildroot/share/PlatformIO/scripts/STM32F103RC_fysetc.py
 #
 import os
 from os.path import join
 from os.path import expandvars
 Import("env")
 
-# Relocate firmware from 0x08000000 to 0x08008000
-#for define in env['CPPDEFINES']:
-#    if define[0] == "VECT_TAB_ADDR":
-#        env['CPPDEFINES'].remove(define)
-#env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08008000"))
-
-#custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/fysetc_stm32f103rc.ld")
-#for i, flag in enumerate(env["LINKFLAGS"]):
-#    if "-Wl,-T" in flag:
-#        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
-#    elif flag == "-T":
-#        env["LINKFLAGS"][i + 1] = custom_ld_script
-
 # Custom HEX from ELF
 env.AddPostAction(
 	join("$BUILD_DIR","${PROGNAME}.elf"),

buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py

@@ -1,36 +1,22 @@
 #
-# STM32F103VE_longer.py
+# buildroot/share/PlatformIO/scripts/STM32F103VE_longer.py
 # Customizations for env:STM32F103VE_longer
 #
-import os
-Import("env")
-
-# Relocate firmware from 0x08000000 to 0x08010000
-for define in env['CPPDEFINES']:
-    if define[0] == "VECT_TAB_ADDR":
-        env['CPPDEFINES'].remove(define)
-env['CPPDEFINES'].append(("VECT_TAB_ADDR", "0x08010000"))
-
-custom_ld_script = os.path.abspath("buildroot/share/PlatformIO/ldscripts/STM32F103VE_longer.ld")
-for i, flag in enumerate(env["LINKFLAGS"]):
-    if "-Wl,-T" in flag:
-        env["LINKFLAGS"][i] = "-Wl,-T" + custom_ld_script
-    elif flag == "-T":
-        env["LINKFLAGS"][i + 1] = custom_ld_script
+import os,marlin
 
 # Rename ${PROGNAME}.bin and save it as 'project.bin' (No encryption on the Longer3D)
 def encrypt(source, target, env):
     firmware = open(target[0].path, "rb")
-    marlin_alfa = open(target[0].dir.path +'/project.bin', "wb")
+    renamed = open(target[0].dir.path + '/project.bin', "wb")
     length = os.path.getsize(target[0].path)
     position = 0
     try:
         while position < length:
             byte = firmware.read(1)
-            marlin_alfa.write(byte)
+            renamed.write(byte)
             position += 1
     finally:
         firmware.close()
-        marlin_alfa.close()
+        renamed.close()
 
-env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt);
+marlin.add_post_action(encrypt);

buildroot/share/PlatformIO/scripts/STM32F1_create_variant.py

@@ -1,19 +1,10 @@
 #
 # STM32F1_create_variant.py
 #
-import os,shutil
+import os,shutil,marlin
 from SCons.Script import DefaultEnvironment
 from platformio import util
 
-def copytree(src, dst, symlinks=False, ignore=None):
-    for item in os.listdir(src):
-        s = os.path.join(src, item)
-        d = os.path.join(dst, item)
-        if os.path.isdir(s):
-            shutil.copytree(s, d, symlinks, ignore)
-        else:
-            shutil.copy2(s, d)
-
 env = DefaultEnvironment()
 platform = env.PioPlatform()
 board = env.BoardConfig()
@@ -36,4 +27,4 @@ def copytree(src, dst, symlinks=False, ignore=None):
 if not os.path.isdir(variant_dir):
     os.mkdir(variant_dir)
 
-copytree(source_dir, variant_dir)
+marlin.copytree(source_dir, variant_dir)