Add documentation on the cx16 CPU capabiilty that we require

doc/src/devdocs/sysimg.md

@@ -46,16 +46,16 @@ under the same instruction set architecture (ISA). Multiple versions of the same
 may be created with minimum dispatch point inserted into shared functions
 in order to take advantage of different ISA extensions or other microarchitecture features.
 The version that offers the best performance will be selected automatically at runtime
-based on available features.
+based on available CPU features.
 
 ### Specifying multiple system image targets
 
-Multi-microarch system image can be enabled by passing multiple targets
+A multi-microarchitecture system image can be enabled by passing multiple targets
 during system image compilation. This can be done either with the `JULIA_CPU_TARGET` make option
 or with the `-C` command line option when running the compilation command manually.
-Multiple targets are separated by `;` in the option.
+Multiple targets are separated by `;` in the option string.
 The syntax for each target is a CPU name followed by multiple features separated by `,`.
-All features supported by LLVM is supported and a feature can be disabled with a `-` prefix.
+All features supported by LLVM are supported and a feature can be disabled with a `-` prefix.
 (`+` prefix is also allowed and ignored to be consistent with LLVM syntax).
 Additionally, a few special features are supported to control the function cloning behavior.
 
@@ -76,7 +76,7 @@ Additionally, a few special features are supported to control the function cloni
     This behavior can be changed by specifying a different base with the `base(<n>)` option.
     The `n`th target (0-based) will be used as the base target instead of the default (`0`th) one.
     The base target has to be either `0` or another `clone_all` target.
-    Specifying a non default `clone_all` target as the base target will cause an error.
+    Specifying a non-`clone_all` target as the base target will cause an error.
 
 3. `opt_size`
 
@@ -88,6 +88,24 @@ Additionally, a few special features are supported to control the function cloni
     This cause the function for the targe to be optimize for size that might have
     a significant runtime performance impact. This corresponds to `-Oz` Clang option.
 
+As an example, at the time of this writing, the following string is used in the creation of
+the official `x86_64` Julia binaries downloadable from julialang.org:
+
+```
+generic;sandybridge,-xsaveopt,clone_all;haswell,-rdrnd,base(1)
+```
+
+This creates a system image with three separate targets; one for a generic `x86_64`
+processor, one with a `sandybridge` ISA (explicitly excluding `xsaveopt`) that explicitly
+clones all functions, and one targeting the `haswell` ISA, based off of the `sandybridge`
+sysimg version, and also excluding `rdrnd`.  When a Julia implementation loads the
+generated sysimg, it will check the host processor for matching CPU capability flags,
+enabling the highest ISA level possible.  Note that the base level (`generic`) requires
+the `cx16` instruction, which is disabled in some virtualization software and must be
+enabled for the `generic` target to be loaded.  Alternatively, a sysimg could be generated
+with the target `generic,-cx16` for greater compatibility, however note that this may cause
+performance and stability problems in some code.
+
 ### Implementation overview
 
 This is a brief overview of different part involved in the implementation.