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Changed from hardcoded to dinamic io inside memwrap.v related to iob-soc instance. #833
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`ifdef IOB_SOC_USE_EXTMEM | ||
wire [ AXI_ID_W-1:0] axi_awid; | ||
assign axi_awid_o = axi_awid; | ||
wire [ AXI_ADDR_W-1:0] axi_awaddr; |
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where are these wires used ?
In any case, they are not needed : there are snippets that use the _o and _i directly , no assignment needed .
Please ask the team.
Is this module only used for synthesis?
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This is a fix so the main can be used in other cores. Just like the iob_memwrap the instance iob_soc needs to use a. Vs for the io's to get the new io's, when the iob has alterations, for example in Iob_soc_tester. The wires are used because the .vs of the iob_soc generates io's for the axi that are like .axi_awid_o(axi_awid). Instead of changing the .Vs the solution found was to temporally use assings. So this is not a change related to synthesis.
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Not sure you understand: axi_m_m.vs already uses _i and _o , no need for wires. Talk to team
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IOB_SOC_USE_EXTMEM
wires are used to connect to axi_m_portmap
wires in iob_soc instance.
Current if_gen.py
does not support generating a portmap with sufixes for wires.
Removing the wires and connecting directly to iob_soc_mwrap.v
ports requires adding option to add sufix to connection_name
in portmaps:
# if_gen.py module
def m_portmap(port_prefix, wire_prefix, fout, bus_start=0, bus_size=1):
for i in range(len(table)):
if table[i]["master"] == 1:
port = port_prefix + table[i]["name"] + suffix(table[i]["signal"]) # NOTE: port gets suffix
connection_name = wire_prefix + table[i]["name"] # NOTE: no option to give sufix to connection_name for portmap
write_portmap(
port,
connection_name,
table[i]["width"],
bus_start,
bus_size,
table[i]["description"],
fout,
)
This is a special case of portmap .vs since it mixes internal and external connections, hence the fix |
When the IOB SoC was instantiated inside the MemWrap, its IO ports were hardcoded. This caused issues with other cores that required the IOB SoC ports to be dynamic. A modification was implemented to address this. This pull request contains the necessary changes.