removed memories and changed purposes of some submodules

[Vasco-Luz]

Removed memories and changed the purpose of cache and rams so the sources are copied to fpga/src and simulation/src.
changed the simulation and fpga makefile so this simulation/src/.v or fpga/src/.v are included. Changed something in iob_cache.py so now the .v that shold be delected now are in fpga and in simulation instead of hardware/src.

[Vasco-Luz]

back to the original iob_module.py

[P-Miranda]

I also found the problem with iob_cache setup as one of first submodules:
the problem is in iob_utils.py, change the original code:

                # Delete sources for this purpose
                os.remove(
                    os.path.join(
                        cls.build_dir, cls.cls.PURPOSE_DIRS[purpose], "iob_utils.vh" # cls.cls is wrong
                    )
                )

into this:

                os.remove(
                    os.path.join(
                        cls.build_dir, cls.PURPOSE_DIRS[purpose], "iob_utils.vh"  # THIS LINE
                    )
                )

[P-Miranda]

I understand why we have to do this:
the cache does not add memories for hardware purpose, only for simulation or fpga
therefore, setting up cache as submodule, does not add the memories
and we have to add the memories in the iob_soc submodule list as well

one option would be removing this from iob_module.py:

            # Don't setup submodules that have a purpose different than
            # "hardware" when this class is not the top module
            if not cls.is_top_module and setup_options["purpose"] != "hardware":
                continue

or create a new memory purpose to signal that the submodule should be setup even if is not top module, but otherwise are treated as simulation and fpga purposes

[jjts]

change iob_soc.py to not add cache if USE_EXTMEM=0

is there anything else to this?

[Vasco-Luz]

question havin to do with rams/roms, should they have their purpose fixed at fpga and simulation?

[jjts]

yes

[Vasco-Luz]

not understanding why git is flagging this as a change. the change was done 4 commits ago.

[P-Miranda]

instead of adding cache and then removing,
only add cache and cache memory submodujles if necessary:

if "USE_EXTMEM" in sys.argv:
    submodule_list += [
        iob_cache,
        # Modules required for CACHE
        (iob_ram_2p, {"purpose": "simulation"}),
        (iob_ram_2p, {"purpose": "fpga"}),
        (iob_ram_sp, {"purpose": "simulation"}),
        (iob_ram_sp, {"purpose": "fpga"}),
    ]

[Vasco-Luz]

change made

[jjts]

yes