add a slide with the run on FPGA output

document/presentation/presentation.tex

@@ -168,7 +168,7 @@
 \begin{tiny}
   \begin{lstlisting}
 
-IOb-Bootloader: connected!
+TESTBENCH: connecting..IOb-Bootloader: connected!
 IOb-Bootloader: Restart CPU to run user program...
 
 Hello world!
@@ -177,6 +177,8 @@
 
 Execution time: 44us @100MHz
 
+TESTBENCH: exiting
+
   \end{lstlisting}
 \end{tiny}
 \end{frame}
@@ -197,6 +199,41 @@
 \end{itemize}
 \end{frame}
 
+
+\begin{frame}[fragile]{Run IOb-SoC}
+\begin{itemize}
+\item When run IOb-SoC on an FPGA with the default settings and the firmware
+  pre-initialised in the memory, the following should be printed:
+\end{itemize}
+
+\begin{tiny}
+  \begin{lstlisting}
+
++-----------------------------------------------+
+|                   IOb-Console                 |
++-----------------------------------------------+
+
+  BaudRate = 115200 
+  StopBits = 1 
+  Parity   = None
+
+IOb-Console: connecting...
+
+IOb-Bootloader: connected!
+IOb-Bootloader: Restart CPU to run user program...
+
+Hello world!
+
+Execution time: 114466 clock cycles
+
+Execution time: 1145us @100MHz
+
+IOb-Console: exiting...
+
+  \end{lstlisting}
+\end{tiny}
+\end{frame}
+
 \begin{frame}{Conclusion}  
   \begin{itemize}
   \item A tutorial on creating a simple SoC using IOb-SoC has been presented