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PatchBufferOp issues when lowering load ptr(7), ptr(7) #2878
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Test summary for commit 284edc5CTS tests (Failed: 0/138443)
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Test summary for commit ccac591CTS tests (Failed: 0/138378)
Ubuntu navi3x, SrdcvkUbuntu navi2x, Srdcvk |
I'll take a look, but how is it possible for you to end up with such code in the first place? What's the corresponding SPIR-V code that would cause you to load or store a buffer pointer in a buffer? |
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Okay, we need to understand better whether and why this is happening to support this. A couple of strategies:
One idea is to scan the entire code multiple times, with the BufferOpLowering visit of load
and store
happening during the second scan. But that is bad because the second scan is usually not required and it costs compile time.
Another idea is to teach the visitor infrastructure about potentially having to re-visit newly inserted instructions. Basically, TypeLowering::visitLoad would return some indication that the code which has just been created by it has to be visited again. This would mean that visitor functions can return some llvm_dialects::VisitResult
value.
// on postVisitLoad. But this maybe have impacts on other pass like CPS which doesn't have postVisitLoad | ||
if (load.getPointerAddressSpace() == 7) { | ||
return; | ||
} |
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We definitely need to find a way that avoids this special case.
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While the TypeLowering::visitLoad
is useful in general case. But it does not quite well with PatchBufferOp for such tricky case. Maybe we can just derive BufferOpLowering
from TypeLowering
, and only register BufferOpLowering::visitLoad
without TypeLowering::visitLoad
. Can we? The load of fat pointer from memory pointed by fat pointer would be handled solely by BufferOpLowering::postVisitLoad
which is just like the idea in the change.
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A more proper way might be to explicitly abort on such kind of complex case in TypeLowering::visitLoad
and leave it to other visitor to handle it.
--- a/compilerutils/lib/TypeLowering.cpp
+++ b/compilerutils/lib/TypeLowering.cpp
@@ -488,6 +488,13 @@ void TypeLowering::visitLoad(LoadInst &load) {
if (types.size() == 1 && types[0] == load.getType())
return;
+ auto *pointerType = load.getPointerOperand()->getType();
+ auto pointerTypes = convertType(pointerType);
+ // This is somewhat complex that we are lowering both the pointer and the loaded value, skip this to let other visitor
+ // handle it more properly.
+ if (pointerTypes[0] != pointerType)
+ return;
+
m_builder.SetInsertPoint(&load);
Type *loadType;
Besides revisiting newly inserted instructions, we also need a way to notify other visitors stop visiting the old instruction which was just being lowered. For this case, the |
Close this PR and new PR submitted which only added the assertion in #2881. Any case meet this pattern: "load ptr(7), ptr(7)", I will reopen this PR for fix. Thanks. |
##Issue Description
There are issue when lowering on load instruction which both result type and pointer operand type are fat buffer pointer.
An example IR:
Currently, as %10 and %11 which operand address space are 7, so they are all be added into postVisitLoad list.
The 1st issue is when call replaceLoadStore for %10, it will be lowered into i160 not <4xi32, i32> finally.
Then call replaceLoadStore for %11, it will be crashed when call m_typeLowering.getValue(pointerOperand).
The 2nd issue is TypeLowering.visitLoad will handle on %10 firstly, then BufferOp.postVisitLoad will handle on %10 again
as the pointer operand address space is 7(fat_buffer_pointer), then %10 will be added into m_instructionsToErase again, then it will be crashed when erase this load instruction.
##Issue Solution:
Now I have moved the instructions formatted "load ptr7, ptr7" from typeLowering.visitLoad into PatchBufferOp.postVisitLoad, but I'm not sure this will be correct for other parts such as CPS, which doesn't have postVisitLoad function to handle operand = ptr<7> cases.
Any better solution will be appreciated.