InstCountCI: Add support for TSO and LRCPC1/2

FEX-Emu · Dec 11, 2024 · 800d447 · 800d447
1 parent a86c922
commit 800d447
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Showing 2 changed files with 37 additions and 0 deletions.
diff --git a/Scripts/InstructionCountParser.py b/Scripts/InstructionCountParser.py
@@ -55,6 +55,9 @@ class HostFeatures(Flag) :
     FEATURE_CRYPTO = (1 << 10)
     FEATURE_AES256 = (1 << 11)
     FEATURE_SVEBITPERM = (1 << 12)
+    FEATURE_TSO    = (1 << 13)
+    FEATURE_LRCPC  = (1 << 14)
+    FEATURE_LRCPC2 = (1 << 15)
 
 HostFeaturesLookup = {
     "SVE128"  : HostFeatures.FEATURE_SVE128,
@@ -70,6 +73,9 @@ class HostFeatures(Flag) :
     "CRYPTO"  : HostFeatures.FEATURE_CRYPTO,
     "AES256"  : HostFeatures.FEATURE_AES256,
     "SVEBITPERM" : HostFeatures.FEATURE_SVEBITPERM,
+    "TSO" : HostFeatures.FEATURE_TSO,
+    "LRCPC" : HostFeatures.FEATURE_LRCPC,
+    "LRCPC2" : HostFeatures.FEATURE_LRCPC2,
 }
 
 def GetHostFeatures(data):

diff --git a/Source/Tools/CodeSizeValidation/Main.cpp b/Source/Tools/CodeSizeValidation/Main.cpp
@@ -506,6 +506,9 @@ int main(int argc, char** argv, char** const envp) {
     FEATURE_CRYPTO = (1U << 10),
     FEATURE_AES256 = (1U << 11),
     FEATURE_SVEBITPERM = (1U << 12),
+    FEATURE_TSO = (1U << 13),
+    FEATURE_LRCPC = (1U << 14),
+    FEATURE_LRCPC2 = (1U << 15),
   };
 
   uint64_t SVEWidth = 0;
@@ -547,6 +550,20 @@ int main(int argc, char** argv, char** const envp) {
   if (TestHeaderData->EnabledHostFeatures & FEATURE_SVEBITPERM) {
     HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLESVEBITPERM);
   }
+  if (TestHeaderData->EnabledHostFeatures & FEATURE_LRCPC) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLELRCPC);
+  }
+  if (TestHeaderData->EnabledHostFeatures & FEATURE_LRCPC2) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLELRCPC2);
+  }
+
+  if (TestHeaderData->EnabledHostFeatures & FEATURE_TSO) {
+    // Always disable auto migration.
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_TSOAUTOMIGRATION, "0");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_TSOENABLED, "1");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_VECTORTSOENABLED, "1");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_MEMCPYSETTSOENABLED, "1");
+  }
 
   // Always enable ARMv8.1 LSE atomics.
   HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEATOMICS);
@@ -584,6 +601,20 @@ int main(int argc, char** argv, char** const envp) {
   if (TestHeaderData->DisabledHostFeatures & FEATURE_SVEBITPERM) {
     HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLESVEBITPERM);
   }
+  if (TestHeaderData->DisabledHostFeatures & FEATURE_LRCPC) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLELRCPC);
+  }
+  if (TestHeaderData->DisabledHostFeatures & FEATURE_LRCPC2) {
+    HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLELRCPC2);
+  }
+
+  if (TestHeaderData->DisabledHostFeatures & FEATURE_TSO) {
+    // Always disable auto migration.
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_TSOAUTOMIGRATION, "0");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_TSOENABLED, "0");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_VECTORTSOENABLED, "0");
+    FEXCore::Config::EraseSet(FEXCore::Config::ConfigOption::CONFIG_MEMCPYSETTSOENABLED, "0");
+  }
 
   // Always enable preserve_all abi.
   HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEPRESERVEALLABI);