Paras Goyal 2018CSB1111
Ekansh Mahendru 2018CSB1087
Hansin Ahuja 2018CSB1094
Sakshay Mahna 2018CSB1119
Atul Tiwari 2018CSB1077
R-Type:
ins rd rs1 rs2
I-Type (Except jalr ):
ins rd rs1 immed
SB-Type:
ins rs1 rs2 label
S-Type:
ins rs1 immed(rs2)
U-Type:
ins rs1 immed
UJ-Type:
jal rd label
jalr:
jalr rd immed(rs1)
Note : jalr is different from I Type as we had followed the version similar to https://www.kvakil.me/venus
Note : We recommend cloning the source directly from https://github.com/Ekan5h/RISC-V-ISA-Simulator directly to set it up.
- Extract RISCVSim.tar.gz
- Run the install script
- Run the Risc-V simulator from the shortcut.
- Navigate to the directory containing the Makefile.
- Run the following command for executing the Phase 2 code (without Piplining): make p2 INP=path/to/the/file(without the asm extension)
- Run the following command for executing the Phase 3 Code (with Piplining): make p3 INP=path/to/file (without the asm extension)
Example:
make p2 INP=test
Example 2:
make p3 INP=bubble
Example 3:
make p3 INP=fib
As this was a team project so it is difficult to completely segregate out the work done by each us but the following would give some outline.
Sakshay - I Type
Atul - S Type
Hansin - SB Type
Paras - R UJ Type
Ekansh- U and GUI