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ARM: zynq: Add support for Arty Z7 board
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Board has eth, usb, mmc, qspi, uart and
512MB memory.

Signed-off-by: Michal Simek <[email protected]>
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michalsimek committed Aug 11, 2016
1 parent 457c44a commit 879a283
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -727,6 +727,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-afx-nand.dtb \
zynq-afx-nor.dtb \
zynq-artyz7.dtb \
zynq-cc108.dtb \
zynq-parallella.dtb \
zynq-zc702.dtb \
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72 changes: 72 additions & 0 deletions arch/arm/boot/dts/zynq-artyz7.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,72 @@
/*
* Digilent ARTY Z7 board DTS
*
* Copyright (C) 2016 Digilent
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "zynq-7000.dtsi"

/ {
model = "Zynq ARTY Z7 Development Board";
compatible = "digilent,zynq-artyz7", "xlnx,zynq-7000";

aliases {
ethernet0 = &gem0;
serial0 = &uart0;
spi0 = &qspi;
mmc0 = &sdhci0;
};

memory {
device_type = "memory";
reg = <0x0 0x20000000>;
};

chosen {
bootargs = "";
stdout-path = "serial0:115200n8";
};

usb_phy0: phy0 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
reset-gpios = <&gpio0 46 1>;
};
};

&clkc {
ps-clk-frequency = <50000000>;
};

&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;

ethernet_phy: ethernet-phy@0 { /* rtl8211e-vl */
reg = <1>;
};
};

&qspi {
u-boot,dm-pre-reloc;
status = "okay";
};

&sdhci0 {
u-boot,dm-pre-reloc;
status = "okay";
};

&uart0 {
u-boot,dm-pre-reloc;
status = "okay";
};

&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
};

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