Merge recent changes from master branch

DS-Homebrew · Dec 26, 2018 · 9de67f0 · 9de67f0
1 parent 04036bc
commit 9de67f0
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Showing 3 changed files with 16 additions and 5 deletions.
diff --git a/cardengine/arm9/Makefile b/cardengine/arm9/Makefile
@@ -23,7 +23,7 @@ DATA		:=	data
 #---------------------------------------------------------------------------------
 # options for code generation
 #---------------------------------------------------------------------------------
-ARCH	:=	-mthumb -mthumb-interwork -march=armv5te -mtune=arm946e-s
+ARCH	:=	-marm -mthumb-interwork -march=armv5te -mtune=arm946e-s
 
 CFLAGS	:=	-g -Wall -O2\
  			-march=armv5te -mtune=arm946e-s -fomit-frame-pointer\

diff --git a/cardengine/arm9/source/card_engine_header.s b/cardengine/arm9/source/card_engine_header.s
@@ -103,12 +103,12 @@ thumbPatches:
 @---------------------------------------------------------------------------------
 card_read_arm9:
 @---------------------------------------------------------------------------------
-	stmfd   sp!, {r4-r6,lr}
+	stmfd   sp!, {r4-r11,lr}
 
 	ldr		r6, =cardRead
 	bl		_blx_r3_stub_card_read
 
-	ldmfd   sp!, {r4-r6,lr}
+	ldmfd   sp!, {r4-r11,lr}
 	bx      lr
 _blx_r3_stub_card_read:
 	bx	r6

diff --git a/cardengine/arm9/source/cardengine.c b/cardengine/arm9/source/cardengine.c
@@ -426,6 +426,10 @@ static inline int cardReadNormal(vu32* volatile cardStruct, u32* cacheStruct, u8
 		}
 	//}
 
+	if(strncmp(getRomTid(ndsHeader), "CLJ", 3) == 0){
+		cacheFlush(); //workaround for some weird data-cache issue in Bowser's Inside Story.
+	}
+
 	return 0;
 }
 
@@ -468,15 +472,15 @@ static inline int cardReadRAM(vu32* volatile cardStruct, u32* cacheStruct, u8* d
 
 			sharedAddr[0] = page;
 			sharedAddr[1] = len2;
-			sharedAddr[2] = (((dsiMode || isSdk5(moduleParams)) ? dev_CACHE_ADRESS_START_SDK5 : romLocation)-0x4000-ndsHeader->arm9binarySize)+page;
+			sharedAddr[2] = ((dsiMode ? dev_CACHE_ADRESS_START_SDK5 : romLocation)-0x4000-ndsHeader->arm9binarySize)+page;
 			sharedAddr[3] = commandRead;
 
 			waitForArm7();
 			// -------------------------------------
 			#endif
 
 			// Read via the 512b ram cache
-			memcpy(cacheBuffer, (u8*)((((dsiMode || isSdk5(moduleParams)) ? dev_CACHE_ADRESS_START_SDK5 : romLocation) - 0x4000 - ndsHeader->arm9binarySize) + page), 512);
+			memcpy(cacheBuffer, (u8*)(((dsiMode ? dev_CACHE_ADRESS_START_SDK5 : romLocation) - 0x4000 - ndsHeader->arm9binarySize) + page), 512);
 			*cachePage = page;
 			(*readCachedRef)(cacheStruct);
 		}
@@ -491,6 +495,11 @@ static inline int cardReadRAM(vu32* volatile cardStruct, u32* cacheStruct, u8* d
 	return 0;
 }
 
+//Currently used for NSMBDS romhacks
+void __attribute__((target("arm"))) debug8mbMpuFix(){
+	asm("MOV R0,#0\n\tmcr p15, 0, r0, C6,C2,0");
+}
+
 int cardRead(u32* cacheStruct, u8* dst0, u32 src0, u32 len0) {
 	//nocashMessage("\narm9 cardRead\n");
 	if (!flagsSet) {
@@ -522,6 +531,8 @@ int cardRead(u32* cacheStruct, u8* dst0, u32 src0, u32 len0) {
 			cacheSlots = ((dsiMode || isSdk5(moduleParams)) ? dev_CACHE_SLOTS_SDK5 : dev_CACHE_SLOTS);
 		}*/
 
+		debug8mbMpuFix();
+
 		//ndsHeader->romSize += 0x1000;
 
 		if (enableExceptionHandler) {