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[WIP] Further K64F modifications, attempting to get USB working #306

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merged 4 commits into from
May 16, 2022
Merged

[WIP] Further K64F modifications, attempting to get USB working #306

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09d1e97
[WIP] Further K64F modifications, attempting to get USB working
fauxpark Nov 12, 2021
59c69af
Comment out switch to IRC48M for now, set USBDIV to /2 (assume 96MHz …
fauxpark Nov 19, 2021
c86935b
Modifications to run at 120MHz
fauxpark Nov 19, 2021
3d85866
No need for system_MK64F12.h
fauxpark Nov 19, 2021
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289 changes: 144 additions & 145 deletions os/common/ext/CMSIS/KINETIS/k64f.h
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60 changes: 30 additions & 30 deletions os/hal/boards/PJRC_TEENSY_3_5/board.h
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Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@
#define KINETIS_XTAL_FREQUENCY 16000000UL

/* Use internal capacitors for the crystal */
#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P|OSC_CR_SC2P
#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P|OSC_CR_SC2P|OSC_CR_ERCLKEN

/*
* MCU type
Expand All @@ -52,16 +52,16 @@
#define TEENSY_PIN40 28
#define TEENSY_PIN41 29

#define TEENSY_PIN25_IOPORT IOPORT1
#define TEENSY_PIN40_IOPORT IOPORT1
#define TEENSY_PIN41_IOPORT IOPORT1
#define TEENSY_PIN42_IOPORT IOPORT1
#define TEENSY_PIN3_IOPORT IOPORT1
#define TEENSY_PIN4_IOPORT IOPORT1
#define TEENSY_PIN25_IOPORT IOPORT1
#define TEENSY_PIN26_IOPORT IOPORT1
#define TEENSY_PIN27_IOPORT IOPORT1
#define TEENSY_PIN28_IOPORT IOPORT1
#define TEENSY_PIN39_IOPORT IOPORT1
#define TEENSY_PIN42_IOPORT IOPORT1
#define TEENSY_PIN40_IOPORT IOPORT1
#define TEENSY_PIN41_IOPORT IOPORT1

#define TEENSY_PIN16 0
#define TEENSY_PIN17 1
Expand All @@ -80,22 +80,22 @@
#define TEENSY_PIN44 22
#define TEENSY_PIN45 23

#define TEENSY_PIN16_IOPORT IOPORT2
#define TEENSY_PIN17_IOPORT IOPORT2
#define TEENSY_PIN19_IOPORT IOPORT2
#define TEENSY_PIN18_IOPORT IOPORT2
#define TEENSY_PIN49_IOPORT IOPORT2
#define TEENSY_PIN50_IOPORT IOPORT2
#define TEENSY_PIN31_IOPORT IOPORT2
#define TEENSY_PIN32_IOPORT IOPORT2
#define TEENSY_PIN43_IOPORT IOPORT2
#define TEENSY_PIN44_IOPORT IOPORT2
#define TEENSY_PIN45_IOPORT IOPORT2
#define TEENSY_PIN46_IOPORT IOPORT2
#define TEENSY_PIN0_IOPORT IOPORT2
#define TEENSY_PIN1_IOPORT IOPORT2
#define TEENSY_PIN29_IOPORT IOPORT2
#define TEENSY_PIN30_IOPORT IOPORT2
#define TEENSY_PIN43_IOPORT IOPORT2
#define TEENSY_PIN46_IOPORT IOPORT2
#define TEENSY_PIN44_IOPORT IOPORT2
#define TEENSY_PIN45_IOPORT IOPORT2
#define TEENSY_PIN31_IOPORT IOPORT2
#define TEENSY_PIN32_IOPORT IOPORT2
#define TEENSY_PIN16_IOPORT IOPORT2
#define TEENSY_PIN17_IOPORT IOPORT2
#define TEENSY_PIN19_IOPORT IOPORT2
#define TEENSY_PIN18_IOPORT IOPORT2

#define TEENSY_PIN15 0
#define TEENSY_PIN22 1
Expand All @@ -110,18 +110,18 @@
#define TEENSY_PIN37 10
#define TEENSY_PIN38 11

#define TEENSY_PIN15_IOPORT IOPORT3
#define TEENSY_PIN22_IOPORT IOPORT3
#define TEENSY_PIN23_IOPORT IOPORT3
#define TEENSY_PIN9_IOPORT IOPORT3
#define TEENSY_PIN10_IOPORT IOPORT3
#define TEENSY_PIN13_IOPORT IOPORT3
#define TEENSY_PIN11_IOPORT IOPORT3
#define TEENSY_PIN12_IOPORT IOPORT3
#define TEENSY_PIN35_IOPORT IOPORT3
#define TEENSY_PIN36_IOPORT IOPORT3
#define TEENSY_PIN37_IOPORT IOPORT3
#define TEENSY_PIN38_IOPORT IOPORT3
#define TEENSY_PIN13_IOPORT IOPORT3
#define TEENSY_PIN15_IOPORT IOPORT3
#define TEENSY_PIN22_IOPORT IOPORT3
#define TEENSY_PIN23_IOPORT IOPORT3

#define TEENSY_PIN2 0
#define TEENSY_PIN14 1
Expand All @@ -139,21 +139,21 @@
#define TEENSY_PIN51 14
#define TEENSY_PIN54 15

#define TEENSY_PIN51_IOPORT IOPORT4
#define TEENSY_PIN52_IOPORT IOPORT4
#define TEENSY_PIN53_IOPORT IOPORT4
#define TEENSY_PIN54_IOPORT IOPORT4
#define TEENSY_PIN55_IOPORT IOPORT4
#define TEENSY_PIN47_IOPORT IOPORT4
#define TEENSY_PIN48_IOPORT IOPORT4
#define TEENSY_PIN2_IOPORT IOPORT4
#define TEENSY_PIN14_IOPORT IOPORT4
#define TEENSY_PIN5_IOPORT IOPORT4
#define TEENSY_PIN6_IOPORT IOPORT4
#define TEENSY_PIN7_IOPORT IOPORT4
#define TEENSY_PIN8_IOPORT IOPORT4
#define TEENSY_PIN6_IOPORT IOPORT4
#define TEENSY_PIN14_IOPORT IOPORT4
#define TEENSY_PIN20_IOPORT IOPORT4
#define TEENSY_PIN21_IOPORT IOPORT4
#define TEENSY_PIN5_IOPORT IOPORT4
#define TEENSY_PIN47_IOPORT IOPORT4
#define TEENSY_PIN48_IOPORT IOPORT4
#define TEENSY_PIN55_IOPORT IOPORT4
#define TEENSY_PIN53_IOPORT IOPORT4
#define TEENSY_PIN52_IOPORT IOPORT4
#define TEENSY_PIN51_IOPORT IOPORT4
#define TEENSY_PIN54_IOPORT IOPORT4

#define TEENSY_PIN56 10
#define TEENSY_PIN57 11
Expand All @@ -163,9 +163,9 @@

#define TEENSY_PIN56_IOPORT IOPORT5
#define TEENSY_PIN57_IOPORT IOPORT5
#define TEENSY_PIN24_IOPORT IOPORT5
#define TEENSY_PIN33_IOPORT IOPORT5
#define TEENSY_PIN34_IOPORT IOPORT5
#define TEENSY_PIN24_IOPORT IOPORT5

#define LINE_PIN0 PAL_LINE(TEENSY_PIN0_IOPORT, TEENSY_PIN0)
#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1)
Expand Down
15 changes: 11 additions & 4 deletions os/hal/ports/KINETIS/K60x/hal_lld.c
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Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,11 @@ const uint8_t _cfm[0x10] = {
*/
void hal_lld_init(void) {

#if defined(K64F)
/* Disable the MPU by default */
SYSMPU->CESR &= ~SYSMPU_CESR_VLD;
#endif

}

/**
Expand Down Expand Up @@ -181,9 +186,9 @@ void k60x_clock_init(void) {
/*
* Now in FBE mode
*/
#define KINETIS_PLLIN_FREQUENCY 2000000UL
#define KINETIS_PLLIN_FREQUENCY 4000000UL
/*
* Config PLL input for 2 MHz
* Config PLL input for 4 MHz
* TODO: Make sure KINETIS_XTAL_FREQUENCY >= 2Mhz && <= 50Mhz
*/
MCG->C5 = MCG_C5_PRDIV0((KINETIS_XTAL_FREQUENCY/KINETIS_PLLIN_FREQUENCY) - 1);
Expand Down Expand Up @@ -215,8 +220,10 @@ void k60x_clock_init(void) {
SIM->CLKDIV1 = SIM_CLKDIV1_OUTDIV1(KINETIS_CLKDIV1_OUTDIV1-1) |
SIM_CLKDIV1_OUTDIV2(KINETIS_CLKDIV1_OUTDIV2-1) |
SIM_CLKDIV1_OUTDIV4(KINETIS_CLKDIV1_OUTDIV4-1);
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0);
SIM->SOPT2 = SIM_SOPT2_PLLFLLSEL_IRC48M; /* FIXME ? Why this? */
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC;

/* Configure peripherals to use MCGPLLCLK */
SIM->SOPT2 = SIM_SOPT2_PLLFLLSEL_MCGPLL;

/* Switch to PLL as clock source */
MCG->C1 = MCG_C1_CLKS(0);
Expand Down
20 changes: 20 additions & 0 deletions os/hal/ports/KINETIS/K60x/hal_lld.h
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Original file line number Diff line number Diff line change
Expand Up @@ -119,6 +119,21 @@
#endif
#endif

/**
* @brief Clock divider for FlexBus clock (OUTDIV3).
* @note The allowed range is 1..16
* @note The default value is calculated for a 48 MHz clock
* from a 96 MHz PLL output.
*/
#if !defined(KINETIS_CLKDIV1_OUTDIV3) || defined(__DOXYGEN__)
#if defined(KINETIS_FLEXBUSCLK_FREQUENCY) && KINETIS_FLEXBUSCLK_FREQUENCY > 0
#define KINETIS_CLKDIV1_OUTDIV3 (KINETIS_PLLCLK_FREQUENCY/KINETIS_FLEXBUSCLK_FREQUENCY)
#else
/* If no FlexBus frequency provided, use bus speed divider */
#define KINETIS_CLKDIV1_OUTDIV3 KINETIS_CLKDIV1_OUTDIV2
#endif
#endif

/**
* @brief Clock divider for flash clock (OUTDIV4).
* @note The allowed range is 1..16
Expand Down Expand Up @@ -228,6 +243,11 @@
#error KINETIS_CLKDIV1_OUTDIV2 must be 1 through 16
#endif

#if !(defined(KINETIS_CLKDIV1_OUTDIV3) && \
KINETIS_CLKDIV1_OUTDIV3 >= 1 && KINETIS_CLKDIV1_OUTDIV3 <= 16)
#error KINETIS_CLKDIV1_OUTDIV3 must be 1 through 16
#endif

#if !(defined(KINETIS_CLKDIV1_OUTDIV4) && \
KINETIS_CLKDIV1_OUTDIV4 >= 1 && KINETIS_CLKDIV1_OUTDIV4 <= 16)
#error KINETIS_CLKDIV1_OUTDIV4 must be 1 through 16
Expand Down
4 changes: 2 additions & 2 deletions os/hal/ports/KINETIS/K60x/platform.mk
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Original file line number Diff line number Diff line change
Expand Up @@ -19,11 +19,11 @@ endif

include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/GPIOv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/UARTv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PORTv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/PITv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/SDHCv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/I2Cv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/ADCv1/driver.mk
include ${CHIBIOS_CONTRIB}/os/hal/ports/KINETIS/LLD/USBHSv1/driver.mk

# Shared variables
Expand Down
8 changes: 7 additions & 1 deletion os/hal/ports/KINETIS/LLD/USBHSv1/hal_usb_lld.c
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Original file line number Diff line number Diff line change
Expand Up @@ -407,7 +407,7 @@ void usb_lld_init(void) {

#elif KINETIS_MCG_MODE == KINETIS_MCG_MODE_PEE

#if !defined(MK66F18)
#if !defined(MK66F18) && !defined(K64F)
/* Note: We don't need this for MK66F18, we can use IRC48M clock for USB */
#define KINETIS_USBCLK_FREQUENCY 48000000UL
uint32_t i,j;
Expand All @@ -427,6 +427,12 @@ void usb_lld_init(void) {
#error USB clock setting not implemented for this KINETIS_MCG_MODE
#endif /* KINETIS_MCG_MODE == ... */

#if defined(K64F)
/* Switch from default MCGPLLCLK to IRC48M for USB */
//SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0);
//SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_IRC48M;
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#endif

#if defined(MK66F18)
/* Switch from default MCGPLLCLK to IRC48M for USB */
SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(0);
Expand Down