several typos and fixes

ChibiOS · Nov 10, 2024 · fefa19e · fefa19e
1 parent fcacfd2
commit fefa19e
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Showing 5 changed files with 18 additions and 14 deletions.
diff --git a/.gitignore b/.gitignore
@@ -3,6 +3,8 @@
 *~
 .dep
 build
+*.vpj
+*.vpw
 *.vpwhistuxml
 *.vpwhistu
 *.vtg

diff --git a/os/hal/ports/SILABS/LLD/EFR32FG23/EUSARTv1/hal_sio_lld.c b/os/hal/ports/SILABS/LLD/EFR32FG23/EUSARTv1/hal_sio_lld.c
@@ -173,6 +173,8 @@ __STATIC_INLINE void _sio_lld_start_eusart(SIODriver* siop) {
 
   _sio_lld_reg_masked_write(&(usart->FRAMECFG), _EUSART_FRAMECFG_MASK, config->framecfg);
 
+  //_sio_lld_reg_masked_write(&(usart->CFG1), _EUSART_CFG1_MASK, EUSART_CFG1_TXFIW_SIXTEENFRAMES);
+
   /* Enable module before writing into CLKDIV register. */
   usart->EN_SET = EUSART_EN_EN;
 
@@ -780,10 +782,10 @@ bool _sio_lld_is_rx_empty(SIODriver* siop) {
 
   if (_sio_lld_is_usart(siop)) {
     USART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & USART_IF_RXDATAV) == 0U;
+    rv = (usart->STATUS & USART_STATUS_RXDATAV) == 0U;
   } else {
     EUSART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & EUSART_IF_RXFL) == 0U;
+    rv = (usart->STATUS & EUSART_STATUS_RXFL) == 0U;
   }
 
   return rv;
@@ -826,10 +828,10 @@ bool _sio_lld_is_tx_full(SIODriver* siop) {
 
   if (_sio_lld_is_usart(siop)) {
     USART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & USART_IF_TXBL) == 0U;
+    rv = (usart->STATUS & USART_STATUS_TXBL) == 0U;
   } else {
     EUSART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & EUSART_IF_TXFL) == 0U;
+    rv = (usart->STATUS & EUSART_STATUS_TXFL) == 0U;
   }
 
   return rv;
@@ -841,10 +843,10 @@ bool _sio_lld_is_tx_ongoing(SIODriver* siop) {
 
   if (_sio_lld_is_usart(siop)) {
     USART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & USART_IF_TXC) == 0U;
+    rv = (usart->STATUS & USART_STATUS_TXC) == 0U;
   } else {
     EUSART_TypeDef* usart = siop->usart;
-    rv = (usart->IF & EUSART_IF_TXC) == 0U;
+    rv = (usart->STATUS & EUSART_STATUS_TXC) == 0U;
   }
 
   return rv;

diff --git a/os/hal/ports/SILABS/LLD/EFR32FG23/EUSARTv1/hal_sio_lld.h b/os/hal/ports/SILABS/LLD/EFR32FG23/EUSARTv1/hal_sio_lld.h
@@ -45,9 +45,9 @@
 #define EFR32_SIO_LLD_USART_DATABITS_FIFTEEN   (12U << 0)
 #define EFR32_SIO_LLD_USART_DATABITS_SIXTEEN   (13U << 0)
 
-#define EFR32_SIO_LLD_USART_PARITY_NONE        (0U << 10)
-#define EFR32_SIO_LLD_USART_PARITY_EVEN        (2U << 10)
-#define EFR32_SIO_LLD_USART_PARITY_ODD         (3U << 10)
+#define EFR32_SIO_LLD_USART_PARITY_NONE        (0U << 8)
+#define EFR32_SIO_LLD_USART_PARITY_EVEN        (2U << 8)
+#define EFR32_SIO_LLD_USART_PARITY_ODD         (3U << 8)
 
 #define EFR32_SIO_LLD_USART_STOPBITS_HALF       (0U << 12)
 #define EFR32_SIO_LLD_USART_STOPBITS_ONE        (1U << 12)
@@ -77,9 +77,9 @@
 #define EFR32_SIO_LLD_EUSART_DATABITS_FIFTEEN  (9U << 0)
 #define EFR32_SIO_LLD_EUSART_DATABITS_SIXTEEN  (10U << 0)
 
-#define EFR32_SIO_LLD_EUSART_PARITY_NONE       (0U << 10)
-#define EFR32_SIO_LLD_EUSART_PARITY_EVEN       (2U << 10)
-#define EFR32_SIO_LLD_EUSART_PARITY_ODD        (3U << 10)
+#define EFR32_SIO_LLD_EUSART_PARITY_NONE       (0U << 8)
+#define EFR32_SIO_LLD_EUSART_PARITY_EVEN       (2U << 8)
+#define EFR32_SIO_LLD_EUSART_PARITY_ODD        (3U << 8)
 
 #define EFR32_SIO_LLD_EUSART_STOPBITS_HALF       (0U << 12)
 #define EFR32_SIO_LLD_EUSART_STOPBITS_ONE        (1U << 12)

diff --git a/testhal/SILABS/EFR32FG23x0xx/RAILLIB/Makefile b/testhal/SILABS/EFR32FG23x0xx/RAILLIB/Makefile
@@ -105,7 +105,6 @@ include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
 include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
 include $(CHIBIOS_CONTRIB)/os/hal/ports/SILABS/EFR32FG23/platform.mk
 include $(CHIBIOS_CONTRIB)/os/hal/boards/SILABS_EFR32FG23_DK2600A/board.mk
-include $(CHIBIOS_CONTRIB)/ext/xmlmbus/xmlmbus_chibios.mk
 include emlib/emlib.mk
 include raillib/raillib.mk
 # RTOS files (optional).

diff --git a/testhal/SILABS/EFR32FG23x0xx/UART-SIO-SLOW/cfg/mcuconf.h b/testhal/SILABS/EFR32FG23x0xx/UART-SIO-SLOW/cfg/mcuconf.h
@@ -15,7 +15,7 @@
 */
 
 /*
- * EFR32FG14P drivers configuration.
+ * EFR32FG23 drivers configuration.
  * The following settings override the default settings present in
  * the various device driver implementation headers.
  * Note that the settings for each driver only have effect if the whole
@@ -44,6 +44,7 @@
 #define EFR32_LFXO_ENABLED                  TRUE
 #define EFR32_LFRCO_ENABLED                 FALSE
 #define EFR32_ULFRCO_ENABLED                FALSE
+#define EFR32_HFRCO_ENABLED                 TRUE
 #define EFR32_FSRCO_ENABLED                 FALSE
 #define EFR32_HFRCODPLL_ENABLED             TRUE
 #define EFR32_HFRCOEM23_ENABLED             TRUE