Merge pull request #413 from qmk-arterytek/at32f415_patch

Another update for AT32F415

demos/AT32/RT-AT-START-F415/.cproject

@@ -37,7 +37,7 @@
 		</cconfiguration>
 	</storageModule>
 	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
-		<project id="RT-STM32F103-MAPLEMINI.null.1831709739" name="RT-STM32F103-MAPLEMINI"/>
+		<project id="RT-AT-START-F415.null.1831709739" name="RT-AT-START-F415"/>
 	</storageModule>
 	<storageModule moduleId="scannerConfiguration">
 		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
@@ -48,7 +48,7 @@
 	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
 	<storageModule moduleId="refreshScope" versionNumber="2">
 		<configuration configurationName="Default">
-			<resource resourceType="PROJECT" workspacePath="/RT-STM32F103-MAPLEMINI"/>
+			<resource resourceType="PROJECT" workspacePath="/RT-AT-START-F415"/>
 		</configuration>
 	</storageModule>
 	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>

demos/AT32/RT-AT-START-F415/Makefile

@@ -105,7 +105,7 @@ include $(CHIBIOS)/os/license/license.mk
 # Startup files.
 include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_at32f415.mk
 # HAL-OSAL files (optional).
-include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
 include $(CHIBIOS_CONTRIB)/os/hal/ports/AT32/AT32F415/platform.mk
 include $(CHIBIOS_CONTRIB)/os/hal/boards/AT_START_F415/board.mk
 include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk

demos/AT32/RT-AT-START-F415/cfg/config.h

@@ -1,5 +1,4 @@
 /*
-    ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
     ChibiOS - Copyright (C) 2023..2024 HorrorTroll
     ChibiOS - Copyright (C) 2023..2024 Zhaqian
 
@@ -16,6 +15,16 @@
     limitations under the License.
 */
 
+/*
+ * CRC driver system settings.
+ */
+#define AT32_CRC_USE_CRC1                   FALSE
+
+#define CRC_USE_DMA                         FALSE
+#define AT32_CRC_CRC1_DMA_PRIORITY          2
+#define AT32_CRC_CRC1_IRQ_PRIORITY          5
+#define AT32_CRC_CRC1_DMA_STREAM            AT32_DMA1_STREAM2
+
 /*
  * I2C fallback driver system settings.
  */

demos/AT32/RT-AT-START-F415/cfg/halconf.h

@@ -550,6 +550,8 @@
 #define WSPI_USE_MUTUAL_EXCLUSION           TRUE
 #endif
 
+#include "halconf_community.h"
+
 #endif /* HALCONF_H */
 
 /** @} */

demos/AT32/RT-AT-START-F415/cfg/halconf_community.h

@@ -0,0 +1,182 @@
+/*
+    ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
+    ChibiOS - Copyright (C) 2023..2024 HorrorTroll
+    ChibiOS - Copyright (C) 2023..2024 Zhaqian
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef HALCONF_COMMUNITY_H
+#define HALCONF_COMMUNITY_H
+
+/**
+ * @brief   Enables the community overlay.
+ */
+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
+#define HAL_USE_COMMUNITY           TRUE
+#endif
+
+/**
+ * @brief   Enables the FSMC subsystem.
+ */
+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC                FALSE
+#endif
+
+/**
+ * @brief   Enables the NAND subsystem.
+ */
+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
+#define HAL_USE_NAND                FALSE
+#endif
+
+/**
+ * @brief   Enables the 1-wire subsystem.
+ */
+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
+#define HAL_USE_ONEWIRE             FALSE
+#endif
+
+/**
+ * @brief   Enables the EICU subsystem.
+ */
+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
+#define HAL_USE_EICU                FALSE
+#endif
+
+/**
+ * @brief   Enables the CRC subsystem.
+ */
+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
+#define HAL_USE_CRC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RNG subsystem.
+ */
+#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
+#define HAL_USE_RNG                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EEPROM subsystem.
+ */
+#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)
+#define HAL_USE_EEPROM              FALSE
+#endif
+
+/**
+ * @brief   Enables the TIMCAP subsystem.
+ */
+#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)
+#define HAL_USE_TIMCAP              FALSE
+#endif
+
+/**
+ * @brief   Enables the COMP subsystem.
+ */
+#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)
+#define HAL_USE_COMP                FALSE
+#endif
+
+/**
+ * @brief   Enables the OPAMP subsystem.
+ */
+#if !defined(HAL_USE_OPAMP) || defined(__DOXYGEN__)
+#define HAL_USE_OPAMP               FALSE
+#endif
+
+/**
+ * @brief   Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI                 FALSE
+#endif
+
+/**
+ * @brief   Enables the USBH subsystem.
+ */
+#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)
+#define HAL_USE_USBH                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB_MSD subsystem.
+ */
+#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__)
+#define HAL_USE_USB_MSD             FALSE
+#endif
+
+/*===========================================================================*/
+/* FSMCNAND driver related settings.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define NAND_USE_MUTUAL_EXCLUSION   TRUE
+#endif
+
+/*===========================================================================*/
+/* 1-wire driver related settings.                                           */
+/*===========================================================================*/
+/**
+ * @brief   Enables strong pull up feature.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_STRONG_PULLUP   FALSE
+
+/**
+ * @brief   Enables search ROM feature.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_SEARCH_ROM      TRUE
+
+/*===========================================================================*/
+/* QEI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables discard of overlow
+ */
+#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__)
+#define QEI_USE_OVERFLOW_DISCARD    FALSE
+#endif
+
+/**
+ * @brief   Enables min max of overlow
+ */
+#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__)
+#define QEI_USE_OVERFLOW_MINMAX     FALSE
+#endif
+
+/*===========================================================================*/
+/* EEProm driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables 24xx series I2C eeprom device driver.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define EEPROM_USE_EE24XX FALSE
+ /**
+ * @brief   Enables 25xx series SPI eeprom device driver.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define EEPROM_USE_EE25XX FALSE
+
+#endif /* HALCONF_COMMUNITY_H */
+
+/** @} */

demos/AT32/RT-AT-START-F415/cfg/mcuconf.h

@@ -63,7 +63,7 @@
 #define AT32_USBDIV                         AT32_USBDIV_DIV3
 #define AT32_CLKOUT_SEL                     AT32_CLKOUT_SEL_NOCLOCK
 #define AT32_CLKOUTDIV                      AT32_CLKOUTDIV_DIV1
-#define AT32_ERTCSEL                        AT32_ERTCSEL_HEXTDIV
+#define AT32_ERTCSEL                        AT32_ERTCSEL_NOCLOCK
 #define AT32_PVM_ENABLE                     FALSE
 #define AT32_PVMSEL                         AT32_PVMSEL_LEV1
 
@@ -136,10 +136,10 @@
 #define AT32_I2C_USE_I2C1                   FALSE
 #define AT32_I2C_USE_I2C2                   FALSE
 #define AT32_I2C_BUSY_TIMEOUT               50
-#define AT32_I2C_I2C1_IRQ_PRIORITY          5
-#define AT32_I2C_I2C2_IRQ_PRIORITY          5
 #define AT32_I2C_I2C1_DMA_PRIORITY          3
 #define AT32_I2C_I2C2_DMA_PRIORITY          3
+#define AT32_I2C_I2C1_IRQ_PRIORITY          5
+#define AT32_I2C_I2C2_IRQ_PRIORITY          5
 #define AT32_I2C_DMA_ERROR_HOOK(i2cp)       osalSysHalt("DMA failure")
 
 /*
@@ -216,9 +216,13 @@
 #define AT32_UART_USE_USART1                FALSE
 #define AT32_UART_USE_USART2                FALSE
 #define AT32_UART_USE_USART3                FALSE
+#define AT32_UART_USE_UART4                 FALSE
+#define AT32_UART_USE_UART5                 FALSE
 #define AT32_UART_USART1_DMA_PRIORITY       0
 #define AT32_UART_USART2_DMA_PRIORITY       0
 #define AT32_UART_USART3_DMA_PRIORITY       0
+#define AT32_UART_UART4_DMA_PRIORITY        0
+#define AT32_UART_UART5_DMA_PRIORITY        0
 #define AT32_UART_DMA_ERROR_HOOK(uartp)     osalSysHalt("DMA failure")
 
 /*

demos/AT32/RT-AT-START-F415/main.c

@@ -31,17 +31,11 @@ static THD_FUNCTION(Thread1, arg) {
   (void)arg;
   chRegSetThreadName("blinker");
   while (true) {
-    palSetLine(LINE_LED_RED);
+    palToggleLine(LINE_LED_RED);
     chThdSleepMilliseconds(250);
-    palSetLine(LINE_LED_YELLOW);
+    palToggleLine(LINE_LED_YELLOW);
     chThdSleepMilliseconds(250);
-    palSetLine(LINE_LED_GREEN);
-    chThdSleepMilliseconds(250);
-    palClearLine(LINE_LED_RED);
-    chThdSleepMilliseconds(250);
-    palClearLine(LINE_LED_YELLOW);
-    chThdSleepMilliseconds(250);
-    palClearLine(LINE_LED_GREEN);
+    palToggleLine(LINE_LED_GREEN);
     chThdSleepMilliseconds(250);
   }
 }

os/hal/boards/AT_START_F415/board.c

@@ -79,7 +79,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
 
   if (blkIsTransferring(sdcp))
     return last_status;
-  return last_status = (bool)palReadPad(GPIOA, GPIOA_ARD_A2);
+  return last_status = (bool)palReadPad(GPIOC, GPIOC_PIN11);
 }
 
 /**

os/hal/boards/AT_START_F415/board.h

@@ -183,21 +183,21 @@
  *   6 - Open Drain output 2MHz.
  *   7 - Open Drain output 50MHz.
  *   8 - Digital input with Pull-Up or Pull-Down resistor depending on ODT.
- *   9 - Alternate Push Pull output 10MHz.
- *   A - Alternate Push Pull output 2MHz.
- *   B - Alternate Push Pull output 50MHz.
+ *   9 - Multiplexing Push Pull output 10MHz.
+ *   A - Multiplexing Push Pull output 2MHz.
+ *   B - Multiplexing Push Pull output 50MHz.
  *   C - Reserved.
- *   D - Alternate Open Drain output 10MHz.
- *   E - Alternate Open Drain output 2MHz.
- *   F - Alternate Open Drain output 50MHz.
+ *   D - Multiplexing Open Drain output 10MHz.
+ *   E - Multiplexing Open Drain output 2MHz.
+ *   F - Multiplexing Open Drain output 50MHz.
  * Please refer to the AT32 Reference Manual for details.
  */
 
 /*
  * Port A setup.
  * Everything input with pull-up except:
  * PA0  - Normal input              (GPIOA_BUTTON).
- * PA9  - Alternate output          (GPIOA_ARD_D8).
+ * PA9  - Multiplexing output       (GPIOA_ARD_D8).
  * PA10 - Normal input              (GPIOA_ARD_D2).
  */
 #define VAL_GPIOACFGLR          0x88888884      /*  PA7...PA0 */
@@ -217,19 +217,25 @@
  * PC2  - Push Pull output          (GPIOC_LED_RED).
  * PC3  - Push Pull output          (GPIOC_LED_YELLOW).
  * PC5  - Push Pull output          (GPIOC_LED_GREEN).
+ * PC8  - Multiplexing output       (GPIOC_PIN8).
+ * PC9  - Multiplexing output       (GPIOC_PIN9).
+ * PC10 - Multiplexing output       (GPIOC_PIN10).
+ * PC11 - Multiplexing output       (GPIOC_PIN11).
+ * PC12 - Multiplexing output       (GPIOC_PIN12).
  * PC13 - Normal input              (GPIOC_BUTTON).
  */
 #define VAL_GPIOCCFGLR          0x88383388      /*  PC7...PC0 */
-#define VAL_GPIOCCFGHR          0x88488888      /* PC15...PC8 */
+#define VAL_GPIOCCFGHR          0x884BBBBB      /* PC15...PC8 */
 #define VAL_GPIOCODT            0xFFFFFFFF
 
 /*
  * Port D setup.
  * Everything input with pull-up except:
  * PD0  - Normal input              (GPIOD_HEXT_IN).
  * PD1  - Normal input              (GPIOD_HEXT_OUT).
+ * PD2  - Multiplexing output       (GPIOD_PIN2).
  */
-#define VAL_GPIODCFGLR          0x88888844      /*  PD7...PD0 */
+#define VAL_GPIODCFGLR          0x88888B44      /*  PD7...PD0 */
 #define VAL_GPIODCFGHR          0x88888888      /* PD15...PD8 */
 #define VAL_GPIODODT            0xFFFFFFFF
 

os/hal/include/hal_crc.h

@@ -74,9 +74,7 @@ typedef enum {
 
 #if STM32_CRC_USE_CRC1 == TRUE
 #include "hal_crc_lld.h"
-#endif
-
-#if CRCSW_USE_CRC1 == TRUE
+#else
 #include "crcsw.h" /* Include software LL driver */
 #endif