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Rebase to TK2 via TK2 rather than CX #1718

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Dec 11, 2024
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2 changes: 1 addition & 1 deletion pytket/conanfile.py
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ def requirements(self):
self.requires("pybind11_json/0.2.15")
self.requires("symengine/0.13.0")
self.requires("tkassert/0.3.4@tket/stable")
self.requires("tket/1.3.55@tket/stable")
self.requires("tket/1.3.56@tket/stable")
self.requires("tklog/0.3.3@tket/stable")
self.requires("tkrng/0.3.3@tket/stable")
self.requires("tktokenswap/0.3.9@tket/stable")
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5 changes: 5 additions & 0 deletions pytket/docs/changelog.rst
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,11 @@ Changelog
1.37.0 (Unreleased)
-------------------

Features:

* Rebase to TK2 using fewer two-qubit gates, improving compilation results in
some scenarios.

Fixes:

* Fix circuit iteration giving invalid slices in some cases.
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2 changes: 1 addition & 1 deletion tket/conanfile.py
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@

class TketConan(ConanFile):
name = "tket"
version = "1.3.55"
version = "1.3.56"
package_type = "library"
license = "Apache 2"
homepage = "https://github.com/CQCL/tket"
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6 changes: 3 additions & 3 deletions tket/src/Transformations/Rebase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -266,9 +266,9 @@ Transform rebase_HQS() {
// Multiqs: TK2
// Singleqs: TK1
Transform rebase_TK() {
return rebase_factory(
{OpType::TK2, OpType::TK1}, CircPool::CX_using_TK2(),
CircPool::tk1_to_tk1);
return rebase_factory_via_tk2(
{OpType::TK2, OpType::TK1}, CircPool::tk1_to_tk1,
CircPool::TK2_using_TK2);
}

// Multiqs: XXPhase
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44 changes: 29 additions & 15 deletions tket/test/src/test_Synthesis.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2081,21 +2081,35 @@ static void check_conditions(PassPtr pp, const Circuit &c) {
}

SCENARIO("Synthesis with conditional gates") {
// https://github.com/CQCL/tket/issues/394
Circuit c(3);
c.add_c_register("c", 3);
c.add_op<unsigned>(OpType::H, {0});
c.add_op<unsigned>(OpType::CX, {0, 1});
c.add_measure(0, 0);
c.add_measure(1, 1);
c.add_conditional_gate<unsigned>(OpType::U1, {0.25}, {1}, {0}, 1);
c.add_conditional_gate<unsigned>(OpType::CnRy, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_conditional_gate<unsigned>(OpType::CnRx, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_conditional_gate<unsigned>(OpType::CnRz, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_measure(2, 2);
check_conditions(SynthesiseTK(), c);
check_conditions(SynthesiseTket(), c);
check_conditions(SynthesiseUMD(), c);
GIVEN("Circuit with conditional U1") {
// https://github.com/CQCL/tket/issues/394
Circuit c(3);
c.add_c_register("c", 3);
c.add_op<unsigned>(OpType::H, {0});
c.add_op<unsigned>(OpType::CX, {0, 1});
c.add_measure(0, 0);
c.add_measure(1, 1);
c.add_conditional_gate<unsigned>(OpType::U1, {0.25}, {1}, {0}, 1);
c.add_conditional_gate<unsigned>(
OpType::CnRy, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_conditional_gate<unsigned>(
OpType::CnRx, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_conditional_gate<unsigned>(
OpType::CnRz, {0.25}, {0, 1, 2}, {0, 1}, 0);
c.add_measure(2, 2);
check_conditions(SynthesiseTK(), c);
check_conditions(SynthesiseTket(), c);
check_conditions(SynthesiseUMD(), c);
}

GIVEN("SynthesiseTK with conditional 2-qubit gates") {
// https://github.com/CQCL/tket/issues/1708
Circuit c(2, 1);
c.add_conditional_gate<unsigned>(OpType::ZZPhase, {0.5}, {0, 1}, {0}, 1);
CompilationUnit cu(c);
SynthesiseTK()->apply(cu);
CHECK(cu.get_circ_ref().count_n_qubit_gates(2) == 1);
}
}

SCENARIO("Restricting ZZPhase gate angles.") {
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