refactor: couple of nicer reprs in ops

CQCL · Jun 28, 2024 · 98454df · 98454df
1 parent 772e89c
commit 98454df
Showing 1 changed file with 4 additions and 1 deletion.
diff --git a/hugr-py/src/hugr/ops.py b/hugr-py/src/hugr/ops.py
@@ -561,6 +561,9 @@ def port_kind(self, port: InPort | OutPort) -> tys.Kind:
             case _:
                 raise self._invalid_port(port)
 
+    def __repr__(self) -> str:
+        return "LoadConst" + (f"({self._typ})" if self._typ is not None else "")
+
 
 @dataclass()
 class Conditional(DataflowOp):
@@ -659,7 +662,7 @@ class TailLoop(DfParentOp, DataflowOp):
     #: Types that are appended to both inputs and outputs of the graph.
     rest: tys.TypeRow
     _just_outputs: tys.TypeRow | None = field(default=None, repr=False)
-    extension_delta: tys.ExtensionSet = field(default_factory=list)
+    extension_delta: tys.ExtensionSet = field(default_factory=list, repr=False)
 
     @property
     def just_outputs(self) -> tys.TypeRow: