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update headers
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BeaEngine committed Jun 24, 2019
1 parent 5f5d14a commit 28d9443
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Showing 14 changed files with 161 additions and 171 deletions.
6 changes: 3 additions & 3 deletions headers/BeaEngine.h
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,7 @@ typedef struct {
#pragma pack(1)
typedef struct {
Int32 Category;
Int32 Opcode;
Int32 Opcode;
char Mnemonic[24];
Int32 BranchType;
EFLStruct Flags;
Expand Down Expand Up @@ -118,7 +118,7 @@ typedef struct _Disasm {
ARGTYPE Argument3;
ARGTYPE Argument4;
PREFIXINFO Prefix;
UInt32 Reserved_[44];
UInt32 Reserved_[48];
} DISASM, *PDISASM, *LPDISASM;
#pragma pack()

Expand Down Expand Up @@ -159,7 +159,7 @@ enum INSTRUCTION_TYPE
AVX_INSTRUCTION = (int)0x100000000,
AVX2_INSTRUCTION = (int)0x200000000,
MPX_INSTRUCTION = (int)0x400000000,

AVX512_INSTRUCTION = (int)0x800000000,
DATA_TRANSFER = 0x1,
ARITHMETIC_INSTRUCTION,
LOGICAL_INSTRUCTION,
Expand Down
29 changes: 15 additions & 14 deletions headers/BeaEngineDelphi32.pas
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@
// it under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
//
// BeaEngine is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Expand Down Expand Up @@ -140,24 +140,24 @@ interface
Argument3 : TARGTYPE;
Argument4 : TARGTYPE;
Prefix : TPREFIXINFO;
Reserved_ : array[0..43] of longint;
Reserved_ : array[0..48] of longint;
end;
TDISASM = _Disasm;
PDISASM = ^_Disasm;
LPDISASM = ^_Disasm;

const
ESReg = 1;
DSReg = 2;
FSReg = 3;
GSReg = 4;
CSReg = 5;
SSReg = 6;
InvalidPrefix = 4;
SuperfluousPrefix = 2;
NotUsedPrefix = 0;
MandatoryPrefix = 8;
InUsePrefix = 1;
ESReg = 1;
DSReg = 2;
FSReg = 3;
GSReg = 4;
CSReg = 5;
SSReg = 6;
InvalidPrefix = 4;
SuperfluousPrefix = 2;
NotUsedPrefix = 0;
MandatoryPrefix = 8;
InUsePrefix = 1;


type
Expand All @@ -182,6 +182,7 @@ interface
AVX_INSTRUCTION =$100000000;
AVX2_INSTRUCTION =$200000000;
MPX_INSTRUCTION =$400000000;
AVX512_INSTRUCTION =$800000000;
DATA_TRANSFER = $1;
ARITHMETIC_INSTRUCTION = 2;
LOGICAL_INSTRUCTION = 3;
Expand Down Expand Up @@ -334,7 +335,7 @@ interface
function Disasm(var aDisAsm:TDISASM):longint;stdcall;
function BeaEngineVersion:longint;stdcall;
function BeaEngineRevision:longint;stdcall;

implementation
{$IFNDEF USEDLL}
{$L BeaEngineLib.obj}
Expand Down
31 changes: 15 additions & 16 deletions headers/BeaEngineDelphi64.pas
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@
// it under the terms of the GNU Lesser General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) any later version.
//
//
// BeaEngine is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Expand All @@ -38,7 +38,7 @@ interface
uses Windows,SysUtils;

const
INSTRUCT_LENGTH = 64;
INSTRUCT_LENGTH = 64;


type
Expand Down Expand Up @@ -139,24 +139,24 @@ interface
Argument3 : TARGTYPE;
Argument4 : TARGTYPE;
Prefix : TPREFIXINFO;
Reserved_ : array[0..43] of longint;
Reserved_ : array[0..48] of longint;
end;
TDISASM = _Disasm;
PDISASM = ^_Disasm;
LPDISASM = ^_Disasm;

const
ESReg = 1;
DSReg = 2;
FSReg = 3;
GSReg = 4;
CSReg = 5;
SSReg = 6;
InvalidPrefix = 4;
SuperfluousPrefix = 2;
NotUsedPrefix = 0;
MandatoryPrefix = 8;
InUsePrefix = 1;
ESReg = 1;
DSReg = 2;
FSReg = 3;
GSReg = 4;
CSReg = 5;
SSReg = 6;
InvalidPrefix = 4;
SuperfluousPrefix = 2;
NotUsedPrefix = 0;
MandatoryPrefix = 8;
InUsePrefix = 1;


type
Expand All @@ -181,7 +181,7 @@ interface
AVX_INSTRUCTION =$100000000;
AVX2_INSTRUCTION =$200000000;
MPX_INSTRUCTION =$400000000;

AVX512_INSTRUCTION =$800000000;
DATA_TRANSFER = $1;
ARITHMETIC_INSTRUCTION = 2;
LOGICAL_INSTRUCTION = 3;
Expand Down Expand Up @@ -380,4 +380,3 @@ function BeaEngineRevision:longint;stdcall;
{$ENDIF}

end.

23 changes: 11 additions & 12 deletions headers/BeaEngineFasm32.inc
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ struct MEMORYTYPE
BaseRegister dd 0
IndexRegister dd 0
Scale dd 0
Displacement dq 0
Displacement dq 0
ends


Expand Down Expand Up @@ -100,7 +100,7 @@ struct _Disasm
Argument3 ARGTYPE
Argument4 ARGTYPE
Prefix PREFIXINFO
Reserved_ dd 44 dup(0)
Reserved_ dd 48 dup(0)
ends

LowPosition equ 0
Expand All @@ -123,7 +123,7 @@ ends
MandatoryPrefix equ 8

; ********** EFLAGS states

TE_ equ 1 ; test
MO_ equ 2 ; modify
RE_ equ 4 ; reset
Expand Down Expand Up @@ -156,7 +156,7 @@ ends
AVX_INSTRUCTION equ 100000000h
AVX2_INSTRUCTION equ 200000000h
MPX_INSTRUCTION equ 400000000h

AVX512_INSTRUCTION equ 800000000h
DATA_TRANSFER equ 1
ARITHMETIC_INSTRUCTION equ 2
LOGICAL_INSTRUCTION equ 3
Expand All @@ -174,7 +174,7 @@ ends
LOGARITHMIC_INSTRUCTION equ 14
TRIGONOMETRIC_INSTRUCTION equ 15
UNSUPPORTED_INSTRUCTION equ 16

LOAD_CONSTANTS equ 17
FPUCONTROL equ 18
STATE_MANAGEMENT equ 19
Expand All @@ -186,21 +186,21 @@ ends
SIMD128bits equ 23
SIMD64bits equ 24
CACHEABILITY_CONTROL equ 25
FP_INTEGER_CONVERSION equ 26

FP_INTEGER_CONVERSION equ 26
SPECIALIZED_128bits equ 27
SIMD_FP_PACKED equ 28
SIMD_FP_HORIZONTAL equ 29
SIMD_FP_HORIZONTAL equ 29
AGENT_SYNCHRONISATION equ 30

PACKED_ALIGN_RIGHT equ 31
PACKED_ALIGN_RIGHT equ 31
PACKED_SIGN equ 32

; ****************************************** SSE4

PACKED_BLENDING_INSTRUCTION equ 33
PACKED_TEST equ 34

; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation
; COMPARISON -> Packed Comparison SIMD Integer Instruction
; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction
Expand Down Expand Up @@ -305,4 +305,3 @@ ends
PrefixedNumeral equ 10000h
SuffixedNumeral equ 0
ShowSegmentRegs equ 01000000h

22 changes: 11 additions & 11 deletions headers/BeaEngineFasm64.inc
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ struct MEMORYTYPE
BaseRegister dd 0
IndexRegister dd 0
Scale dd 0
Displacement dq 0
Displacement dq 0
ends


Expand Down Expand Up @@ -100,7 +100,7 @@ struct _Disasm
Argument3 ARGTYPE
Argument4 ARGTYPE
Prefix PREFIXINFO
Reserved_ dd 44 dup(0)
Reserved_ dd 48 dup(0)
ends

LowPosition equ 0
Expand All @@ -123,7 +123,7 @@ ends
MandatoryPrefix equ 8

; ********** EFLAGS states

TE_ equ 1 ; test
MO_ equ 2 ; modify
RE_ equ 4 ; reset
Expand Down Expand Up @@ -156,7 +156,7 @@ ends
AVX_INSTRUCTION equ 100000000h
AVX2_INSTRUCTION equ 200000000h
MPX_INSTRUCTION equ 400000000h

AVX512_INSTRUCTION equ 800000000h
DATA_TRANSFER equ 1
ARITHMETIC_INSTRUCTION equ 2
LOGICAL_INSTRUCTION equ 3
Expand All @@ -174,7 +174,7 @@ ends
LOGARITHMIC_INSTRUCTION equ 14
TRIGONOMETRIC_INSTRUCTION equ 15
UNSUPPORTED_INSTRUCTION equ 16

LOAD_CONSTANTS equ 17
FPUCONTROL equ 18
STATE_MANAGEMENT equ 19
Expand All @@ -186,21 +186,21 @@ ends
SIMD128bits equ 23
SIMD64bits equ 24
CACHEABILITY_CONTROL equ 25
FP_INTEGER_CONVERSION equ 26

FP_INTEGER_CONVERSION equ 26
SPECIALIZED_128bits equ 27
SIMD_FP_PACKED equ 28
SIMD_FP_HORIZONTAL equ 29
SIMD_FP_HORIZONTAL equ 29
AGENT_SYNCHRONISATION equ 30

PACKED_ALIGN_RIGHT equ 31
PACKED_ALIGN_RIGHT equ 31
PACKED_SIGN equ 32

; ****************************************** SSE4

PACKED_BLENDING_INSTRUCTION equ 33
PACKED_TEST equ 34

; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation
; COMPARISON -> Packed Comparison SIMD Integer Instruction
; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction
Expand Down
25 changes: 11 additions & 14 deletions headers/BeaEngineGoAsm32.inc
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ EFLStruct STRUCT
NT_ db 0 ;(bit 14)
RF_ db 0 ;(bit 16)
db 0 ; alignment
EFLStruct ENDS
EFLStruct ENDS

MEMORYTYPE STRUCT
BaseRegister dd 0
Expand Down Expand Up @@ -94,7 +94,7 @@ _Disasm STRUCT
Argument3 ARGTYPE <>
Argument4 ARGTYPE <>
Prefix PREFIXINFO <>
Reserved_ dd 44 dup 0
Reserved_ dd 48 dup 0
_Disasm ENDS


Expand All @@ -121,7 +121,7 @@ _Disasm ENDS
MandatoryPrefix equ 8

; ********** EFLAGS states

TE_ equ 1 ; test
MO_ equ 2 ; modify
RE_ equ 4 ; reset
Expand Down Expand Up @@ -154,7 +154,7 @@ _Disasm ENDS
AVX_INSTRUCTION equ 100000000h
AVX2_INSTRUCTION equ 200000000h
MPX_INSTRUCTION equ 400000000h

AVX512_INSTRUCTION equ 800000000h
DATA_TRANSFER equ 1
ARITHMETIC_INSTRUCTION equ 2
LOGICAL_INSTRUCTION equ 3
Expand All @@ -172,7 +172,7 @@ _Disasm ENDS
LOGARITHMIC_INSTRUCTION equ 14
TRIGONOMETRIC_INSTRUCTION equ 15
UNSUPPORTED_INSTRUCTION equ 16

LOAD_CONSTANTS equ 17
FPUCONTROL equ 18
STATE_MANAGEMENT equ 19
Expand All @@ -184,21 +184,21 @@ _Disasm ENDS
SIMD128bits equ 23
SIMD64bits equ 24
CACHEABILITY_CONTROL equ 25
FP_INTEGER_CONVERSION equ 26

FP_INTEGER_CONVERSION equ 26
SPECIALIZED_128bits equ 27
SIMD_FP_PACKED equ 28
SIMD_FP_HORIZONTAL equ 29
SIMD_FP_HORIZONTAL equ 29
AGENT_SYNCHRONISATION equ 30

PACKED_ALIGN_RIGHT equ 31
PACKED_ALIGN_RIGHT equ 31
PACKED_SIGN equ 32

; ****************************************** SSE4

PACKED_BLENDING_INSTRUCTION equ 33
PACKED_TEST equ 34

; CONVERSION_INSTRUCTION -> Packed Integer Format Conversions et Dword Packing With Unsigned Saturation
; COMPARISON -> Packed Comparison SIMD Integer Instruction
; ARITHMETIC_INSTRUCTION -> Dword Multiply Instruction
Expand Down Expand Up @@ -302,6 +302,3 @@ _Disasm ENDS
PrefixedNumeral equ 10000h
SuffixedNumeral equ 0
ShowSegmentRegs equ 01000000h


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