[top_earlgrey] Remove AST_MISC pad

This commit removes the AST_MISC pad from top_earlgrey. That pad will be replaced by a VSS supply pad. This partially addresses lowRISC#22990. Signed-off-by: Andreas Kurth <[email protected]>
AlexJones0 · Jul 8, 2024 · 9257a59 · 9257a59
1 parent d3583d4
commit 9257a59
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Showing 12 changed files with 8 additions and 66 deletions.
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -12921,17 +12921,7 @@
       {
         remove_ports: []
         remove_pads: []
-        add_pads:
-        [
-          {
-            name: AST_MISC
-            type: InputStd
-            bank: VCC
-            connection: manual
-            desc: Extra infrastructure pad for AST
-            port_type: inout
-          }
-        ]
+        add_pads: []
       }
       pinmux:
       {

diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -1414,9 +1414,7 @@
         // configuration above. However, the 'connection' key must always be set
         // to 'manual' as it is not possible to connect these additional pads
         // to the pinmux or peripherals.
-        add_pads: [
-          { name: 'AST_MISC', type: 'InputStd', bank: 'VCC', connection: 'manual', desc: 'Extra infrastructure pad for AST'}
-        ],
+        add_pads: [],
       },
 
       pinmux: {

diff --git a/hw/top_earlgrey/dv/cov/chip_top_unr_tied_off.el b/hw/top_earlgrey/dv/cov/chip_top_unr_tied_off.el
@@ -8,7 +8,3 @@
 // Date: Wed Nov  9 23:56:32 2022
 // ExclMode: default
 //==================================================
-CHECKSUM: "2197777849 3762499237"
-INSTANCE: tb.dut
-ANNOTATION: "[UNR] Tied off."
-Block 8 "4066577564" "manual_attr_ast_misc = '0;"
diff --git a/hw/top_earlgrey/dv/env/chip_if.sv b/hw/top_earlgrey/dv/env/chip_if.sv
@@ -95,10 +95,6 @@ interface chip_if;
   pins_if#(.Width(top_earlgrey_pkg::MioPadCount), .PullStrength("Weak")) mios_if(.pins(mios));
   pins_if#(.Width(top_earlgrey_pkg::DioPadCount), .PullStrength("Weak")) dios_if(.pins(dios));
 
-  // Functional (dedicated) interface (input): AST misc.
-  wire ast_misc;
-  pins_if #(.Width(1), .PullStrength("Weak")) ast_misc_if(.pins(ast_misc));
-
   // Weak pulls for DIOs.
   //
   // These weak pulls enable all DIOs to reflect a legal value. Active low signals are pulled up,
@@ -930,7 +926,6 @@ interface chip_if;
     flash_wp_l_if.disconnect();
     pwrb_in_if.disconnect();
     sysrst_ctrl_if.disconnect();
-    ast_misc_if.disconnect();
     dft_straps_if.disconnect();
     tap_straps_if.disconnect();
     sw_straps_if.disconnect();

diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_padctrl_attributes_vseq.sv
@@ -208,7 +208,6 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
       // all tests asserting a reset.
       begin : manual_dio_test
         // Make sure nothing drives these pins before testing the pull values.
-        cfg.chip_vif.ast_misc_if.disconnect();
         cfg.chip_vif.otp_ext_volt_if.disconnect();
         cfg.chip_vif.flash_test_mode_if.disconnect();
         cfg.chip_vif.flash_test_volt_if.disconnect();
@@ -600,12 +599,6 @@ class chip_padctrl_attributes_vseq extends chip_stub_cpu_base_vseq;
 
   task check_manual_dios_pull();
     string obs_strength;
-// TODO(#18988): this driving strength comparison fails on VCS. Re-enable
-// once this mismatch has been root-caused and fixed.
-`ifdef XCELIUM
-    obs_strength = $sformatf("%v", cfg.chip_vif.ast_misc_if.pins[0]);
-    `DV_CHECK_STREQ(obs_strength, "We0", "on AST_MISC")
-`endif
     obs_strength = $sformatf("%v", cfg.chip_vif.otp_ext_volt_if.pins[0]);
     `DV_CHECK_STREQ(obs_strength, "HiZ", "on OTP_EXT_VOLT")
     obs_strength = $sformatf("%v", cfg.chip_vif.flash_test_mode_if.pins[0]);

diff --git a/hw/top_earlgrey/dv/tb/tb.sv b/hw/top_earlgrey/dv/tb/tb.sv
@@ -139,7 +139,6 @@ module tb;
     .SPI_DEV_CS_L(dut.chip_if.dios[top_earlgrey_pkg::DioPadSpiDevCsL]),
     .IOR8(dut.chip_if.dios[top_earlgrey_pkg::DioPadIor8]),
     .IOR9(dut.chip_if.dios[top_earlgrey_pkg::DioPadIor9]),
-    .AST_MISC(dut.chip_if.ast_misc),
 
     // Muxed Pads
     .IOA0(dut.chip_if.mios[top_earlgrey_pkg::MioPadIoa0]),

diff --git a/hw/top_earlgrey/formal/conn_csvs/ast_infra.csv b/hw/top_earlgrey/formal/conn_csvs/ast_infra.csv
@@ -13,7 +13,7 @@
 CONNECTION, AST_PAD0,            u_ast,                      ast2pad_t0_ao,                                       , IOA2,
 CONNECTION, AST_PAD1,            u_ast,                      ast2pad_t1_ao,                                       , IOA3,
 CONNECTION, AST_PINMUX,          u_ast,                      ast2padmux_o,              top_earlgrey.u_sensor_ctrl_aon, ast2pinmux_i,
-CONNECTION, PAD_AST,                  ,                      "{AST_MISC, IOC3, IOC2, IOC1, IOB2, IOB1, IOB0, IOA5, IOA4}", u_ast, padmux2ast_i,
+CONNECTION, PAD_AST,                  ,                      "{IOC3, IOC2, IOC1, IOB2, IOB1, IOB0, IOA5, IOA4}", u_ast, padmux2ast_i,
 
 #################################
 # Other clocks

diff --git a/hw/top_earlgrey/ip/ast/rtl/ast_pkg.sv b/hw/top_earlgrey/ip/ast/rtl/ast_pkg.sv
@@ -10,8 +10,7 @@
 `define __AST_PKG_SV
 
 `define PAD2AST_WIRES     \
-{ manual_in_ast_misc,     \
-  mio_in_raw[MioPadIoc3], \
+{ mio_in_raw[MioPadIoc3], \
   mio_in_raw[MioPadIoc2], \
   mio_in_raw[MioPadIoc1], \
   mio_in_raw[MioPadIob2], \
@@ -45,7 +44,7 @@ parameter int unsigned AdcChannels      = 2;
 parameter int unsigned AdcDataWidth     = 10;
 parameter int unsigned UsbCalibWidth    = 20;
 parameter int unsigned Ast2PadOutWidth  = 9;
-parameter int unsigned Pad2AstInWidth   = 9;
+parameter int unsigned Pad2AstInWidth   = 8;
 //
 // AstRegsNum is the number of AST registers programmed during initialization. It includes
 // the register that marks the finalization of init, which asserts the ast_init_done_o.

diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md
@@ -78,7 +78,6 @@ util/topgen.py -t hw/top_earlgrey/data/top_earlgrey.hjson -o hw/top_earlgrey/
 |      <p style="font-size:smaller">IOR11</p>       |   <p style="font-size:smaller">BidirOd</p>    |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">muxed</p>     |         <p style="font-size:smaller">-</p>          | <p style="font-size:smaller">kTopEarlgreyPinmuxInselIor11 / kTopEarlgreyPinmuxMioOutIor11</p> |                <p style="font-size:smaller">Muxed IO pad</p>                |
 |      <p style="font-size:smaller">IOR12</p>       |   <p style="font-size:smaller">BidirOd</p>    |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">muxed</p>     |         <p style="font-size:smaller">-</p>          | <p style="font-size:smaller">kTopEarlgreyPinmuxInselIor12 / kTopEarlgreyPinmuxMioOutIor12</p> |                <p style="font-size:smaller">Muxed IO pad</p>                |
 |      <p style="font-size:smaller">IOR13</p>       |   <p style="font-size:smaller">BidirOd</p>    |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">muxed</p>     |         <p style="font-size:smaller">-</p>          | <p style="font-size:smaller">kTopEarlgreyPinmuxInselIor13 / kTopEarlgreyPinmuxMioOutIor13</p> |                <p style="font-size:smaller">Muxed IO pad</p>                |
-|     <p style="font-size:smaller">AST_MISC</p>     |   <p style="font-size:smaller">InputStd</p>   |  <p style="font-size:smaller">VCC</p>   |    <p style="font-size:smaller">manual</p>    |         <p style="font-size:smaller">-</p>          |                            <p style="font-size:smaller">- / -</p>                             |      <p style="font-size:smaller">Extra infrastructure pad for AST</p>      |
 ## Pinmux Connectivity
 
 |         <p style="font-size:smaller">Module / Signal</p>          |  <p style="font-size:smaller">Connection</p>  |      <p style="font-size:smaller">Pad</p>      |                 <p style="font-size:smaller">Pinmux Outsel Constant / Peripheral Input Index</p>                 |  <p style="font-size:smaller">Description</p>  |

diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/targets.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/targets.md
@@ -6,6 +6,6 @@ util/topgen.py -t hw/top_earlgrey/data/top_earlgrey.hjson -o hw/top_earlgrey/
 -->
 |  Target Name  |  #IO Banks  |  #Muxed Pads  |  #Direct Pads  |  #Manual Pads  |  #Total Pads  |      Pinout / Pinmux Tables       |
 |:-------------:|:-----------:|:-------------:|:--------------:|:--------------:|:-------------:|:---------------------------------:|
-|     ASIC      |      4      |      47       |       14       |       10       |      71       | [Pinout Table](./pinout_asic.md)  |
+|     ASIC      |      4      |      47       |       14       |       9        |      70       | [Pinout Table](./pinout_asic.md)  |
 |     CW310     |      4      |      47       |       14       |       14       |      75       | [Pinout Table](./pinout_cw310.md) |
 |     CW340     |      4      |      47       |       14       |       13       |      74       | [Pinout Table](./pinout_cw340.md) |
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -38,7 +38,6 @@ module chip_earlgrey_asic #(
   inout SPI_DEV_CS_L, // Dedicated Pad for spi_device_csb
   inout IOR8, // Dedicated Pad for sysrst_ctrl_aon_ec_rst_l
   inout IOR9, // Dedicated Pad for sysrst_ctrl_aon_flash_wp_l
-  inout AST_MISC, // Manual Pad
 
   // Muxed Pads
   inout IOA0, // MIO Pad 0
@@ -203,7 +202,7 @@ module chip_earlgrey_asic #(
   logic [pinmux_reg_pkg::NMioPads-1:0] mio_oe;
   logic [pinmux_reg_pkg::NMioPads-1:0] mio_in;
   logic [pinmux_reg_pkg::NMioPads-1:0] mio_in_raw;
-  logic [24-1:0]                       dio_in_raw;
+  logic [23-1:0]                       dio_in_raw;
   logic [pinmux_reg_pkg::NDioPads-1:0] dio_out;
   logic [pinmux_reg_pkg::NDioPads-1:0] dio_oe;
   logic [pinmux_reg_pkg::NDioPads-1:0] dio_in;
@@ -223,7 +222,6 @@ module chip_earlgrey_asic #(
   logic manual_in_flash_test_mode0, manual_out_flash_test_mode0, manual_oe_flash_test_mode0;
   logic manual_in_flash_test_mode1, manual_out_flash_test_mode1, manual_oe_flash_test_mode1;
   logic manual_in_otp_ext_volt, manual_out_otp_ext_volt, manual_oe_otp_ext_volt;
-  logic manual_in_ast_misc, manual_out_ast_misc, manual_oe_ast_misc;
 
   pad_attr_t manual_attr_por_n;
   pad_attr_t manual_attr_usb_p;
@@ -234,7 +232,6 @@ module chip_earlgrey_asic #(
   pad_attr_t manual_attr_flash_test_mode0;
   pad_attr_t manual_attr_flash_test_mode1;
   pad_attr_t manual_attr_otp_ext_volt;
-  pad_attr_t manual_attr_ast_misc;
 
 
   //////////////////////
@@ -250,12 +247,11 @@ module chip_earlgrey_asic #(
   padring #(
     // Padring specific counts may differ from pinmux config due
     // to custom, stubbed or added pads.
-    .NDioPads(24),
+    .NDioPads(23),
     .NMioPads(47),
     .PhysicalPads(1),
     .NIoBanks(int'(IoBankCount)),
     .DioScanRole ({
-      scan_role_pkg::DioPadAstMiscScanRole,
       scan_role_pkg::DioPadIor9ScanRole,
       scan_role_pkg::DioPadIor8ScanRole,
       scan_role_pkg::DioPadSpiDevCsLScanRole,
@@ -330,7 +326,6 @@ module chip_earlgrey_asic #(
       scan_role_pkg::MioPadIoa0ScanRole
     }),
     .DioPadBank ({
-      IoBankVcc, // AST_MISC
       IoBankVcc, // IOR9
       IoBankVcc, // IOR8
       IoBankVioa, // SPI_DEV_CS_L
@@ -405,7 +400,6 @@ module chip_earlgrey_asic #(
       IoBankVioa  // IOA0
     }),
     .DioPadType ({
-      InputStd, // AST_MISC
       BidirOd, // IOR9
       BidirOd, // IOR8
       InputStd, // SPI_DEV_CS_L
@@ -486,7 +480,6 @@ module chip_earlgrey_asic #(
     .dio_in_raw_o ( dio_in_raw ),
     // Chip IOs
     .dio_pad_io ({
-      AST_MISC,
       IOR9,
       IOR8,
       SPI_DEV_CS_L,
@@ -580,7 +573,6 @@ module chip_earlgrey_asic #(
 
     // Core-facing
     .dio_in_o ({
-        manual_in_ast_misc,
         dio_in[DioSysrstCtrlAonFlashWpL],
         dio_in[DioSysrstCtrlAonEcRstL],
         dio_in[DioSpiDeviceCsb],
@@ -606,7 +598,6 @@ module chip_earlgrey_asic #(
         manual_in_por_n
       }),
     .dio_out_i ({
-        manual_out_ast_misc,
         dio_out[DioSysrstCtrlAonFlashWpL],
         dio_out[DioSysrstCtrlAonEcRstL],
         dio_out[DioSpiDeviceCsb],
@@ -632,7 +623,6 @@ module chip_earlgrey_asic #(
         manual_out_por_n
       }),
     .dio_oe_i ({
-        manual_oe_ast_misc,
         dio_oe[DioSysrstCtrlAonFlashWpL],
         dio_oe[DioSysrstCtrlAonEcRstL],
         dio_oe[DioSpiDeviceCsb],
@@ -658,7 +648,6 @@ module chip_earlgrey_asic #(
         manual_oe_por_n
       }),
     .dio_attr_i ({
-        manual_attr_ast_misc,
         dio_attr[DioSysrstCtrlAonFlashWpL],
         dio_attr[DioSysrstCtrlAonEcRstL],
         dio_attr[DioSpiDeviceCsb],
@@ -1003,14 +992,6 @@ module chip_earlgrey_asic #(
   // Manual Pad / Signal Tie-offs //
   //////////////////////////////////
 
-  assign manual_out_ast_misc = 1'b0;
-  assign manual_oe_ast_misc = 1'b0;
-  always_comb begin
-    // constantly enable pull-down
-    manual_attr_ast_misc = '0;
-    manual_attr_ast_misc.pull_select = 1'b0;
-    manual_attr_ast_misc.pull_en = 1'b1;
-  end
   assign manual_out_por_n = 1'b0;
   assign manual_oe_por_n = 1'b0;
 

diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl
@@ -870,14 +870,6 @@ module chip_${top["name"]}_${target["name"]} #(
   // Manual Pad / Signal Tie-offs //
   //////////////////////////////////
 
-  assign manual_out_ast_misc = 1'b0;
-  assign manual_oe_ast_misc = 1'b0;
-  always_comb begin
-    // constantly enable pull-down
-    manual_attr_ast_misc = '0;
-    manual_attr_ast_misc.pull_select = 1'b0;
-    manual_attr_ast_misc.pull_en = 1'b1;
-  end
   assign manual_out_por_n = 1'b0;
   assign manual_oe_por_n = 1'b0;