Fix Timing Issues

.github/workflows/main.yml

@@ -76,12 +76,12 @@ jobs:
       fail-fast: false
       matrix:
         include:
-          - { count: "8", width: "8", variant: "DEFAULT" }
-          - { count: "8", width: "8", variant: "1RW1R" }
-          - { count: "8", width: "16", variant: "DEFAULT" }
-          - { count: "8", width: "16", variant: "1RW1R" }
-          - { count: "8", width: "32", variant: "DEFAULT" }
-          - { count: "8", width: "32", variant: "1RW1R" }
+          # - { count: "8", width: "8", variant: "DEFAULT" }
+          # - { count: "8", width: "8", variant: "1RW1R" }
+          # - { count: "8", width: "16", variant: "DEFAULT" }
+          # - { count: "8", width: "16", variant: "1RW1R" }
+          # - { count: "8", width: "32", variant: "DEFAULT" }
+          # - { count: "8", width: "32", variant: "1RW1R" }
           - { count: "32", width: "8", variant: "DEFAULT" }
           - { count: "32", width: "8", variant: "1RW1R" }
           - { count: "32", width: "16", variant: "DEFAULT" }

dffram.ipynb

@@ -317,7 +317,7 @@
  "metadata": {
   "colab": {
    "collapsed_sections": [],
-   "name": "Copy of DFFRAM_dockerless.ipynb",
+   "name": "dffram.ipynb",
    "provenance": []
   },
   "kernelspec": {

dffram.py

@@ -26,6 +26,7 @@
     exit(os.EX_CONFIG)
 
 import re
+import uuid
 import math
 import time
 import shutil
@@ -64,14 +65,21 @@ def ensure_dir(path):
     "commit"
 ]
 
+running_docker_ids = set()
+
 
 def run_docker(image, args):
+    global running_docker_ids
     global command_list
+    container_id = str(uuid.uuid4())
+    running_docker_ids.add(container_id)
     cmd = (
         [
             "docker",
             "run",
             "--rm",
+            "--name",
+            container_id,
             "-v",
             f"{pdk_root}:{pdk_root}",
             "-v",
@@ -92,6 +100,7 @@ def run_docker(image, args):
     )
     command_list.append(cmd)
     subprocess.check_call(cmd)
+    running_docker_ids.remove(container_id)
 
 
 openlane_scripts_path = "/openlane/scripts"
@@ -376,7 +385,7 @@ def verify_placement(design, synth_info, in_file):
 
 
 def openlane_harden(
-    design, clock_period, final_netlist, final_placement, products_path
+    design, clock_period, final_netlist, final_placement, products_path, synth_info
 ):
     print("--- Hardening With OpenLane ---")
     design_ol_dir = f"{build_folder}/openlane"
@@ -442,7 +451,9 @@ def openlane_harden(
 
             set ::env(LVS_CONNECT_BY_LABEL) "1"
 
-            set ::env(QUIT_ON_TIMING_VIOLATIONS) "0"
+            set ::env(SYNTH_DRIVING_CELL) "{synth_info["sta_driving_cell"]}"
+            set ::env(SYNTH_DRIVING_CELL_PIN) "{synth_info["sta_driving_cell_pin"]}"
+            set ::env(IO_PCT) "0.25"
             """
         )
 
@@ -742,7 +753,7 @@ def placement(in_width, in_height):
         (
             "openlane_harden",
             lambda: openlane_harden(
-                design, clock_period, netlist, final_placement, products
+                design, clock_period, netlist, final_placement, products, synth_info
             ),
         ),
     ]
@@ -757,7 +768,14 @@ def placement(in_width, in_height):
             execute_steps = True
         if execute_steps:
             if (only is None or name in only) and (name not in skip):
-                action()
+                try:
+                    action()
+                except KeyboardInterrupt as e:
+                    print("\n\nStopping on keyboard interrupt...")
+                    print("Killing docker containers...")
+                    for id in running_docker_ids:
+                        subprocess.call(["docker", "kill", id])
+                    raise e
         if to == name:
             execute_steps = False
 

get_pdk.py

@@ -56,7 +56,6 @@ def main():
         backup_path = pdk
         it = 0
         while os.path.exists(backup_path) and len(os.listdir(backup_path)) != 0:
-            print(it)
             it += 1
             backup_path = f"/usr/local/pdk/sky130A.bk{it}"
         print(f"PDK installation already found at {pdk}, moving to {backup_path}...")
@@ -80,7 +79,7 @@ def main():
     subprocess.check_call(["curl", "-L", "-o", download_path, url])
 
     print("Untarring...")
-    subprocess.check_call(["tar", "-xJvf", download_path, "-C", pdk, "."])
+    subprocess.check_call(["tar", "-xJvf", download_path, "-C", pdk])
 
 
 if __name__ == "__main__":

placeram/data.py

@@ -241,6 +241,7 @@ def __init__(self, instances: List[Instance]):
         self.sieve(
             instances,
             [
+                S(variable="root_clkbuf"),
                 S(variable="clkbufs", groups=["byte"]),
                 S(variable="ffs", groups=["byte", "bit"]),
                 S(variable="diodes", groups=["byte", "bit"]),
@@ -252,6 +253,7 @@ def __init__(self, instances: List[Instance]):
     def place(self, row_list: List[Row], start_row: int = 0):
         r = row_list[start_row]
 
+        r.place(self.root_clkbuf)
         for clkbuf, ffs, diodes in zip(self.clkbufs, self.ffs, self.diodes):
             r.place(clkbuf)
             for ff, diode in zip(ffs, diodes):
@@ -447,6 +449,8 @@ def process_raw_domuxes(instance, domux):
             raw_domuxes[domux] = raw_domuxes.get(domux) or []
             raw_domuxes[domux].append(instance)
 
+        self.clkbuf = None
+
         self.sieve(
             instances,
             [
@@ -461,7 +465,7 @@ def process_raw_domuxes(instance, domux):
                     custom_behavior=process_raw_domuxes,
                 ),
                 S(variable="clk_diode"),
-                S(variable="clkbufs", groups=["block"]),
+                S(variable="clkbuf"),
                 S(variable="di_diodes", groups=["bit"]),
                 S(variable="dibufs", groups=["bit"]),
                 S(variable="webufs", groups=["bit"]),
@@ -524,7 +528,7 @@ def place_horizontal_elements(start_row: int):
             start_row=current_row,
             addresses=len(self.domuxes),
             common=[
-                *([*self.clkbufs, self.clk_diode] if len(self.clkbufs) > 0 else []),
+                *([self.clkbuf, self.clk_diode] if self.clkbuf is not None else []),
                 *self.webufs,
             ],
             port_elements=["enbufs", "abufs", "a_diodes", "decoder_ands"],

placeram/rx.yml

@@ -35,6 +35,7 @@ Slice:
   words: "\\bWORD\\\\\\[(\\d+)\\\\\\]"
   decoders: "\\bDEC(\\d+)\\b"
 Outreg:
+  root_clkbuf: "\\bRoot_CLKBUF\\b"
   clkbufs: "\\bDo_CLKBUF\\\\\\[(\\d+)\\\\\\]"
   ffs: "\\bOUTREG_BYTE\\\\\\[(\\d+)\\\\\\]\\.Do_FF\\\\\\[(\\d+)\\\\\\]"
   diodes: "\\bOUTREG_BYTE\\\\\\[(\\d+)\\\\\\]\\.DIODE\\\\\\[(\\d+)\\\\\\]"
@@ -57,7 +58,7 @@ HigherLevelPlaceable:
   block128: "\\bBANK128\\\\\\[(\\d+)\\\\\\]"
   block512: "\\bBANK512\\\\\\[(\\d+)\\\\\\]"
   clk_diode: "\\bDIODE_CLK\\b"
-  clkbufs: "\\bCLKBUF\\\\\\[(\\d+)\\\\\\]"
+  clkbuf: "\\bCLKBUF\\b"
   enbufs: "\\bEN(\\d+)BUF\\b"
   decoder_ands: "\\bDEC(\\d+)\\.AND(\\d+)\\b"
   dibufs: "\\bDIBUF\\\\\\[(\\d+)\\\\\\]"

platforms/sky130A/sky130_fd_sc_hd/_building_blocks/ram/model.v

@@ -140,8 +140,10 @@ module OUTREG #(parameter WIDTH=32)
     localparam BYTE_CNT = WIDTH / 8;
 
     wire [BYTE_CNT-1:0] CLKBUF;
+    wire CLK_buf;
 
-    sky130_fd_sc_hd__clkbuf_4 Do_CLKBUF [BYTE_CNT-1:0] (.X(CLKBUF), .A(CLK) );
+    sky130_fd_sc_hd__clkbuf_4 Root_CLKBUF (.X(CLK_buf), .A(CLK));
+    sky130_fd_sc_hd__clkbuf_4 Do_CLKBUF [BYTE_CNT-1:0] (.X(CLKBUF), .A(CLK_buf) );
 
     generate
         genvar i;
@@ -396,7 +398,7 @@ module RAM32 #( parameter   USE_LATCH=1,
     (* keep = "true" *)
     sky130_fd_sc_hd__diode_2    DIODE_CLK         (.DIODE(CLK));
 `endif
-    sky130_fd_sc_hd__clkbuf_2   CLKBUF              (.X(CLK_buf), .A(CLK));
+    sky130_fd_sc_hd__clkbuf_4   CLKBUF              (.X(CLK_buf), .A(CLK));
 
     sky130_fd_sc_hd__clkbuf_2   WEBUF[(WSIZE-1):0]  (.X(WE0_buf), .A(WE0));
 
@@ -430,7 +432,7 @@ module RAM32 #( parameter   USE_LATCH=1,
         end
     endgenerate
 
-    OUTREG #(.WIDTH(WSIZE*8)) Do0_REG ( .CLK(CLK), .Di(Do0_pre), .Do(Do0) );
+    OUTREG #(.WIDTH(WSIZE*8)) Do0_REG ( .CLK(CLK_buf), .Di(Do0_pre), .Do(Do0) );
 
 endmodule
 
@@ -466,7 +468,7 @@ module RAM32_1RW1R #( parameter     USE_LATCH=1,
 `ifndef NO_DIODES
     sky130_fd_sc_hd__diode_2    DIODE_CLK         (.DIODE(CLK));
 `endif
-    sky130_fd_sc_hd__clkbuf_2   CLKBUF               (.X(CLK_buf),  .A(CLK));
+    sky130_fd_sc_hd__clkbuf_4   CLKBUF               (.X(CLK_buf),  .A(CLK));
 
 
     sky130_fd_sc_hd__clkbuf_2   WEBUF[(WSIZE-1):0]   (.X(WE0_buf), .A(WE0));
@@ -525,8 +527,8 @@ module RAM32_1RW1R #( parameter     USE_LATCH=1,
         end
     endgenerate
 
-    OUTREG #(.WIDTH(WSIZE*8)) Do0_REG ( .CLK(CLK), .Di(Do0_pre), .Do(Do0) );
-    OUTREG #(.WIDTH(WSIZE*8)) Do1_REG ( .CLK(CLK), .Di(Do1_pre), .Do(Do1) );
+    OUTREG #(.WIDTH(WSIZE*8)) Do0_REG ( .CLK(CLK_buf), .Di(Do0_pre), .Do(Do0) );
+    OUTREG #(.WIDTH(WSIZE*8)) Do1_REG ( .CLK(CLK_buf), .Di(Do1_pre), .Do(Do1) );
 
 endmodule
 
@@ -566,7 +568,7 @@ module RAM128 #(parameter   USE_LATCH=1,
     (* keep = "true" *)
     sky130_fd_sc_hd__diode_2    DIODE_CLK            (.DIODE(CLK));
 `endif
-    sky130_fd_sc_hd__clkbuf_4   CLKBUF[3:0]          (.X(CLK_buf), .A(CLK));
+    sky130_fd_sc_hd__clkbuf_4   CLKBUF          (.X(CLK_buf), .A(CLK));
 
     sky130_fd_sc_hd__clkbuf_2   WEBUF[WSIZE-1:0]     (.X(WE0_buf),  .A(WE0));
     sky130_fd_sc_hd__clkbuf_2   EN0BUF                (.X(EN0_buf),  .A(EN0));
@@ -583,7 +585,7 @@ module RAM128 #(parameter   USE_LATCH=1,
      generate
         genvar i;
         for (i=0; i< 4; i=i+1) begin : BLOCK
-            RAM32 #(.USE_LATCH(USE_LATCH), .WSIZE(WSIZE)) RAM32 (.CLK(CLK_buf[i]), .EN0(SEL0[i]), .WE0(WE0_buf), .Di0(Di0_buf), .Do0(Do0_pre[i]), .A0(A0_buf[4:0]) );        
+            RAM32 #(.USE_LATCH(USE_LATCH), .WSIZE(WSIZE)) RAM32 (.CLK(CLK_buf), .EN0(SEL0[i]), .WE0(WE0_buf), .Di0(Di0_buf), .Do0(Do0_pre[i]), .A0(A0_buf[4:0]) );        
         end
      endgenerate
 
@@ -631,7 +633,7 @@ module RAM128_1RW1R #( parameter    USE_LATCH=1,
     (* keep = "true" *)
     sky130_fd_sc_hd__diode_2    DIODE_CLK            (.DIODE(CLK));
 `endif
-    sky130_fd_sc_hd__clkbuf_4   CLKBUF[3:0]          (.X(CLK_buf), .A(CLK));
+    sky130_fd_sc_hd__clkbuf_4   CLKBUF         (.X(CLK_buf), .A(CLK));
 
     sky130_fd_sc_hd__clkbuf_2   WEBUF[WSIZE-1:0]     (.X(WE0_buf),  .A(WE0));
 
@@ -655,7 +657,7 @@ module RAM128_1RW1R #( parameter    USE_LATCH=1,
      generate
         genvar i;
         for (i=0; i< 4; i=i+1) begin : BLOCK
-            RAM32_1RW1R #(.USE_LATCH(USE_LATCH), .WSIZE(WSIZE)) RAM32 (.CLK(CLK_buf[i]), .EN0(SEL0[i]), .EN1(SEL1[i]), .WE0(WE0_buf), .Di0(Di0_buf), .Do0(Do0_pre[i]), .Do1(Do1_pre[i]), .A0(A0_buf[4:0]), .A1(A1_buf[4:0]) );        
+            RAM32_1RW1R #(.USE_LATCH(USE_LATCH), .WSIZE(WSIZE)) RAM32 (.CLK(CLK_buf), .EN0(SEL0[i]), .EN1(SEL1[i]), .WE0(WE0_buf), .Di0(Di0_buf), .Do0(Do0_pre[i]), .Do1(Do1_pre[i]), .A0(A0_buf[4:0]), .A1(A1_buf[4:0]) );        
         end
      endgenerate
 

tool_metadata.yml

@@ -1,9 +1,9 @@
 - name: openlane
   repo: https://github.com/The-OpenROAD-Project/OpenLane
-  commit: 2022.01.13_01.51.43
+  commit: 9602463a6dae6cfe4ad025251d91a8310b417bfd
 - name: open_pdks
   repo: https://github.com/rtimothyedwards/open_pdks
-  commit: 476f7428f7f686de51a5164c702629a9b9f2da46
+  commit: 7519dfb04400f224f140749cda44ee7de6f5e095
 - name: sky130
   repo: https://github.com/google/skywater-pdk
   commit: c094b6e83a4f9298e47f696ec5a7fd53535ec5eb