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STM32 RTC : bypass shadow registers #7365
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@jeromecoutant Needs rebase now. While rebasing, can you add extend the commit msg (which registers are shadow? Because some chips as I noticed do not have them as I read in the comment code - from changes not clear to me how is this actually addressing the issue |
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@marcemmers @bulislaw @c1728p9 @ashok-rao PR has been updated. Would y'all mind re-reviewing? |
// Change the RTC current date/time | ||
if (HAL_RTC_SetDate(&RtcHandle, &dateStruct, RTC_FORMAT_BIN) != HAL_OK) { | ||
error("HAL_RTC_SetDate error\n"); | ||
} | ||
if (HAL_RTC_SetTime(&RtcHandle, &timeStruct, RTC_FORMAT_BIN) != HAL_OK) { | ||
error("HAL_RTC_SetTime error\n"); | ||
} | ||
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#if DEVICE_LPTICKER && !MBED_CONF_TARGET_LPTICKER_LPTIM | ||
while (Read_SubSeconds != (RTC->SSR)) { |
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Is it possible that SSR increments and you get stuck in this loop?
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SSR sub seconds register is reset to PREDIV_S value every second.
This prescaler value is set only during init, so I would say we can't get stuck...
Looks like this'll need a rebase before it can continue :/ |
- RTC_SSR for the subseconds - RTC_TR for the time - RTC_DR for the date These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock). They are now accessed directly in order to avoid waiting for the synchronization duration.
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@cmonr Rebase is done |
/morph build |
Build : SUCCESSBuild number : 2571 Triggering tests/morph test |
Exporter Build : SUCCESSBuild number : 2215 |
Test : SUCCESSBuild number : 2325 |
STM32 RTC : bypass shadow registers
Description
RTC implementation has been reworked a little in order to gain reactivity and avoid some latency.
Major impact is LPTICKER feature.
Tests are OK on my side for each STM32 family and each tool chain.
@marcemmers @bulislaw @c1728p9 @ashok-rao
Pull request type