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STM32L4 update drivers version to CUBE V1.17.0 #14651

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4 changes: 2 additions & 2 deletions targets/TARGET_STM/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -64,15 +64,15 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
| F0 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF0 |
| F1 | 1.8.3 | https://github.com/STMicroelectronics/STM32CubeF1 |
| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
| F3 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF3 |
| F3 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF3 |
| F4 | 1.26.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
| F7 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
| G0 | 1.4.1 | https://github.com/STMicroelectronics/STM32CubeG0 |
| G4 | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeG4 |
| H7 | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeH7 |
| L0 | 1.11.3 | https://github.com/STMicroelectronics/STM32CubeL0 |
| L1 | 1.10.2 | https://github.com/STMicroelectronics/STM32CubeL1 |
| L4 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
| L4 | 1.17.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
| L5 | 1.3.0 | https://github.com/STMicroelectronics/STM32CubeL5 |
| WB | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeWB |
| WL | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeWL |
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Original file line number Diff line number Diff line change
Expand Up @@ -2259,7 +2259,6 @@ typedef struct
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
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Original file line number Diff line number Diff line change
Expand Up @@ -2294,7 +2294,6 @@ typedef struct
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
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Original file line number Diff line number Diff line change
Expand Up @@ -5728,7 +5728,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down Expand Up @@ -9276,15 +9275,13 @@ typedef struct

/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */

/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
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Original file line number Diff line number Diff line change
Expand Up @@ -5713,7 +5713,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down Expand Up @@ -8937,15 +8936,13 @@ typedef struct

/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */

/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5787,7 +5787,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down Expand Up @@ -9368,15 +9367,13 @@ typedef struct

/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */

/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5748,7 +5748,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down Expand Up @@ -9153,15 +9152,13 @@ typedef struct

/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */

/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5822,7 +5822,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down Expand Up @@ -9584,15 +9583,13 @@ typedef struct

/*!< HSITRIM configuration */
#define RCC_ICSCR_HSITRIM_Pos (24U)
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */

/******************** Bit definition for RCC_CFGR register ******************/
/*!< SW configuration */
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5778,7 +5778,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5820,7 +5820,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -5855,7 +5855,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6271,7 +6271,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6335,7 +6335,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1635,7 +1635,6 @@ typedef struct
#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE)
#define LTDC ((LTDC_TypeDef *)LTDC_BASE)
#define LTDC_Layer1 ((LTDC_Layer_TypeDef *)LTDC_Layer1_BASE)
#define LTDC_Layer2 ((LTDC_Layer_TypeDef *)LTDC_Layer2_BASE)
#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE)
#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE)
#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE)
Expand Down Expand Up @@ -6480,7 +6479,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1685,7 +1685,6 @@ typedef struct
#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE)
#define LTDC ((LTDC_TypeDef *)LTDC_BASE)
#define LTDC_Layer1 ((LTDC_Layer_TypeDef *)LTDC_Layer1_BASE)
#define LTDC_Layer2 ((LTDC_Layer_TypeDef *)LTDC_Layer2_BASE)
#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE)
#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE)
#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE)
Expand Down Expand Up @@ -6532,7 +6531,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6197,7 +6197,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6283,7 +6283,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6365,7 +6365,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6261,7 +6261,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -6347,7 +6347,6 @@ typedef struct
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */

/******************* Bit definition for CRS_CFGR register *********************/
#define CRS_CFGR_RELOAD_Pos (0U)
Expand Down
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