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Merge pull request #11303 from jeromecoutant/PR_H743ZI2_480
NUCLEO_H743ZI2 : increase system clock from 400 MHz to 480 MHz
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...cket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32H7/TARGET_NUCLEO_H743ZI2/stm32h7_eth_init.c
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| /* mbed Microcontroller Library | ||
| * Copyright (c) 2018, STMicroelectronics | ||
| * All rights reserved. | ||
| * | ||
| * Redistribution and use in source and binary forms, with or without | ||
| * modification, are permitted provided that the following conditions are met: | ||
| * | ||
| * 1. Redistributions of source code must retain the above copyright notice, | ||
| * this list of conditions and the following disclaimer. | ||
| * 2. Redistributions in binary form must reproduce the above copyright notice, | ||
| * this list of conditions and the following disclaimer in the documentation | ||
| * and/or other materials provided with the distribution. | ||
| * 3. Neither the name of STMicroelectronics nor the names of its contributors | ||
| * may be used to endorse or promote products derived from this software | ||
| * without specific prior written permission. | ||
| * | ||
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | ||
| * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
| * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | ||
| * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||
| * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | ||
| * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
| * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| */ | ||
|
|
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| #ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT | ||
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| #include "stm32h7xx_hal.h" | ||
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| #define MCO_Pin GPIO_PIN_0 | ||
| #define MCO_GPIO_Port GPIOH | ||
| #define RMII_MDC_Pin GPIO_PIN_1 | ||
| #define RMII_MDC_GPIO_Port GPIOC | ||
| #define RMII_REF_CLK_Pin GPIO_PIN_1 | ||
| #define RMII_REF_CLK_GPIO_Port GPIOA | ||
| #define RMII_MDIO_Pin GPIO_PIN_2 | ||
| #define RMII_MDIO_GPIO_Port GPIOA | ||
| #define RMII_CRS_DV_Pin GPIO_PIN_7 | ||
| #define RMII_CRS_DV_GPIO_Port GPIOA | ||
| #define RMII_RXD0_Pin GPIO_PIN_4 | ||
| #define RMII_RXD0_GPIO_Port GPIOC | ||
| #define RMII_RXD1_Pin GPIO_PIN_5 | ||
| #define RMII_RXD1_GPIO_Port GPIOC | ||
| #define RMII_TXD1_Pin GPIO_PIN_13 | ||
| #define RMII_TXD1_GPIO_Port GPIOB | ||
| #define TMS_Pin GPIO_PIN_13 | ||
| #define TMS_GPIO_Port GPIOA | ||
| #define TCK_Pin GPIO_PIN_14 | ||
| #define TCK_GPIO_Port GPIOA | ||
| #define RMII_TX_EN_Pin GPIO_PIN_11 | ||
| #define RMII_TX_EN_GPIO_Port GPIOG | ||
| #define RMII_TXD0_Pin GPIO_PIN_13 | ||
| #define RMII_TXD0_GPIO_Port GPIOG | ||
|
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||
| /** | ||
| * Override HAL Eth Init function | ||
| */ | ||
| void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) | ||
| { | ||
| GPIO_InitTypeDef GPIO_InitStruct; | ||
| if(heth->Instance == ETH) | ||
| { | ||
| /* Disable DCache for STM32H7 family */ | ||
| SCB_DisableDCache(); | ||
|
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||
| /* GPIO Ports Clock Enable */ | ||
| __HAL_RCC_GPIOH_CLK_ENABLE(); | ||
| __HAL_RCC_GPIOC_CLK_ENABLE(); | ||
| __HAL_RCC_GPIOA_CLK_ENABLE(); | ||
| __HAL_RCC_GPIOB_CLK_ENABLE(); | ||
| __HAL_RCC_GPIOG_CLK_ENABLE(); | ||
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| /* Enable Peripheral clock */ | ||
| __HAL_RCC_ETH1MAC_CLK_ENABLE(); | ||
| __HAL_RCC_ETH1TX_CLK_ENABLE(); | ||
| __HAL_RCC_ETH1RX_CLK_ENABLE(); | ||
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| /**ETH GPIO Configuration | ||
| PC1 ------> ETH_MDC | ||
| PA1 ------> ETH_REF_CLK | ||
| PA2 ------> ETH_MDIO | ||
| PA7 ------> ETH_CRS_DV | ||
| PC4 ------> ETH_RXD0 | ||
| PC5 ------> ETH_RXD1 | ||
| PB13 ------> ETH_TXD1 | ||
| PG11 ------> ETH_TX_EN | ||
| PG13 ------> ETH_TXD0 | ||
| */ | ||
| GPIO_InitStruct.Pin = RMII_MDC_Pin; | ||
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
| GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
| GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; | ||
| GPIO_InitStruct.Alternate = GPIO_AF11_ETH; | ||
| HAL_GPIO_Init(RMII_MDC_GPIO_Port, &GPIO_InitStruct); | ||
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| GPIO_InitStruct.Pin = RMII_REF_CLK_Pin|RMII_MDIO_Pin|RMII_CRS_DV_Pin; | ||
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
| GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
| GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | ||
| GPIO_InitStruct.Alternate = GPIO_AF11_ETH; | ||
| HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); | ||
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| GPIO_InitStruct.Pin = RMII_RXD0_Pin|RMII_RXD1_Pin; | ||
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
| GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
| GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | ||
| GPIO_InitStruct.Alternate = GPIO_AF11_ETH; | ||
| HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); | ||
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| GPIO_InitStruct.Pin = RMII_TXD1_Pin; | ||
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
| GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
| GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | ||
| GPIO_InitStruct.Alternate = GPIO_AF11_ETH; | ||
| HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct); | ||
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| GPIO_InitStruct.Pin = RMII_TX_EN_Pin|RMII_TXD0_Pin; | ||
| GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; | ||
| GPIO_InitStruct.Pull = GPIO_NOPULL; | ||
| GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; | ||
| GPIO_InitStruct.Alternate = GPIO_AF11_ETH; | ||
| HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); | ||
| } | ||
| } | ||
|
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| /** | ||
| * Override HAL Eth DeInit function | ||
| */ | ||
| void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth) | ||
| { | ||
| if(heth->Instance == ETH) | ||
| { | ||
| /* Disable Peripheral clock */ | ||
| __HAL_RCC_ETH1MAC_CLK_DISABLE(); | ||
| __HAL_RCC_ETH1TX_CLK_DISABLE(); | ||
| __HAL_RCC_ETH1RX_CLK_DISABLE(); | ||
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| /**ETH GPIO Configuration | ||
| PC1 ------> ETH_MDC | ||
| PA1 ------> ETH_REF_CLK | ||
| PA2 ------> ETH_MDIO | ||
| PA7 ------> ETH_CRS_DV | ||
| PC4 ------> ETH_RXD0 | ||
| PC5 ------> ETH_RXD1 | ||
| PB13 ------> ETH_TXD1 | ||
| PG11 ------> ETH_TX_EN | ||
| PG13 ------> ETH_TXD0 | ||
| */ | ||
| HAL_GPIO_DeInit(GPIOC, RMII_MDC_Pin|RMII_RXD0_Pin|RMII_RXD1_Pin); | ||
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| HAL_GPIO_DeInit(GPIOA, RMII_REF_CLK_Pin|RMII_MDIO_Pin|RMII_CRS_DV_Pin); | ||
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| HAL_GPIO_DeInit(RMII_TXD1_GPIO_Port, RMII_TXD1_Pin); | ||
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| HAL_GPIO_DeInit(GPIOG, RMII_TX_EN_Pin|RMII_TXD0_Pin); | ||
| } | ||
| } | ||
|
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| #endif /* USE_USER_DEFINED_HAL_ETH_MSPINIT */ |
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