diff --git a/drivers/gpio/gpio_sam.c b/drivers/gpio/gpio_sam.c index a779862b76ff81..035c531a1b19ee 100644 --- a/drivers/gpio/gpio_sam.c +++ b/drivers/gpio/gpio_sam.c @@ -329,142 +329,32 @@ int gpio_sam_init(struct device *dev) return 0; } -/* PORT A */ -#ifdef DT_GPIO_SAM_PORTA_BASE_ADDRESS -static void port_a_sam_config_func(struct device *dev); - -static const struct gpio_sam_config port_a_sam_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(0), - }, - .regs = (Pio *)DT_GPIO_SAM_PORTA_BASE_ADDRESS, - .periph_id = DT_GPIO_SAM_PORTA_PERIPHERAL_ID, - .config_func = port_a_sam_config_func, -}; - -static struct gpio_sam_runtime port_a_sam_runtime; - -DEVICE_AND_API_INIT(port_a_sam, DT_GPIO_SAM_PORTA_LABEL, gpio_sam_init, - &port_a_sam_runtime, &port_a_sam_config, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam_api); - -static void port_a_sam_config_func(struct device *dev) -{ - IRQ_CONNECT(DT_GPIO_SAM_PORTA_IRQ, DT_GPIO_SAM_PORTA_IRQ_PRIO, - gpio_sam_isr, DEVICE_GET(port_a_sam), 0); - irq_enable(DT_GPIO_SAM_PORTA_IRQ); -} - -#endif /* DT_GPIO_SAM_PORTA_BASE_ADDRESS */ - -/* PORT B */ -#ifdef DT_GPIO_SAM_PORTB_BASE_ADDRESS -static void port_b_sam_config_func(struct device *dev); - -static const struct gpio_sam_config port_b_sam_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(1), - }, - .regs = (Pio *)DT_GPIO_SAM_PORTB_BASE_ADDRESS, - .periph_id = DT_GPIO_SAM_PORTB_PERIPHERAL_ID, - .config_func = port_b_sam_config_func, -}; - -static struct gpio_sam_runtime port_b_sam_runtime; - -DEVICE_AND_API_INIT(port_b_sam, DT_GPIO_SAM_PORTB_LABEL, gpio_sam_init, - &port_b_sam_runtime, &port_b_sam_config, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam_api); - -static void port_b_sam_config_func(struct device *dev) -{ - IRQ_CONNECT(DT_GPIO_SAM_PORTB_IRQ, DT_GPIO_SAM_PORTB_IRQ_PRIO, - gpio_sam_isr, DEVICE_GET(port_b_sam), 0); - irq_enable(DT_GPIO_SAM_PORTB_IRQ); -} - -#endif /* DT_GPIO_SAM_PORTB_BASE_ADDRESS */ - -/* PORT C */ -#ifdef DT_GPIO_SAM_PORTC_BASE_ADDRESS -static void port_c_sam_config_func(struct device *dev); - -static const struct gpio_sam_config port_c_sam_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(2), - }, - .regs = (Pio *)DT_GPIO_SAM_PORTC_BASE_ADDRESS, - .periph_id = DT_GPIO_SAM_PORTC_PERIPHERAL_ID, - .config_func = port_c_sam_config_func, -}; - -static struct gpio_sam_runtime port_c_sam_runtime; - -DEVICE_AND_API_INIT(port_c_sam, DT_GPIO_SAM_PORTC_LABEL, gpio_sam_init, - &port_c_sam_runtime, &port_c_sam_config, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam_api); - -static void port_c_sam_config_func(struct device *dev) -{ - IRQ_CONNECT(DT_GPIO_SAM_PORTC_IRQ, DT_GPIO_SAM_PORTC_IRQ_PRIO, - gpio_sam_isr, DEVICE_GET(port_c_sam), 0); - irq_enable(DT_GPIO_SAM_PORTC_IRQ); -} - -#endif /* DT_GPIO_SAM_PORTC_BASE_ADDRESS */ - -/* PORT D */ -#ifdef DT_GPIO_SAM_PORTD_BASE_ADDRESS -static void port_d_sam_config_func(struct device *dev); - -static const struct gpio_sam_config port_d_sam_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(3), - }, - .regs = (Pio *)DT_GPIO_SAM_PORTD_BASE_ADDRESS, - .periph_id = DT_GPIO_SAM_PORTD_PERIPHERAL_ID, - .config_func = port_d_sam_config_func, -}; - -static struct gpio_sam_runtime port_d_sam_runtime; - -DEVICE_AND_API_INIT(port_d_sam, DT_GPIO_SAM_PORTD_LABEL, gpio_sam_init, - &port_d_sam_runtime, &port_d_sam_config, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam_api); - -static void port_d_sam_config_func(struct device *dev) -{ - IRQ_CONNECT(DT_GPIO_SAM_PORTD_IRQ, DT_GPIO_SAM_PORTD_IRQ_PRIO, - gpio_sam_isr, DEVICE_GET(port_d_sam), 0); - irq_enable(DT_GPIO_SAM_PORTD_IRQ); -} - -#endif /* DT_GPIO_SAM_PORTD_BASE_ADDRESS */ - -/* PORT E */ -#ifdef DT_GPIO_SAM_PORTE_BASE_ADDRESS -static void port_e_sam_config_func(struct device *dev); - -static const struct gpio_sam_config port_e_sam_config = { - .common = { - .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(4), - }, - .regs = (Pio *)DT_GPIO_SAM_PORTE_BASE_ADDRESS, - .periph_id = DT_GPIO_SAM_PORTE_PERIPHERAL_ID, - .config_func = port_e_sam_config_func, -}; - -static struct gpio_sam_runtime port_e_sam_runtime; - -DEVICE_AND_API_INIT(port_e_sam, DT_GPIO_SAM_PORTE_LABEL, gpio_sam_init, - &port_e_sam_runtime, &port_e_sam_config, POST_KERNEL, - CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &gpio_sam_api); - -static void port_e_sam_config_func(struct device *dev) -{ - IRQ_CONNECT(DT_GPIO_SAM_PORTE_IRQ, DT_GPIO_SAM_PORTE_IRQ_PRIO, - gpio_sam_isr, DEVICE_GET(port_e_sam), 0); - irq_enable(DT_GPIO_SAM_PORTE_IRQ); -} +#define GPIO_SAM_INIT(n) \ + static void port_##n##_sam_config_func(struct device *dev); \ + \ + static const struct gpio_sam_config port_##n##_sam_config = { \ + .common = { \ + .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n),\ + }, \ + .regs = (Pio *)DT_INST_REG_ADDR(n), \ + .periph_id = DT_INST_PROP(n, peripheral_id), \ + .config_func = port_##n##_sam_config_func, \ + }; \ + \ + static struct gpio_sam_runtime port_##n##_sam_runtime; \ + \ + DEVICE_AND_API_INIT(port_##n##_sam, DT_INST_LABEL(n), \ + gpio_sam_init, &port_##n##_sam_runtime, \ + &port_##n##_sam_config, POST_KERNEL, \ + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &gpio_sam_api); \ + \ + static void port_##n##_sam_config_func(struct device *dev) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \ + gpio_sam_isr, \ + DEVICE_GET(port_##n##_sam), 0); \ + irq_enable(DT_INST_IRQN(n)); \ + } -#endif /* DT_GPIO_SAM_PORTE_BASE_ADDRESS */ +DT_INST_FOREACH(GPIO_SAM_INIT) diff --git a/samples/drivers/lcd_hd44780/src/main.c b/samples/drivers/lcd_hd44780/src/main.c index 36c3d0cb629832..3670e1c24b88d7 100644 --- a/samples/drivers/lcd_hd44780/src/main.c +++ b/samples/drivers/lcd_hd44780/src/main.c @@ -72,7 +72,7 @@ #if defined(CONFIG_SOC_PART_NUMBER_SAM3X8E) -#define GPIO_DRV_NAME DT_GPIO_SAM_PORTC_LABEL +#define GPIO_DRV_NAME DT_LABEL(DT_NODELABEL(pioc)) #else #error "Unsupported GPIO driver" #endif diff --git a/soc/arm/atmel_sam/sam3x/dts_fixup.h b/soc/arm/atmel_sam/sam3x/dts_fixup.h index 1f057aecfac1ec..d7118c9061f49c 100644 --- a/soc/arm/atmel_sam/sam3x/dts_fixup.h +++ b/soc/arm/atmel_sam/sam3x/dts_fixup.h @@ -8,32 +8,6 @@ /* SoC level DTS fixup file */ -#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL -#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS -#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0 -#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL -#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS -#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0 -#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL -#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS -#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0 -#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL -#define DT_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS -#define DT_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0 -#define DT_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL -#define DT_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS -#define DT_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0 -#define DT_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID - #define DT_FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_BASE_ADDRESS #define DT_FLASH_DEV_NAME DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_LABEL diff --git a/soc/arm/atmel_sam/sam4e/dts_fixup.h b/soc/arm/atmel_sam/sam4e/dts_fixup.h index 3f037a57b4a9c3..4d6e369443e128 100644 --- a/soc/arm/atmel_sam/sam4e/dts_fixup.h +++ b/soc/arm/atmel_sam/sam4e/dts_fixup.h @@ -11,32 +11,6 @@ /* SoC level DTS fixup file */ -#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL -#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS -#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0 -#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL -#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS -#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0 -#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL -#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS -#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0 -#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL -#define DT_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS -#define DT_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0 -#define DT_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL -#define DT_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS -#define DT_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0 -#define DT_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID - #define DT_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40088000_BASE_ADDRESS #define DT_SPI_0_NAME DT_ATMEL_SAM_SPI_40088000_LABEL #define DT_SPI_0_IRQ DT_ATMEL_SAM_SPI_40088000_IRQ_0 diff --git a/soc/arm/atmel_sam/sam4s/dts_fixup.h b/soc/arm/atmel_sam/sam4s/dts_fixup.h index eb157fd9c301e9..5dfb6d0444ce17 100644 --- a/soc/arm/atmel_sam/sam4s/dts_fixup.h +++ b/soc/arm/atmel_sam/sam4s/dts_fixup.h @@ -12,22 +12,6 @@ /* SoC level DTS fixup file */ -#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL -#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS -#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0 -#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL -#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS -#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0 -#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL -#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS -#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0 -#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID - #define DT_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40008000_BASE_ADDRESS #define DT_SPI_0_NAME DT_ATMEL_SAM_SPI_40008000_LABEL #define DT_SPI_0_IRQ DT_ATMEL_SAM_SPI_40008000_IRQ_0 diff --git a/soc/arm/atmel_sam/same70/dts_fixup.h b/soc/arm/atmel_sam/same70/dts_fixup.h index 730c4684ccd77b..c27b58f27f2395 100644 --- a/soc/arm/atmel_sam/same70/dts_fixup.h +++ b/soc/arm/atmel_sam/same70/dts_fixup.h @@ -10,32 +10,6 @@ #define DT_CPU_CLOCK_FREQUENCY DT_ARM_CORTEX_M7_0_CLOCK_FREQUENCY -#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL -#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS -#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0 -#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL -#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS -#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0 -#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL -#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS -#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0 -#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL -#define DT_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS -#define DT_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0 -#define DT_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL -#define DT_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS -#define DT_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0 -#define DT_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID - #define DT_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40008000_BASE_ADDRESS #define DT_SPI_0_NAME DT_ATMEL_SAM_SPI_40008000_LABEL #define DT_SPI_0_IRQ DT_ATMEL_SAM_SPI_40008000_IRQ_0 diff --git a/soc/arm/atmel_sam/samv71/dts_fixup.h b/soc/arm/atmel_sam/samv71/dts_fixup.h index 527d63d815eb3e..0515f89bdc6720 100644 --- a/soc/arm/atmel_sam/samv71/dts_fixup.h +++ b/soc/arm/atmel_sam/samv71/dts_fixup.h @@ -14,32 +14,6 @@ #define DT_CPU_CLOCK_FREQUENCY DT_ARM_CORTEX_M7_0_CLOCK_FREQUENCY -#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL -#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS -#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0 -#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL -#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS -#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0 -#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL -#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS -#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0 -#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL -#define DT_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS -#define DT_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0 -#define DT_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID -#define DT_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL -#define DT_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS -#define DT_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0 -#define DT_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY -#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID - #define DT_SPI_0_BASE_ADDRESS DT_ATMEL_SAM_SPI_40008000_BASE_ADDRESS #define DT_SPI_0_NAME DT_ATMEL_SAM_SPI_40008000_LABEL #define DT_SPI_0_IRQ DT_ATMEL_SAM_SPI_40008000_IRQ_0