MANDELBROT_HW.map.rpt

Analysis & Synthesis report for MANDELBROT_HW
Sat Jul  6 13:27:01 2024
Quartus Prime Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Parallel Compilation
  5. Analysis & Synthesis Source Files Read
  6. Analysis & Synthesis Resource Usage Summary
  7. Analysis & Synthesis Resource Utilization by Entity
  8. Analysis & Synthesis RAM Summary
  9. Analysis & Synthesis DSP Block Usage Summary
 10. Analysis & Synthesis IP Cores Summary
 11. State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|state
 12. State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|state
 13. State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|state
 14. State Machine - |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|state
 15. State Machine - |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|mSetup_ST
 16. Registers Protected by Synthesis
 17. User-Specified and Inferred Latches
 18. Registers Removed During Synthesis
 19. Removed Registers Triggering Further Register Optimizations
 20. General Register Statistics
 21. Inverted Register Statistics
 22. Registers Packed Into Inferred Megafunctions
 23. Multiplexer Restructuring Statistics (Restructuring Performed)
 24. Source assignments for mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1
 25. Source assignments for mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1
 26. Source assignments for mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated
 27. Source assignments for mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated
 28. Parameter Settings for User Entity Instance: pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i
 29. Parameter Settings for User Entity Instance: I2C_HDMI_Config:u_I2C_HDMI_Config
 30. Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0
 31. Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb
 32. Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k
 33. Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k
 34. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0
 35. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys
 36. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real
 37. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_imag
 38. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core
 39. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst
 40. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_real_sq
 41. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_imag_sq
 42. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_two_real_imag
 43. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_real_sq
 44. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:sub_real_imag
 45. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_real_c
 46. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_imag_c
 47. Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0
 48. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i
 49. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator
 50. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator
 51. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator
 52. Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator
 53. Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller
 54. Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1
 55. Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1
 56. Parameter Settings for Inferred Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0
 57. Parameter Settings for Inferred Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0
 58. altsyncram Parameter Settings by Entity Instance
 59. Port Connectivity Checks: "mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1"
 60. Port Connectivity Checks: "mandebrot_plot:u0|altera_reset_controller:rst_controller"
 61. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator"
 62. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator"
 63. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator"
 64. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator"
 65. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i"
 66. Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0"
 67. Port Connectivity Checks: "mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0"
 68. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_imag_c"
 69. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_two_real_imag"
 70. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst"
 71. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core"
 72. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_imag"
 73. Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real"
 74. Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx"
 75. Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k"
 76. Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k"
 77. Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd"
 78. Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0"
 79. Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config"
 80. Port Connectivity Checks: "pll:my_pll"
 81. Post-Synthesis Netlist Statistics for Top Partition
 82. Elapsed Time Per Partition
 83. Analysis & Synthesis Messages
 84. Analysis & Synthesis Suppressed Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 2023  Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions 
and other software and tools, and any partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Intel Program License 
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors.  Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.



+----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                     ;
+---------------------------------+------------------------------------------------+
; Analysis & Synthesis Status     ; Successful - Sat Jul  6 13:27:01 2024          ;
; Quartus Prime Version           ; 23.1std.0 Build 991 11/28/2023 SC Lite Edition ;
; Revision Name                   ; MANDELBROT_HW                                  ;
; Top-level Entity Name           ; MANDELBROT_HW                                  ;
; Family                          ; Cyclone V                                      ;
; Logic utilization (in ALMs)     ; N/A                                            ;
; Total registers                 ; 546                                            ;
; Total pins                      ; 73                                             ;
; Total virtual pins              ; 0                                              ;
; Total block memory bits         ; 2,621,440                                      ;
; Total DSP Blocks                ; 3                                              ;
; Total HSSI RX PCSs              ; 0                                              ;
; Total HSSI PMA RX Deserializers ; 0                                              ;
; Total HSSI TX PCSs              ; 0                                              ;
; Total HSSI PMA TX Serializers   ; 0                                              ;
; Total PLLs                      ; 2                                              ;
; Total DLLs                      ; 0                                              ;
+---------------------------------+------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                             ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                          ; Setting            ; Default Value      ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                          ; 5CSEBA6U23I7       ;                    ;
; Top-level entity name                                                           ; MANDELBROT_HW      ; MANDELBROT_HW      ;
; Family name                                                                     ; Cyclone V          ; Cyclone V          ;
; Use smart compilation                                                           ; On                 ; Off                ;
; Maximum processors allowed for parallel compilation                             ; 1                  ;                    ;
; Enable parallel Assembler and Timing Analyzer during compilation                ; On                 ; On                 ;
; Enable compact report table                                                     ; Off                ; Off                ;
; Restructure Multiplexers                                                        ; Auto               ; Auto               ;
; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off                ; Off                ;
; Create Debugging Nodes for IP Cores                                             ; Off                ; Off                ;
; Preserve fewer node names                                                       ; On                 ; On                 ;
; Intel FPGA IP Evaluation Mode                                                   ; Enable             ; Enable             ;
; Verilog Version                                                                 ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                                    ; VHDL_1993          ; VHDL_1993          ;
; State Machine Processing                                                        ; Auto               ; Auto               ;
; Safe State Machine                                                              ; Off                ; Off                ;
; Extract Verilog State Machines                                                  ; On                 ; On                 ;
; Extract VHDL State Machines                                                     ; On                 ; On                 ;
; Ignore Verilog initial constructs                                               ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                                      ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                                  ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                                         ; On                 ; On                 ;
; Infer RAMs from Raw Logic                                                       ; On                 ; On                 ;
; Parallel Synthesis                                                              ; On                 ; On                 ;
; DSP Block Balancing                                                             ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                              ; On                 ; On                 ;
; Power-Up Don't Care                                                             ; On                 ; On                 ;
; Remove Redundant Logic Cells                                                    ; Off                ; Off                ;
; Remove Duplicate Registers                                                      ; On                 ; On                 ;
; Ignore CARRY Buffers                                                            ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                          ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                           ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                       ; Off                ; Off                ;
; Ignore LCELL Buffers                                                            ; Off                ; Off                ;
; Ignore SOFT Buffers                                                             ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                                  ; Off                ; Off                ;
; Optimization Technique                                                          ; Balanced           ; Balanced           ;
; Carry Chain Length                                                              ; 70                 ; 70                 ;
; Auto Carry Chains                                                               ; On                 ; On                 ;
; Auto Open-Drain Pins                                                            ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                                           ; Off                ; Off                ;
; Auto ROM Replacement                                                            ; On                 ; On                 ;
; Auto RAM Replacement                                                            ; On                 ; On                 ;
; Auto DSP Block Replacement                                                      ; On                 ; On                 ;
; Auto Shift Register Replacement                                                 ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                                 ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                                   ; On                 ; On                 ;
; Strict RAM Replacement                                                          ; Off                ; Off                ;
; Allow Synchronous Control Signals                                               ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                          ; Off                ; Off                ;
; Auto Resource Sharing                                                           ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                   ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing                             ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                               ; Off                ; Off                ;
; Timing-Driven Synthesis                                                         ; On                 ; On                 ;
; Report Parameter Settings                                                       ; On                 ; On                 ;
; Report Source Assignments                                                       ; On                 ; On                 ;
; Report Connectivity Checks                                                      ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                              ; Off                ; Off                ;
; Synchronization Register Chain Length                                           ; 3                  ; 3                  ;
; Power Optimization During Synthesis                                             ; Normal compilation ; Normal compilation ;
; HDL message level                                                               ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                 ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                        ; 5000               ; 5000               ;
; Number of Swept Nodes Reported in Synthesis Report                              ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                            ; On                 ; On                 ;
; Auto Gated Clock Conversion                                                     ; Off                ; Off                ;
; Block Design Naming                                                             ; Auto               ; Auto               ;
; SDC constraint protection                                                       ; Off                ; Off                ;
; Synthesis Effort                                                                ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal                    ; On                 ; On                 ;
; Pre-Mapping Resynthesis Optimization                                            ; Off                ; Off                ;
; Analysis & Synthesis Message Level                                              ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                                     ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                                          ; On                 ; On                 ;
; Automatic Parallel Synthesis                                                    ; On                 ; On                 ;
; Partial Reconfiguration Bitstream ID                                            ; Off                ; Off                ;
+---------------------------------------------------------------------------------+--------------------+--------------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 16     ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                                                                                              ;
+------------------------------------------------------------------------+-----------------+------------------------------+----------------------------------------------------------------------------------------------------------+----------------+
; File Name with User-Entered Path                                       ; Used in Netlist ; File Type                    ; File Name with Absolute Path                                                                             ; Library        ;
+------------------------------------------------------------------------+-----------------+------------------------------+----------------------------------------------------------------------------------------------------------+----------------+
; pll/pll.v                                                              ; yes             ; User Wizard-Generated File   ; D:/software/verilog/MANDELBROT_HW/pll/pll.v                                                              ; pll            ;
; pll/pll/pll_0002.v                                                     ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/pll/pll/pll_0002.v                                                     ; pll            ;
; mandebrot_plot/synthesis/mandebrot_plot.v                              ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v                              ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/altera_reset_controller.v          ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_controller.v          ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/altera_reset_synchronizer.v        ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_synchronizer.v        ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/altera_merlin_slave_translator.sv  ; yes             ; User SystemVerilog HDL File  ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_merlin_slave_translator.sv  ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/altera_merlin_master_translator.sv ; yes             ; User SystemVerilog HDL File  ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_merlin_master_translator.sv ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v             ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v             ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/altera_avalon_mm_bridge.v          ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_avalon_mm_bridge.v          ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mand_total_single_sys.v            ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mand_total_single_sys.v            ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v            ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v            ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandelbrot_core.v                  ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_core.v                  ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/mandelbrot_calc.v                  ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_calc.v                  ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/fxp_mult.v                         ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/fxp_mult.v                         ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/fxp_add.v                          ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/fxp_add.v                          ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/hdmi_display_sys.v                 ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v                 ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/dpram.v                            ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/dpram.v                            ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/framebuffer_dpram.v                ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v                ; mandebrot_plot ;
; mandebrot_plot/synthesis/submodules/hdmi_tx.v                          ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_tx.v                          ; mandebrot_plot ;
; I2C_WRITE_WDATA.v                                                      ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/I2C_WRITE_WDATA.v                                                      ;                ;
; I2C_HDMI_Config.v                                                      ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/I2C_HDMI_Config.v                                                      ;                ;
; I2C_Controller.v                                                       ; yes             ; User Verilog HDL File        ; D:/software/verilog/MANDELBROT_HW/I2C_Controller.v                                                       ;                ;
; mandelbrot_hw.v                                                        ; yes             ; Auto-Found Verilog HDL File  ; D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v                                                        ;                ;
; altera_pll.v                                                           ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altera_pll.v                          ;                ;
; altsyncram.tdf                                                         ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altsyncram.tdf                        ;                ;
; stratix_ram_block.inc                                                  ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/stratix_ram_block.inc                 ;                ;
; lpm_mux.inc                                                            ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/lpm_mux.inc                           ;                ;
; lpm_decode.inc                                                         ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/lpm_decode.inc                        ;                ;
; aglobal231.inc                                                         ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/aglobal231.inc                        ;                ;
; a_rdenreg.inc                                                          ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/a_rdenreg.inc                         ;                ;
; altrom.inc                                                             ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altrom.inc                            ;                ;
; altram.inc                                                             ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altram.inc                            ;                ;
; altdpram.inc                                                           ; yes             ; Megafunction                 ; e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altdpram.inc                          ;                ;
; db/altsyncram_gdn1.tdf                                                 ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/altsyncram_gdn1.tdf                                                 ;                ;
; db/decode_dla.tdf                                                      ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/decode_dla.tdf                                                      ;                ;
; db/mux_tfb.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/mux_tfb.tdf                                                         ;                ;
; db/altsyncram_8gn1.tdf                                                 ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/altsyncram_8gn1.tdf                                                 ;                ;
; db/decode_sma.tdf                                                      ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/decode_sma.tdf                                                      ;                ;
; db/mux_chb.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; D:/software/verilog/MANDELBROT_HW/db/mux_chb.tdf                                                         ;                ;
+------------------------------------------------------------------------+-----------------+------------------------------+----------------------------------------------------------------------------------------------------------+----------------+


+-----------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                                                                                       ;
+---------------------------------------------+-------------------------------------------------------------------------------------+
; Resource                                    ; Usage                                                                               ;
+---------------------------------------------+-------------------------------------------------------------------------------------+
; Estimate of Logic utilization (ALMs needed) ; 495                                                                                 ;
;                                             ;                                                                                     ;
; Combinational ALUT usage for logic          ; 755                                                                                 ;
;     -- 7 input functions                    ; 13                                                                                  ;
;     -- 6 input functions                    ; 172                                                                                 ;
;     -- 5 input functions                    ; 99                                                                                  ;
;     -- 4 input functions                    ; 110                                                                                 ;
;     -- <=3 input functions                  ; 361                                                                                 ;
;                                             ;                                                                                     ;
; Dedicated logic registers                   ; 546                                                                                 ;
;                                             ;                                                                                     ;
; I/O pins                                    ; 73                                                                                  ;
; Total MLAB memory bits                      ; 0                                                                                   ;
; Total block memory bits                     ; 2621440                                                                             ;
;                                             ;                                                                                     ;
; Total DSP Blocks                            ; 3                                                                                   ;
;                                             ;                                                                                     ;
; Total PLLs                                  ; 2                                                                                   ;
;     -- PLLs                                 ; 2                                                                                   ;
;                                             ;                                                                                     ;
; Maximum fan-out node                        ; mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i|outclk_wire[0] ;
; Maximum fan-out                             ; 693                                                                                 ;
; Total fan-out                               ; 14301                                                                               ;
; Average fan-out                             ; 7.97                                                                                ;
+---------------------------------------------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                   ;
+-------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+----------------+
; Compilation Hierarchy Node                            ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                     ; Entity Name               ; Library Name   ;
+-------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+----------------+
; |MANDELBROT_HW                                        ; 755 (33)            ; 546 (27)                  ; 2621440           ; 3          ; 73   ; 0            ; |MANDELBROT_HW                                                                                                                                                                          ; MANDELBROT_HW             ; work           ;
;    |I2C_HDMI_Config:u_I2C_HDMI_Config|                ; 102 (50)            ; 70 (42)                   ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config                                                                                                                                        ; I2C_HDMI_Config           ; work           ;
;       |I2C_Controller:u0|                             ; 52 (0)              ; 28 (0)                    ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0                                                                                                                      ; I2C_Controller            ; work           ;
;          |I2C_WRITE_WDATA:wrd|                        ; 52 (52)             ; 28 (28)                   ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd                                                                                                  ; I2C_WRITE_WDATA           ; work           ;
;    |mandebrot_plot:u0|                                ; 620 (0)             ; 449 (0)                   ; 2621440           ; 3          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0                                                                                                                                                        ; mandebrot_plot            ; mandebrot_plot ;
;       |altera_avalon_mm_bridge:mm_bridge_0|           ; 3 (3)               ; 60 (60)                   ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0                                                                                                                    ; altera_avalon_mm_bridge   ; mandebrot_plot ;
;       |altera_reset_controller:rst_controller|        ; 0 (0)               ; 3 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|altera_reset_controller:rst_controller                                                                                                                 ; altera_reset_controller   ; mandebrot_plot ;
;          |altera_reset_synchronizer:alt_rst_sync_uq1| ; 0 (0)               ; 3 (3)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1                                                                      ; altera_reset_synchronizer ; mandebrot_plot ;
;       |hdmi_display_sys:hdmi_driver_0|                ; 256 (4)             ; 155 (3)                   ; 2621440           ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0                                                                                                                         ; hdmi_display_sys          ; mandebrot_plot ;
;          |framebuffer_dpram:fb|                       ; 178 (35)            ; 75 (67)                   ; 2621440           ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb                                                                                                    ; framebuffer_dpram         ; mandebrot_plot ;
;             |dpram:mem_256k|                          ; 119 (0)             ; 5 (0)                     ; 2097152           ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k                                                                                     ; dpram                     ; mandebrot_plot ;
;                |altsyncram:ram_rtl_0|                 ; 119 (0)             ; 5 (0)                     ; 2097152           ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0                                                                ; altsyncram                ; work           ;
;                   |altsyncram_8gn1:auto_generated|    ; 119 (0)             ; 5 (5)                     ; 2097152           ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated                                 ; altsyncram_8gn1           ; work           ;
;                      |decode_sma:decode2|             ; 39 (39)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated|decode_sma:decode2              ; decode_sma                ; work           ;
;                      |mux_chb:mux3|                   ; 80 (80)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated|mux_chb:mux3                    ; mux_chb                   ; work           ;
;             |dpram:mem_64k|                           ; 24 (0)              ; 3 (0)                     ; 524288            ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k                                                                                      ; dpram                     ; mandebrot_plot ;
;                |altsyncram:ram_rtl_0|                 ; 24 (0)              ; 3 (0)                     ; 524288            ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0                                                                 ; altsyncram                ; work           ;
;                   |altsyncram_gdn1:auto_generated|    ; 24 (0)              ; 3 (3)                     ; 524288            ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated                                  ; altsyncram_gdn1           ; work           ;
;                      |decode_dla:decode2|             ; 8 (8)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated|decode_dla:decode2               ; decode_dla                ; work           ;
;                      |mux_tfb:mux3|                   ; 16 (16)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated|mux_tfb:mux3                     ; mux_tfb                   ; work           ;
;          |hdmi_tx:tx|                                 ; 74 (74)             ; 77 (77)                   ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx                                                                                                              ; hdmi_tx                   ; mandebrot_plot ;
;       |mand_total_sys:mand_total_single_sys_0|        ; 361 (3)             ; 231 (30)                  ; 0                 ; 3          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0                                                                                                                 ; mand_total_sys            ; mandebrot_plot ;
;          |mandelbrot_single_sys:mand_sys|             ; 358 (114)           ; 201 (108)                 ; 0                 ; 3          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys                                                                                  ; mandelbrot_single_sys     ; mandebrot_plot ;
;             |fxp_add:incre_imag|                      ; 25 (25)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_imag                                                               ; fxp_add                   ; mandebrot_plot ;
;             |fxp_add:incre_real|                      ; 27 (27)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real                                                               ; fxp_add                   ; mandebrot_plot ;
;             |mandelbrot_core:core|                    ; 192 (1)             ; 93 (29)                   ; 0                 ; 3          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core                                                             ; mandelbrot_core           ; mandebrot_plot ;
;                |mandelbrot_calc:mandelbrot_inst|      ; 191 (85)            ; 64 (64)                   ; 0                 ; 3          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst                             ; mandelbrot_calc           ; mandebrot_plot ;
;                   |fxp_add:add_imag_c|                ; 25 (25)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_imag_c          ; fxp_add                   ; mandebrot_plot ;
;                   |fxp_add:add_real_sq|               ; 27 (27)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_real_sq         ; fxp_add                   ; mandebrot_plot ;
;                   |fxp_add:sub_real_imag|             ; 54 (54)             ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:sub_real_imag       ; fxp_add                   ; mandebrot_plot ;
;                   |fxp_mult:mult_imag_sq|             ; 0 (0)               ; 0 (0)                     ; 0                 ; 1          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_imag_sq       ; fxp_mult                  ; mandebrot_plot ;
;                   |fxp_mult:mult_real_sq|             ; 0 (0)               ; 0 (0)                     ; 0                 ; 1          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_real_sq       ; fxp_mult                  ; mandebrot_plot ;
;                   |fxp_mult:mult_two_real_imag|       ; 0 (0)               ; 0 (0)                     ; 0                 ; 1          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_two_real_imag ; fxp_mult                  ; mandebrot_plot ;
;       |mandebrot_plot_pll_0:pll_0|                    ; 0 (0)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0                                                                                                                             ; mandebrot_plot_pll_0      ; mandebrot_plot ;
;          |altera_pll:altera_pll_i|                    ; 0 (0)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i                                                                                                     ; altera_pll                ; work           ;
;    |pll:my_pll|                                       ; 0 (0)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|pll:my_pll                                                                                                                                                               ; pll                       ; pll            ;
;       |pll_0002:pll_inst|                             ; 0 (0)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|pll:my_pll|pll_0002:pll_inst                                                                                                                                             ; pll_0002                  ; pll            ;
;          |altera_pll:altera_pll_i|                    ; 0 (0)               ; 0 (0)                     ; 0                 ; 0          ; 0    ; 0            ; |MANDELBROT_HW|pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i                                                                                                                     ; altera_pll                ; work           ;
+-------------------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+----------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                                                                                           ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+---------+------+
; Name                                                                                                                                                ; Type ; Mode             ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size    ; MIF  ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+---------+------+
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 262144       ; 8            ; 262144       ; 8            ; 2097152 ; None ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated|ALTSYNCRAM  ; AUTO ; Simple Dual Port ; 65536        ; 8            ; 65536        ; 8            ; 524288  ; None ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+---------+------+


+----------------------------------------------+
; Analysis & Synthesis DSP Block Usage Summary ;
+-------------------------------+--------------+
; Statistic                     ; Number Used  ;
+-------------------------------+--------------+
; Independent 27x27             ; 3            ;
; Total number of DSP blocks    ; 3            ;
;                               ;              ;
; Fixed Point Signed Multiplier ; 3            ;
+-------------------------------+--------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis IP Cores Summary                                                                                                                                                                                                                              ;
+--------+---------------------------------+---------+--------------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+
; Vendor ; IP Core Name                    ; Version ; Release Date ; License Type ; Entity Instance                                                                                                                                           ; IP Include File     ;
+--------+---------------------------------+---------+--------------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+
; Altera ; altera_pll                      ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|pll:my_pll                                                                                                                                 ; pll/pll.v           ;
; N/A    ; Qsys                            ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0                                                                                                                          ; mandebrot_plot.qsys ;
; Altera ; altera_avalon_mm_bridge         ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0                                                                                      ; mandebrot_plot.qsys ;
; Altera ; altera_mm_interconnect          ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0                                                                       ; mandebrot_plot.qsys ;
; Altera ; altera_merlin_slave_translator  ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator            ; mandebrot_plot.qsys ;
; Altera ; altera_merlin_master_translator ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator             ; mandebrot_plot.qsys ;
; Altera ; altera_mm_interconnect          ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1                                                                       ; mandebrot_plot.qsys ;
; Altera ; altera_merlin_master_translator ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator ; mandebrot_plot.qsys ;
; Altera ; altera_merlin_slave_translator  ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator              ; mandebrot_plot.qsys ;
; Altera ; altera_pll                      ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0                                                                                               ; mandebrot_plot.qsys ;
; Altera ; altera_reset_controller         ; 23.1    ; N/A          ; N/A          ; |MANDELBROT_HW|mandebrot_plot:u0|altera_reset_controller:rst_controller                                                                                   ; mandebrot_plot.qsys ;
+--------+---------------------------------+---------+--------------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------+
; State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|state ;
+------------+----------------------------------------------------------------------------------+
; Name       ; state.CALC                                                                       ;
+------------+----------------------------------------------------------------------------------+
; state.IDLE ; 0                                                                                ;
; state.CALC ; 1                                                                                ;
+------------+----------------------------------------------------------------------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|state ;
+-------------+-----------+------------+-------------+-------------------------------------------------------------------------+
; Name        ; state.FIN ; state.CALC ; state.START ; state.IDLE                                                              ;
+-------------+-----------+------------+-------------+-------------------------------------------------------------------------+
; state.IDLE  ; 0         ; 0          ; 0           ; 0                                                                       ;
; state.START ; 0         ; 0          ; 1           ; 1                                                                       ;
; state.CALC  ; 0         ; 1          ; 0           ; 1                                                                       ;
; state.FIN   ; 1         ; 0          ; 0           ; 1                                                                       ;
+-------------+-----------+------------+-------------+-------------------------------------------------------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|state ;
+------------+------------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------+
; Name       ; state.IDLE ; state.FIN ; state.CALC                                                                                                                                  ;
+------------+------------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------+
; state.IDLE ; 0          ; 0         ; 0                                                                                                                                           ;
; state.CALC ; 1          ; 0         ; 1                                                                                                                                           ;
; state.FIN  ; 1          ; 1         ; 0                                                                                                                                           ;
+------------+------------+-----------+---------------------------------------------------------------------------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------+
; State Machine - |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|state ;
+------------+------------+------------+------------------------------------------------+
; Name       ; state.IDLE ; state.DONE ; state.WAIT                                     ;
+------------+------------+------------+------------------------------------------------+
; state.IDLE ; 0          ; 0          ; 0                                              ;
; state.WAIT ; 1          ; 0          ; 1                                              ;
; state.DONE ; 1          ; 1          ; 0                                              ;
+------------+------------+------------+------------------------------------------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------+
; State Machine - |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|mSetup_ST ;
+----------------+----------------+----------------+-------------------------+
; Name           ; mSetup_ST.0000 ; mSetup_ST.0010 ; mSetup_ST.0001          ;
+----------------+----------------+----------------+-------------------------+
; mSetup_ST.0000 ; 0              ; 0              ; 0                       ;
; mSetup_ST.0001 ; 1              ; 0              ; 1                       ;
; mSetup_ST.0010 ; 1              ; 1              ; 0                       ;
+----------------+----------------+----------------+-------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                                           ;
+--------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                                              ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+--------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0] ; yes                                                              ; yes                                        ;
; mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1] ; yes                                                              ; yes                                        ;
; Total number of protected registers is 2                                                                                                   ;                                                                  ;                                            ;
+--------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; User-Specified and Inferred Latches                                                                                                               ;
+------------------------------------------------------------+-------------------------------------------------------------+------------------------+
; Latch Name                                                 ; Latch Enable Signal                                         ; Free of Timing Hazards ;
+------------------------------------------------------------+-------------------------------------------------------------+------------------------+
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hps_write ; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|state.DONE ; yes                    ;
; Number of user-specified and inferred latches = 1          ;                                                             ;                        ;
+------------------------------------------------------------+-------------------------------------------------------------+------------------------+
Note: All latches listed above may not be present at the end of synthesis due to various synthesis optimizations.


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                                                   ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                          ; Reason for Removal                                                                                          ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+
; mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0|wr_reg_read                                                                                      ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0|cmd_read                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_end[0]                                                                                              ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_end[1]                                                                                              ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_end[2..8]                                                                                           ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_end[9]                                                                                              ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_end[10,11]                                                                                          ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_start[0]                                                                                            ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_start[1]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_start[2..4]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_start[5]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_start[6..11]                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_sync[0]                                                                                             ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_sync[1..11]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_total[0,1]                                                                                          ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_total[2,3]                                                                                          ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_total[4..8]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_total[9]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|v_total[10,11]                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[0]                                                                                              ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[1]                                                                                              ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[2,3]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[4..7]                                                                                           ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[8,9]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_end[10,11]                                                                                          ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[0]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[1]                                                                                            ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[2,3]                                                                                          ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[4..6]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[7]                                                                                            ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_start[8..11]                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_sync[0..4]                                                                                          ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_sync[5]                                                                                             ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_sync[6]                                                                                             ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_sync[7..11]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_total[0..4]                                                                                         ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_total[5..7]                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_total[8,9]                                                                                          ; Stuck at VCC due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|h_total[10,11]                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mI2C_DATA[23]                                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mI2C_DATA[20..22]                                                                                                    ; Stuck at VCC due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mI2C_DATA[18,19]                                                                                                     ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mI2C_DATA[17]                                                                                                        ; Stuck at VCC due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mI2C_DATA[16]                                                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|ST[6,7]                                                                        ; Merged with I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|ST[5]                   ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[1]                                                        ; Merged with mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[0] ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|BYTE[3..7]                                                                     ; Merged with I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|BYTE[2]                 ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[0]                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|z_imag[0] ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|BYTE[2]                                                                        ; Stuck at GND due to stuck port data_in                                                                      ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|ST[5]                                                                          ; Stuck at GND due to stuck port clock_enable                                                                 ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|state~7                                                                                       ; Lost fanout                                                                                                 ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|state~8                                                        ; Lost fanout                                                                                                 ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|state~9                                                        ; Lost fanout                                                                                                 ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|state~6                                                                                               ; Lost fanout                                                                                                 ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mSetup_ST~9                                                                                                          ; Lost fanout                                                                                                 ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|mSetup_ST~10                                                                                                         ; Lost fanout                                                                                                 ;
; I2C_HDMI_Config:u_I2C_HDMI_Config|LUT_INDEX[5]                                                                                                         ; Stuck at GND due to stuck port data_in                                                                      ;
; Total Number of Removed Registers = 125                                                                                                                ;                                                                                                             ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations                                                                                                                                                                                                                          ;
+-------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                   ; Reason for Removal        ; Registers Removed due to This Register                                                                                                                 ;
+-------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[0] ; Stuck at GND              ; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|z_imag[0] ;
;                                                                                                 ; due to stuck port data_in ;                                                                                                                                                        ;
+-------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 546   ;
; Number of registers using Synchronous Clear  ; 161   ;
; Number of registers using Synchronous Load   ; 37    ;
; Number of registers using Asynchronous Clear ; 375   ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 245   ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Inverted Register Statistics                                                                                                                          ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------+
; Inverted Register                                                                                                                           ; Fan out ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------+
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx|vga_hs                                                                          ; 1       ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx|vga_vs                                                                          ; 1       ;
; mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out ; 335     ;
; mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[0]  ; 1       ;
; mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1|altera_reset_synchronizer_int_chain[1]  ; 1       ;
; mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0|use_reg                                                                               ; 30      ;
; mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0|wr_reg_waitrequest                                                                    ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_re[24]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_re[25]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_re[26]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[23]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[24]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[25]                                            ; 2       ;
; mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[26]                                            ; 2       ;
; Total number of inverted registers = 14                                                                                                     ;         ;
+---------------------------------------------------------------------------------------------------------------------------------------------+---------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Packed Into Inferred Megafunctions                                                                                                                                                               ;
+----------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------+------+
; Register Name                                                                                      ; Megafunction                                                                                   ; Type ;
+----------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------+------+
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|rdata_b[0..7]  ; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|ram_rtl_0  ; RAM  ;
; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|rdata_b[0..7] ; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|ram_rtl_0 ; RAM  ;
+----------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------+------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                      ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------+
; 3:1                ; 6 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; Yes        ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|LUT_INDEX[0]                                                   ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx|vga_b[7]                             ;
; 3:1                ; 8 bits    ; 16 LEs        ; 0 LEs                ; 16 LEs                 ; Yes        ; |MANDELBROT_HW|mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|rgb_data[3]                ;
; 65:1               ; 8 bits    ; 344 LEs       ; 0 LEs                ; 344 LEs                ; Yes        ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|CNT[7]                   ;
; 66:1               ; 5 bits    ; 220 LEs       ; 125 LEs              ; 95 LEs                 ; Yes        ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|ST[4]                    ;
; 67:1               ; 3 bits    ; 132 LEs       ; 6 LEs                ; 126 LEs                ; Yes        ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|BYTE[2]                  ;
; 37:1               ; 8 bits    ; 192 LEs       ; 16 LEs               ; 176 LEs                ; Yes        ; |MANDELBROT_HW|I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd|A[8]                     ;
; 4:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_im[23] ;
; 5:1                ; 3 bits    ; 9 LEs         ; 6 LEs                ; 3 LEs                  ; Yes        ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|c_re[24] ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|state                                   ;
; 3:1                ; 34 bits   ; 68 LEs        ; 68 LEs               ; 0 LEs                  ; No         ; |MANDELBROT_HW|mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|pix_x    ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1 ;
+-------------------+-------+------+-----------------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                                      ;
+-------------------+-------+------+-----------------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; altera_reset_synchronizer_int_chain[1]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; altera_reset_synchronizer_int_chain[0]                                                  ;
+-------------------+-------+------+-----------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1 ;
+-------------------+-------+------+---------------------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                                          ;
+-------------------+-------+------+---------------------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; altera_reset_synchronizer_int_chain[0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; altera_reset_synchronizer_int_chain[1]                                                      ;
+-------------------+-------+------+---------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0|altsyncram_gdn1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                               ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0|altsyncram_8gn1:auto_generated ;
+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                ;
+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                 ;
+---------------------------------+--------------------+------+---------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i ;
+--------------------------------------+------------------------+-----------------------------------+
; Parameter Name                       ; Value                  ; Type                              ;
+--------------------------------------+------------------------+-----------------------------------+
; reference_clock_frequency            ; 50.0 MHz               ; String                            ;
; fractional_vco_multiplier            ; false                  ; String                            ;
; pll_type                             ; General                ; String                            ;
; pll_subtype                          ; General                ; String                            ;
; number_of_clocks                     ; 2                      ; Signed Integer                    ;
; operation_mode                       ; direct                 ; String                            ;
; deserialization_factor               ; 4                      ; Signed Integer                    ;
; data_rate                            ; 0                      ; Signed Integer                    ;
; sim_additional_refclk_cycles_to_lock ; 0                      ; Signed Integer                    ;
; output_clock_frequency0              ; 25.175644 MHz          ; String                            ;
; phase_shift0                         ; 0 ps                   ; String                            ;
; duty_cycle0                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency1              ; 102.380952 MHz         ; String                            ;
; phase_shift1                         ; 0 ps                   ; String                            ;
; duty_cycle1                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency2              ; 0 MHz                  ; String                            ;
; phase_shift2                         ; 0 ps                   ; String                            ;
; duty_cycle2                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency3              ; 0 MHz                  ; String                            ;
; phase_shift3                         ; 0 ps                   ; String                            ;
; duty_cycle3                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency4              ; 0 MHz                  ; String                            ;
; phase_shift4                         ; 0 ps                   ; String                            ;
; duty_cycle4                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency5              ; 0 MHz                  ; String                            ;
; phase_shift5                         ; 0 ps                   ; String                            ;
; duty_cycle5                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency6              ; 0 MHz                  ; String                            ;
; phase_shift6                         ; 0 ps                   ; String                            ;
; duty_cycle6                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency7              ; 0 MHz                  ; String                            ;
; phase_shift7                         ; 0 ps                   ; String                            ;
; duty_cycle7                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency8              ; 0 MHz                  ; String                            ;
; phase_shift8                         ; 0 ps                   ; String                            ;
; duty_cycle8                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency9              ; 0 MHz                  ; String                            ;
; phase_shift9                         ; 0 ps                   ; String                            ;
; duty_cycle9                          ; 50                     ; Signed Integer                    ;
; output_clock_frequency10             ; 0 MHz                  ; String                            ;
; phase_shift10                        ; 0 ps                   ; String                            ;
; duty_cycle10                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency11             ; 0 MHz                  ; String                            ;
; phase_shift11                        ; 0 ps                   ; String                            ;
; duty_cycle11                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency12             ; 0 MHz                  ; String                            ;
; phase_shift12                        ; 0 ps                   ; String                            ;
; duty_cycle12                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency13             ; 0 MHz                  ; String                            ;
; phase_shift13                        ; 0 ps                   ; String                            ;
; duty_cycle13                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency14             ; 0 MHz                  ; String                            ;
; phase_shift14                        ; 0 ps                   ; String                            ;
; duty_cycle14                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency15             ; 0 MHz                  ; String                            ;
; phase_shift15                        ; 0 ps                   ; String                            ;
; duty_cycle15                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency16             ; 0 MHz                  ; String                            ;
; phase_shift16                        ; 0 ps                   ; String                            ;
; duty_cycle16                         ; 50                     ; Signed Integer                    ;
; output_clock_frequency17             ; 0 MHz                  ; String                            ;
; phase_shift17                        ; 0 ps                   ; String                            ;
; duty_cycle17                         ; 50                     ; Signed Integer                    ;
; clock_name_0                         ;                        ; String                            ;
; clock_name_1                         ;                        ; String                            ;
; clock_name_2                         ;                        ; String                            ;
; clock_name_3                         ;                        ; String                            ;
; clock_name_4                         ;                        ; String                            ;
; clock_name_5                         ;                        ; String                            ;
; clock_name_6                         ;                        ; String                            ;
; clock_name_7                         ;                        ; String                            ;
; clock_name_8                         ;                        ; String                            ;
; clock_name_global_0                  ; false                  ; String                            ;
; clock_name_global_1                  ; false                  ; String                            ;
; clock_name_global_2                  ; false                  ; String                            ;
; clock_name_global_3                  ; false                  ; String                            ;
; clock_name_global_4                  ; false                  ; String                            ;
; clock_name_global_5                  ; false                  ; String                            ;
; clock_name_global_6                  ; false                  ; String                            ;
; clock_name_global_7                  ; false                  ; String                            ;
; clock_name_global_8                  ; false                  ; String                            ;
; m_cnt_hi_div                         ; 1                      ; Signed Integer                    ;
; m_cnt_lo_div                         ; 1                      ; Signed Integer                    ;
; m_cnt_bypass_en                      ; false                  ; String                            ;
; m_cnt_odd_div_duty_en                ; false                  ; String                            ;
; n_cnt_hi_div                         ; 1                      ; Signed Integer                    ;
; n_cnt_lo_div                         ; 1                      ; Signed Integer                    ;
; n_cnt_bypass_en                      ; false                  ; String                            ;
; n_cnt_odd_div_duty_en                ; false                  ; String                            ;
; c_cnt_hi_div0                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div0                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en0                     ; false                  ; String                            ;
; c_cnt_in_src0                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en0               ; false                  ; String                            ;
; c_cnt_prst0                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst0                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div1                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div1                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en1                     ; false                  ; String                            ;
; c_cnt_in_src1                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en1               ; false                  ; String                            ;
; c_cnt_prst1                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst1                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div2                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div2                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en2                     ; false                  ; String                            ;
; c_cnt_in_src2                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en2               ; false                  ; String                            ;
; c_cnt_prst2                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst2                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div3                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div3                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en3                     ; false                  ; String                            ;
; c_cnt_in_src3                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en3               ; false                  ; String                            ;
; c_cnt_prst3                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst3                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div4                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div4                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en4                     ; false                  ; String                            ;
; c_cnt_in_src4                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en4               ; false                  ; String                            ;
; c_cnt_prst4                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst4                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div5                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div5                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en5                     ; false                  ; String                            ;
; c_cnt_in_src5                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en5               ; false                  ; String                            ;
; c_cnt_prst5                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst5                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div6                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div6                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en6                     ; false                  ; String                            ;
; c_cnt_in_src6                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en6               ; false                  ; String                            ;
; c_cnt_prst6                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst6                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div7                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div7                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en7                     ; false                  ; String                            ;
; c_cnt_in_src7                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en7               ; false                  ; String                            ;
; c_cnt_prst7                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst7                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div8                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div8                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en8                     ; false                  ; String                            ;
; c_cnt_in_src8                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en8               ; false                  ; String                            ;
; c_cnt_prst8                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst8                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div9                        ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div9                        ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en9                     ; false                  ; String                            ;
; c_cnt_in_src9                        ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en9               ; false                  ; String                            ;
; c_cnt_prst9                          ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst9                   ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div10                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div10                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en10                    ; false                  ; String                            ;
; c_cnt_in_src10                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en10              ; false                  ; String                            ;
; c_cnt_prst10                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst10                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div11                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div11                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en11                    ; false                  ; String                            ;
; c_cnt_in_src11                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en11              ; false                  ; String                            ;
; c_cnt_prst11                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst11                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div12                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div12                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en12                    ; false                  ; String                            ;
; c_cnt_in_src12                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en12              ; false                  ; String                            ;
; c_cnt_prst12                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst12                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div13                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div13                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en13                    ; false                  ; String                            ;
; c_cnt_in_src13                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en13              ; false                  ; String                            ;
; c_cnt_prst13                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst13                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div14                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div14                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en14                    ; false                  ; String                            ;
; c_cnt_in_src14                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en14              ; false                  ; String                            ;
; c_cnt_prst14                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst14                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div15                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div15                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en15                    ; false                  ; String                            ;
; c_cnt_in_src15                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en15              ; false                  ; String                            ;
; c_cnt_prst15                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst15                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div16                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div16                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en16                    ; false                  ; String                            ;
; c_cnt_in_src16                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en16              ; false                  ; String                            ;
; c_cnt_prst16                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst16                  ; 0                      ; Signed Integer                    ;
; c_cnt_hi_div17                       ; 1                      ; Signed Integer                    ;
; c_cnt_lo_div17                       ; 1                      ; Signed Integer                    ;
; c_cnt_bypass_en17                    ; false                  ; String                            ;
; c_cnt_in_src17                       ; ph_mux_clk             ; String                            ;
; c_cnt_odd_div_duty_en17              ; false                  ; String                            ;
; c_cnt_prst17                         ; 1                      ; Signed Integer                    ;
; c_cnt_ph_mux_prst17                  ; 0                      ; Signed Integer                    ;
; pll_vco_div                          ; 1                      ; Signed Integer                    ;
; pll_slf_rst                          ; false                  ; String                            ;
; pll_bw_sel                           ; low                    ; String                            ;
; pll_output_clk_frequency             ; 0 MHz                  ; String                            ;
; pll_cp_current                       ; 0                      ; Signed Integer                    ;
; pll_bwctrl                           ; 0                      ; Signed Integer                    ;
; pll_fractional_division              ; 1                      ; Signed Integer                    ;
; pll_fractional_cout                  ; 24                     ; Signed Integer                    ;
; pll_dsm_out_sel                      ; 1st_order              ; String                            ;
; mimic_fbclk_type                     ; gclk                   ; String                            ;
; pll_fbclk_mux_1                      ; glb                    ; String                            ;
; pll_fbclk_mux_2                      ; fb_1                   ; String                            ;
; pll_m_cnt_in_src                     ; ph_mux_clk             ; String                            ;
; pll_vcoph_div                        ; 1                      ; Signed Integer                    ;
; refclk1_frequency                    ; 0 MHz                  ; String                            ;
; pll_clkin_0_src                      ; clk_0                  ; String                            ;
; pll_clkin_1_src                      ; clk_0                  ; String                            ;
; pll_clk_loss_sw_en                   ; false                  ; String                            ;
; pll_auto_clk_sw_en                   ; false                  ; String                            ;
; pll_manu_clk_sw_en                   ; false                  ; String                            ;
; pll_clk_sw_dly                       ; 0                      ; Signed Integer                    ;
; pll_extclk_0_cnt_src                 ; pll_extclk_cnt_src_vss ; String                            ;
; pll_extclk_1_cnt_src                 ; pll_extclk_cnt_src_vss ; String                            ;
+--------------------------------------+------------------------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: I2C_HDMI_Config:u_I2C_HDMI_Config ;
+----------------+----------+----------------------------------------------------+
; Parameter Name ; Value    ; Type                                               ;
+----------------+----------+----------------------------------------------------+
; CLK_Freq       ; 50000000 ; Signed Integer                                     ;
; I2C_Freq       ; 20000    ; Signed Integer                                     ;
; LUT_SIZE       ; 31       ; Signed Integer                                     ;
+----------------+----------+----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0 ;
+----------------+-------+----------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                 ;
+----------------+-------+----------------------------------------------------------------------+
; WIDTH          ; 8     ; Signed Integer                                                       ;
+----------------+-------+----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; WIDTH          ; 8     ; Signed Integer                                                                            ;
; ver_x          ; 640   ; Signed Integer                                                                            ;
; hor_y          ; 480   ; Signed Integer                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k ;
+----------------+-------+----------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------+
; DATA_WIDTH     ; 8     ; Signed Integer                                                                                           ;
; ADDR_WIDTH     ; 18    ; Signed Integer                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
; DATA_WIDTH     ; 8     ; Signed Integer                                                                                          ;
; ADDR_WIDTH     ; 16    ; Signed Integer                                                                                          ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0 ;
+----------------+-------+------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                         ;
+----------------+-------+------------------------------------------------------------------------------+
; WIDTH          ; 32    ; Signed Integer                                                               ;
+----------------+-------+------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                              ;
; FBITS          ; 23    ; Signed Integer                                                                                              ;
; MAX_H          ; 400   ; Signed Integer                                                                                              ;
; MAX_V          ; 300   ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                           ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_imag ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                           ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                             ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                   ;
; FBITS          ; 23    ; Signed Integer                                                                                                                   ;
; MAX_ITERATION  ; 255   ; Signed Integer                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                             ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                   ;
; FBITS          ; 23    ; Signed Integer                                                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_real_sq ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                         ;
; FBITS          ; 23    ; Signed Integer                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_imag_sq ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                         ;
; FBITS          ; 23    ; Signed Integer                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_two_real_imag ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                               ;
; FBITS          ; 23    ; Signed Integer                                                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_real_sq ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:sub_real_imag ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_real_c ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_imag_c ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH          ; 27    ; Signed Integer                                                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0 ;
+-------------------+-------+------------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                   ;
+-------------------+-------+------------------------------------------------------------------------+
; DATA_WIDTH        ; 32    ; Signed Integer                                                         ;
; SYMBOL_WIDTH      ; 8     ; Signed Integer                                                         ;
; RESPONSE_WIDTH    ; 2     ; Signed Integer                                                         ;
; HDL_ADDR_WIDTH    ; 10    ; Signed Integer                                                         ;
; BURSTCOUNT_WIDTH  ; 1     ; Signed Integer                                                         ;
; PIPELINE_COMMAND  ; 1     ; Signed Integer                                                         ;
; PIPELINE_RESPONSE ; 1     ; Signed Integer                                                         ;
; BYTEEN_WIDTH      ; 4     ; Signed Integer                                                         ;
+-------------------+-------+------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i ;
+--------------------------------------+------------------------+---------------------------------------------------+
; Parameter Name                       ; Value                  ; Type                                              ;
+--------------------------------------+------------------------+---------------------------------------------------+
; reference_clock_frequency            ; 50.0 MHz               ; String                                            ;
; fractional_vco_multiplier            ; false                  ; String                                            ;
; pll_type                             ; General                ; String                                            ;
; pll_subtype                          ; General                ; String                                            ;
; number_of_clocks                     ; 1                      ; Signed Integer                                    ;
; operation_mode                       ; direct                 ; String                                            ;
; deserialization_factor               ; 4                      ; Signed Integer                                    ;
; data_rate                            ; 0                      ; Signed Integer                                    ;
; sim_additional_refclk_cycles_to_lock ; 0                      ; Signed Integer                                    ;
; output_clock_frequency0              ; 100.000000 MHz         ; String                                            ;
; phase_shift0                         ; 0 ps                   ; String                                            ;
; duty_cycle0                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency1              ; 0 MHz                  ; String                                            ;
; phase_shift1                         ; 0 ps                   ; String                                            ;
; duty_cycle1                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency2              ; 0 MHz                  ; String                                            ;
; phase_shift2                         ; 0 ps                   ; String                                            ;
; duty_cycle2                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency3              ; 0 MHz                  ; String                                            ;
; phase_shift3                         ; 0 ps                   ; String                                            ;
; duty_cycle3                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency4              ; 0 MHz                  ; String                                            ;
; phase_shift4                         ; 0 ps                   ; String                                            ;
; duty_cycle4                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency5              ; 0 MHz                  ; String                                            ;
; phase_shift5                         ; 0 ps                   ; String                                            ;
; duty_cycle5                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency6              ; 0 MHz                  ; String                                            ;
; phase_shift6                         ; 0 ps                   ; String                                            ;
; duty_cycle6                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency7              ; 0 MHz                  ; String                                            ;
; phase_shift7                         ; 0 ps                   ; String                                            ;
; duty_cycle7                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency8              ; 0 MHz                  ; String                                            ;
; phase_shift8                         ; 0 ps                   ; String                                            ;
; duty_cycle8                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency9              ; 0 MHz                  ; String                                            ;
; phase_shift9                         ; 0 ps                   ; String                                            ;
; duty_cycle9                          ; 50                     ; Signed Integer                                    ;
; output_clock_frequency10             ; 0 MHz                  ; String                                            ;
; phase_shift10                        ; 0 ps                   ; String                                            ;
; duty_cycle10                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency11             ; 0 MHz                  ; String                                            ;
; phase_shift11                        ; 0 ps                   ; String                                            ;
; duty_cycle11                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency12             ; 0 MHz                  ; String                                            ;
; phase_shift12                        ; 0 ps                   ; String                                            ;
; duty_cycle12                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency13             ; 0 MHz                  ; String                                            ;
; phase_shift13                        ; 0 ps                   ; String                                            ;
; duty_cycle13                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency14             ; 0 MHz                  ; String                                            ;
; phase_shift14                        ; 0 ps                   ; String                                            ;
; duty_cycle14                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency15             ; 0 MHz                  ; String                                            ;
; phase_shift15                        ; 0 ps                   ; String                                            ;
; duty_cycle15                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency16             ; 0 MHz                  ; String                                            ;
; phase_shift16                        ; 0 ps                   ; String                                            ;
; duty_cycle16                         ; 50                     ; Signed Integer                                    ;
; output_clock_frequency17             ; 0 MHz                  ; String                                            ;
; phase_shift17                        ; 0 ps                   ; String                                            ;
; duty_cycle17                         ; 50                     ; Signed Integer                                    ;
; clock_name_0                         ;                        ; String                                            ;
; clock_name_1                         ;                        ; String                                            ;
; clock_name_2                         ;                        ; String                                            ;
; clock_name_3                         ;                        ; String                                            ;
; clock_name_4                         ;                        ; String                                            ;
; clock_name_5                         ;                        ; String                                            ;
; clock_name_6                         ;                        ; String                                            ;
; clock_name_7                         ;                        ; String                                            ;
; clock_name_8                         ;                        ; String                                            ;
; clock_name_global_0                  ; false                  ; String                                            ;
; clock_name_global_1                  ; false                  ; String                                            ;
; clock_name_global_2                  ; false                  ; String                                            ;
; clock_name_global_3                  ; false                  ; String                                            ;
; clock_name_global_4                  ; false                  ; String                                            ;
; clock_name_global_5                  ; false                  ; String                                            ;
; clock_name_global_6                  ; false                  ; String                                            ;
; clock_name_global_7                  ; false                  ; String                                            ;
; clock_name_global_8                  ; false                  ; String                                            ;
; m_cnt_hi_div                         ; 1                      ; Signed Integer                                    ;
; m_cnt_lo_div                         ; 1                      ; Signed Integer                                    ;
; m_cnt_bypass_en                      ; false                  ; String                                            ;
; m_cnt_odd_div_duty_en                ; false                  ; String                                            ;
; n_cnt_hi_div                         ; 1                      ; Signed Integer                                    ;
; n_cnt_lo_div                         ; 1                      ; Signed Integer                                    ;
; n_cnt_bypass_en                      ; false                  ; String                                            ;
; n_cnt_odd_div_duty_en                ; false                  ; String                                            ;
; c_cnt_hi_div0                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div0                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en0                     ; false                  ; String                                            ;
; c_cnt_in_src0                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en0               ; false                  ; String                                            ;
; c_cnt_prst0                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst0                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div1                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div1                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en1                     ; false                  ; String                                            ;
; c_cnt_in_src1                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en1               ; false                  ; String                                            ;
; c_cnt_prst1                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst1                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div2                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div2                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en2                     ; false                  ; String                                            ;
; c_cnt_in_src2                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en2               ; false                  ; String                                            ;
; c_cnt_prst2                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst2                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div3                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div3                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en3                     ; false                  ; String                                            ;
; c_cnt_in_src3                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en3               ; false                  ; String                                            ;
; c_cnt_prst3                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst3                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div4                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div4                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en4                     ; false                  ; String                                            ;
; c_cnt_in_src4                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en4               ; false                  ; String                                            ;
; c_cnt_prst4                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst4                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div5                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div5                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en5                     ; false                  ; String                                            ;
; c_cnt_in_src5                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en5               ; false                  ; String                                            ;
; c_cnt_prst5                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst5                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div6                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div6                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en6                     ; false                  ; String                                            ;
; c_cnt_in_src6                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en6               ; false                  ; String                                            ;
; c_cnt_prst6                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst6                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div7                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div7                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en7                     ; false                  ; String                                            ;
; c_cnt_in_src7                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en7               ; false                  ; String                                            ;
; c_cnt_prst7                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst7                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div8                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div8                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en8                     ; false                  ; String                                            ;
; c_cnt_in_src8                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en8               ; false                  ; String                                            ;
; c_cnt_prst8                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst8                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div9                        ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div9                        ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en9                     ; false                  ; String                                            ;
; c_cnt_in_src9                        ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en9               ; false                  ; String                                            ;
; c_cnt_prst9                          ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst9                   ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div10                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div10                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en10                    ; false                  ; String                                            ;
; c_cnt_in_src10                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en10              ; false                  ; String                                            ;
; c_cnt_prst10                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst10                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div11                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div11                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en11                    ; false                  ; String                                            ;
; c_cnt_in_src11                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en11              ; false                  ; String                                            ;
; c_cnt_prst11                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst11                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div12                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div12                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en12                    ; false                  ; String                                            ;
; c_cnt_in_src12                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en12              ; false                  ; String                                            ;
; c_cnt_prst12                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst12                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div13                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div13                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en13                    ; false                  ; String                                            ;
; c_cnt_in_src13                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en13              ; false                  ; String                                            ;
; c_cnt_prst13                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst13                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div14                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div14                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en14                    ; false                  ; String                                            ;
; c_cnt_in_src14                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en14              ; false                  ; String                                            ;
; c_cnt_prst14                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst14                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div15                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div15                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en15                    ; false                  ; String                                            ;
; c_cnt_in_src15                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en15              ; false                  ; String                                            ;
; c_cnt_prst15                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst15                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div16                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div16                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en16                    ; false                  ; String                                            ;
; c_cnt_in_src16                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en16              ; false                  ; String                                            ;
; c_cnt_prst16                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst16                  ; 0                      ; Signed Integer                                    ;
; c_cnt_hi_div17                       ; 1                      ; Signed Integer                                    ;
; c_cnt_lo_div17                       ; 1                      ; Signed Integer                                    ;
; c_cnt_bypass_en17                    ; false                  ; String                                            ;
; c_cnt_in_src17                       ; ph_mux_clk             ; String                                            ;
; c_cnt_odd_div_duty_en17              ; false                  ; String                                            ;
; c_cnt_prst17                         ; 1                      ; Signed Integer                                    ;
; c_cnt_ph_mux_prst17                  ; 0                      ; Signed Integer                                    ;
; pll_vco_div                          ; 1                      ; Signed Integer                                    ;
; pll_slf_rst                          ; false                  ; String                                            ;
; pll_bw_sel                           ; low                    ; String                                            ;
; pll_output_clk_frequency             ; 0 MHz                  ; String                                            ;
; pll_cp_current                       ; 0                      ; Signed Integer                                    ;
; pll_bwctrl                           ; 0                      ; Signed Integer                                    ;
; pll_fractional_division              ; 1                      ; Signed Integer                                    ;
; pll_fractional_cout                  ; 24                     ; Signed Integer                                    ;
; pll_dsm_out_sel                      ; 1st_order              ; String                                            ;
; mimic_fbclk_type                     ; gclk                   ; String                                            ;
; pll_fbclk_mux_1                      ; glb                    ; String                                            ;
; pll_fbclk_mux_2                      ; fb_1                   ; String                                            ;
; pll_m_cnt_in_src                     ; ph_mux_clk             ; String                                            ;
; pll_vcoph_div                        ; 1                      ; Signed Integer                                    ;
; refclk1_frequency                    ; 0 MHz                  ; String                                            ;
; pll_clkin_0_src                      ; clk_0                  ; String                                            ;
; pll_clkin_1_src                      ; clk_0                  ; String                                            ;
; pll_clk_loss_sw_en                   ; false                  ; String                                            ;
; pll_auto_clk_sw_en                   ; false                  ; String                                            ;
; pll_manu_clk_sw_en                   ; false                  ; String                                            ;
; pll_clk_sw_dly                       ; 0                      ; Signed Integer                                    ;
; pll_extclk_0_cnt_src                 ; pll_extclk_cnt_src_vss ; String                                            ;
; pll_extclk_1_cnt_src                 ; pll_extclk_cnt_src_vss ; String                                            ;
+--------------------------------------+------------------------+---------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name              ; Value ; Type                                                                                                                                  ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------+
; AV_ADDRESS_W                ; 10    ; Signed Integer                                                                                                                        ;
; AV_DATA_W                   ; 32    ; Signed Integer                                                                                                                        ;
; AV_BURSTCOUNT_W             ; 1     ; Signed Integer                                                                                                                        ;
; AV_BYTEENABLE_W             ; 4     ; Signed Integer                                                                                                                        ;
; UAV_ADDRESS_W               ; 10    ; Signed Integer                                                                                                                        ;
; UAV_BURSTCOUNT_W            ; 3     ; Signed Integer                                                                                                                        ;
; USE_BURSTCOUNT              ; 1     ; Signed Integer                                                                                                                        ;
; USE_BEGINBURSTTRANSFER      ; 0     ; Signed Integer                                                                                                                        ;
; USE_BEGINTRANSFER           ; 0     ; Signed Integer                                                                                                                        ;
; USE_CHIPSELECT              ; 0     ; Signed Integer                                                                                                                        ;
; USE_READ                    ; 1     ; Signed Integer                                                                                                                        ;
; USE_READDATAVALID           ; 1     ; Signed Integer                                                                                                                        ;
; USE_WRITE                   ; 1     ; Signed Integer                                                                                                                        ;
; USE_WAITREQUEST             ; 1     ; Signed Integer                                                                                                                        ;
; USE_WRITERESPONSE           ; 0     ; Signed Integer                                                                                                                        ;
; USE_READRESPONSE            ; 0     ; Signed Integer                                                                                                                        ;
; AV_REGISTERINCOMINGSIGNALS  ; 0     ; Signed Integer                                                                                                                        ;
; AV_SYMBOLS_PER_WORD         ; 4     ; Signed Integer                                                                                                                        ;
; AV_ADDRESS_SYMBOLS          ; 1     ; Signed Integer                                                                                                                        ;
; AV_CONSTANT_BURST_BEHAVIOR  ; 0     ; Signed Integer                                                                                                                        ;
; UAV_CONSTANT_BURST_BEHAVIOR ; 0     ; Signed Integer                                                                                                                        ;
; AV_BURSTCOUNT_SYMBOLS       ; 0     ; Signed Integer                                                                                                                        ;
; AV_LINEWRAPBURSTS           ; 0     ; Signed Integer                                                                                                                        ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator ;
+--------------------------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                 ; Value ; Type                                                                                                                                ;
+--------------------------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; AV_ADDRESS_W                   ; 1     ; Signed Integer                                                                                                                      ;
; AV_DATA_W                      ; 32    ; Signed Integer                                                                                                                      ;
; AV_BURSTCOUNT_W                ; 1     ; Signed Integer                                                                                                                      ;
; AV_BYTEENABLE_W                ; 4     ; Signed Integer                                                                                                                      ;
; UAV_BYTEENABLE_W               ; 4     ; Signed Integer                                                                                                                      ;
; AV_READLATENCY                 ; 0     ; Signed Integer                                                                                                                      ;
; AV_READ_WAIT_CYCLES            ; 1     ; Signed Integer                                                                                                                      ;
; AV_WRITE_WAIT_CYCLES           ; 0     ; Signed Integer                                                                                                                      ;
; AV_SETUP_WAIT_CYCLES           ; 0     ; Signed Integer                                                                                                                      ;
; AV_DATA_HOLD_CYCLES            ; 0     ; Signed Integer                                                                                                                      ;
; USE_READDATAVALID              ; 1     ; Signed Integer                                                                                                                      ;
; USE_WAITREQUEST                ; 1     ; Signed Integer                                                                                                                      ;
; USE_READRESPONSE               ; 0     ; Signed Integer                                                                                                                      ;
; USE_WRITERESPONSE              ; 0     ; Signed Integer                                                                                                                      ;
; AV_SYMBOLS_PER_WORD            ; 4     ; Signed Integer                                                                                                                      ;
; AV_ADDRESS_SYMBOLS             ; 0     ; Signed Integer                                                                                                                      ;
; AV_BURSTCOUNT_SYMBOLS          ; 0     ; Signed Integer                                                                                                                      ;
; BITS_PER_WORD                  ; 2     ; Signed Integer                                                                                                                      ;
; UAV_ADDRESS_W                  ; 10    ; Signed Integer                                                                                                                      ;
; UAV_BURSTCOUNT_W               ; 3     ; Signed Integer                                                                                                                      ;
; UAV_DATA_W                     ; 32    ; Signed Integer                                                                                                                      ;
; AV_CONSTANT_BURST_BEHAVIOR     ; 0     ; Signed Integer                                                                                                                      ;
; UAV_CONSTANT_BURST_BEHAVIOR    ; 0     ; Signed Integer                                                                                                                      ;
; CHIPSELECT_THROUGH_READLATENCY ; 0     ; Signed Integer                                                                                                                      ;
; USE_UAV_CLKEN                  ; 0     ; Signed Integer                                                                                                                      ;
; AV_REQUIRE_UNALIGNED_ADDRESSES ; 0     ; Signed Integer                                                                                                                      ;
+--------------------------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name              ; Value ; Type                                                                                                                                              ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+
; AV_ADDRESS_W                ; 1     ; Signed Integer                                                                                                                                    ;
; AV_DATA_W                   ; 32    ; Signed Integer                                                                                                                                    ;
; AV_BURSTCOUNT_W             ; 1     ; Signed Integer                                                                                                                                    ;
; AV_BYTEENABLE_W             ; 4     ; Signed Integer                                                                                                                                    ;
; UAV_ADDRESS_W               ; 10    ; Signed Integer                                                                                                                                    ;
; UAV_BURSTCOUNT_W            ; 3     ; Signed Integer                                                                                                                                    ;
; USE_BURSTCOUNT              ; 0     ; Signed Integer                                                                                                                                    ;
; USE_BEGINBURSTTRANSFER      ; 0     ; Signed Integer                                                                                                                                    ;
; USE_BEGINTRANSFER           ; 0     ; Signed Integer                                                                                                                                    ;
; USE_CHIPSELECT              ; 0     ; Signed Integer                                                                                                                                    ;
; USE_READ                    ; 0     ; Signed Integer                                                                                                                                    ;
; USE_READDATAVALID           ; 0     ; Signed Integer                                                                                                                                    ;
; USE_WRITE                   ; 1     ; Signed Integer                                                                                                                                    ;
; USE_WAITREQUEST             ; 1     ; Signed Integer                                                                                                                                    ;
; USE_WRITERESPONSE           ; 0     ; Signed Integer                                                                                                                                    ;
; USE_READRESPONSE            ; 0     ; Signed Integer                                                                                                                                    ;
; AV_REGISTERINCOMINGSIGNALS  ; 0     ; Signed Integer                                                                                                                                    ;
; AV_SYMBOLS_PER_WORD         ; 4     ; Signed Integer                                                                                                                                    ;
; AV_ADDRESS_SYMBOLS          ; 1     ; Signed Integer                                                                                                                                    ;
; AV_CONSTANT_BURST_BEHAVIOR  ; 0     ; Signed Integer                                                                                                                                    ;
; UAV_CONSTANT_BURST_BEHAVIOR ; 0     ; Signed Integer                                                                                                                                    ;
; AV_BURSTCOUNT_SYMBOLS       ; 0     ; Signed Integer                                                                                                                                    ;
; AV_LINEWRAPBURSTS           ; 0     ; Signed Integer                                                                                                                                    ;
+-----------------------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator ;
+--------------------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                 ; Value ; Type                                                                                                                              ;
+--------------------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------+
; AV_ADDRESS_W                   ; 10    ; Signed Integer                                                                                                                    ;
; AV_DATA_W                      ; 32    ; Signed Integer                                                                                                                    ;
; AV_BURSTCOUNT_W                ; 1     ; Signed Integer                                                                                                                    ;
; AV_BYTEENABLE_W                ; 4     ; Signed Integer                                                                                                                    ;
; UAV_BYTEENABLE_W               ; 4     ; Signed Integer                                                                                                                    ;
; AV_READLATENCY                 ; 0     ; Signed Integer                                                                                                                    ;
; AV_READ_WAIT_CYCLES            ; 0     ; Signed Integer                                                                                                                    ;
; AV_WRITE_WAIT_CYCLES           ; 0     ; Signed Integer                                                                                                                    ;
; AV_SETUP_WAIT_CYCLES           ; 0     ; Signed Integer                                                                                                                    ;
; AV_DATA_HOLD_CYCLES            ; 0     ; Signed Integer                                                                                                                    ;
; USE_READDATAVALID              ; 1     ; Signed Integer                                                                                                                    ;
; USE_WAITREQUEST                ; 1     ; Signed Integer                                                                                                                    ;
; USE_READRESPONSE               ; 0     ; Signed Integer                                                                                                                    ;
; USE_WRITERESPONSE              ; 0     ; Signed Integer                                                                                                                    ;
; AV_SYMBOLS_PER_WORD            ; 4     ; Signed Integer                                                                                                                    ;
; AV_ADDRESS_SYMBOLS             ; 1     ; Signed Integer                                                                                                                    ;
; AV_BURSTCOUNT_SYMBOLS          ; 0     ; Signed Integer                                                                                                                    ;
; BITS_PER_WORD                  ; 2     ; Signed Integer                                                                                                                    ;
; UAV_ADDRESS_W                  ; 10    ; Signed Integer                                                                                                                    ;
; UAV_BURSTCOUNT_W               ; 3     ; Signed Integer                                                                                                                    ;
; UAV_DATA_W                     ; 32    ; Signed Integer                                                                                                                    ;
; AV_CONSTANT_BURST_BEHAVIOR     ; 0     ; Signed Integer                                                                                                                    ;
; UAV_CONSTANT_BURST_BEHAVIOR    ; 0     ; Signed Integer                                                                                                                    ;
; CHIPSELECT_THROUGH_READLATENCY ; 0     ; Signed Integer                                                                                                                    ;
; USE_UAV_CLKEN                  ; 0     ; Signed Integer                                                                                                                    ;
; AV_REQUIRE_UNALIGNED_ADDRESSES ; 0     ; Signed Integer                                                                                                                    ;
+--------------------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller ;
+---------------------------+----------+----------------------------------------------------------------+
; Parameter Name            ; Value    ; Type                                                           ;
+---------------------------+----------+----------------------------------------------------------------+
; NUM_RESET_INPUTS          ; 1        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN0     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN1     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN2     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN3     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN4     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN5     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN6     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN7     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN8     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN9     ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN10    ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN11    ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN12    ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN13    ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN14    ; 0        ; Signed Integer                                                 ;
; USE_RESET_REQUEST_IN15    ; 0        ; Signed Integer                                                 ;
; OUTPUT_RESET_SYNC_EDGES   ; deassert ; String                                                         ;
; SYNC_DEPTH                ; 2        ; Signed Integer                                                 ;
; RESET_REQUEST_PRESENT     ; 0        ; Signed Integer                                                 ;
; RESET_REQ_WAIT_TIME       ; 1        ; Signed Integer                                                 ;
; MIN_RST_ASSERTION_TIME    ; 3        ; Signed Integer                                                 ;
; RESET_REQ_EARLY_DSRT_TIME ; 1        ; Signed Integer                                                 ;
; ADAPT_RESET_REQUEST       ; 0        ; Signed Integer                                                 ;
+---------------------------+----------+----------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1 ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                    ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------+
; ASYNC_RESET    ; 1     ; Unsigned Binary                                                                                                         ;
; DEPTH          ; 2     ; Signed Integer                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1 ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; ASYNC_RESET    ; 0     ; Signed Integer                                                                                                              ;
; DEPTH          ; 2     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0 ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                          ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                       ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                    ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                  ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                  ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                       ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                       ;
; WIDTH_A                            ; 8                    ; Untyped                                                                                       ;
; WIDTHAD_A                          ; 16                   ; Untyped                                                                                       ;
; NUMWORDS_A                         ; 65536                ; Untyped                                                                                       ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                       ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                       ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                       ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                       ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                       ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                       ;
; WIDTH_B                            ; 8                    ; Untyped                                                                                       ;
; WIDTHAD_B                          ; 16                   ; Untyped                                                                                       ;
; NUMWORDS_B                         ; 65536                ; Untyped                                                                                       ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                       ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                       ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                       ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                       ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                       ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                       ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                       ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                       ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                       ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                       ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                       ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                       ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                       ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                       ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                       ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                       ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                       ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                       ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                       ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                       ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                       ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                       ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                       ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                       ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                       ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                       ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                       ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                       ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                       ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                       ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                       ;
; DEVICE_FAMILY                      ; Cyclone V            ; Untyped                                                                                       ;
; CBXI_PARAMETER                     ; altsyncram_gdn1      ; Untyped                                                                                       ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0 ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                           ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                        ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                     ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                   ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                   ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                 ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                        ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                        ;
; WIDTH_A                            ; 8                    ; Untyped                                                                                        ;
; WIDTHAD_A                          ; 18                   ; Untyped                                                                                        ;
; NUMWORDS_A                         ; 262144               ; Untyped                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                        ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                        ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                        ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                        ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                        ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                        ;
; WIDTH_B                            ; 8                    ; Untyped                                                                                        ;
; WIDTHAD_B                          ; 18                   ; Untyped                                                                                        ;
; NUMWORDS_B                         ; 262144               ; Untyped                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                        ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                        ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                        ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                        ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                        ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                        ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                        ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                        ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                        ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                        ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                        ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                        ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                        ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                        ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                        ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                        ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                        ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                        ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                        ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                        ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                        ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                        ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                        ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                        ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                        ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                        ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                        ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                        ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                                                                                        ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                        ;
; DEVICE_FAMILY                      ; Cyclone V            ; Untyped                                                                                        ;
; CBXI_PARAMETER                     ; altsyncram_8gn1      ; Untyped                                                                                        ;
+------------------------------------+----------------------+------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; altsyncram Parameter Settings by Entity Instance                                                                                                      ;
+-------------------------------------------+-----------------------------------------------------------------------------------------------------------+
; Name                                      ; Value                                                                                                     ;
+-------------------------------------------+-----------------------------------------------------------------------------------------------------------+
; Number of entity instances                ; 2                                                                                                         ;
; Entity Instance                           ; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0  ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                 ;
;     -- WIDTH_A                            ; 8                                                                                                         ;
;     -- NUMWORDS_A                         ; 65536                                                                                                     ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                              ;
;     -- WIDTH_B                            ; 8                                                                                                         ;
;     -- NUMWORDS_B                         ; 65536                                                                                                     ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                    ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                              ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                      ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                  ;
; Entity Instance                           ; mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0 ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                 ;
;     -- WIDTH_A                            ; 8                                                                                                         ;
;     -- NUMWORDS_A                         ; 262144                                                                                                    ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                              ;
;     -- WIDTH_B                            ; 8                                                                                                         ;
;     -- NUMWORDS_B                         ; 262144                                                                                                    ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                    ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                              ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                      ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                  ;
+-------------------------------------------+-----------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1" ;
+----------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                                               ;
+----------+-------+----------+-------------------------------------------------------------------------------------------------------+
; reset_in ; Input ; Info     ; Stuck at GND                                                                                          ;
+----------+-------+----------+-------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|altera_reset_controller:rst_controller" ;
+----------------+--------+----------+-------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                         ;
+----------------+--------+----------+-------------------------------------------------+
; reset_req      ; Output ; Info     ; Explicitly unconnected                          ;
; reset_req_in0  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in1      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in1  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in2      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in2  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in3      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in3  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in4      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in4  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in5      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in5  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in6      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in6  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in7      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in7  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in8      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in8  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in9      ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in9  ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in10     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in10 ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in11     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in11 ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in12     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in12 ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in13     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in13 ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in14     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in14 ; Input  ; Info     ; Stuck at GND                                    ;
; reset_in15     ; Input  ; Info     ; Stuck at GND                                    ;
; reset_req_in15 ; Input  ; Info     ; Stuck at GND                                    ;
+----------------+--------+----------+-------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator" ;
+------------------------+--------+----------+--------------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                                      ;
+------------------------+--------+----------+--------------------------------------------------------------------------------------------------------------+
; av_begintransfer       ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_beginbursttransfer  ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_writebyteenable     ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_lock                ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_chipselect          ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_clken               ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; uav_clken              ; Input  ; Info     ; Stuck at GND                                                                                                 ;
; av_outputenable        ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; uav_response           ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_response            ; Input  ; Info     ; Stuck at GND                                                                                                 ;
; uav_writeresponsevalid ; Output ; Info     ; Explicitly unconnected                                                                                       ;
; av_writeresponsevalid  ; Input  ; Info     ; Stuck at GND                                                                                                 ;
+------------------------+--------+----------+--------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator" ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                                                   ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------------------+
; av_address             ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_burstcount          ; Input  ; Info     ; Stuck at VCC                                                                                                              ;
; av_byteenable          ; Input  ; Info     ; Stuck at VCC                                                                                                              ;
; av_beginbursttransfer  ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_begintransfer       ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_chipselect          ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_read                ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_readdata            ; Output ; Info     ; Explicitly unconnected                                                                                                    ;
; av_readdatavalid       ; Output ; Info     ; Explicitly unconnected                                                                                                    ;
; av_lock                ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_debugaccess         ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; uav_clken              ; Output ; Info     ; Explicitly unconnected                                                                                                    ;
; av_clken               ; Input  ; Info     ; Stuck at VCC                                                                                                              ;
; uav_response           ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_response            ; Output ; Info     ; Explicitly unconnected                                                                                                    ;
; uav_writeresponsevalid ; Input  ; Info     ; Stuck at GND                                                                                                              ;
; av_writeresponsevalid  ; Output ; Info     ; Explicitly unconnected                                                                                                    ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator" ;
+------------------------+--------+----------+----------------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                                        ;
+------------------------+--------+----------+----------------------------------------------------------------------------------------------------------------+
; av_address             ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_begintransfer       ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_beginbursttransfer  ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_burstcount          ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_byteenable          ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_writebyteenable     ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_lock                ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_chipselect          ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_clken               ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; uav_clken              ; Input  ; Info     ; Stuck at GND                                                                                                   ;
; av_debugaccess         ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_outputenable        ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; uav_response           ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_response            ; Input  ; Info     ; Stuck at GND                                                                                                   ;
; uav_writeresponsevalid ; Output ; Info     ; Explicitly unconnected                                                                                         ;
; av_writeresponsevalid  ; Input  ; Info     ; Stuck at GND                                                                                                   ;
+------------------------+--------+----------+----------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator" ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                                       ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------+
; av_beginbursttransfer  ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; av_begintransfer       ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; av_chipselect          ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; av_lock                ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; uav_clken              ; Output ; Info     ; Explicitly unconnected                                                                                        ;
; av_clken               ; Input  ; Info     ; Stuck at VCC                                                                                                  ;
; uav_response           ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; av_response            ; Output ; Info     ; Explicitly unconnected                                                                                        ;
; uav_writeresponsevalid ; Input  ; Info     ; Stuck at GND                                                                                                  ;
; av_writeresponsevalid  ; Output ; Info     ; Explicitly unconnected                                                                                        ;
+------------------------+--------+----------+---------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i"                                                                                     ;
+-------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port              ; Type   ; Severity ; Details                                                                                                                                      ;
+-------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; fboutclk          ; Output ; Info     ; Explicitly unconnected                                                                                                                       ;
; fbclk             ; Input  ; Info     ; Stuck at GND                                                                                                                                 ;
; refclk1           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; phase_en          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; updn              ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; num_phase_shifts  ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; scanclk           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; cntsel            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; reconfig_to_pll   ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; extswitch         ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; adjpllin          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; cclk              ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; phase_done        ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; reconfig_from_pll ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; activeclk         ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; clkbad            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; phout             ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; lvds_clk          ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; loaden            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; extclk_out        ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; cascade_out       ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; zdbfbclk          ; Bidir  ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
+-------------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0" ;
+--------+--------+----------+---------------------------------------------+
; Port   ; Type   ; Severity ; Details                                     ;
+--------+--------+----------+---------------------------------------------+
; locked ; Output ; Info     ; Explicitly unconnected                      ;
+--------+--------+----------+---------------------------------------------+


+-----------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0" ;
+-------------+--------+----------+-------------------------------------------------+
; Port        ; Type   ; Severity ; Details                                         ;
+-------------+--------+----------+-------------------------------------------------+
; s0_response ; Output ; Info     ; Explicitly unconnected                          ;
; m0_response ; Input  ; Info     ; Stuck at GND                                    ;
+-------------+--------+----------+-------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_add:add_imag_c" ;
+--------+-------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port   ; Type  ; Severity ; Details                                                                                                                                                         ;
+--------+-------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; rhs[0] ; Input ; Info     ; Stuck at GND                                                                                                                                                    ;
+--------+-------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_two_real_imag" ;
+---------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                                                                                                                ;
+---------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; res[26] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                                                    ;
+---------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst"                                                ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                                                                                                                            ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; max_iter       ; Input  ; Warning  ; Input port expression (32 bits) is wider than the input port (8 bits) it drives.  The 24 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; max_iter[7..0] ; Input  ; Info     ; Stuck at VCC                                                                                                                                                                       ;
; is_inside      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                                                                ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core" ;
+------+--------+----------+---------------------------------------------------------------------------------------------------------------+
; Port ; Type   ; Severity ; Details                                                                                                       ;
+------+--------+----------+---------------------------------------------------------------------------------------------------------------+
; busy ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                           ;
+------+--------+----------+---------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_imag" ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port        ; Type  ; Severity ; Details                                                                                               ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; lhs[15..14] ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[12..11] ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[6..4]   ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[26..16] ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[8..7]   ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[1..0]   ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[13]     ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[10]     ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[9]      ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[3]      ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[2]      ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real" ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port        ; Type  ; Severity ; Details                                                                                               ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; lhs[15..12] ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[8..6]   ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[1..0]   ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[26..16] ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[5..2]   ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[11]     ; Input ; Info     ; Stuck at GND                                                                                          ;
; lhs[10]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
; lhs[9]      ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx" ;
+------------------+-------+----------+---------------------------------------------------+
; Port             ; Type  ; Severity ; Details                                           ;
+------------------+-------+----------+---------------------------------------------------+
; rgb_data[20..16] ; Input ; Info     ; Stuck at GND                                      ;
; rgb_data[12..8]  ; Input ; Info     ; Stuck at GND                                      ;
; rgb_data[5..0]   ; Input ; Info     ; Stuck at GND                                      ;
+------------------+-------+----------+---------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k"                                                           ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                                                                                                      ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; we_b    ; Input ; Info     ; Stuck at GND                                                                                                                                 ;
; wdata_b ; Input ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k"                                                          ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                                                                                                      ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; we_b    ; Input ; Info     ; Stuck at GND                                                                                                                                 ;
; wdata_b ; Input ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
+---------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd"                                                                                                                     ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                                                                                                                            ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_NUM       ; Input  ; Warning  ; Input port expression (32 bits) is wider than the input port (8 bits) it drives.  The 24 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; BYTE_NUM[7..2] ; Input  ; Info     ; Stuck at GND                                                                                                                                                                       ;
; BYTE_NUM[1]    ; Input  ; Info     ; Stuck at VCC                                                                                                                                                                       ;
; BYTE_NUM[0]    ; Input  ; Info     ; Stuck at GND                                                                                                                                                                       ;
; ST             ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                                                           ;
; CNT            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                                                           ;
; BYTE           ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                                                           ;
+----------------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0"                                                                                        ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type  ; Severity ; Details                                                                                                                                      ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; W_R  ; Input ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "I2C_HDMI_Config:u_I2C_HDMI_Config"                                                                        ;
+-------+--------+----------+----------------------------------------------------------------------------------------------------------+
; Port  ; Type   ; Severity ; Details                                                                                                  ;
+-------+--------+----------+----------------------------------------------------------------------------------------------------------+
; READY ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed. ;
+-------+--------+----------+----------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "pll:my_pll"                                                                             ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; Port     ; Type   ; Severity ; Details                                                                             ;
+----------+--------+----------+-------------------------------------------------------------------------------------+
; outclk_1 ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------+
; Post-Synthesis Netlist Statistics for Top Partition ;
+-----------------------+-----------------------------+
; Type                  ; Count                       ;
+-----------------------+-----------------------------+
; arriav_ff             ; 546                         ;
;     CLR               ; 161                         ;
;     CLR SCLR          ; 64                          ;
;     ENA               ; 70                          ;
;     ENA CLR           ; 99                          ;
;     ENA CLR SCLR      ; 22                          ;
;     ENA CLR SLD       ; 29                          ;
;     ENA SCLR          ; 17                          ;
;     ENA SLD           ; 8                           ;
;     SCLR              ; 58                          ;
;     plain             ; 18                          ;
; arriav_io_obuf        ; 23                          ;
; arriav_lcell_comb     ; 758                         ;
;     arith             ; 253                         ;
;         0 data inputs ; 1                           ;
;         1 data inputs ; 174                         ;
;         2 data inputs ; 78                          ;
;     extend            ; 13                          ;
;         7 data inputs ; 13                          ;
;     normal            ; 437                         ;
;         0 data inputs ; 1                           ;
;         1 data inputs ; 2                           ;
;         2 data inputs ; 28                          ;
;         3 data inputs ; 27                          ;
;         4 data inputs ; 108                         ;
;         5 data inputs ; 99                          ;
;         6 data inputs ; 172                         ;
;     shared            ; 55                          ;
;         0 data inputs ; 1                           ;
;         1 data inputs ; 8                           ;
;         2 data inputs ; 36                          ;
;         3 data inputs ; 8                           ;
;         4 data inputs ; 2                           ;
; arriav_mac            ; 3                           ;
; boundary_port         ; 73                          ;
; generic_pll           ; 2                           ;
; stratixv_ram_block    ; 320                         ;
;                       ;                             ;
; Max LUT depth         ; 6.20                        ;
; Average LUT depth     ; 2.65                        ;
+-----------------------+-----------------------------+


+-------------------------------+
; Elapsed Time Per Partition    ;
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top            ; 00:00:01     ;
+----------------+--------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus Prime Analysis & Synthesis
    Info: Version 23.1std.0 Build 991 11/28/2023 SC Lite Edition
    Info: Processing started: Sat Jul  6 13:26:30 2024
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off MANDELBROT_HW -c MANDELBROT_HW
Warning (12473): User specified to use only one processors but 16 processors were detected which could be used to decrease run time.
Info (12021): Found 1 design units, including 1 entities, in source file pll/pll.v
    Info (12023): Found entity 1: pll File: D:/software/verilog/MANDELBROT_HW/pll/pll.v Line: 8
Info (12021): Found 1 design units, including 1 entities, in source file pll/pll/pll_0002.v
    Info (12023): Found entity 1: pll_0002 File: D:/software/verilog/MANDELBROT_HW/pll/pll/pll_0002.v Line: 2
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/mandebrot_plot.v
    Info (12023): Found entity 1: mandebrot_plot File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 6
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/altera_reset_controller.v
    Info (12023): Found entity 1: altera_reset_controller File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_controller.v Line: 42
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/altera_reset_synchronizer.v
    Info (12023): Found entity 1: altera_reset_synchronizer File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_synchronizer.v Line: 24
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v
    Info (12023): Found entity 1: mandebrot_plot_mm_interconnect_1 File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v Line: 9
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/altera_merlin_slave_translator.sv
    Info (12023): Found entity 1: altera_merlin_slave_translator File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_merlin_slave_translator.sv Line: 35
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/altera_merlin_master_translator.sv
    Info (12023): Found entity 1: altera_merlin_master_translator File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_merlin_master_translator.sv Line: 32
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v
    Info (12023): Found entity 1: mandebrot_plot_mm_interconnect_0 File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v Line: 9
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v
    Info (12023): Found entity 1: mandebrot_plot_pll_0 File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v Line: 2
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/altera_avalon_mm_bridge.v
    Info (12023): Found entity 1: altera_avalon_mm_bridge File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_avalon_mm_bridge.v Line: 25
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mand_total_single_sys.v
    Info (12023): Found entity 1: mand_total_sys File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mand_total_single_sys.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v
    Info (12023): Found entity 1: mandelbrot_single_sys File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandelbrot_core.v
    Info (12023): Found entity 1: mandelbrot_core File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_core.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/mandelbrot_calc.v
    Info (12023): Found entity 1: mandelbrot_calc File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_calc.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/fxp_mult.v
    Info (12023): Found entity 1: fxp_mult File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/fxp_mult.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/fxp_add.v
    Info (12023): Found entity 1: fxp_add File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/fxp_add.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/hdmi_display_sys.v
    Info (12023): Found entity 1: hdmi_display_sys File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/dpram.v
    Info (12023): Found entity 1: dpram File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/dpram.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/framebuffer_dpram.v
    Info (12023): Found entity 1: framebuffer_dpram File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file mandebrot_plot/synthesis/submodules/hdmi_tx.v
    Info (12023): Found entity 1: hdmi_tx File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_tx.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file i2c_write_wdata.v
    Info (12023): Found entity 1: I2C_WRITE_WDATA File: D:/software/verilog/MANDELBROT_HW/I2C_WRITE_WDATA.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file i2c_hdmi_config.v
    Info (12023): Found entity 1: I2C_HDMI_Config File: D:/software/verilog/MANDELBROT_HW/I2C_HDMI_Config.v Line: 1
Info (12021): Found 1 design units, including 1 entities, in source file i2c_controller.v
    Info (12023): Found entity 1: I2C_Controller File: D:/software/verilog/MANDELBROT_HW/I2C_Controller.v Line: 43
Warning (12125): Using design file mandelbrot_hw.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info (12023): Found entity 1: MANDELBROT_HW File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 6
Info (12127): Elaborating entity "MANDELBROT_HW" for the top level hierarchy
Warning (10034): Output port "LED[7..3]" at mandelbrot_hw.v(41) has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
Warning (10034): Output port "ADC_CONVST" at mandelbrot_hw.v(9) has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 9
Warning (10034): Output port "ADC_SCK" at mandelbrot_hw.v(10) has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 10
Warning (10034): Output port "ADC_SDI" at mandelbrot_hw.v(11) has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 11
Info (12128): Elaborating entity "pll" for hierarchy "pll:my_pll" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 71
Info (12128): Elaborating entity "pll_0002" for hierarchy "pll:my_pll|pll_0002:pll_inst" File: D:/software/verilog/MANDELBROT_HW/pll/pll.v Line: 22
Info (12128): Elaborating entity "altera_pll" for hierarchy "pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i" File: D:/software/verilog/MANDELBROT_HW/pll/pll/pll_0002.v Line: 88
Info (10008): Verilog HDL or VHDL information: EDA Netlist Writer cannot regroup multidimensional array "wire_to_nowhere_64" into its bus
Info (12130): Elaborated megafunction instantiation "pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i" File: D:/software/verilog/MANDELBROT_HW/pll/pll/pll_0002.v Line: 88
Info (12133): Instantiated megafunction "pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i" with the following parameter: File: D:/software/verilog/MANDELBROT_HW/pll/pll/pll_0002.v Line: 88
    Info (12134): Parameter "fractional_vco_multiplier" = "false"
    Info (12134): Parameter "reference_clock_frequency" = "50.0 MHz"
    Info (12134): Parameter "operation_mode" = "direct"
    Info (12134): Parameter "number_of_clocks" = "2"
    Info (12134): Parameter "output_clock_frequency0" = "25.175644 MHz"
    Info (12134): Parameter "phase_shift0" = "0 ps"
    Info (12134): Parameter "duty_cycle0" = "50"
    Info (12134): Parameter "output_clock_frequency1" = "102.380952 MHz"
    Info (12134): Parameter "phase_shift1" = "0 ps"
    Info (12134): Parameter "duty_cycle1" = "50"
    Info (12134): Parameter "output_clock_frequency2" = "0 MHz"
    Info (12134): Parameter "phase_shift2" = "0 ps"
    Info (12134): Parameter "duty_cycle2" = "50"
    Info (12134): Parameter "output_clock_frequency3" = "0 MHz"
    Info (12134): Parameter "phase_shift3" = "0 ps"
    Info (12134): Parameter "duty_cycle3" = "50"
    Info (12134): Parameter "output_clock_frequency4" = "0 MHz"
    Info (12134): Parameter "phase_shift4" = "0 ps"
    Info (12134): Parameter "duty_cycle4" = "50"
    Info (12134): Parameter "output_clock_frequency5" = "0 MHz"
    Info (12134): Parameter "phase_shift5" = "0 ps"
    Info (12134): Parameter "duty_cycle5" = "50"
    Info (12134): Parameter "output_clock_frequency6" = "0 MHz"
    Info (12134): Parameter "phase_shift6" = "0 ps"
    Info (12134): Parameter "duty_cycle6" = "50"
    Info (12134): Parameter "output_clock_frequency7" = "0 MHz"
    Info (12134): Parameter "phase_shift7" = "0 ps"
    Info (12134): Parameter "duty_cycle7" = "50"
    Info (12134): Parameter "output_clock_frequency8" = "0 MHz"
    Info (12134): Parameter "phase_shift8" = "0 ps"
    Info (12134): Parameter "duty_cycle8" = "50"
    Info (12134): Parameter "output_clock_frequency9" = "0 MHz"
    Info (12134): Parameter "phase_shift9" = "0 ps"
    Info (12134): Parameter "duty_cycle9" = "50"
    Info (12134): Parameter "output_clock_frequency10" = "0 MHz"
    Info (12134): Parameter "phase_shift10" = "0 ps"
    Info (12134): Parameter "duty_cycle10" = "50"
    Info (12134): Parameter "output_clock_frequency11" = "0 MHz"
    Info (12134): Parameter "phase_shift11" = "0 ps"
    Info (12134): Parameter "duty_cycle11" = "50"
    Info (12134): Parameter "output_clock_frequency12" = "0 MHz"
    Info (12134): Parameter "phase_shift12" = "0 ps"
    Info (12134): Parameter "duty_cycle12" = "50"
    Info (12134): Parameter "output_clock_frequency13" = "0 MHz"
    Info (12134): Parameter "phase_shift13" = "0 ps"
    Info (12134): Parameter "duty_cycle13" = "50"
    Info (12134): Parameter "output_clock_frequency14" = "0 MHz"
    Info (12134): Parameter "phase_shift14" = "0 ps"
    Info (12134): Parameter "duty_cycle14" = "50"
    Info (12134): Parameter "output_clock_frequency15" = "0 MHz"
    Info (12134): Parameter "phase_shift15" = "0 ps"
    Info (12134): Parameter "duty_cycle15" = "50"
    Info (12134): Parameter "output_clock_frequency16" = "0 MHz"
    Info (12134): Parameter "phase_shift16" = "0 ps"
    Info (12134): Parameter "duty_cycle16" = "50"
    Info (12134): Parameter "output_clock_frequency17" = "0 MHz"
    Info (12134): Parameter "phase_shift17" = "0 ps"
    Info (12134): Parameter "duty_cycle17" = "50"
    Info (12134): Parameter "pll_type" = "General"
    Info (12134): Parameter "pll_subtype" = "General"
Info (12128): Elaborating entity "I2C_HDMI_Config" for hierarchy "I2C_HDMI_Config:u_I2C_HDMI_Config" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 78
Warning (10230): Verilog HDL assignment warning at I2C_HDMI_Config.v(48): truncated value with size 32 to match size of target (16) File: D:/software/verilog/MANDELBROT_HW/I2C_HDMI_Config.v Line: 48
Warning (10230): Verilog HDL assignment warning at I2C_HDMI_Config.v(98): truncated value with size 32 to match size of target (6) File: D:/software/verilog/MANDELBROT_HW/I2C_HDMI_Config.v Line: 98
Info (12128): Elaborating entity "I2C_Controller" for hierarchy "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0" File: D:/software/verilog/MANDELBROT_HW/I2C_HDMI_Config.v Line: 64
Warning (10230): Verilog HDL assignment warning at I2C_Controller.v(57): truncated value with size 32 to match size of target (1) File: D:/software/verilog/MANDELBROT_HW/I2C_Controller.v Line: 57
Info (12128): Elaborating entity "I2C_WRITE_WDATA" for hierarchy "I2C_HDMI_Config:u_I2C_HDMI_Config|I2C_Controller:u0|I2C_WRITE_WDATA:wrd" File: D:/software/verilog/MANDELBROT_HW/I2C_Controller.v Line: 71
Warning (10230): Verilog HDL assignment warning at I2C_WRITE_WDATA.v(54): truncated value with size 32 to match size of target (8) File: D:/software/verilog/MANDELBROT_HW/I2C_WRITE_WDATA.v Line: 54
Info (12128): Elaborating entity "mandebrot_plot" for hierarchy "mandebrot_plot:u0" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 89
Info (12128): Elaborating entity "hdmi_display_sys" for hierarchy "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 63
Warning (10235): Verilog HDL Always Construct warning at hdmi_display_sys.v(134): variable "avs_s0_read" is read inside the Always Construct but isn't in the Always Construct's Event Control File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 134
Warning (10235): Verilog HDL Always Construct warning at hdmi_display_sys.v(136): variable "hps_rrgb" is read inside the Always Construct but isn't in the Always Construct's Event Control File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 136
Warning (10235): Verilog HDL Always Construct warning at hdmi_display_sys.v(145): variable "avs_s0_read" is read inside the Always Construct but isn't in the Always Construct's Event Control File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 145
Warning (10240): Verilog HDL Always Construct warning at hdmi_display_sys.v(123): inferring latch(es) for variable "rgb_data", which holds its previous value in one or more paths through the always construct File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Warning (10240): Verilog HDL Always Construct warning at hdmi_display_sys.v(123): inferring latch(es) for variable "hps_read", which holds its previous value in one or more paths through the always construct File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Warning (10240): Verilog HDL Always Construct warning at hdmi_display_sys.v(123): inferring latch(es) for variable "hps_write", which holds its previous value in one or more paths through the always construct File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Warning (10240): Verilog HDL Always Construct warning at hdmi_display_sys.v(123): inferring latch(es) for variable "avs_s0_readdatavalid", which holds its previous value in one or more paths through the always construct File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "avs_s0_readdatavalid" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "hps_write" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "hps_read" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[0]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[1]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[2]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[3]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[4]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[5]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[6]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (10041): Inferred latch for "rgb_data[7]" at hdmi_display_sys.v(123) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 123
Info (12128): Elaborating entity "framebuffer_dpram" for hierarchy "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 75
Warning (10230): Verilog HDL assignment warning at framebuffer_dpram.v(62): truncated value with size 32 to match size of target (19) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v Line: 62
Warning (10230): Verilog HDL assignment warning at framebuffer_dpram.v(63): truncated value with size 32 to match size of target (19) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v Line: 63
Info (12128): Elaborating entity "dpram" for hierarchy "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v Line: 38
Info (12128): Elaborating entity "dpram" for hierarchy "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/framebuffer_dpram.v Line: 48
Info (12128): Elaborating entity "hdmi_tx" for hierarchy "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|hdmi_tx:tx" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_display_sys.v Line: 96
Warning (10036): Verilog HDL or VHDL warning at hdmi_tx.v(39): object "color_mode" assigned a value but never read File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/hdmi_tx.v Line: 39
Info (12128): Elaborating entity "mand_total_sys" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 76
Info (12128): Elaborating entity "mandelbrot_single_sys" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mand_total_single_sys.v Line: 27
Warning (10230): Verilog HDL assignment warning at mandelbrot_single_sys.v(28): truncated value with size 32 to match size of target (27) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 28
Info (10264): Verilog HDL Case Statement information at mandelbrot_single_sys.v(75): all case item expressions in this case statement are onehot File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 75
Info (12128): Elaborating entity "fxp_add" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|fxp_add:incre_real" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 46
Info (12128): Elaborating entity "mandelbrot_core" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 59
Info (12128): Elaborating entity "mandelbrot_calc" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_core.v Line: 31
Warning (10230): Verilog HDL assignment warning at mandelbrot_calc.v(68): truncated value with size 32 to match size of target (8) File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_calc.v Line: 68
Info (10264): Verilog HDL Case Statement information at mandelbrot_calc.v(52): all case item expressions in this case statement are onehot File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_calc.v Line: 52
Info (12128): Elaborating entity "fxp_mult" for hierarchy "mandebrot_plot:u0|mand_total_sys:mand_total_single_sys_0|mandelbrot_single_sys:mand_sys|mandelbrot_core:core|mandelbrot_calc:mandelbrot_inst|fxp_mult:mult_real_sq" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_calc.v Line: 28
Info (12128): Elaborating entity "altera_avalon_mm_bridge" for hierarchy "mandebrot_plot:u0|altera_avalon_mm_bridge:mm_bridge_0" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 110
Info (12128): Elaborating entity "mandebrot_plot_pll_0" for hierarchy "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 117
Info (12128): Elaborating entity "altera_pll" for hierarchy "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v Line: 85
Info (10008): Verilog HDL or VHDL information: EDA Netlist Writer cannot regroup multidimensional array "wire_to_nowhere_64" into its bus
Info (12130): Elaborated megafunction instantiation "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v Line: 85
Info (12133): Instantiated megafunction "mandebrot_plot:u0|mandebrot_plot_pll_0:pll_0|altera_pll:altera_pll_i" with the following parameter: File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_pll_0.v Line: 85
    Info (12134): Parameter "fractional_vco_multiplier" = "false"
    Info (12134): Parameter "reference_clock_frequency" = "50.0 MHz"
    Info (12134): Parameter "operation_mode" = "direct"
    Info (12134): Parameter "number_of_clocks" = "1"
    Info (12134): Parameter "output_clock_frequency0" = "100.000000 MHz"
    Info (12134): Parameter "phase_shift0" = "0 ps"
    Info (12134): Parameter "duty_cycle0" = "50"
    Info (12134): Parameter "output_clock_frequency1" = "0 MHz"
    Info (12134): Parameter "phase_shift1" = "0 ps"
    Info (12134): Parameter "duty_cycle1" = "50"
    Info (12134): Parameter "output_clock_frequency2" = "0 MHz"
    Info (12134): Parameter "phase_shift2" = "0 ps"
    Info (12134): Parameter "duty_cycle2" = "50"
    Info (12134): Parameter "output_clock_frequency3" = "0 MHz"
    Info (12134): Parameter "phase_shift3" = "0 ps"
    Info (12134): Parameter "duty_cycle3" = "50"
    Info (12134): Parameter "output_clock_frequency4" = "0 MHz"
    Info (12134): Parameter "phase_shift4" = "0 ps"
    Info (12134): Parameter "duty_cycle4" = "50"
    Info (12134): Parameter "output_clock_frequency5" = "0 MHz"
    Info (12134): Parameter "phase_shift5" = "0 ps"
    Info (12134): Parameter "duty_cycle5" = "50"
    Info (12134): Parameter "output_clock_frequency6" = "0 MHz"
    Info (12134): Parameter "phase_shift6" = "0 ps"
    Info (12134): Parameter "duty_cycle6" = "50"
    Info (12134): Parameter "output_clock_frequency7" = "0 MHz"
    Info (12134): Parameter "phase_shift7" = "0 ps"
    Info (12134): Parameter "duty_cycle7" = "50"
    Info (12134): Parameter "output_clock_frequency8" = "0 MHz"
    Info (12134): Parameter "phase_shift8" = "0 ps"
    Info (12134): Parameter "duty_cycle8" = "50"
    Info (12134): Parameter "output_clock_frequency9" = "0 MHz"
    Info (12134): Parameter "phase_shift9" = "0 ps"
    Info (12134): Parameter "duty_cycle9" = "50"
    Info (12134): Parameter "output_clock_frequency10" = "0 MHz"
    Info (12134): Parameter "phase_shift10" = "0 ps"
    Info (12134): Parameter "duty_cycle10" = "50"
    Info (12134): Parameter "output_clock_frequency11" = "0 MHz"
    Info (12134): Parameter "phase_shift11" = "0 ps"
    Info (12134): Parameter "duty_cycle11" = "50"
    Info (12134): Parameter "output_clock_frequency12" = "0 MHz"
    Info (12134): Parameter "phase_shift12" = "0 ps"
    Info (12134): Parameter "duty_cycle12" = "50"
    Info (12134): Parameter "output_clock_frequency13" = "0 MHz"
    Info (12134): Parameter "phase_shift13" = "0 ps"
    Info (12134): Parameter "duty_cycle13" = "50"
    Info (12134): Parameter "output_clock_frequency14" = "0 MHz"
    Info (12134): Parameter "phase_shift14" = "0 ps"
    Info (12134): Parameter "duty_cycle14" = "50"
    Info (12134): Parameter "output_clock_frequency15" = "0 MHz"
    Info (12134): Parameter "phase_shift15" = "0 ps"
    Info (12134): Parameter "duty_cycle15" = "50"
    Info (12134): Parameter "output_clock_frequency16" = "0 MHz"
    Info (12134): Parameter "phase_shift16" = "0 ps"
    Info (12134): Parameter "duty_cycle16" = "50"
    Info (12134): Parameter "output_clock_frequency17" = "0 MHz"
    Info (12134): Parameter "phase_shift17" = "0 ps"
    Info (12134): Parameter "duty_cycle17" = "50"
    Info (12134): Parameter "pll_type" = "General"
    Info (12134): Parameter "pll_subtype" = "General"
Info (12128): Elaborating entity "mandebrot_plot_mm_interconnect_0" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 138
Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_master_translator:mm_bridge_0_m0_translator" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v Line: 100
Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_0:mm_interconnect_0|altera_merlin_slave_translator:hdmi_driver_0_s0_translator" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_0.v Line: 164
Info (12128): Elaborating entity "mandebrot_plot_mm_interconnect_1" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 156
Info (12128): Elaborating entity "altera_merlin_master_translator" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_master_translator:mand_total_single_sys_0_m0_translator" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v Line: 97
Info (12128): Elaborating entity "altera_merlin_slave_translator" for hierarchy "mandebrot_plot:u0|mandebrot_plot_mm_interconnect_1:mm_interconnect_1|altera_merlin_slave_translator:mm_bridge_0_s0_translator" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandebrot_plot_mm_interconnect_1.v Line: 161
Info (12128): Elaborating entity "altera_reset_controller" for hierarchy "mandebrot_plot:u0|altera_reset_controller:rst_controller" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/mandebrot_plot.v Line: 219
Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_sync_uq1" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_controller.v Line: 208
Info (12128): Elaborating entity "altera_reset_synchronizer" for hierarchy "mandebrot_plot:u0|altera_reset_controller:rst_controller|altera_reset_synchronizer:alt_rst_req_sync_uq1" File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/altera_reset_controller.v Line: 220
Warning (14284): Synthesized away the following node(s):
    Warning (14285): Synthesized away the following PLL node(s):
        Warning (14320): Synthesized away node "pll:my_pll|pll_0002:pll_inst|altera_pll:altera_pll_i|outclk_wire[1]" File: e:/software/quartus-lite-23.1/fpga/quartus/libraries/megafunctions/altera_pll.v Line: 749
Info (276014): Found 2 instances of uninferred RAM logic
    Info (276007): RAM logic "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|ram" is uninferred due to asynchronous read logic File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/dpram.v Line: 12
    Info (276007): RAM logic "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|ram" is uninferred due to asynchronous read logic File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/dpram.v Line: 12
Info (19000): Inferred 2 megafunctions from design logic
    Info (276029): Inferred altsyncram megafunction from the following design logic: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|ram_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
        Info (286033): Parameter WIDTH_A set to 8
        Info (286033): Parameter WIDTHAD_A set to 16
        Info (286033): Parameter NUMWORDS_A set to 65536
        Info (286033): Parameter WIDTH_B set to 8
        Info (286033): Parameter WIDTHAD_B set to 16
        Info (286033): Parameter NUMWORDS_B set to 65536
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_B set to NONE
        Info (286033): Parameter OUTDATA_ACLR_B set to NONE
        Info (286033): Parameter ADDRESS_REG_B set to CLOCK0
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
        Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
    Info (276029): Inferred altsyncram megafunction from the following design logic: "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|ram_rtl_0" 
        Info (286033): Parameter OPERATION_MODE set to DUAL_PORT
        Info (286033): Parameter WIDTH_A set to 8
        Info (286033): Parameter WIDTHAD_A set to 18
        Info (286033): Parameter NUMWORDS_A set to 262144
        Info (286033): Parameter WIDTH_B set to 8
        Info (286033): Parameter WIDTHAD_B set to 18
        Info (286033): Parameter NUMWORDS_B set to 262144
        Info (286033): Parameter ADDRESS_ACLR_A set to NONE
        Info (286033): Parameter OUTDATA_REG_B set to UNREGISTERED
        Info (286033): Parameter ADDRESS_ACLR_B set to NONE
        Info (286033): Parameter OUTDATA_ACLR_B set to NONE
        Info (286033): Parameter ADDRESS_REG_B set to CLOCK0
        Info (286033): Parameter INDATA_ACLR_A set to NONE
        Info (286033): Parameter WRCONTROL_ACLR_A set to NONE
        Info (286033): Parameter READ_DURING_WRITE_MODE_MIXED_PORTS set to OLD_DATA
Info (12130): Elaborated megafunction instantiation "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0"
Info (12133): Instantiated megafunction "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_64k|altsyncram:ram_rtl_0" with the following parameter:
    Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
    Info (12134): Parameter "WIDTH_A" = "8"
    Info (12134): Parameter "WIDTHAD_A" = "16"
    Info (12134): Parameter "NUMWORDS_A" = "65536"
    Info (12134): Parameter "WIDTH_B" = "8"
    Info (12134): Parameter "WIDTHAD_B" = "16"
    Info (12134): Parameter "NUMWORDS_B" = "65536"
    Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
    Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
    Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
    Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
    Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0"
    Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
    Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
    Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_gdn1.tdf
    Info (12023): Found entity 1: altsyncram_gdn1 File: D:/software/verilog/MANDELBROT_HW/db/altsyncram_gdn1.tdf Line: 32
Info (12021): Found 1 design units, including 1 entities, in source file db/decode_dla.tdf
    Info (12023): Found entity 1: decode_dla File: D:/software/verilog/MANDELBROT_HW/db/decode_dla.tdf Line: 23
Info (12021): Found 1 design units, including 1 entities, in source file db/mux_tfb.tdf
    Info (12023): Found entity 1: mux_tfb File: D:/software/verilog/MANDELBROT_HW/db/mux_tfb.tdf Line: 23
Info (12130): Elaborated megafunction instantiation "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0"
Info (12133): Instantiated megafunction "mandebrot_plot:u0|hdmi_display_sys:hdmi_driver_0|framebuffer_dpram:fb|dpram:mem_256k|altsyncram:ram_rtl_0" with the following parameter:
    Info (12134): Parameter "OPERATION_MODE" = "DUAL_PORT"
    Info (12134): Parameter "WIDTH_A" = "8"
    Info (12134): Parameter "WIDTHAD_A" = "18"
    Info (12134): Parameter "NUMWORDS_A" = "262144"
    Info (12134): Parameter "WIDTH_B" = "8"
    Info (12134): Parameter "WIDTHAD_B" = "18"
    Info (12134): Parameter "NUMWORDS_B" = "262144"
    Info (12134): Parameter "ADDRESS_ACLR_A" = "NONE"
    Info (12134): Parameter "OUTDATA_REG_B" = "UNREGISTERED"
    Info (12134): Parameter "ADDRESS_ACLR_B" = "NONE"
    Info (12134): Parameter "OUTDATA_ACLR_B" = "NONE"
    Info (12134): Parameter "ADDRESS_REG_B" = "CLOCK0"
    Info (12134): Parameter "INDATA_ACLR_A" = "NONE"
    Info (12134): Parameter "WRCONTROL_ACLR_A" = "NONE"
    Info (12134): Parameter "READ_DURING_WRITE_MODE_MIXED_PORTS" = "OLD_DATA"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8gn1.tdf
    Info (12023): Found entity 1: altsyncram_8gn1 File: D:/software/verilog/MANDELBROT_HW/db/altsyncram_8gn1.tdf Line: 32
Info (12021): Found 1 design units, including 1 entities, in source file db/decode_sma.tdf
    Info (12023): Found entity 1: decode_sma File: D:/software/verilog/MANDELBROT_HW/db/decode_sma.tdf Line: 23
Info (12021): Found 1 design units, including 1 entities, in source file db/mux_chb.tdf
    Info (12023): Found entity 1: mux_chb File: D:/software/verilog/MANDELBROT_HW/db/mux_chb.tdf Line: 23
Warning (12241): 7 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Warning (13034): The following nodes have both tri-state and non-tri-state drivers
    Warning (13035): Inserted always-enabled tri-state buffer between "HDMI_I2C_SCL" and its non-tri-state driver. File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 24
Warning (13039): The following bidirectional pins have no drivers
    Warning (13040): bidirectional pin "ARDUINO_IO[0]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[1]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[2]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[3]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[4]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[5]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[6]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[7]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[8]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[9]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[10]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[11]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[12]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[13]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[14]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_IO[15]" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 15
    Warning (13040): bidirectional pin "ARDUINO_RESET_N" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 16
    Warning (13040): bidirectional pin "HDMI_I2S" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 26
    Warning (13040): bidirectional pin "HDMI_LRCLK" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 27
    Warning (13040): bidirectional pin "HDMI_MCLK" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 28
    Warning (13040): bidirectional pin "HDMI_SCLK" has no driver File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 29
Info (13000): Registers with preset signals will power-up high File: D:/software/verilog/MANDELBROT_HW/mandebrot_plot/synthesis/submodules/mandelbrot_single_sys.v Line: 75
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13009): TRI or OPNDRN buffers permanently enabled
    Warning (13010): Node "HDMI_I2C_SCL~synth" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 24
Warning (13024): Output pins are stuck at VCC or GND
    Warning (13410): Pin "ADC_CONVST" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 9
    Warning (13410): Pin "ADC_SCK" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 10
    Warning (13410): Pin "ADC_SDI" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 11
    Warning (13410): Pin "LED[3]" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
    Warning (13410): Pin "LED[4]" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
    Warning (13410): Pin "LED[5]" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
    Warning (13410): Pin "LED[6]" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
    Warning (13410): Pin "LED[7]" is stuck at GND File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 41
Info (286030): Timing-Driven Synthesis is running
Info (17049): 6 registers lost all their fanouts during netlist optimizations.
Info (144001): Generated suppressed messages file D:/software/verilog/MANDELBROT_HW/MANDELBROT_HW.map.smsg
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
    Info (16011): Adding 8 node(s), including 0 DDIO, 2 PLL, 0 transceiver and 0 LCELL
Warning (21074): Design contains 6 input pin(s) that do not drive logic
    Warning (15610): No output dependent on input pin "ADC_SDO" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 12
    Warning (15610): No output dependent on input pin "FPGA_CLK3_50" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 21
    Warning (15610): No output dependent on input pin "KEY[1]" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 38
    Warning (15610): No output dependent on input pin "SW[1]" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 45
    Warning (15610): No output dependent on input pin "SW[2]" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 45
    Warning (15610): No output dependent on input pin "SW[3]" File: D:/software/verilog/MANDELBROT_HW/mandelbrot_hw.v Line: 45
Info (21057): Implemented 1366 device resources after synthesis - the final resource count might be different
    Info (21058): Implemented 11 input pins
    Info (21059): Implemented 39 output pins
    Info (21060): Implemented 23 bidirectional pins
    Info (21061): Implemented 968 logic cells
    Info (21064): Implemented 320 RAM segments
    Info (21065): Implemented 2 PLLs
    Info (21062): Implemented 3 DSP elements
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 68 warnings
    Info: Peak virtual memory: 4888 megabytes
    Info: Processing ended: Sat Jul  6 13:27:01 2024
    Info: Elapsed time: 00:00:31
    Info: Total CPU time (on all processors): 00:00:27


+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in D:/software/verilog/MANDELBROT_HW/MANDELBROT_HW.map.smsg.