diff --git a/src/can.rs b/src/can.rs index a1357cfc..82cd95c5 100644 --- a/src/can.rs +++ b/src/can.rs @@ -1,149 +1,139 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - clc: Clc, + clc: CLC, _reserved1: [u8; 0x04], - id: Id, - fdr: Fdr, + id: ID, + fdr: FDR, _reserved3: [u8; 0xf0], - list: [List; 8], + list: [LIST; 8], _reserved4: [u8; 0x20], - mspnd: [Mspnd; 8], + mspnd: [MSPND; 8], _reserved5: [u8; 0x20], - msid: [Msid; 8], + msid: [MSID; 8], _reserved6: [u8; 0x20], - msimask: Msimask, - panctr: Panctr, - mcr: Mcr, - mitr: Mitr, + msimask: MSIMASK, + panctr: PANCTR, + mcr: MCR, + mitr: MITR, } impl RegisterBlock { #[doc = "0x00 - CAN Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &Clc { + pub const fn clc(&self) -> &CLC { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x0c - CAN Fractional Divider Register"] #[inline(always)] - pub const fn fdr(&self) -> &Fdr { + pub const fn fdr(&self) -> &FDR { &self.fdr } #[doc = "0x100..0x120 - List Register"] #[inline(always)] - pub const fn list(&self, n: usize) -> &List { + pub const fn list(&self, n: usize) -> &LIST { &self.list[n] } #[doc = "Iterator for array of:"] #[doc = "0x100..0x120 - List Register"] #[inline(always)] - pub fn list_iter(&self) -> impl Iterator { + pub fn list_iter(&self) -> impl Iterator { self.list.iter() } #[doc = "0x140..0x160 - Message Pending Register"] #[inline(always)] - pub const fn mspnd(&self, n: usize) -> &Mspnd { + pub const fn mspnd(&self, n: usize) -> &MSPND { &self.mspnd[n] } #[doc = "Iterator for array of:"] #[doc = "0x140..0x160 - Message Pending Register"] #[inline(always)] - pub fn mspnd_iter(&self) -> impl Iterator { + pub fn mspnd_iter(&self) -> impl Iterator { self.mspnd.iter() } #[doc = "0x180..0x1a0 - Message Index Register"] #[inline(always)] - pub const fn msid(&self, n: usize) -> &Msid { + pub const fn msid(&self, n: usize) -> &MSID { &self.msid[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x1a0 - Message Index Register"] #[inline(always)] - pub fn msid_iter(&self) -> impl Iterator { + pub fn msid_iter(&self) -> impl Iterator { self.msid.iter() } #[doc = "0x1c0 - Message Index Mask Register"] #[inline(always)] - pub const fn msimask(&self) -> &Msimask { + pub const fn msimask(&self) -> &MSIMASK { &self.msimask } #[doc = "0x1c4 - Panel Control Register"] #[inline(always)] - pub const fn panctr(&self) -> &Panctr { + pub const fn panctr(&self) -> &PANCTR { &self.panctr } #[doc = "0x1c8 - Module Control Register"] #[inline(always)] - pub const fn mcr(&self) -> &Mcr { + pub const fn mcr(&self) -> &MCR { &self.mcr } #[doc = "0x1cc - Module Interrupt Trigger Register"] #[inline(always)] - pub const fn mitr(&self) -> &Mitr { + pub const fn mitr(&self) -> &MITR { &self.mitr } } #[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -#[doc(alias = "CLC")] -pub type Clc = crate::Reg; +pub type CLC = crate::Reg; #[doc = "CAN Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "FDR (rw) register accessor: CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] -#[doc(alias = "FDR")] -pub type Fdr = crate::Reg; +pub type FDR = crate::Reg; #[doc = "CAN Fractional Divider Register"] pub mod fdr; #[doc = "LIST (r) register accessor: List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@list`] module"] -#[doc(alias = "LIST")] -pub type List = crate::Reg; +pub type LIST = crate::Reg; #[doc = "List Register"] pub mod list; #[doc = "MSPND (rw) register accessor: Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspnd`] module"] -#[doc(alias = "MSPND")] -pub type Mspnd = crate::Reg; +pub type MSPND = crate::Reg; #[doc = "Message Pending Register"] pub mod mspnd; #[doc = "MSID (r) register accessor: Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msid`] module"] -#[doc(alias = "MSID")] -pub type Msid = crate::Reg; +pub type MSID = crate::Reg; #[doc = "Message Index Register"] pub mod msid; #[doc = "MSIMASK (rw) register accessor: Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msimask`] module"] -#[doc(alias = "MSIMASK")] -pub type Msimask = crate::Reg; +pub type MSIMASK = crate::Reg; #[doc = "Message Index Mask Register"] pub mod msimask; #[doc = "PANCTR (rw) register accessor: Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@panctr`] module"] -#[doc(alias = "PANCTR")] -pub type Panctr = crate::Reg; +pub type PANCTR = crate::Reg; #[doc = "Panel Control Register"] pub mod panctr; #[doc = "MCR (rw) register accessor: Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcr`] module"] -#[doc(alias = "MCR")] -pub type Mcr = crate::Reg; +pub type MCR = crate::Reg; #[doc = "Module Control Register"] pub mod mcr; #[doc = "MITR (w) register accessor: Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mitr`] module"] -#[doc(alias = "MITR")] -pub type Mitr = crate::Reg; +pub type MITR = crate::Reg; #[doc = "Module Interrupt Trigger Register"] pub mod mitr; diff --git a/src/can/clc.rs b/src/can/clc.rs index 9b9962d7..d2863655 100644 --- a/src/can/clc.rs +++ b/src/can/clc.rs @@ -1,70 +1,70 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DisrR = crate::BitReader; +pub type DISR_R = crate::BitReader; #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DisrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DissR = crate::BitReader; +pub type DISS_R = crate::BitReader; #[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] -pub type EdisR = crate::BitReader; +pub type EDIS_R = crate::BitReader; #[doc = "Field `EDIS` writer - Sleep Mode Enable Control"] -pub type EdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SBWE` writer - Module Suspend Bit Write Enable for OCDS"] -pub type SbweW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SBWE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DisrR { - DisrR::new((self.bits & 1) != 0) + pub fn disr(&self) -> DISR_R { + DISR_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DissR { - DissR::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DISS_R { + DISS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - pub fn edis(&self) -> EdisR { - EdisR::new(((self.bits >> 3) & 1) != 0) + pub fn edis(&self) -> EDIS_R { + EDIS_R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DisrW { - DisrW::new(self, 0) + pub fn disr(&mut self) -> DISR_W { + DISR_W::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] #[must_use] - pub fn edis(&mut self) -> EdisW { - EdisW::new(self, 3) + pub fn edis(&mut self) -> EDIS_W { + EDIS_W::new(self, 3) } #[doc = "Bit 4 - Module Suspend Bit Write Enable for OCDS"] #[inline(always)] #[must_use] - pub fn sbwe(&mut self) -> SbweW { - SbweW::new(self, 4) + pub fn sbwe(&mut self) -> SBWE_W { + SBWE_W::new(self, 4) } } #[doc = "CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClcSpec; -impl crate::RegisterSpec for ClcSpec { +pub struct CLC_SPEC; +impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for ClcSpec {} +impl crate::Readable for CLC_SPEC {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for ClcSpec { +impl crate::Writable for CLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for ClcSpec { +impl crate::Resettable for CLC_SPEC { const RESET_VALUE: u32 = 0x03; } diff --git a/src/can/fdr.rs b/src/can/fdr.rs index fde10fc5..1b55878e 100644 --- a/src/can/fdr.rs +++ b/src/can/fdr.rs @@ -1,136 +1,136 @@ #[doc = "Register `FDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FDR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STEP` reader - Step Value"] -pub type StepR = crate::FieldReader; +pub type STEP_R = crate::FieldReader; #[doc = "Field `STEP` writer - Step Value"] -pub type StepW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type STEP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `SM` reader - Suspend Mode"] -pub type SmR = crate::BitReader; +pub type SM_R = crate::BitReader; #[doc = "Field `SM` writer - Suspend Mode"] -pub type SmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC` reader - Suspend Control"] -pub type ScR = crate::FieldReader; +pub type SC_R = crate::FieldReader; #[doc = "Field `SC` writer - Suspend Control"] -pub type ScW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DM` reader - Divider Mode"] -pub type DmR = crate::FieldReader; +pub type DM_R = crate::FieldReader; #[doc = "Field `DM` writer - Divider Mode"] -pub type DmW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type DM_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `RESULT` reader - Result Value"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Field `SUSACK` reader - Suspend Mode Acknowledge"] -pub type SusackR = crate::BitReader; +pub type SUSACK_R = crate::BitReader; #[doc = "Field `SUSREQ` reader - Suspend Mode Request"] -pub type SusreqR = crate::BitReader; +pub type SUSREQ_R = crate::BitReader; #[doc = "Field `ENHW` reader - Enable Hardware Clock Control"] -pub type EnhwR = crate::BitReader; +pub type ENHW_R = crate::BitReader; #[doc = "Field `ENHW` writer - Enable Hardware Clock Control"] -pub type EnhwW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENHW_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISCLK` reader - Disable Clock"] -pub type DisclkR = crate::BitReader; +pub type DISCLK_R = crate::BitReader; #[doc = "Field `DISCLK` writer - Disable Clock"] -pub type DisclkW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - pub fn step(&self) -> StepR { - StepR::new((self.bits & 0x03ff) as u16) + pub fn step(&self) -> STEP_R { + STEP_R::new((self.bits & 0x03ff) as u16) } #[doc = "Bit 11 - Suspend Mode"] #[inline(always)] - pub fn sm(&self) -> SmR { - SmR::new(((self.bits >> 11) & 1) != 0) + pub fn sm(&self) -> SM_R { + SM_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Suspend Control"] #[inline(always)] - pub fn sc(&self) -> ScR { - ScR::new(((self.bits >> 12) & 3) as u8) + pub fn sc(&self) -> SC_R { + SC_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - pub fn dm(&self) -> DmR { - DmR::new(((self.bits >> 14) & 3) as u8) + pub fn dm(&self) -> DM_R { + DM_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:25 - Result Value"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new(((self.bits >> 16) & 0x03ff) as u16) } #[doc = "Bit 28 - Suspend Mode Acknowledge"] #[inline(always)] - pub fn susack(&self) -> SusackR { - SusackR::new(((self.bits >> 28) & 1) != 0) + pub fn susack(&self) -> SUSACK_R { + SUSACK_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Suspend Mode Request"] #[inline(always)] - pub fn susreq(&self) -> SusreqR { - SusreqR::new(((self.bits >> 29) & 1) != 0) + pub fn susreq(&self) -> SUSREQ_R { + SUSREQ_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable Hardware Clock Control"] #[inline(always)] - pub fn enhw(&self) -> EnhwR { - EnhwR::new(((self.bits >> 30) & 1) != 0) + pub fn enhw(&self) -> ENHW_R { + ENHW_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Disable Clock"] #[inline(always)] - pub fn disclk(&self) -> DisclkR { - DisclkR::new(((self.bits >> 31) & 1) != 0) + pub fn disclk(&self) -> DISCLK_R { + DISCLK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] #[must_use] - pub fn step(&mut self) -> StepW { - StepW::new(self, 0) + pub fn step(&mut self) -> STEP_W { + STEP_W::new(self, 0) } #[doc = "Bit 11 - Suspend Mode"] #[inline(always)] #[must_use] - pub fn sm(&mut self) -> SmW { - SmW::new(self, 11) + pub fn sm(&mut self) -> SM_W { + SM_W::new(self, 11) } #[doc = "Bits 12:13 - Suspend Control"] #[inline(always)] #[must_use] - pub fn sc(&mut self) -> ScW { - ScW::new(self, 12) + pub fn sc(&mut self) -> SC_W { + SC_W::new(self, 12) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] #[must_use] - pub fn dm(&mut self) -> DmW { - DmW::new(self, 14) + pub fn dm(&mut self) -> DM_W { + DM_W::new(self, 14) } #[doc = "Bit 30 - Enable Hardware Clock Control"] #[inline(always)] #[must_use] - pub fn enhw(&mut self) -> EnhwW { - EnhwW::new(self, 30) + pub fn enhw(&mut self) -> ENHW_W { + ENHW_W::new(self, 30) } #[doc = "Bit 31 - Disable Clock"] #[inline(always)] #[must_use] - pub fn disclk(&mut self) -> DisclkW { - DisclkW::new(self, 31) + pub fn disclk(&mut self) -> DISCLK_W { + DISCLK_W::new(self, 31) } } #[doc = "CAN Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FdrSpec; -impl crate::RegisterSpec for FdrSpec { +pub struct FDR_SPEC; +impl crate::RegisterSpec for FDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fdr::R`](R) reader structure"] -impl crate::Readable for FdrSpec {} +impl crate::Readable for FDR_SPEC {} #[doc = "`write(|w| ..)` method takes [`fdr::W`](W) writer structure"] -impl crate::Writable for FdrSpec { +impl crate::Writable for FDR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FDR to value 0"] -impl crate::Resettable for FdrSpec { +impl crate::Resettable for FDR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/id.rs b/src/can/id.rs index bf6c7831..1c4eed67 100644 --- a/src/can/id.rs +++ b/src/can/id.rs @@ -1,68 +1,68 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Module Type\n\nValue on reset: 192"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum ModType { +pub enum MOD_TYPE_A { #[doc = "192: Define the module as a 32-bit module."] - Value1 = 192, + VALUE1 = 192, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: ModType) -> Self { + fn from(variant: MOD_TYPE_A) -> Self { variant as _ } } -impl crate::FieldSpec for ModType { +impl crate::FieldSpec for MOD_TYPE_A { type Ux = u8; } -impl crate::IsEnum for ModType {} +impl crate::IsEnum for MOD_TYPE_A {} #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; -impl ModTypeR { +pub type MOD_TYPE_R = crate::FieldReader; +impl MOD_TYPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 192 => Some(ModType::Value1), + 192 => Some(MOD_TYPE_A::VALUE1), _ => None, } } #[doc = "Define the module as a 32-bit module."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ModType::Value1 + *self == MOD_TYPE_A::VALUE1 } } #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x002b_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x002b_c000; } diff --git a/src/can/list.rs b/src/can/list.rs index 4cc296ab..7d1110a0 100644 --- a/src/can/list.rs +++ b/src/can/list.rs @@ -1,78 +1,78 @@ #[doc = "Register `LIST[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `BEGIN` reader - List Begin"] -pub type BeginR = crate::FieldReader; +pub type BEGIN_R = crate::FieldReader; #[doc = "Field `END` reader - List End"] -pub type EndR = crate::FieldReader; +pub type END_R = crate::FieldReader; #[doc = "Field `SIZE` reader - List Size"] -pub type SizeR = crate::FieldReader; +pub type SIZE_R = crate::FieldReader; #[doc = "List Empty Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Empty { +pub enum EMPTY_A { #[doc = "0: At least one message object is allocated to list i."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No message object is allocated to the list x. List x is empty."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Empty) -> Self { + fn from(variant: EMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMPTY` reader - List Empty Indication"] -pub type EmptyR = crate::BitReader; -impl EmptyR { +pub type EMPTY_R = crate::BitReader; +impl EMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Empty { + pub const fn variant(&self) -> EMPTY_A { match self.bits { - false => Empty::Value1, - true => Empty::Value2, + false => EMPTY_A::VALUE1, + true => EMPTY_A::VALUE2, } } #[doc = "At least one message object is allocated to list i."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Empty::Value1 + *self == EMPTY_A::VALUE1 } #[doc = "No message object is allocated to the list x. List x is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Empty::Value2 + *self == EMPTY_A::VALUE2 } } impl R { #[doc = "Bits 0:7 - List Begin"] #[inline(always)] - pub fn begin(&self) -> BeginR { - BeginR::new((self.bits & 0xff) as u8) + pub fn begin(&self) -> BEGIN_R { + BEGIN_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - List End"] #[inline(always)] - pub fn end(&self) -> EndR { - EndR::new(((self.bits >> 8) & 0xff) as u8) + pub fn end(&self) -> END_R { + END_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - List Size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 16) & 0xff) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - List Empty Indication"] #[inline(always)] - pub fn empty(&self) -> EmptyR { - EmptyR::new(((self.bits >> 24) & 1) != 0) + pub fn empty(&self) -> EMPTY_R { + EMPTY_R::new(((self.bits >> 24) & 1) != 0) } } #[doc = "List Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`list::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ListSpec; -impl crate::RegisterSpec for ListSpec { +pub struct LIST_SPEC; +impl crate::RegisterSpec for LIST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`list::R`](R) reader structure"] -impl crate::Readable for ListSpec {} +impl crate::Readable for LIST_SPEC {} #[doc = "`reset()` method sets LIST[%s] to value 0"] -impl crate::Resettable for ListSpec { +impl crate::Resettable for LIST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mcr.rs b/src/can/mcr.rs index c0fb99de..999f9aae 100644 --- a/src/can/mcr.rs +++ b/src/can/mcr.rs @@ -1,40 +1,40 @@ #[doc = "Register `MCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPSEL` reader - Message Pending Selector"] -pub type MpselR = crate::FieldReader; +pub type MPSEL_R = crate::FieldReader; #[doc = "Field `MPSEL` writer - Message Pending Selector"] -pub type MpselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type MPSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 12:15 - Message Pending Selector"] #[inline(always)] - pub fn mpsel(&self) -> MpselR { - MpselR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn mpsel(&self) -> MPSEL_R { + MPSEL_R::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 12:15 - Message Pending Selector"] #[inline(always)] #[must_use] - pub fn mpsel(&mut self) -> MpselW { - MpselW::new(self, 12) + pub fn mpsel(&mut self) -> MPSEL_W { + MPSEL_W::new(self, 12) } } #[doc = "Module Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McrSpec; -impl crate::RegisterSpec for McrSpec { +pub struct MCR_SPEC; +impl crate::RegisterSpec for MCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mcr::R`](R) reader structure"] -impl crate::Readable for McrSpec {} +impl crate::Readable for MCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mcr::W`](W) writer structure"] -impl crate::Writable for McrSpec { +impl crate::Writable for MCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCR to value 0"] -impl crate::Resettable for McrSpec { +impl crate::Resettable for MCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mitr.rs b/src/can/mitr.rs index 905a3116..8d1f2e28 100644 --- a/src/can/mitr.rs +++ b/src/can/mitr.rs @@ -1,27 +1,27 @@ #[doc = "Register `MITR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IT` writer - Interrupt Trigger"] -pub type ItW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type IT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Interrupt Trigger"] #[inline(always)] #[must_use] - pub fn it(&mut self) -> ItW { - ItW::new(self, 0) + pub fn it(&mut self) -> IT_W { + IT_W::new(self, 0) } } #[doc = "Module Interrupt Trigger Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mitr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MitrSpec; -impl crate::RegisterSpec for MitrSpec { +pub struct MITR_SPEC; +impl crate::RegisterSpec for MITR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mitr::W`](W) writer structure"] -impl crate::Writable for MitrSpec { +impl crate::Writable for MITR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MITR to value 0"] -impl crate::Resettable for MitrSpec { +impl crate::Resettable for MITR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/msid.rs b/src/can/msid.rs index e8d5786a..bae28d51 100644 --- a/src/can/msid.rs +++ b/src/can/msid.rs @@ -1,23 +1,23 @@ #[doc = "Register `MSID[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `INDEX` reader - Message Pending Index"] -pub type IndexR = crate::FieldReader; +pub type INDEX_R = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Message Pending Index"] #[inline(always)] - pub fn index(&self) -> IndexR { - IndexR::new((self.bits & 0x3f) as u8) + pub fn index(&self) -> INDEX_R { + INDEX_R::new((self.bits & 0x3f) as u8) } } #[doc = "Message Index Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MsidSpec; -impl crate::RegisterSpec for MsidSpec { +pub struct MSID_SPEC; +impl crate::RegisterSpec for MSID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`msid::R`](R) reader structure"] -impl crate::Readable for MsidSpec {} +impl crate::Readable for MSID_SPEC {} #[doc = "`reset()` method sets MSID[%s] to value 0x20"] -impl crate::Resettable for MsidSpec { +impl crate::Resettable for MSID_SPEC { const RESET_VALUE: u32 = 0x20; } diff --git a/src/can/msimask.rs b/src/can/msimask.rs index ffbe739a..513659a3 100644 --- a/src/can/msimask.rs +++ b/src/can/msimask.rs @@ -1,40 +1,40 @@ #[doc = "Register `MSIMASK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSIMASK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IM` reader - Message Index Mask"] -pub type ImR = crate::FieldReader; +pub type IM_R = crate::FieldReader; #[doc = "Field `IM` writer - Message Index Mask"] -pub type ImW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type IM_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Message Index Mask"] #[inline(always)] - pub fn im(&self) -> ImR { - ImR::new(self.bits) + pub fn im(&self) -> IM_R { + IM_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Message Index Mask"] #[inline(always)] #[must_use] - pub fn im(&mut self) -> ImW { - ImW::new(self, 0) + pub fn im(&mut self) -> IM_W { + IM_W::new(self, 0) } } #[doc = "Message Index Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msimask::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msimask::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MsimaskSpec; -impl crate::RegisterSpec for MsimaskSpec { +pub struct MSIMASK_SPEC; +impl crate::RegisterSpec for MSIMASK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`msimask::R`](R) reader structure"] -impl crate::Readable for MsimaskSpec {} +impl crate::Readable for MSIMASK_SPEC {} #[doc = "`write(|w| ..)` method takes [`msimask::W`](W) writer structure"] -impl crate::Writable for MsimaskSpec { +impl crate::Writable for MSIMASK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSIMASK to value 0"] -impl crate::Resettable for MsimaskSpec { +impl crate::Resettable for MSIMASK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/mspnd.rs b/src/can/mspnd.rs index f04dc7fb..169b73a2 100644 --- a/src/can/mspnd.rs +++ b/src/can/mspnd.rs @@ -1,41 +1,41 @@ #[doc = "Register `MSPND[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSPND[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PND` reader - Message Pending"] -pub type PndR = crate::FieldReader; +pub type PND_R = crate::FieldReader; #[doc = "Field `PND` writer - Message Pending"] -pub type PndW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type PND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Message Pending"] #[inline(always)] - pub fn pnd(&self) -> PndR { - PndR::new(self.bits) + pub fn pnd(&self) -> PND_R { + PND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Message Pending"] #[inline(always)] #[must_use] - pub fn pnd(&mut self) -> PndW { - PndW::new(self, 0) + pub fn pnd(&mut self) -> PND_W { + PND_W::new(self, 0) } } #[doc = "Message Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MspndSpec; -impl crate::RegisterSpec for MspndSpec { +pub struct MSPND_SPEC; +impl crate::RegisterSpec for MSPND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mspnd::R`](R) reader structure"] -impl crate::Readable for MspndSpec {} +impl crate::Readable for MSPND_SPEC {} #[doc = "`write(|w| ..)` method takes [`mspnd::W`](W) writer structure"] -impl crate::Writable for MspndSpec { +impl crate::Writable for MSPND_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSPND[%s] to value 0"] -impl crate::Resettable for MspndSpec { +impl crate::Resettable for MSPND_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can/panctr.rs b/src/can/panctr.rs index c7f35747..626d49ae 100644 --- a/src/can/panctr.rs +++ b/src/can/panctr.rs @@ -1,152 +1,152 @@ #[doc = "Register `PANCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PANCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PANCMD` reader - Panel Command"] -pub type PancmdR = crate::FieldReader; +pub type PANCMD_R = crate::FieldReader; #[doc = "Field `PANCMD` writer - Panel Command"] -pub type PancmdW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PANCMD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Panel Busy Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Busy { +pub enum BUSY_A { #[doc = "0: Panel has finished command and is ready to accept a new command."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Panel operation is in progress."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Busy) -> Self { + fn from(variant: BUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BUSY` reader - Panel Busy Flag"] -pub type BusyR = crate::BitReader; -impl BusyR { +pub type BUSY_R = crate::BitReader; +impl BUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Busy { + pub const fn variant(&self) -> BUSY_A { match self.bits { - false => Busy::Value1, - true => Busy::Value2, + false => BUSY_A::VALUE1, + true => BUSY_A::VALUE2, } } #[doc = "Panel has finished command and is ready to accept a new command."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Busy::Value1 + *self == BUSY_A::VALUE1 } #[doc = "Panel operation is in progress."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Busy::Value2 + *self == BUSY_A::VALUE2 } } #[doc = "Result Busy Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rbusy { +pub enum RBUSY_A { #[doc = "0: No update of PANAR1 and PANAR2 is scheduled by the list controller."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A list command is running (BUSY = 1) that will write results to PANAR1 and PANAR2, but the results are not yet available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rbusy) -> Self { + fn from(variant: RBUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RBUSY` reader - Result Busy Flag"] -pub type RbusyR = crate::BitReader; -impl RbusyR { +pub type RBUSY_R = crate::BitReader; +impl RBUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rbusy { + pub const fn variant(&self) -> RBUSY_A { match self.bits { - false => Rbusy::Value1, - true => Rbusy::Value2, + false => RBUSY_A::VALUE1, + true => RBUSY_A::VALUE2, } } #[doc = "No update of PANAR1 and PANAR2 is scheduled by the list controller."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rbusy::Value1 + *self == RBUSY_A::VALUE1 } #[doc = "A list command is running (BUSY = 1) that will write results to PANAR1 and PANAR2, but the results are not yet available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rbusy::Value2 + *self == RBUSY_A::VALUE2 } } #[doc = "Field `PANAR1` reader - Panel Argument 1"] -pub type Panar1R = crate::FieldReader; +pub type PANAR1_R = crate::FieldReader; #[doc = "Field `PANAR1` writer - Panel Argument 1"] -pub type Panar1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PANAR1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PANAR2` reader - Panel Argument 2"] -pub type Panar2R = crate::FieldReader; +pub type PANAR2_R = crate::FieldReader; #[doc = "Field `PANAR2` writer - Panel Argument 2"] -pub type Panar2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PANAR2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Panel Command"] #[inline(always)] - pub fn pancmd(&self) -> PancmdR { - PancmdR::new((self.bits & 0xff) as u8) + pub fn pancmd(&self) -> PANCMD_R { + PANCMD_R::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - Panel Busy Flag"] #[inline(always)] - pub fn busy(&self) -> BusyR { - BusyR::new(((self.bits >> 8) & 1) != 0) + pub fn busy(&self) -> BUSY_R { + BUSY_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Result Busy Flag"] #[inline(always)] - pub fn rbusy(&self) -> RbusyR { - RbusyR::new(((self.bits >> 9) & 1) != 0) + pub fn rbusy(&self) -> RBUSY_R { + RBUSY_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 16:23 - Panel Argument 1"] #[inline(always)] - pub fn panar1(&self) -> Panar1R { - Panar1R::new(((self.bits >> 16) & 0xff) as u8) + pub fn panar1(&self) -> PANAR1_R { + PANAR1_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Panel Argument 2"] #[inline(always)] - pub fn panar2(&self) -> Panar2R { - Panar2R::new(((self.bits >> 24) & 0xff) as u8) + pub fn panar2(&self) -> PANAR2_R { + PANAR2_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Panel Command"] #[inline(always)] #[must_use] - pub fn pancmd(&mut self) -> PancmdW { - PancmdW::new(self, 0) + pub fn pancmd(&mut self) -> PANCMD_W { + PANCMD_W::new(self, 0) } #[doc = "Bits 16:23 - Panel Argument 1"] #[inline(always)] #[must_use] - pub fn panar1(&mut self) -> Panar1W { - Panar1W::new(self, 16) + pub fn panar1(&mut self) -> PANAR1_W { + PANAR1_W::new(self, 16) } #[doc = "Bits 24:31 - Panel Argument 2"] #[inline(always)] #[must_use] - pub fn panar2(&mut self) -> Panar2W { - Panar2W::new(self, 24) + pub fn panar2(&mut self) -> PANAR2_W { + PANAR2_W::new(self, 24) } } #[doc = "Panel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`panctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`panctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PanctrSpec; -impl crate::RegisterSpec for PanctrSpec { +pub struct PANCTR_SPEC; +impl crate::RegisterSpec for PANCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`panctr::R`](R) reader structure"] -impl crate::Readable for PanctrSpec {} +impl crate::Readable for PANCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`panctr::W`](W) writer structure"] -impl crate::Writable for PanctrSpec { +impl crate::Writable for PANCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PANCTR to value 0x0301"] -impl crate::Resettable for PanctrSpec { +impl crate::Resettable for PANCTR_SPEC { const RESET_VALUE: u32 = 0x0301; } diff --git a/src/can_mo0.rs b/src/can_mo0.rs index 54cdda32..327cae25 100644 --- a/src/can_mo0.rs +++ b/src/can_mo0.rs @@ -1,113 +1,104 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - mofcr: Mofcr, - mofgpr: Mofgpr, - moipr: Moipr, - moamr: Moamr, - modatal: Modatal, - modatah: Modatah, - moar: Moar, + mofcr: MOFCR, + mofgpr: MOFGPR, + moipr: MOIPR, + moamr: MOAMR, + modatal: MODATAL, + modatah: MODATAH, + moar: MOAR, _reserved_7_moctr: [u8; 0x04], } impl RegisterBlock { #[doc = "0x00 - Message Object Function Control Register"] #[inline(always)] - pub const fn mofcr(&self) -> &Mofcr { + pub const fn mofcr(&self) -> &MOFCR { &self.mofcr } #[doc = "0x04 - Message Object FIFO/Gateway Pointer Register"] #[inline(always)] - pub const fn mofgpr(&self) -> &Mofgpr { + pub const fn mofgpr(&self) -> &MOFGPR { &self.mofgpr } #[doc = "0x08 - Message Object Interrupt Pointer Register"] #[inline(always)] - pub const fn moipr(&self) -> &Moipr { + pub const fn moipr(&self) -> &MOIPR { &self.moipr } #[doc = "0x0c - Message Object Acceptance Mask Register"] #[inline(always)] - pub const fn moamr(&self) -> &Moamr { + pub const fn moamr(&self) -> &MOAMR { &self.moamr } #[doc = "0x10 - Message Object Data Register Low"] #[inline(always)] - pub const fn modatal(&self) -> &Modatal { + pub const fn modatal(&self) -> &MODATAL { &self.modatal } #[doc = "0x14 - Message Object Data Register High"] #[inline(always)] - pub const fn modatah(&self) -> &Modatah { + pub const fn modatah(&self) -> &MODATAH { &self.modatah } #[doc = "0x18 - Message Object Arbitration Register"] #[inline(always)] - pub const fn moar(&self) -> &Moar { + pub const fn moar(&self) -> &MOAR { &self.moar } #[doc = "0x1c - Message Object Status Register"] #[inline(always)] - pub const fn mostat(&self) -> &Mostat { + pub const fn mostat(&self) -> &MOSTAT { unsafe { &*(self as *const Self).cast::().add(28).cast() } } #[doc = "0x1c - Message Object Control Register"] #[inline(always)] - pub const fn moctr(&self) -> &Moctr { + pub const fn moctr(&self) -> &MOCTR { unsafe { &*(self as *const Self).cast::().add(28).cast() } } } #[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`] module"] -#[doc(alias = "MOFCR")] -pub type Mofcr = crate::Reg; +pub type MOFCR = crate::Reg; #[doc = "Message Object Function Control Register"] pub mod mofcr; #[doc = "MOFGPR (rw) register accessor: Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofgpr`] module"] -#[doc(alias = "MOFGPR")] -pub type Mofgpr = crate::Reg; +pub type MOFGPR = crate::Reg; #[doc = "Message Object FIFO/Gateway Pointer Register"] pub mod mofgpr; #[doc = "MOIPR (rw) register accessor: Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moipr`] module"] -#[doc(alias = "MOIPR")] -pub type Moipr = crate::Reg; +pub type MOIPR = crate::Reg; #[doc = "Message Object Interrupt Pointer Register"] pub mod moipr; #[doc = "MOAMR (rw) register accessor: Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moamr`] module"] -#[doc(alias = "MOAMR")] -pub type Moamr = crate::Reg; +pub type MOAMR = crate::Reg; #[doc = "Message Object Acceptance Mask Register"] pub mod moamr; #[doc = "MODATAL (rw) register accessor: Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatal`] module"] -#[doc(alias = "MODATAL")] -pub type Modatal = crate::Reg; +pub type MODATAL = crate::Reg; #[doc = "Message Object Data Register Low"] pub mod modatal; #[doc = "MODATAH (rw) register accessor: Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modatah`] module"] -#[doc(alias = "MODATAH")] -pub type Modatah = crate::Reg; +pub type MODATAH = crate::Reg; #[doc = "Message Object Data Register High"] pub mod modatah; #[doc = "MOAR (rw) register accessor: Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moar`] module"] -#[doc(alias = "MOAR")] -pub type Moar = crate::Reg; +pub type MOAR = crate::Reg; #[doc = "Message Object Arbitration Register"] pub mod moar; #[doc = "MOCTR (w) register accessor: Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@moctr`] module"] -#[doc(alias = "MOCTR")] -pub type Moctr = crate::Reg; +pub type MOCTR = crate::Reg; #[doc = "Message Object Control Register"] pub mod moctr; #[doc = "MOSTAT (r) register accessor: Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mostat`] module"] -#[doc(alias = "MOSTAT")] -pub type Mostat = crate::Reg; +pub type MOSTAT = crate::Reg; #[doc = "Message Object Status Register"] pub mod mostat; diff --git a/src/can_mo0/moamr.rs b/src/can_mo0/moamr.rs index 24d00913..c1e02a04 100644 --- a/src/can_mo0/moamr.rs +++ b/src/can_mo0/moamr.rs @@ -1,104 +1,104 @@ #[doc = "Register `MOAMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOAMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AM` reader - Acceptance Mask for Message Identifier"] -pub type AmR = crate::FieldReader; +pub type AM_R = crate::FieldReader; #[doc = "Field `AM` writer - Acceptance Mask for Message Identifier"] -pub type AmW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +pub type AM_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; #[doc = "Acceptance Mask Bit for Message IDE Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mide { +pub enum MIDE_A { #[doc = "0: Message object n accepts the reception of both, standard and extended frames."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n receives frames only with matching IDE bit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mide) -> Self { + fn from(variant: MIDE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MIDE` reader - Acceptance Mask Bit for Message IDE Bit"] -pub type MideR = crate::BitReader; -impl MideR { +pub type MIDE_R = crate::BitReader; +impl MIDE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mide { + pub const fn variant(&self) -> MIDE_A { match self.bits { - false => Mide::Value1, - true => Mide::Value2, + false => MIDE_A::VALUE1, + true => MIDE_A::VALUE2, } } #[doc = "Message object n accepts the reception of both, standard and extended frames."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mide::Value1 + *self == MIDE_A::VALUE1 } #[doc = "Message object n receives frames only with matching IDE bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mide::Value2 + *self == MIDE_A::VALUE2 } } #[doc = "Field `MIDE` writer - Acceptance Mask Bit for Message IDE Bit"] -pub type MideW<'a, REG> = crate::BitWriter<'a, REG, Mide>; -impl<'a, REG> MideW<'a, REG> +pub type MIDE_W<'a, REG> = crate::BitWriter<'a, REG, MIDE_A>; +impl<'a, REG> MIDE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message object n accepts the reception of both, standard and extended frames."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mide::Value1) + self.variant(MIDE_A::VALUE1) } #[doc = "Message object n receives frames only with matching IDE bit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mide::Value2) + self.variant(MIDE_A::VALUE2) } } impl R { #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"] #[inline(always)] - pub fn am(&self) -> AmR { - AmR::new(self.bits & 0x1fff_ffff) + pub fn am(&self) -> AM_R { + AM_R::new(self.bits & 0x1fff_ffff) } #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"] #[inline(always)] - pub fn mide(&self) -> MideR { - MideR::new(((self.bits >> 29) & 1) != 0) + pub fn mide(&self) -> MIDE_R { + MIDE_R::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"] #[inline(always)] #[must_use] - pub fn am(&mut self) -> AmW { - AmW::new(self, 0) + pub fn am(&mut self) -> AM_W { + AM_W::new(self, 0) } #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"] #[inline(always)] #[must_use] - pub fn mide(&mut self) -> MideW { - MideW::new(self, 29) + pub fn mide(&mut self) -> MIDE_W { + MIDE_W::new(self, 29) } } #[doc = "Message Object Acceptance Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moamr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moamr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MoamrSpec; -impl crate::RegisterSpec for MoamrSpec { +pub struct MOAMR_SPEC; +impl crate::RegisterSpec for MOAMR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`moamr::R`](R) reader structure"] -impl crate::Readable for MoamrSpec {} +impl crate::Readable for MOAMR_SPEC {} #[doc = "`write(|w| ..)` method takes [`moamr::W`](W) writer structure"] -impl crate::Writable for MoamrSpec { +impl crate::Writable for MOAMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOAMR to value 0x3fff_ffff"] -impl crate::Resettable for MoamrSpec { +impl crate::Resettable for MOAMR_SPEC { const RESET_VALUE: u32 = 0x3fff_ffff; } diff --git a/src/can_mo0/moar.rs b/src/can_mo0/moar.rs index f562e791..adc602ac 100644 --- a/src/can_mo0/moar.rs +++ b/src/can_mo0/moar.rs @@ -1,125 +1,125 @@ #[doc = "Register `MOAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ID` reader - CAN Identifier of Message Object n"] -pub type IdR = crate::FieldReader; +pub type ID_R = crate::FieldReader; #[doc = "Field `ID` writer - CAN Identifier of Message Object n"] -pub type IdW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +pub type ID_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; #[doc = "Identifier Extension Bit of Message Object n\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ide { +pub enum IDE_A { #[doc = "0: Message object n handles standard frames with 11-bit identifier."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n handles extended frames with 29-bit identifier."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ide) -> Self { + fn from(variant: IDE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IDE` reader - Identifier Extension Bit of Message Object n"] -pub type IdeR = crate::BitReader; -impl IdeR { +pub type IDE_R = crate::BitReader; +impl IDE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ide { + pub const fn variant(&self) -> IDE_A { match self.bits { - false => Ide::Value1, - true => Ide::Value2, + false => IDE_A::VALUE1, + true => IDE_A::VALUE2, } } #[doc = "Message object n handles standard frames with 11-bit identifier."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ide::Value1 + *self == IDE_A::VALUE1 } #[doc = "Message object n handles extended frames with 29-bit identifier."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ide::Value2 + *self == IDE_A::VALUE2 } } #[doc = "Field `IDE` writer - Identifier Extension Bit of Message Object n"] -pub type IdeW<'a, REG> = crate::BitWriter<'a, REG, Ide>; -impl<'a, REG> IdeW<'a, REG> +pub type IDE_W<'a, REG> = crate::BitWriter<'a, REG, IDE_A>; +impl<'a, REG> IDE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message object n handles standard frames with 11-bit identifier."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ide::Value1) + self.variant(IDE_A::VALUE1) } #[doc = "Message object n handles extended frames with 29-bit identifier."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ide::Value2) + self.variant(IDE_A::VALUE2) } } #[doc = "Priority Class\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pri { +pub enum PRI_A { #[doc = "0: Applicable only if TTCAN is available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Transmit acceptance filtering is based on the list order (as PRI = 01B)."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pri) -> Self { + fn from(variant: PRI_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pri { +impl crate::FieldSpec for PRI_A { type Ux = u8; } -impl crate::IsEnum for Pri {} +impl crate::IsEnum for PRI_A {} #[doc = "Field `PRI` reader - Priority Class"] -pub type PriR = crate::FieldReader; -impl PriR { +pub type PRI_R = crate::FieldReader; +impl PRI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pri { + pub const fn variant(&self) -> PRI_A { match self.bits { - 0 => Pri::Value1, - 1 => Pri::Value2, - 2 => Pri::Value3, - 3 => Pri::Value4, + 0 => PRI_A::VALUE1, + 1 => PRI_A::VALUE2, + 2 => PRI_A::VALUE3, + 3 => PRI_A::VALUE4, _ => unreachable!(), } } #[doc = "Applicable only if TTCAN is available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pri::Value1 + *self == PRI_A::VALUE1 } #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pri::Value2 + *self == PRI_A::VALUE2 } #[doc = "Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pri::Value3 + *self == PRI_A::VALUE3 } #[doc = "Transmit acceptance filtering is based on the list order (as PRI = 01B)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pri::Value4 + *self == PRI_A::VALUE4 } } #[doc = "Field `PRI` writer - Priority Class"] -pub type PriW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pri, crate::Safe>; -impl<'a, REG> PriW<'a, REG> +pub type PRI_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRI_A, crate::Safe>; +impl<'a, REG> PRI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -127,75 +127,75 @@ where #[doc = "Applicable only if TTCAN is available."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pri::Value1) + self.variant(PRI_A::VALUE1) } #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pri::Value2) + self.variant(PRI_A::VALUE2) } #[doc = "Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pri::Value3) + self.variant(PRI_A::VALUE3) } #[doc = "Transmit acceptance filtering is based on the list order (as PRI = 01B)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pri::Value4) + self.variant(PRI_A::VALUE4) } } impl R { #[doc = "Bits 0:28 - CAN Identifier of Message Object n"] #[inline(always)] - pub fn id(&self) -> IdR { - IdR::new(self.bits & 0x1fff_ffff) + pub fn id(&self) -> ID_R { + ID_R::new(self.bits & 0x1fff_ffff) } #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"] #[inline(always)] - pub fn ide(&self) -> IdeR { - IdeR::new(((self.bits >> 29) & 1) != 0) + pub fn ide(&self) -> IDE_R { + IDE_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bits 30:31 - Priority Class"] #[inline(always)] - pub fn pri(&self) -> PriR { - PriR::new(((self.bits >> 30) & 3) as u8) + pub fn pri(&self) -> PRI_R { + PRI_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:28 - CAN Identifier of Message Object n"] #[inline(always)] #[must_use] - pub fn id(&mut self) -> IdW { - IdW::new(self, 0) + pub fn id(&mut self) -> ID_W { + ID_W::new(self, 0) } #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"] #[inline(always)] #[must_use] - pub fn ide(&mut self) -> IdeW { - IdeW::new(self, 29) + pub fn ide(&mut self) -> IDE_W { + IDE_W::new(self, 29) } #[doc = "Bits 30:31 - Priority Class"] #[inline(always)] #[must_use] - pub fn pri(&mut self) -> PriW { - PriW::new(self, 30) + pub fn pri(&mut self) -> PRI_W { + PRI_W::new(self, 30) } } #[doc = "Message Object Arbitration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MoarSpec; -impl crate::RegisterSpec for MoarSpec { +pub struct MOAR_SPEC; +impl crate::RegisterSpec for MOAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`moar::R`](R) reader structure"] -impl crate::Readable for MoarSpec {} +impl crate::Readable for MOAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`moar::W`](W) writer structure"] -impl crate::Writable for MoarSpec { +impl crate::Writable for MOAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOAR to value 0"] -impl crate::Resettable for MoarSpec { +impl crate::Resettable for MOAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/moctr.rs b/src/can_mo0/moctr.rs index 0f1fed16..5f020643 100644 --- a/src/can_mo0/moctr.rs +++ b/src/can_mo0/moctr.rs @@ -1,211 +1,211 @@ #[doc = "Register `MOCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESRXPND` writer - Reset/Set Receive Pending"] -pub type ResrxpndW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESRXPND_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXPND` writer - Reset/Set Transmit Pending"] -pub type RestxpndW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESTXPND_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRXUPD` writer - Reset/Set Receive Updating"] -pub type ResrxupdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESRXUPD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESNEWDAT` writer - Reset/Set New Data"] -pub type ResnewdatW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESNEWDAT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESMSGLST` writer - Reset/Set Message Lost"] -pub type ResmsglstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESMSGLST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESMSGVAL` writer - Reset/Set Message Valid"] -pub type ResmsgvalW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESMSGVAL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRTSEL` writer - Reset/Set Receive/Transmit Selected"] -pub type ResrtselW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESRTSEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESRXEN` writer - Reset/Set Receive Enable"] -pub type ResrxenW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESRXEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXRQ` writer - Reset/Set Transmit Request"] -pub type RestxrqW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESTXRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXEN0` writer - Reset/Set Transmit Enable 0"] -pub type Restxen0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESTXEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESTXEN1` writer - Reset/Set Transmit Enable 1"] -pub type Restxen1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESTXEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RESDIR` writer - Reset/Set Message Direction"] -pub type ResdirW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXPND` writer - Reset/Set Receive Pending"] -pub type SetrxpndW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETRXPND_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXPND` writer - Reset/Set Transmit Pending"] -pub type SettxpndW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETTXPND_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXUPD` writer - Reset/Set Receive Updating"] -pub type SetrxupdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETRXUPD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETNEWDAT` writer - Reset/Set New Data"] -pub type SetnewdatW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETNEWDAT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETMSGLST` writer - Reset/Set Message Lost"] -pub type SetmsglstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETMSGLST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETMSGVAL` writer - Reset/Set Message Valid"] -pub type SetmsgvalW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETMSGVAL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRTSEL` writer - Reset/Set Receive/Transmit Selected"] -pub type SetrtselW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETRTSEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETRXEN` writer - Reset/Set Receive Enable"] -pub type SetrxenW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETRXEN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXRQ` writer - Reset/Set Transmit Request"] -pub type SettxrqW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETTXRQ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXEN0` writer - Reset/Set Transmit Enable 0"] -pub type Settxen0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETTXEN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETTXEN1` writer - Reset/Set Transmit Enable 1"] -pub type Settxen1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETTXEN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SETDIR` writer - Reset/Set Message Direction"] -pub type SetdirW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SETDIR_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Reset/Set Receive Pending"] #[inline(always)] #[must_use] - pub fn resrxpnd(&mut self) -> ResrxpndW { - ResrxpndW::new(self, 0) + pub fn resrxpnd(&mut self) -> RESRXPND_W { + RESRXPND_W::new(self, 0) } #[doc = "Bit 1 - Reset/Set Transmit Pending"] #[inline(always)] #[must_use] - pub fn restxpnd(&mut self) -> RestxpndW { - RestxpndW::new(self, 1) + pub fn restxpnd(&mut self) -> RESTXPND_W { + RESTXPND_W::new(self, 1) } #[doc = "Bit 2 - Reset/Set Receive Updating"] #[inline(always)] #[must_use] - pub fn resrxupd(&mut self) -> ResrxupdW { - ResrxupdW::new(self, 2) + pub fn resrxupd(&mut self) -> RESRXUPD_W { + RESRXUPD_W::new(self, 2) } #[doc = "Bit 3 - Reset/Set New Data"] #[inline(always)] #[must_use] - pub fn resnewdat(&mut self) -> ResnewdatW { - ResnewdatW::new(self, 3) + pub fn resnewdat(&mut self) -> RESNEWDAT_W { + RESNEWDAT_W::new(self, 3) } #[doc = "Bit 4 - Reset/Set Message Lost"] #[inline(always)] #[must_use] - pub fn resmsglst(&mut self) -> ResmsglstW { - ResmsglstW::new(self, 4) + pub fn resmsglst(&mut self) -> RESMSGLST_W { + RESMSGLST_W::new(self, 4) } #[doc = "Bit 5 - Reset/Set Message Valid"] #[inline(always)] #[must_use] - pub fn resmsgval(&mut self) -> ResmsgvalW { - ResmsgvalW::new(self, 5) + pub fn resmsgval(&mut self) -> RESMSGVAL_W { + RESMSGVAL_W::new(self, 5) } #[doc = "Bit 6 - Reset/Set Receive/Transmit Selected"] #[inline(always)] #[must_use] - pub fn resrtsel(&mut self) -> ResrtselW { - ResrtselW::new(self, 6) + pub fn resrtsel(&mut self) -> RESRTSEL_W { + RESRTSEL_W::new(self, 6) } #[doc = "Bit 7 - Reset/Set Receive Enable"] #[inline(always)] #[must_use] - pub fn resrxen(&mut self) -> ResrxenW { - ResrxenW::new(self, 7) + pub fn resrxen(&mut self) -> RESRXEN_W { + RESRXEN_W::new(self, 7) } #[doc = "Bit 8 - Reset/Set Transmit Request"] #[inline(always)] #[must_use] - pub fn restxrq(&mut self) -> RestxrqW { - RestxrqW::new(self, 8) + pub fn restxrq(&mut self) -> RESTXRQ_W { + RESTXRQ_W::new(self, 8) } #[doc = "Bit 9 - Reset/Set Transmit Enable 0"] #[inline(always)] #[must_use] - pub fn restxen0(&mut self) -> Restxen0W { - Restxen0W::new(self, 9) + pub fn restxen0(&mut self) -> RESTXEN0_W { + RESTXEN0_W::new(self, 9) } #[doc = "Bit 10 - Reset/Set Transmit Enable 1"] #[inline(always)] #[must_use] - pub fn restxen1(&mut self) -> Restxen1W { - Restxen1W::new(self, 10) + pub fn restxen1(&mut self) -> RESTXEN1_W { + RESTXEN1_W::new(self, 10) } #[doc = "Bit 11 - Reset/Set Message Direction"] #[inline(always)] #[must_use] - pub fn resdir(&mut self) -> ResdirW { - ResdirW::new(self, 11) + pub fn resdir(&mut self) -> RESDIR_W { + RESDIR_W::new(self, 11) } #[doc = "Bit 16 - Reset/Set Receive Pending"] #[inline(always)] #[must_use] - pub fn setrxpnd(&mut self) -> SetrxpndW { - SetrxpndW::new(self, 16) + pub fn setrxpnd(&mut self) -> SETRXPND_W { + SETRXPND_W::new(self, 16) } #[doc = "Bit 17 - Reset/Set Transmit Pending"] #[inline(always)] #[must_use] - pub fn settxpnd(&mut self) -> SettxpndW { - SettxpndW::new(self, 17) + pub fn settxpnd(&mut self) -> SETTXPND_W { + SETTXPND_W::new(self, 17) } #[doc = "Bit 18 - Reset/Set Receive Updating"] #[inline(always)] #[must_use] - pub fn setrxupd(&mut self) -> SetrxupdW { - SetrxupdW::new(self, 18) + pub fn setrxupd(&mut self) -> SETRXUPD_W { + SETRXUPD_W::new(self, 18) } #[doc = "Bit 19 - Reset/Set New Data"] #[inline(always)] #[must_use] - pub fn setnewdat(&mut self) -> SetnewdatW { - SetnewdatW::new(self, 19) + pub fn setnewdat(&mut self) -> SETNEWDAT_W { + SETNEWDAT_W::new(self, 19) } #[doc = "Bit 20 - Reset/Set Message Lost"] #[inline(always)] #[must_use] - pub fn setmsglst(&mut self) -> SetmsglstW { - SetmsglstW::new(self, 20) + pub fn setmsglst(&mut self) -> SETMSGLST_W { + SETMSGLST_W::new(self, 20) } #[doc = "Bit 21 - Reset/Set Message Valid"] #[inline(always)] #[must_use] - pub fn setmsgval(&mut self) -> SetmsgvalW { - SetmsgvalW::new(self, 21) + pub fn setmsgval(&mut self) -> SETMSGVAL_W { + SETMSGVAL_W::new(self, 21) } #[doc = "Bit 22 - Reset/Set Receive/Transmit Selected"] #[inline(always)] #[must_use] - pub fn setrtsel(&mut self) -> SetrtselW { - SetrtselW::new(self, 22) + pub fn setrtsel(&mut self) -> SETRTSEL_W { + SETRTSEL_W::new(self, 22) } #[doc = "Bit 23 - Reset/Set Receive Enable"] #[inline(always)] #[must_use] - pub fn setrxen(&mut self) -> SetrxenW { - SetrxenW::new(self, 23) + pub fn setrxen(&mut self) -> SETRXEN_W { + SETRXEN_W::new(self, 23) } #[doc = "Bit 24 - Reset/Set Transmit Request"] #[inline(always)] #[must_use] - pub fn settxrq(&mut self) -> SettxrqW { - SettxrqW::new(self, 24) + pub fn settxrq(&mut self) -> SETTXRQ_W { + SETTXRQ_W::new(self, 24) } #[doc = "Bit 25 - Reset/Set Transmit Enable 0"] #[inline(always)] #[must_use] - pub fn settxen0(&mut self) -> Settxen0W { - Settxen0W::new(self, 25) + pub fn settxen0(&mut self) -> SETTXEN0_W { + SETTXEN0_W::new(self, 25) } #[doc = "Bit 26 - Reset/Set Transmit Enable 1"] #[inline(always)] #[must_use] - pub fn settxen1(&mut self) -> Settxen1W { - Settxen1W::new(self, 26) + pub fn settxen1(&mut self) -> SETTXEN1_W { + SETTXEN1_W::new(self, 26) } #[doc = "Bit 27 - Reset/Set Message Direction"] #[inline(always)] #[must_use] - pub fn setdir(&mut self) -> SetdirW { - SetdirW::new(self, 27) + pub fn setdir(&mut self) -> SETDIR_W { + SETDIR_W::new(self, 27) } } #[doc = "Message Object Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moctr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MoctrSpec; -impl crate::RegisterSpec for MoctrSpec { +pub struct MOCTR_SPEC; +impl crate::RegisterSpec for MOCTR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`moctr::W`](W) writer structure"] -impl crate::Writable for MoctrSpec { +impl crate::Writable for MOCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOCTR to value 0"] -impl crate::Resettable for MoctrSpec { +impl crate::Resettable for MOCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/modatah.rs b/src/can_mo0/modatah.rs index 9da136cc..86f9194f 100644 --- a/src/can_mo0/modatah.rs +++ b/src/can_mo0/modatah.rs @@ -1,85 +1,85 @@ #[doc = "Register `MODATAH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODATAH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DB4` reader - Data Byte 4 of Message Object n"] -pub type Db4R = crate::FieldReader; +pub type DB4_R = crate::FieldReader; #[doc = "Field `DB4` writer - Data Byte 4 of Message Object n"] -pub type Db4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB5` reader - Data Byte 5 of Message Object n"] -pub type Db5R = crate::FieldReader; +pub type DB5_R = crate::FieldReader; #[doc = "Field `DB5` writer - Data Byte 5 of Message Object n"] -pub type Db5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB6` reader - Data Byte 6 of Message Object n"] -pub type Db6R = crate::FieldReader; +pub type DB6_R = crate::FieldReader; #[doc = "Field `DB6` writer - Data Byte 6 of Message Object n"] -pub type Db6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB7` reader - Data Byte 7 of Message Object n"] -pub type Db7R = crate::FieldReader; +pub type DB7_R = crate::FieldReader; #[doc = "Field `DB7` writer - Data Byte 7 of Message Object n"] -pub type Db7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"] #[inline(always)] - pub fn db4(&self) -> Db4R { - Db4R::new((self.bits & 0xff) as u8) + pub fn db4(&self) -> DB4_R { + DB4_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"] #[inline(always)] - pub fn db5(&self) -> Db5R { - Db5R::new(((self.bits >> 8) & 0xff) as u8) + pub fn db5(&self) -> DB5_R { + DB5_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"] #[inline(always)] - pub fn db6(&self) -> Db6R { - Db6R::new(((self.bits >> 16) & 0xff) as u8) + pub fn db6(&self) -> DB6_R { + DB6_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"] #[inline(always)] - pub fn db7(&self) -> Db7R { - Db7R::new(((self.bits >> 24) & 0xff) as u8) + pub fn db7(&self) -> DB7_R { + DB7_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"] #[inline(always)] #[must_use] - pub fn db4(&mut self) -> Db4W { - Db4W::new(self, 0) + pub fn db4(&mut self) -> DB4_W { + DB4_W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"] #[inline(always)] #[must_use] - pub fn db5(&mut self) -> Db5W { - Db5W::new(self, 8) + pub fn db5(&mut self) -> DB5_W { + DB5_W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"] #[inline(always)] #[must_use] - pub fn db6(&mut self) -> Db6W { - Db6W::new(self, 16) + pub fn db6(&mut self) -> DB6_W { + DB6_W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"] #[inline(always)] #[must_use] - pub fn db7(&mut self) -> Db7W { - Db7W::new(self, 24) + pub fn db7(&mut self) -> DB7_W { + DB7_W::new(self, 24) } } #[doc = "Message Object Data Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatah::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatah::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ModatahSpec; -impl crate::RegisterSpec for ModatahSpec { +pub struct MODATAH_SPEC; +impl crate::RegisterSpec for MODATAH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`modatah::R`](R) reader structure"] -impl crate::Readable for ModatahSpec {} +impl crate::Readable for MODATAH_SPEC {} #[doc = "`write(|w| ..)` method takes [`modatah::W`](W) writer structure"] -impl crate::Writable for ModatahSpec { +impl crate::Writable for MODATAH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODATAH to value 0"] -impl crate::Resettable for ModatahSpec { +impl crate::Resettable for MODATAH_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/modatal.rs b/src/can_mo0/modatal.rs index 30bf2a60..101f64d3 100644 --- a/src/can_mo0/modatal.rs +++ b/src/can_mo0/modatal.rs @@ -1,85 +1,85 @@ #[doc = "Register `MODATAL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MODATAL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DB0` reader - Data Byte 0 of Message Object n"] -pub type Db0R = crate::FieldReader; +pub type DB0_R = crate::FieldReader; #[doc = "Field `DB0` writer - Data Byte 0 of Message Object n"] -pub type Db0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB1` reader - Data Byte 1 of Message Object n"] -pub type Db1R = crate::FieldReader; +pub type DB1_R = crate::FieldReader; #[doc = "Field `DB1` writer - Data Byte 1 of Message Object n"] -pub type Db1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB2` reader - Data Byte 2 of Message Object n"] -pub type Db2R = crate::FieldReader; +pub type DB2_R = crate::FieldReader; #[doc = "Field `DB2` writer - Data Byte 2 of Message Object n"] -pub type Db2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DB3` reader - Data Byte 3 of Message Object n"] -pub type Db3R = crate::FieldReader; +pub type DB3_R = crate::FieldReader; #[doc = "Field `DB3` writer - Data Byte 3 of Message Object n"] -pub type Db3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DB3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"] #[inline(always)] - pub fn db0(&self) -> Db0R { - Db0R::new((self.bits & 0xff) as u8) + pub fn db0(&self) -> DB0_R { + DB0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"] #[inline(always)] - pub fn db1(&self) -> Db1R { - Db1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn db1(&self) -> DB1_R { + DB1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"] #[inline(always)] - pub fn db2(&self) -> Db2R { - Db2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn db2(&self) -> DB2_R { + DB2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"] #[inline(always)] - pub fn db3(&self) -> Db3R { - Db3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn db3(&self) -> DB3_R { + DB3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"] #[inline(always)] #[must_use] - pub fn db0(&mut self) -> Db0W { - Db0W::new(self, 0) + pub fn db0(&mut self) -> DB0_W { + DB0_W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"] #[inline(always)] #[must_use] - pub fn db1(&mut self) -> Db1W { - Db1W::new(self, 8) + pub fn db1(&mut self) -> DB1_W { + DB1_W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"] #[inline(always)] #[must_use] - pub fn db2(&mut self) -> Db2W { - Db2W::new(self, 16) + pub fn db2(&mut self) -> DB2_W { + DB2_W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"] #[inline(always)] #[must_use] - pub fn db3(&mut self) -> Db3W { - Db3W::new(self, 24) + pub fn db3(&mut self) -> DB3_W { + DB3_W::new(self, 24) } } #[doc = "Message Object Data Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`modatal::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`modatal::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ModatalSpec; -impl crate::RegisterSpec for ModatalSpec { +pub struct MODATAL_SPEC; +impl crate::RegisterSpec for MODATAL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`modatal::R`](R) reader structure"] -impl crate::Readable for ModatalSpec {} +impl crate::Readable for MODATAL_SPEC {} #[doc = "`write(|w| ..)` method takes [`modatal::W`](W) writer structure"] -impl crate::Writable for ModatalSpec { +impl crate::Writable for MODATAL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MODATAL to value 0"] -impl crate::Resettable for ModatalSpec { +impl crate::Resettable for MODATAL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/mofcr.rs b/src/can_mo0/mofcr.rs index a61c34fb..da9c3236 100644 --- a/src/can_mo0/mofcr.rs +++ b/src/can_mo0/mofcr.rs @@ -1,76 +1,76 @@ #[doc = "Register `MOFCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOFCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Message Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mmc { +pub enum MMC_A { #[doc = "0: Standard Message Object"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Receive FIFO Base Object"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Transmit FIFO Base Object"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Transmit FIFO Slave Object"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Gateway Source Object"] - Value5 = 4, + VALUE5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mmc) -> Self { + fn from(variant: MMC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mmc { +impl crate::FieldSpec for MMC_A { type Ux = u8; } -impl crate::IsEnum for Mmc {} +impl crate::IsEnum for MMC_A {} #[doc = "Field `MMC` reader - Message Mode Control"] -pub type MmcR = crate::FieldReader; -impl MmcR { +pub type MMC_R = crate::FieldReader; +impl MMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Mmc::Value1), - 1 => Some(Mmc::Value2), - 2 => Some(Mmc::Value3), - 3 => Some(Mmc::Value4), - 4 => Some(Mmc::Value5), + 0 => Some(MMC_A::VALUE1), + 1 => Some(MMC_A::VALUE2), + 2 => Some(MMC_A::VALUE3), + 3 => Some(MMC_A::VALUE4), + 4 => Some(MMC_A::VALUE5), _ => None, } } #[doc = "Standard Message Object"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mmc::Value1 + *self == MMC_A::VALUE1 } #[doc = "Receive FIFO Base Object"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mmc::Value2 + *self == MMC_A::VALUE2 } #[doc = "Transmit FIFO Base Object"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mmc::Value3 + *self == MMC_A::VALUE3 } #[doc = "Transmit FIFO Slave Object"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mmc::Value4 + *self == MMC_A::VALUE4 } #[doc = "Gateway Source Object"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Mmc::Value5 + *self == MMC_A::VALUE5 } } #[doc = "Field `MMC` writer - Message Mode Control"] -pub type MmcW<'a, REG> = crate::FieldWriter<'a, REG, 4, Mmc>; -impl<'a, REG> MmcW<'a, REG> +pub type MMC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MMC_A>; +impl<'a, REG> MMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,679 +78,679 @@ where #[doc = "Standard Message Object"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mmc::Value1) + self.variant(MMC_A::VALUE1) } #[doc = "Receive FIFO Base Object"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mmc::Value2) + self.variant(MMC_A::VALUE2) } #[doc = "Transmit FIFO Base Object"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mmc::Value3) + self.variant(MMC_A::VALUE3) } #[doc = "Transmit FIFO Slave Object"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mmc::Value4) + self.variant(MMC_A::VALUE4) } #[doc = "Gateway Source Object"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Mmc::Value5) + self.variant(MMC_A::VALUE5) } } #[doc = "Gateway Data Frame Send\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gdfs { +pub enum GDFS_A { #[doc = "0: TXRQ is unchanged in the destination object."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gdfs) -> Self { + fn from(variant: GDFS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GDFS` reader - Gateway Data Frame Send"] -pub type GdfsR = crate::BitReader; -impl GdfsR { +pub type GDFS_R = crate::BitReader; +impl GDFS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gdfs { + pub const fn variant(&self) -> GDFS_A { match self.bits { - false => Gdfs::Value1, - true => Gdfs::Value2, + false => GDFS_A::VALUE1, + true => GDFS_A::VALUE2, } } #[doc = "TXRQ is unchanged in the destination object."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gdfs::Value1 + *self == GDFS_A::VALUE1 } #[doc = "TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gdfs::Value2 + *self == GDFS_A::VALUE2 } } #[doc = "Field `GDFS` writer - Gateway Data Frame Send"] -pub type GdfsW<'a, REG> = crate::BitWriter<'a, REG, Gdfs>; -impl<'a, REG> GdfsW<'a, REG> +pub type GDFS_W<'a, REG> = crate::BitWriter<'a, REG, GDFS_A>; +impl<'a, REG> GDFS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TXRQ is unchanged in the destination object."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gdfs::Value1) + self.variant(GDFS_A::VALUE1) } #[doc = "TXRQ is set in the gateway destination object after the internal transfer from the gateway source to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gdfs::Value2) + self.variant(GDFS_A::VALUE2) } } #[doc = "Identifier Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Idc { +pub enum IDC_A { #[doc = "0: The identifier of the gateway source object is not copied."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Idc) -> Self { + fn from(variant: IDC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IDC` reader - Identifier Copy"] -pub type IdcR = crate::BitReader; -impl IdcR { +pub type IDC_R = crate::BitReader; +impl IDC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Idc { + pub const fn variant(&self) -> IDC_A { match self.bits { - false => Idc::Value1, - true => Idc::Value2, + false => IDC_A::VALUE1, + true => IDC_A::VALUE2, } } #[doc = "The identifier of the gateway source object is not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Idc::Value1 + *self == IDC_A::VALUE1 } #[doc = "The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Idc::Value2 + *self == IDC_A::VALUE2 } } #[doc = "Field `IDC` writer - Identifier Copy"] -pub type IdcW<'a, REG> = crate::BitWriter<'a, REG, Idc>; -impl<'a, REG> IdcW<'a, REG> +pub type IDC_W<'a, REG> = crate::BitWriter<'a, REG, IDC_A>; +impl<'a, REG> IDC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The identifier of the gateway source object is not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Idc::Value1) + self.variant(IDC_A::VALUE1) } #[doc = "The identifier of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Idc::Value2) + self.variant(IDC_A::VALUE2) } } #[doc = "Data Length Code Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlcc { +pub enum DLCC_A { #[doc = "0: Data length code is not copied."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlcc) -> Self { + fn from(variant: DLCC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLCC` reader - Data Length Code Copy"] -pub type DlccR = crate::BitReader; -impl DlccR { +pub type DLCC_R = crate::BitReader; +impl DLCC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlcc { + pub const fn variant(&self) -> DLCC_A { match self.bits { - false => Dlcc::Value1, - true => Dlcc::Value2, + false => DLCC_A::VALUE1, + true => DLCC_A::VALUE2, } } #[doc = "Data length code is not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlcc::Value1 + *self == DLCC_A::VALUE1 } #[doc = "Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlcc::Value2 + *self == DLCC_A::VALUE2 } } #[doc = "Field `DLCC` writer - Data Length Code Copy"] -pub type DlccW<'a, REG> = crate::BitWriter<'a, REG, Dlcc>; -impl<'a, REG> DlccW<'a, REG> +pub type DLCC_W<'a, REG> = crate::BitWriter<'a, REG, DLCC_A>; +impl<'a, REG> DLCC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data length code is not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlcc::Value1) + self.variant(DLCC_A::VALUE1) } #[doc = "Data length code of the gateway source object (after storing the received frame in the source) is copied to the gateway destination object."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlcc::Value2) + self.variant(DLCC_A::VALUE2) } } #[doc = "Data Copy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Datc { +pub enum DATC_A { #[doc = "0: Data fields are not copied."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Datc) -> Self { + fn from(variant: DATC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DATC` reader - Data Copy"] -pub type DatcR = crate::BitReader; -impl DatcR { +pub type DATC_R = crate::BitReader; +impl DATC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Datc { + pub const fn variant(&self) -> DATC_A { match self.bits { - false => Datc::Value1, - true => Datc::Value2, + false => DATC_A::VALUE1, + true => DATC_A::VALUE2, } } #[doc = "Data fields are not copied."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Datc::Value1 + *self == DATC_A::VALUE1 } #[doc = "Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Datc::Value2 + *self == DATC_A::VALUE2 } } #[doc = "Field `DATC` writer - Data Copy"] -pub type DatcW<'a, REG> = crate::BitWriter<'a, REG, Datc>; -impl<'a, REG> DatcW<'a, REG> +pub type DATC_W<'a, REG> = crate::BitWriter<'a, REG, DATC_A>; +impl<'a, REG> DATC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data fields are not copied."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Datc::Value1) + self.variant(DATC_A::VALUE1) } #[doc = "Data fields in registers MODATALn and MODATAHn of the gateway source object (after storing the received frame in the source) are copied to the gateway destination."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Datc::Value2) + self.variant(DATC_A::VALUE2) } } #[doc = "Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxie { +pub enum RXIE_A { #[doc = "0: Message receive interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message receive interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxie) -> Self { + fn from(variant: RXIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXIE` reader - Receive Interrupt Enable"] -pub type RxieR = crate::BitReader; -impl RxieR { +pub type RXIE_R = crate::BitReader; +impl RXIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxie { + pub const fn variant(&self) -> RXIE_A { match self.bits { - false => Rxie::Value1, - true => Rxie::Value2, + false => RXIE_A::VALUE1, + true => RXIE_A::VALUE2, } } #[doc = "Message receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxie::Value1 + *self == RXIE_A::VALUE1 } #[doc = "Message receive interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxie::Value2 + *self == RXIE_A::VALUE2 } } #[doc = "Field `RXIE` writer - Receive Interrupt Enable"] -pub type RxieW<'a, REG> = crate::BitWriter<'a, REG, Rxie>; -impl<'a, REG> RxieW<'a, REG> +pub type RXIE_W<'a, REG> = crate::BitWriter<'a, REG, RXIE_A>; +impl<'a, REG> RXIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rxie::Value1) + self.variant(RXIE_A::VALUE1) } #[doc = "Message receive interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rxie::Value2) + self.variant(RXIE_A::VALUE2) } } #[doc = "Transmit Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txie { +pub enum TXIE_A { #[doc = "0: Message transmit interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message transmit interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txie) -> Self { + fn from(variant: TXIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXIE` reader - Transmit Interrupt Enable"] -pub type TxieR = crate::BitReader; -impl TxieR { +pub type TXIE_R = crate::BitReader; +impl TXIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txie { + pub const fn variant(&self) -> TXIE_A { match self.bits { - false => Txie::Value1, - true => Txie::Value2, + false => TXIE_A::VALUE1, + true => TXIE_A::VALUE2, } } #[doc = "Message transmit interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txie::Value1 + *self == TXIE_A::VALUE1 } #[doc = "Message transmit interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txie::Value2 + *self == TXIE_A::VALUE2 } } #[doc = "Field `TXIE` writer - Transmit Interrupt Enable"] -pub type TxieW<'a, REG> = crate::BitWriter<'a, REG, Txie>; -impl<'a, REG> TxieW<'a, REG> +pub type TXIE_W<'a, REG> = crate::BitWriter<'a, REG, TXIE_A>; +impl<'a, REG> TXIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Message transmit interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Txie::Value1) + self.variant(TXIE_A::VALUE1) } #[doc = "Message transmit interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Txie::Value2) + self.variant(TXIE_A::VALUE2) } } #[doc = "Overflow Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ovie { +pub enum OVIE_A { #[doc = "0: FIFO full interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: FIFO full interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ovie) -> Self { + fn from(variant: OVIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OVIE` reader - Overflow Interrupt Enable"] -pub type OvieR = crate::BitReader; -impl OvieR { +pub type OVIE_R = crate::BitReader; +impl OVIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ovie { + pub const fn variant(&self) -> OVIE_A { match self.bits { - false => Ovie::Value1, - true => Ovie::Value2, + false => OVIE_A::VALUE1, + true => OVIE_A::VALUE2, } } #[doc = "FIFO full interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ovie::Value1 + *self == OVIE_A::VALUE1 } #[doc = "FIFO full interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ovie::Value2 + *self == OVIE_A::VALUE2 } } #[doc = "Field `OVIE` writer - Overflow Interrupt Enable"] -pub type OvieW<'a, REG> = crate::BitWriter<'a, REG, Ovie>; -impl<'a, REG> OvieW<'a, REG> +pub type OVIE_W<'a, REG> = crate::BitWriter<'a, REG, OVIE_A>; +impl<'a, REG> OVIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "FIFO full interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ovie::Value1) + self.variant(OVIE_A::VALUE1) } #[doc = "FIFO full interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ovie::Value2) + self.variant(OVIE_A::VALUE2) } } #[doc = "Foreign Remote Request Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Frren { +pub enum FRREN_A { #[doc = "0: TXRQ of message object n is set on reception of a matching Remote Frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Frren) -> Self { + fn from(variant: FRREN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FRREN` reader - Foreign Remote Request Enable"] -pub type FrrenR = crate::BitReader; -impl FrrenR { +pub type FRREN_R = crate::BitReader; +impl FRREN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Frren { + pub const fn variant(&self) -> FRREN_A { match self.bits { - false => Frren::Value1, - true => Frren::Value2, + false => FRREN_A::VALUE1, + true => FRREN_A::VALUE2, } } #[doc = "TXRQ of message object n is set on reception of a matching Remote Frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Frren::Value1 + *self == FRREN_A::VALUE1 } #[doc = "TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Frren::Value2 + *self == FRREN_A::VALUE2 } } #[doc = "Field `FRREN` writer - Foreign Remote Request Enable"] -pub type FrrenW<'a, REG> = crate::BitWriter<'a, REG, Frren>; -impl<'a, REG> FrrenW<'a, REG> +pub type FRREN_W<'a, REG> = crate::BitWriter<'a, REG, FRREN_A>; +impl<'a, REG> FRREN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TXRQ of message object n is set on reception of a matching Remote Frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Frren::Value1) + self.variant(FRREN_A::VALUE1) } #[doc = "TXRQ of the message object referenced by the pointer CUR is set on reception of a matching Remote Frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Frren::Value2) + self.variant(FRREN_A::VALUE2) } } #[doc = "Transmit Object Remote Monitoring\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmm { +pub enum RMM_A { #[doc = "0: Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmm) -> Self { + fn from(variant: RMM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMM` reader - Transmit Object Remote Monitoring"] -pub type RmmR = crate::BitReader; -impl RmmR { +pub type RMM_R = crate::BitReader; +impl RMM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rmm { + pub const fn variant(&self) -> RMM_A { match self.bits { - false => Rmm::Value1, - true => Rmm::Value2, + false => RMM_A::VALUE1, + true => RMM_A::VALUE2, } } #[doc = "Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rmm::Value1 + *self == RMM_A::VALUE1 } #[doc = "Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rmm::Value2 + *self == RMM_A::VALUE2 } } #[doc = "Field `RMM` writer - Transmit Object Remote Monitoring"] -pub type RmmW<'a, REG> = crate::BitWriter<'a, REG, Rmm>; -impl<'a, REG> RmmW<'a, REG> +pub type RMM_W<'a, REG> = crate::BitWriter<'a, REG, RMM_A>; +impl<'a, REG> RMM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Remote monitoring is disabled: Identifier, IDE bit, and DLC of message object n remain unchanged upon the reception of a matching Remote Frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rmm::Value1) + self.variant(RMM_A::VALUE1) } #[doc = "Remote monitoring is enabled: Identifier, IDE bit, and DLC of a matching Remote Frame are copied to transmit object n in order to monitor incoming Remote Frames."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rmm::Value2) + self.variant(RMM_A::VALUE2) } } #[doc = "Field `SDT` reader - Single Data Transfer"] -pub type SdtR = crate::BitReader; +pub type SDT_R = crate::BitReader; #[doc = "Field `SDT` writer - Single Data Transfer"] -pub type SdtW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SDT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STT` reader - Single Transmit Trial"] -pub type SttR = crate::BitReader; +pub type STT_R = crate::BitReader; #[doc = "Field `STT` writer - Single Transmit Trial"] -pub type SttW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DLC` reader - Data Length Code"] -pub type DlcR = crate::FieldReader; +pub type DLC_R = crate::FieldReader; #[doc = "Field `DLC` writer - Data Length Code"] -pub type DlcW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DLC_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Message Mode Control"] #[inline(always)] - pub fn mmc(&self) -> MmcR { - MmcR::new((self.bits & 0x0f) as u8) + pub fn mmc(&self) -> MMC_R { + MMC_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Gateway Data Frame Send"] #[inline(always)] - pub fn gdfs(&self) -> GdfsR { - GdfsR::new(((self.bits >> 8) & 1) != 0) + pub fn gdfs(&self) -> GDFS_R { + GDFS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Identifier Copy"] #[inline(always)] - pub fn idc(&self) -> IdcR { - IdcR::new(((self.bits >> 9) & 1) != 0) + pub fn idc(&self) -> IDC_R { + IDC_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Data Length Code Copy"] #[inline(always)] - pub fn dlcc(&self) -> DlccR { - DlccR::new(((self.bits >> 10) & 1) != 0) + pub fn dlcc(&self) -> DLCC_R { + DLCC_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Copy"] #[inline(always)] - pub fn datc(&self) -> DatcR { - DatcR::new(((self.bits >> 11) & 1) != 0) + pub fn datc(&self) -> DATC_R { + DATC_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Receive Interrupt Enable"] #[inline(always)] - pub fn rxie(&self) -> RxieR { - RxieR::new(((self.bits >> 16) & 1) != 0) + pub fn rxie(&self) -> RXIE_R { + RXIE_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Transmit Interrupt Enable"] #[inline(always)] - pub fn txie(&self) -> TxieR { - TxieR::new(((self.bits >> 17) & 1) != 0) + pub fn txie(&self) -> TXIE_R { + TXIE_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Overflow Interrupt Enable"] #[inline(always)] - pub fn ovie(&self) -> OvieR { - OvieR::new(((self.bits >> 18) & 1) != 0) + pub fn ovie(&self) -> OVIE_R { + OVIE_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Foreign Remote Request Enable"] #[inline(always)] - pub fn frren(&self) -> FrrenR { - FrrenR::new(((self.bits >> 20) & 1) != 0) + pub fn frren(&self) -> FRREN_R { + FRREN_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Transmit Object Remote Monitoring"] #[inline(always)] - pub fn rmm(&self) -> RmmR { - RmmR::new(((self.bits >> 21) & 1) != 0) + pub fn rmm(&self) -> RMM_R { + RMM_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Single Data Transfer"] #[inline(always)] - pub fn sdt(&self) -> SdtR { - SdtR::new(((self.bits >> 22) & 1) != 0) + pub fn sdt(&self) -> SDT_R { + SDT_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Single Transmit Trial"] #[inline(always)] - pub fn stt(&self) -> SttR { - SttR::new(((self.bits >> 23) & 1) != 0) + pub fn stt(&self) -> STT_R { + STT_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:27 - Data Length Code"] #[inline(always)] - pub fn dlc(&self) -> DlcR { - DlcR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn dlc(&self) -> DLC_R { + DLC_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Message Mode Control"] #[inline(always)] #[must_use] - pub fn mmc(&mut self) -> MmcW { - MmcW::new(self, 0) + pub fn mmc(&mut self) -> MMC_W { + MMC_W::new(self, 0) } #[doc = "Bit 8 - Gateway Data Frame Send"] #[inline(always)] #[must_use] - pub fn gdfs(&mut self) -> GdfsW { - GdfsW::new(self, 8) + pub fn gdfs(&mut self) -> GDFS_W { + GDFS_W::new(self, 8) } #[doc = "Bit 9 - Identifier Copy"] #[inline(always)] #[must_use] - pub fn idc(&mut self) -> IdcW { - IdcW::new(self, 9) + pub fn idc(&mut self) -> IDC_W { + IDC_W::new(self, 9) } #[doc = "Bit 10 - Data Length Code Copy"] #[inline(always)] #[must_use] - pub fn dlcc(&mut self) -> DlccW { - DlccW::new(self, 10) + pub fn dlcc(&mut self) -> DLCC_W { + DLCC_W::new(self, 10) } #[doc = "Bit 11 - Data Copy"] #[inline(always)] #[must_use] - pub fn datc(&mut self) -> DatcW { - DatcW::new(self, 11) + pub fn datc(&mut self) -> DATC_W { + DATC_W::new(self, 11) } #[doc = "Bit 16 - Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rxie(&mut self) -> RxieW { - RxieW::new(self, 16) + pub fn rxie(&mut self) -> RXIE_W { + RXIE_W::new(self, 16) } #[doc = "Bit 17 - Transmit Interrupt Enable"] #[inline(always)] #[must_use] - pub fn txie(&mut self) -> TxieW { - TxieW::new(self, 17) + pub fn txie(&mut self) -> TXIE_W { + TXIE_W::new(self, 17) } #[doc = "Bit 18 - Overflow Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ovie(&mut self) -> OvieW { - OvieW::new(self, 18) + pub fn ovie(&mut self) -> OVIE_W { + OVIE_W::new(self, 18) } #[doc = "Bit 20 - Foreign Remote Request Enable"] #[inline(always)] #[must_use] - pub fn frren(&mut self) -> FrrenW { - FrrenW::new(self, 20) + pub fn frren(&mut self) -> FRREN_W { + FRREN_W::new(self, 20) } #[doc = "Bit 21 - Transmit Object Remote Monitoring"] #[inline(always)] #[must_use] - pub fn rmm(&mut self) -> RmmW { - RmmW::new(self, 21) + pub fn rmm(&mut self) -> RMM_W { + RMM_W::new(self, 21) } #[doc = "Bit 22 - Single Data Transfer"] #[inline(always)] #[must_use] - pub fn sdt(&mut self) -> SdtW { - SdtW::new(self, 22) + pub fn sdt(&mut self) -> SDT_W { + SDT_W::new(self, 22) } #[doc = "Bit 23 - Single Transmit Trial"] #[inline(always)] #[must_use] - pub fn stt(&mut self) -> SttW { - SttW::new(self, 23) + pub fn stt(&mut self) -> STT_W { + STT_W::new(self, 23) } #[doc = "Bits 24:27 - Data Length Code"] #[inline(always)] #[must_use] - pub fn dlc(&mut self) -> DlcW { - DlcW::new(self, 24) + pub fn dlc(&mut self) -> DLC_W { + DLC_W::new(self, 24) } } #[doc = "Message Object Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MofcrSpec; -impl crate::RegisterSpec for MofcrSpec { +pub struct MOFCR_SPEC; +impl crate::RegisterSpec for MOFCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mofcr::R`](R) reader structure"] -impl crate::Readable for MofcrSpec {} +impl crate::Readable for MOFCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mofcr::W`](W) writer structure"] -impl crate::Writable for MofcrSpec { +impl crate::Writable for MOFCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOFCR to value 0"] -impl crate::Resettable for MofcrSpec { +impl crate::Resettable for MOFCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/mofgpr.rs b/src/can_mo0/mofgpr.rs index 0639b371..ba8f90c5 100644 --- a/src/can_mo0/mofgpr.rs +++ b/src/can_mo0/mofgpr.rs @@ -1,85 +1,85 @@ #[doc = "Register `MOFGPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOFGPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOT` reader - Bottom Pointer"] -pub type BotR = crate::FieldReader; +pub type BOT_R = crate::FieldReader; #[doc = "Field `BOT` writer - Bottom Pointer"] -pub type BotW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type BOT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TOP` reader - Top Pointer"] -pub type TopR = crate::FieldReader; +pub type TOP_R = crate::FieldReader; #[doc = "Field `TOP` writer - Top Pointer"] -pub type TopW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type TOP_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CUR` reader - Current Object Pointer"] -pub type CurR = crate::FieldReader; +pub type CUR_R = crate::FieldReader; #[doc = "Field `CUR` writer - Current Object Pointer"] -pub type CurW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CUR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `SEL` reader - Object Select Pointer"] -pub type SelR = crate::FieldReader; +pub type SEL_R = crate::FieldReader; #[doc = "Field `SEL` writer - Object Select Pointer"] -pub type SelW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Bottom Pointer"] #[inline(always)] - pub fn bot(&self) -> BotR { - BotR::new((self.bits & 0xff) as u8) + pub fn bot(&self) -> BOT_R { + BOT_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Top Pointer"] #[inline(always)] - pub fn top(&self) -> TopR { - TopR::new(((self.bits >> 8) & 0xff) as u8) + pub fn top(&self) -> TOP_R { + TOP_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Current Object Pointer"] #[inline(always)] - pub fn cur(&self) -> CurR { - CurR::new(((self.bits >> 16) & 0xff) as u8) + pub fn cur(&self) -> CUR_R { + CUR_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Object Select Pointer"] #[inline(always)] - pub fn sel(&self) -> SelR { - SelR::new(((self.bits >> 24) & 0xff) as u8) + pub fn sel(&self) -> SEL_R { + SEL_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Bottom Pointer"] #[inline(always)] #[must_use] - pub fn bot(&mut self) -> BotW { - BotW::new(self, 0) + pub fn bot(&mut self) -> BOT_W { + BOT_W::new(self, 0) } #[doc = "Bits 8:15 - Top Pointer"] #[inline(always)] #[must_use] - pub fn top(&mut self) -> TopW { - TopW::new(self, 8) + pub fn top(&mut self) -> TOP_W { + TOP_W::new(self, 8) } #[doc = "Bits 16:23 - Current Object Pointer"] #[inline(always)] #[must_use] - pub fn cur(&mut self) -> CurW { - CurW::new(self, 16) + pub fn cur(&mut self) -> CUR_W { + CUR_W::new(self, 16) } #[doc = "Bits 24:31 - Object Select Pointer"] #[inline(always)] #[must_use] - pub fn sel(&mut self) -> SelW { - SelW::new(self, 24) + pub fn sel(&mut self) -> SEL_W { + SEL_W::new(self, 24) } } #[doc = "Message Object FIFO/Gateway Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mofgpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mofgpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MofgprSpec; -impl crate::RegisterSpec for MofgprSpec { +pub struct MOFGPR_SPEC; +impl crate::RegisterSpec for MOFGPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mofgpr::R`](R) reader structure"] -impl crate::Readable for MofgprSpec {} +impl crate::Readable for MOFGPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mofgpr::W`](W) writer structure"] -impl crate::Writable for MofgprSpec { +impl crate::Writable for MOFGPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOFGPR to value 0"] -impl crate::Resettable for MofgprSpec { +impl crate::Resettable for MOFGPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/moipr.rs b/src/can_mo0/moipr.rs index 9145eb1a..52eddea5 100644 --- a/src/can_mo0/moipr.rs +++ b/src/can_mo0/moipr.rs @@ -1,60 +1,60 @@ #[doc = "Register `MOIPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MOIPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Receive Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rxinp { +pub enum RXINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rxinp) -> Self { + fn from(variant: RXINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rxinp { +impl crate::FieldSpec for RXINP_A { type Ux = u8; } -impl crate::IsEnum for Rxinp {} +impl crate::IsEnum for RXINP_A {} #[doc = "Field `RXINP` reader - Receive Interrupt Node Pointer"] -pub type RxinpR = crate::FieldReader; -impl RxinpR { +pub type RXINP_R = crate::FieldReader; +impl RXINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rxinp::Value1), - 1 => Some(Rxinp::Value2), - 7 => Some(Rxinp::Value3), + 0 => Some(RXINP_A::VALUE1), + 1 => Some(RXINP_A::VALUE2), + 7 => Some(RXINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxinp::Value1 + *self == RXINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxinp::Value2 + *self == RXINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rxinp::Value3 + *self == RXINP_A::VALUE3 } } #[doc = "Field `RXINP` writer - Receive Interrupt Node Pointer"] -pub type RxinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Rxinp>; -impl<'a, REG> RxinpW<'a, REG> +pub type RXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RXINP_A>; +impl<'a, REG> RXINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rxinp::Value1) + self.variant(RXINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rxinp::Value2) + self.variant(RXINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rxinp::Value3) + self.variant(RXINP_A::VALUE3) } } #[doc = "Transmit Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Txinp { +pub enum TXINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Txinp) -> Self { + fn from(variant: TXINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Txinp { +impl crate::FieldSpec for TXINP_A { type Ux = u8; } -impl crate::IsEnum for Txinp {} +impl crate::IsEnum for TXINP_A {} #[doc = "Field `TXINP` reader - Transmit Interrupt Node Pointer"] -pub type TxinpR = crate::FieldReader; -impl TxinpR { +pub type TXINP_R = crate::FieldReader; +impl TXINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Txinp::Value1), - 1 => Some(Txinp::Value2), - 7 => Some(Txinp::Value3), + 0 => Some(TXINP_A::VALUE1), + 1 => Some(TXINP_A::VALUE2), + 7 => Some(TXINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txinp::Value1 + *self == TXINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txinp::Value2 + *self == TXINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Txinp::Value3 + *self == TXINP_A::VALUE3 } } #[doc = "Field `TXINP` writer - Transmit Interrupt Node Pointer"] -pub type TxinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Txinp>; -impl<'a, REG> TxinpW<'a, REG> +pub type TXINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TXINP_A>; +impl<'a, REG> TXINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,89 +135,89 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Txinp::Value1) + self.variant(TXINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Txinp::Value2) + self.variant(TXINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Txinp::Value3) + self.variant(TXINP_A::VALUE3) } } #[doc = "Field `MPN` reader - Message Pending Number"] -pub type MpnR = crate::FieldReader; +pub type MPN_R = crate::FieldReader; #[doc = "Field `MPN` writer - Message Pending Number"] -pub type MpnW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type MPN_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CFCVAL` reader - CAN Frame Counter Value"] -pub type CfcvalR = crate::FieldReader; +pub type CFCVAL_R = crate::FieldReader; #[doc = "Field `CFCVAL` writer - CAN Frame Counter Value"] -pub type CfcvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CFCVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:2 - Receive Interrupt Node Pointer"] #[inline(always)] - pub fn rxinp(&self) -> RxinpR { - RxinpR::new((self.bits & 7) as u8) + pub fn rxinp(&self) -> RXINP_R { + RXINP_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Transmit Interrupt Node Pointer"] #[inline(always)] - pub fn txinp(&self) -> TxinpR { - TxinpR::new(((self.bits >> 4) & 7) as u8) + pub fn txinp(&self) -> TXINP_R { + TXINP_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:15 - Message Pending Number"] #[inline(always)] - pub fn mpn(&self) -> MpnR { - MpnR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mpn(&self) -> MPN_R { + MPN_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - CAN Frame Counter Value"] #[inline(always)] - pub fn cfcval(&self) -> CfcvalR { - CfcvalR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn cfcval(&self) -> CFCVAL_R { + CFCVAL_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:2 - Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn rxinp(&mut self) -> RxinpW { - RxinpW::new(self, 0) + pub fn rxinp(&mut self) -> RXINP_W { + RXINP_W::new(self, 0) } #[doc = "Bits 4:6 - Transmit Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn txinp(&mut self) -> TxinpW { - TxinpW::new(self, 4) + pub fn txinp(&mut self) -> TXINP_W { + TXINP_W::new(self, 4) } #[doc = "Bits 8:15 - Message Pending Number"] #[inline(always)] #[must_use] - pub fn mpn(&mut self) -> MpnW { - MpnW::new(self, 8) + pub fn mpn(&mut self) -> MPN_W { + MPN_W::new(self, 8) } #[doc = "Bits 16:31 - CAN Frame Counter Value"] #[inline(always)] #[must_use] - pub fn cfcval(&mut self) -> CfcvalW { - CfcvalW::new(self, 16) + pub fn cfcval(&mut self) -> CFCVAL_W { + CFCVAL_W::new(self, 16) } } #[doc = "Message Object Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`moipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`moipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MoiprSpec; -impl crate::RegisterSpec for MoiprSpec { +pub struct MOIPR_SPEC; +impl crate::RegisterSpec for MOIPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`moipr::R`](R) reader structure"] -impl crate::Readable for MoiprSpec {} +impl crate::Readable for MOIPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`moipr::W`](W) writer structure"] -impl crate::Writable for MoiprSpec { +impl crate::Writable for MOIPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MOIPR to value 0"] -impl crate::Resettable for MoiprSpec { +impl crate::Resettable for MOIPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_mo0/mostat.rs b/src/can_mo0/mostat.rs index da7e3fa9..9f3b491b 100644 --- a/src/can_mo0/mostat.rs +++ b/src/can_mo0/mostat.rs @@ -1,528 +1,528 @@ #[doc = "Register `MOSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Receive Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxpnd { +pub enum RXPND_A { #[doc = "0: No CAN message has been received."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A CAN message has been received by the message object n, either directly or via gateway copy action."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxpnd) -> Self { + fn from(variant: RXPND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXPND` reader - Receive Pending"] -pub type RxpndR = crate::BitReader; -impl RxpndR { +pub type RXPND_R = crate::BitReader; +impl RXPND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxpnd { + pub const fn variant(&self) -> RXPND_A { match self.bits { - false => Rxpnd::Value1, - true => Rxpnd::Value2, + false => RXPND_A::VALUE1, + true => RXPND_A::VALUE2, } } #[doc = "No CAN message has been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxpnd::Value1 + *self == RXPND_A::VALUE1 } #[doc = "A CAN message has been received by the message object n, either directly or via gateway copy action."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxpnd::Value2 + *self == RXPND_A::VALUE2 } } #[doc = "Transmit Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txpnd { +pub enum TXPND_A { #[doc = "0: No CAN message has been transmitted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A CAN message from message object n has been transmitted successfully over the CAN bus."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txpnd) -> Self { + fn from(variant: TXPND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXPND` reader - Transmit Pending"] -pub type TxpndR = crate::BitReader; -impl TxpndR { +pub type TXPND_R = crate::BitReader; +impl TXPND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txpnd { + pub const fn variant(&self) -> TXPND_A { match self.bits { - false => Txpnd::Value1, - true => Txpnd::Value2, + false => TXPND_A::VALUE1, + true => TXPND_A::VALUE2, } } #[doc = "No CAN message has been transmitted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txpnd::Value1 + *self == TXPND_A::VALUE1 } #[doc = "A CAN message from message object n has been transmitted successfully over the CAN bus."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txpnd::Value2 + *self == TXPND_A::VALUE2 } } #[doc = "Receive Updating\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxupd { +pub enum RXUPD_A { #[doc = "0: No receive update ongoing."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message identifier, DLC, and data of the message object are currently updated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxupd) -> Self { + fn from(variant: RXUPD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXUPD` reader - Receive Updating"] -pub type RxupdR = crate::BitReader; -impl RxupdR { +pub type RXUPD_R = crate::BitReader; +impl RXUPD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxupd { + pub const fn variant(&self) -> RXUPD_A { match self.bits { - false => Rxupd::Value1, - true => Rxupd::Value2, + false => RXUPD_A::VALUE1, + true => RXUPD_A::VALUE2, } } #[doc = "No receive update ongoing."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxupd::Value1 + *self == RXUPD_A::VALUE1 } #[doc = "Message identifier, DLC, and data of the message object are currently updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxupd::Value2 + *self == RXUPD_A::VALUE2 } } #[doc = "New Data\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Newdat { +pub enum NEWDAT_A { #[doc = "0: No update of the message object n since last flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n has been updated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Newdat) -> Self { + fn from(variant: NEWDAT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NEWDAT` reader - New Data"] -pub type NewdatR = crate::BitReader; -impl NewdatR { +pub type NEWDAT_R = crate::BitReader; +impl NEWDAT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Newdat { + pub const fn variant(&self) -> NEWDAT_A { match self.bits { - false => Newdat::Value1, - true => Newdat::Value2, + false => NEWDAT_A::VALUE1, + true => NEWDAT_A::VALUE2, } } #[doc = "No update of the message object n since last flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Newdat::Value1 + *self == NEWDAT_A::VALUE1 } #[doc = "Message object n has been updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Newdat::Value2 + *self == NEWDAT_A::VALUE2 } } #[doc = "Message Lost\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Msglst { +pub enum MSGLST_A { #[doc = "0: No CAN message is lost."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A CAN message is lost because NEWDAT has become set again when it has already been set."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Msglst) -> Self { + fn from(variant: MSGLST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSGLST` reader - Message Lost"] -pub type MsglstR = crate::BitReader; -impl MsglstR { +pub type MSGLST_R = crate::BitReader; +impl MSGLST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msglst { + pub const fn variant(&self) -> MSGLST_A { match self.bits { - false => Msglst::Value1, - true => Msglst::Value2, + false => MSGLST_A::VALUE1, + true => MSGLST_A::VALUE2, } } #[doc = "No CAN message is lost."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msglst::Value1 + *self == MSGLST_A::VALUE1 } #[doc = "A CAN message is lost because NEWDAT has become set again when it has already been set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msglst::Value2 + *self == MSGLST_A::VALUE2 } } #[doc = "Message Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Msgval { +pub enum MSGVAL_A { #[doc = "0: Message object n is not valid."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n is valid."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Msgval) -> Self { + fn from(variant: MSGVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSGVAL` reader - Message Valid"] -pub type MsgvalR = crate::BitReader; -impl MsgvalR { +pub type MSGVAL_R = crate::BitReader; +impl MSGVAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msgval { + pub const fn variant(&self) -> MSGVAL_A { match self.bits { - false => Msgval::Value1, - true => Msgval::Value2, + false => MSGVAL_A::VALUE1, + true => MSGVAL_A::VALUE2, } } #[doc = "Message object n is not valid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msgval::Value1 + *self == MSGVAL_A::VALUE1 } #[doc = "Message object n is valid."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msgval::Value2 + *self == MSGVAL_A::VALUE2 } } #[doc = "Receive/Transmit Selected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rtsel { +pub enum RTSEL_A { #[doc = "0: Message object n is not selected for receive or transmit operation."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n is selected for receive or transmit operation."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rtsel) -> Self { + fn from(variant: RTSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTSEL` reader - Receive/Transmit Selected"] -pub type RtselR = crate::BitReader; -impl RtselR { +pub type RTSEL_R = crate::BitReader; +impl RTSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rtsel { + pub const fn variant(&self) -> RTSEL_A { match self.bits { - false => Rtsel::Value1, - true => Rtsel::Value2, + false => RTSEL_A::VALUE1, + true => RTSEL_A::VALUE2, } } #[doc = "Message object n is not selected for receive or transmit operation."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rtsel::Value1 + *self == RTSEL_A::VALUE1 } #[doc = "Message object n is selected for receive or transmit operation."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rtsel::Value2 + *self == RTSEL_A::VALUE2 } } #[doc = "Receive Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxen { +pub enum RXEN_A { #[doc = "0: Message object n is not enabled for frame reception."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n is enabled for frame reception."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxen) -> Self { + fn from(variant: RXEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXEN` reader - Receive Enable"] -pub type RxenR = crate::BitReader; -impl RxenR { +pub type RXEN_R = crate::BitReader; +impl RXEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxen { + pub const fn variant(&self) -> RXEN_A { match self.bits { - false => Rxen::Value1, - true => Rxen::Value2, + false => RXEN_A::VALUE1, + true => RXEN_A::VALUE2, } } #[doc = "Message object n is not enabled for frame reception."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxen::Value1 + *self == RXEN_A::VALUE1 } #[doc = "Message object n is enabled for frame reception."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxen::Value2 + *self == RXEN_A::VALUE2 } } #[doc = "Transmit Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txrq { +pub enum TXRQ_A { #[doc = "0: No transmission of message object n is requested."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transmission of message object n on the CAN bus is requested."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txrq) -> Self { + fn from(variant: TXRQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXRQ` reader - Transmit Request"] -pub type TxrqR = crate::BitReader; -impl TxrqR { +pub type TXRQ_R = crate::BitReader; +impl TXRQ_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txrq { + pub const fn variant(&self) -> TXRQ_A { match self.bits { - false => Txrq::Value1, - true => Txrq::Value2, + false => TXRQ_A::VALUE1, + true => TXRQ_A::VALUE2, } } #[doc = "No transmission of message object n is requested."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txrq::Value1 + *self == TXRQ_A::VALUE1 } #[doc = "Transmission of message object n on the CAN bus is requested."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txrq::Value2 + *self == TXRQ_A::VALUE2 } } #[doc = "Transmit Enable 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txen0 { +pub enum TXEN0_A { #[doc = "0: Message object n is not enabled for frame transmission."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n is enabled for frame transmission."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txen0) -> Self { + fn from(variant: TXEN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXEN0` reader - Transmit Enable 0"] -pub type Txen0R = crate::BitReader; -impl Txen0R { +pub type TXEN0_R = crate::BitReader; +impl TXEN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txen0 { + pub const fn variant(&self) -> TXEN0_A { match self.bits { - false => Txen0::Value1, - true => Txen0::Value2, + false => TXEN0_A::VALUE1, + true => TXEN0_A::VALUE2, } } #[doc = "Message object n is not enabled for frame transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txen0::Value1 + *self == TXEN0_A::VALUE1 } #[doc = "Message object n is enabled for frame transmission."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txen0::Value2 + *self == TXEN0_A::VALUE2 } } #[doc = "Transmit Enable 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txen1 { +pub enum TXEN1_A { #[doc = "0: Message object n is not enabled for frame transmission."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Message object n is enabled for frame transmission."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txen1) -> Self { + fn from(variant: TXEN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXEN1` reader - Transmit Enable 1"] -pub type Txen1R = crate::BitReader; -impl Txen1R { +pub type TXEN1_R = crate::BitReader; +impl TXEN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txen1 { + pub const fn variant(&self) -> TXEN1_A { match self.bits { - false => Txen1::Value1, - true => Txen1::Value2, + false => TXEN1_A::VALUE1, + true => TXEN1_A::VALUE2, } } #[doc = "Message object n is not enabled for frame transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txen1::Value1 + *self == TXEN1_A::VALUE1 } #[doc = "Message object n is enabled for frame transmission."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txen1::Value2 + *self == TXEN1_A::VALUE2 } } #[doc = "Message Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dir { +pub enum DIR_A { #[doc = "0: Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dir) -> Self { + fn from(variant: DIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIR` reader - Message Direction"] -pub type DirR = crate::BitReader; -impl DirR { +pub type DIR_R = crate::BitReader; +impl DIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dir { + pub const fn variant(&self) -> DIR_A { match self.bits { - false => Dir::Value1, - true => Dir::Value2, + false => DIR_A::VALUE1, + true => DIR_A::VALUE2, } } #[doc = "Receive Object selected: With TXRQ = 1, a Remote Frame with the identifier of message object n is scheduled for transmission. On reception of a Data Frame with matching identifier, the message is stored in message object n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dir::Value1 + *self == DIR_A::VALUE1 } #[doc = "Transmit Object selected: If TXRQ = 1, message object n is scheduled for transmission of a Data Frame. On reception of a Remote Frame with matching identifier, bit TXRQ is set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dir::Value2 + *self == DIR_A::VALUE2 } } #[doc = "Field `LIST` reader - List Allocation"] -pub type ListR = crate::FieldReader; +pub type LIST_R = crate::FieldReader; #[doc = "Field `PPREV` reader - Pointer to Previous Message Object"] -pub type PprevR = crate::FieldReader; +pub type PPREV_R = crate::FieldReader; #[doc = "Field `PNEXT` reader - Pointer to Next Message Object"] -pub type PnextR = crate::FieldReader; +pub type PNEXT_R = crate::FieldReader; impl R { #[doc = "Bit 0 - Receive Pending"] #[inline(always)] - pub fn rxpnd(&self) -> RxpndR { - RxpndR::new((self.bits & 1) != 0) + pub fn rxpnd(&self) -> RXPND_R { + RXPND_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transmit Pending"] #[inline(always)] - pub fn txpnd(&self) -> TxpndR { - TxpndR::new(((self.bits >> 1) & 1) != 0) + pub fn txpnd(&self) -> TXPND_R { + TXPND_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Receive Updating"] #[inline(always)] - pub fn rxupd(&self) -> RxupdR { - RxupdR::new(((self.bits >> 2) & 1) != 0) + pub fn rxupd(&self) -> RXUPD_R { + RXUPD_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - New Data"] #[inline(always)] - pub fn newdat(&self) -> NewdatR { - NewdatR::new(((self.bits >> 3) & 1) != 0) + pub fn newdat(&self) -> NEWDAT_R { + NEWDAT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Message Lost"] #[inline(always)] - pub fn msglst(&self) -> MsglstR { - MsglstR::new(((self.bits >> 4) & 1) != 0) + pub fn msglst(&self) -> MSGLST_R { + MSGLST_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Message Valid"] #[inline(always)] - pub fn msgval(&self) -> MsgvalR { - MsgvalR::new(((self.bits >> 5) & 1) != 0) + pub fn msgval(&self) -> MSGVAL_R { + MSGVAL_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Receive/Transmit Selected"] #[inline(always)] - pub fn rtsel(&self) -> RtselR { - RtselR::new(((self.bits >> 6) & 1) != 0) + pub fn rtsel(&self) -> RTSEL_R { + RTSEL_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Enable"] #[inline(always)] - pub fn rxen(&self) -> RxenR { - RxenR::new(((self.bits >> 7) & 1) != 0) + pub fn rxen(&self) -> RXEN_R { + RXEN_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Transmit Request"] #[inline(always)] - pub fn txrq(&self) -> TxrqR { - TxrqR::new(((self.bits >> 8) & 1) != 0) + pub fn txrq(&self) -> TXRQ_R { + TXRQ_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transmit Enable 0"] #[inline(always)] - pub fn txen0(&self) -> Txen0R { - Txen0R::new(((self.bits >> 9) & 1) != 0) + pub fn txen0(&self) -> TXEN0_R { + TXEN0_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Transmit Enable 1"] #[inline(always)] - pub fn txen1(&self) -> Txen1R { - Txen1R::new(((self.bits >> 10) & 1) != 0) + pub fn txen1(&self) -> TXEN1_R { + TXEN1_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Message Direction"] #[inline(always)] - pub fn dir(&self) -> DirR { - DirR::new(((self.bits >> 11) & 1) != 0) + pub fn dir(&self) -> DIR_R { + DIR_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:15 - List Allocation"] #[inline(always)] - pub fn list(&self) -> ListR { - ListR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn list(&self) -> LIST_R { + LIST_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:23 - Pointer to Previous Message Object"] #[inline(always)] - pub fn pprev(&self) -> PprevR { - PprevR::new(((self.bits >> 16) & 0xff) as u8) + pub fn pprev(&self) -> PPREV_R { + PPREV_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Pointer to Next Message Object"] #[inline(always)] - pub fn pnext(&self) -> PnextR { - PnextR::new(((self.bits >> 24) & 0xff) as u8) + pub fn pnext(&self) -> PNEXT_R { + PNEXT_R::new(((self.bits >> 24) & 0xff) as u8) } } #[doc = "Message Object Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mostat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MostatSpec; -impl crate::RegisterSpec for MostatSpec { +pub struct MOSTAT_SPEC; +impl crate::RegisterSpec for MOSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mostat::R`](R) reader structure"] -impl crate::Readable for MostatSpec {} +impl crate::Readable for MOSTAT_SPEC {} #[doc = "`reset()` method sets MOSTAT to value 0"] -impl crate::Resettable for MostatSpec { +impl crate::Resettable for MOSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0.rs b/src/can_node0.rs index 0fe27b4b..bddd8a0d 100644 --- a/src/can_node0.rs +++ b/src/can_node0.rs @@ -1,90 +1,83 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - ncr: Ncr, - nsr: Nsr, - nipr: Nipr, - npcr: Npcr, - nbtr: Nbtr, - necnt: Necnt, - nfcr: Nfcr, + ncr: NCR, + nsr: NSR, + nipr: NIPR, + npcr: NPCR, + nbtr: NBTR, + necnt: NECNT, + nfcr: NFCR, } impl RegisterBlock { #[doc = "0x00 - Node Control Register"] #[inline(always)] - pub const fn ncr(&self) -> &Ncr { + pub const fn ncr(&self) -> &NCR { &self.ncr } #[doc = "0x04 - Node Status Register"] #[inline(always)] - pub const fn nsr(&self) -> &Nsr { + pub const fn nsr(&self) -> &NSR { &self.nsr } #[doc = "0x08 - Node Interrupt Pointer Register"] #[inline(always)] - pub const fn nipr(&self) -> &Nipr { + pub const fn nipr(&self) -> &NIPR { &self.nipr } #[doc = "0x0c - Node Port Control Register"] #[inline(always)] - pub const fn npcr(&self) -> &Npcr { + pub const fn npcr(&self) -> &NPCR { &self.npcr } #[doc = "0x10 - Node Bit Timing Register"] #[inline(always)] - pub const fn nbtr(&self) -> &Nbtr { + pub const fn nbtr(&self) -> &NBTR { &self.nbtr } #[doc = "0x14 - Node Error Counter Register"] #[inline(always)] - pub const fn necnt(&self) -> &Necnt { + pub const fn necnt(&self) -> &NECNT { &self.necnt } #[doc = "0x18 - Node Frame Counter Register"] #[inline(always)] - pub const fn nfcr(&self) -> &Nfcr { + pub const fn nfcr(&self) -> &NFCR { &self.nfcr } } #[doc = "NCR (rw) register accessor: Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ncr`] module"] -#[doc(alias = "NCR")] -pub type Ncr = crate::Reg; +pub type NCR = crate::Reg; #[doc = "Node Control Register"] pub mod ncr; #[doc = "NSR (rw) register accessor: Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nsr`] module"] -#[doc(alias = "NSR")] -pub type Nsr = crate::Reg; +pub type NSR = crate::Reg; #[doc = "Node Status Register"] pub mod nsr; #[doc = "NIPR (rw) register accessor: Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nipr`] module"] -#[doc(alias = "NIPR")] -pub type Nipr = crate::Reg; +pub type NIPR = crate::Reg; #[doc = "Node Interrupt Pointer Register"] pub mod nipr; #[doc = "NPCR (rw) register accessor: Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@npcr`] module"] -#[doc(alias = "NPCR")] -pub type Npcr = crate::Reg; +pub type NPCR = crate::Reg; #[doc = "Node Port Control Register"] pub mod npcr; #[doc = "NBTR (rw) register accessor: Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nbtr`] module"] -#[doc(alias = "NBTR")] -pub type Nbtr = crate::Reg; +pub type NBTR = crate::Reg; #[doc = "Node Bit Timing Register"] pub mod nbtr; #[doc = "NECNT (rw) register accessor: Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@necnt`] module"] -#[doc(alias = "NECNT")] -pub type Necnt = crate::Reg; +pub type NECNT = crate::Reg; #[doc = "Node Error Counter Register"] pub mod necnt; #[doc = "NFCR (rw) register accessor: Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nfcr`] module"] -#[doc(alias = "NFCR")] -pub type Nfcr = crate::Reg; +pub type NFCR = crate::Reg; #[doc = "Node Frame Counter Register"] pub mod nfcr; diff --git a/src/can_node0/nbtr.rs b/src/can_node0/nbtr.rs index 9479c366..944af895 100644 --- a/src/can_node0/nbtr.rs +++ b/src/can_node0/nbtr.rs @@ -1,149 +1,149 @@ #[doc = "Register `NBTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NBTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BRP` reader - Baud Rate Prescaler"] -pub type BrpR = crate::FieldReader; +pub type BRP_R = crate::FieldReader; #[doc = "Field `BRP` writer - Baud Rate Prescaler"] -pub type BrpW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type BRP_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `SJW` reader - (Re) Synchronization Jump Width"] -pub type SjwR = crate::FieldReader; +pub type SJW_R = crate::FieldReader; #[doc = "Field `SJW` writer - (Re) Synchronization Jump Width"] -pub type SjwW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SJW_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `TSEG1` reader - Time Segment Before Sample Point"] -pub type Tseg1R = crate::FieldReader; +pub type TSEG1_R = crate::FieldReader; #[doc = "Field `TSEG1` writer - Time Segment Before Sample Point"] -pub type Tseg1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TSEG1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TSEG2` reader - Time Segment After Sample Point"] -pub type Tseg2R = crate::FieldReader; +pub type TSEG2_R = crate::FieldReader; #[doc = "Field `TSEG2` writer - Time Segment After Sample Point"] -pub type Tseg2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TSEG2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Divide Prescaler Clock by 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Div8 { +pub enum DIV8_A { #[doc = "0: A time quantum lasts (BRP+1) clock cycles."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A time quantum lasts 8 (BRP+1) clock cycles."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Div8) -> Self { + fn from(variant: DIV8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIV8` reader - Divide Prescaler Clock by 8"] -pub type Div8R = crate::BitReader; -impl Div8R { +pub type DIV8_R = crate::BitReader; +impl DIV8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Div8 { + pub const fn variant(&self) -> DIV8_A { match self.bits { - false => Div8::Value1, - true => Div8::Value2, + false => DIV8_A::VALUE1, + true => DIV8_A::VALUE2, } } #[doc = "A time quantum lasts (BRP+1) clock cycles."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Div8::Value1 + *self == DIV8_A::VALUE1 } #[doc = "A time quantum lasts 8 (BRP+1) clock cycles."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Div8::Value2 + *self == DIV8_A::VALUE2 } } #[doc = "Field `DIV8` writer - Divide Prescaler Clock by 8"] -pub type Div8W<'a, REG> = crate::BitWriter<'a, REG, Div8>; -impl<'a, REG> Div8W<'a, REG> +pub type DIV8_W<'a, REG> = crate::BitWriter<'a, REG, DIV8_A>; +impl<'a, REG> DIV8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A time quantum lasts (BRP+1) clock cycles."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Div8::Value1) + self.variant(DIV8_A::VALUE1) } #[doc = "A time quantum lasts 8 (BRP+1) clock cycles."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Div8::Value2) + self.variant(DIV8_A::VALUE2) } } impl R { #[doc = "Bits 0:5 - Baud Rate Prescaler"] #[inline(always)] - pub fn brp(&self) -> BrpR { - BrpR::new((self.bits & 0x3f) as u8) + pub fn brp(&self) -> BRP_R { + BRP_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"] #[inline(always)] - pub fn sjw(&self) -> SjwR { - SjwR::new(((self.bits >> 6) & 3) as u8) + pub fn sjw(&self) -> SJW_R { + SJW_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:11 - Time Segment Before Sample Point"] #[inline(always)] - pub fn tseg1(&self) -> Tseg1R { - Tseg1R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn tseg1(&self) -> TSEG1_R { + TSEG1_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:14 - Time Segment After Sample Point"] #[inline(always)] - pub fn tseg2(&self) -> Tseg2R { - Tseg2R::new(((self.bits >> 12) & 7) as u8) + pub fn tseg2(&self) -> TSEG2_R { + TSEG2_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 15 - Divide Prescaler Clock by 8"] #[inline(always)] - pub fn div8(&self) -> Div8R { - Div8R::new(((self.bits >> 15) & 1) != 0) + pub fn div8(&self) -> DIV8_R { + DIV8_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Baud Rate Prescaler"] #[inline(always)] #[must_use] - pub fn brp(&mut self) -> BrpW { - BrpW::new(self, 0) + pub fn brp(&mut self) -> BRP_W { + BRP_W::new(self, 0) } #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"] #[inline(always)] #[must_use] - pub fn sjw(&mut self) -> SjwW { - SjwW::new(self, 6) + pub fn sjw(&mut self) -> SJW_W { + SJW_W::new(self, 6) } #[doc = "Bits 8:11 - Time Segment Before Sample Point"] #[inline(always)] #[must_use] - pub fn tseg1(&mut self) -> Tseg1W { - Tseg1W::new(self, 8) + pub fn tseg1(&mut self) -> TSEG1_W { + TSEG1_W::new(self, 8) } #[doc = "Bits 12:14 - Time Segment After Sample Point"] #[inline(always)] #[must_use] - pub fn tseg2(&mut self) -> Tseg2W { - Tseg2W::new(self, 12) + pub fn tseg2(&mut self) -> TSEG2_W { + TSEG2_W::new(self, 12) } #[doc = "Bit 15 - Divide Prescaler Clock by 8"] #[inline(always)] #[must_use] - pub fn div8(&mut self) -> Div8W { - Div8W::new(self, 15) + pub fn div8(&mut self) -> DIV8_W { + DIV8_W::new(self, 15) } } #[doc = "Node Bit Timing Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nbtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nbtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NbtrSpec; -impl crate::RegisterSpec for NbtrSpec { +pub struct NBTR_SPEC; +impl crate::RegisterSpec for NBTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nbtr::R`](R) reader structure"] -impl crate::Readable for NbtrSpec {} +impl crate::Readable for NBTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`nbtr::W`](W) writer structure"] -impl crate::Writable for NbtrSpec { +impl crate::Writable for NBTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NBTR to value 0"] -impl crate::Resettable for NbtrSpec { +impl crate::Resettable for NBTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/ncr.rs b/src/can_node0/ncr.rs index 0cae3806..710637b8 100644 --- a/src/can_node0/ncr.rs +++ b/src/can_node0/ncr.rs @@ -1,439 +1,439 @@ #[doc = "Register `NCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Node Initialization\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Init { +pub enum INIT_A { #[doc = "0: Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Init) -> Self { + fn from(variant: INIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INIT` reader - Node Initialization"] -pub type InitR = crate::BitReader; -impl InitR { +pub type INIT_R = crate::BitReader; +impl INIT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Init { + pub const fn variant(&self) -> INIT_A { match self.bits { - false => Init::Value1, - true => Init::Value2, + false => INIT_A::VALUE1, + true => INIT_A::VALUE2, } } #[doc = "Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Init::Value1 + *self == INIT_A::VALUE1 } #[doc = "Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Init::Value2 + *self == INIT_A::VALUE2 } } #[doc = "Field `INIT` writer - Node Initialization"] -pub type InitW<'a, REG> = crate::BitWriter<'a, REG, Init>; -impl<'a, REG> InitW<'a, REG> +pub type INIT_W<'a, REG> = crate::BitWriter<'a, REG, INIT_A>; +impl<'a, REG> INIT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Resetting bit INIT enables the participation of the node in the CAN traffic. If the CAN node is in the bus-off state, the ongoing bus-off recovery (which does not depend on the INIT bit) is continued. With the end of the bus-off recovery sequence the CAN node is allowed to take part in the CAN traffic. If the CAN node is not in the bus-off state, a sequence of 11 consecutive recessive bits must be detected before the node is allowed to take part in the CAN traffic."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Init::Value1) + self.variant(INIT_A::VALUE1) } #[doc = "Setting this bit terminates the participation of this node in the CAN traffic. Any ongoing frame transfer is cancelled and the transmit line goes recessive. If the CAN node is in the bus-off state, then the running bus-off recovery sequence is continued. If the INIT bit is still set after the successful completion of the bus-off recovery sequence, i.e. after detecting 128 sequences of 11 consecutive recessive bits (11 1), then the CAN node leaves the bus-off state but remains inactive as long as INIT remains set."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Init::Value2) + self.variant(INIT_A::VALUE2) } } #[doc = "Transfer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trie { +pub enum TRIE_A { #[doc = "0: Transfer interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transfer interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trie) -> Self { + fn from(variant: TRIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRIE` reader - Transfer Interrupt Enable"] -pub type TrieR = crate::BitReader; -impl TrieR { +pub type TRIE_R = crate::BitReader; +impl TRIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trie { + pub const fn variant(&self) -> TRIE_A { match self.bits { - false => Trie::Value1, - true => Trie::Value2, + false => TRIE_A::VALUE1, + true => TRIE_A::VALUE2, } } #[doc = "Transfer interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trie::Value1 + *self == TRIE_A::VALUE1 } #[doc = "Transfer interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trie::Value2 + *self == TRIE_A::VALUE2 } } #[doc = "Field `TRIE` writer - Transfer Interrupt Enable"] -pub type TrieW<'a, REG> = crate::BitWriter<'a, REG, Trie>; -impl<'a, REG> TrieW<'a, REG> +pub type TRIE_W<'a, REG> = crate::BitWriter<'a, REG, TRIE_A>; +impl<'a, REG> TRIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Transfer interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trie::Value1) + self.variant(TRIE_A::VALUE1) } #[doc = "Transfer interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trie::Value2) + self.variant(TRIE_A::VALUE2) } } #[doc = "LEC Indicated Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lecie { +pub enum LECIE_A { #[doc = "0: Last error code interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last error code interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lecie) -> Self { + fn from(variant: LECIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LECIE` reader - LEC Indicated Error Interrupt Enable"] -pub type LecieR = crate::BitReader; -impl LecieR { +pub type LECIE_R = crate::BitReader; +impl LECIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lecie { + pub const fn variant(&self) -> LECIE_A { match self.bits { - false => Lecie::Value1, - true => Lecie::Value2, + false => LECIE_A::VALUE1, + true => LECIE_A::VALUE2, } } #[doc = "Last error code interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lecie::Value1 + *self == LECIE_A::VALUE1 } #[doc = "Last error code interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lecie::Value2 + *self == LECIE_A::VALUE2 } } #[doc = "Field `LECIE` writer - LEC Indicated Error Interrupt Enable"] -pub type LecieW<'a, REG> = crate::BitWriter<'a, REG, Lecie>; -impl<'a, REG> LecieW<'a, REG> +pub type LECIE_W<'a, REG> = crate::BitWriter<'a, REG, LECIE_A>; +impl<'a, REG> LECIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Last error code interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lecie::Value1) + self.variant(LECIE_A::VALUE1) } #[doc = "Last error code interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lecie::Value2) + self.variant(LECIE_A::VALUE2) } } #[doc = "Alert Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Alie { +pub enum ALIE_A { #[doc = "0: Alert interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Alert interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Alie) -> Self { + fn from(variant: ALIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ALIE` reader - Alert Interrupt Enable"] -pub type AlieR = crate::BitReader; -impl AlieR { +pub type ALIE_R = crate::BitReader; +impl ALIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Alie { + pub const fn variant(&self) -> ALIE_A { match self.bits { - false => Alie::Value1, - true => Alie::Value2, + false => ALIE_A::VALUE1, + true => ALIE_A::VALUE2, } } #[doc = "Alert interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Alie::Value1 + *self == ALIE_A::VALUE1 } #[doc = "Alert interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Alie::Value2 + *self == ALIE_A::VALUE2 } } #[doc = "Field `ALIE` writer - Alert Interrupt Enable"] -pub type AlieW<'a, REG> = crate::BitWriter<'a, REG, Alie>; -impl<'a, REG> AlieW<'a, REG> +pub type ALIE_W<'a, REG> = crate::BitWriter<'a, REG, ALIE_A>; +impl<'a, REG> ALIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Alert interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Alie::Value1) + self.variant(ALIE_A::VALUE1) } #[doc = "Alert interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Alie::Value2) + self.variant(ALIE_A::VALUE2) } } #[doc = "Field `CANDIS` reader - CAN Disable"] -pub type CandisR = crate::BitReader; +pub type CANDIS_R = crate::BitReader; #[doc = "Field `CANDIS` writer - CAN Disable"] -pub type CandisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CANDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Configuration Change Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cce { +pub enum CCE_A { #[doc = "0: The Bit Timing Register, the Port Control Register, and the Error Counter Register may only be read. All attempts to modify them are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The Bit Timing Register, the Port Control Register, and the Error Counter Register may be read and written."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cce) -> Self { + fn from(variant: CCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCE` reader - Configuration Change Enable"] -pub type CceR = crate::BitReader; -impl CceR { +pub type CCE_R = crate::BitReader; +impl CCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cce { + pub const fn variant(&self) -> CCE_A { match self.bits { - false => Cce::Value1, - true => Cce::Value2, + false => CCE_A::VALUE1, + true => CCE_A::VALUE2, } } #[doc = "The Bit Timing Register, the Port Control Register, and the Error Counter Register may only be read. All attempts to modify them are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cce::Value1 + *self == CCE_A::VALUE1 } #[doc = "The Bit Timing Register, the Port Control Register, and the Error Counter Register may be read and written."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cce::Value2 + *self == CCE_A::VALUE2 } } #[doc = "Field `CCE` writer - Configuration Change Enable"] -pub type CceW<'a, REG> = crate::BitWriter<'a, REG, Cce>; -impl<'a, REG> CceW<'a, REG> +pub type CCE_W<'a, REG> = crate::BitWriter<'a, REG, CCE_A>; +impl<'a, REG> CCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The Bit Timing Register, the Port Control Register, and the Error Counter Register may only be read. All attempts to modify them are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cce::Value1) + self.variant(CCE_A::VALUE1) } #[doc = "The Bit Timing Register, the Port Control Register, and the Error Counter Register may be read and written."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cce::Value2) + self.variant(CCE_A::VALUE2) } } #[doc = "Field `CALM` reader - CAN Analyzer Mode"] -pub type CalmR = crate::BitReader; +pub type CALM_R = crate::BitReader; #[doc = "Field `CALM` writer - CAN Analyzer Mode"] -pub type CalmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CALM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Suspend Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Susen { +pub enum SUSEN_A { #[doc = "0: An OCDS suspend trigger is ignored by the CAN node."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An OCDS suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Susen) -> Self { + fn from(variant: SUSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SUSEN` reader - Suspend Enable"] -pub type SusenR = crate::BitReader; -impl SusenR { +pub type SUSEN_R = crate::BitReader; +impl SUSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Susen { + pub const fn variant(&self) -> SUSEN_A { match self.bits { - false => Susen::Value1, - true => Susen::Value2, + false => SUSEN_A::VALUE1, + true => SUSEN_A::VALUE2, } } #[doc = "An OCDS suspend trigger is ignored by the CAN node."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Susen::Value1 + *self == SUSEN_A::VALUE1 } #[doc = "An OCDS suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Susen::Value2 + *self == SUSEN_A::VALUE2 } } #[doc = "Field `SUSEN` writer - Suspend Enable"] -pub type SusenW<'a, REG> = crate::BitWriter<'a, REG, Susen>; -impl<'a, REG> SusenW<'a, REG> +pub type SUSEN_W<'a, REG> = crate::BitWriter<'a, REG, SUSEN_A>; +impl<'a, REG> SUSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An OCDS suspend trigger is ignored by the CAN node."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Susen::Value1) + self.variant(SUSEN_A::VALUE1) } #[doc = "An OCDS suspend trigger disables the CAN node: As soon as the CAN node becomes bus-idle or bus-off, bit INIT is internally forced to 1 to disable the CAN node. The actual value of bit INIT remains unchanged."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Susen::Value2) + self.variant(SUSEN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Node Initialization"] #[inline(always)] - pub fn init(&self) -> InitR { - InitR::new((self.bits & 1) != 0) + pub fn init(&self) -> INIT_R { + INIT_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Transfer Interrupt Enable"] #[inline(always)] - pub fn trie(&self) -> TrieR { - TrieR::new(((self.bits >> 1) & 1) != 0) + pub fn trie(&self) -> TRIE_R { + TRIE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"] #[inline(always)] - pub fn lecie(&self) -> LecieR { - LecieR::new(((self.bits >> 2) & 1) != 0) + pub fn lecie(&self) -> LECIE_R { + LECIE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Alert Interrupt Enable"] #[inline(always)] - pub fn alie(&self) -> AlieR { - AlieR::new(((self.bits >> 3) & 1) != 0) + pub fn alie(&self) -> ALIE_R { + ALIE_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CAN Disable"] #[inline(always)] - pub fn candis(&self) -> CandisR { - CandisR::new(((self.bits >> 4) & 1) != 0) + pub fn candis(&self) -> CANDIS_R { + CANDIS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Configuration Change Enable"] #[inline(always)] - pub fn cce(&self) -> CceR { - CceR::new(((self.bits >> 6) & 1) != 0) + pub fn cce(&self) -> CCE_R { + CCE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - CAN Analyzer Mode"] #[inline(always)] - pub fn calm(&self) -> CalmR { - CalmR::new(((self.bits >> 7) & 1) != 0) + pub fn calm(&self) -> CALM_R { + CALM_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Suspend Enable"] #[inline(always)] - pub fn susen(&self) -> SusenR { - SusenR::new(((self.bits >> 8) & 1) != 0) + pub fn susen(&self) -> SUSEN_R { + SUSEN_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Node Initialization"] #[inline(always)] #[must_use] - pub fn init(&mut self) -> InitW { - InitW::new(self, 0) + pub fn init(&mut self) -> INIT_W { + INIT_W::new(self, 0) } #[doc = "Bit 1 - Transfer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn trie(&mut self) -> TrieW { - TrieW::new(self, 1) + pub fn trie(&mut self) -> TRIE_W { + TRIE_W::new(self, 1) } #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn lecie(&mut self) -> LecieW { - LecieW::new(self, 2) + pub fn lecie(&mut self) -> LECIE_W { + LECIE_W::new(self, 2) } #[doc = "Bit 3 - Alert Interrupt Enable"] #[inline(always)] #[must_use] - pub fn alie(&mut self) -> AlieW { - AlieW::new(self, 3) + pub fn alie(&mut self) -> ALIE_W { + ALIE_W::new(self, 3) } #[doc = "Bit 4 - CAN Disable"] #[inline(always)] #[must_use] - pub fn candis(&mut self) -> CandisW { - CandisW::new(self, 4) + pub fn candis(&mut self) -> CANDIS_W { + CANDIS_W::new(self, 4) } #[doc = "Bit 6 - Configuration Change Enable"] #[inline(always)] #[must_use] - pub fn cce(&mut self) -> CceW { - CceW::new(self, 6) + pub fn cce(&mut self) -> CCE_W { + CCE_W::new(self, 6) } #[doc = "Bit 7 - CAN Analyzer Mode"] #[inline(always)] #[must_use] - pub fn calm(&mut self) -> CalmW { - CalmW::new(self, 7) + pub fn calm(&mut self) -> CALM_W { + CALM_W::new(self, 7) } #[doc = "Bit 8 - Suspend Enable"] #[inline(always)] #[must_use] - pub fn susen(&mut self) -> SusenW { - SusenW::new(self, 8) + pub fn susen(&mut self) -> SUSEN_W { + SUSEN_W::new(self, 8) } } #[doc = "Node Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ncr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ncr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NcrSpec; -impl crate::RegisterSpec for NcrSpec { +pub struct NCR_SPEC; +impl crate::RegisterSpec for NCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ncr::R`](R) reader structure"] -impl crate::Readable for NcrSpec {} +impl crate::Readable for NCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ncr::W`](W) writer structure"] -impl crate::Writable for NcrSpec { +impl crate::Writable for NCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NCR to value 0x01"] -impl crate::Resettable for NcrSpec { +impl crate::Resettable for NCR_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/can_node0/necnt.rs b/src/can_node0/necnt.rs index 5b8e1a1e..aa37ae83 100644 --- a/src/can_node0/necnt.rs +++ b/src/can_node0/necnt.rs @@ -1,152 +1,152 @@ #[doc = "Register `NECNT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NECNT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REC` reader - Receive Error Counter"] -pub type RecR = crate::FieldReader; +pub type REC_R = crate::FieldReader; #[doc = "Field `REC` writer - Receive Error Counter"] -pub type RecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type REC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TEC` reader - Transmit Error Counter"] -pub type TecR = crate::FieldReader; +pub type TEC_R = crate::FieldReader; #[doc = "Field `TEC` writer - Transmit Error Counter"] -pub type TecW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type TEC_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `EWRNLVL` reader - Error Warning Level"] -pub type EwrnlvlR = crate::FieldReader; +pub type EWRNLVL_R = crate::FieldReader; #[doc = "Field `EWRNLVL` writer - Error Warning Level"] -pub type EwrnlvlW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type EWRNLVL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Last Error Transfer Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Letd { +pub enum LETD_A { #[doc = "0: The last error occurred while the CAN node x was receiver (REC has been incremented)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The last error occurred while the CAN node x was transmitter (TEC has been incremented)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Letd) -> Self { + fn from(variant: LETD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LETD` reader - Last Error Transfer Direction"] -pub type LetdR = crate::BitReader; -impl LetdR { +pub type LETD_R = crate::BitReader; +impl LETD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Letd { + pub const fn variant(&self) -> LETD_A { match self.bits { - false => Letd::Value1, - true => Letd::Value2, + false => LETD_A::VALUE1, + true => LETD_A::VALUE2, } } #[doc = "The last error occurred while the CAN node x was receiver (REC has been incremented)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Letd::Value1 + *self == LETD_A::VALUE1 } #[doc = "The last error occurred while the CAN node x was transmitter (TEC has been incremented)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Letd::Value2 + *self == LETD_A::VALUE2 } } #[doc = "Last Error Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Leinc { +pub enum LEINC_A { #[doc = "0: The last error led to an error counter increment of 1."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The last error led to an error counter increment of 8."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Leinc) -> Self { + fn from(variant: LEINC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEINC` reader - Last Error Increment"] -pub type LeincR = crate::BitReader; -impl LeincR { +pub type LEINC_R = crate::BitReader; +impl LEINC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Leinc { + pub const fn variant(&self) -> LEINC_A { match self.bits { - false => Leinc::Value1, - true => Leinc::Value2, + false => LEINC_A::VALUE1, + true => LEINC_A::VALUE2, } } #[doc = "The last error led to an error counter increment of 1."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Leinc::Value1 + *self == LEINC_A::VALUE1 } #[doc = "The last error led to an error counter increment of 8."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Leinc::Value2 + *self == LEINC_A::VALUE2 } } impl R { #[doc = "Bits 0:7 - Receive Error Counter"] #[inline(always)] - pub fn rec(&self) -> RecR { - RecR::new((self.bits & 0xff) as u8) + pub fn rec(&self) -> REC_R { + REC_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Transmit Error Counter"] #[inline(always)] - pub fn tec(&self) -> TecR { - TecR::new(((self.bits >> 8) & 0xff) as u8) + pub fn tec(&self) -> TEC_R { + TEC_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Error Warning Level"] #[inline(always)] - pub fn ewrnlvl(&self) -> EwrnlvlR { - EwrnlvlR::new(((self.bits >> 16) & 0xff) as u8) + pub fn ewrnlvl(&self) -> EWRNLVL_R { + EWRNLVL_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - Last Error Transfer Direction"] #[inline(always)] - pub fn letd(&self) -> LetdR { - LetdR::new(((self.bits >> 24) & 1) != 0) + pub fn letd(&self) -> LETD_R { + LETD_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Last Error Increment"] #[inline(always)] - pub fn leinc(&self) -> LeincR { - LeincR::new(((self.bits >> 25) & 1) != 0) + pub fn leinc(&self) -> LEINC_R { + LEINC_R::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Receive Error Counter"] #[inline(always)] #[must_use] - pub fn rec(&mut self) -> RecW { - RecW::new(self, 0) + pub fn rec(&mut self) -> REC_W { + REC_W::new(self, 0) } #[doc = "Bits 8:15 - Transmit Error Counter"] #[inline(always)] #[must_use] - pub fn tec(&mut self) -> TecW { - TecW::new(self, 8) + pub fn tec(&mut self) -> TEC_W { + TEC_W::new(self, 8) } #[doc = "Bits 16:23 - Error Warning Level"] #[inline(always)] #[must_use] - pub fn ewrnlvl(&mut self) -> EwrnlvlW { - EwrnlvlW::new(self, 16) + pub fn ewrnlvl(&mut self) -> EWRNLVL_W { + EWRNLVL_W::new(self, 16) } } #[doc = "Node Error Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`necnt::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`necnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NecntSpec; -impl crate::RegisterSpec for NecntSpec { +pub struct NECNT_SPEC; +impl crate::RegisterSpec for NECNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`necnt::R`](R) reader structure"] -impl crate::Readable for NecntSpec {} +impl crate::Readable for NECNT_SPEC {} #[doc = "`write(|w| ..)` method takes [`necnt::W`](W) writer structure"] -impl crate::Writable for NecntSpec { +impl crate::Writable for NECNT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NECNT to value 0x0060_0000"] -impl crate::Resettable for NecntSpec { +impl crate::Resettable for NECNT_SPEC { const RESET_VALUE: u32 = 0x0060_0000; } diff --git a/src/can_node0/nfcr.rs b/src/can_node0/nfcr.rs index 9773e546..4a21025c 100644 --- a/src/can_node0/nfcr.rs +++ b/src/can_node0/nfcr.rs @@ -1,48 +1,48 @@ #[doc = "Register `NFCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NFCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CFC` reader - CAN Frame Counter"] -pub type CfcR = crate::FieldReader; +pub type CFC_R = crate::FieldReader; #[doc = "Field `CFC` writer - CAN Frame Counter"] -pub type CfcW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CFC_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "CAN Frame Count Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cfsel { +pub enum CFSEL_A { #[doc = "0: The frame counter is incremented (internally) at the beginning of a new bit time. The value is sampled during the SOF bit of a new frame. The sampled value is visible in the CFC field."] - Value1 = 0, + VALUE1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cfsel) -> Self { + fn from(variant: CFSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cfsel { +impl crate::FieldSpec for CFSEL_A { type Ux = u8; } -impl crate::IsEnum for Cfsel {} +impl crate::IsEnum for CFSEL_A {} #[doc = "Field `CFSEL` reader - CAN Frame Count Selection"] -pub type CfselR = crate::FieldReader; -impl CfselR { +pub type CFSEL_R = crate::FieldReader; +impl CFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cfsel::Value1), + 0 => Some(CFSEL_A::VALUE1), _ => None, } } #[doc = "The frame counter is incremented (internally) at the beginning of a new bit time. The value is sampled during the SOF bit of a new frame. The sampled value is visible in the CFC field."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfsel::Value1 + *self == CFSEL_A::VALUE1 } } #[doc = "Field `CFSEL` writer - CAN Frame Count Selection"] -pub type CfselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cfsel>; -impl<'a, REG> CfselW<'a, REG> +pub type CFSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CFSEL_A>; +impl<'a, REG> CFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -50,62 +50,62 @@ where #[doc = "The frame counter is incremented (internally) at the beginning of a new bit time. The value is sampled during the SOF bit of a new frame. The sampled value is visible in the CFC field."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cfsel::Value1) + self.variant(CFSEL_A::VALUE1) } } #[doc = "CAN Frame Counter Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cfmod { +pub enum CFMOD_A { #[doc = "0: Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Time Stamp Mode: The frame counter is used to count bit times."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bit Timing Mode: The frame counter is used for analysis of the bit timing."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cfmod) -> Self { + fn from(variant: CFMOD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cfmod { +impl crate::FieldSpec for CFMOD_A { type Ux = u8; } -impl crate::IsEnum for Cfmod {} +impl crate::IsEnum for CFMOD_A {} #[doc = "Field `CFMOD` reader - CAN Frame Counter Mode"] -pub type CfmodR = crate::FieldReader; -impl CfmodR { +pub type CFMOD_R = crate::FieldReader; +impl CFMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cfmod::Value1), - 1 => Some(Cfmod::Value2), - 2 => Some(Cfmod::Value3), + 0 => Some(CFMOD_A::VALUE1), + 1 => Some(CFMOD_A::VALUE2), + 2 => Some(CFMOD_A::VALUE3), _ => None, } } #[doc = "Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfmod::Value1 + *self == CFMOD_A::VALUE1 } #[doc = "Time Stamp Mode: The frame counter is used to count bit times."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cfmod::Value2 + *self == CFMOD_A::VALUE2 } #[doc = "Bit Timing Mode: The frame counter is used for analysis of the bit timing."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cfmod::Value3 + *self == CFMOD_A::VALUE3 } } #[doc = "Field `CFMOD` writer - CAN Frame Counter Mode"] -pub type CfmodW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cfmod>; -impl<'a, REG> CfmodW<'a, REG> +pub type CFMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CFMOD_A>; +impl<'a, REG> CFMOD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -113,198 +113,198 @@ where #[doc = "Frame Count Mode: The frame counter is incremented upon the reception and transmission of frames."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cfmod::Value1) + self.variant(CFMOD_A::VALUE1) } #[doc = "Time Stamp Mode: The frame counter is used to count bit times."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cfmod::Value2) + self.variant(CFMOD_A::VALUE2) } #[doc = "Bit Timing Mode: The frame counter is used for analysis of the bit timing."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cfmod::Value3) + self.variant(CFMOD_A::VALUE3) } } #[doc = "CAN Frame Count Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cfcie { +pub enum CFCIE_A { #[doc = "0: CAN frame counter overflow interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CAN frame counter overflow interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cfcie) -> Self { + fn from(variant: CFCIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CFCIE` reader - CAN Frame Count Interrupt Enable"] -pub type CfcieR = crate::BitReader; -impl CfcieR { +pub type CFCIE_R = crate::BitReader; +impl CFCIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cfcie { + pub const fn variant(&self) -> CFCIE_A { match self.bits { - false => Cfcie::Value1, - true => Cfcie::Value2, + false => CFCIE_A::VALUE1, + true => CFCIE_A::VALUE2, } } #[doc = "CAN frame counter overflow interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfcie::Value1 + *self == CFCIE_A::VALUE1 } #[doc = "CAN frame counter overflow interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cfcie::Value2 + *self == CFCIE_A::VALUE2 } } #[doc = "Field `CFCIE` writer - CAN Frame Count Interrupt Enable"] -pub type CfcieW<'a, REG> = crate::BitWriter<'a, REG, Cfcie>; -impl<'a, REG> CfcieW<'a, REG> +pub type CFCIE_W<'a, REG> = crate::BitWriter<'a, REG, CFCIE_A>; +impl<'a, REG> CFCIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CAN frame counter overflow interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cfcie::Value1) + self.variant(CFCIE_A::VALUE1) } #[doc = "CAN frame counter overflow interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cfcie::Value2) + self.variant(CFCIE_A::VALUE2) } } #[doc = "CAN Frame Counter Overflow Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cfcov { +pub enum CFCOV_A { #[doc = "0: No overflow has occurred since last flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An overflow has occurred since last flag reset."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cfcov) -> Self { + fn from(variant: CFCOV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CFCOV` reader - CAN Frame Counter Overflow Flag"] -pub type CfcovR = crate::BitReader; -impl CfcovR { +pub type CFCOV_R = crate::BitReader; +impl CFCOV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cfcov { + pub const fn variant(&self) -> CFCOV_A { match self.bits { - false => Cfcov::Value1, - true => Cfcov::Value2, + false => CFCOV_A::VALUE1, + true => CFCOV_A::VALUE2, } } #[doc = "No overflow has occurred since last flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfcov::Value1 + *self == CFCOV_A::VALUE1 } #[doc = "An overflow has occurred since last flag reset."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cfcov::Value2 + *self == CFCOV_A::VALUE2 } } #[doc = "Field `CFCOV` writer - CAN Frame Counter Overflow Flag"] -pub type CfcovW<'a, REG> = crate::BitWriter<'a, REG, Cfcov>; -impl<'a, REG> CfcovW<'a, REG> +pub type CFCOV_W<'a, REG> = crate::BitWriter<'a, REG, CFCOV_A>; +impl<'a, REG> CFCOV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No overflow has occurred since last flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cfcov::Value1) + self.variant(CFCOV_A::VALUE1) } #[doc = "An overflow has occurred since last flag reset."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cfcov::Value2) + self.variant(CFCOV_A::VALUE2) } } impl R { #[doc = "Bits 0:15 - CAN Frame Counter"] #[inline(always)] - pub fn cfc(&self) -> CfcR { - CfcR::new((self.bits & 0xffff) as u16) + pub fn cfc(&self) -> CFC_R { + CFC_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:18 - CAN Frame Count Selection"] #[inline(always)] - pub fn cfsel(&self) -> CfselR { - CfselR::new(((self.bits >> 16) & 7) as u8) + pub fn cfsel(&self) -> CFSEL_R { + CFSEL_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:20 - CAN Frame Counter Mode"] #[inline(always)] - pub fn cfmod(&self) -> CfmodR { - CfmodR::new(((self.bits >> 19) & 3) as u8) + pub fn cfmod(&self) -> CFMOD_R { + CFMOD_R::new(((self.bits >> 19) & 3) as u8) } #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"] #[inline(always)] - pub fn cfcie(&self) -> CfcieR { - CfcieR::new(((self.bits >> 22) & 1) != 0) + pub fn cfcie(&self) -> CFCIE_R { + CFCIE_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"] #[inline(always)] - pub fn cfcov(&self) -> CfcovR { - CfcovR::new(((self.bits >> 23) & 1) != 0) + pub fn cfcov(&self) -> CFCOV_R { + CFCOV_R::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - CAN Frame Counter"] #[inline(always)] #[must_use] - pub fn cfc(&mut self) -> CfcW { - CfcW::new(self, 0) + pub fn cfc(&mut self) -> CFC_W { + CFC_W::new(self, 0) } #[doc = "Bits 16:18 - CAN Frame Count Selection"] #[inline(always)] #[must_use] - pub fn cfsel(&mut self) -> CfselW { - CfselW::new(self, 16) + pub fn cfsel(&mut self) -> CFSEL_W { + CFSEL_W::new(self, 16) } #[doc = "Bits 19:20 - CAN Frame Counter Mode"] #[inline(always)] #[must_use] - pub fn cfmod(&mut self) -> CfmodW { - CfmodW::new(self, 19) + pub fn cfmod(&mut self) -> CFMOD_W { + CFMOD_W::new(self, 19) } #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"] #[inline(always)] #[must_use] - pub fn cfcie(&mut self) -> CfcieW { - CfcieW::new(self, 22) + pub fn cfcie(&mut self) -> CFCIE_W { + CFCIE_W::new(self, 22) } #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"] #[inline(always)] #[must_use] - pub fn cfcov(&mut self) -> CfcovW { - CfcovW::new(self, 23) + pub fn cfcov(&mut self) -> CFCOV_W { + CFCOV_W::new(self, 23) } } #[doc = "Node Frame Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nfcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nfcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NfcrSpec; -impl crate::RegisterSpec for NfcrSpec { +pub struct NFCR_SPEC; +impl crate::RegisterSpec for NFCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nfcr::R`](R) reader structure"] -impl crate::Readable for NfcrSpec {} +impl crate::Readable for NFCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`nfcr::W`](W) writer structure"] -impl crate::Writable for NfcrSpec { +impl crate::Writable for NFCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NFCR to value 0"] -impl crate::Resettable for NfcrSpec { +impl crate::Resettable for NFCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/nipr.rs b/src/can_node0/nipr.rs index c5e7782e..390b1c70 100644 --- a/src/can_node0/nipr.rs +++ b/src/can_node0/nipr.rs @@ -1,60 +1,60 @@ #[doc = "Register `NIPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NIPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Alert Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Alinp { +pub enum ALINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Alinp) -> Self { + fn from(variant: ALINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Alinp { +impl crate::FieldSpec for ALINP_A { type Ux = u8; } -impl crate::IsEnum for Alinp {} +impl crate::IsEnum for ALINP_A {} #[doc = "Field `ALINP` reader - Alert Interrupt Node Pointer"] -pub type AlinpR = crate::FieldReader; -impl AlinpR { +pub type ALINP_R = crate::FieldReader; +impl ALINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Alinp::Value1), - 1 => Some(Alinp::Value2), - 7 => Some(Alinp::Value3), + 0 => Some(ALINP_A::VALUE1), + 1 => Some(ALINP_A::VALUE2), + 7 => Some(ALINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Alinp::Value1 + *self == ALINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Alinp::Value2 + *self == ALINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Alinp::Value3 + *self == ALINP_A::VALUE3 } } #[doc = "Field `ALINP` writer - Alert Interrupt Node Pointer"] -pub type AlinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Alinp>; -impl<'a, REG> AlinpW<'a, REG> +pub type ALINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ALINP_A>; +impl<'a, REG> ALINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Alinp::Value1) + self.variant(ALINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Alinp::Value2) + self.variant(ALINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Alinp::Value3) + self.variant(ALINP_A::VALUE3) } } #[doc = "Last Error Code Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lecinp { +pub enum LECINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lecinp) -> Self { + fn from(variant: LECINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lecinp { +impl crate::FieldSpec for LECINP_A { type Ux = u8; } -impl crate::IsEnum for Lecinp {} +impl crate::IsEnum for LECINP_A {} #[doc = "Field `LECINP` reader - Last Error Code Interrupt Node Pointer"] -pub type LecinpR = crate::FieldReader; -impl LecinpR { +pub type LECINP_R = crate::FieldReader; +impl LECINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Lecinp::Value1), - 1 => Some(Lecinp::Value2), - 7 => Some(Lecinp::Value3), + 0 => Some(LECINP_A::VALUE1), + 1 => Some(LECINP_A::VALUE2), + 7 => Some(LECINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lecinp::Value1 + *self == LECINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lecinp::Value2 + *self == LECINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lecinp::Value3 + *self == LECINP_A::VALUE3 } } #[doc = "Field `LECINP` writer - Last Error Code Interrupt Node Pointer"] -pub type LecinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Lecinp>; -impl<'a, REG> LecinpW<'a, REG> +pub type LECINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, LECINP_A>; +impl<'a, REG> LECINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lecinp::Value1) + self.variant(LECINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lecinp::Value2) + self.variant(LECINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lecinp::Value3) + self.variant(LECINP_A::VALUE3) } } #[doc = "Transfer OK Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trinp { +pub enum TRINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trinp) -> Self { + fn from(variant: TRINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trinp { +impl crate::FieldSpec for TRINP_A { type Ux = u8; } -impl crate::IsEnum for Trinp {} +impl crate::IsEnum for TRINP_A {} #[doc = "Field `TRINP` reader - Transfer OK Interrupt Node Pointer"] -pub type TrinpR = crate::FieldReader; -impl TrinpR { +pub type TRINP_R = crate::FieldReader; +impl TRINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Trinp::Value1), - 1 => Some(Trinp::Value2), - 7 => Some(Trinp::Value3), + 0 => Some(TRINP_A::VALUE1), + 1 => Some(TRINP_A::VALUE2), + 7 => Some(TRINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trinp::Value1 + *self == TRINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trinp::Value2 + *self == TRINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trinp::Value3 + *self == TRINP_A::VALUE3 } } #[doc = "Field `TRINP` writer - Transfer OK Interrupt Node Pointer"] -pub type TrinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trinp>; -impl<'a, REG> TrinpW<'a, REG> +pub type TRINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TRINP_A>; +impl<'a, REG> TRINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trinp::Value1) + self.variant(TRINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trinp::Value2) + self.variant(TRINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trinp::Value3) + self.variant(TRINP_A::VALUE3) } } #[doc = "Frame Counter Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cfcinp { +pub enum CFCINP_A { #[doc = "0: Interrupt output line INT_O0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Interrupt output line INT_O1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Interrupt output line INT_O7 is selected."] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cfcinp) -> Self { + fn from(variant: CFCINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cfcinp { +impl crate::FieldSpec for CFCINP_A { type Ux = u8; } -impl crate::IsEnum for Cfcinp {} +impl crate::IsEnum for CFCINP_A {} #[doc = "Field `CFCINP` reader - Frame Counter Interrupt Node Pointer"] -pub type CfcinpR = crate::FieldReader; -impl CfcinpR { +pub type CFCINP_R = crate::FieldReader; +impl CFCINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cfcinp::Value1), - 1 => Some(Cfcinp::Value2), - 7 => Some(Cfcinp::Value3), + 0 => Some(CFCINP_A::VALUE1), + 1 => Some(CFCINP_A::VALUE2), + 7 => Some(CFCINP_A::VALUE3), _ => None, } } #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfcinp::Value1 + *self == CFCINP_A::VALUE1 } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cfcinp::Value2 + *self == CFCINP_A::VALUE2 } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cfcinp::Value3 + *self == CFCINP_A::VALUE3 } } #[doc = "Field `CFCINP` writer - Frame Counter Interrupt Node Pointer"] -pub type CfcinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cfcinp>; -impl<'a, REG> CfcinpW<'a, REG> +pub type CFCINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CFCINP_A>; +impl<'a, REG> CFCINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,81 +281,81 @@ where #[doc = "Interrupt output line INT_O0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cfcinp::Value1) + self.variant(CFCINP_A::VALUE1) } #[doc = "Interrupt output line INT_O1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cfcinp::Value2) + self.variant(CFCINP_A::VALUE2) } #[doc = "Interrupt output line INT_O7 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cfcinp::Value3) + self.variant(CFCINP_A::VALUE3) } } impl R { #[doc = "Bits 0:2 - Alert Interrupt Node Pointer"] #[inline(always)] - pub fn alinp(&self) -> AlinpR { - AlinpR::new((self.bits & 7) as u8) + pub fn alinp(&self) -> ALINP_R { + ALINP_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Last Error Code Interrupt Node Pointer"] #[inline(always)] - pub fn lecinp(&self) -> LecinpR { - LecinpR::new(((self.bits >> 4) & 7) as u8) + pub fn lecinp(&self) -> LECINP_R { + LECINP_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Transfer OK Interrupt Node Pointer"] #[inline(always)] - pub fn trinp(&self) -> TrinpR { - TrinpR::new(((self.bits >> 8) & 7) as u8) + pub fn trinp(&self) -> TRINP_R { + TRINP_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Frame Counter Interrupt Node Pointer"] #[inline(always)] - pub fn cfcinp(&self) -> CfcinpR { - CfcinpR::new(((self.bits >> 12) & 7) as u8) + pub fn cfcinp(&self) -> CFCINP_R { + CFCINP_R::new(((self.bits >> 12) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Alert Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn alinp(&mut self) -> AlinpW { - AlinpW::new(self, 0) + pub fn alinp(&mut self) -> ALINP_W { + ALINP_W::new(self, 0) } #[doc = "Bits 4:6 - Last Error Code Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn lecinp(&mut self) -> LecinpW { - LecinpW::new(self, 4) + pub fn lecinp(&mut self) -> LECINP_W { + LECINP_W::new(self, 4) } #[doc = "Bits 8:10 - Transfer OK Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn trinp(&mut self) -> TrinpW { - TrinpW::new(self, 8) + pub fn trinp(&mut self) -> TRINP_W { + TRINP_W::new(self, 8) } #[doc = "Bits 12:14 - Frame Counter Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn cfcinp(&mut self) -> CfcinpW { - CfcinpW::new(self, 12) + pub fn cfcinp(&mut self) -> CFCINP_W { + CFCINP_W::new(self, 12) } } #[doc = "Node Interrupt Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nipr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nipr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NiprSpec; -impl crate::RegisterSpec for NiprSpec { +pub struct NIPR_SPEC; +impl crate::RegisterSpec for NIPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nipr::R`](R) reader structure"] -impl crate::Readable for NiprSpec {} +impl crate::Readable for NIPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`nipr::W`](W) writer structure"] -impl crate::Writable for NiprSpec { +impl crate::Writable for NIPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NIPR to value 0"] -impl crate::Resettable for NiprSpec { +impl crate::Resettable for NIPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/npcr.rs b/src/can_node0/npcr.rs index d83809a6..02202677 100644 --- a/src/can_node0/npcr.rs +++ b/src/can_node0/npcr.rs @@ -1,104 +1,104 @@ #[doc = "Register `NPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RXSEL` reader - Receive Select"] -pub type RxselR = crate::FieldReader; +pub type RXSEL_R = crate::FieldReader; #[doc = "Field `RXSEL` writer - Receive Select"] -pub type RxselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type RXSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Loop-Back Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lbm { +pub enum LBM_A { #[doc = "0: Loop-Back Mode is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lbm) -> Self { + fn from(variant: LBM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LBM` reader - Loop-Back Mode"] -pub type LbmR = crate::BitReader; -impl LbmR { +pub type LBM_R = crate::BitReader; +impl LBM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lbm { + pub const fn variant(&self) -> LBM_A { match self.bits { - false => Lbm::Value1, - true => Lbm::Value2, + false => LBM_A::VALUE1, + true => LBM_A::VALUE2, } } #[doc = "Loop-Back Mode is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lbm::Value1 + *self == LBM_A::VALUE1 } #[doc = "Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lbm::Value2 + *self == LBM_A::VALUE2 } } #[doc = "Field `LBM` writer - Loop-Back Mode"] -pub type LbmW<'a, REG> = crate::BitWriter<'a, REG, Lbm>; -impl<'a, REG> LbmW<'a, REG> +pub type LBM_W<'a, REG> = crate::BitWriter<'a, REG, LBM_A>; +impl<'a, REG> LBM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Loop-Back Mode is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lbm::Value1) + self.variant(LBM_A::VALUE1) } #[doc = "Loop-Back Mode is enabled. This node is connected to an internal (virtual) loop-back CAN bus. All CAN nodes which are in Loop-Back Mode are connected to this virtual CAN bus so that they can communicate with each other internally. The external transmit line is forced recessive in Loop-Back Mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lbm::Value2) + self.variant(LBM_A::VALUE2) } } impl R { #[doc = "Bits 0:2 - Receive Select"] #[inline(always)] - pub fn rxsel(&self) -> RxselR { - RxselR::new((self.bits & 7) as u8) + pub fn rxsel(&self) -> RXSEL_R { + RXSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 8 - Loop-Back Mode"] #[inline(always)] - pub fn lbm(&self) -> LbmR { - LbmR::new(((self.bits >> 8) & 1) != 0) + pub fn lbm(&self) -> LBM_R { + LBM_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Receive Select"] #[inline(always)] #[must_use] - pub fn rxsel(&mut self) -> RxselW { - RxselW::new(self, 0) + pub fn rxsel(&mut self) -> RXSEL_W { + RXSEL_W::new(self, 0) } #[doc = "Bit 8 - Loop-Back Mode"] #[inline(always)] #[must_use] - pub fn lbm(&mut self) -> LbmW { - LbmW::new(self, 8) + pub fn lbm(&mut self) -> LBM_W { + LBM_W::new(self, 8) } } #[doc = "Node Port Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`npcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`npcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NpcrSpec; -impl crate::RegisterSpec for NpcrSpec { +pub struct NPCR_SPEC; +impl crate::RegisterSpec for NPCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`npcr::R`](R) reader structure"] -impl crate::Readable for NpcrSpec {} +impl crate::Readable for NPCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`npcr::W`](W) writer structure"] -impl crate::Writable for NpcrSpec { +impl crate::Writable for NPCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NPCR to value 0"] -impl crate::Resettable for NpcrSpec { +impl crate::Resettable for NPCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/can_node0/nsr.rs b/src/can_node0/nsr.rs index 28166d7f..d27eff56 100644 --- a/src/can_node0/nsr.rs +++ b/src/can_node0/nsr.rs @@ -1,434 +1,434 @@ #[doc = "Register `NSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LEC` reader - Last Error Code"] -pub type LecR = crate::FieldReader; +pub type LEC_R = crate::FieldReader; #[doc = "Field `LEC` writer - Last Error Code"] -pub type LecW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type LEC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Message Transmitted Successfully\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txok { +pub enum TXOK_A { #[doc = "0: No successful transmission since last (most recent) flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A message has been transmitted successfully (error-free and acknowledged by at least another node)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txok) -> Self { + fn from(variant: TXOK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXOK` reader - Message Transmitted Successfully"] -pub type TxokR = crate::BitReader; -impl TxokR { +pub type TXOK_R = crate::BitReader; +impl TXOK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txok { + pub const fn variant(&self) -> TXOK_A { match self.bits { - false => Txok::Value1, - true => Txok::Value2, + false => TXOK_A::VALUE1, + true => TXOK_A::VALUE2, } } #[doc = "No successful transmission since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txok::Value1 + *self == TXOK_A::VALUE1 } #[doc = "A message has been transmitted successfully (error-free and acknowledged by at least another node)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txok::Value2 + *self == TXOK_A::VALUE2 } } #[doc = "Field `TXOK` writer - Message Transmitted Successfully"] -pub type TxokW<'a, REG> = crate::BitWriter<'a, REG, Txok>; -impl<'a, REG> TxokW<'a, REG> +pub type TXOK_W<'a, REG> = crate::BitWriter<'a, REG, TXOK_A>; +impl<'a, REG> TXOK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No successful transmission since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Txok::Value1) + self.variant(TXOK_A::VALUE1) } #[doc = "A message has been transmitted successfully (error-free and acknowledged by at least another node)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Txok::Value2) + self.variant(TXOK_A::VALUE2) } } #[doc = "Message Received Successfully\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxok { +pub enum RXOK_A { #[doc = "0: No successful reception since last (most recent) flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A message has been received successfully."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxok) -> Self { + fn from(variant: RXOK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXOK` reader - Message Received Successfully"] -pub type RxokR = crate::BitReader; -impl RxokR { +pub type RXOK_R = crate::BitReader; +impl RXOK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxok { + pub const fn variant(&self) -> RXOK_A { match self.bits { - false => Rxok::Value1, - true => Rxok::Value2, + false => RXOK_A::VALUE1, + true => RXOK_A::VALUE2, } } #[doc = "No successful reception since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxok::Value1 + *self == RXOK_A::VALUE1 } #[doc = "A message has been received successfully."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxok::Value2 + *self == RXOK_A::VALUE2 } } #[doc = "Field `RXOK` writer - Message Received Successfully"] -pub type RxokW<'a, REG> = crate::BitWriter<'a, REG, Rxok>; -impl<'a, REG> RxokW<'a, REG> +pub type RXOK_W<'a, REG> = crate::BitWriter<'a, REG, RXOK_A>; +impl<'a, REG> RXOK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No successful reception since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rxok::Value1) + self.variant(RXOK_A::VALUE1) } #[doc = "A message has been received successfully."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rxok::Value2) + self.variant(RXOK_A::VALUE2) } } #[doc = "Field `ALERT` reader - Alert Warning"] -pub type AlertR = crate::BitReader; +pub type ALERT_R = crate::BitReader; #[doc = "Field `ALERT` writer - Alert Warning"] -pub type AlertW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ALERT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Error Warning Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ewrn { +pub enum EWRN_A { #[doc = "0: No warning limit exceeded."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One of the error counters REC or TEC reached the warning limit EWRNLVL."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ewrn) -> Self { + fn from(variant: EWRN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EWRN` reader - Error Warning Status"] -pub type EwrnR = crate::BitReader; -impl EwrnR { +pub type EWRN_R = crate::BitReader; +impl EWRN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ewrn { + pub const fn variant(&self) -> EWRN_A { match self.bits { - false => Ewrn::Value1, - true => Ewrn::Value2, + false => EWRN_A::VALUE1, + true => EWRN_A::VALUE2, } } #[doc = "No warning limit exceeded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ewrn::Value1 + *self == EWRN_A::VALUE1 } #[doc = "One of the error counters REC or TEC reached the warning limit EWRNLVL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ewrn::Value2 + *self == EWRN_A::VALUE2 } } #[doc = "Bus-off Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Boff { +pub enum BOFF_A { #[doc = "0: CAN controller is not in the bus-off state."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CAN controller is in the bus-off state."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Boff) -> Self { + fn from(variant: BOFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BOFF` reader - Bus-off Status"] -pub type BoffR = crate::BitReader; -impl BoffR { +pub type BOFF_R = crate::BitReader; +impl BOFF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Boff { + pub const fn variant(&self) -> BOFF_A { match self.bits { - false => Boff::Value1, - true => Boff::Value2, + false => BOFF_A::VALUE1, + true => BOFF_A::VALUE2, } } #[doc = "CAN controller is not in the bus-off state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Boff::Value1 + *self == BOFF_A::VALUE1 } #[doc = "CAN controller is in the bus-off state."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Boff::Value2 + *self == BOFF_A::VALUE2 } } #[doc = "List Length Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lle { +pub enum LLE_A { #[doc = "0: No List Length Error since last (most recent) flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lle) -> Self { + fn from(variant: LLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LLE` reader - List Length Error"] -pub type LleR = crate::BitReader; -impl LleR { +pub type LLE_R = crate::BitReader; +impl LLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lle { + pub const fn variant(&self) -> LLE_A { match self.bits { - false => Lle::Value1, - true => Lle::Value2, + false => LLE_A::VALUE1, + true => LLE_A::VALUE2, } } #[doc = "No List Length Error since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lle::Value1 + *self == LLE_A::VALUE1 } #[doc = "A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lle::Value2 + *self == LLE_A::VALUE2 } } #[doc = "Field `LLE` writer - List Length Error"] -pub type LleW<'a, REG> = crate::BitWriter<'a, REG, Lle>; -impl<'a, REG> LleW<'a, REG> +pub type LLE_W<'a, REG> = crate::BitWriter<'a, REG, LLE_A>; +impl<'a, REG> LLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No List Length Error since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lle::Value1) + self.variant(LLE_A::VALUE1) } #[doc = "A List Length Error has been detected during message acceptance filtering. The number of elements in the list that belongs to this CAN node differs from the list SIZE given in the list termination pointer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lle::Value2) + self.variant(LLE_A::VALUE2) } } #[doc = "List Object Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Loe { +pub enum LOE_A { #[doc = "0: No List Object Error since last (most recent) flag reset."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Control Register has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Loe) -> Self { + fn from(variant: LOE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LOE` reader - List Object Error"] -pub type LoeR = crate::BitReader; -impl LoeR { +pub type LOE_R = crate::BitReader; +impl LOE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Loe { + pub const fn variant(&self) -> LOE_A { match self.bits { - false => Loe::Value1, - true => Loe::Value2, + false => LOE_A::VALUE1, + true => LOE_A::VALUE2, } } #[doc = "No List Object Error since last (most recent) flag reset."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Loe::Value1 + *self == LOE_A::VALUE1 } #[doc = "A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Control Register has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Loe::Value2 + *self == LOE_A::VALUE2 } } #[doc = "Field `LOE` writer - List Object Error"] -pub type LoeW<'a, REG> = crate::BitWriter<'a, REG, Loe>; -impl<'a, REG> LoeW<'a, REG> +pub type LOE_W<'a, REG> = crate::BitWriter<'a, REG, LOE_A>; +impl<'a, REG> LOE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No List Object Error since last (most recent) flag reset."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Loe::Value1) + self.variant(LOE_A::VALUE1) } #[doc = "A List Object Error has been detected during message acceptance filtering. A message object with wrong LIST index entry in the Message Object Control Register has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Loe::Value2) + self.variant(LOE_A::VALUE2) } } #[doc = "Suspend Acknowledge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Susack { +pub enum SUSACK_A { #[doc = "0: The CAN node is not in Suspend Mode or a suspend request is pending, but the CAN node has not yet reached bus-idle or bus-off."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The CAN node is in Suspend Mode: The CAN node is inactive (bit NCR.INIT internally forced to 1) due to an OCDS suspend request."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Susack) -> Self { + fn from(variant: SUSACK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SUSACK` reader - Suspend Acknowledge"] -pub type SusackR = crate::BitReader; -impl SusackR { +pub type SUSACK_R = crate::BitReader; +impl SUSACK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Susack { + pub const fn variant(&self) -> SUSACK_A { match self.bits { - false => Susack::Value1, - true => Susack::Value2, + false => SUSACK_A::VALUE1, + true => SUSACK_A::VALUE2, } } #[doc = "The CAN node is not in Suspend Mode or a suspend request is pending, but the CAN node has not yet reached bus-idle or bus-off."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Susack::Value1 + *self == SUSACK_A::VALUE1 } #[doc = "The CAN node is in Suspend Mode: The CAN node is inactive (bit NCR.INIT internally forced to 1) due to an OCDS suspend request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Susack::Value2 + *self == SUSACK_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Last Error Code"] #[inline(always)] - pub fn lec(&self) -> LecR { - LecR::new((self.bits & 7) as u8) + pub fn lec(&self) -> LEC_R { + LEC_R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Message Transmitted Successfully"] #[inline(always)] - pub fn txok(&self) -> TxokR { - TxokR::new(((self.bits >> 3) & 1) != 0) + pub fn txok(&self) -> TXOK_R { + TXOK_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Message Received Successfully"] #[inline(always)] - pub fn rxok(&self) -> RxokR { - RxokR::new(((self.bits >> 4) & 1) != 0) + pub fn rxok(&self) -> RXOK_R { + RXOK_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Alert Warning"] #[inline(always)] - pub fn alert(&self) -> AlertR { - AlertR::new(((self.bits >> 5) & 1) != 0) + pub fn alert(&self) -> ALERT_R { + ALERT_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Error Warning Status"] #[inline(always)] - pub fn ewrn(&self) -> EwrnR { - EwrnR::new(((self.bits >> 6) & 1) != 0) + pub fn ewrn(&self) -> EWRN_R { + EWRN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Bus-off Status"] #[inline(always)] - pub fn boff(&self) -> BoffR { - BoffR::new(((self.bits >> 7) & 1) != 0) + pub fn boff(&self) -> BOFF_R { + BOFF_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - List Length Error"] #[inline(always)] - pub fn lle(&self) -> LleR { - LleR::new(((self.bits >> 8) & 1) != 0) + pub fn lle(&self) -> LLE_R { + LLE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - List Object Error"] #[inline(always)] - pub fn loe(&self) -> LoeR { - LoeR::new(((self.bits >> 9) & 1) != 0) + pub fn loe(&self) -> LOE_R { + LOE_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Suspend Acknowledge"] #[inline(always)] - pub fn susack(&self) -> SusackR { - SusackR::new(((self.bits >> 10) & 1) != 0) + pub fn susack(&self) -> SUSACK_R { + SUSACK_R::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Last Error Code"] #[inline(always)] #[must_use] - pub fn lec(&mut self) -> LecW { - LecW::new(self, 0) + pub fn lec(&mut self) -> LEC_W { + LEC_W::new(self, 0) } #[doc = "Bit 3 - Message Transmitted Successfully"] #[inline(always)] #[must_use] - pub fn txok(&mut self) -> TxokW { - TxokW::new(self, 3) + pub fn txok(&mut self) -> TXOK_W { + TXOK_W::new(self, 3) } #[doc = "Bit 4 - Message Received Successfully"] #[inline(always)] #[must_use] - pub fn rxok(&mut self) -> RxokW { - RxokW::new(self, 4) + pub fn rxok(&mut self) -> RXOK_W { + RXOK_W::new(self, 4) } #[doc = "Bit 5 - Alert Warning"] #[inline(always)] #[must_use] - pub fn alert(&mut self) -> AlertW { - AlertW::new(self, 5) + pub fn alert(&mut self) -> ALERT_W { + ALERT_W::new(self, 5) } #[doc = "Bit 8 - List Length Error"] #[inline(always)] #[must_use] - pub fn lle(&mut self) -> LleW { - LleW::new(self, 8) + pub fn lle(&mut self) -> LLE_W { + LLE_W::new(self, 8) } #[doc = "Bit 9 - List Object Error"] #[inline(always)] #[must_use] - pub fn loe(&mut self) -> LoeW { - LoeW::new(self, 9) + pub fn loe(&mut self) -> LOE_W { + LOE_W::new(self, 9) } } #[doc = "Node Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NsrSpec; -impl crate::RegisterSpec for NsrSpec { +pub struct NSR_SPEC; +impl crate::RegisterSpec for NSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nsr::R`](R) reader structure"] -impl crate::Readable for NsrSpec {} +impl crate::Readable for NSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`nsr::W`](W) writer structure"] -impl crate::Writable for NsrSpec { +impl crate::Writable for NSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NSR to value 0"] -impl crate::Resettable for NsrSpec { +impl crate::Resettable for NSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40.rs b/src/ccu40.rs index f52e386b..a2fd4343 100644 --- a/src/ccu40.rs +++ b/src/ccu40.rs @@ -1,116 +1,107 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - gctrl: Gctrl, - gstat: Gstat, - gidls: Gidls, - gidlc: Gidlc, - gcss: Gcss, - gcsc: Gcsc, - gcst: Gcst, + gctrl: GCTRL, + gstat: GSTAT, + gidls: GIDLS, + gidlc: GIDLC, + gcss: GCSS, + gcsc: GCSC, + gcst: GCST, _reserved7: [u8; 0x34], - ecrd: Ecrd, + ecrd: ECRD, _reserved8: [u8; 0x2c], - midr: Midr, + midr: MIDR, } impl RegisterBlock { #[doc = "0x00 - Global Control Register"] #[inline(always)] - pub const fn gctrl(&self) -> &Gctrl { + pub const fn gctrl(&self) -> &GCTRL { &self.gctrl } #[doc = "0x04 - Global Status Register"] #[inline(always)] - pub const fn gstat(&self) -> &Gstat { + pub const fn gstat(&self) -> &GSTAT { &self.gstat } #[doc = "0x08 - Global Idle Set"] #[inline(always)] - pub const fn gidls(&self) -> &Gidls { + pub const fn gidls(&self) -> &GIDLS { &self.gidls } #[doc = "0x0c - Global Idle Clear"] #[inline(always)] - pub const fn gidlc(&self) -> &Gidlc { + pub const fn gidlc(&self) -> &GIDLC { &self.gidlc } #[doc = "0x10 - Global Channel Set"] #[inline(always)] - pub const fn gcss(&self) -> &Gcss { + pub const fn gcss(&self) -> &GCSS { &self.gcss } #[doc = "0x14 - Global Channel Clear"] #[inline(always)] - pub const fn gcsc(&self) -> &Gcsc { + pub const fn gcsc(&self) -> &GCSC { &self.gcsc } #[doc = "0x18 - Global Channel Status"] #[inline(always)] - pub const fn gcst(&self) -> &Gcst { + pub const fn gcst(&self) -> &GCST { &self.gcst } #[doc = "0x50 - Extended Capture Mode Read"] #[inline(always)] - pub const fn ecrd(&self) -> &Ecrd { + pub const fn ecrd(&self) -> &ECRD { &self.ecrd } #[doc = "0x80 - Module Identification"] #[inline(always)] - pub const fn midr(&self) -> &Midr { + pub const fn midr(&self) -> &MIDR { &self.midr } } #[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] -#[doc(alias = "GCTRL")] -pub type Gctrl = crate::Reg; +pub type GCTRL = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; #[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] -#[doc(alias = "GSTAT")] -pub type Gstat = crate::Reg; +pub type GSTAT = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; #[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] -#[doc(alias = "GIDLS")] -pub type Gidls = crate::Reg; +pub type GIDLS = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; #[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] -#[doc(alias = "GIDLC")] -pub type Gidlc = crate::Reg; +pub type GIDLC = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; #[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] -#[doc(alias = "GCSS")] -pub type Gcss = crate::Reg; +pub type GCSS = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; #[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] -#[doc(alias = "GCSC")] -pub type Gcsc = crate::Reg; +pub type GCSC = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; #[doc = "GCST (r) register accessor: Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] -#[doc(alias = "GCST")] -pub type Gcst = crate::Reg; +pub type GCST = crate::Reg; #[doc = "Global Channel Status"] pub mod gcst; #[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd`] module"] -#[doc(alias = "ECRD")] -pub type Ecrd = crate::Reg; +pub type ECRD = crate::Reg; #[doc = "Extended Capture Mode Read"] pub mod ecrd; #[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -#[doc(alias = "MIDR")] -pub type Midr = crate::Reg; +pub type MIDR = crate::Reg; #[doc = "Module Identification"] pub mod midr; diff --git a/src/ccu40/ecrd.rs b/src/ccu40/ecrd.rs index 011d9533..54c03ab7 100644 --- a/src/ccu40/ecrd.rs +++ b/src/ccu40/ecrd.rs @@ -1,196 +1,196 @@ #[doc = "Register `ECRD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CapvR = crate::FieldReader; +pub type CAPV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sptr { +pub enum SPTR_A { #[doc = "0: CC40"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC41"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CC42"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CC43"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sptr) -> Self { + fn from(variant: SPTR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sptr { +impl crate::FieldSpec for SPTR_A { type Ux = u8; } -impl crate::IsEnum for Sptr {} +impl crate::IsEnum for SPTR_A {} #[doc = "Field `SPTR` reader - Slice pointer"] -pub type SptrR = crate::FieldReader; -impl SptrR { +pub type SPTR_R = crate::FieldReader; +impl SPTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sptr { + pub const fn variant(&self) -> SPTR_A { match self.bits { - 0 => Sptr::Value1, - 1 => Sptr::Value2, - 2 => Sptr::Value3, - 3 => Sptr::Value4, + 0 => SPTR_A::VALUE1, + 1 => SPTR_A::VALUE2, + 2 => SPTR_A::VALUE3, + 3 => SPTR_A::VALUE4, _ => unreachable!(), } } #[doc = "CC40"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sptr::Value1 + *self == SPTR_A::VALUE1 } #[doc = "CC41"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sptr::Value2 + *self == SPTR_A::VALUE2 } #[doc = "CC42"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sptr::Value3 + *self == SPTR_A::VALUE3 } #[doc = "CC43"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sptr::Value4 + *self == SPTR_A::VALUE4 } } #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Vptr { +pub enum VPTR_A { #[doc = "0: Capture register 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture register 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Capture register 2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Capture register 3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Vptr) -> Self { + fn from(variant: VPTR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vptr { +impl crate::FieldSpec for VPTR_A { type Ux = u8; } -impl crate::IsEnum for Vptr {} +impl crate::IsEnum for VPTR_A {} #[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VptrR = crate::FieldReader; -impl VptrR { +pub type VPTR_R = crate::FieldReader; +impl VPTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vptr { + pub const fn variant(&self) -> VPTR_A { match self.bits { - 0 => Vptr::Value1, - 1 => Vptr::Value2, - 2 => Vptr::Value3, - 3 => Vptr::Value4, + 0 => VPTR_A::VALUE1, + 1 => VPTR_A::VALUE2, + 2 => VPTR_A::VALUE3, + 3 => VPTR_A::VALUE4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vptr::Value1 + *self == VPTR_A::VALUE1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vptr::Value2 + *self == VPTR_A::VALUE2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Vptr::Value3 + *self == VPTR_A::VALUE3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Vptr::Value4 + *self == VPTR_A::VALUE4 } } #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into this register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value has been captured into this register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CapvR { - CapvR::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CAPV_R { + CAPV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SptrR { - SptrR::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SPTR_R { + SPTR_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VptrR { - VptrR::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VPTR_R { + VPTR_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 24) & 1) != 0) } } #[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EcrdSpec; -impl crate::RegisterSpec for EcrdSpec { +pub struct ECRD_SPEC; +impl crate::RegisterSpec for ECRD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ecrd::R`](R) reader structure"] -impl crate::Readable for EcrdSpec {} +impl crate::Readable for ECRD_SPEC {} #[doc = "`reset()` method sets ECRD to value 0"] -impl crate::Resettable for EcrdSpec { +impl crate::Resettable for ECRD_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gcsc.rs b/src/ccu40/gcsc.rs index d979cc44..43d0f4d6 100644 --- a/src/ccu40/gcsc.rs +++ b/src/ccu40/gcsc.rs @@ -1,147 +1,147 @@ #[doc = "Register `GCSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SC` writer - Slice 0 shadow transfer clear"] -pub type S0scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSC` writer - Slice 0 Dither shadow transfer clear"] -pub type S0dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSC` writer - Slice 0 Prescaler shadow transfer clear"] -pub type S0pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SC` writer - Slice 1 shadow transfer clear"] -pub type S1scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSC` writer - Slice 1 Dither shadow transfer clear"] -pub type S1dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSC` writer - Slice 1 Prescaler shadow transfer clear"] -pub type S1pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SC` writer - Slice 2 shadow transfer clear"] -pub type S2scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSC` writer - Slice 2 Dither shadow transfer clear"] -pub type S2dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSC` writer - Slice 2 Prescaler shadow transfer clear"] -pub type S2pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SC` writer - Slice 3 shadow transfer clear"] -pub type S3scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSC` writer - Slice 3 Dither shadow transfer clear"] -pub type S3dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSC` writer - Slice 3 Prescaler shadow transfer clear"] -pub type S3pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0STC` writer - Slice 0 status bit clear"] -pub type S0stcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0STC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STC` writer - Slice 1 status bit clear"] -pub type S1stcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1STC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STC` writer - Slice 2 status bit clear"] -pub type S2stcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2STC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3STC` writer - Slice 3 status bit clear"] -pub type S3stcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3STC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0sc(&mut self) -> S0scW { - S0scW::new(self, 0) + pub fn s0sc(&mut self) -> S0SC_W { + S0SC_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0dsc(&mut self) -> S0dscW { - S0dscW::new(self, 1) + pub fn s0dsc(&mut self) -> S0DSC_W { + S0DSC_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0psc(&mut self) -> S0pscW { - S0pscW::new(self, 2) + pub fn s0psc(&mut self) -> S0PSC_W { + S0PSC_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1sc(&mut self) -> S1scW { - S1scW::new(self, 4) + pub fn s1sc(&mut self) -> S1SC_W { + S1SC_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1dsc(&mut self) -> S1dscW { - S1dscW::new(self, 5) + pub fn s1dsc(&mut self) -> S1DSC_W { + S1DSC_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1psc(&mut self) -> S1pscW { - S1pscW::new(self, 6) + pub fn s1psc(&mut self) -> S1PSC_W { + S1PSC_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2sc(&mut self) -> S2scW { - S2scW::new(self, 8) + pub fn s2sc(&mut self) -> S2SC_W { + S2SC_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2dsc(&mut self) -> S2dscW { - S2dscW::new(self, 9) + pub fn s2dsc(&mut self) -> S2DSC_W { + S2DSC_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2psc(&mut self) -> S2pscW { - S2pscW::new(self, 10) + pub fn s2psc(&mut self) -> S2PSC_W { + S2PSC_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3sc(&mut self) -> S3scW { - S3scW::new(self, 12) + pub fn s3sc(&mut self) -> S3SC_W { + S3SC_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3dsc(&mut self) -> S3dscW { - S3dscW::new(self, 13) + pub fn s3dsc(&mut self) -> S3DSC_W { + S3DSC_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3psc(&mut self) -> S3pscW { - S3pscW::new(self, 14) + pub fn s3psc(&mut self) -> S3PSC_W { + S3PSC_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit clear"] #[inline(always)] #[must_use] - pub fn s0stc(&mut self) -> S0stcW { - S0stcW::new(self, 16) + pub fn s0stc(&mut self) -> S0STC_W { + S0STC_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit clear"] #[inline(always)] #[must_use] - pub fn s1stc(&mut self) -> S1stcW { - S1stcW::new(self, 17) + pub fn s1stc(&mut self) -> S1STC_W { + S1STC_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit clear"] #[inline(always)] #[must_use] - pub fn s2stc(&mut self) -> S2stcW { - S2stcW::new(self, 18) + pub fn s2stc(&mut self) -> S2STC_W { + S2STC_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit clear"] #[inline(always)] #[must_use] - pub fn s3stc(&mut self) -> S3stcW { - S3stcW::new(self, 19) + pub fn s3stc(&mut self) -> S3STC_W { + S3STC_W::new(self, 19) } } #[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcscSpec; -impl crate::RegisterSpec for GcscSpec { +pub struct GCSC_SPEC; +impl crate::RegisterSpec for GCSC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcsc::W`](W) writer structure"] -impl crate::Writable for GcscSpec { +impl crate::Writable for GCSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSC to value 0"] -impl crate::Resettable for GcscSpec { +impl crate::Resettable for GCSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gcss.rs b/src/ccu40/gcss.rs index 43246d43..70789d07 100644 --- a/src/ccu40/gcss.rs +++ b/src/ccu40/gcss.rs @@ -1,147 +1,147 @@ #[doc = "Register `GCSS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SE` writer - Slice 0 shadow transfer set enable"] -pub type S0seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSE` writer - Slice 0 Dither shadow transfer set enable"] -pub type S0dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSE` writer - Slice 0 Prescaler shadow transfer set enable"] -pub type S0pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SE` writer - Slice 1 shadow transfer set enable"] -pub type S1seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSE` writer - Slice 1 Dither shadow transfer set enable"] -pub type S1dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSE` writer - Slice 1 Prescaler shadow transfer set enable"] -pub type S1pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SE` writer - Slice 2 shadow transfer set enable"] -pub type S2seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSE` writer - Slice 2 Dither shadow transfer set enable"] -pub type S2dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSE` writer - Slice 2 Prescaler shadow transfer set enable"] -pub type S2pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SE` writer - Slice 3 shadow transfer set enable"] -pub type S3seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSE` writer - Slice 3 Dither shadow transfer set enable"] -pub type S3dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSE` writer - Slice 3 Prescaler shadow transfer set enable"] -pub type S3pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0STS` writer - Slice 0 status bit set"] -pub type S0stsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0STS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STS` writer - Slice 1 status bit set"] -pub type S1stsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1STS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STS` writer - Slice 2 status bit set"] -pub type S2stsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2STS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3STS` writer - Slice 3 status bit set"] -pub type S3stsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3STS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0se(&mut self) -> S0seW { - S0seW::new(self, 0) + pub fn s0se(&mut self) -> S0SE_W { + S0SE_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0dse(&mut self) -> S0dseW { - S0dseW::new(self, 1) + pub fn s0dse(&mut self) -> S0DSE_W { + S0DSE_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0pse(&mut self) -> S0pseW { - S0pseW::new(self, 2) + pub fn s0pse(&mut self) -> S0PSE_W { + S0PSE_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1se(&mut self) -> S1seW { - S1seW::new(self, 4) + pub fn s1se(&mut self) -> S1SE_W { + S1SE_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1dse(&mut self) -> S1dseW { - S1dseW::new(self, 5) + pub fn s1dse(&mut self) -> S1DSE_W { + S1DSE_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1pse(&mut self) -> S1pseW { - S1pseW::new(self, 6) + pub fn s1pse(&mut self) -> S1PSE_W { + S1PSE_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2se(&mut self) -> S2seW { - S2seW::new(self, 8) + pub fn s2se(&mut self) -> S2SE_W { + S2SE_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2dse(&mut self) -> S2dseW { - S2dseW::new(self, 9) + pub fn s2dse(&mut self) -> S2DSE_W { + S2DSE_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2pse(&mut self) -> S2pseW { - S2pseW::new(self, 10) + pub fn s2pse(&mut self) -> S2PSE_W { + S2PSE_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3se(&mut self) -> S3seW { - S3seW::new(self, 12) + pub fn s3se(&mut self) -> S3SE_W { + S3SE_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3dse(&mut self) -> S3dseW { - S3dseW::new(self, 13) + pub fn s3dse(&mut self) -> S3DSE_W { + S3DSE_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3pse(&mut self) -> S3pseW { - S3pseW::new(self, 14) + pub fn s3pse(&mut self) -> S3PSE_W { + S3PSE_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit set"] #[inline(always)] #[must_use] - pub fn s0sts(&mut self) -> S0stsW { - S0stsW::new(self, 16) + pub fn s0sts(&mut self) -> S0STS_W { + S0STS_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit set"] #[inline(always)] #[must_use] - pub fn s1sts(&mut self) -> S1stsW { - S1stsW::new(self, 17) + pub fn s1sts(&mut self) -> S1STS_W { + S1STS_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit set"] #[inline(always)] #[must_use] - pub fn s2sts(&mut self) -> S2stsW { - S2stsW::new(self, 18) + pub fn s2sts(&mut self) -> S2STS_W { + S2STS_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit set"] #[inline(always)] #[must_use] - pub fn s3sts(&mut self) -> S3stsW { - S3stsW::new(self, 19) + pub fn s3sts(&mut self) -> S3STS_W { + S3STS_W::new(self, 19) } } #[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcssSpec; -impl crate::RegisterSpec for GcssSpec { +pub struct GCSS_SPEC; +impl crate::RegisterSpec for GCSS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcss::W`](W) writer structure"] -impl crate::Writable for GcssSpec { +impl crate::Writable for GCSS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSS to value 0"] -impl crate::Resettable for GcssSpec { +impl crate::Resettable for GCSS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gcst.rs b/src/ccu40/gcst.rs index 14e0d150..2750092c 100644 --- a/src/ccu40/gcst.rs +++ b/src/ccu40/gcst.rs @@ -1,535 +1,535 @@ #[doc = "Register `GCST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Slice 0 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0ss { +pub enum S0SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0ss) -> Self { + fn from(variant: S0SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] -pub type S0ssR = crate::BitReader; -impl S0ssR { +pub type S0SS_R = crate::BitReader; +impl S0SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0ss { + pub const fn variant(&self) -> S0SS_A { match self.bits { - false => S0ss::Value1, - true => S0ss::Value2, + false => S0SS_A::VALUE1, + true => S0SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0ss::Value1 + *self == S0SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0ss::Value2 + *self == S0SS_A::VALUE2 } } #[doc = "Slice 0 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0dss { +pub enum S0DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0dss) -> Self { + fn from(variant: S0DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] -pub type S0dssR = crate::BitReader; -impl S0dssR { +pub type S0DSS_R = crate::BitReader; +impl S0DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0dss { + pub const fn variant(&self) -> S0DSS_A { match self.bits { - false => S0dss::Value1, - true => S0dss::Value2, + false => S0DSS_A::VALUE1, + true => S0DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0dss::Value1 + *self == S0DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0dss::Value2 + *self == S0DSS_A::VALUE2 } } #[doc = "Slice 0 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0pss { +pub enum S0PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0pss) -> Self { + fn from(variant: S0PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] -pub type S0pssR = crate::BitReader; -impl S0pssR { +pub type S0PSS_R = crate::BitReader; +impl S0PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0pss { + pub const fn variant(&self) -> S0PSS_A { match self.bits { - false => S0pss::Value1, - true => S0pss::Value2, + false => S0PSS_A::VALUE1, + true => S0PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0pss::Value1 + *self == S0PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0pss::Value2 + *self == S0PSS_A::VALUE2 } } #[doc = "Slice 1 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1ss { +pub enum S1SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1ss) -> Self { + fn from(variant: S1SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] -pub type S1ssR = crate::BitReader; -impl S1ssR { +pub type S1SS_R = crate::BitReader; +impl S1SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1ss { + pub const fn variant(&self) -> S1SS_A { match self.bits { - false => S1ss::Value1, - true => S1ss::Value2, + false => S1SS_A::VALUE1, + true => S1SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1ss::Value1 + *self == S1SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1ss::Value2 + *self == S1SS_A::VALUE2 } } #[doc = "Slice 1 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1dss { +pub enum S1DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1dss) -> Self { + fn from(variant: S1DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] -pub type S1dssR = crate::BitReader; -impl S1dssR { +pub type S1DSS_R = crate::BitReader; +impl S1DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1dss { + pub const fn variant(&self) -> S1DSS_A { match self.bits { - false => S1dss::Value1, - true => S1dss::Value2, + false => S1DSS_A::VALUE1, + true => S1DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1dss::Value1 + *self == S1DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1dss::Value2 + *self == S1DSS_A::VALUE2 } } #[doc = "Slice 1 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1pss { +pub enum S1PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1pss) -> Self { + fn from(variant: S1PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] -pub type S1pssR = crate::BitReader; -impl S1pssR { +pub type S1PSS_R = crate::BitReader; +impl S1PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1pss { + pub const fn variant(&self) -> S1PSS_A { match self.bits { - false => S1pss::Value1, - true => S1pss::Value2, + false => S1PSS_A::VALUE1, + true => S1PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1pss::Value1 + *self == S1PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1pss::Value2 + *self == S1PSS_A::VALUE2 } } #[doc = "Slice 2 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2ss { +pub enum S2SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2ss) -> Self { + fn from(variant: S2SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] -pub type S2ssR = crate::BitReader; -impl S2ssR { +pub type S2SS_R = crate::BitReader; +impl S2SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2ss { + pub const fn variant(&self) -> S2SS_A { match self.bits { - false => S2ss::Value1, - true => S2ss::Value2, + false => S2SS_A::VALUE1, + true => S2SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2ss::Value1 + *self == S2SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2ss::Value2 + *self == S2SS_A::VALUE2 } } #[doc = "Slice 2 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2dss { +pub enum S2DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2dss) -> Self { + fn from(variant: S2DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] -pub type S2dssR = crate::BitReader; -impl S2dssR { +pub type S2DSS_R = crate::BitReader; +impl S2DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2dss { + pub const fn variant(&self) -> S2DSS_A { match self.bits { - false => S2dss::Value1, - true => S2dss::Value2, + false => S2DSS_A::VALUE1, + true => S2DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2dss::Value1 + *self == S2DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2dss::Value2 + *self == S2DSS_A::VALUE2 } } #[doc = "Slice 2 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2pss { +pub enum S2PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2pss) -> Self { + fn from(variant: S2PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] -pub type S2pssR = crate::BitReader; -impl S2pssR { +pub type S2PSS_R = crate::BitReader; +impl S2PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2pss { + pub const fn variant(&self) -> S2PSS_A { match self.bits { - false => S2pss::Value1, - true => S2pss::Value2, + false => S2PSS_A::VALUE1, + true => S2PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2pss::Value1 + *self == S2PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2pss::Value2 + *self == S2PSS_A::VALUE2 } } #[doc = "Slice 3 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3ss { +pub enum S3SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3ss) -> Self { + fn from(variant: S3SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] -pub type S3ssR = crate::BitReader; -impl S3ssR { +pub type S3SS_R = crate::BitReader; +impl S3SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3ss { + pub const fn variant(&self) -> S3SS_A { match self.bits { - false => S3ss::Value1, - true => S3ss::Value2, + false => S3SS_A::VALUE1, + true => S3SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3ss::Value1 + *self == S3SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3ss::Value2 + *self == S3SS_A::VALUE2 } } #[doc = "Slice 3 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3dss { +pub enum S3DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3dss) -> Self { + fn from(variant: S3DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] -pub type S3dssR = crate::BitReader; -impl S3dssR { +pub type S3DSS_R = crate::BitReader; +impl S3DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3dss { + pub const fn variant(&self) -> S3DSS_A { match self.bits { - false => S3dss::Value1, - true => S3dss::Value2, + false => S3DSS_A::VALUE1, + true => S3DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3dss::Value1 + *self == S3DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3dss::Value2 + *self == S3DSS_A::VALUE2 } } #[doc = "Slice 3 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3pss { +pub enum S3PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3pss) -> Self { + fn from(variant: S3PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] -pub type S3pssR = crate::BitReader; -impl S3pssR { +pub type S3PSS_R = crate::BitReader; +impl S3PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3pss { + pub const fn variant(&self) -> S3PSS_A { match self.bits { - false => S3pss::Value1, - true => S3pss::Value2, + false => S3PSS_A::VALUE1, + true => S3PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3pss::Value1 + *self == S3PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3pss::Value2 + *self == S3PSS_A::VALUE2 } } #[doc = "Field `CC40ST` reader - Slice 0 status bit"] -pub type Cc40stR = crate::BitReader; +pub type CC40ST_R = crate::BitReader; #[doc = "Field `CC41ST` reader - Slice 1 status bit"] -pub type Cc41stR = crate::BitReader; +pub type CC41ST_R = crate::BitReader; #[doc = "Field `CC42ST` reader - Slice 2 status bit"] -pub type Cc42stR = crate::BitReader; +pub type CC42ST_R = crate::BitReader; #[doc = "Field `CC43ST` reader - Slice 3 status bit"] -pub type Cc43stR = crate::BitReader; +pub type CC43ST_R = crate::BitReader; impl R { #[doc = "Bit 0 - Slice 0 shadow transfer status"] #[inline(always)] - pub fn s0ss(&self) -> S0ssR { - S0ssR::new((self.bits & 1) != 0) + pub fn s0ss(&self) -> S0SS_R { + S0SS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer status"] #[inline(always)] - pub fn s0dss(&self) -> S0dssR { - S0dssR::new(((self.bits >> 1) & 1) != 0) + pub fn s0dss(&self) -> S0DSS_R { + S0DSS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer status"] #[inline(always)] - pub fn s0pss(&self) -> S0pssR { - S0pssR::new(((self.bits >> 2) & 1) != 0) + pub fn s0pss(&self) -> S0PSS_R { + S0PSS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Slice 1 shadow transfer status"] #[inline(always)] - pub fn s1ss(&self) -> S1ssR { - S1ssR::new(((self.bits >> 4) & 1) != 0) + pub fn s1ss(&self) -> S1SS_R { + S1SS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer status"] #[inline(always)] - pub fn s1dss(&self) -> S1dssR { - S1dssR::new(((self.bits >> 5) & 1) != 0) + pub fn s1dss(&self) -> S1DSS_R { + S1DSS_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer status"] #[inline(always)] - pub fn s1pss(&self) -> S1pssR { - S1pssR::new(((self.bits >> 6) & 1) != 0) + pub fn s1pss(&self) -> S1PSS_R { + S1PSS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Slice 2 shadow transfer status"] #[inline(always)] - pub fn s2ss(&self) -> S2ssR { - S2ssR::new(((self.bits >> 8) & 1) != 0) + pub fn s2ss(&self) -> S2SS_R { + S2SS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer status"] #[inline(always)] - pub fn s2dss(&self) -> S2dssR { - S2dssR::new(((self.bits >> 9) & 1) != 0) + pub fn s2dss(&self) -> S2DSS_R { + S2DSS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer status"] #[inline(always)] - pub fn s2pss(&self) -> S2pssR { - S2pssR::new(((self.bits >> 10) & 1) != 0) + pub fn s2pss(&self) -> S2PSS_R { + S2PSS_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Slice 3 shadow transfer status"] #[inline(always)] - pub fn s3ss(&self) -> S3ssR { - S3ssR::new(((self.bits >> 12) & 1) != 0) + pub fn s3ss(&self) -> S3SS_R { + S3SS_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer status"] #[inline(always)] - pub fn s3dss(&self) -> S3dssR { - S3dssR::new(((self.bits >> 13) & 1) != 0) + pub fn s3dss(&self) -> S3DSS_R { + S3DSS_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer status"] #[inline(always)] - pub fn s3pss(&self) -> S3pssR { - S3pssR::new(((self.bits >> 14) & 1) != 0) + pub fn s3pss(&self) -> S3PSS_R { + S3PSS_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Slice 0 status bit"] #[inline(always)] - pub fn cc40st(&self) -> Cc40stR { - Cc40stR::new(((self.bits >> 16) & 1) != 0) + pub fn cc40st(&self) -> CC40ST_R { + CC40ST_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Slice 1 status bit"] #[inline(always)] - pub fn cc41st(&self) -> Cc41stR { - Cc41stR::new(((self.bits >> 17) & 1) != 0) + pub fn cc41st(&self) -> CC41ST_R { + CC41ST_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Slice 2 status bit"] #[inline(always)] - pub fn cc42st(&self) -> Cc42stR { - Cc42stR::new(((self.bits >> 18) & 1) != 0) + pub fn cc42st(&self) -> CC42ST_R { + CC42ST_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Slice 3 status bit"] #[inline(always)] - pub fn cc43st(&self) -> Cc43stR { - Cc43stR::new(((self.bits >> 19) & 1) != 0) + pub fn cc43st(&self) -> CC43ST_R { + CC43ST_R::new(((self.bits >> 19) & 1) != 0) } } #[doc = "Global Channel Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcstSpec; -impl crate::RegisterSpec for GcstSpec { +pub struct GCST_SPEC; +impl crate::RegisterSpec for GCST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gcst::R`](R) reader structure"] -impl crate::Readable for GcstSpec {} +impl crate::Readable for GCST_SPEC {} #[doc = "`reset()` method sets GCST to value 0"] -impl crate::Resettable for GcstSpec { +impl crate::Resettable for GCST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gctrl.rs b/src/ccu40/gctrl.rs index 234c89f1..f18411eb 100644 --- a/src/ccu40/gctrl.rs +++ b/src/ccu40/gctrl.rs @@ -1,76 +1,76 @@ #[doc = "Register `GCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Prescaler Clear Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Prbc { +pub enum PRBC_A { #[doc = "0: SW only"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] - Value5 = 4, + VALUE5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Prbc) -> Self { + fn from(variant: PRBC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Prbc { +impl crate::FieldSpec for PRBC_A { type Ux = u8; } -impl crate::IsEnum for Prbc {} +impl crate::IsEnum for PRBC_A {} #[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] -pub type PrbcR = crate::FieldReader; -impl PrbcR { +pub type PRBC_R = crate::FieldReader; +impl PRBC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Prbc::Value1), - 1 => Some(Prbc::Value2), - 2 => Some(Prbc::Value3), - 3 => Some(Prbc::Value4), - 4 => Some(Prbc::Value5), + 0 => Some(PRBC_A::VALUE1), + 1 => Some(PRBC_A::VALUE2), + 2 => Some(PRBC_A::VALUE3), + 3 => Some(PRBC_A::VALUE4), + 4 => Some(PRBC_A::VALUE5), _ => None, } } #[doc = "SW only"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prbc::Value1 + *self == PRBC_A::VALUE1 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prbc::Value2 + *self == PRBC_A::VALUE2 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Prbc::Value3 + *self == PRBC_A::VALUE3 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Prbc::Value4 + *self == PRBC_A::VALUE4 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Prbc::Value5 + *self == PRBC_A::VALUE5 } } #[doc = "Field `PRBC` writer - Prescaler Clear Configuration"] -pub type PrbcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prbc>; -impl<'a, REG> PrbcW<'a, REG> +pub type PRBC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PRBC_A>; +impl<'a, REG> PRBC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,90 +78,90 @@ where #[doc = "SW only"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prbc::Value1) + self.variant(PRBC_A::VALUE1) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC40 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prbc::Value2) + self.variant(PRBC_A::VALUE2) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC41 is cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Prbc::Value3) + self.variant(PRBC_A::VALUE3) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC42 is cleared."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Prbc::Value4) + self.variant(PRBC_A::VALUE4) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC43 is cleared."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Prbc::Value5) + self.variant(PRBC_A::VALUE5) } } #[doc = "Prescaler Input Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pcis { +pub enum PCIS_A { #[doc = "0: Module clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU4x.ECLKA"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU4x.ECLKB"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU4x.ECLKC"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pcis) -> Self { + fn from(variant: PCIS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pcis { +impl crate::FieldSpec for PCIS_A { type Ux = u8; } -impl crate::IsEnum for Pcis {} +impl crate::IsEnum for PCIS_A {} #[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] -pub type PcisR = crate::FieldReader; -impl PcisR { +pub type PCIS_R = crate::FieldReader; +impl PCIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcis { + pub const fn variant(&self) -> PCIS_A { match self.bits { - 0 => Pcis::Value1, - 1 => Pcis::Value2, - 2 => Pcis::Value3, - 3 => Pcis::Value4, + 0 => PCIS_A::VALUE1, + 1 => PCIS_A::VALUE2, + 2 => PCIS_A::VALUE3, + 3 => PCIS_A::VALUE4, _ => unreachable!(), } } #[doc = "Module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcis::Value1 + *self == PCIS_A::VALUE1 } #[doc = "CCU4x.ECLKA"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcis::Value2 + *self == PCIS_A::VALUE2 } #[doc = "CCU4x.ECLKB"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pcis::Value3 + *self == PCIS_A::VALUE3 } #[doc = "CCU4x.ECLKC"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pcis::Value4 + *self == PCIS_A::VALUE4 } } #[doc = "Field `PCIS` writer - Prescaler Input Clock Selection"] -pub type PcisW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pcis, crate::Safe>; -impl<'a, REG> PcisW<'a, REG> +pub type PCIS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PCIS_A, crate::Safe>; +impl<'a, REG> PCIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -169,85 +169,85 @@ where #[doc = "Module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcis::Value1) + self.variant(PCIS_A::VALUE1) } #[doc = "CCU4x.ECLKA"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcis::Value2) + self.variant(PCIS_A::VALUE2) } #[doc = "CCU4x.ECLKB"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pcis::Value3) + self.variant(PCIS_A::VALUE3) } #[doc = "CCU4x.ECLKC"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pcis::Value4) + self.variant(PCIS_A::VALUE4) } } #[doc = "Suspend Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Suscfg { +pub enum SUSCFG_A { #[doc = "0: Suspend request ignored. The module never enters in suspend"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stops all the running slices immediately. Safe stop is not applied."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Suscfg) -> Self { + fn from(variant: SUSCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Suscfg { +impl crate::FieldSpec for SUSCFG_A { type Ux = u8; } -impl crate::IsEnum for Suscfg {} +impl crate::IsEnum for SUSCFG_A {} #[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] -pub type SuscfgR = crate::FieldReader; -impl SuscfgR { +pub type SUSCFG_R = crate::FieldReader; +impl SUSCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Suscfg { + pub const fn variant(&self) -> SUSCFG_A { match self.bits { - 0 => Suscfg::Value1, - 1 => Suscfg::Value2, - 2 => Suscfg::Value3, - 3 => Suscfg::Value4, + 0 => SUSCFG_A::VALUE1, + 1 => SUSCFG_A::VALUE2, + 2 => SUSCFG_A::VALUE3, + 3 => SUSCFG_A::VALUE4, _ => unreachable!(), } } #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Suscfg::Value1 + *self == SUSCFG_A::VALUE1 } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Suscfg::Value2 + *self == SUSCFG_A::VALUE2 } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Suscfg::Value3 + *self == SUSCFG_A::VALUE3 } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Suscfg::Value4 + *self == SUSCFG_A::VALUE4 } } #[doc = "Field `SUSCFG` writer - Suspend Mode Configuration"] -pub type SuscfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Suscfg, crate::Safe>; -impl<'a, REG> SuscfgW<'a, REG> +pub type SUSCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SUSCFG_A, crate::Safe>; +impl<'a, REG> SUSCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -255,289 +255,289 @@ where #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Suscfg::Value1) + self.variant(SUSCFG_A::VALUE1) } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Suscfg::Value2) + self.variant(SUSCFG_A::VALUE2) } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Suscfg::Value3) + self.variant(SUSCFG_A::VALUE3) } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Suscfg::Value4) + self.variant(SUSCFG_A::VALUE4) } } #[doc = "Slice 0 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse0 { +pub enum MSE0_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse0) -> Self { + fn from(variant: MSE0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] -pub type Mse0R = crate::BitReader; -impl Mse0R { +pub type MSE0_R = crate::BitReader; +impl MSE0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse0 { + pub const fn variant(&self) -> MSE0_A { match self.bits { - false => Mse0::Value1, - true => Mse0::Value2, + false => MSE0_A::VALUE1, + true => MSE0_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse0::Value1 + *self == MSE0_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse0::Value2 + *self == MSE0_A::VALUE2 } } #[doc = "Field `MSE0` writer - Slice 0 Multi Channel shadow transfer enable"] -pub type Mse0W<'a, REG> = crate::BitWriter<'a, REG, Mse0>; -impl<'a, REG> Mse0W<'a, REG> +pub type MSE0_W<'a, REG> = crate::BitWriter<'a, REG, MSE0_A>; +impl<'a, REG> MSE0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse0::Value1) + self.variant(MSE0_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse0::Value2) + self.variant(MSE0_A::VALUE2) } } #[doc = "Slice 1 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse1 { +pub enum MSE1_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse1) -> Self { + fn from(variant: MSE1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] -pub type Mse1R = crate::BitReader; -impl Mse1R { +pub type MSE1_R = crate::BitReader; +impl MSE1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse1 { + pub const fn variant(&self) -> MSE1_A { match self.bits { - false => Mse1::Value1, - true => Mse1::Value2, + false => MSE1_A::VALUE1, + true => MSE1_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse1::Value1 + *self == MSE1_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse1::Value2 + *self == MSE1_A::VALUE2 } } #[doc = "Field `MSE1` writer - Slice 1 Multi Channel shadow transfer enable"] -pub type Mse1W<'a, REG> = crate::BitWriter<'a, REG, Mse1>; -impl<'a, REG> Mse1W<'a, REG> +pub type MSE1_W<'a, REG> = crate::BitWriter<'a, REG, MSE1_A>; +impl<'a, REG> MSE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse1::Value1) + self.variant(MSE1_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse1::Value2) + self.variant(MSE1_A::VALUE2) } } #[doc = "Slice 2 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse2 { +pub enum MSE2_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse2) -> Self { + fn from(variant: MSE2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] -pub type Mse2R = crate::BitReader; -impl Mse2R { +pub type MSE2_R = crate::BitReader; +impl MSE2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse2 { + pub const fn variant(&self) -> MSE2_A { match self.bits { - false => Mse2::Value1, - true => Mse2::Value2, + false => MSE2_A::VALUE1, + true => MSE2_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse2::Value1 + *self == MSE2_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse2::Value2 + *self == MSE2_A::VALUE2 } } #[doc = "Field `MSE2` writer - Slice 2 Multi Channel shadow transfer enable"] -pub type Mse2W<'a, REG> = crate::BitWriter<'a, REG, Mse2>; -impl<'a, REG> Mse2W<'a, REG> +pub type MSE2_W<'a, REG> = crate::BitWriter<'a, REG, MSE2_A>; +impl<'a, REG> MSE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse2::Value1) + self.variant(MSE2_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse2::Value2) + self.variant(MSE2_A::VALUE2) } } #[doc = "Slice 3 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse3 { +pub enum MSE3_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse3) -> Self { + fn from(variant: MSE3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] -pub type Mse3R = crate::BitReader; -impl Mse3R { +pub type MSE3_R = crate::BitReader; +impl MSE3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse3 { + pub const fn variant(&self) -> MSE3_A { match self.bits { - false => Mse3::Value1, - true => Mse3::Value2, + false => MSE3_A::VALUE1, + true => MSE3_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse3::Value1 + *self == MSE3_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse3::Value2 + *self == MSE3_A::VALUE2 } } #[doc = "Field `MSE3` writer - Slice 3 Multi Channel shadow transfer enable"] -pub type Mse3W<'a, REG> = crate::BitWriter<'a, REG, Mse3>; -impl<'a, REG> Mse3W<'a, REG> +pub type MSE3_W<'a, REG> = crate::BitWriter<'a, REG, MSE3_A>; +impl<'a, REG> MSE3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse3::Value1) + self.variant(MSE3_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU4x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse3::Value2) + self.variant(MSE3_A::VALUE2) } } #[doc = "Multi Channel shadow transfer request configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Msde { +pub enum MSDE_A { #[doc = "0: Only the shadow transfer for period and compare values is requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer for the compare, period and prescaler compare values is requested"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: Shadow transfer for the compare, period, prescaler and dither compare values is requested"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Msde) -> Self { + fn from(variant: MSDE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Msde { +impl crate::FieldSpec for MSDE_A { type Ux = u8; } -impl crate::IsEnum for Msde {} +impl crate::IsEnum for MSDE_A {} #[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] -pub type MsdeR = crate::FieldReader; -impl MsdeR { +pub type MSDE_R = crate::FieldReader; +impl MSDE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Msde::Value1), - 1 => Some(Msde::Value2), - 3 => Some(Msde::Value4), + 0 => Some(MSDE_A::VALUE1), + 1 => Some(MSDE_A::VALUE2), + 3 => Some(MSDE_A::VALUE4), _ => None, } } #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msde::Value1 + *self == MSDE_A::VALUE1 } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msde::Value2 + *self == MSDE_A::VALUE2 } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Msde::Value4 + *self == MSDE_A::VALUE4 } } #[doc = "Field `MSDE` writer - Multi Channel shadow transfer request configuration"] -pub type MsdeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msde>; -impl<'a, REG> MsdeW<'a, REG> +pub type MSDE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSDE_A>; +impl<'a, REG> MSDE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -545,125 +545,125 @@ where #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msde::Value1) + self.variant(MSDE_A::VALUE1) } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msde::Value2) + self.variant(MSDE_A::VALUE2) } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Msde::Value4) + self.variant(MSDE_A::VALUE4) } } impl R { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - pub fn prbc(&self) -> PrbcR { - PrbcR::new((self.bits & 7) as u8) + pub fn prbc(&self) -> PRBC_R { + PRBC_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - pub fn pcis(&self) -> PcisR { - PcisR::new(((self.bits >> 4) & 3) as u8) + pub fn pcis(&self) -> PCIS_R { + PCIS_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SuscfgR { - SuscfgR::new(((self.bits >> 8) & 3) as u8) + pub fn suscfg(&self) -> SUSCFG_R { + SUSCFG_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse0(&self) -> Mse0R { - Mse0R::new(((self.bits >> 10) & 1) != 0) + pub fn mse0(&self) -> MSE0_R { + MSE0_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse1(&self) -> Mse1R { - Mse1R::new(((self.bits >> 11) & 1) != 0) + pub fn mse1(&self) -> MSE1_R { + MSE1_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse2(&self) -> Mse2R { - Mse2R::new(((self.bits >> 12) & 1) != 0) + pub fn mse2(&self) -> MSE2_R { + MSE2_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse3(&self) -> Mse3R { - Mse3R::new(((self.bits >> 13) & 1) != 0) + pub fn mse3(&self) -> MSE3_R { + MSE3_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - pub fn msde(&self) -> MsdeR { - MsdeR::new(((self.bits >> 14) & 3) as u8) + pub fn msde(&self) -> MSDE_R { + MSDE_R::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] #[must_use] - pub fn prbc(&mut self) -> PrbcW { - PrbcW::new(self, 0) + pub fn prbc(&mut self) -> PRBC_W { + PRBC_W::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] #[must_use] - pub fn pcis(&mut self) -> PcisW { - PcisW::new(self, 4) + pub fn pcis(&mut self) -> PCIS_W { + PCIS_W::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SuscfgW { - SuscfgW::new(self, 8) + pub fn suscfg(&mut self) -> SUSCFG_W { + SUSCFG_W::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse0(&mut self) -> Mse0W { - Mse0W::new(self, 10) + pub fn mse0(&mut self) -> MSE0_W { + MSE0_W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse1(&mut self) -> Mse1W { - Mse1W::new(self, 11) + pub fn mse1(&mut self) -> MSE1_W { + MSE1_W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse2(&mut self) -> Mse2W { - Mse2W::new(self, 12) + pub fn mse2(&mut self) -> MSE2_W { + MSE2_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse3(&mut self) -> Mse3W { - Mse3W::new(self, 13) + pub fn mse3(&mut self) -> MSE3_W { + MSE3_W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] #[must_use] - pub fn msde(&mut self) -> MsdeW { - MsdeW::new(self, 14) + pub fn msde(&mut self) -> MSDE_W { + MSDE_W::new(self, 14) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GctrlSpec; -impl crate::RegisterSpec for GctrlSpec { +pub struct GCTRL_SPEC; +impl crate::RegisterSpec for GCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gctrl::R`](R) reader structure"] -impl crate::Readable for GctrlSpec {} +impl crate::Readable for GCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`gctrl::W`](W) writer structure"] -impl crate::Writable for GctrlSpec { +impl crate::Writable for GCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCTRL to value 0"] -impl crate::Resettable for GctrlSpec { +impl crate::Resettable for GCTRL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gidlc.rs b/src/ccu40/gidlc.rs index 96192cd3..ebf8731f 100644 --- a/src/ccu40/gidlc.rs +++ b/src/ccu40/gidlc.rs @@ -1,59 +1,59 @@ #[doc = "Register `GIDLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CS0I` writer - CC40 IDLE mode clear"] -pub type Cs0iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS0I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS1I` writer - CC41 IDLE mode clear"] -pub type Cs1iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS1I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS2I` writer - CC42 IDLE mode clear"] -pub type Cs2iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS2I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS3I` writer - CC43 IDLE mode clear"] -pub type Cs3iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS3I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPRB` writer - Prescaler Run Bit Set"] -pub type SprbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs0i(&mut self) -> Cs0iW { - Cs0iW::new(self, 0) + pub fn cs0i(&mut self) -> CS0I_W { + CS0I_W::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs1i(&mut self) -> Cs1iW { - Cs1iW::new(self, 1) + pub fn cs1i(&mut self) -> CS1I_W { + CS1I_W::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs2i(&mut self) -> Cs2iW { - Cs2iW::new(self, 2) + pub fn cs2i(&mut self) -> CS2I_W { + CS2I_W::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs3i(&mut self) -> Cs3iW { - Cs3iW::new(self, 3) + pub fn cs3i(&mut self) -> CS3I_W { + CS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] #[must_use] - pub fn sprb(&mut self) -> SprbW { - SprbW::new(self, 8) + pub fn sprb(&mut self) -> SPRB_W { + SPRB_W::new(self, 8) } } #[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GidlcSpec; -impl crate::RegisterSpec for GidlcSpec { +pub struct GIDLC_SPEC; +impl crate::RegisterSpec for GIDLC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidlc::W`](W) writer structure"] -impl crate::Writable for GidlcSpec { +impl crate::Writable for GIDLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLC to value 0"] -impl crate::Resettable for GidlcSpec { +impl crate::Resettable for GIDLC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gidls.rs b/src/ccu40/gidls.rs index 54ec83e0..ac66911f 100644 --- a/src/ccu40/gidls.rs +++ b/src/ccu40/gidls.rs @@ -1,67 +1,67 @@ #[doc = "Register `GIDLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SS0I` writer - CC40 IDLE mode set"] -pub type Ss0iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS0I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS1I` writer - CC41 IDLE mode set"] -pub type Ss1iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS1I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS2I` writer - CC42 IDLE mode set"] -pub type Ss2iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS2I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS3I` writer - CC43 IDLE mode set"] -pub type Ss3iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS3I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPRB` writer - Prescaler Run Bit Clear"] -pub type CprbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CPRB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSIC` writer - Prescaler clear"] -pub type PsicW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss0i(&mut self) -> Ss0iW { - Ss0iW::new(self, 0) + pub fn ss0i(&mut self) -> SS0I_W { + SS0I_W::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss1i(&mut self) -> Ss1iW { - Ss1iW::new(self, 1) + pub fn ss1i(&mut self) -> SS1I_W { + SS1I_W::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss2i(&mut self) -> Ss2iW { - Ss2iW::new(self, 2) + pub fn ss2i(&mut self) -> SS2I_W { + SS2I_W::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss3i(&mut self) -> Ss3iW { - Ss3iW::new(self, 3) + pub fn ss3i(&mut self) -> SS3I_W { + SS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Clear"] #[inline(always)] #[must_use] - pub fn cprb(&mut self) -> CprbW { - CprbW::new(self, 8) + pub fn cprb(&mut self) -> CPRB_W { + CPRB_W::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] #[must_use] - pub fn psic(&mut self) -> PsicW { - PsicW::new(self, 9) + pub fn psic(&mut self) -> PSIC_W { + PSIC_W::new(self, 9) } } #[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GidlsSpec; -impl crate::RegisterSpec for GidlsSpec { +pub struct GIDLS_SPEC; +impl crate::RegisterSpec for GIDLS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidls::W`](W) writer structure"] -impl crate::Writable for GidlsSpec { +impl crate::Writable for GIDLS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLS to value 0"] -impl crate::Resettable for GidlsSpec { +impl crate::Resettable for GIDLS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40/gstat.rs b/src/ccu40/gstat.rs index fbf2c485..6d3a25e3 100644 --- a/src/ccu40/gstat.rs +++ b/src/ccu40/gstat.rs @@ -1,220 +1,220 @@ #[doc = "Register `GSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "CC40 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0i { +pub enum S0I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0i) -> Self { + fn from(variant: S0I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0I` reader - CC40 IDLE status"] -pub type S0iR = crate::BitReader; -impl S0iR { +pub type S0I_R = crate::BitReader; +impl S0I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0i { + pub const fn variant(&self) -> S0I_A { match self.bits { - false => S0i::Value1, - true => S0i::Value2, + false => S0I_A::VALUE1, + true => S0I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0i::Value1 + *self == S0I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0i::Value2 + *self == S0I_A::VALUE2 } } #[doc = "CC41 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1i { +pub enum S1I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1i) -> Self { + fn from(variant: S1I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1I` reader - CC41 IDLE status"] -pub type S1iR = crate::BitReader; -impl S1iR { +pub type S1I_R = crate::BitReader; +impl S1I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1i { + pub const fn variant(&self) -> S1I_A { match self.bits { - false => S1i::Value1, - true => S1i::Value2, + false => S1I_A::VALUE1, + true => S1I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1i::Value1 + *self == S1I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1i::Value2 + *self == S1I_A::VALUE2 } } #[doc = "CC42 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2i { +pub enum S2I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2i) -> Self { + fn from(variant: S2I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2I` reader - CC42 IDLE status"] -pub type S2iR = crate::BitReader; -impl S2iR { +pub type S2I_R = crate::BitReader; +impl S2I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2i { + pub const fn variant(&self) -> S2I_A { match self.bits { - false => S2i::Value1, - true => S2i::Value2, + false => S2I_A::VALUE1, + true => S2I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2i::Value1 + *self == S2I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2i::Value2 + *self == S2I_A::VALUE2 } } #[doc = "CC43 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3i { +pub enum S3I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3i) -> Self { + fn from(variant: S3I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3I` reader - CC43 IDLE status"] -pub type S3iR = crate::BitReader; -impl S3iR { +pub type S3I_R = crate::BitReader; +impl S3I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3i { + pub const fn variant(&self) -> S3I_A { match self.bits { - false => S3i::Value1, - true => S3i::Value2, + false => S3I_A::VALUE1, + true => S3I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3i::Value1 + *self == S3I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3i::Value2 + *self == S3I_A::VALUE2 } } #[doc = "Prescaler Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prb { +pub enum PRB_A { #[doc = "0: Prescaler is stopped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prb) -> Self { + fn from(variant: PRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRB` reader - Prescaler Run Bit"] -pub type PrbR = crate::BitReader; -impl PrbR { +pub type PRB_R = crate::BitReader; +impl PRB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prb { + pub const fn variant(&self) -> PRB_A { match self.bits { - false => Prb::Value1, - true => Prb::Value2, + false => PRB_A::VALUE1, + true => PRB_A::VALUE2, } } #[doc = "Prescaler is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prb::Value1 + *self == PRB_A::VALUE1 } #[doc = "Prescaler is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prb::Value2 + *self == PRB_A::VALUE2 } } impl R { #[doc = "Bit 0 - CC40 IDLE status"] #[inline(always)] - pub fn s0i(&self) -> S0iR { - S0iR::new((self.bits & 1) != 0) + pub fn s0i(&self) -> S0I_R { + S0I_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC41 IDLE status"] #[inline(always)] - pub fn s1i(&self) -> S1iR { - S1iR::new(((self.bits >> 1) & 1) != 0) + pub fn s1i(&self) -> S1I_R { + S1I_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC42 IDLE status"] #[inline(always)] - pub fn s2i(&self) -> S2iR { - S2iR::new(((self.bits >> 2) & 1) != 0) + pub fn s2i(&self) -> S2I_R { + S2I_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CC43 IDLE status"] #[inline(always)] - pub fn s3i(&self) -> S3iR { - S3iR::new(((self.bits >> 3) & 1) != 0) + pub fn s3i(&self) -> S3I_R { + S3I_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Prescaler Run Bit"] #[inline(always)] - pub fn prb(&self) -> PrbR { - PrbR::new(((self.bits >> 8) & 1) != 0) + pub fn prb(&self) -> PRB_R { + PRB_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GstatSpec; -impl crate::RegisterSpec for GstatSpec { +pub struct GSTAT_SPEC; +impl crate::RegisterSpec for GSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gstat::R`](R) reader structure"] -impl crate::Readable for GstatSpec {} +impl crate::Readable for GSTAT_SPEC {} #[doc = "`reset()` method sets GSTAT to value 0x0f"] -impl crate::Resettable for GstatSpec { +impl crate::Resettable for GSTAT_SPEC { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/ccu40/midr.rs b/src/ccu40/midr.rs index 956cd55f..a00c3cf8 100644 --- a/src/ccu40/midr.rs +++ b/src/ccu40/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type ModrR = crate::FieldReader; +pub type MODR_R = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type ModtR = crate::FieldReader; +pub type MODT_R = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type ModnR = crate::FieldReader; +pub type MODN_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> ModrR { - ModrR::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> MODR_R { + MODR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> ModtR { - ModtR::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> MODT_R { + MODT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> ModnR { - ModnR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> MODN_R { + MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MidrSpec; -impl crate::RegisterSpec for MidrSpec { +pub struct MIDR_SPEC; +impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MidrSpec {} +impl crate::Readable for MIDR_SPEC {} #[doc = "`reset()` method sets MIDR to value 0x00a6_c000"] -impl crate::Resettable for MidrSpec { +impl crate::Resettable for MIDR_SPEC { const RESET_VALUE: u32 = 0x00a6_c000; } diff --git a/src/ccu40_cc40.rs b/src/ccu40_cc40.rs index f00b6449..ec8440c5 100644 --- a/src/ccu40_cc40.rs +++ b/src/ccu40_cc40.rs @@ -1,320 +1,294 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - ins: Ins, - cmc: Cmc, - tcst: Tcst, - tcset: Tcset, - tcclr: Tcclr, - tc: Tc, - psl: Psl, - dit: Dit, - dits: Dits, - psc: Psc, - fpc: Fpc, - fpcs: Fpcs, - pr: Pr, - prs: Prs, - cr: Cr, - crs: Crs, + ins: INS, + cmc: CMC, + tcst: TCST, + tcset: TCSET, + tcclr: TCCLR, + tc: TC, + psl: PSL, + dit: DIT, + dits: DITS, + psc: PSC, + fpc: FPC, + fpcs: FPCS, + pr: PR, + prs: PRS, + cr: CR, + crs: CRS, _reserved16: [u8; 0x30], - timer: Timer, - c0v: C0v, - c1v: C1v, - c2v: C2v, - c3v: C3v, + timer: TIMER, + c0v: C0V, + c1v: C1V, + c2v: C2V, + c3v: C3V, _reserved21: [u8; 0x1c], - ints: Ints, - inte: Inte, - srs: Srs, - sws: Sws, - swr: Swr, + ints: INTS, + inte: INTE, + srs: SRS, + sws: SWS, + swr: SWR, } impl RegisterBlock { #[doc = "0x00 - Input Selector Configuration"] #[inline(always)] - pub const fn ins(&self) -> &Ins { + pub const fn ins(&self) -> &INS { &self.ins } #[doc = "0x04 - Connection Matrix Control"] #[inline(always)] - pub const fn cmc(&self) -> &Cmc { + pub const fn cmc(&self) -> &CMC { &self.cmc } #[doc = "0x08 - Slice Timer Status"] #[inline(always)] - pub const fn tcst(&self) -> &Tcst { + pub const fn tcst(&self) -> &TCST { &self.tcst } #[doc = "0x0c - Slice Timer Run Set"] #[inline(always)] - pub const fn tcset(&self) -> &Tcset { + pub const fn tcset(&self) -> &TCSET { &self.tcset } #[doc = "0x10 - Slice Timer Clear"] #[inline(always)] - pub const fn tcclr(&self) -> &Tcclr { + pub const fn tcclr(&self) -> &TCCLR { &self.tcclr } #[doc = "0x14 - Slice Timer Control"] #[inline(always)] - pub const fn tc(&self) -> &Tc { + pub const fn tc(&self) -> &TC { &self.tc } #[doc = "0x18 - Passive Level Config"] #[inline(always)] - pub const fn psl(&self) -> &Psl { + pub const fn psl(&self) -> &PSL { &self.psl } #[doc = "0x1c - Dither Config"] #[inline(always)] - pub const fn dit(&self) -> &Dit { + pub const fn dit(&self) -> &DIT { &self.dit } #[doc = "0x20 - Dither Shadow Register"] #[inline(always)] - pub const fn dits(&self) -> &Dits { + pub const fn dits(&self) -> &DITS { &self.dits } #[doc = "0x24 - Prescaler Control"] #[inline(always)] - pub const fn psc(&self) -> &Psc { + pub const fn psc(&self) -> &PSC { &self.psc } #[doc = "0x28 - Floating Prescaler Control"] #[inline(always)] - pub const fn fpc(&self) -> &Fpc { + pub const fn fpc(&self) -> &FPC { &self.fpc } #[doc = "0x2c - Floating Prescaler Shadow"] #[inline(always)] - pub const fn fpcs(&self) -> &Fpcs { + pub const fn fpcs(&self) -> &FPCS { &self.fpcs } #[doc = "0x30 - Timer Period Value"] #[inline(always)] - pub const fn pr(&self) -> &Pr { + pub const fn pr(&self) -> &PR { &self.pr } #[doc = "0x34 - Timer Shadow Period Value"] #[inline(always)] - pub const fn prs(&self) -> &Prs { + pub const fn prs(&self) -> &PRS { &self.prs } #[doc = "0x38 - Timer Compare Value"] #[inline(always)] - pub const fn cr(&self) -> &Cr { + pub const fn cr(&self) -> &CR { &self.cr } #[doc = "0x3c - Timer Shadow Compare Value"] #[inline(always)] - pub const fn crs(&self) -> &Crs { + pub const fn crs(&self) -> &CRS { &self.crs } #[doc = "0x70 - Timer Value"] #[inline(always)] - pub const fn timer(&self) -> &Timer { + pub const fn timer(&self) -> &TIMER { &self.timer } #[doc = "0x74 - Capture Register 0"] #[inline(always)] - pub const fn c0v(&self) -> &C0v { + pub const fn c0v(&self) -> &C0V { &self.c0v } #[doc = "0x78 - Capture Register 1"] #[inline(always)] - pub const fn c1v(&self) -> &C1v { + pub const fn c1v(&self) -> &C1V { &self.c1v } #[doc = "0x7c - Capture Register 2"] #[inline(always)] - pub const fn c2v(&self) -> &C2v { + pub const fn c2v(&self) -> &C2V { &self.c2v } #[doc = "0x80 - Capture Register 3"] #[inline(always)] - pub const fn c3v(&self) -> &C3v { + pub const fn c3v(&self) -> &C3V { &self.c3v } #[doc = "0xa0 - Interrupt Status"] #[inline(always)] - pub const fn ints(&self) -> &Ints { + pub const fn ints(&self) -> &INTS { &self.ints } #[doc = "0xa4 - Interrupt Enable Control"] #[inline(always)] - pub const fn inte(&self) -> &Inte { + pub const fn inte(&self) -> &INTE { &self.inte } #[doc = "0xa8 - Service Request Selector"] #[inline(always)] - pub const fn srs(&self) -> &Srs { + pub const fn srs(&self) -> &SRS { &self.srs } #[doc = "0xac - Interrupt Status Set"] #[inline(always)] - pub const fn sws(&self) -> &Sws { + pub const fn sws(&self) -> &SWS { &self.sws } #[doc = "0xb0 - Interrupt Status Clear"] #[inline(always)] - pub const fn swr(&self) -> &Swr { + pub const fn swr(&self) -> &SWR { &self.swr } } #[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] -#[doc(alias = "INS")] -pub type Ins = crate::Reg; +pub type INS = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; #[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] -#[doc(alias = "CMC")] -pub type Cmc = crate::Reg; +pub type CMC = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; #[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] -#[doc(alias = "TCST")] -pub type Tcst = crate::Reg; +pub type TCST = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; #[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] -#[doc(alias = "TCSET")] -pub type Tcset = crate::Reg; +pub type TCSET = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; #[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] -#[doc(alias = "TCCLR")] -pub type Tcclr = crate::Reg; +pub type TCCLR = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; #[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] -#[doc(alias = "TC")] -pub type Tc = crate::Reg; +pub type TC = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; #[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] -#[doc(alias = "PSL")] -pub type Psl = crate::Reg; +pub type PSL = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; #[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] -#[doc(alias = "DIT")] -pub type Dit = crate::Reg; +pub type DIT = crate::Reg; #[doc = "Dither Config"] pub mod dit; #[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] -#[doc(alias = "DITS")] -pub type Dits = crate::Reg; +pub type DITS = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; #[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] -#[doc(alias = "PSC")] -pub type Psc = crate::Reg; +pub type PSC = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; #[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] -#[doc(alias = "FPC")] -pub type Fpc = crate::Reg; +pub type FPC = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; #[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] -#[doc(alias = "FPCS")] -pub type Fpcs = crate::Reg; +pub type FPCS = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; #[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] -#[doc(alias = "PR")] -pub type Pr = crate::Reg; +pub type PR = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; #[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] -#[doc(alias = "PRS")] -pub type Prs = crate::Reg; +pub type PRS = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; #[doc = "CR (r) register accessor: Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`] module"] -#[doc(alias = "CR")] -pub type Cr = crate::Reg; +pub type CR = crate::Reg; #[doc = "Timer Compare Value"] pub mod cr; #[doc = "CRS (rw) register accessor: Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crs`] module"] -#[doc(alias = "CRS")] -pub type Crs = crate::Reg; +pub type CRS = crate::Reg; #[doc = "Timer Shadow Compare Value"] pub mod crs; #[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] -#[doc(alias = "TIMER")] -pub type Timer = crate::Reg; +pub type TIMER = crate::Reg; #[doc = "Timer Value"] pub mod timer; #[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] module"] -#[doc(alias = "C0V")] -pub type C0v = crate::Reg; +pub type C0V = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; #[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] module"] -#[doc(alias = "C1V")] -pub type C1v = crate::Reg; +pub type C1V = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; #[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] module"] -#[doc(alias = "C2V")] -pub type C2v = crate::Reg; +pub type C2V = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; #[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] module"] -#[doc(alias = "C3V")] -pub type C3v = crate::Reg; +pub type C3V = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; #[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] -#[doc(alias = "INTS")] -pub type Ints = crate::Reg; +pub type INTS = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; #[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] -#[doc(alias = "INTE")] -pub type Inte = crate::Reg; +pub type INTE = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; #[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] -#[doc(alias = "SRS")] -pub type Srs = crate::Reg; +pub type SRS = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; #[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] -#[doc(alias = "SWS")] -pub type Sws = crate::Reg; +pub type SWS = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; #[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] -#[doc(alias = "SWR")] -pub type Swr = crate::Reg; +pub type SWR = crate::Reg; #[doc = "Interrupt Status Clear"] pub mod swr; diff --git a/src/ccu40_cc40/c0v.rs b/src/ccu40_cc40/c0v.rs index 8921e719..220d6022 100644 --- a/src/ccu40_cc40/c0v.rs +++ b/src/ccu40_cc40/c0v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C0V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C0vSpec; -impl crate::RegisterSpec for C0vSpec { +pub struct C0V_SPEC; +impl crate::RegisterSpec for C0V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c0v::R`](R) reader structure"] -impl crate::Readable for C0vSpec {} +impl crate::Readable for C0V_SPEC {} #[doc = "`reset()` method sets C0V to value 0"] -impl crate::Resettable for C0vSpec { +impl crate::Resettable for C0V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c1v.rs b/src/ccu40_cc40/c1v.rs index d7b854ed..19aed9fb 100644 --- a/src/ccu40_cc40/c1v.rs +++ b/src/ccu40_cc40/c1v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C1V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C1vSpec; -impl crate::RegisterSpec for C1vSpec { +pub struct C1V_SPEC; +impl crate::RegisterSpec for C1V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c1v::R`](R) reader structure"] -impl crate::Readable for C1vSpec {} +impl crate::Readable for C1V_SPEC {} #[doc = "`reset()` method sets C1V to value 0"] -impl crate::Resettable for C1vSpec { +impl crate::Resettable for C1V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c2v.rs b/src/ccu40_cc40/c2v.rs index 5b12e99b..e04bb78c 100644 --- a/src/ccu40_cc40/c2v.rs +++ b/src/ccu40_cc40/c2v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C2V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C2vSpec; -impl crate::RegisterSpec for C2vSpec { +pub struct C2V_SPEC; +impl crate::RegisterSpec for C2V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c2v::R`](R) reader structure"] -impl crate::Readable for C2vSpec {} +impl crate::Readable for C2V_SPEC {} #[doc = "`reset()` method sets C2V to value 0"] -impl crate::Resettable for C2vSpec { +impl crate::Resettable for C2V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/c3v.rs b/src/ccu40_cc40/c3v.rs index 32fc268f..c502b769 100644 --- a/src/ccu40_cc40/c3v.rs +++ b/src/ccu40_cc40/c3v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C3V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C3vSpec; -impl crate::RegisterSpec for C3vSpec { +pub struct C3V_SPEC; +impl crate::RegisterSpec for C3V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c3v::R`](R) reader structure"] -impl crate::Readable for C3vSpec {} +impl crate::Readable for C3V_SPEC {} #[doc = "`reset()` method sets C3V to value 0"] -impl crate::Resettable for C3vSpec { +impl crate::Resettable for C3V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/cmc.rs b/src/ccu40_cc40/cmc.rs index 727455ac..cbf59c75 100644 --- a/src/ccu40_cc40/cmc.rs +++ b/src/ccu40_cc40/cmc.rs @@ -1,68 +1,68 @@ #[doc = "Register `CMC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "External Start Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Strts { +pub enum STRTS_A { #[doc = "0: External Start Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Start Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Start Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Start Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Strts) -> Self { + fn from(variant: STRTS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Strts { +impl crate::FieldSpec for STRTS_A { type Ux = u8; } -impl crate::IsEnum for Strts {} +impl crate::IsEnum for STRTS_A {} #[doc = "Field `STRTS` reader - External Start Functionality Selector"] -pub type StrtsR = crate::FieldReader; -impl StrtsR { +pub type STRTS_R = crate::FieldReader; +impl STRTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Strts { + pub const fn variant(&self) -> STRTS_A { match self.bits { - 0 => Strts::Value1, - 1 => Strts::Value2, - 2 => Strts::Value3, - 3 => Strts::Value4, + 0 => STRTS_A::VALUE1, + 1 => STRTS_A::VALUE2, + 2 => STRTS_A::VALUE3, + 3 => STRTS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Start Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Strts::Value1 + *self == STRTS_A::VALUE1 } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Strts::Value2 + *self == STRTS_A::VALUE2 } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Strts::Value3 + *self == STRTS_A::VALUE3 } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Strts::Value4 + *self == STRTS_A::VALUE4 } } #[doc = "Field `STRTS` writer - External Start Functionality Selector"] -pub type StrtsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Strts, crate::Safe>; -impl<'a, REG> StrtsW<'a, REG> +pub type STRTS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STRTS_A, crate::Safe>; +impl<'a, REG> STRTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "External Start Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Strts::Value1) + self.variant(STRTS_A::VALUE1) } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Strts::Value2) + self.variant(STRTS_A::VALUE2) } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Strts::Value3) + self.variant(STRTS_A::VALUE3) } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Strts::Value4) + self.variant(STRTS_A::VALUE4) } } #[doc = "External Stop Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ends { +pub enum ENDS_A { #[doc = "0: External Stop Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Stop Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Stop Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Stop Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ends) -> Self { + fn from(variant: ENDS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ends { +impl crate::FieldSpec for ENDS_A { type Ux = u8; } -impl crate::IsEnum for Ends {} +impl crate::IsEnum for ENDS_A {} #[doc = "Field `ENDS` reader - External Stop Functionality Selector"] -pub type EndsR = crate::FieldReader; -impl EndsR { +pub type ENDS_R = crate::FieldReader; +impl ENDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ends { + pub const fn variant(&self) -> ENDS_A { match self.bits { - 0 => Ends::Value1, - 1 => Ends::Value2, - 2 => Ends::Value3, - 3 => Ends::Value4, + 0 => ENDS_A::VALUE1, + 1 => ENDS_A::VALUE2, + 2 => ENDS_A::VALUE3, + 3 => ENDS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ends::Value1 + *self == ENDS_A::VALUE1 } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ends::Value2 + *self == ENDS_A::VALUE2 } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ends::Value3 + *self == ENDS_A::VALUE3 } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ends::Value4 + *self == ENDS_A::VALUE4 } } #[doc = "Field `ENDS` writer - External Stop Functionality Selector"] -pub type EndsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ends, crate::Safe>; -impl<'a, REG> EndsW<'a, REG> +pub type ENDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDS_A, crate::Safe>; +impl<'a, REG> ENDS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ends::Value1) + self.variant(ENDS_A::VALUE1) } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ends::Value2) + self.variant(ENDS_A::VALUE2) } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ends::Value3) + self.variant(ENDS_A::VALUE3) } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ends::Value4) + self.variant(ENDS_A::VALUE4) } } #[doc = "External Capture 0 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cap0s { +pub enum CAP0S_A { #[doc = "0: External Capture 0 Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Capture 0 Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Capture 0 Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Capture 0 Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cap0s) -> Self { + fn from(variant: CAP0S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cap0s { +impl crate::FieldSpec for CAP0S_A { type Ux = u8; } -impl crate::IsEnum for Cap0s {} +impl crate::IsEnum for CAP0S_A {} #[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] -pub type Cap0sR = crate::FieldReader; -impl Cap0sR { +pub type CAP0S_R = crate::FieldReader; +impl CAP0S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cap0s { + pub const fn variant(&self) -> CAP0S_A { match self.bits { - 0 => Cap0s::Value1, - 1 => Cap0s::Value2, - 2 => Cap0s::Value3, - 3 => Cap0s::Value4, + 0 => CAP0S_A::VALUE1, + 1 => CAP0S_A::VALUE2, + 2 => CAP0S_A::VALUE3, + 3 => CAP0S_A::VALUE4, _ => unreachable!(), } } #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cap0s::Value1 + *self == CAP0S_A::VALUE1 } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cap0s::Value2 + *self == CAP0S_A::VALUE2 } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cap0s::Value3 + *self == CAP0S_A::VALUE3 } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cap0s::Value4 + *self == CAP0S_A::VALUE4 } } #[doc = "Field `CAP0S` writer - External Capture 0 Functionality Selector"] -pub type Cap0sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap0s, crate::Safe>; -impl<'a, REG> Cap0sW<'a, REG> +pub type CAP0S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAP0S_A, crate::Safe>; +impl<'a, REG> CAP0S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cap0s::Value1) + self.variant(CAP0S_A::VALUE1) } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cap0s::Value2) + self.variant(CAP0S_A::VALUE2) } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cap0s::Value3) + self.variant(CAP0S_A::VALUE3) } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cap0s::Value4) + self.variant(CAP0S_A::VALUE4) } } #[doc = "External Capture 1 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cap1s { +pub enum CAP1S_A { #[doc = "0: External Capture 1 Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Capture 1 Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Capture 1 Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Capture 1 Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cap1s) -> Self { + fn from(variant: CAP1S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cap1s { +impl crate::FieldSpec for CAP1S_A { type Ux = u8; } -impl crate::IsEnum for Cap1s {} +impl crate::IsEnum for CAP1S_A {} #[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] -pub type Cap1sR = crate::FieldReader; -impl Cap1sR { +pub type CAP1S_R = crate::FieldReader; +impl CAP1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cap1s { + pub const fn variant(&self) -> CAP1S_A { match self.bits { - 0 => Cap1s::Value1, - 1 => Cap1s::Value2, - 2 => Cap1s::Value3, - 3 => Cap1s::Value4, + 0 => CAP1S_A::VALUE1, + 1 => CAP1S_A::VALUE2, + 2 => CAP1S_A::VALUE3, + 3 => CAP1S_A::VALUE4, _ => unreachable!(), } } #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cap1s::Value1 + *self == CAP1S_A::VALUE1 } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cap1s::Value2 + *self == CAP1S_A::VALUE2 } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cap1s::Value3 + *self == CAP1S_A::VALUE3 } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cap1s::Value4 + *self == CAP1S_A::VALUE4 } } #[doc = "Field `CAP1S` writer - External Capture 1 Functionality Selector"] -pub type Cap1sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap1s, crate::Safe>; -impl<'a, REG> Cap1sW<'a, REG> +pub type CAP1S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAP1S_A, crate::Safe>; +impl<'a, REG> CAP1S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cap1s::Value1) + self.variant(CAP1S_A::VALUE1) } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cap1s::Value2) + self.variant(CAP1S_A::VALUE2) } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cap1s::Value3) + self.variant(CAP1S_A::VALUE3) } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cap1s::Value4) + self.variant(CAP1S_A::VALUE4) } } #[doc = "External Gate Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Gates { +pub enum GATES_A { #[doc = "0: External Gating Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Gating Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Gating Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Gating Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Gates) -> Self { + fn from(variant: GATES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Gates { +impl crate::FieldSpec for GATES_A { type Ux = u8; } -impl crate::IsEnum for Gates {} +impl crate::IsEnum for GATES_A {} #[doc = "Field `GATES` reader - External Gate Functionality Selector"] -pub type GatesR = crate::FieldReader; -impl GatesR { +pub type GATES_R = crate::FieldReader; +impl GATES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gates { + pub const fn variant(&self) -> GATES_A { match self.bits { - 0 => Gates::Value1, - 1 => Gates::Value2, - 2 => Gates::Value3, - 3 => Gates::Value4, + 0 => GATES_A::VALUE1, + 1 => GATES_A::VALUE2, + 2 => GATES_A::VALUE3, + 3 => GATES_A::VALUE4, _ => unreachable!(), } } #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gates::Value1 + *self == GATES_A::VALUE1 } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gates::Value2 + *self == GATES_A::VALUE2 } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Gates::Value3 + *self == GATES_A::VALUE3 } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Gates::Value4 + *self == GATES_A::VALUE4 } } #[doc = "Field `GATES` writer - External Gate Functionality Selector"] -pub type GatesW<'a, REG> = crate::FieldWriter<'a, REG, 2, Gates, crate::Safe>; -impl<'a, REG> GatesW<'a, REG> +pub type GATES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GATES_A, crate::Safe>; +impl<'a, REG> GATES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gates::Value1) + self.variant(GATES_A::VALUE1) } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gates::Value2) + self.variant(GATES_A::VALUE2) } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Gates::Value3) + self.variant(GATES_A::VALUE3) } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Gates::Value4) + self.variant(GATES_A::VALUE4) } } #[doc = "External Up/Down Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Uds { +pub enum UDS_A { #[doc = "0: External Up/Down Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Up/Down Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Up/Down Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Up/Down Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Uds) -> Self { + fn from(variant: UDS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Uds { +impl crate::FieldSpec for UDS_A { type Ux = u8; } -impl crate::IsEnum for Uds {} +impl crate::IsEnum for UDS_A {} #[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] -pub type UdsR = crate::FieldReader; -impl UdsR { +pub type UDS_R = crate::FieldReader; +impl UDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Uds { + pub const fn variant(&self) -> UDS_A { match self.bits { - 0 => Uds::Value1, - 1 => Uds::Value2, - 2 => Uds::Value3, - 3 => Uds::Value4, + 0 => UDS_A::VALUE1, + 1 => UDS_A::VALUE2, + 2 => UDS_A::VALUE3, + 3 => UDS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Uds::Value1 + *self == UDS_A::VALUE1 } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Uds::Value2 + *self == UDS_A::VALUE2 } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Uds::Value3 + *self == UDS_A::VALUE3 } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Uds::Value4 + *self == UDS_A::VALUE4 } } #[doc = "Field `UDS` writer - External Up/Down Functionality Selector"] -pub type UdsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Uds, crate::Safe>; -impl<'a, REG> UdsW<'a, REG> +pub type UDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, UDS_A, crate::Safe>; +impl<'a, REG> UDS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,89 +500,89 @@ where #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Uds::Value1) + self.variant(UDS_A::VALUE1) } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Uds::Value2) + self.variant(UDS_A::VALUE2) } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Uds::Value3) + self.variant(UDS_A::VALUE3) } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Uds::Value4) + self.variant(UDS_A::VALUE4) } } #[doc = "Field `LDS` reader - External Timer Load Functionality Selector"] -pub type LdsR = crate::FieldReader; +pub type LDS_R = crate::FieldReader; #[doc = "Field `LDS` writer - External Timer Load Functionality Selector"] -pub type LdsW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type LDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "External Count Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cnts { +pub enum CNTS_A { #[doc = "0: External Count Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Count Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Count Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Count Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cnts) -> Self { + fn from(variant: CNTS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cnts { +impl crate::FieldSpec for CNTS_A { type Ux = u8; } -impl crate::IsEnum for Cnts {} +impl crate::IsEnum for CNTS_A {} #[doc = "Field `CNTS` reader - External Count Selector"] -pub type CntsR = crate::FieldReader; -impl CntsR { +pub type CNTS_R = crate::FieldReader; +impl CNTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cnts { + pub const fn variant(&self) -> CNTS_A { match self.bits { - 0 => Cnts::Value1, - 1 => Cnts::Value2, - 2 => Cnts::Value3, - 3 => Cnts::Value4, + 0 => CNTS_A::VALUE1, + 1 => CNTS_A::VALUE2, + 2 => CNTS_A::VALUE3, + 3 => CNTS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Count Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cnts::Value1 + *self == CNTS_A::VALUE1 } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cnts::Value2 + *self == CNTS_A::VALUE2 } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cnts::Value3 + *self == CNTS_A::VALUE3 } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cnts::Value4 + *self == CNTS_A::VALUE4 } } #[doc = "Field `CNTS` writer - External Count Selector"] -pub type CntsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cnts, crate::Safe>; -impl<'a, REG> CntsW<'a, REG> +pub type CNTS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CNTS_A, crate::Safe>; +impl<'a, REG> CNTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -590,337 +590,337 @@ where #[doc = "External Count Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cnts::Value1) + self.variant(CNTS_A::VALUE1) } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cnts::Value2) + self.variant(CNTS_A::VALUE2) } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cnts::Value3) + self.variant(CNTS_A::VALUE3) } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cnts::Value4) + self.variant(CNTS_A::VALUE4) } } #[doc = "Override Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ofs { +pub enum OFS_A { #[doc = "0: Override functionality disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ofs) -> Self { + fn from(variant: OFS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OFS` reader - Override Function Selector"] -pub type OfsR = crate::BitReader; -impl OfsR { +pub type OFS_R = crate::BitReader; +impl OFS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ofs { + pub const fn variant(&self) -> OFS_A { match self.bits { - false => Ofs::Value1, - true => Ofs::Value2, + false => OFS_A::VALUE1, + true => OFS_A::VALUE2, } } #[doc = "Override functionality disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ofs::Value1 + *self == OFS_A::VALUE1 } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ofs::Value2 + *self == OFS_A::VALUE2 } } #[doc = "Field `OFS` writer - Override Function Selector"] -pub type OfsW<'a, REG> = crate::BitWriter<'a, REG, Ofs>; -impl<'a, REG> OfsW<'a, REG> +pub type OFS_W<'a, REG> = crate::BitWriter<'a, REG, OFS_A>; +impl<'a, REG> OFS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override functionality disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ofs::Value1) + self.variant(OFS_A::VALUE1) } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ofs::Value2) + self.variant(OFS_A::VALUE2) } } #[doc = "Trap Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ts { +pub enum TS_A { #[doc = "0: Trap function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP function connected to Event 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ts) -> Self { + fn from(variant: TS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TS` reader - Trap Function Selector"] -pub type TsR = crate::BitReader; -impl TsR { +pub type TS_R = crate::BitReader; +impl TS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ts { + pub const fn variant(&self) -> TS_A { match self.bits { - false => Ts::Value1, - true => Ts::Value2, + false => TS_A::VALUE1, + true => TS_A::VALUE2, } } #[doc = "Trap function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ts::Value1 + *self == TS_A::VALUE1 } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ts::Value2 + *self == TS_A::VALUE2 } } #[doc = "Field `TS` writer - Trap Function Selector"] -pub type TsW<'a, REG> = crate::BitWriter<'a, REG, Ts>; -impl<'a, REG> TsW<'a, REG> +pub type TS_W<'a, REG> = crate::BitWriter<'a, REG, TS_A>; +impl<'a, REG> TS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ts::Value1) + self.variant(TS_A::VALUE1) } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ts::Value2) + self.variant(TS_A::VALUE2) } } #[doc = "Field `MOS` reader - External Modulation Functionality Selector"] -pub type MosR = crate::FieldReader; +pub type MOS_R = crate::FieldReader; #[doc = "Field `MOS` writer - External Modulation Functionality Selector"] -pub type MosW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type MOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Timer Concatenation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tce { +pub enum TCE_A { #[doc = "0: Timer concatenation is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer concatenation is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tce) -> Self { + fn from(variant: TCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TCE` reader - Timer Concatenation Enable"] -pub type TceR = crate::BitReader; -impl TceR { +pub type TCE_R = crate::BitReader; +impl TCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tce { + pub const fn variant(&self) -> TCE_A { match self.bits { - false => Tce::Value1, - true => Tce::Value2, + false => TCE_A::VALUE1, + true => TCE_A::VALUE2, } } #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tce::Value1 + *self == TCE_A::VALUE1 } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tce::Value2 + *self == TCE_A::VALUE2 } } #[doc = "Field `TCE` writer - Timer Concatenation Enable"] -pub type TceW<'a, REG> = crate::BitWriter<'a, REG, Tce>; -impl<'a, REG> TceW<'a, REG> +pub type TCE_W<'a, REG> = crate::BitWriter<'a, REG, TCE_A>; +impl<'a, REG> TCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tce::Value1) + self.variant(TCE_A::VALUE1) } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tce::Value2) + self.variant(TCE_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - pub fn strts(&self) -> StrtsR { - StrtsR::new((self.bits & 3) as u8) + pub fn strts(&self) -> STRTS_R { + STRTS_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - pub fn ends(&self) -> EndsR { - EndsR::new(((self.bits >> 2) & 3) as u8) + pub fn ends(&self) -> ENDS_R { + ENDS_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - pub fn cap0s(&self) -> Cap0sR { - Cap0sR::new(((self.bits >> 4) & 3) as u8) + pub fn cap0s(&self) -> CAP0S_R { + CAP0S_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - pub fn cap1s(&self) -> Cap1sR { - Cap1sR::new(((self.bits >> 6) & 3) as u8) + pub fn cap1s(&self) -> CAP1S_R { + CAP1S_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - pub fn gates(&self) -> GatesR { - GatesR::new(((self.bits >> 8) & 3) as u8) + pub fn gates(&self) -> GATES_R { + GATES_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - pub fn uds(&self) -> UdsR { - UdsR::new(((self.bits >> 10) & 3) as u8) + pub fn uds(&self) -> UDS_R { + UDS_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - pub fn lds(&self) -> LdsR { - LdsR::new(((self.bits >> 12) & 3) as u8) + pub fn lds(&self) -> LDS_R { + LDS_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - pub fn cnts(&self) -> CntsR { - CntsR::new(((self.bits >> 14) & 3) as u8) + pub fn cnts(&self) -> CNTS_R { + CNTS_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - pub fn ofs(&self) -> OfsR { - OfsR::new(((self.bits >> 16) & 1) != 0) + pub fn ofs(&self) -> OFS_R { + OFS_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - pub fn ts(&self) -> TsR { - TsR::new(((self.bits >> 17) & 1) != 0) + pub fn ts(&self) -> TS_R { + TS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - pub fn mos(&self) -> MosR { - MosR::new(((self.bits >> 18) & 3) as u8) + pub fn mos(&self) -> MOS_R { + MOS_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - pub fn tce(&self) -> TceR { - TceR::new(((self.bits >> 20) & 1) != 0) + pub fn tce(&self) -> TCE_R { + TCE_R::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] #[must_use] - pub fn strts(&mut self) -> StrtsW { - StrtsW::new(self, 0) + pub fn strts(&mut self) -> STRTS_W { + STRTS_W::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] #[must_use] - pub fn ends(&mut self) -> EndsW { - EndsW::new(self, 2) + pub fn ends(&mut self) -> ENDS_W { + ENDS_W::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap0s(&mut self) -> Cap0sW { - Cap0sW::new(self, 4) + pub fn cap0s(&mut self) -> CAP0S_W { + CAP0S_W::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap1s(&mut self) -> Cap1sW { - Cap1sW::new(self, 6) + pub fn cap1s(&mut self) -> CAP1S_W { + CAP1S_W::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] #[must_use] - pub fn gates(&mut self) -> GatesW { - GatesW::new(self, 8) + pub fn gates(&mut self) -> GATES_W { + GATES_W::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] #[must_use] - pub fn uds(&mut self) -> UdsW { - UdsW::new(self, 10) + pub fn uds(&mut self) -> UDS_W { + UDS_W::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] #[must_use] - pub fn lds(&mut self) -> LdsW { - LdsW::new(self, 12) + pub fn lds(&mut self) -> LDS_W { + LDS_W::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] #[must_use] - pub fn cnts(&mut self) -> CntsW { - CntsW::new(self, 14) + pub fn cnts(&mut self) -> CNTS_W { + CNTS_W::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] #[must_use] - pub fn ofs(&mut self) -> OfsW { - OfsW::new(self, 16) + pub fn ofs(&mut self) -> OFS_W { + OFS_W::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] #[must_use] - pub fn ts(&mut self) -> TsW { - TsW::new(self, 17) + pub fn ts(&mut self) -> TS_W { + TS_W::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] #[must_use] - pub fn mos(&mut self) -> MosW { - MosW::new(self, 18) + pub fn mos(&mut self) -> MOS_W { + MOS_W::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] #[must_use] - pub fn tce(&mut self) -> TceW { - TceW::new(self, 20) + pub fn tce(&mut self) -> TCE_W { + TCE_W::new(self, 20) } } #[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CmcSpec; -impl crate::RegisterSpec for CmcSpec { +pub struct CMC_SPEC; +impl crate::RegisterSpec for CMC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cmc::R`](R) reader structure"] -impl crate::Readable for CmcSpec {} +impl crate::Readable for CMC_SPEC {} #[doc = "`write(|w| ..)` method takes [`cmc::W`](W) writer structure"] -impl crate::Writable for CmcSpec { +impl crate::Writable for CMC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMC to value 0"] -impl crate::Resettable for CmcSpec { +impl crate::Resettable for CMC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/cr.rs b/src/ccu40_cc40/cr.rs index ccb3d1e9..6a3a7ff7 100644 --- a/src/ccu40_cc40/cr.rs +++ b/src/ccu40_cc40/cr.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR` reader - Compare Register"] -pub type CrR = crate::FieldReader; +pub type CR_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] - pub fn cr(&self) -> CrR { - CrR::new((self.bits & 0xffff) as u16) + pub fn cr(&self) -> CR_R { + CR_R::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CrSpec; -impl crate::RegisterSpec for CrSpec { +pub struct CR_SPEC; +impl crate::RegisterSpec for CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr::R`](R) reader structure"] -impl crate::Readable for CrSpec {} +impl crate::Readable for CR_SPEC {} #[doc = "`reset()` method sets CR to value 0"] -impl crate::Resettable for CrSpec { +impl crate::Resettable for CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/crs.rs b/src/ccu40_cc40/crs.rs index 77ddf815..94e1f4ed 100644 --- a/src/ccu40_cc40/crs.rs +++ b/src/ccu40_cc40/crs.rs @@ -1,40 +1,40 @@ #[doc = "Register `CRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRS` reader - Compare Register"] -pub type CrsR = crate::FieldReader; +pub type CRS_R = crate::FieldReader; #[doc = "Field `CRS` writer - Compare Register"] -pub type CrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] - pub fn crs(&self) -> CrsR { - CrsR::new((self.bits & 0xffff) as u16) + pub fn crs(&self) -> CRS_R { + CRS_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] #[must_use] - pub fn crs(&mut self) -> CrsW { - CrsW::new(self, 0) + pub fn crs(&mut self) -> CRS_W { + CRS_W::new(self, 0) } } #[doc = "Timer Shadow Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CrsSpec; -impl crate::RegisterSpec for CrsSpec { +pub struct CRS_SPEC; +impl crate::RegisterSpec for CRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`crs::R`](R) reader structure"] -impl crate::Readable for CrsSpec {} +impl crate::Readable for CRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`crs::W`](W) writer structure"] -impl crate::Writable for CrsSpec { +impl crate::Writable for CRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CRS to value 0"] -impl crate::Resettable for CrsSpec { +impl crate::Resettable for CRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/dit.rs b/src/ccu40_cc40/dit.rs index 62dab291..02e005ab 100644 --- a/src/ccu40_cc40/dit.rs +++ b/src/ccu40_cc40/dit.rs @@ -1,29 +1,29 @@ #[doc = "Register `DIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DCV` reader - Dither compare Value"] -pub type DcvR = crate::FieldReader; +pub type DCV_R = crate::FieldReader; #[doc = "Field `DCNT` reader - Dither counter actual value"] -pub type DcntR = crate::FieldReader; +pub type DCNT_R = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Dither compare Value"] #[inline(always)] - pub fn dcv(&self) -> DcvR { - DcvR::new((self.bits & 0x0f) as u8) + pub fn dcv(&self) -> DCV_R { + DCV_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Dither counter actual value"] #[inline(always)] - pub fn dcnt(&self) -> DcntR { - DcntR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn dcnt(&self) -> DCNT_R { + DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) } } #[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DitSpec; -impl crate::RegisterSpec for DitSpec { +pub struct DIT_SPEC; +impl crate::RegisterSpec for DIT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dit::R`](R) reader structure"] -impl crate::Readable for DitSpec {} +impl crate::Readable for DIT_SPEC {} #[doc = "`reset()` method sets DIT to value 0"] -impl crate::Resettable for DitSpec { +impl crate::Resettable for DIT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/dits.rs b/src/ccu40_cc40/dits.rs index e8d9215c..31dd2b44 100644 --- a/src/ccu40_cc40/dits.rs +++ b/src/ccu40_cc40/dits.rs @@ -1,40 +1,40 @@ #[doc = "Register `DITS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DITS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DCVS` reader - Dither Shadow Compare Value"] -pub type DcvsR = crate::FieldReader; +pub type DCVS_R = crate::FieldReader; #[doc = "Field `DCVS` writer - Dither Shadow Compare Value"] -pub type DcvsW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DCVS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - pub fn dcvs(&self) -> DcvsR { - DcvsR::new((self.bits & 0x0f) as u8) + pub fn dcvs(&self) -> DCVS_R { + DCVS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn dcvs(&mut self) -> DcvsW { - DcvsW::new(self, 0) + pub fn dcvs(&mut self) -> DCVS_W { + DCVS_W::new(self, 0) } } #[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DitsSpec; -impl crate::RegisterSpec for DitsSpec { +pub struct DITS_SPEC; +impl crate::RegisterSpec for DITS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dits::R`](R) reader structure"] -impl crate::Readable for DitsSpec {} +impl crate::Readable for DITS_SPEC {} #[doc = "`write(|w| ..)` method takes [`dits::W`](W) writer structure"] -impl crate::Writable for DitsSpec { +impl crate::Writable for DITS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DITS to value 0"] -impl crate::Resettable for DitsSpec { +impl crate::Resettable for DITS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/fpc.rs b/src/ccu40_cc40/fpc.rs index 441df5b3..36e4088a 100644 --- a/src/ccu40_cc40/fpc.rs +++ b/src/ccu40_cc40/fpc.rs @@ -1,47 +1,47 @@ #[doc = "Register `FPC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Compare Value"] -pub type PcmpR = crate::FieldReader; +pub type PCMP_R = crate::FieldReader; #[doc = "Field `PVAL` reader - Actual Prescaler Value"] -pub type PvalR = crate::FieldReader; +pub type PVAL_R = crate::FieldReader; #[doc = "Field `PVAL` writer - Actual Prescaler Value"] -pub type PvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PcmpR { - PcmpR::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PCMP_R { + PCMP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - pub fn pval(&self) -> PvalR { - PvalR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pval(&self) -> PVAL_R { + PVAL_R::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] #[must_use] - pub fn pval(&mut self) -> PvalW { - PvalW::new(self, 8) + pub fn pval(&mut self) -> PVAL_W { + PVAL_W::new(self, 8) } } #[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpcSpec; -impl crate::RegisterSpec for FpcSpec { +pub struct FPC_SPEC; +impl crate::RegisterSpec for FPC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpc::R`](R) reader structure"] -impl crate::Readable for FpcSpec {} +impl crate::Readable for FPC_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpc::W`](W) writer structure"] -impl crate::Writable for FpcSpec { +impl crate::Writable for FPC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPC to value 0"] -impl crate::Resettable for FpcSpec { +impl crate::Resettable for FPC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/fpcs.rs b/src/ccu40_cc40/fpcs.rs index 821adc52..e59acee1 100644 --- a/src/ccu40_cc40/fpcs.rs +++ b/src/ccu40_cc40/fpcs.rs @@ -1,40 +1,40 @@ #[doc = "Register `FPCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Shadow Compare Value"] -pub type PcmpR = crate::FieldReader; +pub type PCMP_R = crate::FieldReader; #[doc = "Field `PCMP` writer - Floating Prescaler Shadow Compare Value"] -pub type PcmpW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCMP_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PcmpR { - PcmpR::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PCMP_R { + PCMP_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn pcmp(&mut self) -> PcmpW { - PcmpW::new(self, 0) + pub fn pcmp(&mut self) -> PCMP_W { + PCMP_W::new(self, 0) } } #[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpcsSpec; -impl crate::RegisterSpec for FpcsSpec { +pub struct FPCS_SPEC; +impl crate::RegisterSpec for FPCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpcs::R`](R) reader structure"] -impl crate::Readable for FpcsSpec {} +impl crate::Readable for FPCS_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpcs::W`](W) writer structure"] -impl crate::Writable for FpcsSpec { +impl crate::Writable for FPCS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCS to value 0"] -impl crate::Resettable for FpcsSpec { +impl crate::Resettable for FPCS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ins.rs b/src/ccu40_cc40/ins.rs index c4c296a9..76659036 100644 --- a/src/ccu40_cc40/ins.rs +++ b/src/ccu40_cc40/ins.rs @@ -1,164 +1,164 @@ #[doc = "Register `INS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Event 0 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev0is { +pub enum EV0IS_A { #[doc = "0: CCU4x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU4x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU4x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU4x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU4x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU4x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU4x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU4x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU4x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU4x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU4x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU4x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU4x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU4x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU4x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU4x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev0is) -> Self { + fn from(variant: EV0IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev0is { +impl crate::FieldSpec for EV0IS_A { type Ux = u8; } -impl crate::IsEnum for Ev0is {} +impl crate::IsEnum for EV0IS_A {} #[doc = "Field `EV0IS` reader - Event 0 signal selection"] -pub type Ev0isR = crate::FieldReader; -impl Ev0isR { +pub type EV0IS_R = crate::FieldReader; +impl EV0IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0is { + pub const fn variant(&self) -> EV0IS_A { match self.bits { - 0 => Ev0is::Value1, - 1 => Ev0is::Value2, - 2 => Ev0is::Value3, - 3 => Ev0is::Value4, - 4 => Ev0is::Value5, - 5 => Ev0is::Value6, - 6 => Ev0is::Value7, - 7 => Ev0is::Value8, - 8 => Ev0is::Value9, - 9 => Ev0is::Value10, - 10 => Ev0is::Value11, - 11 => Ev0is::Value12, - 12 => Ev0is::Value13, - 13 => Ev0is::Value14, - 14 => Ev0is::Value15, - 15 => Ev0is::Value16, + 0 => EV0IS_A::VALUE1, + 1 => EV0IS_A::VALUE2, + 2 => EV0IS_A::VALUE3, + 3 => EV0IS_A::VALUE4, + 4 => EV0IS_A::VALUE5, + 5 => EV0IS_A::VALUE6, + 6 => EV0IS_A::VALUE7, + 7 => EV0IS_A::VALUE8, + 8 => EV0IS_A::VALUE9, + 9 => EV0IS_A::VALUE10, + 10 => EV0IS_A::VALUE11, + 11 => EV0IS_A::VALUE12, + 12 => EV0IS_A::VALUE13, + 13 => EV0IS_A::VALUE14, + 14 => EV0IS_A::VALUE15, + 15 => EV0IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0is::Value1 + *self == EV0IS_A::VALUE1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0is::Value2 + *self == EV0IS_A::VALUE2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev0is::Value3 + *self == EV0IS_A::VALUE3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev0is::Value4 + *self == EV0IS_A::VALUE4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev0is::Value5 + *self == EV0IS_A::VALUE5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev0is::Value6 + *self == EV0IS_A::VALUE6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev0is::Value7 + *self == EV0IS_A::VALUE7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev0is::Value8 + *self == EV0IS_A::VALUE8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev0is::Value9 + *self == EV0IS_A::VALUE9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev0is::Value10 + *self == EV0IS_A::VALUE10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev0is::Value11 + *self == EV0IS_A::VALUE11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev0is::Value12 + *self == EV0IS_A::VALUE12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev0is::Value13 + *self == EV0IS_A::VALUE13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev0is::Value14 + *self == EV0IS_A::VALUE14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev0is::Value15 + *self == EV0IS_A::VALUE15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev0is::Value16 + *self == EV0IS_A::VALUE16 } } #[doc = "Field `EV0IS` writer - Event 0 signal selection"] -pub type Ev0isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev0is, crate::Safe>; -impl<'a, REG> Ev0isW<'a, REG> +pub type EV0IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV0IS_A, crate::Safe>; +impl<'a, REG> EV0IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -166,241 +166,241 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0is::Value1) + self.variant(EV0IS_A::VALUE1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0is::Value2) + self.variant(EV0IS_A::VALUE2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev0is::Value3) + self.variant(EV0IS_A::VALUE3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev0is::Value4) + self.variant(EV0IS_A::VALUE4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev0is::Value5) + self.variant(EV0IS_A::VALUE5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev0is::Value6) + self.variant(EV0IS_A::VALUE6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev0is::Value7) + self.variant(EV0IS_A::VALUE7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev0is::Value8) + self.variant(EV0IS_A::VALUE8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev0is::Value9) + self.variant(EV0IS_A::VALUE9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev0is::Value10) + self.variant(EV0IS_A::VALUE10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev0is::Value11) + self.variant(EV0IS_A::VALUE11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev0is::Value12) + self.variant(EV0IS_A::VALUE12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev0is::Value13) + self.variant(EV0IS_A::VALUE13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev0is::Value14) + self.variant(EV0IS_A::VALUE14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev0is::Value15) + self.variant(EV0IS_A::VALUE15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev0is::Value16) + self.variant(EV0IS_A::VALUE16) } } #[doc = "Event 1 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev1is { +pub enum EV1IS_A { #[doc = "0: CCU4x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU4x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU4x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU4x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU4x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU4x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU4x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU4x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU4x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU4x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU4x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU4x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU4x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU4x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU4x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU4x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev1is) -> Self { + fn from(variant: EV1IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev1is { +impl crate::FieldSpec for EV1IS_A { type Ux = u8; } -impl crate::IsEnum for Ev1is {} +impl crate::IsEnum for EV1IS_A {} #[doc = "Field `EV1IS` reader - Event 1 signal selection"] -pub type Ev1isR = crate::FieldReader; -impl Ev1isR { +pub type EV1IS_R = crate::FieldReader; +impl EV1IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1is { + pub const fn variant(&self) -> EV1IS_A { match self.bits { - 0 => Ev1is::Value1, - 1 => Ev1is::Value2, - 2 => Ev1is::Value3, - 3 => Ev1is::Value4, - 4 => Ev1is::Value5, - 5 => Ev1is::Value6, - 6 => Ev1is::Value7, - 7 => Ev1is::Value8, - 8 => Ev1is::Value9, - 9 => Ev1is::Value10, - 10 => Ev1is::Value11, - 11 => Ev1is::Value12, - 12 => Ev1is::Value13, - 13 => Ev1is::Value14, - 14 => Ev1is::Value15, - 15 => Ev1is::Value16, + 0 => EV1IS_A::VALUE1, + 1 => EV1IS_A::VALUE2, + 2 => EV1IS_A::VALUE3, + 3 => EV1IS_A::VALUE4, + 4 => EV1IS_A::VALUE5, + 5 => EV1IS_A::VALUE6, + 6 => EV1IS_A::VALUE7, + 7 => EV1IS_A::VALUE8, + 8 => EV1IS_A::VALUE9, + 9 => EV1IS_A::VALUE10, + 10 => EV1IS_A::VALUE11, + 11 => EV1IS_A::VALUE12, + 12 => EV1IS_A::VALUE13, + 13 => EV1IS_A::VALUE14, + 14 => EV1IS_A::VALUE15, + 15 => EV1IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1is::Value1 + *self == EV1IS_A::VALUE1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1is::Value2 + *self == EV1IS_A::VALUE2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev1is::Value3 + *self == EV1IS_A::VALUE3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev1is::Value4 + *self == EV1IS_A::VALUE4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev1is::Value5 + *self == EV1IS_A::VALUE5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev1is::Value6 + *self == EV1IS_A::VALUE6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev1is::Value7 + *self == EV1IS_A::VALUE7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev1is::Value8 + *self == EV1IS_A::VALUE8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev1is::Value9 + *self == EV1IS_A::VALUE9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev1is::Value10 + *self == EV1IS_A::VALUE10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev1is::Value11 + *self == EV1IS_A::VALUE11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev1is::Value12 + *self == EV1IS_A::VALUE12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev1is::Value13 + *self == EV1IS_A::VALUE13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev1is::Value14 + *self == EV1IS_A::VALUE14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev1is::Value15 + *self == EV1IS_A::VALUE15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev1is::Value16 + *self == EV1IS_A::VALUE16 } } #[doc = "Field `EV1IS` writer - Event 1 signal selection"] -pub type Ev1isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev1is, crate::Safe>; -impl<'a, REG> Ev1isW<'a, REG> +pub type EV1IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV1IS_A, crate::Safe>; +impl<'a, REG> EV1IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -408,241 +408,241 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1is::Value1) + self.variant(EV1IS_A::VALUE1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1is::Value2) + self.variant(EV1IS_A::VALUE2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev1is::Value3) + self.variant(EV1IS_A::VALUE3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev1is::Value4) + self.variant(EV1IS_A::VALUE4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev1is::Value5) + self.variant(EV1IS_A::VALUE5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev1is::Value6) + self.variant(EV1IS_A::VALUE6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev1is::Value7) + self.variant(EV1IS_A::VALUE7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev1is::Value8) + self.variant(EV1IS_A::VALUE8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev1is::Value9) + self.variant(EV1IS_A::VALUE9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev1is::Value10) + self.variant(EV1IS_A::VALUE10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev1is::Value11) + self.variant(EV1IS_A::VALUE11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev1is::Value12) + self.variant(EV1IS_A::VALUE12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev1is::Value13) + self.variant(EV1IS_A::VALUE13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev1is::Value14) + self.variant(EV1IS_A::VALUE14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev1is::Value15) + self.variant(EV1IS_A::VALUE15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev1is::Value16) + self.variant(EV1IS_A::VALUE16) } } #[doc = "Event 2 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev2is { +pub enum EV2IS_A { #[doc = "0: CCU4x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU4x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU4x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU4x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU4x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU4x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU4x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU4x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU4x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU4x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU4x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU4x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU4x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU4x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU4x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU4x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev2is) -> Self { + fn from(variant: EV2IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev2is { +impl crate::FieldSpec for EV2IS_A { type Ux = u8; } -impl crate::IsEnum for Ev2is {} +impl crate::IsEnum for EV2IS_A {} #[doc = "Field `EV2IS` reader - Event 2 signal selection"] -pub type Ev2isR = crate::FieldReader; -impl Ev2isR { +pub type EV2IS_R = crate::FieldReader; +impl EV2IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2is { + pub const fn variant(&self) -> EV2IS_A { match self.bits { - 0 => Ev2is::Value1, - 1 => Ev2is::Value2, - 2 => Ev2is::Value3, - 3 => Ev2is::Value4, - 4 => Ev2is::Value5, - 5 => Ev2is::Value6, - 6 => Ev2is::Value7, - 7 => Ev2is::Value8, - 8 => Ev2is::Value9, - 9 => Ev2is::Value10, - 10 => Ev2is::Value11, - 11 => Ev2is::Value12, - 12 => Ev2is::Value13, - 13 => Ev2is::Value14, - 14 => Ev2is::Value15, - 15 => Ev2is::Value16, + 0 => EV2IS_A::VALUE1, + 1 => EV2IS_A::VALUE2, + 2 => EV2IS_A::VALUE3, + 3 => EV2IS_A::VALUE4, + 4 => EV2IS_A::VALUE5, + 5 => EV2IS_A::VALUE6, + 6 => EV2IS_A::VALUE7, + 7 => EV2IS_A::VALUE8, + 8 => EV2IS_A::VALUE9, + 9 => EV2IS_A::VALUE10, + 10 => EV2IS_A::VALUE11, + 11 => EV2IS_A::VALUE12, + 12 => EV2IS_A::VALUE13, + 13 => EV2IS_A::VALUE14, + 14 => EV2IS_A::VALUE15, + 15 => EV2IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU4x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2is::Value1 + *self == EV2IS_A::VALUE1 } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2is::Value2 + *self == EV2IS_A::VALUE2 } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev2is::Value3 + *self == EV2IS_A::VALUE3 } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev2is::Value4 + *self == EV2IS_A::VALUE4 } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev2is::Value5 + *self == EV2IS_A::VALUE5 } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev2is::Value6 + *self == EV2IS_A::VALUE6 } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev2is::Value7 + *self == EV2IS_A::VALUE7 } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev2is::Value8 + *self == EV2IS_A::VALUE8 } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev2is::Value9 + *self == EV2IS_A::VALUE9 } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev2is::Value10 + *self == EV2IS_A::VALUE10 } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev2is::Value11 + *self == EV2IS_A::VALUE11 } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev2is::Value12 + *self == EV2IS_A::VALUE12 } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev2is::Value13 + *self == EV2IS_A::VALUE13 } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev2is::Value14 + *self == EV2IS_A::VALUE14 } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev2is::Value15 + *self == EV2IS_A::VALUE15 } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev2is::Value16 + *self == EV2IS_A::VALUE16 } } #[doc = "Field `EV2IS` writer - Event 2 signal selection"] -pub type Ev2isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev2is, crate::Safe>; -impl<'a, REG> Ev2isW<'a, REG> +pub type EV2IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV2IS_A, crate::Safe>; +impl<'a, REG> EV2IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -650,145 +650,145 @@ where #[doc = "CCU4x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2is::Value1) + self.variant(EV2IS_A::VALUE1) } #[doc = "CCU4x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2is::Value2) + self.variant(EV2IS_A::VALUE2) } #[doc = "CCU4x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev2is::Value3) + self.variant(EV2IS_A::VALUE3) } #[doc = "CCU4x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev2is::Value4) + self.variant(EV2IS_A::VALUE4) } #[doc = "CCU4x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev2is::Value5) + self.variant(EV2IS_A::VALUE5) } #[doc = "CCU4x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev2is::Value6) + self.variant(EV2IS_A::VALUE6) } #[doc = "CCU4x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev2is::Value7) + self.variant(EV2IS_A::VALUE7) } #[doc = "CCU4x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev2is::Value8) + self.variant(EV2IS_A::VALUE8) } #[doc = "CCU4x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev2is::Value9) + self.variant(EV2IS_A::VALUE9) } #[doc = "CCU4x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev2is::Value10) + self.variant(EV2IS_A::VALUE10) } #[doc = "CCU4x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev2is::Value11) + self.variant(EV2IS_A::VALUE11) } #[doc = "CCU4x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev2is::Value12) + self.variant(EV2IS_A::VALUE12) } #[doc = "CCU4x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev2is::Value13) + self.variant(EV2IS_A::VALUE13) } #[doc = "CCU4x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev2is::Value14) + self.variant(EV2IS_A::VALUE14) } #[doc = "CCU4x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev2is::Value15) + self.variant(EV2IS_A::VALUE15) } #[doc = "CCU4x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev2is::Value16) + self.variant(EV2IS_A::VALUE16) } } #[doc = "Event 0 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev0em { +pub enum EV0EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev0em) -> Self { + fn from(variant: EV0EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev0em { +impl crate::FieldSpec for EV0EM_A { type Ux = u8; } -impl crate::IsEnum for Ev0em {} +impl crate::IsEnum for EV0EM_A {} #[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] -pub type Ev0emR = crate::FieldReader; -impl Ev0emR { +pub type EV0EM_R = crate::FieldReader; +impl EV0EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0em { + pub const fn variant(&self) -> EV0EM_A { match self.bits { - 0 => Ev0em::Value1, - 1 => Ev0em::Value2, - 2 => Ev0em::Value3, - 3 => Ev0em::Value4, + 0 => EV0EM_A::VALUE1, + 1 => EV0EM_A::VALUE2, + 2 => EV0EM_A::VALUE3, + 3 => EV0EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0em::Value1 + *self == EV0EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0em::Value2 + *self == EV0EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev0em::Value3 + *self == EV0EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev0em::Value4 + *self == EV0EM_A::VALUE4 } } #[doc = "Field `EV0EM` writer - Event 0 Edge Selection"] -pub type Ev0emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev0em, crate::Safe>; -impl<'a, REG> Ev0emW<'a, REG> +pub type EV0EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV0EM_A, crate::Safe>; +impl<'a, REG> EV0EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -796,85 +796,85 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0em::Value1) + self.variant(EV0EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0em::Value2) + self.variant(EV0EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev0em::Value3) + self.variant(EV0EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev0em::Value4) + self.variant(EV0EM_A::VALUE4) } } #[doc = "Event 1 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev1em { +pub enum EV1EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev1em) -> Self { + fn from(variant: EV1EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev1em { +impl crate::FieldSpec for EV1EM_A { type Ux = u8; } -impl crate::IsEnum for Ev1em {} +impl crate::IsEnum for EV1EM_A {} #[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] -pub type Ev1emR = crate::FieldReader; -impl Ev1emR { +pub type EV1EM_R = crate::FieldReader; +impl EV1EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1em { + pub const fn variant(&self) -> EV1EM_A { match self.bits { - 0 => Ev1em::Value1, - 1 => Ev1em::Value2, - 2 => Ev1em::Value3, - 3 => Ev1em::Value4, + 0 => EV1EM_A::VALUE1, + 1 => EV1EM_A::VALUE2, + 2 => EV1EM_A::VALUE3, + 3 => EV1EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1em::Value1 + *self == EV1EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1em::Value2 + *self == EV1EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev1em::Value3 + *self == EV1EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev1em::Value4 + *self == EV1EM_A::VALUE4 } } #[doc = "Field `EV1EM` writer - Event 1 Edge Selection"] -pub type Ev1emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev1em, crate::Safe>; -impl<'a, REG> Ev1emW<'a, REG> +pub type EV1EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV1EM_A, crate::Safe>; +impl<'a, REG> EV1EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -882,85 +882,85 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1em::Value1) + self.variant(EV1EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1em::Value2) + self.variant(EV1EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev1em::Value3) + self.variant(EV1EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev1em::Value4) + self.variant(EV1EM_A::VALUE4) } } #[doc = "Event 2 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev2em { +pub enum EV2EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev2em) -> Self { + fn from(variant: EV2EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev2em { +impl crate::FieldSpec for EV2EM_A { type Ux = u8; } -impl crate::IsEnum for Ev2em {} +impl crate::IsEnum for EV2EM_A {} #[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] -pub type Ev2emR = crate::FieldReader; -impl Ev2emR { +pub type EV2EM_R = crate::FieldReader; +impl EV2EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2em { + pub const fn variant(&self) -> EV2EM_A { match self.bits { - 0 => Ev2em::Value1, - 1 => Ev2em::Value2, - 2 => Ev2em::Value3, - 3 => Ev2em::Value4, + 0 => EV2EM_A::VALUE1, + 1 => EV2EM_A::VALUE2, + 2 => EV2EM_A::VALUE3, + 3 => EV2EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2em::Value1 + *self == EV2EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2em::Value2 + *self == EV2EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev2em::Value3 + *self == EV2EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev2em::Value4 + *self == EV2EM_A::VALUE4 } } #[doc = "Field `EV2EM` writer - Event 2 Edge Selection"] -pub type Ev2emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev2em, crate::Safe>; -impl<'a, REG> Ev2emW<'a, REG> +pub type EV2EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV2EM_A, crate::Safe>; +impl<'a, REG> EV2EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -968,244 +968,244 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2em::Value1) + self.variant(EV2EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2em::Value2) + self.variant(EV2EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev2em::Value3) + self.variant(EV2EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev2em::Value4) + self.variant(EV2EM_A::VALUE4) } } #[doc = "Event 0 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev0lm { +pub enum EV0LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev0lm) -> Self { + fn from(variant: EV0LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV0LM` reader - Event 0 Level Selection"] -pub type Ev0lmR = crate::BitReader; -impl Ev0lmR { +pub type EV0LM_R = crate::BitReader; +impl EV0LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0lm { + pub const fn variant(&self) -> EV0LM_A { match self.bits { - false => Ev0lm::Value1, - true => Ev0lm::Value2, + false => EV0LM_A::VALUE1, + true => EV0LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0lm::Value1 + *self == EV0LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0lm::Value2 + *self == EV0LM_A::VALUE2 } } #[doc = "Field `EV0LM` writer - Event 0 Level Selection"] -pub type Ev0lmW<'a, REG> = crate::BitWriter<'a, REG, Ev0lm>; -impl<'a, REG> Ev0lmW<'a, REG> +pub type EV0LM_W<'a, REG> = crate::BitWriter<'a, REG, EV0LM_A>; +impl<'a, REG> EV0LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0lm::Value1) + self.variant(EV0LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0lm::Value2) + self.variant(EV0LM_A::VALUE2) } } #[doc = "Event 1 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev1lm { +pub enum EV1LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev1lm) -> Self { + fn from(variant: EV1LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV1LM` reader - Event 1 Level Selection"] -pub type Ev1lmR = crate::BitReader; -impl Ev1lmR { +pub type EV1LM_R = crate::BitReader; +impl EV1LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1lm { + pub const fn variant(&self) -> EV1LM_A { match self.bits { - false => Ev1lm::Value1, - true => Ev1lm::Value2, + false => EV1LM_A::VALUE1, + true => EV1LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1lm::Value1 + *self == EV1LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1lm::Value2 + *self == EV1LM_A::VALUE2 } } #[doc = "Field `EV1LM` writer - Event 1 Level Selection"] -pub type Ev1lmW<'a, REG> = crate::BitWriter<'a, REG, Ev1lm>; -impl<'a, REG> Ev1lmW<'a, REG> +pub type EV1LM_W<'a, REG> = crate::BitWriter<'a, REG, EV1LM_A>; +impl<'a, REG> EV1LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1lm::Value1) + self.variant(EV1LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1lm::Value2) + self.variant(EV1LM_A::VALUE2) } } #[doc = "Event 2 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev2lm { +pub enum EV2LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev2lm) -> Self { + fn from(variant: EV2LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV2LM` reader - Event 2 Level Selection"] -pub type Ev2lmR = crate::BitReader; -impl Ev2lmR { +pub type EV2LM_R = crate::BitReader; +impl EV2LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2lm { + pub const fn variant(&self) -> EV2LM_A { match self.bits { - false => Ev2lm::Value1, - true => Ev2lm::Value2, + false => EV2LM_A::VALUE1, + true => EV2LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2lm::Value1 + *self == EV2LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2lm::Value2 + *self == EV2LM_A::VALUE2 } } #[doc = "Field `EV2LM` writer - Event 2 Level Selection"] -pub type Ev2lmW<'a, REG> = crate::BitWriter<'a, REG, Ev2lm>; -impl<'a, REG> Ev2lmW<'a, REG> +pub type EV2LM_W<'a, REG> = crate::BitWriter<'a, REG, EV2LM_A>; +impl<'a, REG> EV2LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2lm::Value1) + self.variant(EV2LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2lm::Value2) + self.variant(EV2LM_A::VALUE2) } } #[doc = "Event 0 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf0m { +pub enum LPF0M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf0m) -> Self { + fn from(variant: LPF0M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf0m { +impl crate::FieldSpec for LPF0M_A { type Ux = u8; } -impl crate::IsEnum for Lpf0m {} +impl crate::IsEnum for LPF0M_A {} #[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] -pub type Lpf0mR = crate::FieldReader; -impl Lpf0mR { +pub type LPF0M_R = crate::FieldReader; +impl LPF0M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf0m { + pub const fn variant(&self) -> LPF0M_A { match self.bits { - 0 => Lpf0m::Value1, - 1 => Lpf0m::Value2, - 2 => Lpf0m::Value3, - 3 => Lpf0m::Value4, + 0 => LPF0M_A::VALUE1, + 1 => LPF0M_A::VALUE2, + 2 => LPF0M_A::VALUE3, + 3 => LPF0M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf0m::Value1 + *self == LPF0M_A::VALUE1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf0m::Value2 + *self == LPF0M_A::VALUE2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf0m::Value3 + *self == LPF0M_A::VALUE3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf0m::Value4 + *self == LPF0M_A::VALUE4 } } #[doc = "Field `LPF0M` writer - Event 0 Low Pass Filter Configuration"] -pub type Lpf0mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf0m, crate::Safe>; -impl<'a, REG> Lpf0mW<'a, REG> +pub type LPF0M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF0M_A, crate::Safe>; +impl<'a, REG> LPF0M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1213,85 +1213,85 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value1) + self.variant(LPF0M_A::VALUE1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value2) + self.variant(LPF0M_A::VALUE2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value3) + self.variant(LPF0M_A::VALUE3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value4) + self.variant(LPF0M_A::VALUE4) } } #[doc = "Event 1 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf1m { +pub enum LPF1M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf1m) -> Self { + fn from(variant: LPF1M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf1m { +impl crate::FieldSpec for LPF1M_A { type Ux = u8; } -impl crate::IsEnum for Lpf1m {} +impl crate::IsEnum for LPF1M_A {} #[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] -pub type Lpf1mR = crate::FieldReader; -impl Lpf1mR { +pub type LPF1M_R = crate::FieldReader; +impl LPF1M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf1m { + pub const fn variant(&self) -> LPF1M_A { match self.bits { - 0 => Lpf1m::Value1, - 1 => Lpf1m::Value2, - 2 => Lpf1m::Value3, - 3 => Lpf1m::Value4, + 0 => LPF1M_A::VALUE1, + 1 => LPF1M_A::VALUE2, + 2 => LPF1M_A::VALUE3, + 3 => LPF1M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf1m::Value1 + *self == LPF1M_A::VALUE1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf1m::Value2 + *self == LPF1M_A::VALUE2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf1m::Value3 + *self == LPF1M_A::VALUE3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf1m::Value4 + *self == LPF1M_A::VALUE4 } } #[doc = "Field `LPF1M` writer - Event 1 Low Pass Filter Configuration"] -pub type Lpf1mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf1m, crate::Safe>; -impl<'a, REG> Lpf1mW<'a, REG> +pub type LPF1M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF1M_A, crate::Safe>; +impl<'a, REG> LPF1M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1299,85 +1299,85 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value1) + self.variant(LPF1M_A::VALUE1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value2) + self.variant(LPF1M_A::VALUE2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value3) + self.variant(LPF1M_A::VALUE3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value4) + self.variant(LPF1M_A::VALUE4) } } #[doc = "Event 2 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf2m { +pub enum LPF2M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU4"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU4"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf2m) -> Self { + fn from(variant: LPF2M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf2m { +impl crate::FieldSpec for LPF2M_A { type Ux = u8; } -impl crate::IsEnum for Lpf2m {} +impl crate::IsEnum for LPF2M_A {} #[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] -pub type Lpf2mR = crate::FieldReader; -impl Lpf2mR { +pub type LPF2M_R = crate::FieldReader; +impl LPF2M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf2m { + pub const fn variant(&self) -> LPF2M_A { match self.bits { - 0 => Lpf2m::Value1, - 1 => Lpf2m::Value2, - 2 => Lpf2m::Value3, - 3 => Lpf2m::Value4, + 0 => LPF2M_A::VALUE1, + 1 => LPF2M_A::VALUE2, + 2 => LPF2M_A::VALUE3, + 3 => LPF2M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf2m::Value1 + *self == LPF2M_A::VALUE1 } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf2m::Value2 + *self == LPF2M_A::VALUE2 } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf2m::Value3 + *self == LPF2M_A::VALUE3 } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf2m::Value4 + *self == LPF2M_A::VALUE4 } } #[doc = "Field `LPF2M` writer - Event 2 Low Pass Filter Configuration"] -pub type Lpf2mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf2m, crate::Safe>; -impl<'a, REG> Lpf2mW<'a, REG> +pub type LPF2M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF2M_A, crate::Safe>; +impl<'a, REG> LPF2M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1385,174 +1385,174 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value1) + self.variant(LPF2M_A::VALUE1) } #[doc = "3 clock cycles of fCCU4"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value2) + self.variant(LPF2M_A::VALUE2) } #[doc = "5 clock cycles of fCCU4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value3) + self.variant(LPF2M_A::VALUE3) } #[doc = "7 clock cycles of fCCU4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value4) + self.variant(LPF2M_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - pub fn ev0is(&self) -> Ev0isR { - Ev0isR::new((self.bits & 0x0f) as u8) + pub fn ev0is(&self) -> EV0IS_R { + EV0IS_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - pub fn ev1is(&self) -> Ev1isR { - Ev1isR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn ev1is(&self) -> EV1IS_R { + EV1IS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - pub fn ev2is(&self) -> Ev2isR { - Ev2isR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn ev2is(&self) -> EV2IS_R { + EV2IS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - pub fn ev0em(&self) -> Ev0emR { - Ev0emR::new(((self.bits >> 16) & 3) as u8) + pub fn ev0em(&self) -> EV0EM_R { + EV0EM_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - pub fn ev1em(&self) -> Ev1emR { - Ev1emR::new(((self.bits >> 18) & 3) as u8) + pub fn ev1em(&self) -> EV1EM_R { + EV1EM_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - pub fn ev2em(&self) -> Ev2emR { - Ev2emR::new(((self.bits >> 20) & 3) as u8) + pub fn ev2em(&self) -> EV2EM_R { + EV2EM_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - pub fn ev0lm(&self) -> Ev0lmR { - Ev0lmR::new(((self.bits >> 22) & 1) != 0) + pub fn ev0lm(&self) -> EV0LM_R { + EV0LM_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - pub fn ev1lm(&self) -> Ev1lmR { - Ev1lmR::new(((self.bits >> 23) & 1) != 0) + pub fn ev1lm(&self) -> EV1LM_R { + EV1LM_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - pub fn ev2lm(&self) -> Ev2lmR { - Ev2lmR::new(((self.bits >> 24) & 1) != 0) + pub fn ev2lm(&self) -> EV2LM_R { + EV2LM_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf0m(&self) -> Lpf0mR { - Lpf0mR::new(((self.bits >> 25) & 3) as u8) + pub fn lpf0m(&self) -> LPF0M_R { + LPF0M_R::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf1m(&self) -> Lpf1mR { - Lpf1mR::new(((self.bits >> 27) & 3) as u8) + pub fn lpf1m(&self) -> LPF1M_R { + LPF1M_R::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf2m(&self) -> Lpf2mR { - Lpf2mR::new(((self.bits >> 29) & 3) as u8) + pub fn lpf2m(&self) -> LPF2M_R { + LPF2M_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] #[must_use] - pub fn ev0is(&mut self) -> Ev0isW { - Ev0isW::new(self, 0) + pub fn ev0is(&mut self) -> EV0IS_W { + EV0IS_W::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] #[must_use] - pub fn ev1is(&mut self) -> Ev1isW { - Ev1isW::new(self, 4) + pub fn ev1is(&mut self) -> EV1IS_W { + EV1IS_W::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] #[must_use] - pub fn ev2is(&mut self) -> Ev2isW { - Ev2isW::new(self, 8) + pub fn ev2is(&mut self) -> EV2IS_W { + EV2IS_W::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev0em(&mut self) -> Ev0emW { - Ev0emW::new(self, 16) + pub fn ev0em(&mut self) -> EV0EM_W { + EV0EM_W::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev1em(&mut self) -> Ev1emW { - Ev1emW::new(self, 18) + pub fn ev1em(&mut self) -> EV1EM_W { + EV1EM_W::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev2em(&mut self) -> Ev2emW { - Ev2emW::new(self, 20) + pub fn ev2em(&mut self) -> EV2EM_W { + EV2EM_W::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] #[must_use] - pub fn ev0lm(&mut self) -> Ev0lmW { - Ev0lmW::new(self, 22) + pub fn ev0lm(&mut self) -> EV0LM_W { + EV0LM_W::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] #[must_use] - pub fn ev1lm(&mut self) -> Ev1lmW { - Ev1lmW::new(self, 23) + pub fn ev1lm(&mut self) -> EV1LM_W { + EV1LM_W::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] #[must_use] - pub fn ev2lm(&mut self) -> Ev2lmW { - Ev2lmW::new(self, 24) + pub fn ev2lm(&mut self) -> EV2LM_W { + EV2LM_W::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf0m(&mut self) -> Lpf0mW { - Lpf0mW::new(self, 25) + pub fn lpf0m(&mut self) -> LPF0M_W { + LPF0M_W::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf1m(&mut self) -> Lpf1mW { - Lpf1mW::new(self, 27) + pub fn lpf1m(&mut self) -> LPF1M_W { + LPF1M_W::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf2m(&mut self) -> Lpf2mW { - Lpf2mW::new(self, 29) + pub fn lpf2m(&mut self) -> LPF2M_W { + LPF2M_W::new(self, 29) } } #[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InsSpec; -impl crate::RegisterSpec for InsSpec { +pub struct INS_SPEC; +impl crate::RegisterSpec for INS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ins::R`](R) reader structure"] -impl crate::Readable for InsSpec {} +impl crate::Readable for INS_SPEC {} #[doc = "`write(|w| ..)` method takes [`ins::W`](W) writer structure"] -impl crate::Writable for InsSpec { +impl crate::Writable for INS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INS to value 0"] -impl crate::Resettable for InsSpec { +impl crate::Resettable for INS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/inte.rs b/src/ccu40_cc40/inte.rs index cf7c05ec..78e3d3de 100644 --- a/src/ccu40_cc40/inte.rs +++ b/src/ccu40_cc40/inte.rs @@ -1,473 +1,473 @@ #[doc = "Register `INTE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Period match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pme { +pub enum PME_A { #[doc = "0: Period Match interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Period Match interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pme) -> Self { + fn from(variant: PME_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PME` reader - Period match while counting up enable"] -pub type PmeR = crate::BitReader; -impl PmeR { +pub type PME_R = crate::BitReader; +impl PME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pme { + pub const fn variant(&self) -> PME_A { match self.bits { - false => Pme::Value1, - true => Pme::Value2, + false => PME_A::VALUE1, + true => PME_A::VALUE2, } } #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pme::Value1 + *self == PME_A::VALUE1 } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pme::Value2 + *self == PME_A::VALUE2 } } #[doc = "Field `PME` writer - Period match while counting up enable"] -pub type PmeW<'a, REG> = crate::BitWriter<'a, REG, Pme>; -impl<'a, REG> PmeW<'a, REG> +pub type PME_W<'a, REG> = crate::BitWriter<'a, REG, PME_A>; +impl<'a, REG> PME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pme::Value1) + self.variant(PME_A::VALUE1) } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pme::Value2) + self.variant(PME_A::VALUE2) } } #[doc = "One match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ome { +pub enum OME_A { #[doc = "0: One Match interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One Match interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ome) -> Self { + fn from(variant: OME_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OME` reader - One match while counting down enable"] -pub type OmeR = crate::BitReader; -impl OmeR { +pub type OME_R = crate::BitReader; +impl OME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ome { + pub const fn variant(&self) -> OME_A { match self.bits { - false => Ome::Value1, - true => Ome::Value2, + false => OME_A::VALUE1, + true => OME_A::VALUE2, } } #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ome::Value1 + *self == OME_A::VALUE1 } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ome::Value2 + *self == OME_A::VALUE2 } } #[doc = "Field `OME` writer - One match while counting down enable"] -pub type OmeW<'a, REG> = crate::BitWriter<'a, REG, Ome>; -impl<'a, REG> OmeW<'a, REG> +pub type OME_W<'a, REG> = crate::BitWriter<'a, REG, OME_A>; +impl<'a, REG> OME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ome::Value1) + self.variant(OME_A::VALUE1) } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ome::Value2) + self.variant(OME_A::VALUE2) } } #[doc = "Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmue { +pub enum CMUE_A { #[doc = "0: Compare Match while counting up interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmue) -> Self { + fn from(variant: CMUE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMUE` reader - Compare match while counting up enable"] -pub type CmueR = crate::BitReader; -impl CmueR { +pub type CMUE_R = crate::BitReader; +impl CMUE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmue { + pub const fn variant(&self) -> CMUE_A { match self.bits { - false => Cmue::Value1, - true => Cmue::Value2, + false => CMUE_A::VALUE1, + true => CMUE_A::VALUE2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmue::Value1 + *self == CMUE_A::VALUE1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmue::Value2 + *self == CMUE_A::VALUE2 } } #[doc = "Field `CMUE` writer - Compare match while counting up enable"] -pub type CmueW<'a, REG> = crate::BitWriter<'a, REG, Cmue>; -impl<'a, REG> CmueW<'a, REG> +pub type CMUE_W<'a, REG> = crate::BitWriter<'a, REG, CMUE_A>; +impl<'a, REG> CMUE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmue::Value1) + self.variant(CMUE_A::VALUE1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmue::Value2) + self.variant(CMUE_A::VALUE2) } } #[doc = "Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmde { +pub enum CMDE_A { #[doc = "0: Compare Match while counting down interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmde) -> Self { + fn from(variant: CMDE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMDE` reader - Compare match while counting down enable"] -pub type CmdeR = crate::BitReader; -impl CmdeR { +pub type CMDE_R = crate::BitReader; +impl CMDE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmde { + pub const fn variant(&self) -> CMDE_A { match self.bits { - false => Cmde::Value1, - true => Cmde::Value2, + false => CMDE_A::VALUE1, + true => CMDE_A::VALUE2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmde::Value1 + *self == CMDE_A::VALUE1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmde::Value2 + *self == CMDE_A::VALUE2 } } #[doc = "Field `CMDE` writer - Compare match while counting down enable"] -pub type CmdeW<'a, REG> = crate::BitWriter<'a, REG, Cmde>; -impl<'a, REG> CmdeW<'a, REG> +pub type CMDE_W<'a, REG> = crate::BitWriter<'a, REG, CMDE_A>; +impl<'a, REG> CMDE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmde::Value1) + self.variant(CMDE_A::VALUE1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmde::Value2) + self.variant(CMDE_A::VALUE2) } } #[doc = "Event 0 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0ae { +pub enum E0AE_A { #[doc = "0: Event 0 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 0 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0ae) -> Self { + fn from(variant: E0AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E0AE` reader - Event 0 interrupt enable"] -pub type E0aeR = crate::BitReader; -impl E0aeR { +pub type E0AE_R = crate::BitReader; +impl E0AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0ae { + pub const fn variant(&self) -> E0AE_A { match self.bits { - false => E0ae::Value1, - true => E0ae::Value2, + false => E0AE_A::VALUE1, + true => E0AE_A::VALUE2, } } #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0ae::Value1 + *self == E0AE_A::VALUE1 } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0ae::Value2 + *self == E0AE_A::VALUE2 } } #[doc = "Field `E0AE` writer - Event 0 interrupt enable"] -pub type E0aeW<'a, REG> = crate::BitWriter<'a, REG, E0ae>; -impl<'a, REG> E0aeW<'a, REG> +pub type E0AE_W<'a, REG> = crate::BitWriter<'a, REG, E0AE_A>; +impl<'a, REG> E0AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0ae::Value1) + self.variant(E0AE_A::VALUE1) } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0ae::Value2) + self.variant(E0AE_A::VALUE2) } } #[doc = "Event 1 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1ae { +pub enum E1AE_A { #[doc = "0: Event 1 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 1 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1ae) -> Self { + fn from(variant: E1AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E1AE` reader - Event 1 interrupt enable"] -pub type E1aeR = crate::BitReader; -impl E1aeR { +pub type E1AE_R = crate::BitReader; +impl E1AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1ae { + pub const fn variant(&self) -> E1AE_A { match self.bits { - false => E1ae::Value1, - true => E1ae::Value2, + false => E1AE_A::VALUE1, + true => E1AE_A::VALUE2, } } #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1ae::Value1 + *self == E1AE_A::VALUE1 } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1ae::Value2 + *self == E1AE_A::VALUE2 } } #[doc = "Field `E1AE` writer - Event 1 interrupt enable"] -pub type E1aeW<'a, REG> = crate::BitWriter<'a, REG, E1ae>; -impl<'a, REG> E1aeW<'a, REG> +pub type E1AE_W<'a, REG> = crate::BitWriter<'a, REG, E1AE_A>; +impl<'a, REG> E1AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1ae::Value1) + self.variant(E1AE_A::VALUE1) } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1ae::Value2) + self.variant(E1AE_A::VALUE2) } } #[doc = "Event 2 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2ae { +pub enum E2AE_A { #[doc = "0: Event 2 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 2 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2ae) -> Self { + fn from(variant: E2AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E2AE` reader - Event 2 interrupt enable"] -pub type E2aeR = crate::BitReader; -impl E2aeR { +pub type E2AE_R = crate::BitReader; +impl E2AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2ae { + pub const fn variant(&self) -> E2AE_A { match self.bits { - false => E2ae::Value1, - true => E2ae::Value2, + false => E2AE_A::VALUE1, + true => E2AE_A::VALUE2, } } #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2ae::Value1 + *self == E2AE_A::VALUE1 } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2ae::Value2 + *self == E2AE_A::VALUE2 } } #[doc = "Field `E2AE` writer - Event 2 interrupt enable"] -pub type E2aeW<'a, REG> = crate::BitWriter<'a, REG, E2ae>; -impl<'a, REG> E2aeW<'a, REG> +pub type E2AE_W<'a, REG> = crate::BitWriter<'a, REG, E2AE_A>; +impl<'a, REG> E2AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2ae::Value1) + self.variant(E2AE_A::VALUE1) } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2ae::Value2) + self.variant(E2AE_A::VALUE2) } } impl R { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - pub fn pme(&self) -> PmeR { - PmeR::new((self.bits & 1) != 0) + pub fn pme(&self) -> PME_R { + PME_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - pub fn ome(&self) -> OmeR { - OmeR::new(((self.bits >> 1) & 1) != 0) + pub fn ome(&self) -> OME_R { + OME_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare match while counting up enable"] #[inline(always)] - pub fn cmue(&self) -> CmueR { - CmueR::new(((self.bits >> 2) & 1) != 0) + pub fn cmue(&self) -> CMUE_R { + CMUE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Compare match while counting down enable"] #[inline(always)] - pub fn cmde(&self) -> CmdeR { - CmdeR::new(((self.bits >> 3) & 1) != 0) + pub fn cmde(&self) -> CMDE_R { + CMDE_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - pub fn e0ae(&self) -> E0aeR { - E0aeR::new(((self.bits >> 8) & 1) != 0) + pub fn e0ae(&self) -> E0AE_R { + E0AE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - pub fn e1ae(&self) -> E1aeR { - E1aeR::new(((self.bits >> 9) & 1) != 0) + pub fn e1ae(&self) -> E1AE_R { + E1AE_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - pub fn e2ae(&self) -> E2aeR { - E2aeR::new(((self.bits >> 10) & 1) != 0) + pub fn e2ae(&self) -> E2AE_R { + E2AE_R::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] #[must_use] - pub fn pme(&mut self) -> PmeW { - PmeW::new(self, 0) + pub fn pme(&mut self) -> PME_W { + PME_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] #[must_use] - pub fn ome(&mut self) -> OmeW { - OmeW::new(self, 1) + pub fn ome(&mut self) -> OME_W { + OME_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmue(&mut self) -> CmueW { - CmueW::new(self, 2) + pub fn cmue(&mut self) -> CMUE_W { + CMUE_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmde(&mut self) -> CmdeW { - CmdeW::new(self, 3) + pub fn cmde(&mut self) -> CMDE_W { + CMDE_W::new(self, 3) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] #[must_use] - pub fn e0ae(&mut self) -> E0aeW { - E0aeW::new(self, 8) + pub fn e0ae(&mut self) -> E0AE_W { + E0AE_W::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] #[must_use] - pub fn e1ae(&mut self) -> E1aeW { - E1aeW::new(self, 9) + pub fn e1ae(&mut self) -> E1AE_W { + E1AE_W::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] #[must_use] - pub fn e2ae(&mut self) -> E2aeW { - E2aeW::new(self, 10) + pub fn e2ae(&mut self) -> E2AE_W { + E2AE_W::new(self, 10) } } #[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InteSpec; -impl crate::RegisterSpec for InteSpec { +pub struct INTE_SPEC; +impl crate::RegisterSpec for INTE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`inte::R`](R) reader structure"] -impl crate::Readable for InteSpec {} +impl crate::Readable for INTE_SPEC {} #[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"] -impl crate::Writable for InteSpec { +impl crate::Writable for INTE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTE to value 0"] -impl crate::Resettable for InteSpec { +impl crate::Resettable for INTE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/ints.rs b/src/ccu40_cc40/ints.rs index 3bf2fafc..b805c2c3 100644 --- a/src/ccu40_cc40/ints.rs +++ b/src/ccu40_cc40/ints.rs @@ -1,309 +1,309 @@ #[doc = "Register `INTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Period Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pmus { +pub enum PMUS_A { #[doc = "0: Period match while counting up not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Period match while counting up detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pmus) -> Self { + fn from(variant: PMUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PMUS` reader - Period Match while Counting Up"] -pub type PmusR = crate::BitReader; -impl PmusR { +pub type PMUS_R = crate::BitReader; +impl PMUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pmus { + pub const fn variant(&self) -> PMUS_A { match self.bits { - false => Pmus::Value1, - true => Pmus::Value2, + false => PMUS_A::VALUE1, + true => PMUS_A::VALUE2, } } #[doc = "Period match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pmus::Value1 + *self == PMUS_A::VALUE1 } #[doc = "Period match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pmus::Value2 + *self == PMUS_A::VALUE2 } } #[doc = "One Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Omds { +pub enum OMDS_A { #[doc = "0: One match while counting down not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One match while counting down detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Omds) -> Self { + fn from(variant: OMDS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OMDS` reader - One Match while Counting Down"] -pub type OmdsR = crate::BitReader; -impl OmdsR { +pub type OMDS_R = crate::BitReader; +impl OMDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Omds { + pub const fn variant(&self) -> OMDS_A { match self.bits { - false => Omds::Value1, - true => Omds::Value2, + false => OMDS_A::VALUE1, + true => OMDS_A::VALUE2, } } #[doc = "One match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Omds::Value1 + *self == OMDS_A::VALUE1 } #[doc = "One match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Omds::Value2 + *self == OMDS_A::VALUE2 } } #[doc = "Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmus { +pub enum CMUS_A { #[doc = "0: Compare match while counting up not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting up detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmus) -> Self { + fn from(variant: CMUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMUS` reader - Compare Match while Counting Up"] -pub type CmusR = crate::BitReader; -impl CmusR { +pub type CMUS_R = crate::BitReader; +impl CMUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmus { + pub const fn variant(&self) -> CMUS_A { match self.bits { - false => Cmus::Value1, - true => Cmus::Value2, + false => CMUS_A::VALUE1, + true => CMUS_A::VALUE2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmus::Value1 + *self == CMUS_A::VALUE1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmus::Value2 + *self == CMUS_A::VALUE2 } } #[doc = "Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmds { +pub enum CMDS_A { #[doc = "0: Compare match while counting down not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting down detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmds) -> Self { + fn from(variant: CMDS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMDS` reader - Compare Match while Counting Down"] -pub type CmdsR = crate::BitReader; -impl CmdsR { +pub type CMDS_R = crate::BitReader; +impl CMDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmds { + pub const fn variant(&self) -> CMDS_A { match self.bits { - false => Cmds::Value1, - true => Cmds::Value2, + false => CMDS_A::VALUE1, + true => CMDS_A::VALUE2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmds::Value1 + *self == CMDS_A::VALUE1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmds::Value2 + *self == CMDS_A::VALUE2 } } #[doc = "Event 0 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0as { +pub enum E0AS_A { #[doc = "0: Event 0 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 0 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0as) -> Self { + fn from(variant: E0AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E0AS` reader - Event 0 Detection Status"] -pub type E0asR = crate::BitReader; -impl E0asR { +pub type E0AS_R = crate::BitReader; +impl E0AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0as { + pub const fn variant(&self) -> E0AS_A { match self.bits { - false => E0as::Value1, - true => E0as::Value2, + false => E0AS_A::VALUE1, + true => E0AS_A::VALUE2, } } #[doc = "Event 0 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0as::Value1 + *self == E0AS_A::VALUE1 } #[doc = "Event 0 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0as::Value2 + *self == E0AS_A::VALUE2 } } #[doc = "Event 1 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1as { +pub enum E1AS_A { #[doc = "0: Event 1 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 1 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1as) -> Self { + fn from(variant: E1AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E1AS` reader - Event 1 Detection Status"] -pub type E1asR = crate::BitReader; -impl E1asR { +pub type E1AS_R = crate::BitReader; +impl E1AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1as { + pub const fn variant(&self) -> E1AS_A { match self.bits { - false => E1as::Value1, - true => E1as::Value2, + false => E1AS_A::VALUE1, + true => E1AS_A::VALUE2, } } #[doc = "Event 1 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1as::Value1 + *self == E1AS_A::VALUE1 } #[doc = "Event 1 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1as::Value2 + *self == E1AS_A::VALUE2 } } #[doc = "Event 2 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2as { +pub enum E2AS_A { #[doc = "0: Event 2 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 2 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2as) -> Self { + fn from(variant: E2AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E2AS` reader - Event 2 Detection Status"] -pub type E2asR = crate::BitReader; -impl E2asR { +pub type E2AS_R = crate::BitReader; +impl E2AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2as { + pub const fn variant(&self) -> E2AS_A { match self.bits { - false => E2as::Value1, - true => E2as::Value2, + false => E2AS_A::VALUE1, + true => E2AS_A::VALUE2, } } #[doc = "Event 2 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2as::Value1 + *self == E2AS_A::VALUE1 } #[doc = "Event 2 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2as::Value2 + *self == E2AS_A::VALUE2 } } #[doc = "Field `TRPF` reader - Trap Flag Status"] -pub type TrpfR = crate::BitReader; +pub type TRPF_R = crate::BitReader; impl R { #[doc = "Bit 0 - Period Match while Counting Up"] #[inline(always)] - pub fn pmus(&self) -> PmusR { - PmusR::new((self.bits & 1) != 0) + pub fn pmus(&self) -> PMUS_R { + PMUS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One Match while Counting Down"] #[inline(always)] - pub fn omds(&self) -> OmdsR { - OmdsR::new(((self.bits >> 1) & 1) != 0) + pub fn omds(&self) -> OMDS_R { + OMDS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Compare Match while Counting Up"] #[inline(always)] - pub fn cmus(&self) -> CmusR { - CmusR::new(((self.bits >> 2) & 1) != 0) + pub fn cmus(&self) -> CMUS_R { + CMUS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Compare Match while Counting Down"] #[inline(always)] - pub fn cmds(&self) -> CmdsR { - CmdsR::new(((self.bits >> 3) & 1) != 0) + pub fn cmds(&self) -> CMDS_R { + CMDS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Event 0 Detection Status"] #[inline(always)] - pub fn e0as(&self) -> E0asR { - E0asR::new(((self.bits >> 8) & 1) != 0) + pub fn e0as(&self) -> E0AS_R { + E0AS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 Detection Status"] #[inline(always)] - pub fn e1as(&self) -> E1asR { - E1asR::new(((self.bits >> 9) & 1) != 0) + pub fn e1as(&self) -> E1AS_R { + E1AS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 Detection Status"] #[inline(always)] - pub fn e2as(&self) -> E2asR { - E2asR::new(((self.bits >> 10) & 1) != 0) + pub fn e2as(&self) -> E2AS_R { + E2AS_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Trap Flag Status"] #[inline(always)] - pub fn trpf(&self) -> TrpfR { - TrpfR::new(((self.bits >> 11) & 1) != 0) + pub fn trpf(&self) -> TRPF_R { + TRPF_R::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IntsSpec; -impl crate::RegisterSpec for IntsSpec { +pub struct INTS_SPEC; +impl crate::RegisterSpec for INTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ints::R`](R) reader structure"] -impl crate::Readable for IntsSpec {} +impl crate::Readable for INTS_SPEC {} #[doc = "`reset()` method sets INTS to value 0"] -impl crate::Resettable for IntsSpec { +impl crate::Resettable for INTS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/pr.rs b/src/ccu40_cc40/pr.rs index 48f8c561..33893da5 100644 --- a/src/ccu40_cc40/pr.rs +++ b/src/ccu40_cc40/pr.rs @@ -1,22 +1,22 @@ #[doc = "Register `PR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PR` reader - Period Register"] -pub type PrR = crate::FieldReader; +pub type PR_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn pr(&self) -> PrR { - PrR::new((self.bits & 0xffff) as u16) + pub fn pr(&self) -> PR_R { + PR_R::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrSpec; -impl crate::RegisterSpec for PrSpec { +pub struct PR_SPEC; +impl crate::RegisterSpec for PR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pr::R`](R) reader structure"] -impl crate::Readable for PrSpec {} +impl crate::Readable for PR_SPEC {} #[doc = "`reset()` method sets PR to value 0"] -impl crate::Resettable for PrSpec { +impl crate::Resettable for PR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/prs.rs b/src/ccu40_cc40/prs.rs index d281b0ba..b8d77680 100644 --- a/src/ccu40_cc40/prs.rs +++ b/src/ccu40_cc40/prs.rs @@ -1,40 +1,40 @@ #[doc = "Register `PRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRS` reader - Period Register"] -pub type PrsR = crate::FieldReader; +pub type PRS_R = crate::FieldReader; #[doc = "Field `PRS` writer - Period Register"] -pub type PrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn prs(&self) -> PrsR { - PrsR::new((self.bits & 0xffff) as u16) + pub fn prs(&self) -> PRS_R { + PRS_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PrsW { - PrsW::new(self, 0) + pub fn prs(&mut self) -> PRS_W { + PRS_W::new(self, 0) } } #[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrsSpec; -impl crate::RegisterSpec for PrsSpec { +pub struct PRS_SPEC; +impl crate::RegisterSpec for PRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prs::R`](R) reader structure"] -impl crate::Readable for PrsSpec {} +impl crate::Readable for PRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`prs::W`](W) writer structure"] -impl crate::Writable for PrsSpec { +impl crate::Writable for PRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS to value 0"] -impl crate::Resettable for PrsSpec { +impl crate::Resettable for PRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/psc.rs b/src/ccu40_cc40/psc.rs index f5e97989..0b0a874e 100644 --- a/src/ccu40_cc40/psc.rs +++ b/src/ccu40_cc40/psc.rs @@ -1,40 +1,40 @@ #[doc = "Register `PSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PSIV` reader - Prescaler Initial Value"] -pub type PsivR = crate::FieldReader; +pub type PSIV_R = crate::FieldReader; #[doc = "Field `PSIV` writer - Prescaler Initial Value"] -pub type PsivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PSIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - pub fn psiv(&self) -> PsivR { - PsivR::new((self.bits & 0x0f) as u8) + pub fn psiv(&self) -> PSIV_R { + PSIV_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] #[must_use] - pub fn psiv(&mut self) -> PsivW { - PsivW::new(self, 0) + pub fn psiv(&mut self) -> PSIV_W { + PSIV_W::new(self, 0) } } #[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PscSpec; -impl crate::RegisterSpec for PscSpec { +pub struct PSC_SPEC; +impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psc::R`](R) reader structure"] -impl crate::Readable for PscSpec {} +impl crate::Readable for PSC_SPEC {} #[doc = "`write(|w| ..)` method takes [`psc::W`](W) writer structure"] -impl crate::Writable for PscSpec { +impl crate::Writable for PSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSC to value 0"] -impl crate::Resettable for PscSpec { +impl crate::Resettable for PSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/psl.rs b/src/ccu40_cc40/psl.rs index 9407d22f..488aad06 100644 --- a/src/ccu40_cc40/psl.rs +++ b/src/ccu40_cc40/psl.rs @@ -1,89 +1,89 @@ #[doc = "Register `PSL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Output Passive Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl { +pub enum PSL_A { #[doc = "0: Passive Level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive Level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl) -> Self { + fn from(variant: PSL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL` reader - Output Passive Level"] -pub type PslR = crate::BitReader; -impl PslR { +pub type PSL_R = crate::BitReader; +impl PSL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl { + pub const fn variant(&self) -> PSL_A { match self.bits { - false => Psl::Value1, - true => Psl::Value2, + false => PSL_A::VALUE1, + true => PSL_A::VALUE2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl::Value1 + *self == PSL_A::VALUE1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl::Value2 + *self == PSL_A::VALUE2 } } #[doc = "Field `PSL` writer - Output Passive Level"] -pub type PslW<'a, REG> = crate::BitWriter<'a, REG, Psl>; -impl<'a, REG> PslW<'a, REG> +pub type PSL_W<'a, REG> = crate::BitWriter<'a, REG, PSL_A>; +impl<'a, REG> PSL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl::Value1) + self.variant(PSL_A::VALUE1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl::Value2) + self.variant(PSL_A::VALUE2) } } impl R { #[doc = "Bit 0 - Output Passive Level"] #[inline(always)] - pub fn psl(&self) -> PslR { - PslR::new((self.bits & 1) != 0) + pub fn psl(&self) -> PSL_R { + PSL_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Passive Level"] #[inline(always)] #[must_use] - pub fn psl(&mut self) -> PslW { - PslW::new(self, 0) + pub fn psl(&mut self) -> PSL_W { + PSL_W::new(self, 0) } } #[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PslSpec; -impl crate::RegisterSpec for PslSpec { +pub struct PSL_SPEC; +impl crate::RegisterSpec for PSL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psl::R`](R) reader structure"] -impl crate::Readable for PslSpec {} +impl crate::Readable for PSL_SPEC {} #[doc = "`write(|w| ..)` method takes [`psl::W`](W) writer structure"] -impl crate::Writable for PslSpec { +impl crate::Writable for PSL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSL to value 0"] -impl crate::Resettable for PslSpec { +impl crate::Resettable for PSL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/srs.rs b/src/ccu40_cc40/srs.rs index f0aecaf4..cab372a8 100644 --- a/src/ccu40_cc40/srs.rs +++ b/src/ccu40_cc40/srs.rs @@ -1,68 +1,68 @@ #[doc = "Register `SRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Period/One match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Posr { +pub enum POSR_A { #[doc = "0: Forward to CC4ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC4ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC4ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC4ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Posr) -> Self { + fn from(variant: POSR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Posr { +impl crate::FieldSpec for POSR_A { type Ux = u8; } -impl crate::IsEnum for Posr {} +impl crate::IsEnum for POSR_A {} #[doc = "Field `POSR` reader - Period/One match Service request selector"] -pub type PosrR = crate::FieldReader; -impl PosrR { +pub type POSR_R = crate::FieldReader; +impl POSR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Posr { + pub const fn variant(&self) -> POSR_A { match self.bits { - 0 => Posr::Value1, - 1 => Posr::Value2, - 2 => Posr::Value3, - 3 => Posr::Value4, + 0 => POSR_A::VALUE1, + 1 => POSR_A::VALUE2, + 2 => POSR_A::VALUE3, + 3 => POSR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Posr::Value1 + *self == POSR_A::VALUE1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Posr::Value2 + *self == POSR_A::VALUE2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Posr::Value3 + *self == POSR_A::VALUE3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Posr::Value4 + *self == POSR_A::VALUE4 } } #[doc = "Field `POSR` writer - Period/One match Service request selector"] -pub type PosrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Posr, crate::Safe>; -impl<'a, REG> PosrW<'a, REG> +pub type POSR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, POSR_A, crate::Safe>; +impl<'a, REG> POSR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posr::Value1) + self.variant(POSR_A::VALUE1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posr::Value2) + self.variant(POSR_A::VALUE2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Posr::Value3) + self.variant(POSR_A::VALUE3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Posr::Value4) + self.variant(POSR_A::VALUE4) } } #[doc = "Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cmsr { +pub enum CMSR_A { #[doc = "0: Forward to CC4ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC4ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC4ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC4ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cmsr) -> Self { + fn from(variant: CMSR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cmsr { +impl crate::FieldSpec for CMSR_A { type Ux = u8; } -impl crate::IsEnum for Cmsr {} +impl crate::IsEnum for CMSR_A {} #[doc = "Field `CMSR` reader - Compare match Service request selector"] -pub type CmsrR = crate::FieldReader; -impl CmsrR { +pub type CMSR_R = crate::FieldReader; +impl CMSR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmsr { + pub const fn variant(&self) -> CMSR_A { match self.bits { - 0 => Cmsr::Value1, - 1 => Cmsr::Value2, - 2 => Cmsr::Value3, - 3 => Cmsr::Value4, + 0 => CMSR_A::VALUE1, + 1 => CMSR_A::VALUE2, + 2 => CMSR_A::VALUE3, + 3 => CMSR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmsr::Value1 + *self == CMSR_A::VALUE1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmsr::Value2 + *self == CMSR_A::VALUE2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cmsr::Value3 + *self == CMSR_A::VALUE3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cmsr::Value4 + *self == CMSR_A::VALUE4 } } #[doc = "Field `CMSR` writer - Compare match Service request selector"] -pub type CmsrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmsr, crate::Safe>; -impl<'a, REG> CmsrW<'a, REG> +pub type CMSR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CMSR_A, crate::Safe>; +impl<'a, REG> CMSR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmsr::Value1) + self.variant(CMSR_A::VALUE1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmsr::Value2) + self.variant(CMSR_A::VALUE2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cmsr::Value3) + self.variant(CMSR_A::VALUE3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cmsr::Value4) + self.variant(CMSR_A::VALUE4) } } #[doc = "Event 0 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E0sr { +pub enum E0SR_A { #[doc = "0: Forward to CC4ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC4ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC4ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC4ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E0sr) -> Self { + fn from(variant: E0SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E0sr { +impl crate::FieldSpec for E0SR_A { type Ux = u8; } -impl crate::IsEnum for E0sr {} +impl crate::IsEnum for E0SR_A {} #[doc = "Field `E0SR` reader - Event 0 Service request selector"] -pub type E0srR = crate::FieldReader; -impl E0srR { +pub type E0SR_R = crate::FieldReader; +impl E0SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0sr { + pub const fn variant(&self) -> E0SR_A { match self.bits { - 0 => E0sr::Value1, - 1 => E0sr::Value2, - 2 => E0sr::Value3, - 3 => E0sr::Value4, + 0 => E0SR_A::VALUE1, + 1 => E0SR_A::VALUE2, + 2 => E0SR_A::VALUE3, + 3 => E0SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0sr::Value1 + *self == E0SR_A::VALUE1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0sr::Value2 + *self == E0SR_A::VALUE2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E0sr::Value3 + *self == E0SR_A::VALUE3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E0sr::Value4 + *self == E0SR_A::VALUE4 } } #[doc = "Field `E0SR` writer - Event 0 Service request selector"] -pub type E0srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E0sr, crate::Safe>; -impl<'a, REG> E0srW<'a, REG> +pub type E0SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E0SR_A, crate::Safe>; +impl<'a, REG> E0SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0sr::Value1) + self.variant(E0SR_A::VALUE1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0sr::Value2) + self.variant(E0SR_A::VALUE2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E0sr::Value3) + self.variant(E0SR_A::VALUE3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E0sr::Value4) + self.variant(E0SR_A::VALUE4) } } #[doc = "Event 1 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E1sr { +pub enum E1SR_A { #[doc = "0: Forward to CC4ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC4ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC4ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC4ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E1sr) -> Self { + fn from(variant: E1SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E1sr { +impl crate::FieldSpec for E1SR_A { type Ux = u8; } -impl crate::IsEnum for E1sr {} +impl crate::IsEnum for E1SR_A {} #[doc = "Field `E1SR` reader - Event 1 Service request selector"] -pub type E1srR = crate::FieldReader; -impl E1srR { +pub type E1SR_R = crate::FieldReader; +impl E1SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1sr { + pub const fn variant(&self) -> E1SR_A { match self.bits { - 0 => E1sr::Value1, - 1 => E1sr::Value2, - 2 => E1sr::Value3, - 3 => E1sr::Value4, + 0 => E1SR_A::VALUE1, + 1 => E1SR_A::VALUE2, + 2 => E1SR_A::VALUE3, + 3 => E1SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1sr::Value1 + *self == E1SR_A::VALUE1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1sr::Value2 + *self == E1SR_A::VALUE2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E1sr::Value3 + *self == E1SR_A::VALUE3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E1sr::Value4 + *self == E1SR_A::VALUE4 } } #[doc = "Field `E1SR` writer - Event 1 Service request selector"] -pub type E1srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E1sr, crate::Safe>; -impl<'a, REG> E1srW<'a, REG> +pub type E1SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E1SR_A, crate::Safe>; +impl<'a, REG> E1SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1sr::Value1) + self.variant(E1SR_A::VALUE1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1sr::Value2) + self.variant(E1SR_A::VALUE2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E1sr::Value3) + self.variant(E1SR_A::VALUE3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E1sr::Value4) + self.variant(E1SR_A::VALUE4) } } #[doc = "Event 2 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E2sr { +pub enum E2SR_A { #[doc = "0: Forward to CC4ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC4ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC4ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC4ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E2sr) -> Self { + fn from(variant: E2SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E2sr { +impl crate::FieldSpec for E2SR_A { type Ux = u8; } -impl crate::IsEnum for E2sr {} +impl crate::IsEnum for E2SR_A {} #[doc = "Field `E2SR` reader - Event 2 Service request selector"] -pub type E2srR = crate::FieldReader; -impl E2srR { +pub type E2SR_R = crate::FieldReader; +impl E2SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2sr { + pub const fn variant(&self) -> E2SR_A { match self.bits { - 0 => E2sr::Value1, - 1 => E2sr::Value2, - 2 => E2sr::Value3, - 3 => E2sr::Value4, + 0 => E2SR_A::VALUE1, + 1 => E2SR_A::VALUE2, + 2 => E2SR_A::VALUE3, + 3 => E2SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2sr::Value1 + *self == E2SR_A::VALUE1 } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2sr::Value2 + *self == E2SR_A::VALUE2 } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E2sr::Value3 + *self == E2SR_A::VALUE3 } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E2sr::Value4 + *self == E2SR_A::VALUE4 } } #[doc = "Field `E2SR` writer - Event 2 Service request selector"] -pub type E2srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E2sr, crate::Safe>; -impl<'a, REG> E2srW<'a, REG> +pub type E2SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E2SR_A, crate::Safe>; +impl<'a, REG> E2SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,97 +414,97 @@ where #[doc = "Forward to CC4ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2sr::Value1) + self.variant(E2SR_A::VALUE1) } #[doc = "Forward to CC4ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2sr::Value2) + self.variant(E2SR_A::VALUE2) } #[doc = "Forward to CC4ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E2sr::Value3) + self.variant(E2SR_A::VALUE3) } #[doc = "Forward to CC4ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E2sr::Value4) + self.variant(E2SR_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - pub fn posr(&self) -> PosrR { - PosrR::new((self.bits & 3) as u8) + pub fn posr(&self) -> POSR_R { + POSR_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Compare match Service request selector"] #[inline(always)] - pub fn cmsr(&self) -> CmsrR { - CmsrR::new(((self.bits >> 2) & 3) as u8) + pub fn cmsr(&self) -> CMSR_R { + CMSR_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - pub fn e0sr(&self) -> E0srR { - E0srR::new(((self.bits >> 8) & 3) as u8) + pub fn e0sr(&self) -> E0SR_R { + E0SR_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - pub fn e1sr(&self) -> E1srR { - E1srR::new(((self.bits >> 10) & 3) as u8) + pub fn e1sr(&self) -> E1SR_R { + E1SR_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - pub fn e2sr(&self) -> E2srR { - E2srR::new(((self.bits >> 12) & 3) as u8) + pub fn e2sr(&self) -> E2SR_R { + E2SR_R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] #[must_use] - pub fn posr(&mut self) -> PosrW { - PosrW::new(self, 0) + pub fn posr(&mut self) -> POSR_W { + POSR_W::new(self, 0) } #[doc = "Bits 2:3 - Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cmsr(&mut self) -> CmsrW { - CmsrW::new(self, 2) + pub fn cmsr(&mut self) -> CMSR_W { + CMSR_W::new(self, 2) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] #[must_use] - pub fn e0sr(&mut self) -> E0srW { - E0srW::new(self, 8) + pub fn e0sr(&mut self) -> E0SR_W { + E0SR_W::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] #[must_use] - pub fn e1sr(&mut self) -> E1srW { - E1srW::new(self, 10) + pub fn e1sr(&mut self) -> E1SR_W { + E1SR_W::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] #[must_use] - pub fn e2sr(&mut self) -> E2srW { - E2srW::new(self, 12) + pub fn e2sr(&mut self) -> E2SR_W { + E2SR_W::new(self, 12) } } #[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrsSpec; -impl crate::RegisterSpec for SrsSpec { +pub struct SRS_SPEC; +impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srs::R`](R) reader structure"] -impl crate::Readable for SrsSpec {} +impl crate::Readable for SRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`srs::W`](W) writer structure"] -impl crate::Writable for SrsSpec { +impl crate::Writable for SRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRS to value 0"] -impl crate::Resettable for SrsSpec { +impl crate::Resettable for SRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/swr.rs b/src/ccu40_cc40/swr.rs index 580f7441..928ddf79 100644 --- a/src/ccu40_cc40/swr.rs +++ b/src/ccu40_cc40/swr.rs @@ -1,83 +1,83 @@ #[doc = "Register `SWR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPM` writer - Period match while counting up clear"] -pub type RpmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ROM` writer - One match while counting down clear"] -pub type RomW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ROM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCMU` writer - Compare match while counting up clear"] -pub type RcmuW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCMU_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCMD` writer - Compare match while counting down clear"] -pub type RcmdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCMD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE0A` writer - Event 0 detection clear"] -pub type Re0aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE0A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE1A` writer - Event 1 detection clear"] -pub type Re1aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE1A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE2A` writer - Event 2 detection clear"] -pub type Re2aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE2A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTRPF` writer - Trap Flag status clear"] -pub type RtrpfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] #[must_use] - pub fn rpm(&mut self) -> RpmW { - RpmW::new(self, 0) + pub fn rpm(&mut self) -> RPM_W { + RPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] #[must_use] - pub fn rom(&mut self) -> RomW { - RomW::new(self, 1) + pub fn rom(&mut self) -> ROM_W { + ROM_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcmu(&mut self) -> RcmuW { - RcmuW::new(self, 2) + pub fn rcmu(&mut self) -> RCMU_W { + RCMU_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcmd(&mut self) -> RcmdW { - RcmdW::new(self, 3) + pub fn rcmd(&mut self) -> RCMD_W { + RCMD_W::new(self, 3) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] #[must_use] - pub fn re0a(&mut self) -> Re0aW { - Re0aW::new(self, 8) + pub fn re0a(&mut self) -> RE0A_W { + RE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] #[must_use] - pub fn re1a(&mut self) -> Re1aW { - Re1aW::new(self, 9) + pub fn re1a(&mut self) -> RE1A_W { + RE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] #[must_use] - pub fn re2a(&mut self) -> Re2aW { - Re2aW::new(self, 10) + pub fn re2a(&mut self) -> RE2A_W { + RE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] #[must_use] - pub fn rtrpf(&mut self) -> RtrpfW { - RtrpfW::new(self, 11) + pub fn rtrpf(&mut self) -> RTRPF_W { + RTRPF_W::new(self, 11) } } #[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwrSpec; -impl crate::RegisterSpec for SwrSpec { +pub struct SWR_SPEC; +impl crate::RegisterSpec for SWR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`swr::W`](W) writer structure"] -impl crate::Writable for SwrSpec { +impl crate::Writable for SWR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWR to value 0"] -impl crate::Resettable for SwrSpec { +impl crate::Resettable for SWR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/sws.rs b/src/ccu40_cc40/sws.rs index 9d3889d6..d1110959 100644 --- a/src/ccu40_cc40/sws.rs +++ b/src/ccu40_cc40/sws.rs @@ -1,83 +1,83 @@ #[doc = "Register `SWS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SPM` writer - Period match while counting up set"] -pub type SpmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOM` writer - One match while counting down set"] -pub type SomW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCMU` writer - Compare match while counting up set"] -pub type ScmuW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCMU_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCMD` writer - Compare match while counting down set"] -pub type ScmdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCMD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE0A` writer - Event 0 detection set"] -pub type Se0aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE0A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE1A` writer - Event 1 detection set"] -pub type Se1aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE1A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE2A` writer - Event 2 detection set"] -pub type Se2aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE2A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRPF` writer - Trap Flag status set"] -pub type StrpfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] #[must_use] - pub fn spm(&mut self) -> SpmW { - SpmW::new(self, 0) + pub fn spm(&mut self) -> SPM_W { + SPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] #[must_use] - pub fn som(&mut self) -> SomW { - SomW::new(self, 1) + pub fn som(&mut self) -> SOM_W { + SOM_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scmu(&mut self) -> ScmuW { - ScmuW::new(self, 2) + pub fn scmu(&mut self) -> SCMU_W { + SCMU_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scmd(&mut self) -> ScmdW { - ScmdW::new(self, 3) + pub fn scmd(&mut self) -> SCMD_W { + SCMD_W::new(self, 3) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] #[must_use] - pub fn se0a(&mut self) -> Se0aW { - Se0aW::new(self, 8) + pub fn se0a(&mut self) -> SE0A_W { + SE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] #[must_use] - pub fn se1a(&mut self) -> Se1aW { - Se1aW::new(self, 9) + pub fn se1a(&mut self) -> SE1A_W { + SE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] #[must_use] - pub fn se2a(&mut self) -> Se2aW { - Se2aW::new(self, 10) + pub fn se2a(&mut self) -> SE2A_W { + SE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] #[must_use] - pub fn strpf(&mut self) -> StrpfW { - StrpfW::new(self, 11) + pub fn strpf(&mut self) -> STRPF_W { + STRPF_W::new(self, 11) } } #[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwsSpec; -impl crate::RegisterSpec for SwsSpec { +pub struct SWS_SPEC; +impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sws::W`](W) writer structure"] -impl crate::Writable for SwsSpec { +impl crate::Writable for SWS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWS to value 0"] -impl crate::Resettable for SwsSpec { +impl crate::Resettable for SWS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tc.rs b/src/ccu40_cc40/tc.rs index 2487a2d3..17ee5086 100644 --- a/src/ccu40_cc40/tc.rs +++ b/src/ccu40_cc40/tc.rs @@ -1,267 +1,267 @@ #[doc = "Register `TC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Timer Counting Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tcm { +pub enum TCM_A { #[doc = "0: Edge aligned mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Center aligned mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tcm) -> Self { + fn from(variant: TCM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TCM` reader - Timer Counting Mode"] -pub type TcmR = crate::BitReader; -impl TcmR { +pub type TCM_R = crate::BitReader; +impl TCM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tcm { + pub const fn variant(&self) -> TCM_A { match self.bits { - false => Tcm::Value1, - true => Tcm::Value2, + false => TCM_A::VALUE1, + true => TCM_A::VALUE2, } } #[doc = "Edge aligned mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tcm::Value1 + *self == TCM_A::VALUE1 } #[doc = "Center aligned mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tcm::Value2 + *self == TCM_A::VALUE2 } } #[doc = "Field `TCM` writer - Timer Counting Mode"] -pub type TcmW<'a, REG> = crate::BitWriter<'a, REG, Tcm>; -impl<'a, REG> TcmW<'a, REG> +pub type TCM_W<'a, REG> = crate::BitWriter<'a, REG, TCM_A>; +impl<'a, REG> TCM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Edge aligned mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tcm::Value1) + self.variant(TCM_A::VALUE1) } #[doc = "Center aligned mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tcm::Value2) + self.variant(TCM_A::VALUE2) } } #[doc = "Timer Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tssm { +pub enum TSSM_A { #[doc = "0: Single shot mode is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single shot mode is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tssm) -> Self { + fn from(variant: TSSM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSSM` reader - Timer Single Shot Mode"] -pub type TssmR = crate::BitReader; -impl TssmR { +pub type TSSM_R = crate::BitReader; +impl TSSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tssm { + pub const fn variant(&self) -> TSSM_A { match self.bits { - false => Tssm::Value1, - true => Tssm::Value2, + false => TSSM_A::VALUE1, + true => TSSM_A::VALUE2, } } #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tssm::Value1 + *self == TSSM_A::VALUE1 } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tssm::Value2 + *self == TSSM_A::VALUE2 } } #[doc = "Field `TSSM` writer - Timer Single Shot Mode"] -pub type TssmW<'a, REG> = crate::BitWriter<'a, REG, Tssm>; -impl<'a, REG> TssmW<'a, REG> +pub type TSSM_W<'a, REG> = crate::BitWriter<'a, REG, TSSM_A>; +impl<'a, REG> TSSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tssm::Value1) + self.variant(TSSM_A::VALUE1) } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tssm::Value2) + self.variant(TSSM_A::VALUE2) } } #[doc = "Field `CLST` reader - Shadow Transfer on Clear"] -pub type ClstR = crate::BitReader; +pub type CLST_R = crate::BitReader; #[doc = "Field `CLST` writer - Shadow Transfer on Clear"] -pub type ClstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CLST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Capture Compare Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmod { +pub enum CMOD_A { #[doc = "0: Compare Mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture Mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmod) -> Self { + fn from(variant: CMOD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMOD` reader - Capture Compare Mode"] -pub type CmodR = crate::BitReader; -impl CmodR { +pub type CMOD_R = crate::BitReader; +impl CMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmod { + pub const fn variant(&self) -> CMOD_A { match self.bits { - false => Cmod::Value1, - true => Cmod::Value2, + false => CMOD_A::VALUE1, + true => CMOD_A::VALUE2, } } #[doc = "Compare Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmod::Value1 + *self == CMOD_A::VALUE1 } #[doc = "Capture Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmod::Value2 + *self == CMOD_A::VALUE2 } } #[doc = "Extended Capture Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ecm { +pub enum ECM_A { #[doc = "0: Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ecm) -> Self { + fn from(variant: ECM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ECM` reader - Extended Capture Mode"] -pub type EcmR = crate::BitReader; -impl EcmR { +pub type ECM_R = crate::BitReader; +impl ECM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ecm { + pub const fn variant(&self) -> ECM_A { match self.bits { - false => Ecm::Value1, - true => Ecm::Value2, + false => ECM_A::VALUE1, + true => ECM_A::VALUE2, } } #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ecm::Value1 + *self == ECM_A::VALUE1 } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ecm::Value2 + *self == ECM_A::VALUE2 } } #[doc = "Field `ECM` writer - Extended Capture Mode"] -pub type EcmW<'a, REG> = crate::BitWriter<'a, REG, Ecm>; -impl<'a, REG> EcmW<'a, REG> +pub type ECM_W<'a, REG> = crate::BitWriter<'a, REG, ECM_A>; +impl<'a, REG> ECM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ecm::Value1) + self.variant(ECM_A::VALUE1) } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRD register. When reading the ECRD register, only the capture register register full flag pointed by the ECRD.VPTR is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ecm::Value2) + self.variant(ECM_A::VALUE2) } } #[doc = "Clear on Capture Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Capc { +pub enum CAPC_A { #[doc = "0: Timer is never cleared on a capture event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Timer is always cleared in a capture event."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Capc) -> Self { + fn from(variant: CAPC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Capc { +impl crate::FieldSpec for CAPC_A { type Ux = u8; } -impl crate::IsEnum for Capc {} +impl crate::IsEnum for CAPC_A {} #[doc = "Field `CAPC` reader - Clear on Capture Control"] -pub type CapcR = crate::FieldReader; -impl CapcR { +pub type CAPC_R = crate::FieldReader; +impl CAPC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Capc { + pub const fn variant(&self) -> CAPC_A { match self.bits { - 0 => Capc::Value1, - 1 => Capc::Value2, - 2 => Capc::Value3, - 3 => Capc::Value4, + 0 => CAPC_A::VALUE1, + 1 => CAPC_A::VALUE2, + 2 => CAPC_A::VALUE3, + 3 => CAPC_A::VALUE4, _ => unreachable!(), } } #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Capc::Value1 + *self == CAPC_A::VALUE1 } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Capc::Value2 + *self == CAPC_A::VALUE2 } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Capc::Value3 + *self == CAPC_A::VALUE3 } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Capc::Value4 + *self == CAPC_A::VALUE4 } } #[doc = "Field `CAPC` writer - Clear on Capture Control"] -pub type CapcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Capc, crate::Safe>; -impl<'a, REG> CapcW<'a, REG> +pub type CAPC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAPC_A, crate::Safe>; +impl<'a, REG> CAPC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -269,77 +269,77 @@ where #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Capc::Value1) + self.variant(CAPC_A::VALUE1) } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Capc::Value2) + self.variant(CAPC_A::VALUE2) } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Capc::Value3) + self.variant(CAPC_A::VALUE3) } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Capc::Value4) + self.variant(CAPC_A::VALUE4) } } #[doc = "Extended Stop Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Endm { +pub enum ENDM_A { #[doc = "0: Clears the timer run bit only (default stop)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clears the timer only (flush)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clears the timer and run bit (flush/stop)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Endm) -> Self { + fn from(variant: ENDM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Endm { +impl crate::FieldSpec for ENDM_A { type Ux = u8; } -impl crate::IsEnum for Endm {} +impl crate::IsEnum for ENDM_A {} #[doc = "Field `ENDM` reader - Extended Stop Function Control"] -pub type EndmR = crate::FieldReader; -impl EndmR { +pub type ENDM_R = crate::FieldReader; +impl ENDM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Endm::Value1), - 1 => Some(Endm::Value2), - 2 => Some(Endm::Value3), + 0 => Some(ENDM_A::VALUE1), + 1 => Some(ENDM_A::VALUE2), + 2 => Some(ENDM_A::VALUE3), _ => None, } } #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Endm::Value1 + *self == ENDM_A::VALUE1 } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Endm::Value2 + *self == ENDM_A::VALUE2 } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Endm::Value3 + *self == ENDM_A::VALUE3 } } #[doc = "Field `ENDM` writer - Extended Stop Function Control"] -pub type EndmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Endm>; -impl<'a, REG> EndmW<'a, REG> +pub type ENDM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDM_A>; +impl<'a, REG> ENDM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -347,239 +347,239 @@ where #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Endm::Value1) + self.variant(ENDM_A::VALUE1) } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Endm::Value2) + self.variant(ENDM_A::VALUE2) } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Endm::Value3) + self.variant(ENDM_A::VALUE3) } } #[doc = "Extended Start Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Strm { +pub enum STRM_A { #[doc = "0: Sets run bit only (default start)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clears the timer and sets run bit (flush/start)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Strm) -> Self { + fn from(variant: STRM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STRM` reader - Extended Start Function Control"] -pub type StrmR = crate::BitReader; -impl StrmR { +pub type STRM_R = crate::BitReader; +impl STRM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Strm { + pub const fn variant(&self) -> STRM_A { match self.bits { - false => Strm::Value1, - true => Strm::Value2, + false => STRM_A::VALUE1, + true => STRM_A::VALUE2, } } #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Strm::Value1 + *self == STRM_A::VALUE1 } #[doc = "Clears the timer and sets run bit (flush/start)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Strm::Value2 + *self == STRM_A::VALUE2 } } #[doc = "Field `STRM` writer - Extended Start Function Control"] -pub type StrmW<'a, REG> = crate::BitWriter<'a, REG, Strm>; -impl<'a, REG> StrmW<'a, REG> +pub type STRM_W<'a, REG> = crate::BitWriter<'a, REG, STRM_A>; +impl<'a, REG> STRM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Strm::Value1) + self.variant(STRM_A::VALUE1) } #[doc = "Clears the timer and sets run bit (flush/start)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Strm::Value2) + self.variant(STRM_A::VALUE2) } } #[doc = "Equal Capture Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sce { +pub enum SCE_A { #[doc = "0: Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sce) -> Self { + fn from(variant: SCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCE` reader - Equal Capture Event enable"] -pub type SceR = crate::BitReader; -impl SceR { +pub type SCE_R = crate::BitReader; +impl SCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sce { + pub const fn variant(&self) -> SCE_A { match self.bits { - false => Sce::Value1, - true => Sce::Value2, + false => SCE_A::VALUE1, + true => SCE_A::VALUE2, } } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sce::Value1 + *self == SCE_A::VALUE1 } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sce::Value2 + *self == SCE_A::VALUE2 } } #[doc = "Field `SCE` writer - Equal Capture Event enable"] -pub type SceW<'a, REG> = crate::BitWriter<'a, REG, Sce>; -impl<'a, REG> SceW<'a, REG> +pub type SCE_W<'a, REG> = crate::BitWriter<'a, REG, SCE_A>; +impl<'a, REG> SCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sce::Value1) + self.variant(SCE_A::VALUE1) } #[doc = "Capture into CC4yC0VThis register contains the values associated with the Capture 0 field./CC4yC1VThis register contains the values associated with the Capture 1 field. and CC4yC3VThis register contains the values associated with the Capture 3 field./CC4yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sce::Value2) + self.variant(SCE_A::VALUE2) } } #[doc = "Continuous Capture Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccs { +pub enum CCS_A { #[doc = "0: The capture into a specific capture register is done with the rules linked with the full flags, described at ."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccs) -> Self { + fn from(variant: CCS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCS` reader - Continuous Capture Enable"] -pub type CcsR = crate::BitReader; -impl CcsR { +pub type CCS_R = crate::BitReader; +impl CCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccs { + pub const fn variant(&self) -> CCS_A { match self.bits { - false => Ccs::Value1, - true => Ccs::Value2, + false => CCS_A::VALUE1, + true => CCS_A::VALUE2, } } #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccs::Value1 + *self == CCS_A::VALUE1 } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccs::Value2 + *self == CCS_A::VALUE2 } } #[doc = "Field `CCS` writer - Continuous Capture Enable"] -pub type CcsW<'a, REG> = crate::BitWriter<'a, REG, Ccs>; -impl<'a, REG> CcsW<'a, REG> +pub type CCS_W<'a, REG> = crate::BitWriter<'a, REG, CCS_A>; +impl<'a, REG> CCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccs::Value1) + self.variant(CCS_A::VALUE1) } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccs::Value2) + self.variant(CCS_A::VALUE2) } } #[doc = "Dither Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dithe { +pub enum DITHE_A { #[doc = "0: Dither is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither is applied to the Period"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Dither is applied to the Compare"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Dither is applied to the Period and Compare"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dithe) -> Self { + fn from(variant: DITHE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dithe { +impl crate::FieldSpec for DITHE_A { type Ux = u8; } -impl crate::IsEnum for Dithe {} +impl crate::IsEnum for DITHE_A {} #[doc = "Field `DITHE` reader - Dither Enable"] -pub type DitheR = crate::FieldReader; -impl DitheR { +pub type DITHE_R = crate::FieldReader; +impl DITHE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dithe { + pub const fn variant(&self) -> DITHE_A { match self.bits { - 0 => Dithe::Value1, - 1 => Dithe::Value2, - 2 => Dithe::Value3, - 3 => Dithe::Value4, + 0 => DITHE_A::VALUE1, + 1 => DITHE_A::VALUE2, + 2 => DITHE_A::VALUE3, + 3 => DITHE_A::VALUE4, _ => unreachable!(), } } #[doc = "Dither is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dithe::Value1 + *self == DITHE_A::VALUE1 } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dithe::Value2 + *self == DITHE_A::VALUE2 } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dithe::Value3 + *self == DITHE_A::VALUE3 } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dithe::Value4 + *self == DITHE_A::VALUE4 } } #[doc = "Field `DITHE` writer - Dither Enable"] -pub type DitheW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dithe, crate::Safe>; -impl<'a, REG> DitheW<'a, REG> +pub type DITHE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DITHE_A, crate::Safe>; +impl<'a, REG> DITHE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -587,669 +587,669 @@ where #[doc = "Dither is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dithe::Value1) + self.variant(DITHE_A::VALUE1) } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dithe::Value2) + self.variant(DITHE_A::VALUE2) } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dithe::Value3) + self.variant(DITHE_A::VALUE3) } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dithe::Value4) + self.variant(DITHE_A::VALUE4) } } #[doc = "Dither input selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dim { +pub enum DIM_A { #[doc = "0: Slice is using its own dither unit"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Slice is connected to the dither unit of slice 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dim) -> Self { + fn from(variant: DIM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIM` reader - Dither input selector"] -pub type DimR = crate::BitReader; -impl DimR { +pub type DIM_R = crate::BitReader; +impl DIM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dim { + pub const fn variant(&self) -> DIM_A { match self.bits { - false => Dim::Value1, - true => Dim::Value2, + false => DIM_A::VALUE1, + true => DIM_A::VALUE2, } } #[doc = "Slice is using its own dither unit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dim::Value1 + *self == DIM_A::VALUE1 } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dim::Value2 + *self == DIM_A::VALUE2 } } #[doc = "Field `DIM` writer - Dither input selector"] -pub type DimW<'a, REG> = crate::BitWriter<'a, REG, Dim>; -impl<'a, REG> DimW<'a, REG> +pub type DIM_W<'a, REG> = crate::BitWriter<'a, REG, DIM_A>; +impl<'a, REG> DIM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Slice is using its own dither unit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dim::Value1) + self.variant(DIM_A::VALUE1) } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dim::Value2) + self.variant(DIM_A::VALUE2) } } #[doc = "Floating Prescaler enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fpe { +pub enum FPE_A { #[doc = "0: Floating prescaler mode is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Floating prescaler mode is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fpe) -> Self { + fn from(variant: FPE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FPE` reader - Floating Prescaler enable"] -pub type FpeR = crate::BitReader; -impl FpeR { +pub type FPE_R = crate::BitReader; +impl FPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fpe { + pub const fn variant(&self) -> FPE_A { match self.bits { - false => Fpe::Value1, - true => Fpe::Value2, + false => FPE_A::VALUE1, + true => FPE_A::VALUE2, } } #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fpe::Value1 + *self == FPE_A::VALUE1 } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fpe::Value2 + *self == FPE_A::VALUE2 } } #[doc = "Field `FPE` writer - Floating Prescaler enable"] -pub type FpeW<'a, REG> = crate::BitWriter<'a, REG, Fpe>; -impl<'a, REG> FpeW<'a, REG> +pub type FPE_W<'a, REG> = crate::BitWriter<'a, REG, FPE_A>; +impl<'a, REG> FPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fpe::Value1) + self.variant(FPE_A::VALUE1) } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fpe::Value2) + self.variant(FPE_A::VALUE2) } } #[doc = "TRAP enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trape { +pub enum TRAPE_A { #[doc = "0: TRAP functionality has no effect on the output"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP functionality affects the output"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trape) -> Self { + fn from(variant: TRAPE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRAPE` reader - TRAP enable"] -pub type TrapeR = crate::BitReader; -impl TrapeR { +pub type TRAPE_R = crate::BitReader; +impl TRAPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trape { + pub const fn variant(&self) -> TRAPE_A { match self.bits { - false => Trape::Value1, - true => Trape::Value2, + false => TRAPE_A::VALUE1, + true => TRAPE_A::VALUE2, } } #[doc = "TRAP functionality has no effect on the output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trape::Value1 + *self == TRAPE_A::VALUE1 } #[doc = "TRAP functionality affects the output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trape::Value2 + *self == TRAPE_A::VALUE2 } } #[doc = "Field `TRAPE` writer - TRAP enable"] -pub type TrapeW<'a, REG> = crate::BitWriter<'a, REG, Trape>; -impl<'a, REG> TrapeW<'a, REG> +pub type TRAPE_W<'a, REG> = crate::BitWriter<'a, REG, TRAPE_A>; +impl<'a, REG> TRAPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP functionality has no effect on the output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trape::Value1) + self.variant(TRAPE_A::VALUE1) } #[doc = "TRAP functionality affects the output"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trape::Value2) + self.variant(TRAPE_A::VALUE2) } } #[doc = "TRAP Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trpse { +pub enum TRPSE_A { #[doc = "0: Exiting from TRAP state isn't synchronized with the PWM signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Exiting from TRAP state is synchronized with the PWM signal"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trpse) -> Self { + fn from(variant: TRPSE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] -pub type TrpseR = crate::BitReader; -impl TrpseR { +pub type TRPSE_R = crate::BitReader; +impl TRPSE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trpse { + pub const fn variant(&self) -> TRPSE_A { match self.bits { - false => Trpse::Value1, - true => Trpse::Value2, + false => TRPSE_A::VALUE1, + true => TRPSE_A::VALUE2, } } #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trpse::Value1 + *self == TRPSE_A::VALUE1 } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trpse::Value2 + *self == TRPSE_A::VALUE2 } } #[doc = "Field `TRPSE` writer - TRAP Synchronization Enable"] -pub type TrpseW<'a, REG> = crate::BitWriter<'a, REG, Trpse>; -impl<'a, REG> TrpseW<'a, REG> +pub type TRPSE_W<'a, REG> = crate::BitWriter<'a, REG, TRPSE_A>; +impl<'a, REG> TRPSE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trpse::Value1) + self.variant(TRPSE_A::VALUE1) } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trpse::Value2) + self.variant(TRPSE_A::VALUE2) } } #[doc = "TRAP State Clear Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trpsw { +pub enum TRPSW_A { #[doc = "0: The slice exits the TRAP state automatically when the TRAP condition is not present"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The TRAP state can only be exited by a SW request."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trpsw) -> Self { + fn from(variant: TRPSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRPSW` reader - TRAP State Clear Control"] -pub type TrpswR = crate::BitReader; -impl TrpswR { +pub type TRPSW_R = crate::BitReader; +impl TRPSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trpsw { + pub const fn variant(&self) -> TRPSW_A { match self.bits { - false => Trpsw::Value1, - true => Trpsw::Value2, + false => TRPSW_A::VALUE1, + true => TRPSW_A::VALUE2, } } #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trpsw::Value1 + *self == TRPSW_A::VALUE1 } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trpsw::Value2 + *self == TRPSW_A::VALUE2 } } #[doc = "Field `TRPSW` writer - TRAP State Clear Control"] -pub type TrpswW<'a, REG> = crate::BitWriter<'a, REG, Trpsw>; -impl<'a, REG> TrpswW<'a, REG> +pub type TRPSW_W<'a, REG> = crate::BitWriter<'a, REG, TRPSW_A>; +impl<'a, REG> TRPSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trpsw::Value1) + self.variant(TRPSW_A::VALUE1) } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trpsw::Value2) + self.variant(TRPSW_A::VALUE2) } } #[doc = "External Modulation Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ems { +pub enum EMS_A { #[doc = "0: External Modulation functionality is not synchronized with the PWM signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Modulation functionality is synchronized with the PWM signal"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ems) -> Self { + fn from(variant: EMS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMS` reader - External Modulation Synchronization"] -pub type EmsR = crate::BitReader; -impl EmsR { +pub type EMS_R = crate::BitReader; +impl EMS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ems { + pub const fn variant(&self) -> EMS_A { match self.bits { - false => Ems::Value1, - true => Ems::Value2, + false => EMS_A::VALUE1, + true => EMS_A::VALUE2, } } #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ems::Value1 + *self == EMS_A::VALUE1 } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ems::Value2 + *self == EMS_A::VALUE2 } } #[doc = "Field `EMS` writer - External Modulation Synchronization"] -pub type EmsW<'a, REG> = crate::BitWriter<'a, REG, Ems>; -impl<'a, REG> EmsW<'a, REG> +pub type EMS_W<'a, REG> = crate::BitWriter<'a, REG, EMS_A>; +impl<'a, REG> EMS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ems::Value1) + self.variant(EMS_A::VALUE1) } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ems::Value2) + self.variant(EMS_A::VALUE2) } } #[doc = "External Modulation Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emt { +pub enum EMT_A { #[doc = "0: External Modulation functionality is clearing the CC4yST bit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Modulation functionality is gating the outputs."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emt) -> Self { + fn from(variant: EMT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMT` reader - External Modulation Type"] -pub type EmtR = crate::BitReader; -impl EmtR { +pub type EMT_R = crate::BitReader; +impl EMT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emt { + pub const fn variant(&self) -> EMT_A { match self.bits { - false => Emt::Value1, - true => Emt::Value2, + false => EMT_A::VALUE1, + true => EMT_A::VALUE2, } } #[doc = "External Modulation functionality is clearing the CC4yST bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emt::Value1 + *self == EMT_A::VALUE1 } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emt::Value2 + *self == EMT_A::VALUE2 } } #[doc = "Field `EMT` writer - External Modulation Type"] -pub type EmtW<'a, REG> = crate::BitWriter<'a, REG, Emt>; -impl<'a, REG> EmtW<'a, REG> +pub type EMT_W<'a, REG> = crate::BitWriter<'a, REG, EMT_A>; +impl<'a, REG> EMT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is clearing the CC4yST bit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emt::Value1) + self.variant(EMT_A::VALUE1) } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emt::Value2) + self.variant(EMT_A::VALUE2) } } #[doc = "Multi Channel Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcme { +pub enum MCME_A { #[doc = "0: Multi Channel Mode is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Multi Channel Mode is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcme) -> Self { + fn from(variant: MCME_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCME` reader - Multi Channel Mode Enable"] -pub type McmeR = crate::BitReader; -impl McmeR { +pub type MCME_R = crate::BitReader; +impl MCME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcme { + pub const fn variant(&self) -> MCME_A { match self.bits { - false => Mcme::Value1, - true => Mcme::Value2, + false => MCME_A::VALUE1, + true => MCME_A::VALUE2, } } #[doc = "Multi Channel Mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcme::Value1 + *self == MCME_A::VALUE1 } #[doc = "Multi Channel Mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcme::Value2 + *self == MCME_A::VALUE2 } } #[doc = "Field `MCME` writer - Multi Channel Mode Enable"] -pub type McmeW<'a, REG> = crate::BitWriter<'a, REG, Mcme>; -impl<'a, REG> McmeW<'a, REG> +pub type MCME_W<'a, REG> = crate::BitWriter<'a, REG, MCME_A>; +impl<'a, REG> MCME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcme::Value1) + self.variant(MCME_A::VALUE1) } #[doc = "Multi Channel Mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcme::Value2) + self.variant(MCME_A::VALUE2) } } impl R { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - pub fn tcm(&self) -> TcmR { - TcmR::new((self.bits & 1) != 0) + pub fn tcm(&self) -> TCM_R { + TCM_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - pub fn tssm(&self) -> TssmR { - TssmR::new(((self.bits >> 1) & 1) != 0) + pub fn tssm(&self) -> TSSM_R { + TSSM_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - pub fn clst(&self) -> ClstR { - ClstR::new(((self.bits >> 2) & 1) != 0) + pub fn clst(&self) -> CLST_R { + CLST_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture Compare Mode"] #[inline(always)] - pub fn cmod(&self) -> CmodR { - CmodR::new(((self.bits >> 3) & 1) != 0) + pub fn cmod(&self) -> CMOD_R { + CMOD_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - pub fn ecm(&self) -> EcmR { - EcmR::new(((self.bits >> 4) & 1) != 0) + pub fn ecm(&self) -> ECM_R { + ECM_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - pub fn capc(&self) -> CapcR { - CapcR::new(((self.bits >> 5) & 3) as u8) + pub fn capc(&self) -> CAPC_R { + CAPC_R::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - pub fn endm(&self) -> EndmR { - EndmR::new(((self.bits >> 8) & 3) as u8) + pub fn endm(&self) -> ENDM_R { + ENDM_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - pub fn strm(&self) -> StrmR { - StrmR::new(((self.bits >> 10) & 1) != 0) + pub fn strm(&self) -> STRM_R { + STRM_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - pub fn sce(&self) -> SceR { - SceR::new(((self.bits >> 11) & 1) != 0) + pub fn sce(&self) -> SCE_R { + SCE_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - pub fn ccs(&self) -> CcsR { - CcsR::new(((self.bits >> 12) & 1) != 0) + pub fn ccs(&self) -> CCS_R { + CCS_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - pub fn dithe(&self) -> DitheR { - DitheR::new(((self.bits >> 13) & 3) as u8) + pub fn dithe(&self) -> DITHE_R { + DITHE_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - pub fn dim(&self) -> DimR { - DimR::new(((self.bits >> 15) & 1) != 0) + pub fn dim(&self) -> DIM_R { + DIM_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - pub fn fpe(&self) -> FpeR { - FpeR::new(((self.bits >> 16) & 1) != 0) + pub fn fpe(&self) -> FPE_R { + FPE_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TRAP enable"] #[inline(always)] - pub fn trape(&self) -> TrapeR { - TrapeR::new(((self.bits >> 17) & 1) != 0) + pub fn trape(&self) -> TRAPE_R { + TRAPE_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - pub fn trpse(&self) -> TrpseR { - TrpseR::new(((self.bits >> 21) & 1) != 0) + pub fn trpse(&self) -> TRPSE_R { + TRPSE_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - pub fn trpsw(&self) -> TrpswR { - TrpswR::new(((self.bits >> 22) & 1) != 0) + pub fn trpsw(&self) -> TRPSW_R { + TRPSW_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - pub fn ems(&self) -> EmsR { - EmsR::new(((self.bits >> 23) & 1) != 0) + pub fn ems(&self) -> EMS_R { + EMS_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - pub fn emt(&self) -> EmtR { - EmtR::new(((self.bits >> 24) & 1) != 0) + pub fn emt(&self) -> EMT_R { + EMT_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Multi Channel Mode Enable"] #[inline(always)] - pub fn mcme(&self) -> McmeR { - McmeR::new(((self.bits >> 25) & 1) != 0) + pub fn mcme(&self) -> MCME_R { + MCME_R::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] #[must_use] - pub fn tcm(&mut self) -> TcmW { - TcmW::new(self, 0) + pub fn tcm(&mut self) -> TCM_W { + TCM_W::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tssm(&mut self) -> TssmW { - TssmW::new(self, 1) + pub fn tssm(&mut self) -> TSSM_W { + TSSM_W::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] #[must_use] - pub fn clst(&mut self) -> ClstW { - ClstW::new(self, 2) + pub fn clst(&mut self) -> CLST_W { + CLST_W::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] #[must_use] - pub fn ecm(&mut self) -> EcmW { - EcmW::new(self, 4) + pub fn ecm(&mut self) -> ECM_W { + ECM_W::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] #[must_use] - pub fn capc(&mut self) -> CapcW { - CapcW::new(self, 5) + pub fn capc(&mut self) -> CAPC_W { + CAPC_W::new(self, 5) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] #[must_use] - pub fn endm(&mut self) -> EndmW { - EndmW::new(self, 8) + pub fn endm(&mut self) -> ENDM_W { + ENDM_W::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] #[must_use] - pub fn strm(&mut self) -> StrmW { - StrmW::new(self, 10) + pub fn strm(&mut self) -> STRM_W { + STRM_W::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] #[must_use] - pub fn sce(&mut self) -> SceW { - SceW::new(self, 11) + pub fn sce(&mut self) -> SCE_W { + SCE_W::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] #[must_use] - pub fn ccs(&mut self) -> CcsW { - CcsW::new(self, 12) + pub fn ccs(&mut self) -> CCS_W { + CCS_W::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] #[must_use] - pub fn dithe(&mut self) -> DitheW { - DitheW::new(self, 13) + pub fn dithe(&mut self) -> DITHE_W { + DITHE_W::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] #[must_use] - pub fn dim(&mut self) -> DimW { - DimW::new(self, 15) + pub fn dim(&mut self) -> DIM_W { + DIM_W::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] #[must_use] - pub fn fpe(&mut self) -> FpeW { - FpeW::new(self, 16) + pub fn fpe(&mut self) -> FPE_W { + FPE_W::new(self, 16) } #[doc = "Bit 17 - TRAP enable"] #[inline(always)] #[must_use] - pub fn trape(&mut self) -> TrapeW { - TrapeW::new(self, 17) + pub fn trape(&mut self) -> TRAPE_W { + TRAPE_W::new(self, 17) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] #[must_use] - pub fn trpse(&mut self) -> TrpseW { - TrpseW::new(self, 21) + pub fn trpse(&mut self) -> TRPSE_W { + TRPSE_W::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] #[must_use] - pub fn trpsw(&mut self) -> TrpswW { - TrpswW::new(self, 22) + pub fn trpsw(&mut self) -> TRPSW_W { + TRPSW_W::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] #[must_use] - pub fn ems(&mut self) -> EmsW { - EmsW::new(self, 23) + pub fn ems(&mut self) -> EMS_W { + EMS_W::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] #[must_use] - pub fn emt(&mut self) -> EmtW { - EmtW::new(self, 24) + pub fn emt(&mut self) -> EMT_W { + EMT_W::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable"] #[inline(always)] #[must_use] - pub fn mcme(&mut self) -> McmeW { - McmeW::new(self, 25) + pub fn mcme(&mut self) -> MCME_W { + MCME_W::new(self, 25) } } #[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcSpec; -impl crate::RegisterSpec for TcSpec { +pub struct TC_SPEC; +impl crate::RegisterSpec for TC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tc::R`](R) reader structure"] -impl crate::Readable for TcSpec {} +impl crate::Readable for TC_SPEC {} #[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] -impl crate::Writable for TcSpec { +impl crate::Writable for TC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0"] -impl crate::Resettable for TcSpec { +impl crate::Resettable for TC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcclr.rs b/src/ccu40_cc40/tcclr.rs index f8d4bacb..d2fa79fd 100644 --- a/src/ccu40_cc40/tcclr.rs +++ b/src/ccu40_cc40/tcclr.rs @@ -1,43 +1,43 @@ #[doc = "Register `TCCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBC` writer - Timer Run Bit Clear"] -pub type TrbcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRBC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCC` writer - Timer Clear"] -pub type TccW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TCC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITC` writer - Dither Counter Clear"] -pub type DitcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] #[must_use] - pub fn trbc(&mut self) -> TrbcW { - TrbcW::new(self, 0) + pub fn trbc(&mut self) -> TRBC_W { + TRBC_W::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] #[must_use] - pub fn tcc(&mut self) -> TccW { - TccW::new(self, 1) + pub fn tcc(&mut self) -> TCC_W { + TCC_W::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] #[must_use] - pub fn ditc(&mut self) -> DitcW { - DitcW::new(self, 2) + pub fn ditc(&mut self) -> DITC_W { + DITC_W::new(self, 2) } } #[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcclrSpec; -impl crate::RegisterSpec for TcclrSpec { +pub struct TCCLR_SPEC; +impl crate::RegisterSpec for TCCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcclr::W`](W) writer structure"] -impl crate::Writable for TcclrSpec { +impl crate::Writable for TCCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCCLR to value 0"] -impl crate::Resettable for TcclrSpec { +impl crate::Resettable for TCCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcset.rs b/src/ccu40_cc40/tcset.rs index 3338f548..3be8b0aa 100644 --- a/src/ccu40_cc40/tcset.rs +++ b/src/ccu40_cc40/tcset.rs @@ -1,27 +1,27 @@ #[doc = "Register `TCSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBS` writer - Timer Run Bit set"] -pub type TrbsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] #[must_use] - pub fn trbs(&mut self) -> TrbsW { - TrbsW::new(self, 0) + pub fn trbs(&mut self) -> TRBS_W { + TRBS_W::new(self, 0) } } #[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcsetSpec; -impl crate::RegisterSpec for TcsetSpec { +pub struct TCSET_SPEC; +impl crate::RegisterSpec for TCSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcset::W`](W) writer structure"] -impl crate::Writable for TcsetSpec { +impl crate::Writable for TCSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSET to value 0"] -impl crate::Resettable for TcsetSpec { +impl crate::Resettable for TCSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/tcst.rs b/src/ccu40_cc40/tcst.rs index f2d92648..c685aaa6 100644 --- a/src/ccu40_cc40/tcst.rs +++ b/src/ccu40_cc40/tcst.rs @@ -1,97 +1,97 @@ #[doc = "Register `TCST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Timer Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trb { +pub enum TRB_A { #[doc = "0: Timer is stopped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trb) -> Self { + fn from(variant: TRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRB` reader - Timer Run Bit"] -pub type TrbR = crate::BitReader; -impl TrbR { +pub type TRB_R = crate::BitReader; +impl TRB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trb { + pub const fn variant(&self) -> TRB_A { match self.bits { - false => Trb::Value1, - true => Trb::Value2, + false => TRB_A::VALUE1, + true => TRB_A::VALUE2, } } #[doc = "Timer is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trb::Value1 + *self == TRB_A::VALUE1 } #[doc = "Timer is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trb::Value2 + *self == TRB_A::VALUE2 } } #[doc = "Timer Counting Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cdir { +pub enum CDIR_A { #[doc = "0: Timer is counting up"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is counting down"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cdir) -> Self { + fn from(variant: CDIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDIR` reader - Timer Counting Direction"] -pub type CdirR = crate::BitReader; -impl CdirR { +pub type CDIR_R = crate::BitReader; +impl CDIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cdir { + pub const fn variant(&self) -> CDIR_A { match self.bits { - false => Cdir::Value1, - true => Cdir::Value2, + false => CDIR_A::VALUE1, + true => CDIR_A::VALUE2, } } #[doc = "Timer is counting up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cdir::Value1 + *self == CDIR_A::VALUE1 } #[doc = "Timer is counting down"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cdir::Value2 + *self == CDIR_A::VALUE2 } } impl R { #[doc = "Bit 0 - Timer Run Bit"] #[inline(always)] - pub fn trb(&self) -> TrbR { - TrbR::new((self.bits & 1) != 0) + pub fn trb(&self) -> TRB_R { + TRB_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Counting Direction"] #[inline(always)] - pub fn cdir(&self) -> CdirR { - CdirR::new(((self.bits >> 1) & 1) != 0) + pub fn cdir(&self) -> CDIR_R { + CDIR_R::new(((self.bits >> 1) & 1) != 0) } } #[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcstSpec; -impl crate::RegisterSpec for TcstSpec { +pub struct TCST_SPEC; +impl crate::RegisterSpec for TCST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tcst::R`](R) reader structure"] -impl crate::Readable for TcstSpec {} +impl crate::Readable for TCST_SPEC {} #[doc = "`reset()` method sets TCST to value 0"] -impl crate::Resettable for TcstSpec { +impl crate::Resettable for TCST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu40_cc40/timer.rs b/src/ccu40_cc40/timer.rs index 68062f18..1c7ed7d0 100644 --- a/src/ccu40_cc40/timer.rs +++ b/src/ccu40_cc40/timer.rs @@ -1,40 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TVAL` reader - Timer Value"] -pub type TvalR = crate::FieldReader; +pub type TVAL_R = crate::FieldReader; #[doc = "Field `TVAL` writer - Timer Value"] -pub type TvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - pub fn tval(&self) -> TvalR { - TvalR::new((self.bits & 0xffff) as u16) + pub fn tval(&self) -> TVAL_R { + TVAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] #[must_use] - pub fn tval(&mut self) -> TvalW { - TvalW::new(self, 0) + pub fn tval(&mut self) -> TVAL_W { + TVAL_W::new(self, 0) } } #[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TimerSpec; -impl crate::RegisterSpec for TimerSpec { +pub struct TIMER_SPEC; +impl crate::RegisterSpec for TIMER_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`timer::R`](R) reader structure"] -impl crate::Readable for TimerSpec {} +impl crate::Readable for TIMER_SPEC {} #[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] -impl crate::Writable for TimerSpec { +impl crate::Writable for TIMER_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TimerSpec { +impl crate::Resettable for TIMER_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80.rs b/src/ccu80.rs index ea01d7f8..429b9bff 100644 --- a/src/ccu80.rs +++ b/src/ccu80.rs @@ -1,128 +1,118 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - gctrl: Gctrl, - gstat: Gstat, - gidls: Gidls, - gidlc: Gidlc, - gcss: Gcss, - gcsc: Gcsc, - gcst: Gcst, - gpchk: Gpchk, + gctrl: GCTRL, + gstat: GSTAT, + gidls: GIDLS, + gidlc: GIDLC, + gcss: GCSS, + gcsc: GCSC, + gcst: GCST, + gpchk: GPCHK, _reserved8: [u8; 0x30], - ecrd: Ecrd, + ecrd: ECRD, _reserved9: [u8; 0x2c], - midr: Midr, + midr: MIDR, } impl RegisterBlock { #[doc = "0x00 - Global Control Register"] #[inline(always)] - pub const fn gctrl(&self) -> &Gctrl { + pub const fn gctrl(&self) -> &GCTRL { &self.gctrl } #[doc = "0x04 - Global Status Register"] #[inline(always)] - pub const fn gstat(&self) -> &Gstat { + pub const fn gstat(&self) -> &GSTAT { &self.gstat } #[doc = "0x08 - Global Idle Set"] #[inline(always)] - pub const fn gidls(&self) -> &Gidls { + pub const fn gidls(&self) -> &GIDLS { &self.gidls } #[doc = "0x0c - Global Idle Clear"] #[inline(always)] - pub const fn gidlc(&self) -> &Gidlc { + pub const fn gidlc(&self) -> &GIDLC { &self.gidlc } #[doc = "0x10 - Global Channel Set"] #[inline(always)] - pub const fn gcss(&self) -> &Gcss { + pub const fn gcss(&self) -> &GCSS { &self.gcss } #[doc = "0x14 - Global Channel Clear"] #[inline(always)] - pub const fn gcsc(&self) -> &Gcsc { + pub const fn gcsc(&self) -> &GCSC { &self.gcsc } #[doc = "0x18 - Global Channel status"] #[inline(always)] - pub const fn gcst(&self) -> &Gcst { + pub const fn gcst(&self) -> &GCST { &self.gcst } #[doc = "0x1c - Parity Checker Configuration"] #[inline(always)] - pub const fn gpchk(&self) -> &Gpchk { + pub const fn gpchk(&self) -> &GPCHK { &self.gpchk } #[doc = "0x50 - Extended Capture Mode Read"] #[inline(always)] - pub const fn ecrd(&self) -> &Ecrd { + pub const fn ecrd(&self) -> &ECRD { &self.ecrd } #[doc = "0x80 - Module Identification"] #[inline(always)] - pub const fn midr(&self) -> &Midr { + pub const fn midr(&self) -> &MIDR { &self.midr } } #[doc = "GCTRL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gctrl`] module"] -#[doc(alias = "GCTRL")] -pub type Gctrl = crate::Reg; +pub type GCTRL = crate::Reg; #[doc = "Global Control Register"] pub mod gctrl; #[doc = "GSTAT (r) register accessor: Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gstat`] module"] -#[doc(alias = "GSTAT")] -pub type Gstat = crate::Reg; +pub type GSTAT = crate::Reg; #[doc = "Global Status Register"] pub mod gstat; #[doc = "GIDLS (w) register accessor: Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidls`] module"] -#[doc(alias = "GIDLS")] -pub type Gidls = crate::Reg; +pub type GIDLS = crate::Reg; #[doc = "Global Idle Set"] pub mod gidls; #[doc = "GIDLC (w) register accessor: Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gidlc`] module"] -#[doc(alias = "GIDLC")] -pub type Gidlc = crate::Reg; +pub type GIDLC = crate::Reg; #[doc = "Global Idle Clear"] pub mod gidlc; #[doc = "GCSS (w) register accessor: Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcss`] module"] -#[doc(alias = "GCSS")] -pub type Gcss = crate::Reg; +pub type GCSS = crate::Reg; #[doc = "Global Channel Set"] pub mod gcss; #[doc = "GCSC (w) register accessor: Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcsc`] module"] -#[doc(alias = "GCSC")] -pub type Gcsc = crate::Reg; +pub type GCSC = crate::Reg; #[doc = "Global Channel Clear"] pub mod gcsc; #[doc = "GCST (r) register accessor: Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gcst`] module"] -#[doc(alias = "GCST")] -pub type Gcst = crate::Reg; +pub type GCST = crate::Reg; #[doc = "Global Channel status"] pub mod gcst; #[doc = "GPCHK (rw) register accessor: Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpchk`] module"] -#[doc(alias = "GPCHK")] -pub type Gpchk = crate::Reg; +pub type GPCHK = crate::Reg; #[doc = "Parity Checker Configuration"] pub mod gpchk; #[doc = "ECRD (r) register accessor: Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecrd`] module"] -#[doc(alias = "ECRD")] -pub type Ecrd = crate::Reg; +pub type ECRD = crate::Reg; #[doc = "Extended Capture Mode Read"] pub mod ecrd; #[doc = "MIDR (r) register accessor: Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -#[doc(alias = "MIDR")] -pub type Midr = crate::Reg; +pub type MIDR = crate::Reg; #[doc = "Module Identification"] pub mod midr; diff --git a/src/ccu80/ecrd.rs b/src/ccu80/ecrd.rs index c51fbcce..1cb76a1f 100644 --- a/src/ccu80/ecrd.rs +++ b/src/ccu80/ecrd.rs @@ -1,196 +1,196 @@ #[doc = "Register `ECRD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPV` reader - Timer Capture Value"] -pub type CapvR = crate::FieldReader; +pub type CAPV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Capture value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Slice pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sptr { +pub enum SPTR_A { #[doc = "0: CC80"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC81"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CC82"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CC83"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sptr) -> Self { + fn from(variant: SPTR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sptr { +impl crate::FieldSpec for SPTR_A { type Ux = u8; } -impl crate::IsEnum for Sptr {} +impl crate::IsEnum for SPTR_A {} #[doc = "Field `SPTR` reader - Slice pointer"] -pub type SptrR = crate::FieldReader; -impl SptrR { +pub type SPTR_R = crate::FieldReader; +impl SPTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sptr { + pub const fn variant(&self) -> SPTR_A { match self.bits { - 0 => Sptr::Value1, - 1 => Sptr::Value2, - 2 => Sptr::Value3, - 3 => Sptr::Value4, + 0 => SPTR_A::VALUE1, + 1 => SPTR_A::VALUE2, + 2 => SPTR_A::VALUE3, + 3 => SPTR_A::VALUE4, _ => unreachable!(), } } #[doc = "CC80"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sptr::Value1 + *self == SPTR_A::VALUE1 } #[doc = "CC81"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sptr::Value2 + *self == SPTR_A::VALUE2 } #[doc = "CC82"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sptr::Value3 + *self == SPTR_A::VALUE3 } #[doc = "CC83"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sptr::Value4 + *self == SPTR_A::VALUE4 } } #[doc = "Capture register pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Vptr { +pub enum VPTR_A { #[doc = "0: Capture register 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture register 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Capture register 2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Capture register 3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Vptr) -> Self { + fn from(variant: VPTR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vptr { +impl crate::FieldSpec for VPTR_A { type Ux = u8; } -impl crate::IsEnum for Vptr {} +impl crate::IsEnum for VPTR_A {} #[doc = "Field `VPTR` reader - Capture register pointer"] -pub type VptrR = crate::FieldReader; -impl VptrR { +pub type VPTR_R = crate::FieldReader; +impl VPTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vptr { + pub const fn variant(&self) -> VPTR_A { match self.bits { - 0 => Vptr::Value1, - 1 => Vptr::Value2, - 2 => Vptr::Value3, - 3 => Vptr::Value4, + 0 => VPTR_A::VALUE1, + 1 => VPTR_A::VALUE2, + 2 => VPTR_A::VALUE3, + 3 => VPTR_A::VALUE4, _ => unreachable!(), } } #[doc = "Capture register 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vptr::Value1 + *self == VPTR_A::VALUE1 } #[doc = "Capture register 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vptr::Value2 + *self == VPTR_A::VALUE2 } #[doc = "Capture register 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Vptr::Value3 + *self == VPTR_A::VALUE3 } #[doc = "Capture register 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Vptr::Value4 + *self == VPTR_A::VALUE4 } } #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into this register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value has been captured into this register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into this register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value has been captured into this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Timer Capture Value"] #[inline(always)] - pub fn capv(&self) -> CapvR { - CapvR::new((self.bits & 0xffff) as u16) + pub fn capv(&self) -> CAPV_R { + CAPV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Capture value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slice pointer"] #[inline(always)] - pub fn sptr(&self) -> SptrR { - SptrR::new(((self.bits >> 20) & 3) as u8) + pub fn sptr(&self) -> SPTR_R { + SPTR_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Capture register pointer"] #[inline(always)] - pub fn vptr(&self) -> VptrR { - VptrR::new(((self.bits >> 22) & 3) as u8) + pub fn vptr(&self) -> VPTR_R { + VPTR_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 24) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 24) & 1) != 0) } } #[doc = "Extended Capture Mode Read\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecrd::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EcrdSpec; -impl crate::RegisterSpec for EcrdSpec { +pub struct ECRD_SPEC; +impl crate::RegisterSpec for ECRD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ecrd::R`](R) reader structure"] -impl crate::Readable for EcrdSpec {} +impl crate::Readable for ECRD_SPEC {} #[doc = "`reset()` method sets ECRD to value 0"] -impl crate::Resettable for EcrdSpec { +impl crate::Resettable for ECRD_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gcsc.rs b/src/ccu80/gcsc.rs index 48af6641..12e3a39f 100644 --- a/src/ccu80/gcsc.rs +++ b/src/ccu80/gcsc.rs @@ -1,179 +1,179 @@ #[doc = "Register `GCSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SC` writer - Slice 0 shadow transfer request clear"] -pub type S0scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSC` writer - Slice 0 Dither shadow transfer clear"] -pub type S0dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSC` writer - Slice 0 Prescaler shadow transfer clear"] -pub type S0pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SC` writer - Slice 1 shadow transfer clear"] -pub type S1scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSC` writer - Slice 1 Dither shadow transfer clear"] -pub type S1dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSC` writer - Slice 1 Prescaler shadow transfer clear"] -pub type S1pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SC` writer - Slice 2 shadow transfer clear"] -pub type S2scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSC` writer - Slice 2 Dither shadow transfer clear"] -pub type S2dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSC` writer - Slice 2 Prescaler shadow transfer clear"] -pub type S2pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SC` writer - Slice 3 shadow transfer clear"] -pub type S3scW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3SC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSC` writer - Slice 3 Dither shadow transfer clear"] -pub type S3dscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3DSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSC` writer - Slice 3 Prescaler shadow transfer clear"] -pub type S3pscW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3PSC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST1C` writer - Slice 0 status bit 1 clear"] -pub type S0st1cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST1C` writer - Slice 1 status bit 1 clear"] -pub type S1st1cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST1C` writer - Slice 2 status bit 1 clear"] -pub type S2st1cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST1C` writer - Slice 3 status bit 1 clear"] -pub type S3st1cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3ST1C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST2C` writer - Slice 0 status bit 2 clear"] -pub type S0st2cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST2C` writer - Slice 1 status bit 2 clear"] -pub type S1st2cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST2C` writer - Slice 2 status bit 2 clear"] -pub type S2st2cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST2C` writer - Slice 3 status bit 2 clear"] -pub type S3st2cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer request clear"] #[inline(always)] #[must_use] - pub fn s0sc(&mut self) -> S0scW { - S0scW::new(self, 0) + pub fn s0sc(&mut self) -> S0SC_W { + S0SC_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0dsc(&mut self) -> S0dscW { - S0dscW::new(self, 1) + pub fn s0dsc(&mut self) -> S0DSC_W { + S0DSC_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s0psc(&mut self) -> S0pscW { - S0pscW::new(self, 2) + pub fn s0psc(&mut self) -> S0PSC_W { + S0PSC_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1sc(&mut self) -> S1scW { - S1scW::new(self, 4) + pub fn s1sc(&mut self) -> S1SC_W { + S1SC_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1dsc(&mut self) -> S1dscW { - S1dscW::new(self, 5) + pub fn s1dsc(&mut self) -> S1DSC_W { + S1DSC_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s1psc(&mut self) -> S1pscW { - S1pscW::new(self, 6) + pub fn s1psc(&mut self) -> S1PSC_W { + S1PSC_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2sc(&mut self) -> S2scW { - S2scW::new(self, 8) + pub fn s2sc(&mut self) -> S2SC_W { + S2SC_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2dsc(&mut self) -> S2dscW { - S2dscW::new(self, 9) + pub fn s2dsc(&mut self) -> S2DSC_W { + S2DSC_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s2psc(&mut self) -> S2pscW { - S2pscW::new(self, 10) + pub fn s2psc(&mut self) -> S2PSC_W { + S2PSC_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3sc(&mut self) -> S3scW { - S3scW::new(self, 12) + pub fn s3sc(&mut self) -> S3SC_W { + S3SC_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3dsc(&mut self) -> S3dscW { - S3dscW::new(self, 13) + pub fn s3dsc(&mut self) -> S3DSC_W { + S3DSC_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] #[must_use] - pub fn s3psc(&mut self) -> S3pscW { - S3pscW::new(self, 14) + pub fn s3psc(&mut self) -> S3PSC_W { + S3PSC_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s0st1c(&mut self) -> S0st1cW { - S0st1cW::new(self, 16) + pub fn s0st1c(&mut self) -> S0ST1C_W { + S0ST1C_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s1st1c(&mut self) -> S1st1cW { - S1st1cW::new(self, 17) + pub fn s1st1c(&mut self) -> S1ST1C_W { + S1ST1C_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s2st1c(&mut self) -> S2st1cW { - S2st1cW::new(self, 18) + pub fn s2st1c(&mut self) -> S2ST1C_W { + S2ST1C_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 clear"] #[inline(always)] #[must_use] - pub fn s3st1c(&mut self) -> S3st1cW { - S3st1cW::new(self, 19) + pub fn s3st1c(&mut self) -> S3ST1C_W { + S3ST1C_W::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s0st2c(&mut self) -> S0st2cW { - S0st2cW::new(self, 20) + pub fn s0st2c(&mut self) -> S0ST2C_W { + S0ST2C_W::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s1st2c(&mut self) -> S1st2cW { - S1st2cW::new(self, 21) + pub fn s1st2c(&mut self) -> S1ST2C_W { + S1ST2C_W::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s2st2c(&mut self) -> S2st2cW { - S2st2cW::new(self, 22) + pub fn s2st2c(&mut self) -> S2ST2C_W { + S2ST2C_W::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 clear"] #[inline(always)] #[must_use] - pub fn s3st2c(&mut self) -> S3st2cW { - S3st2cW::new(self, 23) + pub fn s3st2c(&mut self) -> S3ST2C_W { + S3ST2C_W::new(self, 23) } } #[doc = "Global Channel Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcsc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcscSpec; -impl crate::RegisterSpec for GcscSpec { +pub struct GCSC_SPEC; +impl crate::RegisterSpec for GCSC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcsc::W`](W) writer structure"] -impl crate::Writable for GcscSpec { +impl crate::Writable for GCSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSC to value 0"] -impl crate::Resettable for GcscSpec { +impl crate::Resettable for GCSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gcss.rs b/src/ccu80/gcss.rs index e70c7336..07bef4b5 100644 --- a/src/ccu80/gcss.rs +++ b/src/ccu80/gcss.rs @@ -1,179 +1,179 @@ #[doc = "Register `GCSS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0SE` writer - Slice 0 shadow transfer set enable"] -pub type S0seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0DSE` writer - Slice 0 Dither shadow transfer set enable"] -pub type S0dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0PSE` writer - Slice 0 Prescaler shadow transfer set enable"] -pub type S0pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1SE` writer - Slice 1 shadow transfer set enable"] -pub type S1seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1DSE` writer - Slice 1 Dither shadow transfer set enable"] -pub type S1dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1PSE` writer - Slice 1 Prescaler shadow transfer set enable"] -pub type S1pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2SE` writer - Slice 2 shadow transfer set enable"] -pub type S2seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2DSE` writer - Slice 2 Dither shadow transfer set enable"] -pub type S2dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2PSE` writer - Slice 2 Prescaler shadow transfer set enable"] -pub type S2pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3SE` writer - Slice 3 shadow transfer set enable"] -pub type S3seW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3SE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3DSE` writer - Slice 3 Dither shadow transfer set enable"] -pub type S3dseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3DSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3PSE` writer - Slice 3 Prescaler shadow transfer set enable"] -pub type S3pseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3PSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST1S` writer - Slice 0 status bit 1 set"] -pub type S0st1sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST1S` writer - Slice 1 status bit 1 set"] -pub type S1st1sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST1S` writer - Slice 2 status bit 1 set"] -pub type S2st1sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST1S` writer - Slice 3 status bit 1 set"] -pub type S3st1sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3ST1S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0ST2S` writer - Slice 0 status bit 2 set"] -pub type S0st2sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1ST2S` writer - Slice 1 status bit 2 set"] -pub type S1st2sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2ST2S` writer - Slice 2 status bit 2 set"] -pub type S2st2sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S3ST2S` writer - Slice 3 status bit 2 set"] -pub type S3st2sW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S3ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0se(&mut self) -> S0seW { - S0seW::new(self, 0) + pub fn s0se(&mut self) -> S0SE_W { + S0SE_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0dse(&mut self) -> S0dseW { - S0dseW::new(self, 1) + pub fn s0dse(&mut self) -> S0DSE_W { + S0DSE_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s0pse(&mut self) -> S0pseW { - S0pseW::new(self, 2) + pub fn s0pse(&mut self) -> S0PSE_W { + S0PSE_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1se(&mut self) -> S1seW { - S1seW::new(self, 4) + pub fn s1se(&mut self) -> S1SE_W { + S1SE_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1dse(&mut self) -> S1dseW { - S1dseW::new(self, 5) + pub fn s1dse(&mut self) -> S1DSE_W { + S1DSE_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s1pse(&mut self) -> S1pseW { - S1pseW::new(self, 6) + pub fn s1pse(&mut self) -> S1PSE_W { + S1PSE_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2se(&mut self) -> S2seW { - S2seW::new(self, 8) + pub fn s2se(&mut self) -> S2SE_W { + S2SE_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2dse(&mut self) -> S2dseW { - S2dseW::new(self, 9) + pub fn s2dse(&mut self) -> S2DSE_W { + S2DSE_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s2pse(&mut self) -> S2pseW { - S2pseW::new(self, 10) + pub fn s2pse(&mut self) -> S2PSE_W { + S2PSE_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3se(&mut self) -> S3seW { - S3seW::new(self, 12) + pub fn s3se(&mut self) -> S3SE_W { + S3SE_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3dse(&mut self) -> S3dseW { - S3dseW::new(self, 13) + pub fn s3dse(&mut self) -> S3DSE_W { + S3DSE_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] #[must_use] - pub fn s3pse(&mut self) -> S3pseW { - S3pseW::new(self, 14) + pub fn s3pse(&mut self) -> S3PSE_W { + S3PSE_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s0st1s(&mut self) -> S0st1sW { - S0st1sW::new(self, 16) + pub fn s0st1s(&mut self) -> S0ST1S_W { + S0ST1S_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s1st1s(&mut self) -> S1st1sW { - S1st1sW::new(self, 17) + pub fn s1st1s(&mut self) -> S1ST1S_W { + S1ST1S_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s2st1s(&mut self) -> S2st1sW { - S2st1sW::new(self, 18) + pub fn s2st1s(&mut self) -> S2ST1S_W { + S2ST1S_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 set"] #[inline(always)] #[must_use] - pub fn s3st1s(&mut self) -> S3st1sW { - S3st1sW::new(self, 19) + pub fn s3st1s(&mut self) -> S3ST1S_W { + S3ST1S_W::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s0st2s(&mut self) -> S0st2sW { - S0st2sW::new(self, 20) + pub fn s0st2s(&mut self) -> S0ST2S_W { + S0ST2S_W::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s1st2s(&mut self) -> S1st2sW { - S1st2sW::new(self, 21) + pub fn s1st2s(&mut self) -> S1ST2S_W { + S1ST2S_W::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s2st2s(&mut self) -> S2st2sW { - S2st2sW::new(self, 22) + pub fn s2st2s(&mut self) -> S2ST2S_W { + S2ST2S_W::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 set"] #[inline(always)] #[must_use] - pub fn s3st2s(&mut self) -> S3st2sW { - S3st2sW::new(self, 23) + pub fn s3st2s(&mut self) -> S3ST2S_W { + S3ST2S_W::new(self, 23) } } #[doc = "Global Channel Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gcss::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcssSpec; -impl crate::RegisterSpec for GcssSpec { +pub struct GCSS_SPEC; +impl crate::RegisterSpec for GCSS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gcss::W`](W) writer structure"] -impl crate::Writable for GcssSpec { +impl crate::Writable for GCSS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCSS to value 0"] -impl crate::Resettable for GcssSpec { +impl crate::Resettable for GCSS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gcst.rs b/src/ccu80/gcst.rs index 539f42ef..f38f948e 100644 --- a/src/ccu80/gcst.rs +++ b/src/ccu80/gcst.rs @@ -1,563 +1,563 @@ #[doc = "Register `GCST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Slice 0 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0ss { +pub enum S0SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0ss) -> Self { + fn from(variant: S0SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0SS` reader - Slice 0 shadow transfer status"] -pub type S0ssR = crate::BitReader; -impl S0ssR { +pub type S0SS_R = crate::BitReader; +impl S0SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0ss { + pub const fn variant(&self) -> S0SS_A { match self.bits { - false => S0ss::Value1, - true => S0ss::Value2, + false => S0SS_A::VALUE1, + true => S0SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0ss::Value1 + *self == S0SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0ss::Value2 + *self == S0SS_A::VALUE2 } } #[doc = "Slice 0 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0dss { +pub enum S0DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0dss) -> Self { + fn from(variant: S0DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0DSS` reader - Slice 0 Dither shadow transfer status"] -pub type S0dssR = crate::BitReader; -impl S0dssR { +pub type S0DSS_R = crate::BitReader; +impl S0DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0dss { + pub const fn variant(&self) -> S0DSS_A { match self.bits { - false => S0dss::Value1, - true => S0dss::Value2, + false => S0DSS_A::VALUE1, + true => S0DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0dss::Value1 + *self == S0DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0dss::Value2 + *self == S0DSS_A::VALUE2 } } #[doc = "Slice 0 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0pss { +pub enum S0PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0pss) -> Self { + fn from(variant: S0PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0PSS` reader - Slice 0 Prescaler shadow transfer status"] -pub type S0pssR = crate::BitReader; -impl S0pssR { +pub type S0PSS_R = crate::BitReader; +impl S0PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0pss { + pub const fn variant(&self) -> S0PSS_A { match self.bits { - false => S0pss::Value1, - true => S0pss::Value2, + false => S0PSS_A::VALUE1, + true => S0PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0pss::Value1 + *self == S0PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0pss::Value2 + *self == S0PSS_A::VALUE2 } } #[doc = "Slice 1 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1ss { +pub enum S1SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1ss) -> Self { + fn from(variant: S1SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1SS` reader - Slice 1 shadow transfer status"] -pub type S1ssR = crate::BitReader; -impl S1ssR { +pub type S1SS_R = crate::BitReader; +impl S1SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1ss { + pub const fn variant(&self) -> S1SS_A { match self.bits { - false => S1ss::Value1, - true => S1ss::Value2, + false => S1SS_A::VALUE1, + true => S1SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1ss::Value1 + *self == S1SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1ss::Value2 + *self == S1SS_A::VALUE2 } } #[doc = "Slice 1 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1dss { +pub enum S1DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1dss) -> Self { + fn from(variant: S1DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1DSS` reader - Slice 1 Dither shadow transfer status"] -pub type S1dssR = crate::BitReader; -impl S1dssR { +pub type S1DSS_R = crate::BitReader; +impl S1DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1dss { + pub const fn variant(&self) -> S1DSS_A { match self.bits { - false => S1dss::Value1, - true => S1dss::Value2, + false => S1DSS_A::VALUE1, + true => S1DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1dss::Value1 + *self == S1DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1dss::Value2 + *self == S1DSS_A::VALUE2 } } #[doc = "Slice 1 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1pss { +pub enum S1PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1pss) -> Self { + fn from(variant: S1PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1PSS` reader - Slice 1 Prescaler shadow transfer status"] -pub type S1pssR = crate::BitReader; -impl S1pssR { +pub type S1PSS_R = crate::BitReader; +impl S1PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1pss { + pub const fn variant(&self) -> S1PSS_A { match self.bits { - false => S1pss::Value1, - true => S1pss::Value2, + false => S1PSS_A::VALUE1, + true => S1PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1pss::Value1 + *self == S1PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1pss::Value2 + *self == S1PSS_A::VALUE2 } } #[doc = "Slice 2 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2ss { +pub enum S2SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2ss) -> Self { + fn from(variant: S2SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2SS` reader - Slice 2 shadow transfer status"] -pub type S2ssR = crate::BitReader; -impl S2ssR { +pub type S2SS_R = crate::BitReader; +impl S2SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2ss { + pub const fn variant(&self) -> S2SS_A { match self.bits { - false => S2ss::Value1, - true => S2ss::Value2, + false => S2SS_A::VALUE1, + true => S2SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2ss::Value1 + *self == S2SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2ss::Value2 + *self == S2SS_A::VALUE2 } } #[doc = "Slice 2 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2dss { +pub enum S2DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2dss) -> Self { + fn from(variant: S2DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2DSS` reader - Slice 2 Dither shadow transfer status"] -pub type S2dssR = crate::BitReader; -impl S2dssR { +pub type S2DSS_R = crate::BitReader; +impl S2DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2dss { + pub const fn variant(&self) -> S2DSS_A { match self.bits { - false => S2dss::Value1, - true => S2dss::Value2, + false => S2DSS_A::VALUE1, + true => S2DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2dss::Value1 + *self == S2DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2dss::Value2 + *self == S2DSS_A::VALUE2 } } #[doc = "Slice 2 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2pss { +pub enum S2PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2pss) -> Self { + fn from(variant: S2PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2PSS` reader - Slice 2 Prescaler shadow transfer status"] -pub type S2pssR = crate::BitReader; -impl S2pssR { +pub type S2PSS_R = crate::BitReader; +impl S2PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2pss { + pub const fn variant(&self) -> S2PSS_A { match self.bits { - false => S2pss::Value1, - true => S2pss::Value2, + false => S2PSS_A::VALUE1, + true => S2PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2pss::Value1 + *self == S2PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2pss::Value2 + *self == S2PSS_A::VALUE2 } } #[doc = "Slice 3 shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3ss { +pub enum S3SS_A { #[doc = "0: Shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3ss) -> Self { + fn from(variant: S3SS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3SS` reader - Slice 3 shadow transfer status"] -pub type S3ssR = crate::BitReader; -impl S3ssR { +pub type S3SS_R = crate::BitReader; +impl S3SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3ss { + pub const fn variant(&self) -> S3SS_A { match self.bits { - false => S3ss::Value1, - true => S3ss::Value2, + false => S3SS_A::VALUE1, + true => S3SS_A::VALUE2, } } #[doc = "Shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3ss::Value1 + *self == S3SS_A::VALUE1 } #[doc = "Shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3ss::Value2 + *self == S3SS_A::VALUE2 } } #[doc = "Slice 3 Dither shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3dss { +pub enum S3DSS_A { #[doc = "0: Dither shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3dss) -> Self { + fn from(variant: S3DSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3DSS` reader - Slice 3 Dither shadow transfer status"] -pub type S3dssR = crate::BitReader; -impl S3dssR { +pub type S3DSS_R = crate::BitReader; +impl S3DSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3dss { + pub const fn variant(&self) -> S3DSS_A { match self.bits { - false => S3dss::Value1, - true => S3dss::Value2, + false => S3DSS_A::VALUE1, + true => S3DSS_A::VALUE2, } } #[doc = "Dither shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3dss::Value1 + *self == S3DSS_A::VALUE1 } #[doc = "Dither shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3dss::Value2 + *self == S3DSS_A::VALUE2 } } #[doc = "Slice 3 Prescaler shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3pss { +pub enum S3PSS_A { #[doc = "0: Prescaler shadow transfer has not been requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler shadow transfer has been requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3pss) -> Self { + fn from(variant: S3PSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3PSS` reader - Slice 3 Prescaler shadow transfer status"] -pub type S3pssR = crate::BitReader; -impl S3pssR { +pub type S3PSS_R = crate::BitReader; +impl S3PSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3pss { + pub const fn variant(&self) -> S3PSS_A { match self.bits { - false => S3pss::Value1, - true => S3pss::Value2, + false => S3PSS_A::VALUE1, + true => S3PSS_A::VALUE2, } } #[doc = "Prescaler shadow transfer has not been requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3pss::Value1 + *self == S3PSS_A::VALUE1 } #[doc = "Prescaler shadow transfer has been requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3pss::Value2 + *self == S3PSS_A::VALUE2 } } #[doc = "Field `CC80ST1` reader - Slice 0 compare channel 1 status bit"] -pub type Cc80st1R = crate::BitReader; +pub type CC80ST1_R = crate::BitReader; #[doc = "Field `CC81ST1` reader - Slice 1 compare channel 1 status bit"] -pub type Cc81st1R = crate::BitReader; +pub type CC81ST1_R = crate::BitReader; #[doc = "Field `CC82ST1` reader - Slice 2 compare channel 1 status bit"] -pub type Cc82st1R = crate::BitReader; +pub type CC82ST1_R = crate::BitReader; #[doc = "Field `CC83ST1` reader - Slice 3 compare channel 1 status bit"] -pub type Cc83st1R = crate::BitReader; +pub type CC83ST1_R = crate::BitReader; #[doc = "Field `CC80ST2` reader - Slice 0 compare channel 2 status bit"] -pub type Cc80st2R = crate::BitReader; +pub type CC80ST2_R = crate::BitReader; #[doc = "Field `CC81ST2` reader - Slice 1 compare channel 2 status bit"] -pub type Cc81st2R = crate::BitReader; +pub type CC81ST2_R = crate::BitReader; #[doc = "Field `CC82ST2` reader - Slice 2 compare channel 2 status bit"] -pub type Cc82st2R = crate::BitReader; +pub type CC82ST2_R = crate::BitReader; #[doc = "Field `CC83ST2` reader - Slice 3 compare channel 2 status bit"] -pub type Cc83st2R = crate::BitReader; +pub type CC83ST2_R = crate::BitReader; impl R { #[doc = "Bit 0 - Slice 0 shadow transfer status"] #[inline(always)] - pub fn s0ss(&self) -> S0ssR { - S0ssR::new((self.bits & 1) != 0) + pub fn s0ss(&self) -> S0SS_R { + S0SS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer status"] #[inline(always)] - pub fn s0dss(&self) -> S0dssR { - S0dssR::new(((self.bits >> 1) & 1) != 0) + pub fn s0dss(&self) -> S0DSS_R { + S0DSS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer status"] #[inline(always)] - pub fn s0pss(&self) -> S0pssR { - S0pssR::new(((self.bits >> 2) & 1) != 0) + pub fn s0pss(&self) -> S0PSS_R { + S0PSS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Slice 1 shadow transfer status"] #[inline(always)] - pub fn s1ss(&self) -> S1ssR { - S1ssR::new(((self.bits >> 4) & 1) != 0) + pub fn s1ss(&self) -> S1SS_R { + S1SS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer status"] #[inline(always)] - pub fn s1dss(&self) -> S1dssR { - S1dssR::new(((self.bits >> 5) & 1) != 0) + pub fn s1dss(&self) -> S1DSS_R { + S1DSS_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer status"] #[inline(always)] - pub fn s1pss(&self) -> S1pssR { - S1pssR::new(((self.bits >> 6) & 1) != 0) + pub fn s1pss(&self) -> S1PSS_R { + S1PSS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Slice 2 shadow transfer status"] #[inline(always)] - pub fn s2ss(&self) -> S2ssR { - S2ssR::new(((self.bits >> 8) & 1) != 0) + pub fn s2ss(&self) -> S2SS_R { + S2SS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer status"] #[inline(always)] - pub fn s2dss(&self) -> S2dssR { - S2dssR::new(((self.bits >> 9) & 1) != 0) + pub fn s2dss(&self) -> S2DSS_R { + S2DSS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer status"] #[inline(always)] - pub fn s2pss(&self) -> S2pssR { - S2pssR::new(((self.bits >> 10) & 1) != 0) + pub fn s2pss(&self) -> S2PSS_R { + S2PSS_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - Slice 3 shadow transfer status"] #[inline(always)] - pub fn s3ss(&self) -> S3ssR { - S3ssR::new(((self.bits >> 12) & 1) != 0) + pub fn s3ss(&self) -> S3SS_R { + S3SS_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer status"] #[inline(always)] - pub fn s3dss(&self) -> S3dssR { - S3dssR::new(((self.bits >> 13) & 1) != 0) + pub fn s3dss(&self) -> S3DSS_R { + S3DSS_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer status"] #[inline(always)] - pub fn s3pss(&self) -> S3pssR { - S3pssR::new(((self.bits >> 14) & 1) != 0) + pub fn s3pss(&self) -> S3PSS_R { + S3PSS_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Slice 0 compare channel 1 status bit"] #[inline(always)] - pub fn cc80st1(&self) -> Cc80st1R { - Cc80st1R::new(((self.bits >> 16) & 1) != 0) + pub fn cc80st1(&self) -> CC80ST1_R { + CC80ST1_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Slice 1 compare channel 1 status bit"] #[inline(always)] - pub fn cc81st1(&self) -> Cc81st1R { - Cc81st1R::new(((self.bits >> 17) & 1) != 0) + pub fn cc81st1(&self) -> CC81ST1_R { + CC81ST1_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Slice 2 compare channel 1 status bit"] #[inline(always)] - pub fn cc82st1(&self) -> Cc82st1R { - Cc82st1R::new(((self.bits >> 18) & 1) != 0) + pub fn cc82st1(&self) -> CC82ST1_R { + CC82ST1_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Slice 3 compare channel 1 status bit"] #[inline(always)] - pub fn cc83st1(&self) -> Cc83st1R { - Cc83st1R::new(((self.bits >> 19) & 1) != 0) + pub fn cc83st1(&self) -> CC83ST1_R { + CC83ST1_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Slice 0 compare channel 2 status bit"] #[inline(always)] - pub fn cc80st2(&self) -> Cc80st2R { - Cc80st2R::new(((self.bits >> 20) & 1) != 0) + pub fn cc80st2(&self) -> CC80ST2_R { + CC80ST2_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Slice 1 compare channel 2 status bit"] #[inline(always)] - pub fn cc81st2(&self) -> Cc81st2R { - Cc81st2R::new(((self.bits >> 21) & 1) != 0) + pub fn cc81st2(&self) -> CC81ST2_R { + CC81ST2_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Slice 2 compare channel 2 status bit"] #[inline(always)] - pub fn cc82st2(&self) -> Cc82st2R { - Cc82st2R::new(((self.bits >> 22) & 1) != 0) + pub fn cc82st2(&self) -> CC82ST2_R { + CC82ST2_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Slice 3 compare channel 2 status bit"] #[inline(always)] - pub fn cc83st2(&self) -> Cc83st2R { - Cc83st2R::new(((self.bits >> 23) & 1) != 0) + pub fn cc83st2(&self) -> CC83ST2_R { + CC83ST2_R::new(((self.bits >> 23) & 1) != 0) } } #[doc = "Global Channel status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcstSpec; -impl crate::RegisterSpec for GcstSpec { +pub struct GCST_SPEC; +impl crate::RegisterSpec for GCST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gcst::R`](R) reader structure"] -impl crate::Readable for GcstSpec {} +impl crate::Readable for GCST_SPEC {} #[doc = "`reset()` method sets GCST to value 0"] -impl crate::Resettable for GcstSpec { +impl crate::Resettable for GCST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gctrl.rs b/src/ccu80/gctrl.rs index eb031e5e..ab855e6f 100644 --- a/src/ccu80/gctrl.rs +++ b/src/ccu80/gctrl.rs @@ -1,76 +1,76 @@ #[doc = "Register `GCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Prescaler Clear Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Prbc { +pub enum PRBC_A { #[doc = "0: SW only"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] - Value5 = 4, + VALUE5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Prbc) -> Self { + fn from(variant: PRBC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Prbc { +impl crate::FieldSpec for PRBC_A { type Ux = u8; } -impl crate::IsEnum for Prbc {} +impl crate::IsEnum for PRBC_A {} #[doc = "Field `PRBC` reader - Prescaler Clear Configuration"] -pub type PrbcR = crate::FieldReader; -impl PrbcR { +pub type PRBC_R = crate::FieldReader; +impl PRBC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Prbc::Value1), - 1 => Some(Prbc::Value2), - 2 => Some(Prbc::Value3), - 3 => Some(Prbc::Value4), - 4 => Some(Prbc::Value5), + 0 => Some(PRBC_A::VALUE1), + 1 => Some(PRBC_A::VALUE2), + 2 => Some(PRBC_A::VALUE3), + 3 => Some(PRBC_A::VALUE4), + 4 => Some(PRBC_A::VALUE5), _ => None, } } #[doc = "SW only"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prbc::Value1 + *self == PRBC_A::VALUE1 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prbc::Value2 + *self == PRBC_A::VALUE2 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Prbc::Value3 + *self == PRBC_A::VALUE3 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Prbc::Value4 + *self == PRBC_A::VALUE4 } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Prbc::Value5 + *self == PRBC_A::VALUE5 } } #[doc = "Field `PRBC` writer - Prescaler Clear Configuration"] -pub type PrbcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prbc>; -impl<'a, REG> PrbcW<'a, REG> +pub type PRBC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PRBC_A>; +impl<'a, REG> PRBC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,90 +78,90 @@ where #[doc = "SW only"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prbc::Value1) + self.variant(PRBC_A::VALUE1) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC80 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prbc::Value2) + self.variant(PRBC_A::VALUE2) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC81 is cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Prbc::Value3) + self.variant(PRBC_A::VALUE3) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC82 is cleared."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Prbc::Value4) + self.variant(PRBC_A::VALUE4) } #[doc = "GSTATThe register contains the status of the prescaler and each timer slice (idle mode or running)..PRB and prescaler registers are cleared when the Run Bit of CC83 is cleared."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Prbc::Value5) + self.variant(PRBC_A::VALUE5) } } #[doc = "Prescaler Input Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pcis { +pub enum PCIS_A { #[doc = "0: Module clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU8x.ECLKA"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU8x.ECLKB"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU8x.ECLKC"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pcis) -> Self { + fn from(variant: PCIS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pcis { +impl crate::FieldSpec for PCIS_A { type Ux = u8; } -impl crate::IsEnum for Pcis {} +impl crate::IsEnum for PCIS_A {} #[doc = "Field `PCIS` reader - Prescaler Input Clock Selection"] -pub type PcisR = crate::FieldReader; -impl PcisR { +pub type PCIS_R = crate::FieldReader; +impl PCIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcis { + pub const fn variant(&self) -> PCIS_A { match self.bits { - 0 => Pcis::Value1, - 1 => Pcis::Value2, - 2 => Pcis::Value3, - 3 => Pcis::Value4, + 0 => PCIS_A::VALUE1, + 1 => PCIS_A::VALUE2, + 2 => PCIS_A::VALUE3, + 3 => PCIS_A::VALUE4, _ => unreachable!(), } } #[doc = "Module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcis::Value1 + *self == PCIS_A::VALUE1 } #[doc = "CCU8x.ECLKA"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcis::Value2 + *self == PCIS_A::VALUE2 } #[doc = "CCU8x.ECLKB"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pcis::Value3 + *self == PCIS_A::VALUE3 } #[doc = "CCU8x.ECLKC"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pcis::Value4 + *self == PCIS_A::VALUE4 } } #[doc = "Field `PCIS` writer - Prescaler Input Clock Selection"] -pub type PcisW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pcis, crate::Safe>; -impl<'a, REG> PcisW<'a, REG> +pub type PCIS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PCIS_A, crate::Safe>; +impl<'a, REG> PCIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -169,85 +169,85 @@ where #[doc = "Module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcis::Value1) + self.variant(PCIS_A::VALUE1) } #[doc = "CCU8x.ECLKA"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcis::Value2) + self.variant(PCIS_A::VALUE2) } #[doc = "CCU8x.ECLKB"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pcis::Value3) + self.variant(PCIS_A::VALUE3) } #[doc = "CCU8x.ECLKC"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pcis::Value4) + self.variant(PCIS_A::VALUE4) } } #[doc = "Suspend Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Suscfg { +pub enum SUSCFG_A { #[doc = "0: Suspend request ignored. The module never enters in suspend"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stops all the running slices immediately. Safe stop is not applied."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Suscfg) -> Self { + fn from(variant: SUSCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Suscfg { +impl crate::FieldSpec for SUSCFG_A { type Ux = u8; } -impl crate::IsEnum for Suscfg {} +impl crate::IsEnum for SUSCFG_A {} #[doc = "Field `SUSCFG` reader - Suspend Mode Configuration"] -pub type SuscfgR = crate::FieldReader; -impl SuscfgR { +pub type SUSCFG_R = crate::FieldReader; +impl SUSCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Suscfg { + pub const fn variant(&self) -> SUSCFG_A { match self.bits { - 0 => Suscfg::Value1, - 1 => Suscfg::Value2, - 2 => Suscfg::Value3, - 3 => Suscfg::Value4, + 0 => SUSCFG_A::VALUE1, + 1 => SUSCFG_A::VALUE2, + 2 => SUSCFG_A::VALUE3, + 3 => SUSCFG_A::VALUE4, _ => unreachable!(), } } #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Suscfg::Value1 + *self == SUSCFG_A::VALUE1 } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Suscfg::Value2 + *self == SUSCFG_A::VALUE2 } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Suscfg::Value3 + *self == SUSCFG_A::VALUE3 } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Suscfg::Value4 + *self == SUSCFG_A::VALUE4 } } #[doc = "Field `SUSCFG` writer - Suspend Mode Configuration"] -pub type SuscfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Suscfg, crate::Safe>; -impl<'a, REG> SuscfgW<'a, REG> +pub type SUSCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SUSCFG_A, crate::Safe>; +impl<'a, REG> SUSCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -255,289 +255,289 @@ where #[doc = "Suspend request ignored. The module never enters in suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Suscfg::Value1) + self.variant(SUSCFG_A::VALUE1) } #[doc = "Stops all the running slices immediately. Safe stop is not applied."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Suscfg::Value2) + self.variant(SUSCFG_A::VALUE2) } #[doc = "Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Suscfg::Value3) + self.variant(SUSCFG_A::VALUE3) } #[doc = "Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Suscfg::Value4) + self.variant(SUSCFG_A::VALUE4) } } #[doc = "Slice 0 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse0 { +pub enum MSE0_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse0) -> Self { + fn from(variant: MSE0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE0` reader - Slice 0 Multi Channel shadow transfer enable"] -pub type Mse0R = crate::BitReader; -impl Mse0R { +pub type MSE0_R = crate::BitReader; +impl MSE0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse0 { + pub const fn variant(&self) -> MSE0_A { match self.bits { - false => Mse0::Value1, - true => Mse0::Value2, + false => MSE0_A::VALUE1, + true => MSE0_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse0::Value1 + *self == MSE0_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse0::Value2 + *self == MSE0_A::VALUE2 } } #[doc = "Field `MSE0` writer - Slice 0 Multi Channel shadow transfer enable"] -pub type Mse0W<'a, REG> = crate::BitWriter<'a, REG, Mse0>; -impl<'a, REG> Mse0W<'a, REG> +pub type MSE0_W<'a, REG> = crate::BitWriter<'a, REG, MSE0_A>; +impl<'a, REG> MSE0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse0::Value1) + self.variant(MSE0_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse0::Value2) + self.variant(MSE0_A::VALUE2) } } #[doc = "Slice 1 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse1 { +pub enum MSE1_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse1) -> Self { + fn from(variant: MSE1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE1` reader - Slice 1 Multi Channel shadow transfer enable"] -pub type Mse1R = crate::BitReader; -impl Mse1R { +pub type MSE1_R = crate::BitReader; +impl MSE1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse1 { + pub const fn variant(&self) -> MSE1_A { match self.bits { - false => Mse1::Value1, - true => Mse1::Value2, + false => MSE1_A::VALUE1, + true => MSE1_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse1::Value1 + *self == MSE1_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse1::Value2 + *self == MSE1_A::VALUE2 } } #[doc = "Field `MSE1` writer - Slice 1 Multi Channel shadow transfer enable"] -pub type Mse1W<'a, REG> = crate::BitWriter<'a, REG, Mse1>; -impl<'a, REG> Mse1W<'a, REG> +pub type MSE1_W<'a, REG> = crate::BitWriter<'a, REG, MSE1_A>; +impl<'a, REG> MSE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse1::Value1) + self.variant(MSE1_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse1::Value2) + self.variant(MSE1_A::VALUE2) } } #[doc = "Slice 2 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse2 { +pub enum MSE2_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8xMCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse2) -> Self { + fn from(variant: MSE2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE2` reader - Slice 2 Multi Channel shadow transfer enable"] -pub type Mse2R = crate::BitReader; -impl Mse2R { +pub type MSE2_R = crate::BitReader; +impl MSE2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse2 { + pub const fn variant(&self) -> MSE2_A { match self.bits { - false => Mse2::Value1, - true => Mse2::Value2, + false => MSE2_A::VALUE1, + true => MSE2_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse2::Value1 + *self == MSE2_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8xMCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse2::Value2 + *self == MSE2_A::VALUE2 } } #[doc = "Field `MSE2` writer - Slice 2 Multi Channel shadow transfer enable"] -pub type Mse2W<'a, REG> = crate::BitWriter<'a, REG, Mse2>; -impl<'a, REG> Mse2W<'a, REG> +pub type MSE2_W<'a, REG> = crate::BitWriter<'a, REG, MSE2_A>; +impl<'a, REG> MSE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse2::Value1) + self.variant(MSE2_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8xMCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse2::Value2) + self.variant(MSE2_A::VALUE2) } } #[doc = "Slice 3 Multi Channel shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mse3 { +pub enum MSE3_A { #[doc = "0: Shadow transfer can only be requested by SW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mse3) -> Self { + fn from(variant: MSE3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSE3` reader - Slice 3 Multi Channel shadow transfer enable"] -pub type Mse3R = crate::BitReader; -impl Mse3R { +pub type MSE3_R = crate::BitReader; +impl MSE3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mse3 { + pub const fn variant(&self) -> MSE3_A { match self.bits { - false => Mse3::Value1, - true => Mse3::Value2, + false => MSE3_A::VALUE1, + true => MSE3_A::VALUE2, } } #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mse3::Value1 + *self == MSE3_A::VALUE1 } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mse3::Value2 + *self == MSE3_A::VALUE2 } } #[doc = "Field `MSE3` writer - Slice 3 Multi Channel shadow transfer enable"] -pub type Mse3W<'a, REG> = crate::BitWriter<'a, REG, Mse3>; -impl<'a, REG> Mse3W<'a, REG> +pub type MSE3_W<'a, REG> = crate::BitWriter<'a, REG, MSE3_A>; +impl<'a, REG> MSE3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer can only be requested by SW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mse3::Value1) + self.variant(MSE3_A::VALUE1) } #[doc = "Shadow transfer can be requested via SW and via the CCU8x.MCSS input."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mse3::Value2) + self.variant(MSE3_A::VALUE2) } } #[doc = "Multi Channel shadow transfer request configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Msde { +pub enum MSDE_A { #[doc = "0: Only the shadow transfer for period and compare values is requested"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer for the compare, period and prescaler compare values is requested"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: Shadow transfer for the compare, period, prescaler and dither compare values is requested"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Msde) -> Self { + fn from(variant: MSDE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Msde { +impl crate::FieldSpec for MSDE_A { type Ux = u8; } -impl crate::IsEnum for Msde {} +impl crate::IsEnum for MSDE_A {} #[doc = "Field `MSDE` reader - Multi Channel shadow transfer request configuration"] -pub type MsdeR = crate::FieldReader; -impl MsdeR { +pub type MSDE_R = crate::FieldReader; +impl MSDE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Msde::Value1), - 1 => Some(Msde::Value2), - 3 => Some(Msde::Value4), + 0 => Some(MSDE_A::VALUE1), + 1 => Some(MSDE_A::VALUE2), + 3 => Some(MSDE_A::VALUE4), _ => None, } } #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msde::Value1 + *self == MSDE_A::VALUE1 } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msde::Value2 + *self == MSDE_A::VALUE2 } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Msde::Value4 + *self == MSDE_A::VALUE4 } } #[doc = "Field `MSDE` writer - Multi Channel shadow transfer request configuration"] -pub type MsdeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msde>; -impl<'a, REG> MsdeW<'a, REG> +pub type MSDE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSDE_A>; +impl<'a, REG> MSDE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -545,125 +545,125 @@ where #[doc = "Only the shadow transfer for period and compare values is requested"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msde::Value1) + self.variant(MSDE_A::VALUE1) } #[doc = "Shadow transfer for the compare, period and prescaler compare values is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msde::Value2) + self.variant(MSDE_A::VALUE2) } #[doc = "Shadow transfer for the compare, period, prescaler and dither compare values is requested"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Msde::Value4) + self.variant(MSDE_A::VALUE4) } } impl R { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - pub fn prbc(&self) -> PrbcR { - PrbcR::new((self.bits & 7) as u8) + pub fn prbc(&self) -> PRBC_R { + PRBC_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - pub fn pcis(&self) -> PcisR { - PcisR::new(((self.bits >> 4) & 3) as u8) + pub fn pcis(&self) -> PCIS_R { + PCIS_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SuscfgR { - SuscfgR::new(((self.bits >> 8) & 3) as u8) + pub fn suscfg(&self) -> SUSCFG_R { + SUSCFG_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse0(&self) -> Mse0R { - Mse0R::new(((self.bits >> 10) & 1) != 0) + pub fn mse0(&self) -> MSE0_R { + MSE0_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse1(&self) -> Mse1R { - Mse1R::new(((self.bits >> 11) & 1) != 0) + pub fn mse1(&self) -> MSE1_R { + MSE1_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse2(&self) -> Mse2R { - Mse2R::new(((self.bits >> 12) & 1) != 0) + pub fn mse2(&self) -> MSE2_R { + MSE2_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - pub fn mse3(&self) -> Mse3R { - Mse3R::new(((self.bits >> 13) & 1) != 0) + pub fn mse3(&self) -> MSE3_R { + MSE3_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - pub fn msde(&self) -> MsdeR { - MsdeR::new(((self.bits >> 14) & 3) as u8) + pub fn msde(&self) -> MSDE_R { + MSDE_R::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] #[must_use] - pub fn prbc(&mut self) -> PrbcW { - PrbcW::new(self, 0) + pub fn prbc(&mut self) -> PRBC_W { + PRBC_W::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] #[must_use] - pub fn pcis(&mut self) -> PcisW { - PcisW::new(self, 4) + pub fn pcis(&mut self) -> PCIS_W { + PCIS_W::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SuscfgW { - SuscfgW::new(self, 8) + pub fn suscfg(&mut self) -> SUSCFG_W { + SUSCFG_W::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse0(&mut self) -> Mse0W { - Mse0W::new(self, 10) + pub fn mse0(&mut self) -> MSE0_W { + MSE0_W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse1(&mut self) -> Mse1W { - Mse1W::new(self, 11) + pub fn mse1(&mut self) -> MSE1_W { + MSE1_W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse2(&mut self) -> Mse2W { - Mse2W::new(self, 12) + pub fn mse2(&mut self) -> MSE2_W { + MSE2_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] #[must_use] - pub fn mse3(&mut self) -> Mse3W { - Mse3W::new(self, 13) + pub fn mse3(&mut self) -> MSE3_W { + MSE3_W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] #[must_use] - pub fn msde(&mut self) -> MsdeW { - MsdeW::new(self, 14) + pub fn msde(&mut self) -> MSDE_W { + MSDE_W::new(self, 14) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GctrlSpec; -impl crate::RegisterSpec for GctrlSpec { +pub struct GCTRL_SPEC; +impl crate::RegisterSpec for GCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gctrl::R`](R) reader structure"] -impl crate::Readable for GctrlSpec {} +impl crate::Readable for GCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`gctrl::W`](W) writer structure"] -impl crate::Writable for GctrlSpec { +impl crate::Writable for GCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GCTRL to value 0"] -impl crate::Resettable for GctrlSpec { +impl crate::Resettable for GCTRL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gidlc.rs b/src/ccu80/gidlc.rs index 33274fc8..9b9cd698 100644 --- a/src/ccu80/gidlc.rs +++ b/src/ccu80/gidlc.rs @@ -1,67 +1,67 @@ #[doc = "Register `GIDLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CS0I` writer - CC80 IDLE mode clear"] -pub type Cs0iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS0I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS1I` writer - CC81 IDLE mode clear"] -pub type Cs1iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS1I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS2I` writer - CC82 IDLE mode clear"] -pub type Cs2iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS2I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CS3I` writer - CC83 IDLE mode clear"] -pub type Cs3iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CS3I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPRB` writer - Prescaler Run Bit Set"] -pub type SprbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPCH` writer - Parity Checker run bit set"] -pub type SpchW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPCH_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs0i(&mut self) -> Cs0iW { - Cs0iW::new(self, 0) + pub fn cs0i(&mut self) -> CS0I_W { + CS0I_W::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs1i(&mut self) -> Cs1iW { - Cs1iW::new(self, 1) + pub fn cs1i(&mut self) -> CS1I_W { + CS1I_W::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs2i(&mut self) -> Cs2iW { - Cs2iW::new(self, 2) + pub fn cs2i(&mut self) -> CS2I_W { + CS2I_W::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode clear"] #[inline(always)] #[must_use] - pub fn cs3i(&mut self) -> Cs3iW { - Cs3iW::new(self, 3) + pub fn cs3i(&mut self) -> CS3I_W { + CS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] #[must_use] - pub fn sprb(&mut self) -> SprbW { - SprbW::new(self, 8) + pub fn sprb(&mut self) -> SPRB_W { + SPRB_W::new(self, 8) } #[doc = "Bit 10 - Parity Checker run bit set"] #[inline(always)] #[must_use] - pub fn spch(&mut self) -> SpchW { - SpchW::new(self, 10) + pub fn spch(&mut self) -> SPCH_W { + SPCH_W::new(self, 10) } } #[doc = "Global Idle Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidlc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GidlcSpec; -impl crate::RegisterSpec for GidlcSpec { +pub struct GIDLC_SPEC; +impl crate::RegisterSpec for GIDLC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidlc::W`](W) writer structure"] -impl crate::Writable for GidlcSpec { +impl crate::Writable for GIDLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLC to value 0"] -impl crate::Resettable for GidlcSpec { +impl crate::Resettable for GIDLC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gidls.rs b/src/ccu80/gidls.rs index a887f299..51ef594d 100644 --- a/src/ccu80/gidls.rs +++ b/src/ccu80/gidls.rs @@ -1,75 +1,75 @@ #[doc = "Register `GIDLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SS0I` writer - CC80 IDLE mode set"] -pub type Ss0iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS0I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS1I` writer - CC81 IDLE mode set"] -pub type Ss1iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS1I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS2I` writer - CC82 IDLE mode set"] -pub type Ss2iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS2I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS3I` writer - CC83 IDLE mode set"] -pub type Ss3iW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS3I_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPRB` writer - Prescaler# Run Bit Clear"] -pub type CprbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CPRB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PSIC` writer - Prescaler clear"] -pub type PsicW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CPCH` writer - Parity Checker Run bit clear"] -pub type CpchW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CPCH_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss0i(&mut self) -> Ss0iW { - Ss0iW::new(self, 0) + pub fn ss0i(&mut self) -> SS0I_W { + SS0I_W::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss1i(&mut self) -> Ss1iW { - Ss1iW::new(self, 1) + pub fn ss1i(&mut self) -> SS1I_W { + SS1I_W::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss2i(&mut self) -> Ss2iW { - Ss2iW::new(self, 2) + pub fn ss2i(&mut self) -> SS2I_W { + SS2I_W::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode set"] #[inline(always)] #[must_use] - pub fn ss3i(&mut self) -> Ss3iW { - Ss3iW::new(self, 3) + pub fn ss3i(&mut self) -> SS3I_W { + SS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler# Run Bit Clear"] #[inline(always)] #[must_use] - pub fn cprb(&mut self) -> CprbW { - CprbW::new(self, 8) + pub fn cprb(&mut self) -> CPRB_W { + CPRB_W::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] #[must_use] - pub fn psic(&mut self) -> PsicW { - PsicW::new(self, 9) + pub fn psic(&mut self) -> PSIC_W { + PSIC_W::new(self, 9) } #[doc = "Bit 10 - Parity Checker Run bit clear"] #[inline(always)] #[must_use] - pub fn cpch(&mut self) -> CpchW { - CpchW::new(self, 10) + pub fn cpch(&mut self) -> CPCH_W { + CPCH_W::new(self, 10) } } #[doc = "Global Idle Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gidls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GidlsSpec; -impl crate::RegisterSpec for GidlsSpec { +pub struct GIDLS_SPEC; +impl crate::RegisterSpec for GIDLS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`gidls::W`](W) writer structure"] -impl crate::Writable for GidlsSpec { +impl crate::Writable for GIDLS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GIDLS to value 0"] -impl crate::Resettable for GidlsSpec { +impl crate::Resettable for GIDLS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gpchk.rs b/src/ccu80/gpchk.rs index e929329e..1a098b17 100644 --- a/src/ccu80/gpchk.rs +++ b/src/ccu80/gpchk.rs @@ -1,72 +1,72 @@ #[doc = "Register `GPCHK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPCHK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PASE` reader - Parity Checker Automatic start/stop"] -pub type PaseR = crate::BitReader; +pub type PASE_R = crate::BitReader; #[doc = "Field `PASE` writer - Parity Checker Automatic start/stop"] -pub type PaseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PASE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Parity Checker Automatic start/stop selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pacs { +pub enum PACS_A { #[doc = "0: CC80"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC81"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CC82"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CC83"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pacs) -> Self { + fn from(variant: PACS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pacs { +impl crate::FieldSpec for PACS_A { type Ux = u8; } -impl crate::IsEnum for Pacs {} +impl crate::IsEnum for PACS_A {} #[doc = "Field `PACS` reader - Parity Checker Automatic start/stop selector"] -pub type PacsR = crate::FieldReader; -impl PacsR { +pub type PACS_R = crate::FieldReader; +impl PACS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pacs { + pub const fn variant(&self) -> PACS_A { match self.bits { - 0 => Pacs::Value1, - 1 => Pacs::Value2, - 2 => Pacs::Value3, - 3 => Pacs::Value4, + 0 => PACS_A::VALUE1, + 1 => PACS_A::VALUE2, + 2 => PACS_A::VALUE3, + 3 => PACS_A::VALUE4, _ => unreachable!(), } } #[doc = "CC80"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pacs::Value1 + *self == PACS_A::VALUE1 } #[doc = "CC81"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pacs::Value2 + *self == PACS_A::VALUE2 } #[doc = "CC82"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pacs::Value3 + *self == PACS_A::VALUE3 } #[doc = "CC83"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pacs::Value4 + *self == PACS_A::VALUE4 } } #[doc = "Field `PACS` writer - Parity Checker Automatic start/stop selector"] -pub type PacsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pacs, crate::Safe>; -impl<'a, REG> PacsW<'a, REG> +pub type PACS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PACS_A, crate::Safe>; +impl<'a, REG> PACS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,85 +74,85 @@ where #[doc = "CC80"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pacs::Value1) + self.variant(PACS_A::VALUE1) } #[doc = "CC81"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pacs::Value2) + self.variant(PACS_A::VALUE2) } #[doc = "CC82"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pacs::Value3) + self.variant(PACS_A::VALUE3) } #[doc = "CC83"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pacs::Value4) + self.variant(PACS_A::VALUE4) } } #[doc = "Driver Input signal selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pisel { +pub enum PISEL_A { #[doc = "0: CC8x.GP01 - driver output is connected to event 1 of slice 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC8x.GP11 - drive output is connected to event 1 of slice 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CC8x.GP21 - driver output is connected to event 1 of slice 2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CC8x.GP31 - driver output is connected to event 1 of slice 3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pisel) -> Self { + fn from(variant: PISEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pisel { +impl crate::FieldSpec for PISEL_A { type Ux = u8; } -impl crate::IsEnum for Pisel {} +impl crate::IsEnum for PISEL_A {} #[doc = "Field `PISEL` reader - Driver Input signal selector"] -pub type PiselR = crate::FieldReader; -impl PiselR { +pub type PISEL_R = crate::FieldReader; +impl PISEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pisel { + pub const fn variant(&self) -> PISEL_A { match self.bits { - 0 => Pisel::Value1, - 1 => Pisel::Value2, - 2 => Pisel::Value3, - 3 => Pisel::Value4, + 0 => PISEL_A::VALUE1, + 1 => PISEL_A::VALUE2, + 2 => PISEL_A::VALUE3, + 3 => PISEL_A::VALUE4, _ => unreachable!(), } } #[doc = "CC8x.GP01 - driver output is connected to event 1 of slice 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pisel::Value1 + *self == PISEL_A::VALUE1 } #[doc = "CC8x.GP11 - drive output is connected to event 1 of slice 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pisel::Value2 + *self == PISEL_A::VALUE2 } #[doc = "CC8x.GP21 - driver output is connected to event 1 of slice 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pisel::Value3 + *self == PISEL_A::VALUE3 } #[doc = "CC8x.GP31 - driver output is connected to event 1 of slice 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pisel::Value4 + *self == PISEL_A::VALUE4 } } #[doc = "Field `PISEL` writer - Driver Input signal selector"] -pub type PiselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pisel, crate::Safe>; -impl<'a, REG> PiselW<'a, REG> +pub type PISEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PISEL_A, crate::Safe>; +impl<'a, REG> PISEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -160,85 +160,85 @@ where #[doc = "CC8x.GP01 - driver output is connected to event 1 of slice 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pisel::Value1) + self.variant(PISEL_A::VALUE1) } #[doc = "CC8x.GP11 - drive output is connected to event 1 of slice 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pisel::Value2) + self.variant(PISEL_A::VALUE2) } #[doc = "CC8x.GP21 - driver output is connected to event 1 of slice 2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pisel::Value3) + self.variant(PISEL_A::VALUE3) } #[doc = "CC8x.GP31 - driver output is connected to event 1 of slice 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pisel::Value4) + self.variant(PISEL_A::VALUE4) } } #[doc = "Parity Checker Delay Input Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pcds { +pub enum PCDS_A { #[doc = "0: CCU8x.IGBTA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU8x.IGBTB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU8x.IGBTC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU8x.IGBTD"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pcds) -> Self { + fn from(variant: PCDS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pcds { +impl crate::FieldSpec for PCDS_A { type Ux = u8; } -impl crate::IsEnum for Pcds {} +impl crate::IsEnum for PCDS_A {} #[doc = "Field `PCDS` reader - Parity Checker Delay Input Selector"] -pub type PcdsR = crate::FieldReader; -impl PcdsR { +pub type PCDS_R = crate::FieldReader; +impl PCDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcds { + pub const fn variant(&self) -> PCDS_A { match self.bits { - 0 => Pcds::Value1, - 1 => Pcds::Value2, - 2 => Pcds::Value3, - 3 => Pcds::Value4, + 0 => PCDS_A::VALUE1, + 1 => PCDS_A::VALUE2, + 2 => PCDS_A::VALUE3, + 3 => PCDS_A::VALUE4, _ => unreachable!(), } } #[doc = "CCU8x.IGBTA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcds::Value1 + *self == PCDS_A::VALUE1 } #[doc = "CCU8x.IGBTB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcds::Value2 + *self == PCDS_A::VALUE2 } #[doc = "CCU8x.IGBTC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pcds::Value3 + *self == PCDS_A::VALUE3 } #[doc = "CCU8x.IGBTD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pcds::Value4 + *self == PCDS_A::VALUE4 } } #[doc = "Field `PCDS` writer - Parity Checker Delay Input Selector"] -pub type PcdsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pcds, crate::Safe>; -impl<'a, REG> PcdsW<'a, REG> +pub type PCDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PCDS_A, crate::Safe>; +impl<'a, REG> PCDS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -246,217 +246,217 @@ where #[doc = "CCU8x.IGBTA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcds::Value1) + self.variant(PCDS_A::VALUE1) } #[doc = "CCU8x.IGBTB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcds::Value2) + self.variant(PCDS_A::VALUE2) } #[doc = "CCU8x.IGBTC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pcds::Value3) + self.variant(PCDS_A::VALUE3) } #[doc = "CCU8x.IGBTD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pcds::Value4) + self.variant(PCDS_A::VALUE4) } } #[doc = "Parity Checker type selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pcts { +pub enum PCTS_A { #[doc = "0: Even parity enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Odd parity enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pcts) -> Self { + fn from(variant: PCTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCTS` reader - Parity Checker type selector"] -pub type PctsR = crate::BitReader; -impl PctsR { +pub type PCTS_R = crate::BitReader; +impl PCTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcts { + pub const fn variant(&self) -> PCTS_A { match self.bits { - false => Pcts::Value1, - true => Pcts::Value2, + false => PCTS_A::VALUE1, + true => PCTS_A::VALUE2, } } #[doc = "Even parity enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcts::Value1 + *self == PCTS_A::VALUE1 } #[doc = "Odd parity enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcts::Value2 + *self == PCTS_A::VALUE2 } } #[doc = "Field `PCTS` writer - Parity Checker type selector"] -pub type PctsW<'a, REG> = crate::BitWriter<'a, REG, Pcts>; -impl<'a, REG> PctsW<'a, REG> +pub type PCTS_W<'a, REG> = crate::BitWriter<'a, REG, PCTS_A>; +impl<'a, REG> PCTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Even parity enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcts::Value1) + self.variant(PCTS_A::VALUE1) } #[doc = "Odd parity enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcts::Value2) + self.variant(PCTS_A::VALUE2) } } #[doc = "Field `PCST` reader - Parity Checker XOR status"] -pub type PcstR = crate::BitReader; +pub type PCST_R = crate::BitReader; #[doc = "Field `PCSEL0` reader - Parity Checker Slice 0 output selection"] -pub type Pcsel0R = crate::FieldReader; +pub type PCSEL0_R = crate::FieldReader; #[doc = "Field `PCSEL0` writer - Parity Checker Slice 0 output selection"] -pub type Pcsel0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCSEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL1` reader - Parity Checker Slice 1 output selection"] -pub type Pcsel1R = crate::FieldReader; +pub type PCSEL1_R = crate::FieldReader; #[doc = "Field `PCSEL1` writer - Parity Checker Slice 1 output selection"] -pub type Pcsel1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCSEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL2` reader - Parity Checker Slice 2 output selection"] -pub type Pcsel2R = crate::FieldReader; +pub type PCSEL2_R = crate::FieldReader; #[doc = "Field `PCSEL2` writer - Parity Checker Slice 2 output selection"] -pub type Pcsel2W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCSEL2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `PCSEL3` reader - Parity Checker Slice 3 output selection"] -pub type Pcsel3R = crate::FieldReader; +pub type PCSEL3_R = crate::FieldReader; #[doc = "Field `PCSEL3` writer - Parity Checker Slice 3 output selection"] -pub type Pcsel3W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCSEL3_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Parity Checker Automatic start/stop"] #[inline(always)] - pub fn pase(&self) -> PaseR { - PaseR::new((self.bits & 1) != 0) + pub fn pase(&self) -> PASE_R { + PASE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"] #[inline(always)] - pub fn pacs(&self) -> PacsR { - PacsR::new(((self.bits >> 1) & 3) as u8) + pub fn pacs(&self) -> PACS_R { + PACS_R::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bits 3:4 - Driver Input signal selector"] #[inline(always)] - pub fn pisel(&self) -> PiselR { - PiselR::new(((self.bits >> 3) & 3) as u8) + pub fn pisel(&self) -> PISEL_R { + PISEL_R::new(((self.bits >> 3) & 3) as u8) } #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"] #[inline(always)] - pub fn pcds(&self) -> PcdsR { - PcdsR::new(((self.bits >> 5) & 3) as u8) + pub fn pcds(&self) -> PCDS_R { + PCDS_R::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Parity Checker type selector"] #[inline(always)] - pub fn pcts(&self) -> PctsR { - PctsR::new(((self.bits >> 7) & 1) != 0) + pub fn pcts(&self) -> PCTS_R { + PCTS_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 15 - Parity Checker XOR status"] #[inline(always)] - pub fn pcst(&self) -> PcstR { - PcstR::new(((self.bits >> 15) & 1) != 0) + pub fn pcst(&self) -> PCST_R { + PCST_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"] #[inline(always)] - pub fn pcsel0(&self) -> Pcsel0R { - Pcsel0R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn pcsel0(&self) -> PCSEL0_R { + PCSEL0_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"] #[inline(always)] - pub fn pcsel1(&self) -> Pcsel1R { - Pcsel1R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn pcsel1(&self) -> PCSEL1_R { + PCSEL1_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"] #[inline(always)] - pub fn pcsel2(&self) -> Pcsel2R { - Pcsel2R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pcsel2(&self) -> PCSEL2_R { + PCSEL2_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"] #[inline(always)] - pub fn pcsel3(&self) -> Pcsel3R { - Pcsel3R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn pcsel3(&self) -> PCSEL3_R { + PCSEL3_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Parity Checker Automatic start/stop"] #[inline(always)] #[must_use] - pub fn pase(&mut self) -> PaseW { - PaseW::new(self, 0) + pub fn pase(&mut self) -> PASE_W { + PASE_W::new(self, 0) } #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"] #[inline(always)] #[must_use] - pub fn pacs(&mut self) -> PacsW { - PacsW::new(self, 1) + pub fn pacs(&mut self) -> PACS_W { + PACS_W::new(self, 1) } #[doc = "Bits 3:4 - Driver Input signal selector"] #[inline(always)] #[must_use] - pub fn pisel(&mut self) -> PiselW { - PiselW::new(self, 3) + pub fn pisel(&mut self) -> PISEL_W { + PISEL_W::new(self, 3) } #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"] #[inline(always)] #[must_use] - pub fn pcds(&mut self) -> PcdsW { - PcdsW::new(self, 5) + pub fn pcds(&mut self) -> PCDS_W { + PCDS_W::new(self, 5) } #[doc = "Bit 7 - Parity Checker type selector"] #[inline(always)] #[must_use] - pub fn pcts(&mut self) -> PctsW { - PctsW::new(self, 7) + pub fn pcts(&mut self) -> PCTS_W { + PCTS_W::new(self, 7) } #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"] #[inline(always)] #[must_use] - pub fn pcsel0(&mut self) -> Pcsel0W { - Pcsel0W::new(self, 16) + pub fn pcsel0(&mut self) -> PCSEL0_W { + PCSEL0_W::new(self, 16) } #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"] #[inline(always)] #[must_use] - pub fn pcsel1(&mut self) -> Pcsel1W { - Pcsel1W::new(self, 20) + pub fn pcsel1(&mut self) -> PCSEL1_W { + PCSEL1_W::new(self, 20) } #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"] #[inline(always)] #[must_use] - pub fn pcsel2(&mut self) -> Pcsel2W { - Pcsel2W::new(self, 24) + pub fn pcsel2(&mut self) -> PCSEL2_W { + PCSEL2_W::new(self, 24) } #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"] #[inline(always)] #[must_use] - pub fn pcsel3(&mut self) -> Pcsel3W { - Pcsel3W::new(self, 28) + pub fn pcsel3(&mut self) -> PCSEL3_W { + PCSEL3_W::new(self, 28) } } #[doc = "Parity Checker Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpchk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpchk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GpchkSpec; -impl crate::RegisterSpec for GpchkSpec { +pub struct GPCHK_SPEC; +impl crate::RegisterSpec for GPCHK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gpchk::R`](R) reader structure"] -impl crate::Readable for GpchkSpec {} +impl crate::Readable for GPCHK_SPEC {} #[doc = "`write(|w| ..)` method takes [`gpchk::W`](W) writer structure"] -impl crate::Writable for GpchkSpec { +impl crate::Writable for GPCHK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPCHK to value 0"] -impl crate::Resettable for GpchkSpec { +impl crate::Resettable for GPCHK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80/gstat.rs b/src/ccu80/gstat.rs index 0e4ca833..545fd746 100644 --- a/src/ccu80/gstat.rs +++ b/src/ccu80/gstat.rs @@ -1,261 +1,261 @@ #[doc = "Register `GSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "CC80 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0i { +pub enum S0I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0i) -> Self { + fn from(variant: S0I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0I` reader - CC80 IDLE status"] -pub type S0iR = crate::BitReader; -impl S0iR { +pub type S0I_R = crate::BitReader; +impl S0I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0i { + pub const fn variant(&self) -> S0I_A { match self.bits { - false => S0i::Value1, - true => S0i::Value2, + false => S0I_A::VALUE1, + true => S0I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0i::Value1 + *self == S0I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0i::Value2 + *self == S0I_A::VALUE2 } } #[doc = "CC81 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1i { +pub enum S1I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1i) -> Self { + fn from(variant: S1I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1I` reader - CC81 IDLE status"] -pub type S1iR = crate::BitReader; -impl S1iR { +pub type S1I_R = crate::BitReader; +impl S1I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1i { + pub const fn variant(&self) -> S1I_A { match self.bits { - false => S1i::Value1, - true => S1i::Value2, + false => S1I_A::VALUE1, + true => S1I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1i::Value1 + *self == S1I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1i::Value2 + *self == S1I_A::VALUE2 } } #[doc = "CC82 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2i { +pub enum S2I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2i) -> Self { + fn from(variant: S2I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2I` reader - CC82 IDLE status"] -pub type S2iR = crate::BitReader; -impl S2iR { +pub type S2I_R = crate::BitReader; +impl S2I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2i { + pub const fn variant(&self) -> S2I_A { match self.bits { - false => S2i::Value1, - true => S2i::Value2, + false => S2I_A::VALUE1, + true => S2I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2i::Value1 + *self == S2I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2i::Value2 + *self == S2I_A::VALUE2 } } #[doc = "CC83 IDLE status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3i { +pub enum S3I_A { #[doc = "0: Running"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Idle"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3i) -> Self { + fn from(variant: S3I_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3I` reader - CC83 IDLE status"] -pub type S3iR = crate::BitReader; -impl S3iR { +pub type S3I_R = crate::BitReader; +impl S3I_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3i { + pub const fn variant(&self) -> S3I_A { match self.bits { - false => S3i::Value1, - true => S3i::Value2, + false => S3I_A::VALUE1, + true => S3I_A::VALUE2, } } #[doc = "Running"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3i::Value1 + *self == S3I_A::VALUE1 } #[doc = "Idle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3i::Value2 + *self == S3I_A::VALUE2 } } #[doc = "Prescaler Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prb { +pub enum PRB_A { #[doc = "0: Prescaler is stopped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prb) -> Self { + fn from(variant: PRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRB` reader - Prescaler Run Bit"] -pub type PrbR = crate::BitReader; -impl PrbR { +pub type PRB_R = crate::BitReader; +impl PRB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prb { + pub const fn variant(&self) -> PRB_A { match self.bits { - false => Prb::Value1, - true => Prb::Value2, + false => PRB_A::VALUE1, + true => PRB_A::VALUE2, } } #[doc = "Prescaler is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prb::Value1 + *self == PRB_A::VALUE1 } #[doc = "Prescaler is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prb::Value2 + *self == PRB_A::VALUE2 } } #[doc = "Parity Checker Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pcrb { +pub enum PCRB_A { #[doc = "0: Parity Checker is stopped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity Checker is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pcrb) -> Self { + fn from(variant: PCRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCRB` reader - Parity Checker Run Bit"] -pub type PcrbR = crate::BitReader; -impl PcrbR { +pub type PCRB_R = crate::BitReader; +impl PCRB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcrb { + pub const fn variant(&self) -> PCRB_A { match self.bits { - false => Pcrb::Value1, - true => Pcrb::Value2, + false => PCRB_A::VALUE1, + true => PCRB_A::VALUE2, } } #[doc = "Parity Checker is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcrb::Value1 + *self == PCRB_A::VALUE1 } #[doc = "Parity Checker is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcrb::Value2 + *self == PCRB_A::VALUE2 } } impl R { #[doc = "Bit 0 - CC80 IDLE status"] #[inline(always)] - pub fn s0i(&self) -> S0iR { - S0iR::new((self.bits & 1) != 0) + pub fn s0i(&self) -> S0I_R { + S0I_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CC81 IDLE status"] #[inline(always)] - pub fn s1i(&self) -> S1iR { - S1iR::new(((self.bits >> 1) & 1) != 0) + pub fn s1i(&self) -> S1I_R { + S1I_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CC82 IDLE status"] #[inline(always)] - pub fn s2i(&self) -> S2iR { - S2iR::new(((self.bits >> 2) & 1) != 0) + pub fn s2i(&self) -> S2I_R { + S2I_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CC83 IDLE status"] #[inline(always)] - pub fn s3i(&self) -> S3iR { - S3iR::new(((self.bits >> 3) & 1) != 0) + pub fn s3i(&self) -> S3I_R { + S3I_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Prescaler Run Bit"] #[inline(always)] - pub fn prb(&self) -> PrbR { - PrbR::new(((self.bits >> 8) & 1) != 0) + pub fn prb(&self) -> PRB_R { + PRB_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Parity Checker Run Bit"] #[inline(always)] - pub fn pcrb(&self) -> PcrbR { - PcrbR::new(((self.bits >> 10) & 1) != 0) + pub fn pcrb(&self) -> PCRB_R { + PCRB_R::new(((self.bits >> 10) & 1) != 0) } } #[doc = "Global Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GstatSpec; -impl crate::RegisterSpec for GstatSpec { +pub struct GSTAT_SPEC; +impl crate::RegisterSpec for GSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gstat::R`](R) reader structure"] -impl crate::Readable for GstatSpec {} +impl crate::Readable for GSTAT_SPEC {} #[doc = "`reset()` method sets GSTAT to value 0x0f"] -impl crate::Resettable for GstatSpec { +impl crate::Resettable for GSTAT_SPEC { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/ccu80/midr.rs b/src/ccu80/midr.rs index f106a2c2..10cbacbb 100644 --- a/src/ccu80/midr.rs +++ b/src/ccu80/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type ModrR = crate::FieldReader; +pub type MODR_R = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type ModtR = crate::FieldReader; +pub type MODT_R = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type ModnR = crate::FieldReader; +pub type MODN_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> ModrR { - ModrR::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> MODR_R { + MODR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> ModtR { - ModtR::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> MODT_R { + MODT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> ModnR { - ModnR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> MODN_R { + MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MidrSpec; -impl crate::RegisterSpec for MidrSpec { +pub struct MIDR_SPEC; +impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MidrSpec {} +impl crate::Readable for MIDR_SPEC {} #[doc = "`reset()` method sets MIDR to value 0x00a7_c000"] -impl crate::Resettable for MidrSpec { +impl crate::Resettable for MIDR_SPEC { const RESET_VALUE: u32 = 0x00a7_c000; } diff --git a/src/ccu80_cc80.rs b/src/ccu80_cc80.rs index 32cfe15e..5ae62e08 100644 --- a/src/ccu80_cc80.rs +++ b/src/ccu80_cc80.rs @@ -1,404 +1,371 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - ins: Ins, - cmc: Cmc, - tcst: Tcst, - tcset: Tcset, - tcclr: Tcclr, - tc: Tc, - psl: Psl, - dit: Dit, - dits: Dits, - psc: Psc, - fpc: Fpc, - fpcs: Fpcs, - pr: Pr, - prs: Prs, - cr1: Cr1, - cr1s: Cr1s, - cr2: Cr2, - cr2s: Cr2s, - chc: Chc, - dtc: Dtc, - dc1r: Dc1r, - dc2r: Dc2r, + ins: INS, + cmc: CMC, + tcst: TCST, + tcset: TCSET, + tcclr: TCCLR, + tc: TC, + psl: PSL, + dit: DIT, + dits: DITS, + psc: PSC, + fpc: FPC, + fpcs: FPCS, + pr: PR, + prs: PRS, + cr1: CR1, + cr1s: CR1S, + cr2: CR2, + cr2s: CR2S, + chc: CHC, + dtc: DTC, + dc1r: DC1R, + dc2r: DC2R, _reserved22: [u8; 0x18], - timer: Timer, - c0v: C0v, - c1v: C1v, - c2v: C2v, - c3v: C3v, + timer: TIMER, + c0v: C0V, + c1v: C1V, + c2v: C2V, + c3v: C3V, _reserved27: [u8; 0x1c], - ints: Ints, - inte: Inte, - srs: Srs, - sws: Sws, - swr: Swr, - stc: Stc, + ints: INTS, + inte: INTE, + srs: SRS, + sws: SWS, + swr: SWR, + stc: STC, } impl RegisterBlock { #[doc = "0x00 - Input Selector Configuration"] #[inline(always)] - pub const fn ins(&self) -> &Ins { + pub const fn ins(&self) -> &INS { &self.ins } #[doc = "0x04 - Connection Matrix Control"] #[inline(always)] - pub const fn cmc(&self) -> &Cmc { + pub const fn cmc(&self) -> &CMC { &self.cmc } #[doc = "0x08 - Slice Timer Status"] #[inline(always)] - pub const fn tcst(&self) -> &Tcst { + pub const fn tcst(&self) -> &TCST { &self.tcst } #[doc = "0x0c - Slice Timer Run Set"] #[inline(always)] - pub const fn tcset(&self) -> &Tcset { + pub const fn tcset(&self) -> &TCSET { &self.tcset } #[doc = "0x10 - Slice Timer Clear"] #[inline(always)] - pub const fn tcclr(&self) -> &Tcclr { + pub const fn tcclr(&self) -> &TCCLR { &self.tcclr } #[doc = "0x14 - Slice Timer Control"] #[inline(always)] - pub const fn tc(&self) -> &Tc { + pub const fn tc(&self) -> &TC { &self.tc } #[doc = "0x18 - Passive Level Config"] #[inline(always)] - pub const fn psl(&self) -> &Psl { + pub const fn psl(&self) -> &PSL { &self.psl } #[doc = "0x1c - Dither Config"] #[inline(always)] - pub const fn dit(&self) -> &Dit { + pub const fn dit(&self) -> &DIT { &self.dit } #[doc = "0x20 - Dither Shadow Register"] #[inline(always)] - pub const fn dits(&self) -> &Dits { + pub const fn dits(&self) -> &DITS { &self.dits } #[doc = "0x24 - Prescaler Control"] #[inline(always)] - pub const fn psc(&self) -> &Psc { + pub const fn psc(&self) -> &PSC { &self.psc } #[doc = "0x28 - Floating Prescaler Control"] #[inline(always)] - pub const fn fpc(&self) -> &Fpc { + pub const fn fpc(&self) -> &FPC { &self.fpc } #[doc = "0x2c - Floating Prescaler Shadow"] #[inline(always)] - pub const fn fpcs(&self) -> &Fpcs { + pub const fn fpcs(&self) -> &FPCS { &self.fpcs } #[doc = "0x30 - Timer Period Value"] #[inline(always)] - pub const fn pr(&self) -> &Pr { + pub const fn pr(&self) -> &PR { &self.pr } #[doc = "0x34 - Timer Shadow Period Value"] #[inline(always)] - pub const fn prs(&self) -> &Prs { + pub const fn prs(&self) -> &PRS { &self.prs } #[doc = "0x38 - Channel 1 Compare Value"] #[inline(always)] - pub const fn cr1(&self) -> &Cr1 { + pub const fn cr1(&self) -> &CR1 { &self.cr1 } #[doc = "0x3c - Channel 1 Compare Shadow Value"] #[inline(always)] - pub const fn cr1s(&self) -> &Cr1s { + pub const fn cr1s(&self) -> &CR1S { &self.cr1s } #[doc = "0x40 - Channel 2 Compare Value"] #[inline(always)] - pub const fn cr2(&self) -> &Cr2 { + pub const fn cr2(&self) -> &CR2 { &self.cr2 } #[doc = "0x44 - Channel 2 Compare Shadow Value"] #[inline(always)] - pub const fn cr2s(&self) -> &Cr2s { + pub const fn cr2s(&self) -> &CR2S { &self.cr2s } #[doc = "0x48 - Channel Control"] #[inline(always)] - pub const fn chc(&self) -> &Chc { + pub const fn chc(&self) -> &CHC { &self.chc } #[doc = "0x4c - Dead Time Control"] #[inline(always)] - pub const fn dtc(&self) -> &Dtc { + pub const fn dtc(&self) -> &DTC { &self.dtc } #[doc = "0x50 - Channel 1 Dead Time Values"] #[inline(always)] - pub const fn dc1r(&self) -> &Dc1r { + pub const fn dc1r(&self) -> &DC1R { &self.dc1r } #[doc = "0x54 - Channel 2 Dead Time Values"] #[inline(always)] - pub const fn dc2r(&self) -> &Dc2r { + pub const fn dc2r(&self) -> &DC2R { &self.dc2r } #[doc = "0x70 - Timer Value"] #[inline(always)] - pub const fn timer(&self) -> &Timer { + pub const fn timer(&self) -> &TIMER { &self.timer } #[doc = "0x74 - Capture Register 0"] #[inline(always)] - pub const fn c0v(&self) -> &C0v { + pub const fn c0v(&self) -> &C0V { &self.c0v } #[doc = "0x78 - Capture Register 1"] #[inline(always)] - pub const fn c1v(&self) -> &C1v { + pub const fn c1v(&self) -> &C1V { &self.c1v } #[doc = "0x7c - Capture Register 2"] #[inline(always)] - pub const fn c2v(&self) -> &C2v { + pub const fn c2v(&self) -> &C2V { &self.c2v } #[doc = "0x80 - Capture Register 3"] #[inline(always)] - pub const fn c3v(&self) -> &C3v { + pub const fn c3v(&self) -> &C3V { &self.c3v } #[doc = "0xa0 - Interrupt Status"] #[inline(always)] - pub const fn ints(&self) -> &Ints { + pub const fn ints(&self) -> &INTS { &self.ints } #[doc = "0xa4 - Interrupt Enable Control"] #[inline(always)] - pub const fn inte(&self) -> &Inte { + pub const fn inte(&self) -> &INTE { &self.inte } #[doc = "0xa8 - Service Request Selector"] #[inline(always)] - pub const fn srs(&self) -> &Srs { + pub const fn srs(&self) -> &SRS { &self.srs } #[doc = "0xac - Interrupt Status Set"] #[inline(always)] - pub const fn sws(&self) -> &Sws { + pub const fn sws(&self) -> &SWS { &self.sws } #[doc = "0xb0 - Interrupt Status Clear"] #[inline(always)] - pub const fn swr(&self) -> &Swr { + pub const fn swr(&self) -> &SWR { &self.swr } #[doc = "0xb4 - Shadow transfer control"] #[inline(always)] - pub const fn stc(&self) -> &Stc { + pub const fn stc(&self) -> &STC { &self.stc } } #[doc = "INS (rw) register accessor: Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ins`] module"] -#[doc(alias = "INS")] -pub type Ins = crate::Reg; +pub type INS = crate::Reg; #[doc = "Input Selector Configuration"] pub mod ins; #[doc = "CMC (rw) register accessor: Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmc`] module"] -#[doc(alias = "CMC")] -pub type Cmc = crate::Reg; +pub type CMC = crate::Reg; #[doc = "Connection Matrix Control"] pub mod cmc; #[doc = "TCST (r) register accessor: Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcst`] module"] -#[doc(alias = "TCST")] -pub type Tcst = crate::Reg; +pub type TCST = crate::Reg; #[doc = "Slice Timer Status"] pub mod tcst; #[doc = "TCSET (w) register accessor: Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcset`] module"] -#[doc(alias = "TCSET")] -pub type Tcset = crate::Reg; +pub type TCSET = crate::Reg; #[doc = "Slice Timer Run Set"] pub mod tcset; #[doc = "TCCLR (w) register accessor: Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcclr`] module"] -#[doc(alias = "TCCLR")] -pub type Tcclr = crate::Reg; +pub type TCCLR = crate::Reg; #[doc = "Slice Timer Clear"] pub mod tcclr; #[doc = "TC (rw) register accessor: Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`] module"] -#[doc(alias = "TC")] -pub type Tc = crate::Reg; +pub type TC = crate::Reg; #[doc = "Slice Timer Control"] pub mod tc; #[doc = "PSL (rw) register accessor: Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psl`] module"] -#[doc(alias = "PSL")] -pub type Psl = crate::Reg; +pub type PSL = crate::Reg; #[doc = "Passive Level Config"] pub mod psl; #[doc = "DIT (r) register accessor: Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dit`] module"] -#[doc(alias = "DIT")] -pub type Dit = crate::Reg; +pub type DIT = crate::Reg; #[doc = "Dither Config"] pub mod dit; #[doc = "DITS (rw) register accessor: Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dits`] module"] -#[doc(alias = "DITS")] -pub type Dits = crate::Reg; +pub type DITS = crate::Reg; #[doc = "Dither Shadow Register"] pub mod dits; #[doc = "PSC (rw) register accessor: Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psc`] module"] -#[doc(alias = "PSC")] -pub type Psc = crate::Reg; +pub type PSC = crate::Reg; #[doc = "Prescaler Control"] pub mod psc; #[doc = "FPC (rw) register accessor: Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpc`] module"] -#[doc(alias = "FPC")] -pub type Fpc = crate::Reg; +pub type FPC = crate::Reg; #[doc = "Floating Prescaler Control"] pub mod fpc; #[doc = "FPCS (rw) register accessor: Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcs`] module"] -#[doc(alias = "FPCS")] -pub type Fpcs = crate::Reg; +pub type FPCS = crate::Reg; #[doc = "Floating Prescaler Shadow"] pub mod fpcs; #[doc = "PR (r) register accessor: Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pr`] module"] -#[doc(alias = "PR")] -pub type Pr = crate::Reg; +pub type PR = crate::Reg; #[doc = "Timer Period Value"] pub mod pr; #[doc = "PRS (rw) register accessor: Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prs`] module"] -#[doc(alias = "PRS")] -pub type Prs = crate::Reg; +pub type PRS = crate::Reg; #[doc = "Timer Shadow Period Value"] pub mod prs; #[doc = "CR1 (r) register accessor: Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] module"] -#[doc(alias = "CR1")] -pub type Cr1 = crate::Reg; +pub type CR1 = crate::Reg; #[doc = "Channel 1 Compare Value"] pub mod cr1; #[doc = "CR1S (rw) register accessor: Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1s`] module"] -#[doc(alias = "CR1S")] -pub type Cr1s = crate::Reg; +pub type CR1S = crate::Reg; #[doc = "Channel 1 Compare Shadow Value"] pub mod cr1s; #[doc = "CR2 (r) register accessor: Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] module"] -#[doc(alias = "CR2")] -pub type Cr2 = crate::Reg; +pub type CR2 = crate::Reg; #[doc = "Channel 2 Compare Value"] pub mod cr2; #[doc = "CR2S (rw) register accessor: Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2s`] module"] -#[doc(alias = "CR2S")] -pub type Cr2s = crate::Reg; +pub type CR2S = crate::Reg; #[doc = "Channel 2 Compare Shadow Value"] pub mod cr2s; #[doc = "CHC (rw) register accessor: Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chc`] module"] -#[doc(alias = "CHC")] -pub type Chc = crate::Reg; +pub type CHC = crate::Reg; #[doc = "Channel Control"] pub mod chc; #[doc = "DTC (rw) register accessor: Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtc`] module"] -#[doc(alias = "DTC")] -pub type Dtc = crate::Reg; +pub type DTC = crate::Reg; #[doc = "Dead Time Control"] pub mod dtc; #[doc = "DC1R (rw) register accessor: Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc1r`] module"] -#[doc(alias = "DC1R")] -pub type Dc1r = crate::Reg; +pub type DC1R = crate::Reg; #[doc = "Channel 1 Dead Time Values"] pub mod dc1r; #[doc = "DC2R (rw) register accessor: Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dc2r`] module"] -#[doc(alias = "DC2R")] -pub type Dc2r = crate::Reg; +pub type DC2R = crate::Reg; #[doc = "Channel 2 Dead Time Values"] pub mod dc2r; #[doc = "TIMER (rw) register accessor: Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer`] module"] -#[doc(alias = "TIMER")] -pub type Timer = crate::Reg; +pub type TIMER = crate::Reg; #[doc = "Timer Value"] pub mod timer; #[doc = "C0V (r) register accessor: Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c0v`] module"] -#[doc(alias = "C0V")] -pub type C0v = crate::Reg; +pub type C0V = crate::Reg; #[doc = "Capture Register 0"] pub mod c0v; #[doc = "C1V (r) register accessor: Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c1v`] module"] -#[doc(alias = "C1V")] -pub type C1v = crate::Reg; +pub type C1V = crate::Reg; #[doc = "Capture Register 1"] pub mod c1v; #[doc = "C2V (r) register accessor: Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c2v`] module"] -#[doc(alias = "C2V")] -pub type C2v = crate::Reg; +pub type C2V = crate::Reg; #[doc = "Capture Register 2"] pub mod c2v; #[doc = "C3V (r) register accessor: Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@c3v`] module"] -#[doc(alias = "C3V")] -pub type C3v = crate::Reg; +pub type C3V = crate::Reg; #[doc = "Capture Register 3"] pub mod c3v; #[doc = "INTS (r) register accessor: Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ints`] module"] -#[doc(alias = "INTS")] -pub type Ints = crate::Reg; +pub type INTS = crate::Reg; #[doc = "Interrupt Status"] pub mod ints; #[doc = "INTE (rw) register accessor: Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inte`] module"] -#[doc(alias = "INTE")] -pub type Inte = crate::Reg; +pub type INTE = crate::Reg; #[doc = "Interrupt Enable Control"] pub mod inte; #[doc = "SRS (rw) register accessor: Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] -#[doc(alias = "SRS")] -pub type Srs = crate::Reg; +pub type SRS = crate::Reg; #[doc = "Service Request Selector"] pub mod srs; #[doc = "SWS (w) register accessor: Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] -#[doc(alias = "SWS")] -pub type Sws = crate::Reg; +pub type SWS = crate::Reg; #[doc = "Interrupt Status Set"] pub mod sws; #[doc = "SWR (w) register accessor: Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swr`] module"] -#[doc(alias = "SWR")] -pub type Swr = crate::Reg; +pub type SWR = crate::Reg; #[doc = "Interrupt Status Clear"] pub mod swr; #[doc = "STC (rw) register accessor: Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stc`] module"] -#[doc(alias = "STC")] -pub type Stc = crate::Reg; +pub type STC = crate::Reg; #[doc = "Shadow transfer control"] pub mod stc; diff --git a/src/ccu80_cc80/c0v.rs b/src/ccu80_cc80/c0v.rs index 8921e719..220d6022 100644 --- a/src/ccu80_cc80/c0v.rs +++ b/src/ccu80_cc80/c0v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C0V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c0v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C0vSpec; -impl crate::RegisterSpec for C0vSpec { +pub struct C0V_SPEC; +impl crate::RegisterSpec for C0V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c0v::R`](R) reader structure"] -impl crate::Readable for C0vSpec {} +impl crate::Readable for C0V_SPEC {} #[doc = "`reset()` method sets C0V to value 0"] -impl crate::Resettable for C0vSpec { +impl crate::Resettable for C0V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c1v.rs b/src/ccu80_cc80/c1v.rs index d7b854ed..19aed9fb 100644 --- a/src/ccu80_cc80/c1v.rs +++ b/src/ccu80_cc80/c1v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C1V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c1v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C1vSpec; -impl crate::RegisterSpec for C1vSpec { +pub struct C1V_SPEC; +impl crate::RegisterSpec for C1V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c1v::R`](R) reader structure"] -impl crate::Readable for C1vSpec {} +impl crate::Readable for C1V_SPEC {} #[doc = "`reset()` method sets C1V to value 0"] -impl crate::Resettable for C1vSpec { +impl crate::Resettable for C1V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c2v.rs b/src/ccu80_cc80/c2v.rs index 5b12e99b..e04bb78c 100644 --- a/src/ccu80_cc80/c2v.rs +++ b/src/ccu80_cc80/c2v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C2V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c2v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C2vSpec; -impl crate::RegisterSpec for C2vSpec { +pub struct C2V_SPEC; +impl crate::RegisterSpec for C2V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c2v::R`](R) reader structure"] -impl crate::Readable for C2vSpec {} +impl crate::Readable for C2V_SPEC {} #[doc = "`reset()` method sets C2V to value 0"] -impl crate::Resettable for C2vSpec { +impl crate::Resettable for C2V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/c3v.rs b/src/ccu80_cc80/c3v.rs index 32fc268f..c502b769 100644 --- a/src/ccu80_cc80/c3v.rs +++ b/src/ccu80_cc80/c3v.rs @@ -1,70 +1,70 @@ #[doc = "Register `C3V` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CAPTV` reader - Capture Value"] -pub type CaptvR = crate::FieldReader; +pub type CAPTV_R = crate::FieldReader; #[doc = "Field `FPCV` reader - Prescaler Value"] -pub type FpcvR = crate::FieldReader; +pub type FPCV_R = crate::FieldReader; #[doc = "Full Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffl { +pub enum FFL_A { #[doc = "0: No new value was captured into the specific capture register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A new value was captured into the specific register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffl) -> Self { + fn from(variant: FFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFL` reader - Full Flag"] -pub type FflR = crate::BitReader; -impl FflR { +pub type FFL_R = crate::BitReader; +impl FFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffl { + pub const fn variant(&self) -> FFL_A { match self.bits { - false => Ffl::Value1, - true => Ffl::Value2, + false => FFL_A::VALUE1, + true => FFL_A::VALUE2, } } #[doc = "No new value was captured into the specific capture register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffl::Value1 + *self == FFL_A::VALUE1 } #[doc = "A new value was captured into the specific register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffl::Value2 + *self == FFL_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Capture Value"] #[inline(always)] - pub fn captv(&self) -> CaptvR { - CaptvR::new((self.bits & 0xffff) as u16) + pub fn captv(&self) -> CAPTV_R { + CAPTV_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Prescaler Value"] #[inline(always)] - pub fn fpcv(&self) -> FpcvR { - FpcvR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn fpcv(&self) -> FPCV_R { + FPCV_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Full Flag"] #[inline(always)] - pub fn ffl(&self) -> FflR { - FflR::new(((self.bits >> 20) & 1) != 0) + pub fn ffl(&self) -> FFL_R { + FFL_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Capture Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`c3v::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct C3vSpec; -impl crate::RegisterSpec for C3vSpec { +pub struct C3V_SPEC; +impl crate::RegisterSpec for C3V_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`c3v::R`](R) reader structure"] -impl crate::Readable for C3vSpec {} +impl crate::Readable for C3V_SPEC {} #[doc = "`reset()` method sets C3V to value 0"] -impl crate::Resettable for C3vSpec { +impl crate::Resettable for C3V_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/chc.rs b/src/ccu80_cc80/chc.rs index 76a7da36..cd4620ac 100644 --- a/src/ccu80_cc80/chc.rs +++ b/src/ccu80_cc80/chc.rs @@ -1,345 +1,345 @@ #[doc = "Register `CHC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Asymmetric PWM mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ase { +pub enum ASE_A { #[doc = "0: Asymmetric PWM is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Asymmetric PWM is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ase) -> Self { + fn from(variant: ASE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASE` reader - Asymmetric PWM mode Enable"] -pub type AseR = crate::BitReader; -impl AseR { +pub type ASE_R = crate::BitReader; +impl ASE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ase { + pub const fn variant(&self) -> ASE_A { match self.bits { - false => Ase::Value1, - true => Ase::Value2, + false => ASE_A::VALUE1, + true => ASE_A::VALUE2, } } #[doc = "Asymmetric PWM is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ase::Value1 + *self == ASE_A::VALUE1 } #[doc = "Asymmetric PWM is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ase::Value2 + *self == ASE_A::VALUE2 } } #[doc = "Field `ASE` writer - Asymmetric PWM mode Enable"] -pub type AseW<'a, REG> = crate::BitWriter<'a, REG, Ase>; -impl<'a, REG> AseW<'a, REG> +pub type ASE_W<'a, REG> = crate::BitWriter<'a, REG, ASE_A>; +impl<'a, REG> ASE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Asymmetric PWM is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ase::Value1) + self.variant(ASE_A::VALUE1) } #[doc = "Asymmetric PWM is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ase::Value2) + self.variant(ASE_A::VALUE2) } } #[doc = "Output selector for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs1 { +pub enum OCS1_A { #[doc = "0: CC8yST1 signal path is connected to the CCU8x.OUTy0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs1) -> Self { + fn from(variant: OCS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS1` reader - Output selector for CCU8x.OUTy0"] -pub type Ocs1R = crate::BitReader; -impl Ocs1R { +pub type OCS1_R = crate::BitReader; +impl OCS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs1 { + pub const fn variant(&self) -> OCS1_A { match self.bits { - false => Ocs1::Value1, - true => Ocs1::Value2, + false => OCS1_A::VALUE1, + true => OCS1_A::VALUE2, } } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs1::Value1 + *self == OCS1_A::VALUE1 } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs1::Value2 + *self == OCS1_A::VALUE2 } } #[doc = "Field `OCS1` writer - Output selector for CCU8x.OUTy0"] -pub type Ocs1W<'a, REG> = crate::BitWriter<'a, REG, Ocs1>; -impl<'a, REG> Ocs1W<'a, REG> +pub type OCS1_W<'a, REG> = crate::BitWriter<'a, REG, OCS1_A>; +impl<'a, REG> OCS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs1::Value1) + self.variant(OCS1_A::VALUE1) } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs1::Value2) + self.variant(OCS1_A::VALUE2) } } #[doc = "Output selector for CCU8x.OUTy1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs2 { +pub enum OCS2_A { #[doc = "0: Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC8yST1 signal path is connected to the CCU8x.OUTy1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs2) -> Self { + fn from(variant: OCS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS2` reader - Output selector for CCU8x.OUTy1"] -pub type Ocs2R = crate::BitReader; -impl Ocs2R { +pub type OCS2_R = crate::BitReader; +impl OCS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs2 { + pub const fn variant(&self) -> OCS2_A { match self.bits { - false => Ocs2::Value1, - true => Ocs2::Value2, + false => OCS2_A::VALUE1, + true => OCS2_A::VALUE2, } } #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs2::Value1 + *self == OCS2_A::VALUE1 } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs2::Value2 + *self == OCS2_A::VALUE2 } } #[doc = "Field `OCS2` writer - Output selector for CCU8x.OUTy1"] -pub type Ocs2W<'a, REG> = crate::BitWriter<'a, REG, Ocs2>; -impl<'a, REG> Ocs2W<'a, REG> +pub type OCS2_W<'a, REG> = crate::BitWriter<'a, REG, OCS2_A>; +impl<'a, REG> OCS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Inverted CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs2::Value1) + self.variant(OCS2_A::VALUE1) } #[doc = "CC8yST1 signal path is connected to the CCU8x.OUTy1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs2::Value2) + self.variant(OCS2_A::VALUE2) } } #[doc = "Output selector for CCU8x.OUTy2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs3 { +pub enum OCS3_A { #[doc = "0: CC8yST2 signal path is connected to the CCU8x.OUTy2"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs3) -> Self { + fn from(variant: OCS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS3` reader - Output selector for CCU8x.OUTy2"] -pub type Ocs3R = crate::BitReader; -impl Ocs3R { +pub type OCS3_R = crate::BitReader; +impl OCS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs3 { + pub const fn variant(&self) -> OCS3_A { match self.bits { - false => Ocs3::Value1, - true => Ocs3::Value2, + false => OCS3_A::VALUE1, + true => OCS3_A::VALUE2, } } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs3::Value1 + *self == OCS3_A::VALUE1 } #[doc = "Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs3::Value2 + *self == OCS3_A::VALUE2 } } #[doc = "Field `OCS3` writer - Output selector for CCU8x.OUTy2"] -pub type Ocs3W<'a, REG> = crate::BitWriter<'a, REG, Ocs3>; -impl<'a, REG> Ocs3W<'a, REG> +pub type OCS3_W<'a, REG> = crate::BitWriter<'a, REG, OCS3_A>; +impl<'a, REG> OCS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs3::Value1) + self.variant(OCS3_A::VALUE1) } #[doc = "Inverted CCST2 signal path is connected to the CCU8x.OUTy2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs3::Value2) + self.variant(OCS3_A::VALUE2) } } #[doc = "Output selector for CCU8x.OUTy3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs4 { +pub enum OCS4_A { #[doc = "0: Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC8yST2 signal path is connected to the CCU8x.OUTy3"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs4) -> Self { + fn from(variant: OCS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS4` reader - Output selector for CCU8x.OUTy3"] -pub type Ocs4R = crate::BitReader; -impl Ocs4R { +pub type OCS4_R = crate::BitReader; +impl OCS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs4 { + pub const fn variant(&self) -> OCS4_A { match self.bits { - false => Ocs4::Value1, - true => Ocs4::Value2, + false => OCS4_A::VALUE1, + true => OCS4_A::VALUE2, } } #[doc = "Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs4::Value1 + *self == OCS4_A::VALUE1 } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs4::Value2 + *self == OCS4_A::VALUE2 } } #[doc = "Field `OCS4` writer - Output selector for CCU8x.OUTy3"] -pub type Ocs4W<'a, REG> = crate::BitWriter<'a, REG, Ocs4>; -impl<'a, REG> Ocs4W<'a, REG> +pub type OCS4_W<'a, REG> = crate::BitWriter<'a, REG, OCS4_A>; +impl<'a, REG> OCS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Inverted CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs4::Value1) + self.variant(OCS4_A::VALUE1) } #[doc = "CC8yST2 signal path is connected to the CCU8x.OUTy3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs4::Value2) + self.variant(OCS4_A::VALUE2) } } impl R { #[doc = "Bit 0 - Asymmetric PWM mode Enable"] #[inline(always)] - pub fn ase(&self) -> AseR { - AseR::new((self.bits & 1) != 0) + pub fn ase(&self) -> ASE_R { + ASE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"] #[inline(always)] - pub fn ocs1(&self) -> Ocs1R { - Ocs1R::new(((self.bits >> 1) & 1) != 0) + pub fn ocs1(&self) -> OCS1_R { + OCS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"] #[inline(always)] - pub fn ocs2(&self) -> Ocs2R { - Ocs2R::new(((self.bits >> 2) & 1) != 0) + pub fn ocs2(&self) -> OCS2_R { + OCS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"] #[inline(always)] - pub fn ocs3(&self) -> Ocs3R { - Ocs3R::new(((self.bits >> 3) & 1) != 0) + pub fn ocs3(&self) -> OCS3_R { + OCS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"] #[inline(always)] - pub fn ocs4(&self) -> Ocs4R { - Ocs4R::new(((self.bits >> 4) & 1) != 0) + pub fn ocs4(&self) -> OCS4_R { + OCS4_R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Asymmetric PWM mode Enable"] #[inline(always)] #[must_use] - pub fn ase(&mut self) -> AseW { - AseW::new(self, 0) + pub fn ase(&mut self) -> ASE_W { + ASE_W::new(self, 0) } #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn ocs1(&mut self) -> Ocs1W { - Ocs1W::new(self, 1) + pub fn ocs1(&mut self) -> OCS1_W { + OCS1_W::new(self, 1) } #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn ocs2(&mut self) -> Ocs2W { - Ocs2W::new(self, 2) + pub fn ocs2(&mut self) -> OCS2_W { + OCS2_W::new(self, 2) } #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn ocs3(&mut self) -> Ocs3W { - Ocs3W::new(self, 3) + pub fn ocs3(&mut self) -> OCS3_W { + OCS3_W::new(self, 3) } #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn ocs4(&mut self) -> Ocs4W { - Ocs4W::new(self, 4) + pub fn ocs4(&mut self) -> OCS4_W { + OCS4_W::new(self, 4) } } #[doc = "Channel Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ChcSpec; -impl crate::RegisterSpec for ChcSpec { +pub struct CHC_SPEC; +impl crate::RegisterSpec for CHC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`chc::R`](R) reader structure"] -impl crate::Readable for ChcSpec {} +impl crate::Readable for CHC_SPEC {} #[doc = "`write(|w| ..)` method takes [`chc::W`](W) writer structure"] -impl crate::Writable for ChcSpec { +impl crate::Writable for CHC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHC to value 0"] -impl crate::Resettable for ChcSpec { +impl crate::Resettable for CHC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cmc.rs b/src/ccu80_cc80/cmc.rs index 727455ac..cbf59c75 100644 --- a/src/ccu80_cc80/cmc.rs +++ b/src/ccu80_cc80/cmc.rs @@ -1,68 +1,68 @@ #[doc = "Register `CMC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "External Start Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Strts { +pub enum STRTS_A { #[doc = "0: External Start Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Start Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Start Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Start Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Strts) -> Self { + fn from(variant: STRTS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Strts { +impl crate::FieldSpec for STRTS_A { type Ux = u8; } -impl crate::IsEnum for Strts {} +impl crate::IsEnum for STRTS_A {} #[doc = "Field `STRTS` reader - External Start Functionality Selector"] -pub type StrtsR = crate::FieldReader; -impl StrtsR { +pub type STRTS_R = crate::FieldReader; +impl STRTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Strts { + pub const fn variant(&self) -> STRTS_A { match self.bits { - 0 => Strts::Value1, - 1 => Strts::Value2, - 2 => Strts::Value3, - 3 => Strts::Value4, + 0 => STRTS_A::VALUE1, + 1 => STRTS_A::VALUE2, + 2 => STRTS_A::VALUE3, + 3 => STRTS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Start Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Strts::Value1 + *self == STRTS_A::VALUE1 } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Strts::Value2 + *self == STRTS_A::VALUE2 } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Strts::Value3 + *self == STRTS_A::VALUE3 } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Strts::Value4 + *self == STRTS_A::VALUE4 } } #[doc = "Field `STRTS` writer - External Start Functionality Selector"] -pub type StrtsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Strts, crate::Safe>; -impl<'a, REG> StrtsW<'a, REG> +pub type STRTS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STRTS_A, crate::Safe>; +impl<'a, REG> STRTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "External Start Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Strts::Value1) + self.variant(STRTS_A::VALUE1) } #[doc = "External Start Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Strts::Value2) + self.variant(STRTS_A::VALUE2) } #[doc = "External Start Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Strts::Value3) + self.variant(STRTS_A::VALUE3) } #[doc = "External Start Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Strts::Value4) + self.variant(STRTS_A::VALUE4) } } #[doc = "External Stop Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ends { +pub enum ENDS_A { #[doc = "0: External Stop Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Stop Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Stop Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Stop Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ends) -> Self { + fn from(variant: ENDS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ends { +impl crate::FieldSpec for ENDS_A { type Ux = u8; } -impl crate::IsEnum for Ends {} +impl crate::IsEnum for ENDS_A {} #[doc = "Field `ENDS` reader - External Stop Functionality Selector"] -pub type EndsR = crate::FieldReader; -impl EndsR { +pub type ENDS_R = crate::FieldReader; +impl ENDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ends { + pub const fn variant(&self) -> ENDS_A { match self.bits { - 0 => Ends::Value1, - 1 => Ends::Value2, - 2 => Ends::Value3, - 3 => Ends::Value4, + 0 => ENDS_A::VALUE1, + 1 => ENDS_A::VALUE2, + 2 => ENDS_A::VALUE3, + 3 => ENDS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ends::Value1 + *self == ENDS_A::VALUE1 } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ends::Value2 + *self == ENDS_A::VALUE2 } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ends::Value3 + *self == ENDS_A::VALUE3 } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ends::Value4 + *self == ENDS_A::VALUE4 } } #[doc = "Field `ENDS` writer - External Stop Functionality Selector"] -pub type EndsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ends, crate::Safe>; -impl<'a, REG> EndsW<'a, REG> +pub type ENDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDS_A, crate::Safe>; +impl<'a, REG> ENDS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "External Stop Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ends::Value1) + self.variant(ENDS_A::VALUE1) } #[doc = "External Stop Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ends::Value2) + self.variant(ENDS_A::VALUE2) } #[doc = "External Stop Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ends::Value3) + self.variant(ENDS_A::VALUE3) } #[doc = "External Stop Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ends::Value4) + self.variant(ENDS_A::VALUE4) } } #[doc = "External Capture 0 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cap0s { +pub enum CAP0S_A { #[doc = "0: External Capture 0 Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Capture 0 Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Capture 0 Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Capture 0 Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cap0s) -> Self { + fn from(variant: CAP0S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cap0s { +impl crate::FieldSpec for CAP0S_A { type Ux = u8; } -impl crate::IsEnum for Cap0s {} +impl crate::IsEnum for CAP0S_A {} #[doc = "Field `CAP0S` reader - External Capture 0 Functionality Selector"] -pub type Cap0sR = crate::FieldReader; -impl Cap0sR { +pub type CAP0S_R = crate::FieldReader; +impl CAP0S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cap0s { + pub const fn variant(&self) -> CAP0S_A { match self.bits { - 0 => Cap0s::Value1, - 1 => Cap0s::Value2, - 2 => Cap0s::Value3, - 3 => Cap0s::Value4, + 0 => CAP0S_A::VALUE1, + 1 => CAP0S_A::VALUE2, + 2 => CAP0S_A::VALUE3, + 3 => CAP0S_A::VALUE4, _ => unreachable!(), } } #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cap0s::Value1 + *self == CAP0S_A::VALUE1 } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cap0s::Value2 + *self == CAP0S_A::VALUE2 } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cap0s::Value3 + *self == CAP0S_A::VALUE3 } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cap0s::Value4 + *self == CAP0S_A::VALUE4 } } #[doc = "Field `CAP0S` writer - External Capture 0 Functionality Selector"] -pub type Cap0sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap0s, crate::Safe>; -impl<'a, REG> Cap0sW<'a, REG> +pub type CAP0S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAP0S_A, crate::Safe>; +impl<'a, REG> CAP0S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "External Capture 0 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cap0s::Value1) + self.variant(CAP0S_A::VALUE1) } #[doc = "External Capture 0 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cap0s::Value2) + self.variant(CAP0S_A::VALUE2) } #[doc = "External Capture 0 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cap0s::Value3) + self.variant(CAP0S_A::VALUE3) } #[doc = "External Capture 0 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cap0s::Value4) + self.variant(CAP0S_A::VALUE4) } } #[doc = "External Capture 1 Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cap1s { +pub enum CAP1S_A { #[doc = "0: External Capture 1 Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Capture 1 Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Capture 1 Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Capture 1 Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cap1s) -> Self { + fn from(variant: CAP1S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cap1s { +impl crate::FieldSpec for CAP1S_A { type Ux = u8; } -impl crate::IsEnum for Cap1s {} +impl crate::IsEnum for CAP1S_A {} #[doc = "Field `CAP1S` reader - External Capture 1 Functionality Selector"] -pub type Cap1sR = crate::FieldReader; -impl Cap1sR { +pub type CAP1S_R = crate::FieldReader; +impl CAP1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cap1s { + pub const fn variant(&self) -> CAP1S_A { match self.bits { - 0 => Cap1s::Value1, - 1 => Cap1s::Value2, - 2 => Cap1s::Value3, - 3 => Cap1s::Value4, + 0 => CAP1S_A::VALUE1, + 1 => CAP1S_A::VALUE2, + 2 => CAP1S_A::VALUE3, + 3 => CAP1S_A::VALUE4, _ => unreachable!(), } } #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cap1s::Value1 + *self == CAP1S_A::VALUE1 } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cap1s::Value2 + *self == CAP1S_A::VALUE2 } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cap1s::Value3 + *self == CAP1S_A::VALUE3 } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cap1s::Value4 + *self == CAP1S_A::VALUE4 } } #[doc = "Field `CAP1S` writer - External Capture 1 Functionality Selector"] -pub type Cap1sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cap1s, crate::Safe>; -impl<'a, REG> Cap1sW<'a, REG> +pub type CAP1S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAP1S_A, crate::Safe>; +impl<'a, REG> CAP1S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "External Capture 1 Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cap1s::Value1) + self.variant(CAP1S_A::VALUE1) } #[doc = "External Capture 1 Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cap1s::Value2) + self.variant(CAP1S_A::VALUE2) } #[doc = "External Capture 1 Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cap1s::Value3) + self.variant(CAP1S_A::VALUE3) } #[doc = "External Capture 1 Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cap1s::Value4) + self.variant(CAP1S_A::VALUE4) } } #[doc = "External Gate Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Gates { +pub enum GATES_A { #[doc = "0: External Gating Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Gating Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Gating Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Gating Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Gates) -> Self { + fn from(variant: GATES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Gates { +impl crate::FieldSpec for GATES_A { type Ux = u8; } -impl crate::IsEnum for Gates {} +impl crate::IsEnum for GATES_A {} #[doc = "Field `GATES` reader - External Gate Functionality Selector"] -pub type GatesR = crate::FieldReader; -impl GatesR { +pub type GATES_R = crate::FieldReader; +impl GATES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gates { + pub const fn variant(&self) -> GATES_A { match self.bits { - 0 => Gates::Value1, - 1 => Gates::Value2, - 2 => Gates::Value3, - 3 => Gates::Value4, + 0 => GATES_A::VALUE1, + 1 => GATES_A::VALUE2, + 2 => GATES_A::VALUE3, + 3 => GATES_A::VALUE4, _ => unreachable!(), } } #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gates::Value1 + *self == GATES_A::VALUE1 } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gates::Value2 + *self == GATES_A::VALUE2 } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Gates::Value3 + *self == GATES_A::VALUE3 } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Gates::Value4 + *self == GATES_A::VALUE4 } } #[doc = "Field `GATES` writer - External Gate Functionality Selector"] -pub type GatesW<'a, REG> = crate::FieldWriter<'a, REG, 2, Gates, crate::Safe>; -impl<'a, REG> GatesW<'a, REG> +pub type GATES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GATES_A, crate::Safe>; +impl<'a, REG> GATES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "External Gating Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gates::Value1) + self.variant(GATES_A::VALUE1) } #[doc = "External Gating Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gates::Value2) + self.variant(GATES_A::VALUE2) } #[doc = "External Gating Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Gates::Value3) + self.variant(GATES_A::VALUE3) } #[doc = "External Gating Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Gates::Value4) + self.variant(GATES_A::VALUE4) } } #[doc = "External Up/Down Functionality Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Uds { +pub enum UDS_A { #[doc = "0: External Up/Down Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Up/Down Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Up/Down Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Up/Down Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Uds) -> Self { + fn from(variant: UDS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Uds { +impl crate::FieldSpec for UDS_A { type Ux = u8; } -impl crate::IsEnum for Uds {} +impl crate::IsEnum for UDS_A {} #[doc = "Field `UDS` reader - External Up/Down Functionality Selector"] -pub type UdsR = crate::FieldReader; -impl UdsR { +pub type UDS_R = crate::FieldReader; +impl UDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Uds { + pub const fn variant(&self) -> UDS_A { match self.bits { - 0 => Uds::Value1, - 1 => Uds::Value2, - 2 => Uds::Value3, - 3 => Uds::Value4, + 0 => UDS_A::VALUE1, + 1 => UDS_A::VALUE2, + 2 => UDS_A::VALUE3, + 3 => UDS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Uds::Value1 + *self == UDS_A::VALUE1 } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Uds::Value2 + *self == UDS_A::VALUE2 } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Uds::Value3 + *self == UDS_A::VALUE3 } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Uds::Value4 + *self == UDS_A::VALUE4 } } #[doc = "Field `UDS` writer - External Up/Down Functionality Selector"] -pub type UdsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Uds, crate::Safe>; -impl<'a, REG> UdsW<'a, REG> +pub type UDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, UDS_A, crate::Safe>; +impl<'a, REG> UDS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,89 +500,89 @@ where #[doc = "External Up/Down Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Uds::Value1) + self.variant(UDS_A::VALUE1) } #[doc = "External Up/Down Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Uds::Value2) + self.variant(UDS_A::VALUE2) } #[doc = "External Up/Down Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Uds::Value3) + self.variant(UDS_A::VALUE3) } #[doc = "External Up/Down Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Uds::Value4) + self.variant(UDS_A::VALUE4) } } #[doc = "Field `LDS` reader - External Timer Load Functionality Selector"] -pub type LdsR = crate::FieldReader; +pub type LDS_R = crate::FieldReader; #[doc = "Field `LDS` writer - External Timer Load Functionality Selector"] -pub type LdsW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type LDS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "External Count Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cnts { +pub enum CNTS_A { #[doc = "0: External Count Function deactivated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Count Function triggered by Event 0"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Count Function triggered by Event 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Count Function triggered by Event 2"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cnts) -> Self { + fn from(variant: CNTS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cnts { +impl crate::FieldSpec for CNTS_A { type Ux = u8; } -impl crate::IsEnum for Cnts {} +impl crate::IsEnum for CNTS_A {} #[doc = "Field `CNTS` reader - External Count Selector"] -pub type CntsR = crate::FieldReader; -impl CntsR { +pub type CNTS_R = crate::FieldReader; +impl CNTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cnts { + pub const fn variant(&self) -> CNTS_A { match self.bits { - 0 => Cnts::Value1, - 1 => Cnts::Value2, - 2 => Cnts::Value3, - 3 => Cnts::Value4, + 0 => CNTS_A::VALUE1, + 1 => CNTS_A::VALUE2, + 2 => CNTS_A::VALUE3, + 3 => CNTS_A::VALUE4, _ => unreachable!(), } } #[doc = "External Count Function deactivated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cnts::Value1 + *self == CNTS_A::VALUE1 } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cnts::Value2 + *self == CNTS_A::VALUE2 } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cnts::Value3 + *self == CNTS_A::VALUE3 } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cnts::Value4 + *self == CNTS_A::VALUE4 } } #[doc = "Field `CNTS` writer - External Count Selector"] -pub type CntsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cnts, crate::Safe>; -impl<'a, REG> CntsW<'a, REG> +pub type CNTS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CNTS_A, crate::Safe>; +impl<'a, REG> CNTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -590,337 +590,337 @@ where #[doc = "External Count Function deactivated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cnts::Value1) + self.variant(CNTS_A::VALUE1) } #[doc = "External Count Function triggered by Event 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cnts::Value2) + self.variant(CNTS_A::VALUE2) } #[doc = "External Count Function triggered by Event 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cnts::Value3) + self.variant(CNTS_A::VALUE3) } #[doc = "External Count Function triggered by Event 2"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cnts::Value4) + self.variant(CNTS_A::VALUE4) } } #[doc = "Override Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ofs { +pub enum OFS_A { #[doc = "0: Override functionality disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ofs) -> Self { + fn from(variant: OFS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OFS` reader - Override Function Selector"] -pub type OfsR = crate::BitReader; -impl OfsR { +pub type OFS_R = crate::BitReader; +impl OFS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ofs { + pub const fn variant(&self) -> OFS_A { match self.bits { - false => Ofs::Value1, - true => Ofs::Value2, + false => OFS_A::VALUE1, + true => OFS_A::VALUE2, } } #[doc = "Override functionality disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ofs::Value1 + *self == OFS_A::VALUE1 } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ofs::Value2 + *self == OFS_A::VALUE2 } } #[doc = "Field `OFS` writer - Override Function Selector"] -pub type OfsW<'a, REG> = crate::BitWriter<'a, REG, Ofs>; -impl<'a, REG> OfsW<'a, REG> +pub type OFS_W<'a, REG> = crate::BitWriter<'a, REG, OFS_A>; +impl<'a, REG> OFS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Override functionality disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ofs::Value1) + self.variant(OFS_A::VALUE1) } #[doc = "Status bit trigger override connected to Event 1; Status bit value override connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ofs::Value2) + self.variant(OFS_A::VALUE2) } } #[doc = "Trap Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ts { +pub enum TS_A { #[doc = "0: Trap function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP function connected to Event 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ts) -> Self { + fn from(variant: TS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TS` reader - Trap Function Selector"] -pub type TsR = crate::BitReader; -impl TsR { +pub type TS_R = crate::BitReader; +impl TS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ts { + pub const fn variant(&self) -> TS_A { match self.bits { - false => Ts::Value1, - true => Ts::Value2, + false => TS_A::VALUE1, + true => TS_A::VALUE2, } } #[doc = "Trap function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ts::Value1 + *self == TS_A::VALUE1 } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ts::Value2 + *self == TS_A::VALUE2 } } #[doc = "Field `TS` writer - Trap Function Selector"] -pub type TsW<'a, REG> = crate::BitWriter<'a, REG, Ts>; -impl<'a, REG> TsW<'a, REG> +pub type TS_W<'a, REG> = crate::BitWriter<'a, REG, TS_A>; +impl<'a, REG> TS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ts::Value1) + self.variant(TS_A::VALUE1) } #[doc = "TRAP function connected to Event 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ts::Value2) + self.variant(TS_A::VALUE2) } } #[doc = "Field `MOS` reader - External Modulation Functionality Selector"] -pub type MosR = crate::FieldReader; +pub type MOS_R = crate::FieldReader; #[doc = "Field `MOS` writer - External Modulation Functionality Selector"] -pub type MosW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type MOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Timer Concatenation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tce { +pub enum TCE_A { #[doc = "0: Timer concatenation is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer concatenation is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tce) -> Self { + fn from(variant: TCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TCE` reader - Timer Concatenation Enable"] -pub type TceR = crate::BitReader; -impl TceR { +pub type TCE_R = crate::BitReader; +impl TCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tce { + pub const fn variant(&self) -> TCE_A { match self.bits { - false => Tce::Value1, - true => Tce::Value2, + false => TCE_A::VALUE1, + true => TCE_A::VALUE2, } } #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tce::Value1 + *self == TCE_A::VALUE1 } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tce::Value2 + *self == TCE_A::VALUE2 } } #[doc = "Field `TCE` writer - Timer Concatenation Enable"] -pub type TceW<'a, REG> = crate::BitWriter<'a, REG, Tce>; -impl<'a, REG> TceW<'a, REG> +pub type TCE_W<'a, REG> = crate::BitWriter<'a, REG, TCE_A>; +impl<'a, REG> TCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer concatenation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tce::Value1) + self.variant(TCE_A::VALUE1) } #[doc = "Timer concatenation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tce::Value2) + self.variant(TCE_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - pub fn strts(&self) -> StrtsR { - StrtsR::new((self.bits & 3) as u8) + pub fn strts(&self) -> STRTS_R { + STRTS_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - pub fn ends(&self) -> EndsR { - EndsR::new(((self.bits >> 2) & 3) as u8) + pub fn ends(&self) -> ENDS_R { + ENDS_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - pub fn cap0s(&self) -> Cap0sR { - Cap0sR::new(((self.bits >> 4) & 3) as u8) + pub fn cap0s(&self) -> CAP0S_R { + CAP0S_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - pub fn cap1s(&self) -> Cap1sR { - Cap1sR::new(((self.bits >> 6) & 3) as u8) + pub fn cap1s(&self) -> CAP1S_R { + CAP1S_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - pub fn gates(&self) -> GatesR { - GatesR::new(((self.bits >> 8) & 3) as u8) + pub fn gates(&self) -> GATES_R { + GATES_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - pub fn uds(&self) -> UdsR { - UdsR::new(((self.bits >> 10) & 3) as u8) + pub fn uds(&self) -> UDS_R { + UDS_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - pub fn lds(&self) -> LdsR { - LdsR::new(((self.bits >> 12) & 3) as u8) + pub fn lds(&self) -> LDS_R { + LDS_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - pub fn cnts(&self) -> CntsR { - CntsR::new(((self.bits >> 14) & 3) as u8) + pub fn cnts(&self) -> CNTS_R { + CNTS_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - pub fn ofs(&self) -> OfsR { - OfsR::new(((self.bits >> 16) & 1) != 0) + pub fn ofs(&self) -> OFS_R { + OFS_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - pub fn ts(&self) -> TsR { - TsR::new(((self.bits >> 17) & 1) != 0) + pub fn ts(&self) -> TS_R { + TS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - pub fn mos(&self) -> MosR { - MosR::new(((self.bits >> 18) & 3) as u8) + pub fn mos(&self) -> MOS_R { + MOS_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - pub fn tce(&self) -> TceR { - TceR::new(((self.bits >> 20) & 1) != 0) + pub fn tce(&self) -> TCE_R { + TCE_R::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] #[must_use] - pub fn strts(&mut self) -> StrtsW { - StrtsW::new(self, 0) + pub fn strts(&mut self) -> STRTS_W { + STRTS_W::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] #[must_use] - pub fn ends(&mut self) -> EndsW { - EndsW::new(self, 2) + pub fn ends(&mut self) -> ENDS_W { + ENDS_W::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap0s(&mut self) -> Cap0sW { - Cap0sW::new(self, 4) + pub fn cap0s(&mut self) -> CAP0S_W { + CAP0S_W::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] #[must_use] - pub fn cap1s(&mut self) -> Cap1sW { - Cap1sW::new(self, 6) + pub fn cap1s(&mut self) -> CAP1S_W { + CAP1S_W::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] #[must_use] - pub fn gates(&mut self) -> GatesW { - GatesW::new(self, 8) + pub fn gates(&mut self) -> GATES_W { + GATES_W::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] #[must_use] - pub fn uds(&mut self) -> UdsW { - UdsW::new(self, 10) + pub fn uds(&mut self) -> UDS_W { + UDS_W::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] #[must_use] - pub fn lds(&mut self) -> LdsW { - LdsW::new(self, 12) + pub fn lds(&mut self) -> LDS_W { + LDS_W::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] #[must_use] - pub fn cnts(&mut self) -> CntsW { - CntsW::new(self, 14) + pub fn cnts(&mut self) -> CNTS_W { + CNTS_W::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] #[must_use] - pub fn ofs(&mut self) -> OfsW { - OfsW::new(self, 16) + pub fn ofs(&mut self) -> OFS_W { + OFS_W::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] #[must_use] - pub fn ts(&mut self) -> TsW { - TsW::new(self, 17) + pub fn ts(&mut self) -> TS_W { + TS_W::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] #[must_use] - pub fn mos(&mut self) -> MosW { - MosW::new(self, 18) + pub fn mos(&mut self) -> MOS_W { + MOS_W::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] #[must_use] - pub fn tce(&mut self) -> TceW { - TceW::new(self, 20) + pub fn tce(&mut self) -> TCE_W { + TCE_W::new(self, 20) } } #[doc = "Connection Matrix Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CmcSpec; -impl crate::RegisterSpec for CmcSpec { +pub struct CMC_SPEC; +impl crate::RegisterSpec for CMC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cmc::R`](R) reader structure"] -impl crate::Readable for CmcSpec {} +impl crate::Readable for CMC_SPEC {} #[doc = "`write(|w| ..)` method takes [`cmc::W`](W) writer structure"] -impl crate::Writable for CmcSpec { +impl crate::Writable for CMC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMC to value 0"] -impl crate::Resettable for CmcSpec { +impl crate::Resettable for CMC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr1.rs b/src/ccu80_cc80/cr1.rs index dd379e3c..9b6f129a 100644 --- a/src/ccu80_cc80/cr1.rs +++ b/src/ccu80_cc80/cr1.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR1` reader - Compare Register for Channel 1"] -pub type Cr1R = crate::FieldReader; +pub type CR1_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register for Channel 1"] #[inline(always)] - pub fn cr1(&self) -> Cr1R { - Cr1R::new((self.bits & 0xffff) as u16) + pub fn cr1(&self) -> CR1_R { + CR1_R::new((self.bits & 0xffff) as u16) } } #[doc = "Channel 1 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr1Spec; -impl crate::RegisterSpec for Cr1Spec { +pub struct CR1_SPEC; +impl crate::RegisterSpec for CR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr1::R`](R) reader structure"] -impl crate::Readable for Cr1Spec {} +impl crate::Readable for CR1_SPEC {} #[doc = "`reset()` method sets CR1 to value 0"] -impl crate::Resettable for Cr1Spec { +impl crate::Resettable for CR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr1s.rs b/src/ccu80_cc80/cr1s.rs index 8bb0b7cc..1062b0d2 100644 --- a/src/ccu80_cc80/cr1s.rs +++ b/src/ccu80_cc80/cr1s.rs @@ -1,40 +1,40 @@ #[doc = "Register `CR1S` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CR1S` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CR1S` reader - Shadow Compare Register for Channel 1"] -pub type Cr1sR = crate::FieldReader; +pub type CR1S_R = crate::FieldReader; #[doc = "Field `CR1S` writer - Shadow Compare Register for Channel 1"] -pub type Cr1sW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CR1S_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"] #[inline(always)] - pub fn cr1s(&self) -> Cr1sR { - Cr1sR::new((self.bits & 0xffff) as u16) + pub fn cr1s(&self) -> CR1S_R { + CR1S_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"] #[inline(always)] #[must_use] - pub fn cr1s(&mut self) -> Cr1sW { - Cr1sW::new(self, 0) + pub fn cr1s(&mut self) -> CR1S_W { + CR1S_W::new(self, 0) } } #[doc = "Channel 1 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr1s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr1sSpec; -impl crate::RegisterSpec for Cr1sSpec { +pub struct CR1S_SPEC; +impl crate::RegisterSpec for CR1S_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr1s::R`](R) reader structure"] -impl crate::Readable for Cr1sSpec {} +impl crate::Readable for CR1S_SPEC {} #[doc = "`write(|w| ..)` method takes [`cr1s::W`](W) writer structure"] -impl crate::Writable for Cr1sSpec { +impl crate::Writable for CR1S_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CR1S to value 0"] -impl crate::Resettable for Cr1sSpec { +impl crate::Resettable for CR1S_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr2.rs b/src/ccu80_cc80/cr2.rs index 702c23b6..033fed80 100644 --- a/src/ccu80_cc80/cr2.rs +++ b/src/ccu80_cc80/cr2.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR2` reader - Compare Register for Channel 2"] -pub type Cr2R = crate::FieldReader; +pub type CR2_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Compare Register for Channel 2"] #[inline(always)] - pub fn cr2(&self) -> Cr2R { - Cr2R::new((self.bits & 0xffff) as u16) + pub fn cr2(&self) -> CR2_R { + CR2_R::new((self.bits & 0xffff) as u16) } } #[doc = "Channel 2 Compare Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr2Spec; -impl crate::RegisterSpec for Cr2Spec { +pub struct CR2_SPEC; +impl crate::RegisterSpec for CR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr2::R`](R) reader structure"] -impl crate::Readable for Cr2Spec {} +impl crate::Readable for CR2_SPEC {} #[doc = "`reset()` method sets CR2 to value 0"] -impl crate::Resettable for Cr2Spec { +impl crate::Resettable for CR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/cr2s.rs b/src/ccu80_cc80/cr2s.rs index 548e5364..1ab624f2 100644 --- a/src/ccu80_cc80/cr2s.rs +++ b/src/ccu80_cc80/cr2s.rs @@ -1,40 +1,40 @@ #[doc = "Register `CR2S` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CR2S` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CR2S` reader - Shadow Compare Register for Channel 2"] -pub type Cr2sR = crate::FieldReader; +pub type CR2S_R = crate::FieldReader; #[doc = "Field `CR2S` writer - Shadow Compare Register for Channel 2"] -pub type Cr2sW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CR2S_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"] #[inline(always)] - pub fn cr2s(&self) -> Cr2sR { - Cr2sR::new((self.bits & 0xffff) as u16) + pub fn cr2s(&self) -> CR2S_R { + CR2S_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"] #[inline(always)] #[must_use] - pub fn cr2s(&mut self) -> Cr2sW { - Cr2sW::new(self, 0) + pub fn cr2s(&mut self) -> CR2S_W { + CR2S_W::new(self, 0) } } #[doc = "Channel 2 Compare Shadow Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2s::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cr2s::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr2sSpec; -impl crate::RegisterSpec for Cr2sSpec { +pub struct CR2S_SPEC; +impl crate::RegisterSpec for CR2S_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr2s::R`](R) reader structure"] -impl crate::Readable for Cr2sSpec {} +impl crate::Readable for CR2S_SPEC {} #[doc = "`write(|w| ..)` method takes [`cr2s::W`](W) writer structure"] -impl crate::Writable for Cr2sSpec { +impl crate::Writable for CR2S_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CR2S to value 0"] -impl crate::Resettable for Cr2sSpec { +impl crate::Resettable for CR2S_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dc1r.rs b/src/ccu80_cc80/dc1r.rs index 2225d3a0..d97afddd 100644 --- a/src/ccu80_cc80/dc1r.rs +++ b/src/ccu80_cc80/dc1r.rs @@ -1,55 +1,55 @@ #[doc = "Register `DC1R` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC1R` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DT1R` reader - Rise Value for Dead Time of Channel 1"] -pub type Dt1rR = crate::FieldReader; +pub type DT1R_R = crate::FieldReader; #[doc = "Field `DT1R` writer - Rise Value for Dead Time of Channel 1"] -pub type Dt1rW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DT1R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DT1F` reader - Fall Value for Dead Time of Channel 1"] -pub type Dt1fR = crate::FieldReader; +pub type DT1F_R = crate::FieldReader; #[doc = "Field `DT1F` writer - Fall Value for Dead Time of Channel 1"] -pub type Dt1fW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DT1F_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"] #[inline(always)] - pub fn dt1r(&self) -> Dt1rR { - Dt1rR::new((self.bits & 0xff) as u8) + pub fn dt1r(&self) -> DT1R_R { + DT1R_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"] #[inline(always)] - pub fn dt1f(&self) -> Dt1fR { - Dt1fR::new(((self.bits >> 8) & 0xff) as u8) + pub fn dt1f(&self) -> DT1F_R { + DT1F_R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"] #[inline(always)] #[must_use] - pub fn dt1r(&mut self) -> Dt1rW { - Dt1rW::new(self, 0) + pub fn dt1r(&mut self) -> DT1R_W { + DT1R_W::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"] #[inline(always)] #[must_use] - pub fn dt1f(&mut self) -> Dt1fW { - Dt1fW::new(self, 8) + pub fn dt1f(&mut self) -> DT1F_W { + DT1F_W::new(self, 8) } } #[doc = "Channel 1 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc1r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc1r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dc1rSpec; -impl crate::RegisterSpec for Dc1rSpec { +pub struct DC1R_SPEC; +impl crate::RegisterSpec for DC1R_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dc1r::R`](R) reader structure"] -impl crate::Readable for Dc1rSpec {} +impl crate::Readable for DC1R_SPEC {} #[doc = "`write(|w| ..)` method takes [`dc1r::W`](W) writer structure"] -impl crate::Writable for Dc1rSpec { +impl crate::Writable for DC1R_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC1R to value 0"] -impl crate::Resettable for Dc1rSpec { +impl crate::Resettable for DC1R_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dc2r.rs b/src/ccu80_cc80/dc2r.rs index 162c8fa6..b6fa8376 100644 --- a/src/ccu80_cc80/dc2r.rs +++ b/src/ccu80_cc80/dc2r.rs @@ -1,55 +1,55 @@ #[doc = "Register `DC2R` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DC2R` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DT2R` reader - Rise Value for Dead Time of Channel 2"] -pub type Dt2rR = crate::FieldReader; +pub type DT2R_R = crate::FieldReader; #[doc = "Field `DT2R` writer - Rise Value for Dead Time of Channel 2"] -pub type Dt2rW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DT2R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `DT2F` reader - Fall Value for Dead Time of Channel 2"] -pub type Dt2fR = crate::FieldReader; +pub type DT2F_R = crate::FieldReader; #[doc = "Field `DT2F` writer - Fall Value for Dead Time of Channel 2"] -pub type Dt2fW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type DT2F_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"] #[inline(always)] - pub fn dt2r(&self) -> Dt2rR { - Dt2rR::new((self.bits & 0xff) as u8) + pub fn dt2r(&self) -> DT2R_R { + DT2R_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"] #[inline(always)] - pub fn dt2f(&self) -> Dt2fR { - Dt2fR::new(((self.bits >> 8) & 0xff) as u8) + pub fn dt2f(&self) -> DT2F_R { + DT2F_R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"] #[inline(always)] #[must_use] - pub fn dt2r(&mut self) -> Dt2rW { - Dt2rW::new(self, 0) + pub fn dt2r(&mut self) -> DT2R_W { + DT2R_W::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"] #[inline(always)] #[must_use] - pub fn dt2f(&mut self) -> Dt2fW { - Dt2fW::new(self, 8) + pub fn dt2f(&mut self) -> DT2F_W { + DT2F_W::new(self, 8) } } #[doc = "Channel 2 Dead Time Values\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dc2r::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dc2r::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dc2rSpec; -impl crate::RegisterSpec for Dc2rSpec { +pub struct DC2R_SPEC; +impl crate::RegisterSpec for DC2R_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dc2r::R`](R) reader structure"] -impl crate::Readable for Dc2rSpec {} +impl crate::Readable for DC2R_SPEC {} #[doc = "`write(|w| ..)` method takes [`dc2r::W`](W) writer structure"] -impl crate::Writable for Dc2rSpec { +impl crate::Writable for DC2R_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DC2R to value 0"] -impl crate::Resettable for Dc2rSpec { +impl crate::Resettable for DC2R_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dit.rs b/src/ccu80_cc80/dit.rs index 62dab291..02e005ab 100644 --- a/src/ccu80_cc80/dit.rs +++ b/src/ccu80_cc80/dit.rs @@ -1,29 +1,29 @@ #[doc = "Register `DIT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DCV` reader - Dither compare Value"] -pub type DcvR = crate::FieldReader; +pub type DCV_R = crate::FieldReader; #[doc = "Field `DCNT` reader - Dither counter actual value"] -pub type DcntR = crate::FieldReader; +pub type DCNT_R = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Dither compare Value"] #[inline(always)] - pub fn dcv(&self) -> DcvR { - DcvR::new((self.bits & 0x0f) as u8) + pub fn dcv(&self) -> DCV_R { + DCV_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Dither counter actual value"] #[inline(always)] - pub fn dcnt(&self) -> DcntR { - DcntR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn dcnt(&self) -> DCNT_R { + DCNT_R::new(((self.bits >> 8) & 0x0f) as u8) } } #[doc = "Dither Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DitSpec; -impl crate::RegisterSpec for DitSpec { +pub struct DIT_SPEC; +impl crate::RegisterSpec for DIT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dit::R`](R) reader structure"] -impl crate::Readable for DitSpec {} +impl crate::Readable for DIT_SPEC {} #[doc = "`reset()` method sets DIT to value 0"] -impl crate::Resettable for DitSpec { +impl crate::Resettable for DIT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dits.rs b/src/ccu80_cc80/dits.rs index e8d9215c..31dd2b44 100644 --- a/src/ccu80_cc80/dits.rs +++ b/src/ccu80_cc80/dits.rs @@ -1,40 +1,40 @@ #[doc = "Register `DITS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DITS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DCVS` reader - Dither Shadow Compare Value"] -pub type DcvsR = crate::FieldReader; +pub type DCVS_R = crate::FieldReader; #[doc = "Field `DCVS` writer - Dither Shadow Compare Value"] -pub type DcvsW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DCVS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - pub fn dcvs(&self) -> DcvsR { - DcvsR::new((self.bits & 0x0f) as u8) + pub fn dcvs(&self) -> DCVS_R { + DCVS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn dcvs(&mut self) -> DcvsW { - DcvsW::new(self, 0) + pub fn dcvs(&mut self) -> DCVS_W { + DCVS_W::new(self, 0) } } #[doc = "Dither Shadow Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dits::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dits::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DitsSpec; -impl crate::RegisterSpec for DitsSpec { +pub struct DITS_SPEC; +impl crate::RegisterSpec for DITS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dits::R`](R) reader structure"] -impl crate::Readable for DitsSpec {} +impl crate::Readable for DITS_SPEC {} #[doc = "`write(|w| ..)` method takes [`dits::W`](W) writer structure"] -impl crate::Writable for DitsSpec { +impl crate::Writable for DITS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DITS to value 0"] -impl crate::Resettable for DitsSpec { +impl crate::Resettable for DITS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/dtc.rs b/src/ccu80_cc80/dtc.rs index 278b0cb5..489eb2ae 100644 --- a/src/ccu80_cc80/dtc.rs +++ b/src/ccu80_cc80/dtc.rs @@ -1,386 +1,386 @@ #[doc = "Register `DTC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DTC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Dead Time Enable for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dte1 { +pub enum DTE1_A { #[doc = "0: Dead Time for channel 1 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for channel 1 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dte1) -> Self { + fn from(variant: DTE1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTE1` reader - Dead Time Enable for Channel 1"] -pub type Dte1R = crate::BitReader; -impl Dte1R { +pub type DTE1_R = crate::BitReader; +impl DTE1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dte1 { + pub const fn variant(&self) -> DTE1_A { match self.bits { - false => Dte1::Value1, - true => Dte1::Value2, + false => DTE1_A::VALUE1, + true => DTE1_A::VALUE2, } } #[doc = "Dead Time for channel 1 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dte1::Value1 + *self == DTE1_A::VALUE1 } #[doc = "Dead Time for channel 1 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dte1::Value2 + *self == DTE1_A::VALUE2 } } #[doc = "Field `DTE1` writer - Dead Time Enable for Channel 1"] -pub type Dte1W<'a, REG> = crate::BitWriter<'a, REG, Dte1>; -impl<'a, REG> Dte1W<'a, REG> +pub type DTE1_W<'a, REG> = crate::BitWriter<'a, REG, DTE1_A>; +impl<'a, REG> DTE1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for channel 1 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dte1::Value1) + self.variant(DTE1_A::VALUE1) } #[doc = "Dead Time for channel 1 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dte1::Value2) + self.variant(DTE1_A::VALUE2) } } #[doc = "Dead Time Enable for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dte2 { +pub enum DTE2_A { #[doc = "0: Dead Time for channel 2 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for channel 2 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dte2) -> Self { + fn from(variant: DTE2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTE2` reader - Dead Time Enable for Channel 2"] -pub type Dte2R = crate::BitReader; -impl Dte2R { +pub type DTE2_R = crate::BitReader; +impl DTE2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dte2 { + pub const fn variant(&self) -> DTE2_A { match self.bits { - false => Dte2::Value1, - true => Dte2::Value2, + false => DTE2_A::VALUE1, + true => DTE2_A::VALUE2, } } #[doc = "Dead Time for channel 2 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dte2::Value1 + *self == DTE2_A::VALUE1 } #[doc = "Dead Time for channel 2 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dte2::Value2 + *self == DTE2_A::VALUE2 } } #[doc = "Field `DTE2` writer - Dead Time Enable for Channel 2"] -pub type Dte2W<'a, REG> = crate::BitWriter<'a, REG, Dte2>; -impl<'a, REG> Dte2W<'a, REG> +pub type DTE2_W<'a, REG> = crate::BitWriter<'a, REG, DTE2_A>; +impl<'a, REG> DTE2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for channel 2 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dte2::Value1) + self.variant(DTE2_A::VALUE1) } #[doc = "Dead Time for channel 2 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dte2::Value2) + self.variant(DTE2_A::VALUE2) } } #[doc = "Dead Time Enable for CC8yST1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcen1 { +pub enum DCEN1_A { #[doc = "0: Dead Time for CC8yST1 path is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for CC8yST1 path is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcen1) -> Self { + fn from(variant: DCEN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCEN1` reader - Dead Time Enable for CC8yST1"] -pub type Dcen1R = crate::BitReader; -impl Dcen1R { +pub type DCEN1_R = crate::BitReader; +impl DCEN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcen1 { + pub const fn variant(&self) -> DCEN1_A { match self.bits { - false => Dcen1::Value1, - true => Dcen1::Value2, + false => DCEN1_A::VALUE1, + true => DCEN1_A::VALUE2, } } #[doc = "Dead Time for CC8yST1 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcen1::Value1 + *self == DCEN1_A::VALUE1 } #[doc = "Dead Time for CC8yST1 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcen1::Value2 + *self == DCEN1_A::VALUE2 } } #[doc = "Field `DCEN1` writer - Dead Time Enable for CC8yST1"] -pub type Dcen1W<'a, REG> = crate::BitWriter<'a, REG, Dcen1>; -impl<'a, REG> Dcen1W<'a, REG> +pub type DCEN1_W<'a, REG> = crate::BitWriter<'a, REG, DCEN1_A>; +impl<'a, REG> DCEN1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for CC8yST1 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcen1::Value1) + self.variant(DCEN1_A::VALUE1) } #[doc = "Dead Time for CC8yST1 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcen1::Value2) + self.variant(DCEN1_A::VALUE2) } } #[doc = "Dead Time Enable for inverted CC8yST1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcen2 { +pub enum DCEN2_A { #[doc = "0: Dead Time for inverted CC8yST1 path is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for inverted CC8yST1 path is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcen2) -> Self { + fn from(variant: DCEN2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCEN2` reader - Dead Time Enable for inverted CC8yST1"] -pub type Dcen2R = crate::BitReader; -impl Dcen2R { +pub type DCEN2_R = crate::BitReader; +impl DCEN2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcen2 { + pub const fn variant(&self) -> DCEN2_A { match self.bits { - false => Dcen2::Value1, - true => Dcen2::Value2, + false => DCEN2_A::VALUE1, + true => DCEN2_A::VALUE2, } } #[doc = "Dead Time for inverted CC8yST1 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcen2::Value1 + *self == DCEN2_A::VALUE1 } #[doc = "Dead Time for inverted CC8yST1 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcen2::Value2 + *self == DCEN2_A::VALUE2 } } #[doc = "Field `DCEN2` writer - Dead Time Enable for inverted CC8yST1"] -pub type Dcen2W<'a, REG> = crate::BitWriter<'a, REG, Dcen2>; -impl<'a, REG> Dcen2W<'a, REG> +pub type DCEN2_W<'a, REG> = crate::BitWriter<'a, REG, DCEN2_A>; +impl<'a, REG> DCEN2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for inverted CC8yST1 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcen2::Value1) + self.variant(DCEN2_A::VALUE1) } #[doc = "Dead Time for inverted CC8yST1 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcen2::Value2) + self.variant(DCEN2_A::VALUE2) } } #[doc = "Dead Time Enable for CC8yST2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcen3 { +pub enum DCEN3_A { #[doc = "0: Dead Time for CC8yST2 path is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for CC8yST2 path is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcen3) -> Self { + fn from(variant: DCEN3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCEN3` reader - Dead Time Enable for CC8yST2"] -pub type Dcen3R = crate::BitReader; -impl Dcen3R { +pub type DCEN3_R = crate::BitReader; +impl DCEN3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcen3 { + pub const fn variant(&self) -> DCEN3_A { match self.bits { - false => Dcen3::Value1, - true => Dcen3::Value2, + false => DCEN3_A::VALUE1, + true => DCEN3_A::VALUE2, } } #[doc = "Dead Time for CC8yST2 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcen3::Value1 + *self == DCEN3_A::VALUE1 } #[doc = "Dead Time for CC8yST2 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcen3::Value2 + *self == DCEN3_A::VALUE2 } } #[doc = "Field `DCEN3` writer - Dead Time Enable for CC8yST2"] -pub type Dcen3W<'a, REG> = crate::BitWriter<'a, REG, Dcen3>; -impl<'a, REG> Dcen3W<'a, REG> +pub type DCEN3_W<'a, REG> = crate::BitWriter<'a, REG, DCEN3_A>; +impl<'a, REG> DCEN3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for CC8yST2 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcen3::Value1) + self.variant(DCEN3_A::VALUE1) } #[doc = "Dead Time for CC8yST2 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcen3::Value2) + self.variant(DCEN3_A::VALUE2) } } #[doc = "Dead Time Enable for inverted CC8yST2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcen4 { +pub enum DCEN4_A { #[doc = "0: Dead Time for inverted CC8yST2 path is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time for inverted CC8yST2 path is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcen4) -> Self { + fn from(variant: DCEN4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCEN4` reader - Dead Time Enable for inverted CC8yST2"] -pub type Dcen4R = crate::BitReader; -impl Dcen4R { +pub type DCEN4_R = crate::BitReader; +impl DCEN4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcen4 { + pub const fn variant(&self) -> DCEN4_A { match self.bits { - false => Dcen4::Value1, - true => Dcen4::Value2, + false => DCEN4_A::VALUE1, + true => DCEN4_A::VALUE2, } } #[doc = "Dead Time for inverted CC8yST2 path is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcen4::Value1 + *self == DCEN4_A::VALUE1 } #[doc = "Dead Time for inverted CC8yST2 path is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcen4::Value2 + *self == DCEN4_A::VALUE2 } } #[doc = "Field `DCEN4` writer - Dead Time Enable for inverted CC8yST2"] -pub type Dcen4W<'a, REG> = crate::BitWriter<'a, REG, Dcen4>; -impl<'a, REG> Dcen4W<'a, REG> +pub type DCEN4_W<'a, REG> = crate::BitWriter<'a, REG, DCEN4_A>; +impl<'a, REG> DCEN4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead Time for inverted CC8yST2 path is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcen4::Value1) + self.variant(DCEN4_A::VALUE1) } #[doc = "Dead Time for inverted CC8yST2 path is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcen4::Value2) + self.variant(DCEN4_A::VALUE2) } } #[doc = "Dead Time clock control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dtcc { +pub enum DTCC_A { #[doc = "0: ftclk"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ftclk/2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: ftclk/4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: ftclk/8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dtcc) -> Self { + fn from(variant: DTCC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dtcc { +impl crate::FieldSpec for DTCC_A { type Ux = u8; } -impl crate::IsEnum for Dtcc {} +impl crate::IsEnum for DTCC_A {} #[doc = "Field `DTCC` reader - Dead Time clock control"] -pub type DtccR = crate::FieldReader; -impl DtccR { +pub type DTCC_R = crate::FieldReader; +impl DTCC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dtcc { + pub const fn variant(&self) -> DTCC_A { match self.bits { - 0 => Dtcc::Value1, - 1 => Dtcc::Value2, - 2 => Dtcc::Value3, - 3 => Dtcc::Value4, + 0 => DTCC_A::VALUE1, + 1 => DTCC_A::VALUE2, + 2 => DTCC_A::VALUE3, + 3 => DTCC_A::VALUE4, _ => unreachable!(), } } #[doc = "ftclk"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dtcc::Value1 + *self == DTCC_A::VALUE1 } #[doc = "ftclk/2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dtcc::Value2 + *self == DTCC_A::VALUE2 } #[doc = "ftclk/4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dtcc::Value3 + *self == DTCC_A::VALUE3 } #[doc = "ftclk/8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dtcc::Value4 + *self == DTCC_A::VALUE4 } } #[doc = "Field `DTCC` writer - Dead Time clock control"] -pub type DtccW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dtcc, crate::Safe>; -impl<'a, REG> DtccW<'a, REG> +pub type DTCC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DTCC_A, crate::Safe>; +impl<'a, REG> DTCC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -388,119 +388,119 @@ where #[doc = "ftclk"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dtcc::Value1) + self.variant(DTCC_A::VALUE1) } #[doc = "ftclk/2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dtcc::Value2) + self.variant(DTCC_A::VALUE2) } #[doc = "ftclk/4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dtcc::Value3) + self.variant(DTCC_A::VALUE3) } #[doc = "ftclk/8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dtcc::Value4) + self.variant(DTCC_A::VALUE4) } } impl R { #[doc = "Bit 0 - Dead Time Enable for Channel 1"] #[inline(always)] - pub fn dte1(&self) -> Dte1R { - Dte1R::new((self.bits & 1) != 0) + pub fn dte1(&self) -> DTE1_R { + DTE1_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Dead Time Enable for Channel 2"] #[inline(always)] - pub fn dte2(&self) -> Dte2R { - Dte2R::new(((self.bits >> 1) & 1) != 0) + pub fn dte2(&self) -> DTE2_R { + DTE2_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Dead Time Enable for CC8yST1"] #[inline(always)] - pub fn dcen1(&self) -> Dcen1R { - Dcen1R::new(((self.bits >> 2) & 1) != 0) + pub fn dcen1(&self) -> DCEN1_R { + DCEN1_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"] #[inline(always)] - pub fn dcen2(&self) -> Dcen2R { - Dcen2R::new(((self.bits >> 3) & 1) != 0) + pub fn dcen2(&self) -> DCEN2_R { + DCEN2_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Dead Time Enable for CC8yST2"] #[inline(always)] - pub fn dcen3(&self) -> Dcen3R { - Dcen3R::new(((self.bits >> 4) & 1) != 0) + pub fn dcen3(&self) -> DCEN3_R { + DCEN3_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"] #[inline(always)] - pub fn dcen4(&self) -> Dcen4R { - Dcen4R::new(((self.bits >> 5) & 1) != 0) + pub fn dcen4(&self) -> DCEN4_R { + DCEN4_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:7 - Dead Time clock control"] #[inline(always)] - pub fn dtcc(&self) -> DtccR { - DtccR::new(((self.bits >> 6) & 3) as u8) + pub fn dtcc(&self) -> DTCC_R { + DTCC_R::new(((self.bits >> 6) & 3) as u8) } } impl W { #[doc = "Bit 0 - Dead Time Enable for Channel 1"] #[inline(always)] #[must_use] - pub fn dte1(&mut self) -> Dte1W { - Dte1W::new(self, 0) + pub fn dte1(&mut self) -> DTE1_W { + DTE1_W::new(self, 0) } #[doc = "Bit 1 - Dead Time Enable for Channel 2"] #[inline(always)] #[must_use] - pub fn dte2(&mut self) -> Dte2W { - Dte2W::new(self, 1) + pub fn dte2(&mut self) -> DTE2_W { + DTE2_W::new(self, 1) } #[doc = "Bit 2 - Dead Time Enable for CC8yST1"] #[inline(always)] #[must_use] - pub fn dcen1(&mut self) -> Dcen1W { - Dcen1W::new(self, 2) + pub fn dcen1(&mut self) -> DCEN1_W { + DCEN1_W::new(self, 2) } #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"] #[inline(always)] #[must_use] - pub fn dcen2(&mut self) -> Dcen2W { - Dcen2W::new(self, 3) + pub fn dcen2(&mut self) -> DCEN2_W { + DCEN2_W::new(self, 3) } #[doc = "Bit 4 - Dead Time Enable for CC8yST2"] #[inline(always)] #[must_use] - pub fn dcen3(&mut self) -> Dcen3W { - Dcen3W::new(self, 4) + pub fn dcen3(&mut self) -> DCEN3_W { + DCEN3_W::new(self, 4) } #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"] #[inline(always)] #[must_use] - pub fn dcen4(&mut self) -> Dcen4W { - Dcen4W::new(self, 5) + pub fn dcen4(&mut self) -> DCEN4_W { + DCEN4_W::new(self, 5) } #[doc = "Bits 6:7 - Dead Time clock control"] #[inline(always)] #[must_use] - pub fn dtcc(&mut self) -> DtccW { - DtccW::new(self, 6) + pub fn dtcc(&mut self) -> DTCC_W { + DTCC_W::new(self, 6) } } #[doc = "Dead Time Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtcSpec; -impl crate::RegisterSpec for DtcSpec { +pub struct DTC_SPEC; +impl crate::RegisterSpec for DTC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtc::R`](R) reader structure"] -impl crate::Readable for DtcSpec {} +impl crate::Readable for DTC_SPEC {} #[doc = "`write(|w| ..)` method takes [`dtc::W`](W) writer structure"] -impl crate::Writable for DtcSpec { +impl crate::Writable for DTC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTC to value 0"] -impl crate::Resettable for DtcSpec { +impl crate::Resettable for DTC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/fpc.rs b/src/ccu80_cc80/fpc.rs index 441df5b3..36e4088a 100644 --- a/src/ccu80_cc80/fpc.rs +++ b/src/ccu80_cc80/fpc.rs @@ -1,47 +1,47 @@ #[doc = "Register `FPC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Compare Value"] -pub type PcmpR = crate::FieldReader; +pub type PCMP_R = crate::FieldReader; #[doc = "Field `PVAL` reader - Actual Prescaler Value"] -pub type PvalR = crate::FieldReader; +pub type PVAL_R = crate::FieldReader; #[doc = "Field `PVAL` writer - Actual Prescaler Value"] -pub type PvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PcmpR { - PcmpR::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PCMP_R { + PCMP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - pub fn pval(&self) -> PvalR { - PvalR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn pval(&self) -> PVAL_R { + PVAL_R::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] #[must_use] - pub fn pval(&mut self) -> PvalW { - PvalW::new(self, 8) + pub fn pval(&mut self) -> PVAL_W { + PVAL_W::new(self, 8) } } #[doc = "Floating Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpcSpec; -impl crate::RegisterSpec for FpcSpec { +pub struct FPC_SPEC; +impl crate::RegisterSpec for FPC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpc::R`](R) reader structure"] -impl crate::Readable for FpcSpec {} +impl crate::Readable for FPC_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpc::W`](W) writer structure"] -impl crate::Writable for FpcSpec { +impl crate::Writable for FPC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPC to value 0"] -impl crate::Resettable for FpcSpec { +impl crate::Resettable for FPC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/fpcs.rs b/src/ccu80_cc80/fpcs.rs index 821adc52..e59acee1 100644 --- a/src/ccu80_cc80/fpcs.rs +++ b/src/ccu80_cc80/fpcs.rs @@ -1,40 +1,40 @@ #[doc = "Register `FPCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PCMP` reader - Floating Prescaler Shadow Compare Value"] -pub type PcmpR = crate::FieldReader; +pub type PCMP_R = crate::FieldReader; #[doc = "Field `PCMP` writer - Floating Prescaler Shadow Compare Value"] -pub type PcmpW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PCMP_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - pub fn pcmp(&self) -> PcmpR { - PcmpR::new((self.bits & 0x0f) as u8) + pub fn pcmp(&self) -> PCMP_R { + PCMP_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] #[must_use] - pub fn pcmp(&mut self) -> PcmpW { - PcmpW::new(self, 0) + pub fn pcmp(&mut self) -> PCMP_W { + PCMP_W::new(self, 0) } } #[doc = "Floating Prescaler Shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpcsSpec; -impl crate::RegisterSpec for FpcsSpec { +pub struct FPCS_SPEC; +impl crate::RegisterSpec for FPCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpcs::R`](R) reader structure"] -impl crate::Readable for FpcsSpec {} +impl crate::Readable for FPCS_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpcs::W`](W) writer structure"] -impl crate::Writable for FpcsSpec { +impl crate::Writable for FPCS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCS to value 0"] -impl crate::Resettable for FpcsSpec { +impl crate::Resettable for FPCS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ins.rs b/src/ccu80_cc80/ins.rs index a21cadba..f2004ff5 100644 --- a/src/ccu80_cc80/ins.rs +++ b/src/ccu80_cc80/ins.rs @@ -1,164 +1,164 @@ #[doc = "Register `INS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Event 0 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev0is { +pub enum EV0IS_A { #[doc = "0: CCU8x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU8x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU8x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU8x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU8x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU8x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU8x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU8x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU8x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU8x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU8x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU8x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU8x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU8x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU8x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU8x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev0is) -> Self { + fn from(variant: EV0IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev0is { +impl crate::FieldSpec for EV0IS_A { type Ux = u8; } -impl crate::IsEnum for Ev0is {} +impl crate::IsEnum for EV0IS_A {} #[doc = "Field `EV0IS` reader - Event 0 signal selection"] -pub type Ev0isR = crate::FieldReader; -impl Ev0isR { +pub type EV0IS_R = crate::FieldReader; +impl EV0IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0is { + pub const fn variant(&self) -> EV0IS_A { match self.bits { - 0 => Ev0is::Value1, - 1 => Ev0is::Value2, - 2 => Ev0is::Value3, - 3 => Ev0is::Value4, - 4 => Ev0is::Value5, - 5 => Ev0is::Value6, - 6 => Ev0is::Value7, - 7 => Ev0is::Value8, - 8 => Ev0is::Value9, - 9 => Ev0is::Value10, - 10 => Ev0is::Value11, - 11 => Ev0is::Value12, - 12 => Ev0is::Value13, - 13 => Ev0is::Value14, - 14 => Ev0is::Value15, - 15 => Ev0is::Value16, + 0 => EV0IS_A::VALUE1, + 1 => EV0IS_A::VALUE2, + 2 => EV0IS_A::VALUE3, + 3 => EV0IS_A::VALUE4, + 4 => EV0IS_A::VALUE5, + 5 => EV0IS_A::VALUE6, + 6 => EV0IS_A::VALUE7, + 7 => EV0IS_A::VALUE8, + 8 => EV0IS_A::VALUE9, + 9 => EV0IS_A::VALUE10, + 10 => EV0IS_A::VALUE11, + 11 => EV0IS_A::VALUE12, + 12 => EV0IS_A::VALUE13, + 13 => EV0IS_A::VALUE14, + 14 => EV0IS_A::VALUE15, + 15 => EV0IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0is::Value1 + *self == EV0IS_A::VALUE1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0is::Value2 + *self == EV0IS_A::VALUE2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev0is::Value3 + *self == EV0IS_A::VALUE3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev0is::Value4 + *self == EV0IS_A::VALUE4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev0is::Value5 + *self == EV0IS_A::VALUE5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev0is::Value6 + *self == EV0IS_A::VALUE6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev0is::Value7 + *self == EV0IS_A::VALUE7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev0is::Value8 + *self == EV0IS_A::VALUE8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev0is::Value9 + *self == EV0IS_A::VALUE9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev0is::Value10 + *self == EV0IS_A::VALUE10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev0is::Value11 + *self == EV0IS_A::VALUE11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev0is::Value12 + *self == EV0IS_A::VALUE12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev0is::Value13 + *self == EV0IS_A::VALUE13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev0is::Value14 + *self == EV0IS_A::VALUE14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev0is::Value15 + *self == EV0IS_A::VALUE15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev0is::Value16 + *self == EV0IS_A::VALUE16 } } #[doc = "Field `EV0IS` writer - Event 0 signal selection"] -pub type Ev0isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev0is, crate::Safe>; -impl<'a, REG> Ev0isW<'a, REG> +pub type EV0IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV0IS_A, crate::Safe>; +impl<'a, REG> EV0IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -166,241 +166,241 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0is::Value1) + self.variant(EV0IS_A::VALUE1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0is::Value2) + self.variant(EV0IS_A::VALUE2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev0is::Value3) + self.variant(EV0IS_A::VALUE3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev0is::Value4) + self.variant(EV0IS_A::VALUE4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev0is::Value5) + self.variant(EV0IS_A::VALUE5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev0is::Value6) + self.variant(EV0IS_A::VALUE6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev0is::Value7) + self.variant(EV0IS_A::VALUE7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev0is::Value8) + self.variant(EV0IS_A::VALUE8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev0is::Value9) + self.variant(EV0IS_A::VALUE9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev0is::Value10) + self.variant(EV0IS_A::VALUE10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev0is::Value11) + self.variant(EV0IS_A::VALUE11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev0is::Value12) + self.variant(EV0IS_A::VALUE12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev0is::Value13) + self.variant(EV0IS_A::VALUE13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev0is::Value14) + self.variant(EV0IS_A::VALUE14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev0is::Value15) + self.variant(EV0IS_A::VALUE15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev0is::Value16) + self.variant(EV0IS_A::VALUE16) } } #[doc = "Event 1 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev1is { +pub enum EV1IS_A { #[doc = "0: CCU8x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU8x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU8x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU8x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU8x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU8x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU8x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU8x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU8x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU8x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU8x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU8x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU8x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU8x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU8x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU8x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev1is) -> Self { + fn from(variant: EV1IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev1is { +impl crate::FieldSpec for EV1IS_A { type Ux = u8; } -impl crate::IsEnum for Ev1is {} +impl crate::IsEnum for EV1IS_A {} #[doc = "Field `EV1IS` reader - Event 1 signal selection"] -pub type Ev1isR = crate::FieldReader; -impl Ev1isR { +pub type EV1IS_R = crate::FieldReader; +impl EV1IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1is { + pub const fn variant(&self) -> EV1IS_A { match self.bits { - 0 => Ev1is::Value1, - 1 => Ev1is::Value2, - 2 => Ev1is::Value3, - 3 => Ev1is::Value4, - 4 => Ev1is::Value5, - 5 => Ev1is::Value6, - 6 => Ev1is::Value7, - 7 => Ev1is::Value8, - 8 => Ev1is::Value9, - 9 => Ev1is::Value10, - 10 => Ev1is::Value11, - 11 => Ev1is::Value12, - 12 => Ev1is::Value13, - 13 => Ev1is::Value14, - 14 => Ev1is::Value15, - 15 => Ev1is::Value16, + 0 => EV1IS_A::VALUE1, + 1 => EV1IS_A::VALUE2, + 2 => EV1IS_A::VALUE3, + 3 => EV1IS_A::VALUE4, + 4 => EV1IS_A::VALUE5, + 5 => EV1IS_A::VALUE6, + 6 => EV1IS_A::VALUE7, + 7 => EV1IS_A::VALUE8, + 8 => EV1IS_A::VALUE9, + 9 => EV1IS_A::VALUE10, + 10 => EV1IS_A::VALUE11, + 11 => EV1IS_A::VALUE12, + 12 => EV1IS_A::VALUE13, + 13 => EV1IS_A::VALUE14, + 14 => EV1IS_A::VALUE15, + 15 => EV1IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1is::Value1 + *self == EV1IS_A::VALUE1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1is::Value2 + *self == EV1IS_A::VALUE2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev1is::Value3 + *self == EV1IS_A::VALUE3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev1is::Value4 + *self == EV1IS_A::VALUE4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev1is::Value5 + *self == EV1IS_A::VALUE5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev1is::Value6 + *self == EV1IS_A::VALUE6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev1is::Value7 + *self == EV1IS_A::VALUE7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev1is::Value8 + *self == EV1IS_A::VALUE8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev1is::Value9 + *self == EV1IS_A::VALUE9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev1is::Value10 + *self == EV1IS_A::VALUE10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev1is::Value11 + *self == EV1IS_A::VALUE11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev1is::Value12 + *self == EV1IS_A::VALUE12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev1is::Value13 + *self == EV1IS_A::VALUE13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev1is::Value14 + *self == EV1IS_A::VALUE14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev1is::Value15 + *self == EV1IS_A::VALUE15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev1is::Value16 + *self == EV1IS_A::VALUE16 } } #[doc = "Field `EV1IS` writer - Event 1 signal selection"] -pub type Ev1isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev1is, crate::Safe>; -impl<'a, REG> Ev1isW<'a, REG> +pub type EV1IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV1IS_A, crate::Safe>; +impl<'a, REG> EV1IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -408,241 +408,241 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1is::Value1) + self.variant(EV1IS_A::VALUE1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1is::Value2) + self.variant(EV1IS_A::VALUE2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev1is::Value3) + self.variant(EV1IS_A::VALUE3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev1is::Value4) + self.variant(EV1IS_A::VALUE4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev1is::Value5) + self.variant(EV1IS_A::VALUE5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev1is::Value6) + self.variant(EV1IS_A::VALUE6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev1is::Value7) + self.variant(EV1IS_A::VALUE7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev1is::Value8) + self.variant(EV1IS_A::VALUE8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev1is::Value9) + self.variant(EV1IS_A::VALUE9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev1is::Value10) + self.variant(EV1IS_A::VALUE10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev1is::Value11) + self.variant(EV1IS_A::VALUE11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev1is::Value12) + self.variant(EV1IS_A::VALUE12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev1is::Value13) + self.variant(EV1IS_A::VALUE13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev1is::Value14) + self.variant(EV1IS_A::VALUE14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev1is::Value15) + self.variant(EV1IS_A::VALUE15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev1is::Value16) + self.variant(EV1IS_A::VALUE16) } } #[doc = "Event 2 signal selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev2is { +pub enum EV2IS_A { #[doc = "0: CCU8x.INyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CCU8x.INyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CCU8x.INyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CCU8x.INyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: CCU8x.INyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: CCU8x.INyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: CCU8x.INyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: CCU8x.INyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: CCU8x.INyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: CCU8x.INyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: CCU8x.INyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: CCU8x.INyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: CCU8x.INyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: CCU8x.INyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: CCU8x.INyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: CCU8x.INyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev2is) -> Self { + fn from(variant: EV2IS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev2is { +impl crate::FieldSpec for EV2IS_A { type Ux = u8; } -impl crate::IsEnum for Ev2is {} +impl crate::IsEnum for EV2IS_A {} #[doc = "Field `EV2IS` reader - Event 2 signal selection"] -pub type Ev2isR = crate::FieldReader; -impl Ev2isR { +pub type EV2IS_R = crate::FieldReader; +impl EV2IS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2is { + pub const fn variant(&self) -> EV2IS_A { match self.bits { - 0 => Ev2is::Value1, - 1 => Ev2is::Value2, - 2 => Ev2is::Value3, - 3 => Ev2is::Value4, - 4 => Ev2is::Value5, - 5 => Ev2is::Value6, - 6 => Ev2is::Value7, - 7 => Ev2is::Value8, - 8 => Ev2is::Value9, - 9 => Ev2is::Value10, - 10 => Ev2is::Value11, - 11 => Ev2is::Value12, - 12 => Ev2is::Value13, - 13 => Ev2is::Value14, - 14 => Ev2is::Value15, - 15 => Ev2is::Value16, + 0 => EV2IS_A::VALUE1, + 1 => EV2IS_A::VALUE2, + 2 => EV2IS_A::VALUE3, + 3 => EV2IS_A::VALUE4, + 4 => EV2IS_A::VALUE5, + 5 => EV2IS_A::VALUE6, + 6 => EV2IS_A::VALUE7, + 7 => EV2IS_A::VALUE8, + 8 => EV2IS_A::VALUE9, + 9 => EV2IS_A::VALUE10, + 10 => EV2IS_A::VALUE11, + 11 => EV2IS_A::VALUE12, + 12 => EV2IS_A::VALUE13, + 13 => EV2IS_A::VALUE14, + 14 => EV2IS_A::VALUE15, + 15 => EV2IS_A::VALUE16, _ => unreachable!(), } } #[doc = "CCU8x.INyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2is::Value1 + *self == EV2IS_A::VALUE1 } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2is::Value2 + *self == EV2IS_A::VALUE2 } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev2is::Value3 + *self == EV2IS_A::VALUE3 } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev2is::Value4 + *self == EV2IS_A::VALUE4 } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ev2is::Value5 + *self == EV2IS_A::VALUE5 } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ev2is::Value6 + *self == EV2IS_A::VALUE6 } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ev2is::Value7 + *self == EV2IS_A::VALUE7 } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ev2is::Value8 + *self == EV2IS_A::VALUE8 } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ev2is::Value9 + *self == EV2IS_A::VALUE9 } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ev2is::Value10 + *self == EV2IS_A::VALUE10 } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ev2is::Value11 + *self == EV2IS_A::VALUE11 } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ev2is::Value12 + *self == EV2IS_A::VALUE12 } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ev2is::Value13 + *self == EV2IS_A::VALUE13 } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ev2is::Value14 + *self == EV2IS_A::VALUE14 } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ev2is::Value15 + *self == EV2IS_A::VALUE15 } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ev2is::Value16 + *self == EV2IS_A::VALUE16 } } #[doc = "Field `EV2IS` writer - Event 2 signal selection"] -pub type Ev2isW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ev2is, crate::Safe>; -impl<'a, REG> Ev2isW<'a, REG> +pub type EV2IS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, EV2IS_A, crate::Safe>; +impl<'a, REG> EV2IS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -650,145 +650,145 @@ where #[doc = "CCU8x.INyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2is::Value1) + self.variant(EV2IS_A::VALUE1) } #[doc = "CCU8x.INyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2is::Value2) + self.variant(EV2IS_A::VALUE2) } #[doc = "CCU8x.INyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev2is::Value3) + self.variant(EV2IS_A::VALUE3) } #[doc = "CCU8x.INyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev2is::Value4) + self.variant(EV2IS_A::VALUE4) } #[doc = "CCU8x.INyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ev2is::Value5) + self.variant(EV2IS_A::VALUE5) } #[doc = "CCU8x.INyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ev2is::Value6) + self.variant(EV2IS_A::VALUE6) } #[doc = "CCU8x.INyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ev2is::Value7) + self.variant(EV2IS_A::VALUE7) } #[doc = "CCU8x.INyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ev2is::Value8) + self.variant(EV2IS_A::VALUE8) } #[doc = "CCU8x.INyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ev2is::Value9) + self.variant(EV2IS_A::VALUE9) } #[doc = "CCU8x.INyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ev2is::Value10) + self.variant(EV2IS_A::VALUE10) } #[doc = "CCU8x.INyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ev2is::Value11) + self.variant(EV2IS_A::VALUE11) } #[doc = "CCU8x.INyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ev2is::Value12) + self.variant(EV2IS_A::VALUE12) } #[doc = "CCU8x.INyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ev2is::Value13) + self.variant(EV2IS_A::VALUE13) } #[doc = "CCU8x.INyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ev2is::Value14) + self.variant(EV2IS_A::VALUE14) } #[doc = "CCU8x.INyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ev2is::Value15) + self.variant(EV2IS_A::VALUE15) } #[doc = "CCU8x.INyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ev2is::Value16) + self.variant(EV2IS_A::VALUE16) } } #[doc = "Event 0 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev0em { +pub enum EV0EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev0em) -> Self { + fn from(variant: EV0EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev0em { +impl crate::FieldSpec for EV0EM_A { type Ux = u8; } -impl crate::IsEnum for Ev0em {} +impl crate::IsEnum for EV0EM_A {} #[doc = "Field `EV0EM` reader - Event 0 Edge Selection"] -pub type Ev0emR = crate::FieldReader; -impl Ev0emR { +pub type EV0EM_R = crate::FieldReader; +impl EV0EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0em { + pub const fn variant(&self) -> EV0EM_A { match self.bits { - 0 => Ev0em::Value1, - 1 => Ev0em::Value2, - 2 => Ev0em::Value3, - 3 => Ev0em::Value4, + 0 => EV0EM_A::VALUE1, + 1 => EV0EM_A::VALUE2, + 2 => EV0EM_A::VALUE3, + 3 => EV0EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0em::Value1 + *self == EV0EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0em::Value2 + *self == EV0EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev0em::Value3 + *self == EV0EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev0em::Value4 + *self == EV0EM_A::VALUE4 } } #[doc = "Field `EV0EM` writer - Event 0 Edge Selection"] -pub type Ev0emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev0em, crate::Safe>; -impl<'a, REG> Ev0emW<'a, REG> +pub type EV0EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV0EM_A, crate::Safe>; +impl<'a, REG> EV0EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -796,85 +796,85 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0em::Value1) + self.variant(EV0EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0em::Value2) + self.variant(EV0EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev0em::Value3) + self.variant(EV0EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev0em::Value4) + self.variant(EV0EM_A::VALUE4) } } #[doc = "Event 1 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev1em { +pub enum EV1EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev1em) -> Self { + fn from(variant: EV1EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev1em { +impl crate::FieldSpec for EV1EM_A { type Ux = u8; } -impl crate::IsEnum for Ev1em {} +impl crate::IsEnum for EV1EM_A {} #[doc = "Field `EV1EM` reader - Event 1 Edge Selection"] -pub type Ev1emR = crate::FieldReader; -impl Ev1emR { +pub type EV1EM_R = crate::FieldReader; +impl EV1EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1em { + pub const fn variant(&self) -> EV1EM_A { match self.bits { - 0 => Ev1em::Value1, - 1 => Ev1em::Value2, - 2 => Ev1em::Value3, - 3 => Ev1em::Value4, + 0 => EV1EM_A::VALUE1, + 1 => EV1EM_A::VALUE2, + 2 => EV1EM_A::VALUE3, + 3 => EV1EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1em::Value1 + *self == EV1EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1em::Value2 + *self == EV1EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev1em::Value3 + *self == EV1EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev1em::Value4 + *self == EV1EM_A::VALUE4 } } #[doc = "Field `EV1EM` writer - Event 1 Edge Selection"] -pub type Ev1emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev1em, crate::Safe>; -impl<'a, REG> Ev1emW<'a, REG> +pub type EV1EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV1EM_A, crate::Safe>; +impl<'a, REG> EV1EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -882,85 +882,85 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1em::Value1) + self.variant(EV1EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1em::Value2) + self.variant(EV1EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev1em::Value3) + self.variant(EV1EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev1em::Value4) + self.variant(EV1EM_A::VALUE4) } } #[doc = "Event 2 Edge Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ev2em { +pub enum EV2EM_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Signal active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ev2em) -> Self { + fn from(variant: EV2EM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ev2em { +impl crate::FieldSpec for EV2EM_A { type Ux = u8; } -impl crate::IsEnum for Ev2em {} +impl crate::IsEnum for EV2EM_A {} #[doc = "Field `EV2EM` reader - Event 2 Edge Selection"] -pub type Ev2emR = crate::FieldReader; -impl Ev2emR { +pub type EV2EM_R = crate::FieldReader; +impl EV2EM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2em { + pub const fn variant(&self) -> EV2EM_A { match self.bits { - 0 => Ev2em::Value1, - 1 => Ev2em::Value2, - 2 => Ev2em::Value3, - 3 => Ev2em::Value4, + 0 => EV2EM_A::VALUE1, + 1 => EV2EM_A::VALUE2, + 2 => EV2EM_A::VALUE3, + 3 => EV2EM_A::VALUE4, _ => unreachable!(), } } #[doc = "No action"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2em::Value1 + *self == EV2EM_A::VALUE1 } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2em::Value2 + *self == EV2EM_A::VALUE2 } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ev2em::Value3 + *self == EV2EM_A::VALUE3 } #[doc = "Signal active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ev2em::Value4 + *self == EV2EM_A::VALUE4 } } #[doc = "Field `EV2EM` writer - Event 2 Edge Selection"] -pub type Ev2emW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ev2em, crate::Safe>; -impl<'a, REG> Ev2emW<'a, REG> +pub type EV2EM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EV2EM_A, crate::Safe>; +impl<'a, REG> EV2EM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -968,244 +968,244 @@ where #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2em::Value1) + self.variant(EV2EM_A::VALUE1) } #[doc = "Signal active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2em::Value2) + self.variant(EV2EM_A::VALUE2) } #[doc = "Signal active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ev2em::Value3) + self.variant(EV2EM_A::VALUE3) } #[doc = "Signal active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ev2em::Value4) + self.variant(EV2EM_A::VALUE4) } } #[doc = "Event 0 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev0lm { +pub enum EV0LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev0lm) -> Self { + fn from(variant: EV0LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV0LM` reader - Event 0 Level Selection"] -pub type Ev0lmR = crate::BitReader; -impl Ev0lmR { +pub type EV0LM_R = crate::BitReader; +impl EV0LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev0lm { + pub const fn variant(&self) -> EV0LM_A { match self.bits { - false => Ev0lm::Value1, - true => Ev0lm::Value2, + false => EV0LM_A::VALUE1, + true => EV0LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev0lm::Value1 + *self == EV0LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev0lm::Value2 + *self == EV0LM_A::VALUE2 } } #[doc = "Field `EV0LM` writer - Event 0 Level Selection"] -pub type Ev0lmW<'a, REG> = crate::BitWriter<'a, REG, Ev0lm>; -impl<'a, REG> Ev0lmW<'a, REG> +pub type EV0LM_W<'a, REG> = crate::BitWriter<'a, REG, EV0LM_A>; +impl<'a, REG> EV0LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev0lm::Value1) + self.variant(EV0LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev0lm::Value2) + self.variant(EV0LM_A::VALUE2) } } #[doc = "Event 1 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev1lm { +pub enum EV1LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev1lm) -> Self { + fn from(variant: EV1LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV1LM` reader - Event 1 Level Selection"] -pub type Ev1lmR = crate::BitReader; -impl Ev1lmR { +pub type EV1LM_R = crate::BitReader; +impl EV1LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev1lm { + pub const fn variant(&self) -> EV1LM_A { match self.bits { - false => Ev1lm::Value1, - true => Ev1lm::Value2, + false => EV1LM_A::VALUE1, + true => EV1LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev1lm::Value1 + *self == EV1LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev1lm::Value2 + *self == EV1LM_A::VALUE2 } } #[doc = "Field `EV1LM` writer - Event 1 Level Selection"] -pub type Ev1lmW<'a, REG> = crate::BitWriter<'a, REG, Ev1lm>; -impl<'a, REG> Ev1lmW<'a, REG> +pub type EV1LM_W<'a, REG> = crate::BitWriter<'a, REG, EV1LM_A>; +impl<'a, REG> EV1LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev1lm::Value1) + self.variant(EV1LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev1lm::Value2) + self.variant(EV1LM_A::VALUE2) } } #[doc = "Event 2 Level Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev2lm { +pub enum EV2LM_A { #[doc = "0: Active on HIGH level"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on LOW level"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev2lm) -> Self { + fn from(variant: EV2LM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV2LM` reader - Event 2 Level Selection"] -pub type Ev2lmR = crate::BitReader; -impl Ev2lmR { +pub type EV2LM_R = crate::BitReader; +impl EV2LM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev2lm { + pub const fn variant(&self) -> EV2LM_A { match self.bits { - false => Ev2lm::Value1, - true => Ev2lm::Value2, + false => EV2LM_A::VALUE1, + true => EV2LM_A::VALUE2, } } #[doc = "Active on HIGH level"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev2lm::Value1 + *self == EV2LM_A::VALUE1 } #[doc = "Active on LOW level"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev2lm::Value2 + *self == EV2LM_A::VALUE2 } } #[doc = "Field `EV2LM` writer - Event 2 Level Selection"] -pub type Ev2lmW<'a, REG> = crate::BitWriter<'a, REG, Ev2lm>; -impl<'a, REG> Ev2lmW<'a, REG> +pub type EV2LM_W<'a, REG> = crate::BitWriter<'a, REG, EV2LM_A>; +impl<'a, REG> EV2LM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active on HIGH level"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ev2lm::Value1) + self.variant(EV2LM_A::VALUE1) } #[doc = "Active on LOW level"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ev2lm::Value2) + self.variant(EV2LM_A::VALUE2) } } #[doc = "Event 0 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf0m { +pub enum LPF0M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf0m) -> Self { + fn from(variant: LPF0M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf0m { +impl crate::FieldSpec for LPF0M_A { type Ux = u8; } -impl crate::IsEnum for Lpf0m {} +impl crate::IsEnum for LPF0M_A {} #[doc = "Field `LPF0M` reader - Event 0 Low Pass Filter Configuration"] -pub type Lpf0mR = crate::FieldReader; -impl Lpf0mR { +pub type LPF0M_R = crate::FieldReader; +impl LPF0M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf0m { + pub const fn variant(&self) -> LPF0M_A { match self.bits { - 0 => Lpf0m::Value1, - 1 => Lpf0m::Value2, - 2 => Lpf0m::Value3, - 3 => Lpf0m::Value4, + 0 => LPF0M_A::VALUE1, + 1 => LPF0M_A::VALUE2, + 2 => LPF0M_A::VALUE3, + 3 => LPF0M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf0m::Value1 + *self == LPF0M_A::VALUE1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf0m::Value2 + *self == LPF0M_A::VALUE2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf0m::Value3 + *self == LPF0M_A::VALUE3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf0m::Value4 + *self == LPF0M_A::VALUE4 } } #[doc = "Field `LPF0M` writer - Event 0 Low Pass Filter Configuration"] -pub type Lpf0mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf0m, crate::Safe>; -impl<'a, REG> Lpf0mW<'a, REG> +pub type LPF0M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF0M_A, crate::Safe>; +impl<'a, REG> LPF0M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1213,85 +1213,85 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value1) + self.variant(LPF0M_A::VALUE1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value2) + self.variant(LPF0M_A::VALUE2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value3) + self.variant(LPF0M_A::VALUE3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf0m::Value4) + self.variant(LPF0M_A::VALUE4) } } #[doc = "Event 1 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf1m { +pub enum LPF1M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf1m) -> Self { + fn from(variant: LPF1M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf1m { +impl crate::FieldSpec for LPF1M_A { type Ux = u8; } -impl crate::IsEnum for Lpf1m {} +impl crate::IsEnum for LPF1M_A {} #[doc = "Field `LPF1M` reader - Event 1 Low Pass Filter Configuration"] -pub type Lpf1mR = crate::FieldReader; -impl Lpf1mR { +pub type LPF1M_R = crate::FieldReader; +impl LPF1M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf1m { + pub const fn variant(&self) -> LPF1M_A { match self.bits { - 0 => Lpf1m::Value1, - 1 => Lpf1m::Value2, - 2 => Lpf1m::Value3, - 3 => Lpf1m::Value4, + 0 => LPF1M_A::VALUE1, + 1 => LPF1M_A::VALUE2, + 2 => LPF1M_A::VALUE3, + 3 => LPF1M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf1m::Value1 + *self == LPF1M_A::VALUE1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf1m::Value2 + *self == LPF1M_A::VALUE2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf1m::Value3 + *self == LPF1M_A::VALUE3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf1m::Value4 + *self == LPF1M_A::VALUE4 } } #[doc = "Field `LPF1M` writer - Event 1 Low Pass Filter Configuration"] -pub type Lpf1mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf1m, crate::Safe>; -impl<'a, REG> Lpf1mW<'a, REG> +pub type LPF1M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF1M_A, crate::Safe>; +impl<'a, REG> LPF1M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1299,85 +1299,85 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value1) + self.variant(LPF1M_A::VALUE1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value2) + self.variant(LPF1M_A::VALUE2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value3) + self.variant(LPF1M_A::VALUE3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf1m::Value4) + self.variant(LPF1M_A::VALUE4) } } #[doc = "Event 2 Low Pass Filter Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpf2m { +pub enum LPF2M_A { #[doc = "0: LPF is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 3 clock cycles of fCCU8"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 5 clock cycles of fCCU8"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 7 clock cycles of fCCU8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpf2m) -> Self { + fn from(variant: LPF2M_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpf2m { +impl crate::FieldSpec for LPF2M_A { type Ux = u8; } -impl crate::IsEnum for Lpf2m {} +impl crate::IsEnum for LPF2M_A {} #[doc = "Field `LPF2M` reader - Event 2 Low Pass Filter Configuration"] -pub type Lpf2mR = crate::FieldReader; -impl Lpf2mR { +pub type LPF2M_R = crate::FieldReader; +impl LPF2M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpf2m { + pub const fn variant(&self) -> LPF2M_A { match self.bits { - 0 => Lpf2m::Value1, - 1 => Lpf2m::Value2, - 2 => Lpf2m::Value3, - 3 => Lpf2m::Value4, + 0 => LPF2M_A::VALUE1, + 1 => LPF2M_A::VALUE2, + 2 => LPF2M_A::VALUE3, + 3 => LPF2M_A::VALUE4, _ => unreachable!(), } } #[doc = "LPF is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpf2m::Value1 + *self == LPF2M_A::VALUE1 } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpf2m::Value2 + *self == LPF2M_A::VALUE2 } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpf2m::Value3 + *self == LPF2M_A::VALUE3 } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpf2m::Value4 + *self == LPF2M_A::VALUE4 } } #[doc = "Field `LPF2M` writer - Event 2 Low Pass Filter Configuration"] -pub type Lpf2mW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lpf2m, crate::Safe>; -impl<'a, REG> Lpf2mW<'a, REG> +pub type LPF2M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LPF2M_A, crate::Safe>; +impl<'a, REG> LPF2M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1385,174 +1385,174 @@ where #[doc = "LPF is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value1) + self.variant(LPF2M_A::VALUE1) } #[doc = "3 clock cycles of fCCU8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value2) + self.variant(LPF2M_A::VALUE2) } #[doc = "5 clock cycles of fCCU8"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value3) + self.variant(LPF2M_A::VALUE3) } #[doc = "7 clock cycles of fCCU8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpf2m::Value4) + self.variant(LPF2M_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - pub fn ev0is(&self) -> Ev0isR { - Ev0isR::new((self.bits & 0x0f) as u8) + pub fn ev0is(&self) -> EV0IS_R { + EV0IS_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - pub fn ev1is(&self) -> Ev1isR { - Ev1isR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn ev1is(&self) -> EV1IS_R { + EV1IS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - pub fn ev2is(&self) -> Ev2isR { - Ev2isR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn ev2is(&self) -> EV2IS_R { + EV2IS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - pub fn ev0em(&self) -> Ev0emR { - Ev0emR::new(((self.bits >> 16) & 3) as u8) + pub fn ev0em(&self) -> EV0EM_R { + EV0EM_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - pub fn ev1em(&self) -> Ev1emR { - Ev1emR::new(((self.bits >> 18) & 3) as u8) + pub fn ev1em(&self) -> EV1EM_R { + EV1EM_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - pub fn ev2em(&self) -> Ev2emR { - Ev2emR::new(((self.bits >> 20) & 3) as u8) + pub fn ev2em(&self) -> EV2EM_R { + EV2EM_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - pub fn ev0lm(&self) -> Ev0lmR { - Ev0lmR::new(((self.bits >> 22) & 1) != 0) + pub fn ev0lm(&self) -> EV0LM_R { + EV0LM_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - pub fn ev1lm(&self) -> Ev1lmR { - Ev1lmR::new(((self.bits >> 23) & 1) != 0) + pub fn ev1lm(&self) -> EV1LM_R { + EV1LM_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - pub fn ev2lm(&self) -> Ev2lmR { - Ev2lmR::new(((self.bits >> 24) & 1) != 0) + pub fn ev2lm(&self) -> EV2LM_R { + EV2LM_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf0m(&self) -> Lpf0mR { - Lpf0mR::new(((self.bits >> 25) & 3) as u8) + pub fn lpf0m(&self) -> LPF0M_R { + LPF0M_R::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf1m(&self) -> Lpf1mR { - Lpf1mR::new(((self.bits >> 27) & 3) as u8) + pub fn lpf1m(&self) -> LPF1M_R { + LPF1M_R::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - pub fn lpf2m(&self) -> Lpf2mR { - Lpf2mR::new(((self.bits >> 29) & 3) as u8) + pub fn lpf2m(&self) -> LPF2M_R { + LPF2M_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] #[must_use] - pub fn ev0is(&mut self) -> Ev0isW { - Ev0isW::new(self, 0) + pub fn ev0is(&mut self) -> EV0IS_W { + EV0IS_W::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] #[must_use] - pub fn ev1is(&mut self) -> Ev1isW { - Ev1isW::new(self, 4) + pub fn ev1is(&mut self) -> EV1IS_W { + EV1IS_W::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] #[must_use] - pub fn ev2is(&mut self) -> Ev2isW { - Ev2isW::new(self, 8) + pub fn ev2is(&mut self) -> EV2IS_W { + EV2IS_W::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev0em(&mut self) -> Ev0emW { - Ev0emW::new(self, 16) + pub fn ev0em(&mut self) -> EV0EM_W { + EV0EM_W::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev1em(&mut self) -> Ev1emW { - Ev1emW::new(self, 18) + pub fn ev1em(&mut self) -> EV1EM_W { + EV1EM_W::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] #[must_use] - pub fn ev2em(&mut self) -> Ev2emW { - Ev2emW::new(self, 20) + pub fn ev2em(&mut self) -> EV2EM_W { + EV2EM_W::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] #[must_use] - pub fn ev0lm(&mut self) -> Ev0lmW { - Ev0lmW::new(self, 22) + pub fn ev0lm(&mut self) -> EV0LM_W { + EV0LM_W::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] #[must_use] - pub fn ev1lm(&mut self) -> Ev1lmW { - Ev1lmW::new(self, 23) + pub fn ev1lm(&mut self) -> EV1LM_W { + EV1LM_W::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] #[must_use] - pub fn ev2lm(&mut self) -> Ev2lmW { - Ev2lmW::new(self, 24) + pub fn ev2lm(&mut self) -> EV2LM_W { + EV2LM_W::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf0m(&mut self) -> Lpf0mW { - Lpf0mW::new(self, 25) + pub fn lpf0m(&mut self) -> LPF0M_W { + LPF0M_W::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf1m(&mut self) -> Lpf1mW { - Lpf1mW::new(self, 27) + pub fn lpf1m(&mut self) -> LPF1M_W { + LPF1M_W::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] #[must_use] - pub fn lpf2m(&mut self) -> Lpf2mW { - Lpf2mW::new(self, 29) + pub fn lpf2m(&mut self) -> LPF2M_W { + LPF2M_W::new(self, 29) } } #[doc = "Input Selector Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ins::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ins::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InsSpec; -impl crate::RegisterSpec for InsSpec { +pub struct INS_SPEC; +impl crate::RegisterSpec for INS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ins::R`](R) reader structure"] -impl crate::Readable for InsSpec {} +impl crate::Readable for INS_SPEC {} #[doc = "`write(|w| ..)` method takes [`ins::W`](W) writer structure"] -impl crate::Writable for InsSpec { +impl crate::Writable for INS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INS to value 0"] -impl crate::Resettable for InsSpec { +impl crate::Resettable for INS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/inte.rs b/src/ccu80_cc80/inte.rs index 14b19a63..66aa666d 100644 --- a/src/ccu80_cc80/inte.rs +++ b/src/ccu80_cc80/inte.rs @@ -1,601 +1,601 @@ #[doc = "Register `INTE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INTE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Period match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pme { +pub enum PME_A { #[doc = "0: Period Match interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Period Match interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pme) -> Self { + fn from(variant: PME_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PME` reader - Period match while counting up enable"] -pub type PmeR = crate::BitReader; -impl PmeR { +pub type PME_R = crate::BitReader; +impl PME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pme { + pub const fn variant(&self) -> PME_A { match self.bits { - false => Pme::Value1, - true => Pme::Value2, + false => PME_A::VALUE1, + true => PME_A::VALUE2, } } #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pme::Value1 + *self == PME_A::VALUE1 } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pme::Value2 + *self == PME_A::VALUE2 } } #[doc = "Field `PME` writer - Period match while counting up enable"] -pub type PmeW<'a, REG> = crate::BitWriter<'a, REG, Pme>; -impl<'a, REG> PmeW<'a, REG> +pub type PME_W<'a, REG> = crate::BitWriter<'a, REG, PME_A>; +impl<'a, REG> PME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Period Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pme::Value1) + self.variant(PME_A::VALUE1) } #[doc = "Period Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pme::Value2) + self.variant(PME_A::VALUE2) } } #[doc = "One match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ome { +pub enum OME_A { #[doc = "0: One Match interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One Match interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ome) -> Self { + fn from(variant: OME_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OME` reader - One match while counting down enable"] -pub type OmeR = crate::BitReader; -impl OmeR { +pub type OME_R = crate::BitReader; +impl OME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ome { + pub const fn variant(&self) -> OME_A { match self.bits { - false => Ome::Value1, - true => Ome::Value2, + false => OME_A::VALUE1, + true => OME_A::VALUE2, } } #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ome::Value1 + *self == OME_A::VALUE1 } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ome::Value2 + *self == OME_A::VALUE2 } } #[doc = "Field `OME` writer - One match while counting down enable"] -pub type OmeW<'a, REG> = crate::BitWriter<'a, REG, Ome>; -impl<'a, REG> OmeW<'a, REG> +pub type OME_W<'a, REG> = crate::BitWriter<'a, REG, OME_A>; +impl<'a, REG> OME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "One Match interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ome::Value1) + self.variant(OME_A::VALUE1) } #[doc = "One Match interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ome::Value2) + self.variant(OME_A::VALUE2) } } #[doc = "Channel 1 Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmu1e { +pub enum CMU1E_A { #[doc = "0: Compare Match while counting up interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmu1e) -> Self { + fn from(variant: CMU1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMU1E` reader - Channel 1 Compare match while counting up enable"] -pub type Cmu1eR = crate::BitReader; -impl Cmu1eR { +pub type CMU1E_R = crate::BitReader; +impl CMU1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmu1e { + pub const fn variant(&self) -> CMU1E_A { match self.bits { - false => Cmu1e::Value1, - true => Cmu1e::Value2, + false => CMU1E_A::VALUE1, + true => CMU1E_A::VALUE2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmu1e::Value1 + *self == CMU1E_A::VALUE1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmu1e::Value2 + *self == CMU1E_A::VALUE2 } } #[doc = "Field `CMU1E` writer - Channel 1 Compare match while counting up enable"] -pub type Cmu1eW<'a, REG> = crate::BitWriter<'a, REG, Cmu1e>; -impl<'a, REG> Cmu1eW<'a, REG> +pub type CMU1E_W<'a, REG> = crate::BitWriter<'a, REG, CMU1E_A>; +impl<'a, REG> CMU1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmu1e::Value1) + self.variant(CMU1E_A::VALUE1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmu1e::Value2) + self.variant(CMU1E_A::VALUE2) } } #[doc = "Channel 1 Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmd1e { +pub enum CMD1E_A { #[doc = "0: Compare Match while counting down interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmd1e) -> Self { + fn from(variant: CMD1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMD1E` reader - Channel 1 Compare match while counting down enable"] -pub type Cmd1eR = crate::BitReader; -impl Cmd1eR { +pub type CMD1E_R = crate::BitReader; +impl CMD1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmd1e { + pub const fn variant(&self) -> CMD1E_A { match self.bits { - false => Cmd1e::Value1, - true => Cmd1e::Value2, + false => CMD1E_A::VALUE1, + true => CMD1E_A::VALUE2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmd1e::Value1 + *self == CMD1E_A::VALUE1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmd1e::Value2 + *self == CMD1E_A::VALUE2 } } #[doc = "Field `CMD1E` writer - Channel 1 Compare match while counting down enable"] -pub type Cmd1eW<'a, REG> = crate::BitWriter<'a, REG, Cmd1e>; -impl<'a, REG> Cmd1eW<'a, REG> +pub type CMD1E_W<'a, REG> = crate::BitWriter<'a, REG, CMD1E_A>; +impl<'a, REG> CMD1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmd1e::Value1) + self.variant(CMD1E_A::VALUE1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmd1e::Value2) + self.variant(CMD1E_A::VALUE2) } } #[doc = "Channel 2 Compare match while counting up enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmu2e { +pub enum CMU2E_A { #[doc = "0: Compare Match while counting up interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting up interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmu2e) -> Self { + fn from(variant: CMU2E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMU2E` reader - Channel 2 Compare match while counting up enable"] -pub type Cmu2eR = crate::BitReader; -impl Cmu2eR { +pub type CMU2E_R = crate::BitReader; +impl CMU2E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmu2e { + pub const fn variant(&self) -> CMU2E_A { match self.bits { - false => Cmu2e::Value1, - true => Cmu2e::Value2, + false => CMU2E_A::VALUE1, + true => CMU2E_A::VALUE2, } } #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmu2e::Value1 + *self == CMU2E_A::VALUE1 } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmu2e::Value2 + *self == CMU2E_A::VALUE2 } } #[doc = "Field `CMU2E` writer - Channel 2 Compare match while counting up enable"] -pub type Cmu2eW<'a, REG> = crate::BitWriter<'a, REG, Cmu2e>; -impl<'a, REG> Cmu2eW<'a, REG> +pub type CMU2E_W<'a, REG> = crate::BitWriter<'a, REG, CMU2E_A>; +impl<'a, REG> CMU2E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting up interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmu2e::Value1) + self.variant(CMU2E_A::VALUE1) } #[doc = "Compare Match while counting up interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmu2e::Value2) + self.variant(CMU2E_A::VALUE2) } } #[doc = "Channel 2 Compare match while counting down enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmd2e { +pub enum CMD2E_A { #[doc = "0: Compare Match while counting down interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare Match while counting down interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmd2e) -> Self { + fn from(variant: CMD2E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMD2E` reader - Channel 2 Compare match while counting down enable"] -pub type Cmd2eR = crate::BitReader; -impl Cmd2eR { +pub type CMD2E_R = crate::BitReader; +impl CMD2E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmd2e { + pub const fn variant(&self) -> CMD2E_A { match self.bits { - false => Cmd2e::Value1, - true => Cmd2e::Value2, + false => CMD2E_A::VALUE1, + true => CMD2E_A::VALUE2, } } #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmd2e::Value1 + *self == CMD2E_A::VALUE1 } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmd2e::Value2 + *self == CMD2E_A::VALUE2 } } #[doc = "Field `CMD2E` writer - Channel 2 Compare match while counting down enable"] -pub type Cmd2eW<'a, REG> = crate::BitWriter<'a, REG, Cmd2e>; -impl<'a, REG> Cmd2eW<'a, REG> +pub type CMD2E_W<'a, REG> = crate::BitWriter<'a, REG, CMD2E_A>; +impl<'a, REG> CMD2E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Compare Match while counting down interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmd2e::Value1) + self.variant(CMD2E_A::VALUE1) } #[doc = "Compare Match while counting down interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmd2e::Value2) + self.variant(CMD2E_A::VALUE2) } } #[doc = "Event 0 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0ae { +pub enum E0AE_A { #[doc = "0: Event 0 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 0 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0ae) -> Self { + fn from(variant: E0AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E0AE` reader - Event 0 interrupt enable"] -pub type E0aeR = crate::BitReader; -impl E0aeR { +pub type E0AE_R = crate::BitReader; +impl E0AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0ae { + pub const fn variant(&self) -> E0AE_A { match self.bits { - false => E0ae::Value1, - true => E0ae::Value2, + false => E0AE_A::VALUE1, + true => E0AE_A::VALUE2, } } #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0ae::Value1 + *self == E0AE_A::VALUE1 } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0ae::Value2 + *self == E0AE_A::VALUE2 } } #[doc = "Field `E0AE` writer - Event 0 interrupt enable"] -pub type E0aeW<'a, REG> = crate::BitWriter<'a, REG, E0ae>; -impl<'a, REG> E0aeW<'a, REG> +pub type E0AE_W<'a, REG> = crate::BitWriter<'a, REG, E0AE_A>; +impl<'a, REG> E0AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 0 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0ae::Value1) + self.variant(E0AE_A::VALUE1) } #[doc = "Event 0 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0ae::Value2) + self.variant(E0AE_A::VALUE2) } } #[doc = "Event 1 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1ae { +pub enum E1AE_A { #[doc = "0: Event 1 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 1 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1ae) -> Self { + fn from(variant: E1AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E1AE` reader - Event 1 interrupt enable"] -pub type E1aeR = crate::BitReader; -impl E1aeR { +pub type E1AE_R = crate::BitReader; +impl E1AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1ae { + pub const fn variant(&self) -> E1AE_A { match self.bits { - false => E1ae::Value1, - true => E1ae::Value2, + false => E1AE_A::VALUE1, + true => E1AE_A::VALUE2, } } #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1ae::Value1 + *self == E1AE_A::VALUE1 } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1ae::Value2 + *self == E1AE_A::VALUE2 } } #[doc = "Field `E1AE` writer - Event 1 interrupt enable"] -pub type E1aeW<'a, REG> = crate::BitWriter<'a, REG, E1ae>; -impl<'a, REG> E1aeW<'a, REG> +pub type E1AE_W<'a, REG> = crate::BitWriter<'a, REG, E1AE_A>; +impl<'a, REG> E1AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 1 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1ae::Value1) + self.variant(E1AE_A::VALUE1) } #[doc = "Event 1 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1ae::Value2) + self.variant(E1AE_A::VALUE2) } } #[doc = "Event 2 interrupt enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2ae { +pub enum E2AE_A { #[doc = "0: Event 2 detection interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 2 detection interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2ae) -> Self { + fn from(variant: E2AE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E2AE` reader - Event 2 interrupt enable"] -pub type E2aeR = crate::BitReader; -impl E2aeR { +pub type E2AE_R = crate::BitReader; +impl E2AE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2ae { + pub const fn variant(&self) -> E2AE_A { match self.bits { - false => E2ae::Value1, - true => E2ae::Value2, + false => E2AE_A::VALUE1, + true => E2AE_A::VALUE2, } } #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2ae::Value1 + *self == E2AE_A::VALUE1 } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2ae::Value2 + *self == E2AE_A::VALUE2 } } #[doc = "Field `E2AE` writer - Event 2 interrupt enable"] -pub type E2aeW<'a, REG> = crate::BitWriter<'a, REG, E2ae>; -impl<'a, REG> E2aeW<'a, REG> +pub type E2AE_W<'a, REG> = crate::BitWriter<'a, REG, E2AE_A>; +impl<'a, REG> E2AE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Event 2 detection interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2ae::Value1) + self.variant(E2AE_A::VALUE1) } #[doc = "Event 2 detection interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2ae::Value2) + self.variant(E2AE_A::VALUE2) } } impl R { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - pub fn pme(&self) -> PmeR { - PmeR::new((self.bits & 1) != 0) + pub fn pme(&self) -> PME_R { + PME_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - pub fn ome(&self) -> OmeR { - OmeR::new(((self.bits >> 1) & 1) != 0) + pub fn ome(&self) -> OME_R { + OME_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"] #[inline(always)] - pub fn cmu1e(&self) -> Cmu1eR { - Cmu1eR::new(((self.bits >> 2) & 1) != 0) + pub fn cmu1e(&self) -> CMU1E_R { + CMU1E_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"] #[inline(always)] - pub fn cmd1e(&self) -> Cmd1eR { - Cmd1eR::new(((self.bits >> 3) & 1) != 0) + pub fn cmd1e(&self) -> CMD1E_R { + CMD1E_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"] #[inline(always)] - pub fn cmu2e(&self) -> Cmu2eR { - Cmu2eR::new(((self.bits >> 4) & 1) != 0) + pub fn cmu2e(&self) -> CMU2E_R { + CMU2E_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"] #[inline(always)] - pub fn cmd2e(&self) -> Cmd2eR { - Cmd2eR::new(((self.bits >> 5) & 1) != 0) + pub fn cmd2e(&self) -> CMD2E_R { + CMD2E_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - pub fn e0ae(&self) -> E0aeR { - E0aeR::new(((self.bits >> 8) & 1) != 0) + pub fn e0ae(&self) -> E0AE_R { + E0AE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - pub fn e1ae(&self) -> E1aeR { - E1aeR::new(((self.bits >> 9) & 1) != 0) + pub fn e1ae(&self) -> E1AE_R { + E1AE_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - pub fn e2ae(&self) -> E2aeR { - E2aeR::new(((self.bits >> 10) & 1) != 0) + pub fn e2ae(&self) -> E2AE_R { + E2AE_R::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] #[must_use] - pub fn pme(&mut self) -> PmeW { - PmeW::new(self, 0) + pub fn pme(&mut self) -> PME_W { + PME_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] #[must_use] - pub fn ome(&mut self) -> OmeW { - OmeW::new(self, 1) + pub fn ome(&mut self) -> OME_W { + OME_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmu1e(&mut self) -> Cmu1eW { - Cmu1eW::new(self, 2) + pub fn cmu1e(&mut self) -> CMU1E_W { + CMU1E_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmd1e(&mut self) -> Cmd1eW { - Cmd1eW::new(self, 3) + pub fn cmd1e(&mut self) -> CMD1E_W { + CMD1E_W::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"] #[inline(always)] #[must_use] - pub fn cmu2e(&mut self) -> Cmu2eW { - Cmu2eW::new(self, 4) + pub fn cmu2e(&mut self) -> CMU2E_W { + CMU2E_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"] #[inline(always)] #[must_use] - pub fn cmd2e(&mut self) -> Cmd2eW { - Cmd2eW::new(self, 5) + pub fn cmd2e(&mut self) -> CMD2E_W { + CMD2E_W::new(self, 5) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] #[must_use] - pub fn e0ae(&mut self) -> E0aeW { - E0aeW::new(self, 8) + pub fn e0ae(&mut self) -> E0AE_W { + E0AE_W::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] #[must_use] - pub fn e1ae(&mut self) -> E1aeW { - E1aeW::new(self, 9) + pub fn e1ae(&mut self) -> E1AE_W { + E1AE_W::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] #[must_use] - pub fn e2ae(&mut self) -> E2aeW { - E2aeW::new(self, 10) + pub fn e2ae(&mut self) -> E2AE_W { + E2AE_W::new(self, 10) } } #[doc = "Interrupt Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InteSpec; -impl crate::RegisterSpec for InteSpec { +pub struct INTE_SPEC; +impl crate::RegisterSpec for INTE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`inte::R`](R) reader structure"] -impl crate::Readable for InteSpec {} +impl crate::Readable for INTE_SPEC {} #[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"] -impl crate::Writable for InteSpec { +impl crate::Writable for INTE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INTE to value 0"] -impl crate::Resettable for InteSpec { +impl crate::Resettable for INTE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/ints.rs b/src/ccu80_cc80/ints.rs index 5ed8b264..8eb02277 100644 --- a/src/ccu80_cc80/ints.rs +++ b/src/ccu80_cc80/ints.rs @@ -1,391 +1,391 @@ #[doc = "Register `INTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Period Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pmus { +pub enum PMUS_A { #[doc = "0: Period match while counting up not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Period match while counting up detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pmus) -> Self { + fn from(variant: PMUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PMUS` reader - Period Match while Counting Up"] -pub type PmusR = crate::BitReader; -impl PmusR { +pub type PMUS_R = crate::BitReader; +impl PMUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pmus { + pub const fn variant(&self) -> PMUS_A { match self.bits { - false => Pmus::Value1, - true => Pmus::Value2, + false => PMUS_A::VALUE1, + true => PMUS_A::VALUE2, } } #[doc = "Period match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pmus::Value1 + *self == PMUS_A::VALUE1 } #[doc = "Period match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pmus::Value2 + *self == PMUS_A::VALUE2 } } #[doc = "One Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Omds { +pub enum OMDS_A { #[doc = "0: One match while counting down not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One match while counting down detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Omds) -> Self { + fn from(variant: OMDS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OMDS` reader - One Match while Counting Down"] -pub type OmdsR = crate::BitReader; -impl OmdsR { +pub type OMDS_R = crate::BitReader; +impl OMDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Omds { + pub const fn variant(&self) -> OMDS_A { match self.bits { - false => Omds::Value1, - true => Omds::Value2, + false => OMDS_A::VALUE1, + true => OMDS_A::VALUE2, } } #[doc = "One match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Omds::Value1 + *self == OMDS_A::VALUE1 } #[doc = "One match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Omds::Value2 + *self == OMDS_A::VALUE2 } } #[doc = "Channel 1 Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmu1s { +pub enum CMU1S_A { #[doc = "0: Compare match while counting up not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting up detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmu1s) -> Self { + fn from(variant: CMU1S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMU1S` reader - Channel 1 Compare Match while Counting Up"] -pub type Cmu1sR = crate::BitReader; -impl Cmu1sR { +pub type CMU1S_R = crate::BitReader; +impl CMU1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmu1s { + pub const fn variant(&self) -> CMU1S_A { match self.bits { - false => Cmu1s::Value1, - true => Cmu1s::Value2, + false => CMU1S_A::VALUE1, + true => CMU1S_A::VALUE2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmu1s::Value1 + *self == CMU1S_A::VALUE1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmu1s::Value2 + *self == CMU1S_A::VALUE2 } } #[doc = "Channel 1 Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmd1s { +pub enum CMD1S_A { #[doc = "0: Compare match while counting down not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting down detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmd1s) -> Self { + fn from(variant: CMD1S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMD1S` reader - Channel 1 Compare Match while Counting Down"] -pub type Cmd1sR = crate::BitReader; -impl Cmd1sR { +pub type CMD1S_R = crate::BitReader; +impl CMD1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmd1s { + pub const fn variant(&self) -> CMD1S_A { match self.bits { - false => Cmd1s::Value1, - true => Cmd1s::Value2, + false => CMD1S_A::VALUE1, + true => CMD1S_A::VALUE2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmd1s::Value1 + *self == CMD1S_A::VALUE1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmd1s::Value2 + *self == CMD1S_A::VALUE2 } } #[doc = "Channel 2 Compare Match while Counting Up\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmu2s { +pub enum CMU2S_A { #[doc = "0: Compare match while counting up not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting up detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmu2s) -> Self { + fn from(variant: CMU2S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMU2S` reader - Channel 2 Compare Match while Counting Up"] -pub type Cmu2sR = crate::BitReader; -impl Cmu2sR { +pub type CMU2S_R = crate::BitReader; +impl CMU2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmu2s { + pub const fn variant(&self) -> CMU2S_A { match self.bits { - false => Cmu2s::Value1, - true => Cmu2s::Value2, + false => CMU2S_A::VALUE1, + true => CMU2S_A::VALUE2, } } #[doc = "Compare match while counting up not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmu2s::Value1 + *self == CMU2S_A::VALUE1 } #[doc = "Compare match while counting up detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmu2s::Value2 + *self == CMU2S_A::VALUE2 } } #[doc = "Channel 2 Compare Match while Counting Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmd2s { +pub enum CMD2S_A { #[doc = "0: Compare match while counting down not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare match while counting down detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmd2s) -> Self { + fn from(variant: CMD2S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMD2S` reader - Channel 2 Compare Match while Counting Down"] -pub type Cmd2sR = crate::BitReader; -impl Cmd2sR { +pub type CMD2S_R = crate::BitReader; +impl CMD2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmd2s { + pub const fn variant(&self) -> CMD2S_A { match self.bits { - false => Cmd2s::Value1, - true => Cmd2s::Value2, + false => CMD2S_A::VALUE1, + true => CMD2S_A::VALUE2, } } #[doc = "Compare match while counting down not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmd2s::Value1 + *self == CMD2S_A::VALUE1 } #[doc = "Compare match while counting down detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmd2s::Value2 + *self == CMD2S_A::VALUE2 } } #[doc = "Event 0 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E0as { +pub enum E0AS_A { #[doc = "0: Event 0 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 0 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E0as) -> Self { + fn from(variant: E0AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E0AS` reader - Event 0 Detection Status"] -pub type E0asR = crate::BitReader; -impl E0asR { +pub type E0AS_R = crate::BitReader; +impl E0AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0as { + pub const fn variant(&self) -> E0AS_A { match self.bits { - false => E0as::Value1, - true => E0as::Value2, + false => E0AS_A::VALUE1, + true => E0AS_A::VALUE2, } } #[doc = "Event 0 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0as::Value1 + *self == E0AS_A::VALUE1 } #[doc = "Event 0 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0as::Value2 + *self == E0AS_A::VALUE2 } } #[doc = "Event 1 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E1as { +pub enum E1AS_A { #[doc = "0: Event 1 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 1 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E1as) -> Self { + fn from(variant: E1AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E1AS` reader - Event 1 Detection Status"] -pub type E1asR = crate::BitReader; -impl E1asR { +pub type E1AS_R = crate::BitReader; +impl E1AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1as { + pub const fn variant(&self) -> E1AS_A { match self.bits { - false => E1as::Value1, - true => E1as::Value2, + false => E1AS_A::VALUE1, + true => E1AS_A::VALUE2, } } #[doc = "Event 1 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1as::Value1 + *self == E1AS_A::VALUE1 } #[doc = "Event 1 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1as::Value2 + *self == E1AS_A::VALUE2 } } #[doc = "Event 2 Detection Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum E2as { +pub enum E2AS_A { #[doc = "0: Event 2 not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Event 2 detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: E2as) -> Self { + fn from(variant: E2AS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `E2AS` reader - Event 2 Detection Status"] -pub type E2asR = crate::BitReader; -impl E2asR { +pub type E2AS_R = crate::BitReader; +impl E2AS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2as { + pub const fn variant(&self) -> E2AS_A { match self.bits { - false => E2as::Value1, - true => E2as::Value2, + false => E2AS_A::VALUE1, + true => E2AS_A::VALUE2, } } #[doc = "Event 2 not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2as::Value1 + *self == E2AS_A::VALUE1 } #[doc = "Event 2 detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2as::Value2 + *self == E2AS_A::VALUE2 } } #[doc = "Field `TRPF` reader - Trap Flag Status"] -pub type TrpfR = crate::BitReader; +pub type TRPF_R = crate::BitReader; impl R { #[doc = "Bit 0 - Period Match while Counting Up"] #[inline(always)] - pub fn pmus(&self) -> PmusR { - PmusR::new((self.bits & 1) != 0) + pub fn pmus(&self) -> PMUS_R { + PMUS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - One Match while Counting Down"] #[inline(always)] - pub fn omds(&self) -> OmdsR { - OmdsR::new(((self.bits >> 1) & 1) != 0) + pub fn omds(&self) -> OMDS_R { + OMDS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel 1 Compare Match while Counting Up"] #[inline(always)] - pub fn cmu1s(&self) -> Cmu1sR { - Cmu1sR::new(((self.bits >> 2) & 1) != 0) + pub fn cmu1s(&self) -> CMU1S_R { + CMU1S_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel 1 Compare Match while Counting Down"] #[inline(always)] - pub fn cmd1s(&self) -> Cmd1sR { - Cmd1sR::new(((self.bits >> 3) & 1) != 0) + pub fn cmd1s(&self) -> CMD1S_R { + CMD1S_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel 2 Compare Match while Counting Up"] #[inline(always)] - pub fn cmu2s(&self) -> Cmu2sR { - Cmu2sR::new(((self.bits >> 4) & 1) != 0) + pub fn cmu2s(&self) -> CMU2S_R { + CMU2S_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel 2 Compare Match while Counting Down"] #[inline(always)] - pub fn cmd2s(&self) -> Cmd2sR { - Cmd2sR::new(((self.bits >> 5) & 1) != 0) + pub fn cmd2s(&self) -> CMD2S_R { + CMD2S_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - Event 0 Detection Status"] #[inline(always)] - pub fn e0as(&self) -> E0asR { - E0asR::new(((self.bits >> 8) & 1) != 0) + pub fn e0as(&self) -> E0AS_R { + E0AS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Event 1 Detection Status"] #[inline(always)] - pub fn e1as(&self) -> E1asR { - E1asR::new(((self.bits >> 9) & 1) != 0) + pub fn e1as(&self) -> E1AS_R { + E1AS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Event 2 Detection Status"] #[inline(always)] - pub fn e2as(&self) -> E2asR { - E2asR::new(((self.bits >> 10) & 1) != 0) + pub fn e2as(&self) -> E2AS_R { + E2AS_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Trap Flag Status"] #[inline(always)] - pub fn trpf(&self) -> TrpfR { - TrpfR::new(((self.bits >> 11) & 1) != 0) + pub fn trpf(&self) -> TRPF_R { + TRPF_R::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Interrupt Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ints::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IntsSpec; -impl crate::RegisterSpec for IntsSpec { +pub struct INTS_SPEC; +impl crate::RegisterSpec for INTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ints::R`](R) reader structure"] -impl crate::Readable for IntsSpec {} +impl crate::Readable for INTS_SPEC {} #[doc = "`reset()` method sets INTS to value 0"] -impl crate::Resettable for IntsSpec { +impl crate::Resettable for INTS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/pr.rs b/src/ccu80_cc80/pr.rs index 48f8c561..33893da5 100644 --- a/src/ccu80_cc80/pr.rs +++ b/src/ccu80_cc80/pr.rs @@ -1,22 +1,22 @@ #[doc = "Register `PR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PR` reader - Period Register"] -pub type PrR = crate::FieldReader; +pub type PR_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn pr(&self) -> PrR { - PrR::new((self.bits & 0xffff) as u16) + pub fn pr(&self) -> PR_R { + PR_R::new((self.bits & 0xffff) as u16) } } #[doc = "Timer Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrSpec; -impl crate::RegisterSpec for PrSpec { +pub struct PR_SPEC; +impl crate::RegisterSpec for PR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pr::R`](R) reader structure"] -impl crate::Readable for PrSpec {} +impl crate::Readable for PR_SPEC {} #[doc = "`reset()` method sets PR to value 0"] -impl crate::Resettable for PrSpec { +impl crate::Resettable for PR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/prs.rs b/src/ccu80_cc80/prs.rs index d281b0ba..b8d77680 100644 --- a/src/ccu80_cc80/prs.rs +++ b/src/ccu80_cc80/prs.rs @@ -1,40 +1,40 @@ #[doc = "Register `PRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRS` reader - Period Register"] -pub type PrsR = crate::FieldReader; +pub type PRS_R = crate::FieldReader; #[doc = "Field `PRS` writer - Period Register"] -pub type PrsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type PRS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - pub fn prs(&self) -> PrsR { - PrsR::new((self.bits & 0xffff) as u16) + pub fn prs(&self) -> PRS_R { + PRS_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] #[must_use] - pub fn prs(&mut self) -> PrsW { - PrsW::new(self, 0) + pub fn prs(&mut self) -> PRS_W { + PRS_W::new(self, 0) } } #[doc = "Timer Shadow Period Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrsSpec; -impl crate::RegisterSpec for PrsSpec { +pub struct PRS_SPEC; +impl crate::RegisterSpec for PRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prs::R`](R) reader structure"] -impl crate::Readable for PrsSpec {} +impl crate::Readable for PRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`prs::W`](W) writer structure"] -impl crate::Writable for PrsSpec { +impl crate::Writable for PRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRS to value 0"] -impl crate::Resettable for PrsSpec { +impl crate::Resettable for PRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/psc.rs b/src/ccu80_cc80/psc.rs index f5e97989..0b0a874e 100644 --- a/src/ccu80_cc80/psc.rs +++ b/src/ccu80_cc80/psc.rs @@ -1,40 +1,40 @@ #[doc = "Register `PSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PSIV` reader - Prescaler Initial Value"] -pub type PsivR = crate::FieldReader; +pub type PSIV_R = crate::FieldReader; #[doc = "Field `PSIV` writer - Prescaler Initial Value"] -pub type PsivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PSIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - pub fn psiv(&self) -> PsivR { - PsivR::new((self.bits & 0x0f) as u8) + pub fn psiv(&self) -> PSIV_R { + PSIV_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] #[must_use] - pub fn psiv(&mut self) -> PsivW { - PsivW::new(self, 0) + pub fn psiv(&mut self) -> PSIV_W { + PSIV_W::new(self, 0) } } #[doc = "Prescaler Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PscSpec; -impl crate::RegisterSpec for PscSpec { +pub struct PSC_SPEC; +impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psc::R`](R) reader structure"] -impl crate::Readable for PscSpec {} +impl crate::Readable for PSC_SPEC {} #[doc = "`write(|w| ..)` method takes [`psc::W`](W) writer structure"] -impl crate::Writable for PscSpec { +impl crate::Writable for PSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSC to value 0"] -impl crate::Resettable for PscSpec { +impl crate::Resettable for PSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/psl.rs b/src/ccu80_cc80/psl.rs index 080e6c3a..e2f16d24 100644 --- a/src/ccu80_cc80/psl.rs +++ b/src/ccu80_cc80/psl.rs @@ -1,281 +1,281 @@ #[doc = "Register `PSL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Output Passive Level for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl11 { +pub enum PSL11_A { #[doc = "0: Passive Level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive Level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl11) -> Self { + fn from(variant: PSL11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL11` reader - Output Passive Level for CCU8x.OUTy0"] -pub type Psl11R = crate::BitReader; -impl Psl11R { +pub type PSL11_R = crate::BitReader; +impl PSL11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl11 { + pub const fn variant(&self) -> PSL11_A { match self.bits { - false => Psl11::Value1, - true => Psl11::Value2, + false => PSL11_A::VALUE1, + true => PSL11_A::VALUE2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl11::Value1 + *self == PSL11_A::VALUE1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl11::Value2 + *self == PSL11_A::VALUE2 } } #[doc = "Field `PSL11` writer - Output Passive Level for CCU8x.OUTy0"] -pub type Psl11W<'a, REG> = crate::BitWriter<'a, REG, Psl11>; -impl<'a, REG> Psl11W<'a, REG> +pub type PSL11_W<'a, REG> = crate::BitWriter<'a, REG, PSL11_A>; +impl<'a, REG> PSL11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl11::Value1) + self.variant(PSL11_A::VALUE1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl11::Value2) + self.variant(PSL11_A::VALUE2) } } #[doc = "Output Passive Level for CCU8x.OUTy1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl12 { +pub enum PSL12_A { #[doc = "0: Passive Level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive Level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl12) -> Self { + fn from(variant: PSL12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL12` reader - Output Passive Level for CCU8x.OUTy1"] -pub type Psl12R = crate::BitReader; -impl Psl12R { +pub type PSL12_R = crate::BitReader; +impl PSL12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl12 { + pub const fn variant(&self) -> PSL12_A { match self.bits { - false => Psl12::Value1, - true => Psl12::Value2, + false => PSL12_A::VALUE1, + true => PSL12_A::VALUE2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl12::Value1 + *self == PSL12_A::VALUE1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl12::Value2 + *self == PSL12_A::VALUE2 } } #[doc = "Field `PSL12` writer - Output Passive Level for CCU8x.OUTy1"] -pub type Psl12W<'a, REG> = crate::BitWriter<'a, REG, Psl12>; -impl<'a, REG> Psl12W<'a, REG> +pub type PSL12_W<'a, REG> = crate::BitWriter<'a, REG, PSL12_A>; +impl<'a, REG> PSL12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl12::Value1) + self.variant(PSL12_A::VALUE1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl12::Value2) + self.variant(PSL12_A::VALUE2) } } #[doc = "Output Passive Level for CCU8x.OUTy2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl21 { +pub enum PSL21_A { #[doc = "0: Passive Level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive Level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl21) -> Self { + fn from(variant: PSL21_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL21` reader - Output Passive Level for CCU8x.OUTy2"] -pub type Psl21R = crate::BitReader; -impl Psl21R { +pub type PSL21_R = crate::BitReader; +impl PSL21_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl21 { + pub const fn variant(&self) -> PSL21_A { match self.bits { - false => Psl21::Value1, - true => Psl21::Value2, + false => PSL21_A::VALUE1, + true => PSL21_A::VALUE2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl21::Value1 + *self == PSL21_A::VALUE1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl21::Value2 + *self == PSL21_A::VALUE2 } } #[doc = "Field `PSL21` writer - Output Passive Level for CCU8x.OUTy2"] -pub type Psl21W<'a, REG> = crate::BitWriter<'a, REG, Psl21>; -impl<'a, REG> Psl21W<'a, REG> +pub type PSL21_W<'a, REG> = crate::BitWriter<'a, REG, PSL21_A>; +impl<'a, REG> PSL21_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl21::Value1) + self.variant(PSL21_A::VALUE1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl21::Value2) + self.variant(PSL21_A::VALUE2) } } #[doc = "Output Passive Level for CCU8x.OUTy3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl22 { +pub enum PSL22_A { #[doc = "0: Passive Level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive Level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl22) -> Self { + fn from(variant: PSL22_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL22` reader - Output Passive Level for CCU8x.OUTy3"] -pub type Psl22R = crate::BitReader; -impl Psl22R { +pub type PSL22_R = crate::BitReader; +impl PSL22_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl22 { + pub const fn variant(&self) -> PSL22_A { match self.bits { - false => Psl22::Value1, - true => Psl22::Value2, + false => PSL22_A::VALUE1, + true => PSL22_A::VALUE2, } } #[doc = "Passive Level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl22::Value1 + *self == PSL22_A::VALUE1 } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl22::Value2 + *self == PSL22_A::VALUE2 } } #[doc = "Field `PSL22` writer - Output Passive Level for CCU8x.OUTy3"] -pub type Psl22W<'a, REG> = crate::BitWriter<'a, REG, Psl22>; -impl<'a, REG> Psl22W<'a, REG> +pub type PSL22_W<'a, REG> = crate::BitWriter<'a, REG, PSL22_A>; +impl<'a, REG> PSL22_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Passive Level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl22::Value1) + self.variant(PSL22_A::VALUE1) } #[doc = "Passive Level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl22::Value2) + self.variant(PSL22_A::VALUE2) } } impl R { #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"] #[inline(always)] - pub fn psl11(&self) -> Psl11R { - Psl11R::new((self.bits & 1) != 0) + pub fn psl11(&self) -> PSL11_R { + PSL11_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"] #[inline(always)] - pub fn psl12(&self) -> Psl12R { - Psl12R::new(((self.bits >> 1) & 1) != 0) + pub fn psl12(&self) -> PSL12_R { + PSL12_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"] #[inline(always)] - pub fn psl21(&self) -> Psl21R { - Psl21R::new(((self.bits >> 2) & 1) != 0) + pub fn psl21(&self) -> PSL21_R { + PSL21_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"] #[inline(always)] - pub fn psl22(&self) -> Psl22R { - Psl22R::new(((self.bits >> 3) & 1) != 0) + pub fn psl22(&self) -> PSL22_R { + PSL22_R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn psl11(&mut self) -> Psl11W { - Psl11W::new(self, 0) + pub fn psl11(&mut self) -> PSL11_W { + PSL11_W::new(self, 0) } #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn psl12(&mut self) -> Psl12W { - Psl12W::new(self, 1) + pub fn psl12(&mut self) -> PSL12_W { + PSL12_W::new(self, 1) } #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn psl21(&mut self) -> Psl21W { - Psl21W::new(self, 2) + pub fn psl21(&mut self) -> PSL21_W { + PSL21_W::new(self, 2) } #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn psl22(&mut self) -> Psl22W { - Psl22W::new(self, 3) + pub fn psl22(&mut self) -> PSL22_W { + PSL22_W::new(self, 3) } } #[doc = "Passive Level Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PslSpec; -impl crate::RegisterSpec for PslSpec { +pub struct PSL_SPEC; +impl crate::RegisterSpec for PSL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psl::R`](R) reader structure"] -impl crate::Readable for PslSpec {} +impl crate::Readable for PSL_SPEC {} #[doc = "`write(|w| ..)` method takes [`psl::W`](W) writer structure"] -impl crate::Writable for PslSpec { +impl crate::Writable for PSL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSL to value 0"] -impl crate::Resettable for PslSpec { +impl crate::Resettable for PSL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/srs.rs b/src/ccu80_cc80/srs.rs index 7810a0f7..ded1e704 100644 --- a/src/ccu80_cc80/srs.rs +++ b/src/ccu80_cc80/srs.rs @@ -1,68 +1,68 @@ #[doc = "Register `SRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Period/One match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Posr { +pub enum POSR_A { #[doc = "0: Forward to CC8ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC8ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Posr) -> Self { + fn from(variant: POSR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Posr { +impl crate::FieldSpec for POSR_A { type Ux = u8; } -impl crate::IsEnum for Posr {} +impl crate::IsEnum for POSR_A {} #[doc = "Field `POSR` reader - Period/One match Service request selector"] -pub type PosrR = crate::FieldReader; -impl PosrR { +pub type POSR_R = crate::FieldReader; +impl POSR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Posr { + pub const fn variant(&self) -> POSR_A { match self.bits { - 0 => Posr::Value1, - 1 => Posr::Value2, - 2 => Posr::Value3, - 3 => Posr::Value4, + 0 => POSR_A::VALUE1, + 1 => POSR_A::VALUE2, + 2 => POSR_A::VALUE3, + 3 => POSR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Posr::Value1 + *self == POSR_A::VALUE1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Posr::Value2 + *self == POSR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Posr::Value3 + *self == POSR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Posr::Value4 + *self == POSR_A::VALUE4 } } #[doc = "Field `POSR` writer - Period/One match Service request selector"] -pub type PosrW<'a, REG> = crate::FieldWriter<'a, REG, 2, Posr, crate::Safe>; -impl<'a, REG> PosrW<'a, REG> +pub type POSR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, POSR_A, crate::Safe>; +impl<'a, REG> POSR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posr::Value1) + self.variant(POSR_A::VALUE1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posr::Value2) + self.variant(POSR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Posr::Value3) + self.variant(POSR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Posr::Value4) + self.variant(POSR_A::VALUE4) } } #[doc = "Channel 1 Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm1sr { +pub enum CM1SR_A { #[doc = "0: Forward to CC8ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC8ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm1sr) -> Self { + fn from(variant: CM1SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm1sr { +impl crate::FieldSpec for CM1SR_A { type Ux = u8; } -impl crate::IsEnum for Cm1sr {} +impl crate::IsEnum for CM1SR_A {} #[doc = "Field `CM1SR` reader - Channel 1 Compare match Service request selector"] -pub type Cm1srR = crate::FieldReader; -impl Cm1srR { +pub type CM1SR_R = crate::FieldReader; +impl CM1SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm1sr { + pub const fn variant(&self) -> CM1SR_A { match self.bits { - 0 => Cm1sr::Value1, - 1 => Cm1sr::Value2, - 2 => Cm1sr::Value3, - 3 => Cm1sr::Value4, + 0 => CM1SR_A::VALUE1, + 1 => CM1SR_A::VALUE2, + 2 => CM1SR_A::VALUE3, + 3 => CM1SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm1sr::Value1 + *self == CM1SR_A::VALUE1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm1sr::Value2 + *self == CM1SR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm1sr::Value3 + *self == CM1SR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm1sr::Value4 + *self == CM1SR_A::VALUE4 } } #[doc = "Field `CM1SR` writer - Channel 1 Compare match Service request selector"] -pub type Cm1srW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm1sr, crate::Safe>; -impl<'a, REG> Cm1srW<'a, REG> +pub type CM1SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM1SR_A, crate::Safe>; +impl<'a, REG> CM1SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm1sr::Value1) + self.variant(CM1SR_A::VALUE1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm1sr::Value2) + self.variant(CM1SR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm1sr::Value3) + self.variant(CM1SR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm1sr::Value4) + self.variant(CM1SR_A::VALUE4) } } #[doc = "Channel 2 Compare match Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm2sr { +pub enum CM2SR_A { #[doc = "0: Forward to CC8ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC8ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm2sr) -> Self { + fn from(variant: CM2SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm2sr { +impl crate::FieldSpec for CM2SR_A { type Ux = u8; } -impl crate::IsEnum for Cm2sr {} +impl crate::IsEnum for CM2SR_A {} #[doc = "Field `CM2SR` reader - Channel 2 Compare match Service request selector"] -pub type Cm2srR = crate::FieldReader; -impl Cm2srR { +pub type CM2SR_R = crate::FieldReader; +impl CM2SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm2sr { + pub const fn variant(&self) -> CM2SR_A { match self.bits { - 0 => Cm2sr::Value1, - 1 => Cm2sr::Value2, - 2 => Cm2sr::Value3, - 3 => Cm2sr::Value4, + 0 => CM2SR_A::VALUE1, + 1 => CM2SR_A::VALUE2, + 2 => CM2SR_A::VALUE3, + 3 => CM2SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm2sr::Value1 + *self == CM2SR_A::VALUE1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm2sr::Value2 + *self == CM2SR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm2sr::Value3 + *self == CM2SR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm2sr::Value4 + *self == CM2SR_A::VALUE4 } } #[doc = "Field `CM2SR` writer - Channel 2 Compare match Service request selector"] -pub type Cm2srW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm2sr, crate::Safe>; -impl<'a, REG> Cm2srW<'a, REG> +pub type CM2SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM2SR_A, crate::Safe>; +impl<'a, REG> CM2SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm2sr::Value1) + self.variant(CM2SR_A::VALUE1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm2sr::Value2) + self.variant(CM2SR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm2sr::Value3) + self.variant(CM2SR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm2sr::Value4) + self.variant(CM2SR_A::VALUE4) } } #[doc = "Event 0 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E0sr { +pub enum E0SR_A { #[doc = "0: Forward to CCvySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC8ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E0sr) -> Self { + fn from(variant: E0SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E0sr { +impl crate::FieldSpec for E0SR_A { type Ux = u8; } -impl crate::IsEnum for E0sr {} +impl crate::IsEnum for E0SR_A {} #[doc = "Field `E0SR` reader - Event 0 Service request selector"] -pub type E0srR = crate::FieldReader; -impl E0srR { +pub type E0SR_R = crate::FieldReader; +impl E0SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E0sr { + pub const fn variant(&self) -> E0SR_A { match self.bits { - 0 => E0sr::Value1, - 1 => E0sr::Value2, - 2 => E0sr::Value3, - 3 => E0sr::Value4, + 0 => E0SR_A::VALUE1, + 1 => E0SR_A::VALUE2, + 2 => E0SR_A::VALUE3, + 3 => E0SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CCvySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E0sr::Value1 + *self == E0SR_A::VALUE1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E0sr::Value2 + *self == E0SR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E0sr::Value3 + *self == E0SR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E0sr::Value4 + *self == E0SR_A::VALUE4 } } #[doc = "Field `E0SR` writer - Event 0 Service request selector"] -pub type E0srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E0sr, crate::Safe>; -impl<'a, REG> E0srW<'a, REG> +pub type E0SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E0SR_A, crate::Safe>; +impl<'a, REG> E0SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Forward to CCvySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E0sr::Value1) + self.variant(E0SR_A::VALUE1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E0sr::Value2) + self.variant(E0SR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E0sr::Value3) + self.variant(E0SR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E0sr::Value4) + self.variant(E0SR_A::VALUE4) } } #[doc = "Event 1 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E1sr { +pub enum E1SR_A { #[doc = "0: Forward to CC8ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CC8ySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E1sr) -> Self { + fn from(variant: E1SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E1sr { +impl crate::FieldSpec for E1SR_A { type Ux = u8; } -impl crate::IsEnum for E1sr {} +impl crate::IsEnum for E1SR_A {} #[doc = "Field `E1SR` reader - Event 1 Service request selector"] -pub type E1srR = crate::FieldReader; -impl E1srR { +pub type E1SR_R = crate::FieldReader; +impl E1SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E1sr { + pub const fn variant(&self) -> E1SR_A { match self.bits { - 0 => E1sr::Value1, - 1 => E1sr::Value2, - 2 => E1sr::Value3, - 3 => E1sr::Value4, + 0 => E1SR_A::VALUE1, + 1 => E1SR_A::VALUE2, + 2 => E1SR_A::VALUE3, + 3 => E1SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E1sr::Value1 + *self == E1SR_A::VALUE1 } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E1sr::Value2 + *self == E1SR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E1sr::Value3 + *self == E1SR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E1sr::Value4 + *self == E1SR_A::VALUE4 } } #[doc = "Field `E1SR` writer - Event 1 Service request selector"] -pub type E1srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E1sr, crate::Safe>; -impl<'a, REG> E1srW<'a, REG> +pub type E1SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E1SR_A, crate::Safe>; +impl<'a, REG> E1SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E1sr::Value1) + self.variant(E1SR_A::VALUE1) } #[doc = "Forward to CC8ySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E1sr::Value2) + self.variant(E1SR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E1sr::Value3) + self.variant(E1SR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E1sr::Value4) + self.variant(E1SR_A::VALUE4) } } #[doc = "Event 2 Service request selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum E2sr { +pub enum E2SR_A { #[doc = "0: Forward to CC8ySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Forward to CCvySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Forward to CC8ySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Forward to CC8ySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: E2sr) -> Self { + fn from(variant: E2SR_A) -> Self { variant as _ } } -impl crate::FieldSpec for E2sr { +impl crate::FieldSpec for E2SR_A { type Ux = u8; } -impl crate::IsEnum for E2sr {} +impl crate::IsEnum for E2SR_A {} #[doc = "Field `E2SR` reader - Event 2 Service request selector"] -pub type E2srR = crate::FieldReader; -impl E2srR { +pub type E2SR_R = crate::FieldReader; +impl E2SR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> E2sr { + pub const fn variant(&self) -> E2SR_A { match self.bits { - 0 => E2sr::Value1, - 1 => E2sr::Value2, - 2 => E2sr::Value3, - 3 => E2sr::Value4, + 0 => E2SR_A::VALUE1, + 1 => E2SR_A::VALUE2, + 2 => E2SR_A::VALUE3, + 3 => E2SR_A::VALUE4, _ => unreachable!(), } } #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == E2sr::Value1 + *self == E2SR_A::VALUE1 } #[doc = "Forward to CCvySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == E2sr::Value2 + *self == E2SR_A::VALUE2 } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == E2sr::Value3 + *self == E2SR_A::VALUE3 } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == E2sr::Value4 + *self == E2SR_A::VALUE4 } } #[doc = "Field `E2SR` writer - Event 2 Service request selector"] -pub type E2srW<'a, REG> = crate::FieldWriter<'a, REG, 2, E2sr, crate::Safe>; -impl<'a, REG> E2srW<'a, REG> +pub type E2SR_W<'a, REG> = crate::FieldWriter<'a, REG, 2, E2SR_A, crate::Safe>; +impl<'a, REG> E2SR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,108 +500,108 @@ where #[doc = "Forward to CC8ySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(E2sr::Value1) + self.variant(E2SR_A::VALUE1) } #[doc = "Forward to CCvySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(E2sr::Value2) + self.variant(E2SR_A::VALUE2) } #[doc = "Forward to CC8ySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(E2sr::Value3) + self.variant(E2SR_A::VALUE3) } #[doc = "Forward to CC8ySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(E2sr::Value4) + self.variant(E2SR_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - pub fn posr(&self) -> PosrR { - PosrR::new((self.bits & 3) as u8) + pub fn posr(&self) -> POSR_R { + POSR_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"] #[inline(always)] - pub fn cm1sr(&self) -> Cm1srR { - Cm1srR::new(((self.bits >> 2) & 3) as u8) + pub fn cm1sr(&self) -> CM1SR_R { + CM1SR_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"] #[inline(always)] - pub fn cm2sr(&self) -> Cm2srR { - Cm2srR::new(((self.bits >> 4) & 3) as u8) + pub fn cm2sr(&self) -> CM2SR_R { + CM2SR_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - pub fn e0sr(&self) -> E0srR { - E0srR::new(((self.bits >> 8) & 3) as u8) + pub fn e0sr(&self) -> E0SR_R { + E0SR_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - pub fn e1sr(&self) -> E1srR { - E1srR::new(((self.bits >> 10) & 3) as u8) + pub fn e1sr(&self) -> E1SR_R { + E1SR_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - pub fn e2sr(&self) -> E2srR { - E2srR::new(((self.bits >> 12) & 3) as u8) + pub fn e2sr(&self) -> E2SR_R { + E2SR_R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] #[must_use] - pub fn posr(&mut self) -> PosrW { - PosrW::new(self, 0) + pub fn posr(&mut self) -> POSR_W { + POSR_W::new(self, 0) } #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cm1sr(&mut self) -> Cm1srW { - Cm1srW::new(self, 2) + pub fn cm1sr(&mut self) -> CM1SR_W { + CM1SR_W::new(self, 2) } #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"] #[inline(always)] #[must_use] - pub fn cm2sr(&mut self) -> Cm2srW { - Cm2srW::new(self, 4) + pub fn cm2sr(&mut self) -> CM2SR_W { + CM2SR_W::new(self, 4) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] #[must_use] - pub fn e0sr(&mut self) -> E0srW { - E0srW::new(self, 8) + pub fn e0sr(&mut self) -> E0SR_W { + E0SR_W::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] #[must_use] - pub fn e1sr(&mut self) -> E1srW { - E1srW::new(self, 10) + pub fn e1sr(&mut self) -> E1SR_W { + E1SR_W::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] #[must_use] - pub fn e2sr(&mut self) -> E2srW { - E2srW::new(self, 12) + pub fn e2sr(&mut self) -> E2SR_W { + E2SR_W::new(self, 12) } } #[doc = "Service Request Selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrsSpec; -impl crate::RegisterSpec for SrsSpec { +pub struct SRS_SPEC; +impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srs::R`](R) reader structure"] -impl crate::Readable for SrsSpec {} +impl crate::Readable for SRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`srs::W`](W) writer structure"] -impl crate::Writable for SrsSpec { +impl crate::Writable for SRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRS to value 0"] -impl crate::Resettable for SrsSpec { +impl crate::Resettable for SRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/stc.rs b/src/ccu80_cc80/stc.rs index 02ac95e8..5bc28c63 100644 --- a/src/ccu80_cc80/stc.rs +++ b/src/ccu80_cc80/stc.rs @@ -1,113 +1,113 @@ #[doc = "Register `STC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Cascaded shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cse { +pub enum CSE_A { #[doc = "0: Cascaded shadow transfer disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Cascaded shadow transfer enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cse) -> Self { + fn from(variant: CSE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSE` reader - Cascaded shadow transfer enable"] -pub type CseR = crate::BitReader; -impl CseR { +pub type CSE_R = crate::BitReader; +impl CSE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cse { + pub const fn variant(&self) -> CSE_A { match self.bits { - false => Cse::Value1, - true => Cse::Value2, + false => CSE_A::VALUE1, + true => CSE_A::VALUE2, } } #[doc = "Cascaded shadow transfer disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cse::Value1 + *self == CSE_A::VALUE1 } #[doc = "Cascaded shadow transfer enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cse::Value2 + *self == CSE_A::VALUE2 } } #[doc = "Field `CSE` writer - Cascaded shadow transfer enable"] -pub type CseW<'a, REG> = crate::BitWriter<'a, REG, Cse>; -impl<'a, REG> CseW<'a, REG> +pub type CSE_W<'a, REG> = crate::BitWriter<'a, REG, CSE_A>; +impl<'a, REG> CSE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Cascaded shadow transfer disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cse::Value1) + self.variant(CSE_A::VALUE1) } #[doc = "Cascaded shadow transfer enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cse::Value2) + self.variant(CSE_A::VALUE2) } } #[doc = "Shadow transfer mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stm { +pub enum STM_A { #[doc = "0: Shadow transfer is done in Period Match and One match."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer is done only in Period Match."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Shadow transfer is done only in One Match."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stm) -> Self { + fn from(variant: STM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stm { +impl crate::FieldSpec for STM_A { type Ux = u8; } -impl crate::IsEnum for Stm {} +impl crate::IsEnum for STM_A {} #[doc = "Field `STM` reader - Shadow transfer mode"] -pub type StmR = crate::FieldReader; -impl StmR { +pub type STM_R = crate::FieldReader; +impl STM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Stm::Value1), - 1 => Some(Stm::Value2), - 2 => Some(Stm::Value3), + 0 => Some(STM_A::VALUE1), + 1 => Some(STM_A::VALUE2), + 2 => Some(STM_A::VALUE3), _ => None, } } #[doc = "Shadow transfer is done in Period Match and One match."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stm::Value1 + *self == STM_A::VALUE1 } #[doc = "Shadow transfer is done only in Period Match."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stm::Value2 + *self == STM_A::VALUE2 } #[doc = "Shadow transfer is done only in One Match."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stm::Value3 + *self == STM_A::VALUE3 } } #[doc = "Field `STM` writer - Shadow transfer mode"] -pub type StmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stm>; -impl<'a, REG> StmW<'a, REG> +pub type STM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STM_A>; +impl<'a, REG> STM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -115,59 +115,59 @@ where #[doc = "Shadow transfer is done in Period Match and One match."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stm::Value1) + self.variant(STM_A::VALUE1) } #[doc = "Shadow transfer is done only in Period Match."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stm::Value2) + self.variant(STM_A::VALUE2) } #[doc = "Shadow transfer is done only in One Match."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stm::Value3) + self.variant(STM_A::VALUE3) } } impl R { #[doc = "Bit 0 - Cascaded shadow transfer enable"] #[inline(always)] - pub fn cse(&self) -> CseR { - CseR::new((self.bits & 1) != 0) + pub fn cse(&self) -> CSE_R { + CSE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Shadow transfer mode"] #[inline(always)] - pub fn stm(&self) -> StmR { - StmR::new(((self.bits >> 1) & 3) as u8) + pub fn stm(&self) -> STM_R { + STM_R::new(((self.bits >> 1) & 3) as u8) } } impl W { #[doc = "Bit 0 - Cascaded shadow transfer enable"] #[inline(always)] #[must_use] - pub fn cse(&mut self) -> CseW { - CseW::new(self, 0) + pub fn cse(&mut self) -> CSE_W { + CSE_W::new(self, 0) } #[doc = "Bits 1:2 - Shadow transfer mode"] #[inline(always)] #[must_use] - pub fn stm(&mut self) -> StmW { - StmW::new(self, 1) + pub fn stm(&mut self) -> STM_W { + STM_W::new(self, 1) } } #[doc = "Shadow transfer control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StcSpec; -impl crate::RegisterSpec for StcSpec { +pub struct STC_SPEC; +impl crate::RegisterSpec for STC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`stc::R`](R) reader structure"] -impl crate::Readable for StcSpec {} +impl crate::Readable for STC_SPEC {} #[doc = "`write(|w| ..)` method takes [`stc::W`](W) writer structure"] -impl crate::Writable for StcSpec { +impl crate::Writable for STC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STC to value 0"] -impl crate::Resettable for StcSpec { +impl crate::Resettable for STC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/swr.rs b/src/ccu80_cc80/swr.rs index 2fd7193f..17b82c33 100644 --- a/src/ccu80_cc80/swr.rs +++ b/src/ccu80_cc80/swr.rs @@ -1,99 +1,99 @@ #[doc = "Register `SWR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPM` writer - Period match while counting up clear"] -pub type RpmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ROM` writer - One match while counting down clear"] -pub type RomW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ROM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM1U` writer - Channel 1 Compare match while counting up clear"] -pub type Rcm1uW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCM1U_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM1D` writer - Channel 1 Compare match while counting down clear"] -pub type Rcm1dW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCM1D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM2U` writer - Channel 2 Compare match while counting up clear"] -pub type Rcm2uW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCM2U_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCM2D` writer - Channel 2 Compare match while counting down clear"] -pub type Rcm2dW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCM2D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE0A` writer - Event 0 detection clear"] -pub type Re0aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE0A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE1A` writer - Event 1 detection clear"] -pub type Re1aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE1A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RE2A` writer - Event 2 detection clear"] -pub type Re2aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RE2A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RTRPF` writer - Trap Flag status clear"] -pub type RtrpfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] #[must_use] - pub fn rpm(&mut self) -> RpmW { - RpmW::new(self, 0) + pub fn rpm(&mut self) -> RPM_W { + RPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] #[must_use] - pub fn rom(&mut self) -> RomW { - RomW::new(self, 1) + pub fn rom(&mut self) -> ROM_W { + ROM_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcm1u(&mut self) -> Rcm1uW { - Rcm1uW::new(self, 2) + pub fn rcm1u(&mut self) -> RCM1U_W { + RCM1U_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcm1d(&mut self) -> Rcm1dW { - Rcm1dW::new(self, 3) + pub fn rcm1d(&mut self) -> RCM1D_W { + RCM1D_W::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up clear"] #[inline(always)] #[must_use] - pub fn rcm2u(&mut self) -> Rcm2uW { - Rcm2uW::new(self, 4) + pub fn rcm2u(&mut self) -> RCM2U_W { + RCM2U_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down clear"] #[inline(always)] #[must_use] - pub fn rcm2d(&mut self) -> Rcm2dW { - Rcm2dW::new(self, 5) + pub fn rcm2d(&mut self) -> RCM2D_W { + RCM2D_W::new(self, 5) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] #[must_use] - pub fn re0a(&mut self) -> Re0aW { - Re0aW::new(self, 8) + pub fn re0a(&mut self) -> RE0A_W { + RE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] #[must_use] - pub fn re1a(&mut self) -> Re1aW { - Re1aW::new(self, 9) + pub fn re1a(&mut self) -> RE1A_W { + RE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] #[must_use] - pub fn re2a(&mut self) -> Re2aW { - Re2aW::new(self, 10) + pub fn re2a(&mut self) -> RE2A_W { + RE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] #[must_use] - pub fn rtrpf(&mut self) -> RtrpfW { - RtrpfW::new(self, 11) + pub fn rtrpf(&mut self) -> RTRPF_W { + RTRPF_W::new(self, 11) } } #[doc = "Interrupt Status Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwrSpec; -impl crate::RegisterSpec for SwrSpec { +pub struct SWR_SPEC; +impl crate::RegisterSpec for SWR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`swr::W`](W) writer structure"] -impl crate::Writable for SwrSpec { +impl crate::Writable for SWR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWR to value 0"] -impl crate::Resettable for SwrSpec { +impl crate::Resettable for SWR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/sws.rs b/src/ccu80_cc80/sws.rs index f84dfd9f..ab2bc72c 100644 --- a/src/ccu80_cc80/sws.rs +++ b/src/ccu80_cc80/sws.rs @@ -1,99 +1,99 @@ #[doc = "Register `SWS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SPM` writer - Period match while counting up set"] -pub type SpmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SOM` writer - One match while counting down set"] -pub type SomW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SOM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM1U` writer - Channel 1 Compare match while counting up set"] -pub type Scm1uW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCM1U_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM1D` writer - Channel 1 Compare match while counting down set"] -pub type Scm1dW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCM1D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM2U` writer - Compare match while counting up set"] -pub type Scm2uW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCM2U_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCM2D` writer - Compare match while counting down set"] -pub type Scm2dW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCM2D_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE0A` writer - Event 0 detection set"] -pub type Se0aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE0A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE1A` writer - Event 1 detection set"] -pub type Se1aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE1A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SE2A` writer - Event 2 detection set"] -pub type Se2aW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SE2A_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRPF` writer - Trap Flag status set"] -pub type StrpfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] #[must_use] - pub fn spm(&mut self) -> SpmW { - SpmW::new(self, 0) + pub fn spm(&mut self) -> SPM_W { + SPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] #[must_use] - pub fn som(&mut self) -> SomW { - SomW::new(self, 1) + pub fn som(&mut self) -> SOM_W { + SOM_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scm1u(&mut self) -> Scm1uW { - Scm1uW::new(self, 2) + pub fn scm1u(&mut self) -> SCM1U_W { + SCM1U_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scm1d(&mut self) -> Scm1dW { - Scm1dW::new(self, 3) + pub fn scm1d(&mut self) -> SCM1D_W { + SCM1D_W::new(self, 3) } #[doc = "Bit 4 - Compare match while counting up set"] #[inline(always)] #[must_use] - pub fn scm2u(&mut self) -> Scm2uW { - Scm2uW::new(self, 4) + pub fn scm2u(&mut self) -> SCM2U_W { + SCM2U_W::new(self, 4) } #[doc = "Bit 5 - Compare match while counting down set"] #[inline(always)] #[must_use] - pub fn scm2d(&mut self) -> Scm2dW { - Scm2dW::new(self, 5) + pub fn scm2d(&mut self) -> SCM2D_W { + SCM2D_W::new(self, 5) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] #[must_use] - pub fn se0a(&mut self) -> Se0aW { - Se0aW::new(self, 8) + pub fn se0a(&mut self) -> SE0A_W { + SE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] #[must_use] - pub fn se1a(&mut self) -> Se1aW { - Se1aW::new(self, 9) + pub fn se1a(&mut self) -> SE1A_W { + SE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] #[must_use] - pub fn se2a(&mut self) -> Se2aW { - Se2aW::new(self, 10) + pub fn se2a(&mut self) -> SE2A_W { + SE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] #[must_use] - pub fn strpf(&mut self) -> StrpfW { - StrpfW::new(self, 11) + pub fn strpf(&mut self) -> STRPF_W { + STRPF_W::new(self, 11) } } #[doc = "Interrupt Status Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwsSpec; -impl crate::RegisterSpec for SwsSpec { +pub struct SWS_SPEC; +impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sws::W`](W) writer structure"] -impl crate::Writable for SwsSpec { +impl crate::Writable for SWS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWS to value 0"] -impl crate::Resettable for SwsSpec { +impl crate::Resettable for SWS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tc.rs b/src/ccu80_cc80/tc.rs index 0aa8437e..c29e4b9b 100644 --- a/src/ccu80_cc80/tc.rs +++ b/src/ccu80_cc80/tc.rs @@ -1,267 +1,267 @@ #[doc = "Register `TC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Timer Counting Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tcm { +pub enum TCM_A { #[doc = "0: Edge aligned mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Center aligned mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tcm) -> Self { + fn from(variant: TCM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TCM` reader - Timer Counting Mode"] -pub type TcmR = crate::BitReader; -impl TcmR { +pub type TCM_R = crate::BitReader; +impl TCM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tcm { + pub const fn variant(&self) -> TCM_A { match self.bits { - false => Tcm::Value1, - true => Tcm::Value2, + false => TCM_A::VALUE1, + true => TCM_A::VALUE2, } } #[doc = "Edge aligned mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tcm::Value1 + *self == TCM_A::VALUE1 } #[doc = "Center aligned mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tcm::Value2 + *self == TCM_A::VALUE2 } } #[doc = "Field `TCM` writer - Timer Counting Mode"] -pub type TcmW<'a, REG> = crate::BitWriter<'a, REG, Tcm>; -impl<'a, REG> TcmW<'a, REG> +pub type TCM_W<'a, REG> = crate::BitWriter<'a, REG, TCM_A>; +impl<'a, REG> TCM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Edge aligned mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tcm::Value1) + self.variant(TCM_A::VALUE1) } #[doc = "Center aligned mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tcm::Value2) + self.variant(TCM_A::VALUE2) } } #[doc = "Timer Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tssm { +pub enum TSSM_A { #[doc = "0: Single shot mode is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single shot mode is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tssm) -> Self { + fn from(variant: TSSM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSSM` reader - Timer Single Shot Mode"] -pub type TssmR = crate::BitReader; -impl TssmR { +pub type TSSM_R = crate::BitReader; +impl TSSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tssm { + pub const fn variant(&self) -> TSSM_A { match self.bits { - false => Tssm::Value1, - true => Tssm::Value2, + false => TSSM_A::VALUE1, + true => TSSM_A::VALUE2, } } #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tssm::Value1 + *self == TSSM_A::VALUE1 } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tssm::Value2 + *self == TSSM_A::VALUE2 } } #[doc = "Field `TSSM` writer - Timer Single Shot Mode"] -pub type TssmW<'a, REG> = crate::BitWriter<'a, REG, Tssm>; -impl<'a, REG> TssmW<'a, REG> +pub type TSSM_W<'a, REG> = crate::BitWriter<'a, REG, TSSM_A>; +impl<'a, REG> TSSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Single shot mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tssm::Value1) + self.variant(TSSM_A::VALUE1) } #[doc = "Single shot mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tssm::Value2) + self.variant(TSSM_A::VALUE2) } } #[doc = "Field `CLST` reader - Shadow Transfer on Clear"] -pub type ClstR = crate::BitReader; +pub type CLST_R = crate::BitReader; #[doc = "Field `CLST` writer - Shadow Transfer on Clear"] -pub type ClstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CLST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Capture Compare Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmod { +pub enum CMOD_A { #[doc = "0: Compare Mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture Mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmod) -> Self { + fn from(variant: CMOD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMOD` reader - Capture Compare Mode"] -pub type CmodR = crate::BitReader; -impl CmodR { +pub type CMOD_R = crate::BitReader; +impl CMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmod { + pub const fn variant(&self) -> CMOD_A { match self.bits { - false => Cmod::Value1, - true => Cmod::Value2, + false => CMOD_A::VALUE1, + true => CMOD_A::VALUE2, } } #[doc = "Compare Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmod::Value1 + *self == CMOD_A::VALUE1 } #[doc = "Capture Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmod::Value2 + *self == CMOD_A::VALUE2 } } #[doc = "Extended Capture Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ecm { +pub enum ECM_A { #[doc = "0: Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ecm) -> Self { + fn from(variant: ECM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ECM` reader - Extended Capture Mode"] -pub type EcmR = crate::BitReader; -impl EcmR { +pub type ECM_R = crate::BitReader; +impl ECM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ecm { + pub const fn variant(&self) -> ECM_A { match self.bits { - false => Ecm::Value1, - true => Ecm::Value2, + false => ECM_A::VALUE1, + true => ECM_A::VALUE2, } } #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ecm::Value1 + *self == ECM_A::VALUE1 } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ecm::Value2 + *self == ECM_A::VALUE2 } } #[doc = "Field `ECM` writer - Extended Capture Mode"] -pub type EcmW<'a, REG> = crate::BitWriter<'a, REG, Ecm>; -impl<'a, REG> EcmW<'a, REG> +pub type ECM_W<'a, REG> = crate::BitWriter<'a, REG, ECM_A>; +impl<'a, REG> ECM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Capture Mode. Clear of the Full Flag of each capture register is done by accessing the registers individually only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ecm::Value1) + self.variant(ECM_A::VALUE1) } #[doc = "Extended Capture Mode. Clear of the Full Flag of each capture register is done not only by accessing the individual registers but also by accessing the ECRDThis register holds the information related to the extended capture mode. register. When reading the ECRDThis register holds the information related to the extended capture mode. register, only the capture register register full flag pointed by the ECRDThis register holds the information related to the extended capture mode..VPTR is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ecm::Value2) + self.variant(ECM_A::VALUE2) } } #[doc = "Clear on Capture Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Capc { +pub enum CAPC_A { #[doc = "0: Timer is never cleared on a capture event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Timer is always cleared in a capture event."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Capc) -> Self { + fn from(variant: CAPC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Capc { +impl crate::FieldSpec for CAPC_A { type Ux = u8; } -impl crate::IsEnum for Capc {} +impl crate::IsEnum for CAPC_A {} #[doc = "Field `CAPC` reader - Clear on Capture Control"] -pub type CapcR = crate::FieldReader; -impl CapcR { +pub type CAPC_R = crate::FieldReader; +impl CAPC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Capc { + pub const fn variant(&self) -> CAPC_A { match self.bits { - 0 => Capc::Value1, - 1 => Capc::Value2, - 2 => Capc::Value3, - 3 => Capc::Value4, + 0 => CAPC_A::VALUE1, + 1 => CAPC_A::VALUE2, + 2 => CAPC_A::VALUE3, + 3 => CAPC_A::VALUE4, _ => unreachable!(), } } #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Capc::Value1 + *self == CAPC_A::VALUE1 } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Capc::Value2 + *self == CAPC_A::VALUE2 } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Capc::Value3 + *self == CAPC_A::VALUE3 } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Capc::Value4 + *self == CAPC_A::VALUE4 } } #[doc = "Field `CAPC` writer - Clear on Capture Control"] -pub type CapcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Capc, crate::Safe>; -impl<'a, REG> CapcW<'a, REG> +pub type CAPC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CAPC_A, crate::Safe>; +impl<'a, REG> CAPC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -269,130 +269,130 @@ where #[doc = "Timer is never cleared on a capture event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Capc::Value1) + self.variant(CAPC_A::VALUE1) } #[doc = "Timer is cleared on a capture event into capture registers 2 and 3. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Capc::Value2) + self.variant(CAPC_A::VALUE2) } #[doc = "Timer is cleared on a capture event into capture registers 0 and 1. (When SCE = 1#, Timer is always cleared in a capture event)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Capc::Value3) + self.variant(CAPC_A::VALUE3) } #[doc = "Timer is always cleared in a capture event."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Capc::Value4) + self.variant(CAPC_A::VALUE4) } } #[doc = "Timer Load selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tls { +pub enum TLS_A { #[doc = "0: Timer is loaded with the value of CR1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is loaded with the value of CR2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tls) -> Self { + fn from(variant: TLS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TLS` reader - Timer Load selector"] -pub type TlsR = crate::BitReader; -impl TlsR { +pub type TLS_R = crate::BitReader; +impl TLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tls { + pub const fn variant(&self) -> TLS_A { match self.bits { - false => Tls::Value1, - true => Tls::Value2, + false => TLS_A::VALUE1, + true => TLS_A::VALUE2, } } #[doc = "Timer is loaded with the value of CR1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tls::Value1 + *self == TLS_A::VALUE1 } #[doc = "Timer is loaded with the value of CR2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tls::Value2 + *self == TLS_A::VALUE2 } } #[doc = "Field `TLS` writer - Timer Load selector"] -pub type TlsW<'a, REG> = crate::BitWriter<'a, REG, Tls>; -impl<'a, REG> TlsW<'a, REG> +pub type TLS_W<'a, REG> = crate::BitWriter<'a, REG, TLS_A>; +impl<'a, REG> TLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timer is loaded with the value of CR1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tls::Value1) + self.variant(TLS_A::VALUE1) } #[doc = "Timer is loaded with the value of CR2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tls::Value2) + self.variant(TLS_A::VALUE2) } } #[doc = "Extended Stop Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Endm { +pub enum ENDM_A { #[doc = "0: Clears the timer run bit only (default stop)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clears the timer only (flush)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clears the timer and run bit (flush/stop)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Endm) -> Self { + fn from(variant: ENDM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Endm { +impl crate::FieldSpec for ENDM_A { type Ux = u8; } -impl crate::IsEnum for Endm {} +impl crate::IsEnum for ENDM_A {} #[doc = "Field `ENDM` reader - Extended Stop Function Control"] -pub type EndmR = crate::FieldReader; -impl EndmR { +pub type ENDM_R = crate::FieldReader; +impl ENDM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Endm::Value1), - 1 => Some(Endm::Value2), - 2 => Some(Endm::Value3), + 0 => Some(ENDM_A::VALUE1), + 1 => Some(ENDM_A::VALUE2), + 2 => Some(ENDM_A::VALUE3), _ => None, } } #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Endm::Value1 + *self == ENDM_A::VALUE1 } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Endm::Value2 + *self == ENDM_A::VALUE2 } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Endm::Value3 + *self == ENDM_A::VALUE3 } } #[doc = "Field `ENDM` writer - Extended Stop Function Control"] -pub type EndmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Endm>; -impl<'a, REG> EndmW<'a, REG> +pub type ENDM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENDM_A>; +impl<'a, REG> ENDM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -400,239 +400,239 @@ where #[doc = "Clears the timer run bit only (default stop)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Endm::Value1) + self.variant(ENDM_A::VALUE1) } #[doc = "Clears the timer only (flush)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Endm::Value2) + self.variant(ENDM_A::VALUE2) } #[doc = "Clears the timer and run bit (flush/stop)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Endm::Value3) + self.variant(ENDM_A::VALUE3) } } #[doc = "Extended Start Function Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Strm { +pub enum STRM_A { #[doc = "0: Sets run bit only (default start)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clears the timer and sets run bit, if not set (flush/start)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Strm) -> Self { + fn from(variant: STRM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STRM` reader - Extended Start Function Control"] -pub type StrmR = crate::BitReader; -impl StrmR { +pub type STRM_R = crate::BitReader; +impl STRM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Strm { + pub const fn variant(&self) -> STRM_A { match self.bits { - false => Strm::Value1, - true => Strm::Value2, + false => STRM_A::VALUE1, + true => STRM_A::VALUE2, } } #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Strm::Value1 + *self == STRM_A::VALUE1 } #[doc = "Clears the timer and sets run bit, if not set (flush/start)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Strm::Value2 + *self == STRM_A::VALUE2 } } #[doc = "Field `STRM` writer - Extended Start Function Control"] -pub type StrmW<'a, REG> = crate::BitWriter<'a, REG, Strm>; -impl<'a, REG> StrmW<'a, REG> +pub type STRM_W<'a, REG> = crate::BitWriter<'a, REG, STRM_A>; +impl<'a, REG> STRM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sets run bit only (default start)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Strm::Value1) + self.variant(STRM_A::VALUE1) } #[doc = "Clears the timer and sets run bit, if not set (flush/start)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Strm::Value2) + self.variant(STRM_A::VALUE2) } } #[doc = "Equal Capture Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sce { +pub enum SCE_A { #[doc = "0: Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sce) -> Self { + fn from(variant: SCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCE` reader - Equal Capture Event enable"] -pub type SceR = crate::BitReader; -impl SceR { +pub type SCE_R = crate::BitReader; +impl SCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sce { + pub const fn variant(&self) -> SCE_A { match self.bits { - false => Sce::Value1, - true => Sce::Value2, + false => SCE_A::VALUE1, + true => SCE_A::VALUE2, } } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sce::Value1 + *self == SCE_A::VALUE1 } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sce::Value2 + *self == SCE_A::VALUE2 } } #[doc = "Field `SCE` writer - Equal Capture Event enable"] -pub type SceW<'a, REG> = crate::BitWriter<'a, REG, Sce>; -impl<'a, REG> SceW<'a, REG> +pub type SCE_W<'a, REG> = crate::BitWriter<'a, REG, SCE_A>; +impl<'a, REG> SCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. registers control by CCycapt0 and capture into CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sce::Value1) + self.variant(SCE_A::VALUE1) } #[doc = "Capture into CC8yC0VThis register contains the values associated with the Capture 0 field./CC8yC1VThis register contains the values associated with the Capture 1 field. and CC8yC3VThis register contains the values associated with the Capture 3 field./CC8yC2VThis register contains the values associated with the Capture 2 field. control by CCycapt1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sce::Value2) + self.variant(SCE_A::VALUE2) } } #[doc = "Continuous Capture Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccs { +pub enum CCS_A { #[doc = "0: The capture into a specific capture register is done with the rules linked with the full flags, described at ."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccs) -> Self { + fn from(variant: CCS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCS` reader - Continuous Capture Enable"] -pub type CcsR = crate::BitReader; -impl CcsR { +pub type CCS_R = crate::BitReader; +impl CCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccs { + pub const fn variant(&self) -> CCS_A { match self.bits { - false => Ccs::Value1, - true => Ccs::Value2, + false => CCS_A::VALUE1, + true => CCS_A::VALUE2, } } #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccs::Value1 + *self == CCS_A::VALUE1 } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccs::Value2 + *self == CCS_A::VALUE2 } } #[doc = "Field `CCS` writer - Continuous Capture Enable"] -pub type CcsW<'a, REG> = crate::BitWriter<'a, REG, Ccs>; -impl<'a, REG> CcsW<'a, REG> +pub type CCS_W<'a, REG> = crate::BitWriter<'a, REG, CCS_A>; +impl<'a, REG> CCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The capture into a specific capture register is done with the rules linked with the full flags, described at ."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccs::Value1) + self.variant(CCS_A::VALUE1) } #[doc = "The capture into the capture registers is always done regardless of the full flag status (even if the register has not been read back)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccs::Value2) + self.variant(CCS_A::VALUE2) } } #[doc = "Dither Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dithe { +pub enum DITHE_A { #[doc = "0: Dither is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dither is applied to the Period"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Dither is applied to the Compare"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Dither is applied to the Period and Compare"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dithe) -> Self { + fn from(variant: DITHE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dithe { +impl crate::FieldSpec for DITHE_A { type Ux = u8; } -impl crate::IsEnum for Dithe {} +impl crate::IsEnum for DITHE_A {} #[doc = "Field `DITHE` reader - Dither Enable"] -pub type DitheR = crate::FieldReader; -impl DitheR { +pub type DITHE_R = crate::FieldReader; +impl DITHE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dithe { + pub const fn variant(&self) -> DITHE_A { match self.bits { - 0 => Dithe::Value1, - 1 => Dithe::Value2, - 2 => Dithe::Value3, - 3 => Dithe::Value4, + 0 => DITHE_A::VALUE1, + 1 => DITHE_A::VALUE2, + 2 => DITHE_A::VALUE3, + 3 => DITHE_A::VALUE4, _ => unreachable!(), } } #[doc = "Dither is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dithe::Value1 + *self == DITHE_A::VALUE1 } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dithe::Value2 + *self == DITHE_A::VALUE2 } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dithe::Value3 + *self == DITHE_A::VALUE3 } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dithe::Value4 + *self == DITHE_A::VALUE4 } } #[doc = "Field `DITHE` writer - Dither Enable"] -pub type DitheW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dithe, crate::Safe>; -impl<'a, REG> DitheW<'a, REG> +pub type DITHE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DITHE_A, crate::Safe>; +impl<'a, REG> DITHE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -640,574 +640,574 @@ where #[doc = "Dither is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dithe::Value1) + self.variant(DITHE_A::VALUE1) } #[doc = "Dither is applied to the Period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dithe::Value2) + self.variant(DITHE_A::VALUE2) } #[doc = "Dither is applied to the Compare"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dithe::Value3) + self.variant(DITHE_A::VALUE3) } #[doc = "Dither is applied to the Period and Compare"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dithe::Value4) + self.variant(DITHE_A::VALUE4) } } #[doc = "Dither input selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dim { +pub enum DIM_A { #[doc = "0: Slice is using it own dither unit"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Slice is connected to the dither unit of slice 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dim) -> Self { + fn from(variant: DIM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIM` reader - Dither input selector"] -pub type DimR = crate::BitReader; -impl DimR { +pub type DIM_R = crate::BitReader; +impl DIM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dim { + pub const fn variant(&self) -> DIM_A { match self.bits { - false => Dim::Value1, - true => Dim::Value2, + false => DIM_A::VALUE1, + true => DIM_A::VALUE2, } } #[doc = "Slice is using it own dither unit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dim::Value1 + *self == DIM_A::VALUE1 } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dim::Value2 + *self == DIM_A::VALUE2 } } #[doc = "Field `DIM` writer - Dither input selector"] -pub type DimW<'a, REG> = crate::BitWriter<'a, REG, Dim>; -impl<'a, REG> DimW<'a, REG> +pub type DIM_W<'a, REG> = crate::BitWriter<'a, REG, DIM_A>; +impl<'a, REG> DIM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Slice is using it own dither unit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dim::Value1) + self.variant(DIM_A::VALUE1) } #[doc = "Slice is connected to the dither unit of slice 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dim::Value2) + self.variant(DIM_A::VALUE2) } } #[doc = "Floating Prescaler enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fpe { +pub enum FPE_A { #[doc = "0: Floating prescaler mode is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Floating prescaler mode is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fpe) -> Self { + fn from(variant: FPE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FPE` reader - Floating Prescaler enable"] -pub type FpeR = crate::BitReader; -impl FpeR { +pub type FPE_R = crate::BitReader; +impl FPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fpe { + pub const fn variant(&self) -> FPE_A { match self.bits { - false => Fpe::Value1, - true => Fpe::Value2, + false => FPE_A::VALUE1, + true => FPE_A::VALUE2, } } #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fpe::Value1 + *self == FPE_A::VALUE1 } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fpe::Value2 + *self == FPE_A::VALUE2 } } #[doc = "Field `FPE` writer - Floating Prescaler enable"] -pub type FpeW<'a, REG> = crate::BitWriter<'a, REG, Fpe>; -impl<'a, REG> FpeW<'a, REG> +pub type FPE_W<'a, REG> = crate::BitWriter<'a, REG, FPE_A>; +impl<'a, REG> FPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Floating prescaler mode is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fpe::Value1) + self.variant(FPE_A::VALUE1) } #[doc = "Floating prescaler mode is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fpe::Value2) + self.variant(FPE_A::VALUE2) } } #[doc = "TRAP enable for CCU8x.OUTy0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trape0 { +pub enum TRAPE0_A { #[doc = "0: TRAP functionality has no effect on the CCU8x.OUTy0 output"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP functionality affects the CCU8x.OUTy0 output"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trape0) -> Self { + fn from(variant: TRAPE0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRAPE0` reader - TRAP enable for CCU8x.OUTy0"] -pub type Trape0R = crate::BitReader; -impl Trape0R { +pub type TRAPE0_R = crate::BitReader; +impl TRAPE0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trape0 { + pub const fn variant(&self) -> TRAPE0_A { match self.bits { - false => Trape0::Value1, - true => Trape0::Value2, + false => TRAPE0_A::VALUE1, + true => TRAPE0_A::VALUE2, } } #[doc = "TRAP functionality has no effect on the CCU8x.OUTy0 output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trape0::Value1 + *self == TRAPE0_A::VALUE1 } #[doc = "TRAP functionality affects the CCU8x.OUTy0 output"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trape0::Value2 + *self == TRAPE0_A::VALUE2 } } #[doc = "Field `TRAPE0` writer - TRAP enable for CCU8x.OUTy0"] -pub type Trape0W<'a, REG> = crate::BitWriter<'a, REG, Trape0>; -impl<'a, REG> Trape0W<'a, REG> +pub type TRAPE0_W<'a, REG> = crate::BitWriter<'a, REG, TRAPE0_A>; +impl<'a, REG> TRAPE0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP functionality has no effect on the CCU8x.OUTy0 output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trape0::Value1) + self.variant(TRAPE0_A::VALUE1) } #[doc = "TRAP functionality affects the CCU8x.OUTy0 output"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trape0::Value2) + self.variant(TRAPE0_A::VALUE2) } } #[doc = "Field `TRAPE1` reader - TRAP enable for CCU8x.OUTy1"] -pub type Trape1R = crate::BitReader; +pub type TRAPE1_R = crate::BitReader; #[doc = "Field `TRAPE1` writer - TRAP enable for CCU8x.OUTy1"] -pub type Trape1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRAPE1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRAPE2` reader - TRAP enable for CCU8x.OUTy2"] -pub type Trape2R = crate::BitReader; +pub type TRAPE2_R = crate::BitReader; #[doc = "Field `TRAPE2` writer - TRAP enable for CCU8x.OUTy2"] -pub type Trape2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRAPE2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRAPE3` reader - TRAP enable for CCU8x.OUTy3"] -pub type Trape3R = crate::BitReader; +pub type TRAPE3_R = crate::BitReader; #[doc = "Field `TRAPE3` writer - TRAP enable for CCU8x.OUTy3"] -pub type Trape3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRAPE3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TRAP Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trpse { +pub enum TRPSE_A { #[doc = "0: Exiting from TRAP state isn't synchronized with the PWM signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Exiting from TRAP state is synchronized with the PWM signal"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trpse) -> Self { + fn from(variant: TRPSE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRPSE` reader - TRAP Synchronization Enable"] -pub type TrpseR = crate::BitReader; -impl TrpseR { +pub type TRPSE_R = crate::BitReader; +impl TRPSE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trpse { + pub const fn variant(&self) -> TRPSE_A { match self.bits { - false => Trpse::Value1, - true => Trpse::Value2, + false => TRPSE_A::VALUE1, + true => TRPSE_A::VALUE2, } } #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trpse::Value1 + *self == TRPSE_A::VALUE1 } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trpse::Value2 + *self == TRPSE_A::VALUE2 } } #[doc = "Field `TRPSE` writer - TRAP Synchronization Enable"] -pub type TrpseW<'a, REG> = crate::BitWriter<'a, REG, Trpse>; -impl<'a, REG> TrpseW<'a, REG> +pub type TRPSE_W<'a, REG> = crate::BitWriter<'a, REG, TRPSE_A>; +impl<'a, REG> TRPSE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Exiting from TRAP state isn't synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trpse::Value1) + self.variant(TRPSE_A::VALUE1) } #[doc = "Exiting from TRAP state is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trpse::Value2) + self.variant(TRPSE_A::VALUE2) } } #[doc = "TRAP State Clear Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trpsw { +pub enum TRPSW_A { #[doc = "0: The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The TRAP state can only be exited by a SW request."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trpsw) -> Self { + fn from(variant: TRPSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRPSW` reader - TRAP State Clear Control"] -pub type TrpswR = crate::BitReader; -impl TrpswR { +pub type TRPSW_R = crate::BitReader; +impl TRPSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trpsw { + pub const fn variant(&self) -> TRPSW_A { match self.bits { - false => Trpsw::Value1, - true => Trpsw::Value2, + false => TRPSW_A::VALUE1, + true => TRPSW_A::VALUE2, } } #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trpsw::Value1 + *self == TRPSW_A::VALUE1 } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trpsw::Value2 + *self == TRPSW_A::VALUE2 } } #[doc = "Field `TRPSW` writer - TRAP State Clear Control"] -pub type TrpswW<'a, REG> = crate::BitWriter<'a, REG, Trpsw>; -impl<'a, REG> TrpswW<'a, REG> +pub type TRPSW_W<'a, REG> = crate::BitWriter<'a, REG, TRPSW_A>; +impl<'a, REG> TRPSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slice exits the TRAP state automatically when the TRAP condition is not present (Trap state cleared by HW and SW)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trpsw::Value1) + self.variant(TRPSW_A::VALUE1) } #[doc = "The TRAP state can only be exited by a SW request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trpsw::Value2) + self.variant(TRPSW_A::VALUE2) } } #[doc = "External Modulation Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ems { +pub enum EMS_A { #[doc = "0: External Modulation functionality is not synchronized with the PWM signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Modulation functionality is synchronized with the PWM signal"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ems) -> Self { + fn from(variant: EMS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMS` reader - External Modulation Synchronization"] -pub type EmsR = crate::BitReader; -impl EmsR { +pub type EMS_R = crate::BitReader; +impl EMS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ems { + pub const fn variant(&self) -> EMS_A { match self.bits { - false => Ems::Value1, - true => Ems::Value2, + false => EMS_A::VALUE1, + true => EMS_A::VALUE2, } } #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ems::Value1 + *self == EMS_A::VALUE1 } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ems::Value2 + *self == EMS_A::VALUE2 } } #[doc = "Field `EMS` writer - External Modulation Synchronization"] -pub type EmsW<'a, REG> = crate::BitWriter<'a, REG, Ems>; -impl<'a, REG> EmsW<'a, REG> +pub type EMS_W<'a, REG> = crate::BitWriter<'a, REG, EMS_A>; +impl<'a, REG> EMS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is not synchronized with the PWM signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ems::Value1) + self.variant(EMS_A::VALUE1) } #[doc = "External Modulation functionality is synchronized with the PWM signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ems::Value2) + self.variant(EMS_A::VALUE2) } } #[doc = "External Modulation Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emt { +pub enum EMT_A { #[doc = "0: External Modulation functionality is clearing the CC8ySTx bits."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Modulation functionality is gating the outputs."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emt) -> Self { + fn from(variant: EMT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMT` reader - External Modulation Type"] -pub type EmtR = crate::BitReader; -impl EmtR { +pub type EMT_R = crate::BitReader; +impl EMT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emt { + pub const fn variant(&self) -> EMT_A { match self.bits { - false => Emt::Value1, - true => Emt::Value2, + false => EMT_A::VALUE1, + true => EMT_A::VALUE2, } } #[doc = "External Modulation functionality is clearing the CC8ySTx bits."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emt::Value1 + *self == EMT_A::VALUE1 } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emt::Value2 + *self == EMT_A::VALUE2 } } #[doc = "Field `EMT` writer - External Modulation Type"] -pub type EmtW<'a, REG> = crate::BitWriter<'a, REG, Emt>; -impl<'a, REG> EmtW<'a, REG> +pub type EMT_W<'a, REG> = crate::BitWriter<'a, REG, EMT_A>; +impl<'a, REG> EMT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External Modulation functionality is clearing the CC8ySTx bits."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emt::Value1) + self.variant(EMT_A::VALUE1) } #[doc = "External Modulation functionality is gating the outputs."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emt::Value2) + self.variant(EMT_A::VALUE2) } } #[doc = "Multi Channel Mode Enable for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcme1 { +pub enum MCME1_A { #[doc = "0: Multi Channel Mode in Channel 1 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Multi Channel Mode in Channel 1 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcme1) -> Self { + fn from(variant: MCME1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCME1` reader - Multi Channel Mode Enable for Channel 1"] -pub type Mcme1R = crate::BitReader; -impl Mcme1R { +pub type MCME1_R = crate::BitReader; +impl MCME1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcme1 { + pub const fn variant(&self) -> MCME1_A { match self.bits { - false => Mcme1::Value1, - true => Mcme1::Value2, + false => MCME1_A::VALUE1, + true => MCME1_A::VALUE2, } } #[doc = "Multi Channel Mode in Channel 1 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcme1::Value1 + *self == MCME1_A::VALUE1 } #[doc = "Multi Channel Mode in Channel 1 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcme1::Value2 + *self == MCME1_A::VALUE2 } } #[doc = "Field `MCME1` writer - Multi Channel Mode Enable for Channel 1"] -pub type Mcme1W<'a, REG> = crate::BitWriter<'a, REG, Mcme1>; -impl<'a, REG> Mcme1W<'a, REG> +pub type MCME1_W<'a, REG> = crate::BitWriter<'a, REG, MCME1_A>; +impl<'a, REG> MCME1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode in Channel 1 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcme1::Value1) + self.variant(MCME1_A::VALUE1) } #[doc = "Multi Channel Mode in Channel 1 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcme1::Value2) + self.variant(MCME1_A::VALUE2) } } #[doc = "Multi Channel Mode Enable for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcme2 { +pub enum MCME2_A { #[doc = "0: Multi Channel Mode in Channel 2 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Multi Channel Mode in Channel 2 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcme2) -> Self { + fn from(variant: MCME2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCME2` reader - Multi Channel Mode Enable for Channel 2"] -pub type Mcme2R = crate::BitReader; -impl Mcme2R { +pub type MCME2_R = crate::BitReader; +impl MCME2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcme2 { + pub const fn variant(&self) -> MCME2_A { match self.bits { - false => Mcme2::Value1, - true => Mcme2::Value2, + false => MCME2_A::VALUE1, + true => MCME2_A::VALUE2, } } #[doc = "Multi Channel Mode in Channel 2 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcme2::Value1 + *self == MCME2_A::VALUE1 } #[doc = "Multi Channel Mode in Channel 2 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcme2::Value2 + *self == MCME2_A::VALUE2 } } #[doc = "Field `MCME2` writer - Multi Channel Mode Enable for Channel 2"] -pub type Mcme2W<'a, REG> = crate::BitWriter<'a, REG, Mcme2>; -impl<'a, REG> Mcme2W<'a, REG> +pub type MCME2_W<'a, REG> = crate::BitWriter<'a, REG, MCME2_A>; +impl<'a, REG> MCME2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi Channel Mode in Channel 2 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcme2::Value1) + self.variant(MCME2_A::VALUE1) } #[doc = "Multi Channel Mode in Channel 2 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcme2::Value2) + self.variant(MCME2_A::VALUE2) } } #[doc = "External Modulation Channel enable\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Eme { +pub enum EME_A { #[doc = "0: External Modulation functionality doesn't affect any channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External Modulation only applied on channel 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Modulation only applied on channel 2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: External Modulation applied on both channels"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Eme) -> Self { + fn from(variant: EME_A) -> Self { variant as _ } } -impl crate::FieldSpec for Eme { +impl crate::FieldSpec for EME_A { type Ux = u8; } -impl crate::IsEnum for Eme {} +impl crate::IsEnum for EME_A {} #[doc = "Field `EME` reader - External Modulation Channel enable"] -pub type EmeR = crate::FieldReader; -impl EmeR { +pub type EME_R = crate::FieldReader; +impl EME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eme { + pub const fn variant(&self) -> EME_A { match self.bits { - 0 => Eme::Value1, - 1 => Eme::Value2, - 2 => Eme::Value3, - 3 => Eme::Value4, + 0 => EME_A::VALUE1, + 1 => EME_A::VALUE2, + 2 => EME_A::VALUE3, + 3 => EME_A::VALUE4, _ => unreachable!(), } } #[doc = "External Modulation functionality doesn't affect any channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eme::Value1 + *self == EME_A::VALUE1 } #[doc = "External Modulation only applied on channel 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eme::Value2 + *self == EME_A::VALUE2 } #[doc = "External Modulation only applied on channel 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Eme::Value3 + *self == EME_A::VALUE3 } #[doc = "External Modulation applied on both channels"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Eme::Value4 + *self == EME_A::VALUE4 } } #[doc = "Field `EME` writer - External Modulation Channel enable"] -pub type EmeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Eme, crate::Safe>; -impl<'a, REG> EmeW<'a, REG> +pub type EME_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EME_A, crate::Safe>; +impl<'a, REG> EME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1215,77 +1215,77 @@ where #[doc = "External Modulation functionality doesn't affect any channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eme::Value1) + self.variant(EME_A::VALUE1) } #[doc = "External Modulation only applied on channel 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eme::Value2) + self.variant(EME_A::VALUE2) } #[doc = "External Modulation only applied on channel 2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Eme::Value3) + self.variant(EME_A::VALUE3) } #[doc = "External Modulation applied on both channels"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Eme::Value4) + self.variant(EME_A::VALUE4) } } #[doc = "Status bit output selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stos { +pub enum STOS_A { #[doc = "0: CC8yST1 forward to CCU8x.STy"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CC8yST2 forward to CCU8x.STy"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CC8yST1 AND CC8yST2 forward to CCU8x.STy"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stos) -> Self { + fn from(variant: STOS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stos { +impl crate::FieldSpec for STOS_A { type Ux = u8; } -impl crate::IsEnum for Stos {} +impl crate::IsEnum for STOS_A {} #[doc = "Field `STOS` reader - Status bit output selector"] -pub type StosR = crate::FieldReader; -impl StosR { +pub type STOS_R = crate::FieldReader; +impl STOS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Stos::Value1), - 1 => Some(Stos::Value2), - 2 => Some(Stos::Value3), + 0 => Some(STOS_A::VALUE1), + 1 => Some(STOS_A::VALUE2), + 2 => Some(STOS_A::VALUE3), _ => None, } } #[doc = "CC8yST1 forward to CCU8x.STy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stos::Value1 + *self == STOS_A::VALUE1 } #[doc = "CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stos::Value2 + *self == STOS_A::VALUE2 } #[doc = "CC8yST1 AND CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stos::Value3 + *self == STOS_A::VALUE3 } } #[doc = "Field `STOS` writer - Status bit output selector"] -pub type StosW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stos>; -impl<'a, REG> StosW<'a, REG> +pub type STOS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STOS_A>; +impl<'a, REG> STOS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1293,317 +1293,317 @@ where #[doc = "CC8yST1 forward to CCU8x.STy"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stos::Value1) + self.variant(STOS_A::VALUE1) } #[doc = "CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stos::Value2) + self.variant(STOS_A::VALUE2) } #[doc = "CC8yST1 AND CC8yST2 forward to CCU8x.STy"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stos::Value3) + self.variant(STOS_A::VALUE3) } } impl R { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - pub fn tcm(&self) -> TcmR { - TcmR::new((self.bits & 1) != 0) + pub fn tcm(&self) -> TCM_R { + TCM_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - pub fn tssm(&self) -> TssmR { - TssmR::new(((self.bits >> 1) & 1) != 0) + pub fn tssm(&self) -> TSSM_R { + TSSM_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - pub fn clst(&self) -> ClstR { - ClstR::new(((self.bits >> 2) & 1) != 0) + pub fn clst(&self) -> CLST_R { + CLST_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Capture Compare Mode"] #[inline(always)] - pub fn cmod(&self) -> CmodR { - CmodR::new(((self.bits >> 3) & 1) != 0) + pub fn cmod(&self) -> CMOD_R { + CMOD_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - pub fn ecm(&self) -> EcmR { - EcmR::new(((self.bits >> 4) & 1) != 0) + pub fn ecm(&self) -> ECM_R { + ECM_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - pub fn capc(&self) -> CapcR { - CapcR::new(((self.bits >> 5) & 3) as u8) + pub fn capc(&self) -> CAPC_R { + CAPC_R::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bit 7 - Timer Load selector"] #[inline(always)] - pub fn tls(&self) -> TlsR { - TlsR::new(((self.bits >> 7) & 1) != 0) + pub fn tls(&self) -> TLS_R { + TLS_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - pub fn endm(&self) -> EndmR { - EndmR::new(((self.bits >> 8) & 3) as u8) + pub fn endm(&self) -> ENDM_R { + ENDM_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - pub fn strm(&self) -> StrmR { - StrmR::new(((self.bits >> 10) & 1) != 0) + pub fn strm(&self) -> STRM_R { + STRM_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - pub fn sce(&self) -> SceR { - SceR::new(((self.bits >> 11) & 1) != 0) + pub fn sce(&self) -> SCE_R { + SCE_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - pub fn ccs(&self) -> CcsR { - CcsR::new(((self.bits >> 12) & 1) != 0) + pub fn ccs(&self) -> CCS_R { + CCS_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - pub fn dithe(&self) -> DitheR { - DitheR::new(((self.bits >> 13) & 3) as u8) + pub fn dithe(&self) -> DITHE_R { + DITHE_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - pub fn dim(&self) -> DimR { - DimR::new(((self.bits >> 15) & 1) != 0) + pub fn dim(&self) -> DIM_R { + DIM_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - pub fn fpe(&self) -> FpeR { - FpeR::new(((self.bits >> 16) & 1) != 0) + pub fn fpe(&self) -> FPE_R { + FPE_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"] #[inline(always)] - pub fn trape0(&self) -> Trape0R { - Trape0R::new(((self.bits >> 17) & 1) != 0) + pub fn trape0(&self) -> TRAPE0_R { + TRAPE0_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"] #[inline(always)] - pub fn trape1(&self) -> Trape1R { - Trape1R::new(((self.bits >> 18) & 1) != 0) + pub fn trape1(&self) -> TRAPE1_R { + TRAPE1_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"] #[inline(always)] - pub fn trape2(&self) -> Trape2R { - Trape2R::new(((self.bits >> 19) & 1) != 0) + pub fn trape2(&self) -> TRAPE2_R { + TRAPE2_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"] #[inline(always)] - pub fn trape3(&self) -> Trape3R { - Trape3R::new(((self.bits >> 20) & 1) != 0) + pub fn trape3(&self) -> TRAPE3_R { + TRAPE3_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - pub fn trpse(&self) -> TrpseR { - TrpseR::new(((self.bits >> 21) & 1) != 0) + pub fn trpse(&self) -> TRPSE_R { + TRPSE_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - pub fn trpsw(&self) -> TrpswR { - TrpswR::new(((self.bits >> 22) & 1) != 0) + pub fn trpsw(&self) -> TRPSW_R { + TRPSW_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - pub fn ems(&self) -> EmsR { - EmsR::new(((self.bits >> 23) & 1) != 0) + pub fn ems(&self) -> EMS_R { + EMS_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - pub fn emt(&self) -> EmtR { - EmtR::new(((self.bits >> 24) & 1) != 0) + pub fn emt(&self) -> EMT_R { + EMT_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"] #[inline(always)] - pub fn mcme1(&self) -> Mcme1R { - Mcme1R::new(((self.bits >> 25) & 1) != 0) + pub fn mcme1(&self) -> MCME1_R { + MCME1_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"] #[inline(always)] - pub fn mcme2(&self) -> Mcme2R { - Mcme2R::new(((self.bits >> 26) & 1) != 0) + pub fn mcme2(&self) -> MCME2_R { + MCME2_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bits 27:28 - External Modulation Channel enable"] #[inline(always)] - pub fn eme(&self) -> EmeR { - EmeR::new(((self.bits >> 27) & 3) as u8) + pub fn eme(&self) -> EME_R { + EME_R::new(((self.bits >> 27) & 3) as u8) } #[doc = "Bits 29:30 - Status bit output selector"] #[inline(always)] - pub fn stos(&self) -> StosR { - StosR::new(((self.bits >> 29) & 3) as u8) + pub fn stos(&self) -> STOS_R { + STOS_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] #[must_use] - pub fn tcm(&mut self) -> TcmW { - TcmW::new(self, 0) + pub fn tcm(&mut self) -> TCM_W { + TCM_W::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tssm(&mut self) -> TssmW { - TssmW::new(self, 1) + pub fn tssm(&mut self) -> TSSM_W { + TSSM_W::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] #[must_use] - pub fn clst(&mut self) -> ClstW { - ClstW::new(self, 2) + pub fn clst(&mut self) -> CLST_W { + CLST_W::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] #[must_use] - pub fn ecm(&mut self) -> EcmW { - EcmW::new(self, 4) + pub fn ecm(&mut self) -> ECM_W { + ECM_W::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] #[must_use] - pub fn capc(&mut self) -> CapcW { - CapcW::new(self, 5) + pub fn capc(&mut self) -> CAPC_W { + CAPC_W::new(self, 5) } #[doc = "Bit 7 - Timer Load selector"] #[inline(always)] #[must_use] - pub fn tls(&mut self) -> TlsW { - TlsW::new(self, 7) + pub fn tls(&mut self) -> TLS_W { + TLS_W::new(self, 7) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] #[must_use] - pub fn endm(&mut self) -> EndmW { - EndmW::new(self, 8) + pub fn endm(&mut self) -> ENDM_W { + ENDM_W::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] #[must_use] - pub fn strm(&mut self) -> StrmW { - StrmW::new(self, 10) + pub fn strm(&mut self) -> STRM_W { + STRM_W::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] #[must_use] - pub fn sce(&mut self) -> SceW { - SceW::new(self, 11) + pub fn sce(&mut self) -> SCE_W { + SCE_W::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] #[must_use] - pub fn ccs(&mut self) -> CcsW { - CcsW::new(self, 12) + pub fn ccs(&mut self) -> CCS_W { + CCS_W::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] #[must_use] - pub fn dithe(&mut self) -> DitheW { - DitheW::new(self, 13) + pub fn dithe(&mut self) -> DITHE_W { + DITHE_W::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] #[must_use] - pub fn dim(&mut self) -> DimW { - DimW::new(self, 15) + pub fn dim(&mut self) -> DIM_W { + DIM_W::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] #[must_use] - pub fn fpe(&mut self) -> FpeW { - FpeW::new(self, 16) + pub fn fpe(&mut self) -> FPE_W { + FPE_W::new(self, 16) } #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"] #[inline(always)] #[must_use] - pub fn trape0(&mut self) -> Trape0W { - Trape0W::new(self, 17) + pub fn trape0(&mut self) -> TRAPE0_W { + TRAPE0_W::new(self, 17) } #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"] #[inline(always)] #[must_use] - pub fn trape1(&mut self) -> Trape1W { - Trape1W::new(self, 18) + pub fn trape1(&mut self) -> TRAPE1_W { + TRAPE1_W::new(self, 18) } #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"] #[inline(always)] #[must_use] - pub fn trape2(&mut self) -> Trape2W { - Trape2W::new(self, 19) + pub fn trape2(&mut self) -> TRAPE2_W { + TRAPE2_W::new(self, 19) } #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"] #[inline(always)] #[must_use] - pub fn trape3(&mut self) -> Trape3W { - Trape3W::new(self, 20) + pub fn trape3(&mut self) -> TRAPE3_W { + TRAPE3_W::new(self, 20) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] #[must_use] - pub fn trpse(&mut self) -> TrpseW { - TrpseW::new(self, 21) + pub fn trpse(&mut self) -> TRPSE_W { + TRPSE_W::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] #[must_use] - pub fn trpsw(&mut self) -> TrpswW { - TrpswW::new(self, 22) + pub fn trpsw(&mut self) -> TRPSW_W { + TRPSW_W::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] #[must_use] - pub fn ems(&mut self) -> EmsW { - EmsW::new(self, 23) + pub fn ems(&mut self) -> EMS_W { + EMS_W::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] #[must_use] - pub fn emt(&mut self) -> EmtW { - EmtW::new(self, 24) + pub fn emt(&mut self) -> EMT_W { + EMT_W::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"] #[inline(always)] #[must_use] - pub fn mcme1(&mut self) -> Mcme1W { - Mcme1W::new(self, 25) + pub fn mcme1(&mut self) -> MCME1_W { + MCME1_W::new(self, 25) } #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"] #[inline(always)] #[must_use] - pub fn mcme2(&mut self) -> Mcme2W { - Mcme2W::new(self, 26) + pub fn mcme2(&mut self) -> MCME2_W { + MCME2_W::new(self, 26) } #[doc = "Bits 27:28 - External Modulation Channel enable"] #[inline(always)] #[must_use] - pub fn eme(&mut self) -> EmeW { - EmeW::new(self, 27) + pub fn eme(&mut self) -> EME_W { + EME_W::new(self, 27) } #[doc = "Bits 29:30 - Status bit output selector"] #[inline(always)] #[must_use] - pub fn stos(&mut self) -> StosW { - StosW::new(self, 29) + pub fn stos(&mut self) -> STOS_W { + STOS_W::new(self, 29) } } #[doc = "Slice Timer Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcSpec; -impl crate::RegisterSpec for TcSpec { +pub struct TC_SPEC; +impl crate::RegisterSpec for TC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tc::R`](R) reader structure"] -impl crate::Readable for TcSpec {} +impl crate::Readable for TC_SPEC {} #[doc = "`write(|w| ..)` method takes [`tc::W`](W) writer structure"] -impl crate::Writable for TcSpec { +impl crate::Writable for TC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TC to value 0x1800_0000"] -impl crate::Resettable for TcSpec { +impl crate::Resettable for TC_SPEC { const RESET_VALUE: u32 = 0x1800_0000; } diff --git a/src/ccu80_cc80/tcclr.rs b/src/ccu80_cc80/tcclr.rs index 6e5af6aa..af16fbee 100644 --- a/src/ccu80_cc80/tcclr.rs +++ b/src/ccu80_cc80/tcclr.rs @@ -1,59 +1,59 @@ #[doc = "Register `TCCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBC` writer - Timer Run Bit Clear"] -pub type TrbcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRBC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TCC` writer - Timer Clear"] -pub type TccW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TCC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DITC` writer - Dither Counter Clear"] -pub type DitcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTC1C` writer - Dead Time Counter 1 Clear"] -pub type Dtc1cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DTC1C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DTC2C` writer - Dead Time Counter 2 Clear"] -pub type Dtc2cW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DTC2C_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] #[must_use] - pub fn trbc(&mut self) -> TrbcW { - TrbcW::new(self, 0) + pub fn trbc(&mut self) -> TRBC_W { + TRBC_W::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] #[must_use] - pub fn tcc(&mut self) -> TccW { - TccW::new(self, 1) + pub fn tcc(&mut self) -> TCC_W { + TCC_W::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] #[must_use] - pub fn ditc(&mut self) -> DitcW { - DitcW::new(self, 2) + pub fn ditc(&mut self) -> DITC_W { + DITC_W::new(self, 2) } #[doc = "Bit 3 - Dead Time Counter 1 Clear"] #[inline(always)] #[must_use] - pub fn dtc1c(&mut self) -> Dtc1cW { - Dtc1cW::new(self, 3) + pub fn dtc1c(&mut self) -> DTC1C_W { + DTC1C_W::new(self, 3) } #[doc = "Bit 4 - Dead Time Counter 2 Clear"] #[inline(always)] #[must_use] - pub fn dtc2c(&mut self) -> Dtc2cW { - Dtc2cW::new(self, 4) + pub fn dtc2c(&mut self) -> DTC2C_W { + DTC2C_W::new(self, 4) } } #[doc = "Slice Timer Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcclrSpec; -impl crate::RegisterSpec for TcclrSpec { +pub struct TCCLR_SPEC; +impl crate::RegisterSpec for TCCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcclr::W`](W) writer structure"] -impl crate::Writable for TcclrSpec { +impl crate::Writable for TCCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCCLR to value 0"] -impl crate::Resettable for TcclrSpec { +impl crate::Resettable for TCCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tcset.rs b/src/ccu80_cc80/tcset.rs index 3338f548..3be8b0aa 100644 --- a/src/ccu80_cc80/tcset.rs +++ b/src/ccu80_cc80/tcset.rs @@ -1,27 +1,27 @@ #[doc = "Register `TCSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TRBS` writer - Timer Run Bit set"] -pub type TrbsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] #[must_use] - pub fn trbs(&mut self) -> TrbsW { - TrbsW::new(self, 0) + pub fn trbs(&mut self) -> TRBS_W { + TRBS_W::new(self, 0) } } #[doc = "Slice Timer Run Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcsetSpec; -impl crate::RegisterSpec for TcsetSpec { +pub struct TCSET_SPEC; +impl crate::RegisterSpec for TCSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`tcset::W`](W) writer structure"] -impl crate::Writable for TcsetSpec { +impl crate::Writable for TCSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSET to value 0"] -impl crate::Resettable for TcsetSpec { +impl crate::Resettable for TCSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/tcst.rs b/src/ccu80_cc80/tcst.rs index dcd2ca93..709c462a 100644 --- a/src/ccu80_cc80/tcst.rs +++ b/src/ccu80_cc80/tcst.rs @@ -1,179 +1,179 @@ #[doc = "Register `TCST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Timer Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trb { +pub enum TRB_A { #[doc = "0: Timer is stopped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trb) -> Self { + fn from(variant: TRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRB` reader - Timer Run Bit"] -pub type TrbR = crate::BitReader; -impl TrbR { +pub type TRB_R = crate::BitReader; +impl TRB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trb { + pub const fn variant(&self) -> TRB_A { match self.bits { - false => Trb::Value1, - true => Trb::Value2, + false => TRB_A::VALUE1, + true => TRB_A::VALUE2, } } #[doc = "Timer is stopped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trb::Value1 + *self == TRB_A::VALUE1 } #[doc = "Timer is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trb::Value2 + *self == TRB_A::VALUE2 } } #[doc = "Timer Counting Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cdir { +pub enum CDIR_A { #[doc = "0: Timer is counting up"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer is counting down"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cdir) -> Self { + fn from(variant: CDIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDIR` reader - Timer Counting Direction"] -pub type CdirR = crate::BitReader; -impl CdirR { +pub type CDIR_R = crate::BitReader; +impl CDIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cdir { + pub const fn variant(&self) -> CDIR_A { match self.bits { - false => Cdir::Value1, - true => Cdir::Value2, + false => CDIR_A::VALUE1, + true => CDIR_A::VALUE2, } } #[doc = "Timer is counting up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cdir::Value1 + *self == CDIR_A::VALUE1 } #[doc = "Timer is counting down"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cdir::Value2 + *self == CDIR_A::VALUE2 } } #[doc = "Dead Time Counter 1 Run bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dtr1 { +pub enum DTR1_A { #[doc = "0: Dead Time counter is idle"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time counter is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dtr1) -> Self { + fn from(variant: DTR1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTR1` reader - Dead Time Counter 1 Run bit"] -pub type Dtr1R = crate::BitReader; -impl Dtr1R { +pub type DTR1_R = crate::BitReader; +impl DTR1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dtr1 { + pub const fn variant(&self) -> DTR1_A { match self.bits { - false => Dtr1::Value1, - true => Dtr1::Value2, + false => DTR1_A::VALUE1, + true => DTR1_A::VALUE2, } } #[doc = "Dead Time counter is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dtr1::Value1 + *self == DTR1_A::VALUE1 } #[doc = "Dead Time counter is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dtr1::Value2 + *self == DTR1_A::VALUE2 } } #[doc = "Dead Time Counter 2 Run bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dtr2 { +pub enum DTR2_A { #[doc = "0: Dead Time counter is idle"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead Time counter is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dtr2) -> Self { + fn from(variant: DTR2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTR2` reader - Dead Time Counter 2 Run bit"] -pub type Dtr2R = crate::BitReader; -impl Dtr2R { +pub type DTR2_R = crate::BitReader; +impl DTR2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dtr2 { + pub const fn variant(&self) -> DTR2_A { match self.bits { - false => Dtr2::Value1, - true => Dtr2::Value2, + false => DTR2_A::VALUE1, + true => DTR2_A::VALUE2, } } #[doc = "Dead Time counter is idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dtr2::Value1 + *self == DTR2_A::VALUE1 } #[doc = "Dead Time counter is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dtr2::Value2 + *self == DTR2_A::VALUE2 } } impl R { #[doc = "Bit 0 - Timer Run Bit"] #[inline(always)] - pub fn trb(&self) -> TrbR { - TrbR::new((self.bits & 1) != 0) + pub fn trb(&self) -> TRB_R { + TRB_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Timer Counting Direction"] #[inline(always)] - pub fn cdir(&self) -> CdirR { - CdirR::new(((self.bits >> 1) & 1) != 0) + pub fn cdir(&self) -> CDIR_R { + CDIR_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Dead Time Counter 1 Run bit"] #[inline(always)] - pub fn dtr1(&self) -> Dtr1R { - Dtr1R::new(((self.bits >> 3) & 1) != 0) + pub fn dtr1(&self) -> DTR1_R { + DTR1_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Dead Time Counter 2 Run bit"] #[inline(always)] - pub fn dtr2(&self) -> Dtr2R { - Dtr2R::new(((self.bits >> 4) & 1) != 0) + pub fn dtr2(&self) -> DTR2_R { + DTR2_R::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Slice Timer Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcstSpec; -impl crate::RegisterSpec for TcstSpec { +pub struct TCST_SPEC; +impl crate::RegisterSpec for TCST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tcst::R`](R) reader structure"] -impl crate::Readable for TcstSpec {} +impl crate::Readable for TCST_SPEC {} #[doc = "`reset()` method sets TCST to value 0"] -impl crate::Resettable for TcstSpec { +impl crate::Resettable for TCST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ccu80_cc80/timer.rs b/src/ccu80_cc80/timer.rs index 68062f18..1c7ed7d0 100644 --- a/src/ccu80_cc80/timer.rs +++ b/src/ccu80_cc80/timer.rs @@ -1,40 +1,40 @@ #[doc = "Register `TIMER` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIMER` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TVAL` reader - Timer Value"] -pub type TvalR = crate::FieldReader; +pub type TVAL_R = crate::FieldReader; #[doc = "Field `TVAL` writer - Timer Value"] -pub type TvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - pub fn tval(&self) -> TvalR { - TvalR::new((self.bits & 0xffff) as u16) + pub fn tval(&self) -> TVAL_R { + TVAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] #[must_use] - pub fn tval(&mut self) -> TvalW { - TvalW::new(self, 0) + pub fn tval(&mut self) -> TVAL_W { + TVAL_W::new(self, 0) } } #[doc = "Timer Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timer::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timer::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TimerSpec; -impl crate::RegisterSpec for TimerSpec { +pub struct TIMER_SPEC; +impl crate::RegisterSpec for TIMER_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`timer::R`](R) reader structure"] -impl crate::Readable for TimerSpec {} +impl crate::Readable for TIMER_SPEC {} #[doc = "`write(|w| ..)` method takes [`timer::W`](W) writer structure"] -impl crate::Writable for TimerSpec { +impl crate::Writable for TIMER_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIMER to value 0"] -impl crate::Resettable for TimerSpec { +impl crate::Resettable for TIMER_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac.rs b/src/dac.rs index cd8ea809..a06f6a26 100644 --- a/src/dac.rs +++ b/src/dac.rs @@ -1,150 +1,138 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, - dac0cfg0: Dac0cfg0, - dac0cfg1: Dac0cfg1, - dac1cfg0: Dac1cfg0, - dac1cfg1: Dac1cfg1, - dac0data: Dac0data, - dac1data: Dac1data, - dac01data: Dac01data, - dac0patl: Dac0patl, - dac0path: Dac0path, - dac1patl: Dac1patl, - dac1path: Dac1path, + id: ID, + dac0cfg0: DAC0CFG0, + dac0cfg1: DAC0CFG1, + dac1cfg0: DAC1CFG0, + dac1cfg1: DAC1CFG1, + dac0data: DAC0DATA, + dac1data: DAC1DATA, + dac01data: DAC01DATA, + dac0patl: DAC0PATL, + dac0path: DAC0PATH, + dac1patl: DAC1PATL, + dac1path: DAC1PATH, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x04 - DAC0 Configuration Register 0"] #[inline(always)] - pub const fn dac0cfg0(&self) -> &Dac0cfg0 { + pub const fn dac0cfg0(&self) -> &DAC0CFG0 { &self.dac0cfg0 } #[doc = "0x08 - DAC0 Configuration Register 1"] #[inline(always)] - pub const fn dac0cfg1(&self) -> &Dac0cfg1 { + pub const fn dac0cfg1(&self) -> &DAC0CFG1 { &self.dac0cfg1 } #[doc = "0x0c - DAC1 Configuration Register 0"] #[inline(always)] - pub const fn dac1cfg0(&self) -> &Dac1cfg0 { + pub const fn dac1cfg0(&self) -> &DAC1CFG0 { &self.dac1cfg0 } #[doc = "0x10 - DAC1 Configuration Register 1"] #[inline(always)] - pub const fn dac1cfg1(&self) -> &Dac1cfg1 { + pub const fn dac1cfg1(&self) -> &DAC1CFG1 { &self.dac1cfg1 } #[doc = "0x14 - DAC0 Data Register"] #[inline(always)] - pub const fn dac0data(&self) -> &Dac0data { + pub const fn dac0data(&self) -> &DAC0DATA { &self.dac0data } #[doc = "0x18 - DAC1 Data Register"] #[inline(always)] - pub const fn dac1data(&self) -> &Dac1data { + pub const fn dac1data(&self) -> &DAC1DATA { &self.dac1data } #[doc = "0x1c - DAC01 Data Register"] #[inline(always)] - pub const fn dac01data(&self) -> &Dac01data { + pub const fn dac01data(&self) -> &DAC01DATA { &self.dac01data } #[doc = "0x20 - DAC0 Lower Pattern Register"] #[inline(always)] - pub const fn dac0patl(&self) -> &Dac0patl { + pub const fn dac0patl(&self) -> &DAC0PATL { &self.dac0patl } #[doc = "0x24 - DAC0 Higher Pattern Register"] #[inline(always)] - pub const fn dac0path(&self) -> &Dac0path { + pub const fn dac0path(&self) -> &DAC0PATH { &self.dac0path } #[doc = "0x28 - DAC1 Lower Pattern Register"] #[inline(always)] - pub const fn dac1patl(&self) -> &Dac1patl { + pub const fn dac1patl(&self) -> &DAC1PATL { &self.dac1patl } #[doc = "0x2c - DAC1 Higher Pattern Register"] #[inline(always)] - pub const fn dac1path(&self) -> &Dac1path { + pub const fn dac1path(&self) -> &DAC1PATH { &self.dac1path } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "DAC0CFG0 (rw) register accessor: DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg0`] module"] -#[doc(alias = "DAC0CFG0")] -pub type Dac0cfg0 = crate::Reg; +pub type DAC0CFG0 = crate::Reg; #[doc = "DAC0 Configuration Register 0"] pub mod dac0cfg0; #[doc = "DAC0CFG1 (rw) register accessor: DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0cfg1`] module"] -#[doc(alias = "DAC0CFG1")] -pub type Dac0cfg1 = crate::Reg; +pub type DAC0CFG1 = crate::Reg; #[doc = "DAC0 Configuration Register 1"] pub mod dac0cfg1; #[doc = "DAC1CFG0 (rw) register accessor: DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg0`] module"] -#[doc(alias = "DAC1CFG0")] -pub type Dac1cfg0 = crate::Reg; +pub type DAC1CFG0 = crate::Reg; #[doc = "DAC1 Configuration Register 0"] pub mod dac1cfg0; #[doc = "DAC1CFG1 (rw) register accessor: DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1cfg1`] module"] -#[doc(alias = "DAC1CFG1")] -pub type Dac1cfg1 = crate::Reg; +pub type DAC1CFG1 = crate::Reg; #[doc = "DAC1 Configuration Register 1"] pub mod dac1cfg1; #[doc = "DAC0DATA (rw) register accessor: DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0data`] module"] -#[doc(alias = "DAC0DATA")] -pub type Dac0data = crate::Reg; +pub type DAC0DATA = crate::Reg; #[doc = "DAC0 Data Register"] pub mod dac0data; #[doc = "DAC1DATA (rw) register accessor: DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1data`] module"] -#[doc(alias = "DAC1DATA")] -pub type Dac1data = crate::Reg; +pub type DAC1DATA = crate::Reg; #[doc = "DAC1 Data Register"] pub mod dac1data; #[doc = "DAC01DATA (rw) register accessor: DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac01data`] module"] -#[doc(alias = "DAC01DATA")] -pub type Dac01data = crate::Reg; +pub type DAC01DATA = crate::Reg; #[doc = "DAC01 Data Register"] pub mod dac01data; #[doc = "DAC0PATL (rw) register accessor: DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0patl`] module"] -#[doc(alias = "DAC0PATL")] -pub type Dac0patl = crate::Reg; +pub type DAC0PATL = crate::Reg; #[doc = "DAC0 Lower Pattern Register"] pub mod dac0patl; #[doc = "DAC0PATH (rw) register accessor: DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac0path`] module"] -#[doc(alias = "DAC0PATH")] -pub type Dac0path = crate::Reg; +pub type DAC0PATH = crate::Reg; #[doc = "DAC0 Higher Pattern Register"] pub mod dac0path; #[doc = "DAC1PATL (rw) register accessor: DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1patl`] module"] -#[doc(alias = "DAC1PATL")] -pub type Dac1patl = crate::Reg; +pub type DAC1PATL = crate::Reg; #[doc = "DAC1 Lower Pattern Register"] pub mod dac1patl; #[doc = "DAC1PATH (rw) register accessor: DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dac1path`] module"] -#[doc(alias = "DAC1PATH")] -pub type Dac1path = crate::Reg; +pub type DAC1PATH = crate::Reg; #[doc = "DAC1 Higher Pattern Register"] pub mod dac1path; diff --git a/src/dac/dac01data.rs b/src/dac/dac01data.rs index 57b86a76..70ea2942 100644 --- a/src/dac/dac01data.rs +++ b/src/dac/dac01data.rs @@ -1,55 +1,55 @@ #[doc = "Register `DAC01DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC01DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA0` reader - DAC0 Data Bits"] -pub type Data0R = crate::FieldReader; +pub type DATA0_R = crate::FieldReader; #[doc = "Field `DATA0` writer - DAC0 Data Bits"] -pub type Data0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DATA0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DATA1` reader - DAC1 Data Bits"] -pub type Data1R = crate::FieldReader; +pub type DATA1_R = crate::FieldReader; #[doc = "Field `DATA1` writer - DAC1 Data Bits"] -pub type Data1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DATA1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - pub fn data0(&self) -> Data0R { - Data0R::new((self.bits & 0x0fff) as u16) + pub fn data0(&self) -> DATA0_R { + DATA0_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - DAC1 Data Bits"] #[inline(always)] - pub fn data1(&self) -> Data1R { - Data1R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn data1(&self) -> DATA1_R { + DATA1_R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] #[must_use] - pub fn data0(&mut self) -> Data0W { - Data0W::new(self, 0) + pub fn data0(&mut self) -> DATA0_W { + DATA0_W::new(self, 0) } #[doc = "Bits 16:27 - DAC1 Data Bits"] #[inline(always)] #[must_use] - pub fn data1(&mut self) -> Data1W { - Data1W::new(self, 16) + pub fn data1(&mut self) -> DATA1_W { + DATA1_W::new(self, 16) } } #[doc = "DAC01 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac01data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac01data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac01dataSpec; -impl crate::RegisterSpec for Dac01dataSpec { +pub struct DAC01DATA_SPEC; +impl crate::RegisterSpec for DAC01DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac01data::R`](R) reader structure"] -impl crate::Readable for Dac01dataSpec {} +impl crate::Readable for DAC01DATA_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac01data::W`](W) writer structure"] -impl crate::Writable for Dac01dataSpec { +impl crate::Writable for DAC01DATA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC01DATA to value 0"] -impl crate::Resettable for Dac01dataSpec { +impl crate::Resettable for DAC01DATA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0cfg0.rs b/src/dac/dac0cfg0.rs index bbee15db..bec872b5 100644 --- a/src/dac/dac0cfg0.rs +++ b/src/dac/dac0cfg0.rs @@ -1,104 +1,104 @@ #[doc = "Register `DAC0CFG0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0CFG0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FREQ` reader - Integer Frequency Divider Value"] -pub type FreqR = crate::FieldReader; +pub type FREQ_R = crate::FieldReader; #[doc = "Field `FREQ` writer - Integer Frequency Divider Value"] -pub type FreqW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Enables and Sets the Mode for DAC0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mode { +pub enum MODE_A { #[doc = "0: disable/switch-off DAC"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single Value Mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Data Mode"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Patgen Mode"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Noise Mode"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Ramp Mode"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: na"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: na"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mode) -> Self { + fn from(variant: MODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mode { +impl crate::FieldSpec for MODE_A { type Ux = u8; } -impl crate::IsEnum for Mode {} +impl crate::IsEnum for MODE_A {} #[doc = "Field `MODE` reader - Enables and Sets the Mode for DAC0"] -pub type ModeR = crate::FieldReader; -impl ModeR { +pub type MODE_R = crate::FieldReader; +impl MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mode { + pub const fn variant(&self) -> MODE_A { match self.bits { - 0 => Mode::Value1, - 1 => Mode::Value2, - 2 => Mode::Value3, - 3 => Mode::Value4, - 4 => Mode::Value5, - 5 => Mode::Value6, - 6 => Mode::Value7, - 7 => Mode::Value8, + 0 => MODE_A::VALUE1, + 1 => MODE_A::VALUE2, + 2 => MODE_A::VALUE3, + 3 => MODE_A::VALUE4, + 4 => MODE_A::VALUE5, + 5 => MODE_A::VALUE6, + 6 => MODE_A::VALUE7, + 7 => MODE_A::VALUE8, _ => unreachable!(), } } #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mode::Value1 + *self == MODE_A::VALUE1 } #[doc = "Single Value Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mode::Value2 + *self == MODE_A::VALUE2 } #[doc = "Data Mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mode::Value3 + *self == MODE_A::VALUE3 } #[doc = "Patgen Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mode::Value4 + *self == MODE_A::VALUE4 } #[doc = "Noise Mode"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Mode::Value5 + *self == MODE_A::VALUE5 } #[doc = "Ramp Mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Mode::Value6 + *self == MODE_A::VALUE6 } #[doc = "na"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Mode::Value7 + *self == MODE_A::VALUE7 } #[doc = "na"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Mode::Value8 + *self == MODE_A::VALUE8 } } #[doc = "Field `MODE` writer - Enables and Sets the Mode for DAC0"] -pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mode, crate::Safe>; -impl<'a, REG> ModeW<'a, REG> +pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MODE_A, crate::Safe>; +impl<'a, REG> MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -106,470 +106,470 @@ where #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mode::Value1) + self.variant(MODE_A::VALUE1) } #[doc = "Single Value Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mode::Value2) + self.variant(MODE_A::VALUE2) } #[doc = "Data Mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mode::Value3) + self.variant(MODE_A::VALUE3) } #[doc = "Patgen Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mode::Value4) + self.variant(MODE_A::VALUE4) } #[doc = "Noise Mode"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Mode::Value5) + self.variant(MODE_A::VALUE5) } #[doc = "Ramp Mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Mode::Value6) + self.variant(MODE_A::VALUE6) } #[doc = "na"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Mode::Value7) + self.variant(MODE_A::VALUE7) } #[doc = "na"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Mode::Value8) + self.variant(MODE_A::VALUE8) } } #[doc = "Selects Between Signed and Unsigned DAC0 Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sign { +pub enum SIGN_A { #[doc = "0: DAC expects unsigned input data"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC expects signed input data"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sign) -> Self { + fn from(variant: SIGN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIGN` reader - Selects Between Signed and Unsigned DAC0 Mode"] -pub type SignR = crate::BitReader; -impl SignR { +pub type SIGN_R = crate::BitReader; +impl SIGN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sign { + pub const fn variant(&self) -> SIGN_A { match self.bits { - false => Sign::Value1, - true => Sign::Value2, + false => SIGN_A::VALUE1, + true => SIGN_A::VALUE2, } } #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sign::Value1 + *self == SIGN_A::VALUE1 } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sign::Value2 + *self == SIGN_A::VALUE2 } } #[doc = "Field `SIGN` writer - Selects Between Signed and Unsigned DAC0 Mode"] -pub type SignW<'a, REG> = crate::BitWriter<'a, REG, Sign>; -impl<'a, REG> SignW<'a, REG> +pub type SIGN_W<'a, REG> = crate::BitWriter<'a, REG, SIGN_A>; +impl<'a, REG> SIGN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sign::Value1) + self.variant(SIGN_A::VALUE1) } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sign::Value2) + self.variant(SIGN_A::VALUE2) } } #[doc = "Field `FIFOIND` reader - Current write position inside the data FIFO"] -pub type FifoindR = crate::FieldReader; +pub type FIFOIND_R = crate::FieldReader; #[doc = "Indicate if the FIFO is empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fifoemp { +pub enum FIFOEMP_A { #[doc = "0: FIFO not empty"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: FIFO empty"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fifoemp) -> Self { + fn from(variant: FIFOEMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] -pub type FifoempR = crate::BitReader; -impl FifoempR { +pub type FIFOEMP_R = crate::BitReader; +impl FIFOEMP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fifoemp { + pub const fn variant(&self) -> FIFOEMP_A { match self.bits { - false => Fifoemp::Value1, - true => Fifoemp::Value2, + false => FIFOEMP_A::VALUE1, + true => FIFOEMP_A::VALUE2, } } #[doc = "FIFO not empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fifoemp::Value1 + *self == FIFOEMP_A::VALUE1 } #[doc = "FIFO empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fifoemp::Value2 + *self == FIFOEMP_A::VALUE2 } } #[doc = "Indicate if the FIFO is full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fifoful { +pub enum FIFOFUL_A { #[doc = "0: FIFO not full"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: FIFO full"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fifoful) -> Self { + fn from(variant: FIFOFUL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] -pub type FifofulR = crate::BitReader; -impl FifofulR { +pub type FIFOFUL_R = crate::BitReader; +impl FIFOFUL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fifoful { + pub const fn variant(&self) -> FIFOFUL_A { match self.bits { - false => Fifoful::Value1, - true => Fifoful::Value2, + false => FIFOFUL_A::VALUE1, + true => FIFOFUL_A::VALUE2, } } #[doc = "FIFO not full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fifoful::Value1 + *self == FIFOFUL_A::VALUE1 } #[doc = "FIFO full"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fifoful::Value2 + *self == FIFOFUL_A::VALUE2 } } #[doc = "Negates the DAC0 output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Negate { +pub enum NEGATE_A { #[doc = "0: DAC output not negated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC output negated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Negate) -> Self { + fn from(variant: NEGATE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NEGATE` reader - Negates the DAC0 output"] -pub type NegateR = crate::BitReader; -impl NegateR { +pub type NEGATE_R = crate::BitReader; +impl NEGATE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Negate { + pub const fn variant(&self) -> NEGATE_A { match self.bits { - false => Negate::Value1, - true => Negate::Value2, + false => NEGATE_A::VALUE1, + true => NEGATE_A::VALUE2, } } #[doc = "DAC output not negated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Negate::Value1 + *self == NEGATE_A::VALUE1 } #[doc = "DAC output negated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Negate::Value2 + *self == NEGATE_A::VALUE2 } } #[doc = "Field `NEGATE` writer - Negates the DAC0 output"] -pub type NegateW<'a, REG> = crate::BitWriter<'a, REG, Negate>; -impl<'a, REG> NegateW<'a, REG> +pub type NEGATE_W<'a, REG> = crate::BitWriter<'a, REG, NEGATE_A>; +impl<'a, REG> NEGATE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC output not negated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Negate::Value1) + self.variant(NEGATE_A::VALUE1) } #[doc = "DAC output negated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Negate::Value2) + self.variant(NEGATE_A::VALUE2) } } #[doc = "Enable Sign Output of DAC0 Pattern Generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Signen { +pub enum SIGNEN_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Signen) -> Self { + fn from(variant: SIGNEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIGNEN` reader - Enable Sign Output of DAC0 Pattern Generator"] -pub type SignenR = crate::BitReader; -impl SignenR { +pub type SIGNEN_R = crate::BitReader; +impl SIGNEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Signen { + pub const fn variant(&self) -> SIGNEN_A { match self.bits { - false => Signen::Value1, - true => Signen::Value2, + false => SIGNEN_A::VALUE1, + true => SIGNEN_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Signen::Value1 + *self == SIGNEN_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Signen::Value2 + *self == SIGNEN_A::VALUE2 } } #[doc = "Field `SIGNEN` writer - Enable Sign Output of DAC0 Pattern Generator"] -pub type SignenW<'a, REG> = crate::BitWriter<'a, REG, Signen>; -impl<'a, REG> SignenW<'a, REG> +pub type SIGNEN_W<'a, REG> = crate::BitWriter<'a, REG, SIGNEN_A>; +impl<'a, REG> SIGNEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Signen::Value1) + self.variant(SIGNEN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Signen::Value2) + self.variant(SIGNEN_A::VALUE2) } } #[doc = "Enable DAC0 service request interrupt generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sren { +pub enum SREN_A { #[doc = "0: disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sren) -> Self { + fn from(variant: SREN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SREN` reader - Enable DAC0 service request interrupt generation"] -pub type SrenR = crate::BitReader; -impl SrenR { +pub type SREN_R = crate::BitReader; +impl SREN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sren { + pub const fn variant(&self) -> SREN_A { match self.bits { - false => Sren::Value1, - true => Sren::Value2, + false => SREN_A::VALUE1, + true => SREN_A::VALUE2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sren::Value1 + *self == SREN_A::VALUE1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sren::Value2 + *self == SREN_A::VALUE2 } } #[doc = "Field `SREN` writer - Enable DAC0 service request interrupt generation"] -pub type SrenW<'a, REG> = crate::BitWriter<'a, REG, Sren>; -impl<'a, REG> SrenW<'a, REG> +pub type SREN_W<'a, REG> = crate::BitWriter<'a, REG, SREN_A>; +impl<'a, REG> SREN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sren::Value1) + self.variant(SREN_A::VALUE1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sren::Value2) + self.variant(SREN_A::VALUE2) } } #[doc = "RUN indicates the current DAC0 operation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Run { +pub enum RUN_A { #[doc = "0: DAC0 channel disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC0 channel in operation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Run) -> Self { + fn from(variant: RUN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RUN` reader - RUN indicates the current DAC0 operation status"] -pub type RunR = crate::BitReader; -impl RunR { +pub type RUN_R = crate::BitReader; +impl RUN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Run { + pub const fn variant(&self) -> RUN_A { match self.bits { - false => Run::Value1, - true => Run::Value2, + false => RUN_A::VALUE1, + true => RUN_A::VALUE2, } } #[doc = "DAC0 channel disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Run::Value1 + *self == RUN_A::VALUE1 } #[doc = "DAC0 channel in operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Run::Value2 + *self == RUN_A::VALUE2 } } impl R { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - pub fn freq(&self) -> FreqR { - FreqR::new(self.bits & 0x000f_ffff) + pub fn freq(&self) -> FREQ_R { + FREQ_R::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"] #[inline(always)] - pub fn mode(&self) -> ModeR { - ModeR::new(((self.bits >> 20) & 7) as u8) + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"] #[inline(always)] - pub fn sign(&self) -> SignR { - SignR::new(((self.bits >> 23) & 1) != 0) + pub fn sign(&self) -> SIGN_R { + SIGN_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Current write position inside the data FIFO"] #[inline(always)] - pub fn fifoind(&self) -> FifoindR { - FifoindR::new(((self.bits >> 24) & 3) as u8) + pub fn fifoind(&self) -> FIFOIND_R { + FIFOIND_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Indicate if the FIFO is empty"] #[inline(always)] - pub fn fifoemp(&self) -> FifoempR { - FifoempR::new(((self.bits >> 26) & 1) != 0) + pub fn fifoemp(&self) -> FIFOEMP_R { + FIFOEMP_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Indicate if the FIFO is full"] #[inline(always)] - pub fn fifoful(&self) -> FifofulR { - FifofulR::new(((self.bits >> 27) & 1) != 0) + pub fn fifoful(&self) -> FIFOFUL_R { + FIFOFUL_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Negates the DAC0 output"] #[inline(always)] - pub fn negate(&self) -> NegateR { - NegateR::new(((self.bits >> 28) & 1) != 0) + pub fn negate(&self) -> NEGATE_R { + NEGATE_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"] #[inline(always)] - pub fn signen(&self) -> SignenR { - SignenR::new(((self.bits >> 29) & 1) != 0) + pub fn signen(&self) -> SIGNEN_R { + SIGNEN_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"] #[inline(always)] - pub fn sren(&self) -> SrenR { - SrenR::new(((self.bits >> 30) & 1) != 0) + pub fn sren(&self) -> SREN_R { + SREN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - RUN indicates the current DAC0 operation status"] #[inline(always)] - pub fn run(&self) -> RunR { - RunR::new(((self.bits >> 31) & 1) != 0) + pub fn run(&self) -> RUN_R { + RUN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] #[must_use] - pub fn freq(&mut self) -> FreqW { - FreqW::new(self, 0) + pub fn freq(&mut self) -> FREQ_W { + FREQ_W::new(self, 0) } #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> ModeW { - ModeW::new(self, 20) + pub fn mode(&mut self) -> MODE_W { + MODE_W::new(self, 20) } #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"] #[inline(always)] #[must_use] - pub fn sign(&mut self) -> SignW { - SignW::new(self, 23) + pub fn sign(&mut self) -> SIGN_W { + SIGN_W::new(self, 23) } #[doc = "Bit 28 - Negates the DAC0 output"] #[inline(always)] #[must_use] - pub fn negate(&mut self) -> NegateW { - NegateW::new(self, 28) + pub fn negate(&mut self) -> NEGATE_W { + NEGATE_W::new(self, 28) } #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"] #[inline(always)] #[must_use] - pub fn signen(&mut self) -> SignenW { - SignenW::new(self, 29) + pub fn signen(&mut self) -> SIGNEN_W { + SIGNEN_W::new(self, 29) } #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"] #[inline(always)] #[must_use] - pub fn sren(&mut self) -> SrenW { - SrenW::new(self, 30) + pub fn sren(&mut self) -> SREN_W { + SREN_W::new(self, 30) } } #[doc = "DAC0 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac0cfg0Spec; -impl crate::RegisterSpec for Dac0cfg0Spec { +pub struct DAC0CFG0_SPEC; +impl crate::RegisterSpec for DAC0CFG0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac0cfg0::R`](R) reader structure"] -impl crate::Readable for Dac0cfg0Spec {} +impl crate::Readable for DAC0CFG0_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac0cfg0::W`](W) writer structure"] -impl crate::Writable for Dac0cfg0Spec { +impl crate::Writable for DAC0CFG0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0CFG0 to value 0"] -impl crate::Resettable for Dac0cfg0Spec { +impl crate::Resettable for DAC0CFG0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0cfg1.rs b/src/dac/dac0cfg1.rs index 47336e17..21a6d712 100644 --- a/src/dac/dac0cfg1.rs +++ b/src/dac/dac0cfg1.rs @@ -1,100 +1,100 @@ #[doc = "Register `DAC0CFG1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0CFG1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Scale { +pub enum SCALE_A { #[doc = "0: no shift = multiplication/division by 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: shift by 1 = multiplication/division by 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: shift by 2 = multiplication/division by 4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: shift left by 3 = multiplication/division by 8"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: shift left by 4 = multiplication/division by 16"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: shift left by 5 = multiplication/division by 32"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: shift left by 6 = multiplication/division by 64"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: shift left by 7 = multiplication/division by 128"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Scale) -> Self { + fn from(variant: SCALE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Scale { +impl crate::FieldSpec for SCALE_A { type Ux = u8; } -impl crate::IsEnum for Scale {} +impl crate::IsEnum for SCALE_A {} #[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] -pub type ScaleR = crate::FieldReader; -impl ScaleR { +pub type SCALE_R = crate::FieldReader; +impl SCALE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scale { + pub const fn variant(&self) -> SCALE_A { match self.bits { - 0 => Scale::Value1, - 1 => Scale::Value2, - 2 => Scale::Value3, - 3 => Scale::Value4, - 4 => Scale::Value5, - 5 => Scale::Value6, - 6 => Scale::Value7, - 7 => Scale::Value8, + 0 => SCALE_A::VALUE1, + 1 => SCALE_A::VALUE2, + 2 => SCALE_A::VALUE3, + 3 => SCALE_A::VALUE4, + 4 => SCALE_A::VALUE5, + 5 => SCALE_A::VALUE6, + 6 => SCALE_A::VALUE7, + 7 => SCALE_A::VALUE8, _ => unreachable!(), } } #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scale::Value1 + *self == SCALE_A::VALUE1 } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scale::Value2 + *self == SCALE_A::VALUE2 } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Scale::Value3 + *self == SCALE_A::VALUE3 } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Scale::Value4 + *self == SCALE_A::VALUE4 } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Scale::Value5 + *self == SCALE_A::VALUE5 } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Scale::Value6 + *self == SCALE_A::VALUE6 } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Scale::Value7 + *self == SCALE_A::VALUE7 } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Scale::Value8 + *self == SCALE_A::VALUE8 } } #[doc = "Field `SCALE` writer - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] -pub type ScaleW<'a, REG> = crate::FieldWriter<'a, REG, 3, Scale, crate::Safe>; -impl<'a, REG> ScaleW<'a, REG> +pub type SCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SCALE_A, crate::Safe>; +impl<'a, REG> SCALE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,215 +102,215 @@ where #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scale::Value1) + self.variant(SCALE_A::VALUE1) } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scale::Value2) + self.variant(SCALE_A::VALUE2) } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Scale::Value3) + self.variant(SCALE_A::VALUE3) } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Scale::Value4) + self.variant(SCALE_A::VALUE4) } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Scale::Value5) + self.variant(SCALE_A::VALUE5) } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Scale::Value6) + self.variant(SCALE_A::VALUE6) } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Scale::Value7) + self.variant(SCALE_A::VALUE7) } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Scale::Value8) + self.variant(SCALE_A::VALUE8) } } #[doc = "Switch between up- and downscale of the DAC0 input data values\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Muldiv { +pub enum MULDIV_A { #[doc = "0: downscale = division (shift SCALE positions to the right)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: upscale = multiplication (shift SCALE positions to the left)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Muldiv) -> Self { + fn from(variant: MULDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC0 input data values"] -pub type MuldivR = crate::BitReader; -impl MuldivR { +pub type MULDIV_R = crate::BitReader; +impl MULDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Muldiv { + pub const fn variant(&self) -> MULDIV_A { match self.bits { - false => Muldiv::Value1, - true => Muldiv::Value2, + false => MULDIV_A::VALUE1, + true => MULDIV_A::VALUE2, } } #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Muldiv::Value1 + *self == MULDIV_A::VALUE1 } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Muldiv::Value2 + *self == MULDIV_A::VALUE2 } } #[doc = "Field `MULDIV` writer - Switch between up- and downscale of the DAC0 input data values"] -pub type MuldivW<'a, REG> = crate::BitWriter<'a, REG, Muldiv>; -impl<'a, REG> MuldivW<'a, REG> +pub type MULDIV_W<'a, REG> = crate::BitWriter<'a, REG, MULDIV_A>; +impl<'a, REG> MULDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Muldiv::Value1) + self.variant(MULDIV_A::VALUE1) } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Muldiv::Value2) + self.variant(MULDIV_A::VALUE2) } } #[doc = "Field `OFFS` reader - 8-bit offset value addition"] -pub type OffsR = crate::FieldReader; +pub type OFFS_R = crate::FieldReader; #[doc = "Field `OFFS` writer - 8-bit offset value addition"] -pub type OffsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type OFFS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRIGSEL` reader - Selects one of the eight external trigger sources for DAC0"] -pub type TrigselR = crate::FieldReader; +pub type TRIGSEL_R = crate::FieldReader; #[doc = "Field `TRIGSEL` writer - Selects one of the eight external trigger sources for DAC0"] -pub type TrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Datmod { +pub enum DATMOD_A { #[doc = "0: independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Datmod) -> Self { + fn from(variant: DATMOD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DATMOD` reader - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] -pub type DatmodR = crate::BitReader; -impl DatmodR { +pub type DATMOD_R = crate::BitReader; +impl DATMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Datmod { + pub const fn variant(&self) -> DATMOD_A { match self.bits { - false => Datmod::Value1, - true => Datmod::Value2, + false => DATMOD_A::VALUE1, + true => DATMOD_A::VALUE2, } } #[doc = "independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Datmod::Value1 + *self == DATMOD_A::VALUE1 } #[doc = "simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Datmod::Value2 + *self == DATMOD_A::VALUE2 } } #[doc = "Field `DATMOD` writer - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] -pub type DatmodW<'a, REG> = crate::BitWriter<'a, REG, Datmod>; -impl<'a, REG> DatmodW<'a, REG> +pub type DATMOD_W<'a, REG> = crate::BitWriter<'a, REG, DATMOD_A>; +impl<'a, REG> DATMOD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "independent data handling - process data from DATA0 register (bits 11:0) to DAC0 and data from DATA1 register (bits 11:0) to DAC1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Datmod::Value1) + self.variant(DATMOD_A::VALUE1) } #[doc = "simultaneous data handling - process data from DAC01 register to both DACs (bits 11:0 to DAC0 and bits 23:12 to DAC1)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Datmod::Value2) + self.variant(DATMOD_A::VALUE2) } } #[doc = "Field `SWTRIG` reader - Software Trigger"] -pub type SwtrigR = crate::BitReader; +pub type SWTRIG_R = crate::BitReader; #[doc = "Field `SWTRIG` writer - Software Trigger"] -pub type SwtrigW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SWTRIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Select the trigger source for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trigmod { +pub enum TRIGMOD_A { #[doc = "0: internal Trigger (integer divided clock - see FREQ parameter)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: external Trigger (preselected trigger by TRIGSEL parameter)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: software Trigger (see SWTRIG parameter)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trigmod) -> Self { + fn from(variant: TRIGMOD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trigmod { +impl crate::FieldSpec for TRIGMOD_A { type Ux = u8; } -impl crate::IsEnum for Trigmod {} +impl crate::IsEnum for TRIGMOD_A {} #[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 0"] -pub type TrigmodR = crate::FieldReader; -impl TrigmodR { +pub type TRIGMOD_R = crate::FieldReader; +impl TRIGMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Trigmod::Value1), - 1 => Some(Trigmod::Value2), - 2 => Some(Trigmod::Value3), + 0 => Some(TRIGMOD_A::VALUE1), + 1 => Some(TRIGMOD_A::VALUE2), + 2 => Some(TRIGMOD_A::VALUE3), _ => None, } } #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trigmod::Value1 + *self == TRIGMOD_A::VALUE1 } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trigmod::Value2 + *self == TRIGMOD_A::VALUE2 } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trigmod::Value3 + *self == TRIGMOD_A::VALUE3 } } #[doc = "Field `TRIGMOD` writer - Select the trigger source for channel 0"] -pub type TrigmodW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trigmod>; -impl<'a, REG> TrigmodW<'a, REG> +pub type TRIGMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRIGMOD_A>; +impl<'a, REG> TRIGMOD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -318,208 +318,208 @@ where #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trigmod::Value1) + self.variant(TRIGMOD_A::VALUE1) } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trigmod::Value2) + self.variant(TRIGMOD_A::VALUE2) } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trigmod::Value3) + self.variant(TRIGMOD_A::VALUE3) } } #[doc = "Field `ANACFG` reader - DAC0 analog configuration/calibration parameters"] -pub type AnacfgR = crate::FieldReader; +pub type ANACFG_R = crate::FieldReader; #[doc = "Field `ANACFG` writer - DAC0 analog configuration/calibration parameters"] -pub type AnacfgW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ANACFG_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Enable analog DAC for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Anaen { +pub enum ANAEN_A { #[doc = "0: DAC0 is set to standby (analog output only)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable DAC0 (analog output only)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Anaen) -> Self { + fn from(variant: ANAEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ANAEN` reader - Enable analog DAC for channel 0"] -pub type AnaenR = crate::BitReader; -impl AnaenR { +pub type ANAEN_R = crate::BitReader; +impl ANAEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Anaen { + pub const fn variant(&self) -> ANAEN_A { match self.bits { - false => Anaen::Value1, - true => Anaen::Value2, + false => ANAEN_A::VALUE1, + true => ANAEN_A::VALUE2, } } #[doc = "DAC0 is set to standby (analog output only)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Anaen::Value1 + *self == ANAEN_A::VALUE1 } #[doc = "enable DAC0 (analog output only)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Anaen::Value2 + *self == ANAEN_A::VALUE2 } } #[doc = "Field `ANAEN` writer - Enable analog DAC for channel 0"] -pub type AnaenW<'a, REG> = crate::BitWriter<'a, REG, Anaen>; -impl<'a, REG> AnaenW<'a, REG> +pub type ANAEN_W<'a, REG> = crate::BitWriter<'a, REG, ANAEN_A>; +impl<'a, REG> ANAEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC0 is set to standby (analog output only)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Anaen::Value1) + self.variant(ANAEN_A::VALUE1) } #[doc = "enable DAC0 (analog output only)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Anaen::Value2) + self.variant(ANAEN_A::VALUE2) } } #[doc = "Field `REFCFGL` reader - Lower 4 band-gap configuration/calibration parameters"] -pub type RefcfglR = crate::FieldReader; +pub type REFCFGL_R = crate::FieldReader; #[doc = "Field `REFCFGL` writer - Lower 4 band-gap configuration/calibration parameters"] -pub type RefcfglW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REFCFGL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - pub fn scale(&self) -> ScaleR { - ScaleR::new((self.bits & 7) as u8) + pub fn scale(&self) -> SCALE_R { + SCALE_R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"] #[inline(always)] - pub fn muldiv(&self) -> MuldivR { - MuldivR::new(((self.bits >> 3) & 1) != 0) + pub fn muldiv(&self) -> MULDIV_R { + MULDIV_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - pub fn offs(&self) -> OffsR { - OffsR::new(((self.bits >> 4) & 0xff) as u8) + pub fn offs(&self) -> OFFS_R { + OFFS_R::new(((self.bits >> 4) & 0xff) as u8) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"] #[inline(always)] - pub fn trigsel(&self) -> TrigselR { - TrigselR::new(((self.bits >> 12) & 7) as u8) + pub fn trigsel(&self) -> TRIGSEL_R { + TRIGSEL_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] #[inline(always)] - pub fn datmod(&self) -> DatmodR { - DatmodR::new(((self.bits >> 15) & 1) != 0) + pub fn datmod(&self) -> DATMOD_R { + DATMOD_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - pub fn swtrig(&self) -> SwtrigR { - SwtrigR::new(((self.bits >> 16) & 1) != 0) + pub fn swtrig(&self) -> SWTRIG_R { + SWTRIG_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:18 - Select the trigger source for channel 0"] #[inline(always)] - pub fn trigmod(&self) -> TrigmodR { - TrigmodR::new(((self.bits >> 17) & 3) as u8) + pub fn trigmod(&self) -> TRIGMOD_R { + TRIGMOD_R::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"] #[inline(always)] - pub fn anacfg(&self) -> AnacfgR { - AnacfgR::new(((self.bits >> 19) & 0x1f) as u8) + pub fn anacfg(&self) -> ANACFG_R { + ANACFG_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bit 24 - Enable analog DAC for channel 0"] #[inline(always)] - pub fn anaen(&self) -> AnaenR { - AnaenR::new(((self.bits >> 24) & 1) != 0) + pub fn anaen(&self) -> ANAEN_R { + ANAEN_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"] #[inline(always)] - pub fn refcfgl(&self) -> RefcfglR { - RefcfglR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn refcfgl(&self) -> REFCFGL_R { + REFCFGL_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] #[must_use] - pub fn scale(&mut self) -> ScaleW { - ScaleW::new(self, 0) + pub fn scale(&mut self) -> SCALE_W { + SCALE_W::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"] #[inline(always)] #[must_use] - pub fn muldiv(&mut self) -> MuldivW { - MuldivW::new(self, 3) + pub fn muldiv(&mut self) -> MULDIV_W { + MULDIV_W::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] #[must_use] - pub fn offs(&mut self) -> OffsW { - OffsW::new(self, 4) + pub fn offs(&mut self) -> OFFS_W { + OFFS_W::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"] #[inline(always)] #[must_use] - pub fn trigsel(&mut self) -> TrigselW { - TrigselW::new(self, 12) + pub fn trigsel(&mut self) -> TRIGSEL_W { + TRIGSEL_W::new(self, 12) } #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] #[inline(always)] #[must_use] - pub fn datmod(&mut self) -> DatmodW { - DatmodW::new(self, 15) + pub fn datmod(&mut self) -> DATMOD_W { + DATMOD_W::new(self, 15) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] #[must_use] - pub fn swtrig(&mut self) -> SwtrigW { - SwtrigW::new(self, 16) + pub fn swtrig(&mut self) -> SWTRIG_W { + SWTRIG_W::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 0"] #[inline(always)] #[must_use] - pub fn trigmod(&mut self) -> TrigmodW { - TrigmodW::new(self, 17) + pub fn trigmod(&mut self) -> TRIGMOD_W { + TRIGMOD_W::new(self, 17) } #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn anacfg(&mut self) -> AnacfgW { - AnacfgW::new(self, 19) + pub fn anacfg(&mut self) -> ANACFG_W { + ANACFG_W::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 0"] #[inline(always)] #[must_use] - pub fn anaen(&mut self) -> AnaenW { - AnaenW::new(self, 24) + pub fn anaen(&mut self) -> ANAEN_W { + ANAEN_W::new(self, 24) } #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn refcfgl(&mut self) -> RefcfglW { - RefcfglW::new(self, 28) + pub fn refcfgl(&mut self) -> REFCFGL_W { + REFCFGL_W::new(self, 28) } } #[doc = "DAC0 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac0cfg1Spec; -impl crate::RegisterSpec for Dac0cfg1Spec { +pub struct DAC0CFG1_SPEC; +impl crate::RegisterSpec for DAC0CFG1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac0cfg1::R`](R) reader structure"] -impl crate::Readable for Dac0cfg1Spec {} +impl crate::Readable for DAC0CFG1_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac0cfg1::W`](W) writer structure"] -impl crate::Writable for Dac0cfg1Spec { +impl crate::Writable for DAC0CFG1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0CFG1 to value 0"] -impl crate::Resettable for Dac0cfg1Spec { +impl crate::Resettable for DAC0CFG1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0data.rs b/src/dac/dac0data.rs index ec33c426..b1fbd507 100644 --- a/src/dac/dac0data.rs +++ b/src/dac/dac0data.rs @@ -1,40 +1,40 @@ #[doc = "Register `DAC0DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA0` reader - DAC0 Data Bits"] -pub type Data0R = crate::FieldReader; +pub type DATA0_R = crate::FieldReader; #[doc = "Field `DATA0` writer - DAC0 Data Bits"] -pub type Data0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DATA0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - pub fn data0(&self) -> Data0R { - Data0R::new((self.bits & 0x0fff) as u16) + pub fn data0(&self) -> DATA0_R { + DATA0_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] #[must_use] - pub fn data0(&mut self) -> Data0W { - Data0W::new(self, 0) + pub fn data0(&mut self) -> DATA0_W { + DATA0_W::new(self, 0) } } #[doc = "DAC0 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac0dataSpec; -impl crate::RegisterSpec for Dac0dataSpec { +pub struct DAC0DATA_SPEC; +impl crate::RegisterSpec for DAC0DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac0data::R`](R) reader structure"] -impl crate::Readable for Dac0dataSpec {} +impl crate::Readable for DAC0DATA_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac0data::W`](W) writer structure"] -impl crate::Writable for Dac0dataSpec { +impl crate::Writable for DAC0DATA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0DATA to value 0"] -impl crate::Resettable for Dac0dataSpec { +impl crate::Resettable for DAC0DATA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac0path.rs b/src/dac/dac0path.rs index 9d3102be..5546d955 100644 --- a/src/dac/dac0path.rs +++ b/src/dac/dac0path.rs @@ -1,70 +1,70 @@ #[doc = "Register `DAC0PATH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0PATH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT6` reader - Pattern Number 6 for PATGEN of DAC0"] -pub type Pat6R = crate::FieldReader; +pub type PAT6_R = crate::FieldReader; #[doc = "Field `PAT6` writer - Pattern Number 6 for PATGEN of DAC0"] -pub type Pat6W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT6_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT7` reader - Pattern Number 7 for PATGEN of DAC0"] -pub type Pat7R = crate::FieldReader; +pub type PAT7_R = crate::FieldReader; #[doc = "Field `PAT7` writer - Pattern Number 7 for PATGEN of DAC0"] -pub type Pat7W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT7_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT8` reader - Pattern Number 8 for PATGEN of DAC0"] -pub type Pat8R = crate::FieldReader; +pub type PAT8_R = crate::FieldReader; #[doc = "Field `PAT8` writer - Pattern Number 8 for PATGEN of DAC0"] -pub type Pat8W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT8_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"] #[inline(always)] - pub fn pat6(&self) -> Pat6R { - Pat6R::new((self.bits & 0x1f) as u8) + pub fn pat6(&self) -> PAT6_R { + PAT6_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"] #[inline(always)] - pub fn pat7(&self) -> Pat7R { - Pat7R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat7(&self) -> PAT7_R { + PAT7_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"] #[inline(always)] - pub fn pat8(&self) -> Pat8R { - Pat8R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat8(&self) -> PAT8_R { + PAT8_R::new(((self.bits >> 10) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat6(&mut self) -> Pat6W { - Pat6W::new(self, 0) + pub fn pat6(&mut self) -> PAT6_W { + PAT6_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat7(&mut self) -> Pat7W { - Pat7W::new(self, 5) + pub fn pat7(&mut self) -> PAT7_W { + PAT7_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat8(&mut self) -> Pat8W { - Pat8W::new(self, 10) + pub fn pat8(&mut self) -> PAT8_W { + PAT8_W::new(self, 10) } } #[doc = "DAC0 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac0pathSpec; -impl crate::RegisterSpec for Dac0pathSpec { +pub struct DAC0PATH_SPEC; +impl crate::RegisterSpec for DAC0PATH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac0path::R`](R) reader structure"] -impl crate::Readable for Dac0pathSpec {} +impl crate::Readable for DAC0PATH_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac0path::W`](W) writer structure"] -impl crate::Writable for Dac0pathSpec { +impl crate::Writable for DAC0PATH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0PATH to value 0x7fdd"] -impl crate::Resettable for Dac0pathSpec { +impl crate::Resettable for DAC0PATH_SPEC { const RESET_VALUE: u32 = 0x7fdd; } diff --git a/src/dac/dac0patl.rs b/src/dac/dac0patl.rs index c0f7dcf6..30cdb26e 100644 --- a/src/dac/dac0patl.rs +++ b/src/dac/dac0patl.rs @@ -1,115 +1,115 @@ #[doc = "Register `DAC0PATL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC0PATL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT0` reader - Pattern Number 0 for PATGEN of DAC0"] -pub type Pat0R = crate::FieldReader; +pub type PAT0_R = crate::FieldReader; #[doc = "Field `PAT0` writer - Pattern Number 0 for PATGEN of DAC0"] -pub type Pat0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT1` reader - Pattern Number 1 for PATGEN of DAC0"] -pub type Pat1R = crate::FieldReader; +pub type PAT1_R = crate::FieldReader; #[doc = "Field `PAT1` writer - Pattern Number 1 for PATGEN of DAC0"] -pub type Pat1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT2` reader - Pattern Number 2 for PATGEN of DAC0"] -pub type Pat2R = crate::FieldReader; +pub type PAT2_R = crate::FieldReader; #[doc = "Field `PAT2` writer - Pattern Number 2 for PATGEN of DAC0"] -pub type Pat2W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT2_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT3` reader - Pattern Number 3 for PATGEN of DAC0"] -pub type Pat3R = crate::FieldReader; +pub type PAT3_R = crate::FieldReader; #[doc = "Field `PAT3` writer - Pattern Number 3 for PATGEN of DAC0"] -pub type Pat3W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT3_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT4` reader - Pattern Number 4 for PATGEN of DAC0"] -pub type Pat4R = crate::FieldReader; +pub type PAT4_R = crate::FieldReader; #[doc = "Field `PAT4` writer - Pattern Number 4 for PATGEN of DAC0"] -pub type Pat4W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT4_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT5` reader - Pattern Number 5 for PATGEN of DAC0"] -pub type Pat5R = crate::FieldReader; +pub type PAT5_R = crate::FieldReader; #[doc = "Field `PAT5` writer - Pattern Number 5 for PATGEN of DAC0"] -pub type Pat5W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT5_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"] #[inline(always)] - pub fn pat0(&self) -> Pat0R { - Pat0R::new((self.bits & 0x1f) as u8) + pub fn pat0(&self) -> PAT0_R { + PAT0_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"] #[inline(always)] - pub fn pat1(&self) -> Pat1R { - Pat1R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat1(&self) -> PAT1_R { + PAT1_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"] #[inline(always)] - pub fn pat2(&self) -> Pat2R { - Pat2R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat2(&self) -> PAT2_R { + PAT2_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"] #[inline(always)] - pub fn pat3(&self) -> Pat3R { - Pat3R::new(((self.bits >> 15) & 0x1f) as u8) + pub fn pat3(&self) -> PAT3_R { + PAT3_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"] #[inline(always)] - pub fn pat4(&self) -> Pat4R { - Pat4R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn pat4(&self) -> PAT4_R { + PAT4_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"] #[inline(always)] - pub fn pat5(&self) -> Pat5R { - Pat5R::new(((self.bits >> 25) & 0x1f) as u8) + pub fn pat5(&self) -> PAT5_R { + PAT5_R::new(((self.bits >> 25) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat0(&mut self) -> Pat0W { - Pat0W::new(self, 0) + pub fn pat0(&mut self) -> PAT0_W { + PAT0_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat1(&mut self) -> Pat1W { - Pat1W::new(self, 5) + pub fn pat1(&mut self) -> PAT1_W { + PAT1_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat2(&mut self) -> Pat2W { - Pat2W::new(self, 10) + pub fn pat2(&mut self) -> PAT2_W { + PAT2_W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat3(&mut self) -> Pat3W { - Pat3W::new(self, 15) + pub fn pat3(&mut self) -> PAT3_W { + PAT3_W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat4(&mut self) -> Pat4W { - Pat4W::new(self, 20) + pub fn pat4(&mut self) -> PAT4_W { + PAT4_W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"] #[inline(always)] #[must_use] - pub fn pat5(&mut self) -> Pat5W { - Pat5W::new(self, 25) + pub fn pat5(&mut self) -> PAT5_W { + PAT5_W::new(self, 25) } } #[doc = "DAC0 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac0patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac0patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac0patlSpec; -impl crate::RegisterSpec for Dac0patlSpec { +pub struct DAC0PATL_SPEC; +impl crate::RegisterSpec for DAC0PATL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac0patl::R`](R) reader structure"] -impl crate::Readable for Dac0patlSpec {} +impl crate::Readable for DAC0PATL_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac0patl::W`](W) writer structure"] -impl crate::Writable for Dac0patlSpec { +impl crate::Writable for DAC0PATL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC0PATL to value 0x3568_b0c0"] -impl crate::Resettable for Dac0patlSpec { +impl crate::Resettable for DAC0PATL_SPEC { const RESET_VALUE: u32 = 0x3568_b0c0; } diff --git a/src/dac/dac1cfg0.rs b/src/dac/dac1cfg0.rs index 61a6b13e..447a93a9 100644 --- a/src/dac/dac1cfg0.rs +++ b/src/dac/dac1cfg0.rs @@ -1,104 +1,104 @@ #[doc = "Register `DAC1CFG0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1CFG0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FREQ` reader - Integer Frequency Divider Value"] -pub type FreqR = crate::FieldReader; +pub type FREQ_R = crate::FieldReader; #[doc = "Field `FREQ` writer - Integer Frequency Divider Value"] -pub type FreqW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type FREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Enables and sets the Mode for DAC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mode { +pub enum MODE_A { #[doc = "0: disable/switch-off DAC"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single Value Mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Data Mode"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Patgen Mode"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Noise Mode"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Ramp Mode"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: na"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: na"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mode) -> Self { + fn from(variant: MODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mode { +impl crate::FieldSpec for MODE_A { type Ux = u8; } -impl crate::IsEnum for Mode {} +impl crate::IsEnum for MODE_A {} #[doc = "Field `MODE` reader - Enables and sets the Mode for DAC1"] -pub type ModeR = crate::FieldReader; -impl ModeR { +pub type MODE_R = crate::FieldReader; +impl MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mode { + pub const fn variant(&self) -> MODE_A { match self.bits { - 0 => Mode::Value1, - 1 => Mode::Value2, - 2 => Mode::Value3, - 3 => Mode::Value4, - 4 => Mode::Value5, - 5 => Mode::Value6, - 6 => Mode::Value7, - 7 => Mode::Value8, + 0 => MODE_A::VALUE1, + 1 => MODE_A::VALUE2, + 2 => MODE_A::VALUE3, + 3 => MODE_A::VALUE4, + 4 => MODE_A::VALUE5, + 5 => MODE_A::VALUE6, + 6 => MODE_A::VALUE7, + 7 => MODE_A::VALUE8, _ => unreachable!(), } } #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mode::Value1 + *self == MODE_A::VALUE1 } #[doc = "Single Value Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mode::Value2 + *self == MODE_A::VALUE2 } #[doc = "Data Mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mode::Value3 + *self == MODE_A::VALUE3 } #[doc = "Patgen Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mode::Value4 + *self == MODE_A::VALUE4 } #[doc = "Noise Mode"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Mode::Value5 + *self == MODE_A::VALUE5 } #[doc = "Ramp Mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Mode::Value6 + *self == MODE_A::VALUE6 } #[doc = "na"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Mode::Value7 + *self == MODE_A::VALUE7 } #[doc = "na"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Mode::Value8 + *self == MODE_A::VALUE8 } } #[doc = "Field `MODE` writer - Enables and sets the Mode for DAC1"] -pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Mode, crate::Safe>; -impl<'a, REG> ModeW<'a, REG> +pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MODE_A, crate::Safe>; +impl<'a, REG> MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -106,470 +106,470 @@ where #[doc = "disable/switch-off DAC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mode::Value1) + self.variant(MODE_A::VALUE1) } #[doc = "Single Value Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mode::Value2) + self.variant(MODE_A::VALUE2) } #[doc = "Data Mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mode::Value3) + self.variant(MODE_A::VALUE3) } #[doc = "Patgen Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mode::Value4) + self.variant(MODE_A::VALUE4) } #[doc = "Noise Mode"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Mode::Value5) + self.variant(MODE_A::VALUE5) } #[doc = "Ramp Mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Mode::Value6) + self.variant(MODE_A::VALUE6) } #[doc = "na"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Mode::Value7) + self.variant(MODE_A::VALUE7) } #[doc = "na"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Mode::Value8) + self.variant(MODE_A::VALUE8) } } #[doc = "Selects between signed and unsigned DAC1 mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sign { +pub enum SIGN_A { #[doc = "0: DAC expects unsigned input data"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC expects signed input data"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sign) -> Self { + fn from(variant: SIGN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIGN` reader - Selects between signed and unsigned DAC1 mode"] -pub type SignR = crate::BitReader; -impl SignR { +pub type SIGN_R = crate::BitReader; +impl SIGN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sign { + pub const fn variant(&self) -> SIGN_A { match self.bits { - false => Sign::Value1, - true => Sign::Value2, + false => SIGN_A::VALUE1, + true => SIGN_A::VALUE2, } } #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sign::Value1 + *self == SIGN_A::VALUE1 } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sign::Value2 + *self == SIGN_A::VALUE2 } } #[doc = "Field `SIGN` writer - Selects between signed and unsigned DAC1 mode"] -pub type SignW<'a, REG> = crate::BitWriter<'a, REG, Sign>; -impl<'a, REG> SignW<'a, REG> +pub type SIGN_W<'a, REG> = crate::BitWriter<'a, REG, SIGN_A>; +impl<'a, REG> SIGN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC expects unsigned input data"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sign::Value1) + self.variant(SIGN_A::VALUE1) } #[doc = "DAC expects signed input data"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sign::Value2) + self.variant(SIGN_A::VALUE2) } } #[doc = "Field `FIFOIND` reader - Current write position inside the data FIFO"] -pub type FifoindR = crate::FieldReader; +pub type FIFOIND_R = crate::FieldReader; #[doc = "Indicate if the FIFO is empty\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fifoemp { +pub enum FIFOEMP_A { #[doc = "0: FIFO not empty"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: FIFO empty"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fifoemp) -> Self { + fn from(variant: FIFOEMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFOEMP` reader - Indicate if the FIFO is empty"] -pub type FifoempR = crate::BitReader; -impl FifoempR { +pub type FIFOEMP_R = crate::BitReader; +impl FIFOEMP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fifoemp { + pub const fn variant(&self) -> FIFOEMP_A { match self.bits { - false => Fifoemp::Value1, - true => Fifoemp::Value2, + false => FIFOEMP_A::VALUE1, + true => FIFOEMP_A::VALUE2, } } #[doc = "FIFO not empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fifoemp::Value1 + *self == FIFOEMP_A::VALUE1 } #[doc = "FIFO empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fifoemp::Value2 + *self == FIFOEMP_A::VALUE2 } } #[doc = "Indicate if the FIFO is full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fifoful { +pub enum FIFOFUL_A { #[doc = "0: FIFO not full"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: FIFO full"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fifoful) -> Self { + fn from(variant: FIFOFUL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFOFUL` reader - Indicate if the FIFO is full"] -pub type FifofulR = crate::BitReader; -impl FifofulR { +pub type FIFOFUL_R = crate::BitReader; +impl FIFOFUL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fifoful { + pub const fn variant(&self) -> FIFOFUL_A { match self.bits { - false => Fifoful::Value1, - true => Fifoful::Value2, + false => FIFOFUL_A::VALUE1, + true => FIFOFUL_A::VALUE2, } } #[doc = "FIFO not full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fifoful::Value1 + *self == FIFOFUL_A::VALUE1 } #[doc = "FIFO full"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fifoful::Value2 + *self == FIFOFUL_A::VALUE2 } } #[doc = "Negates the DAC1 output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Negate { +pub enum NEGATE_A { #[doc = "0: DAC output not negated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC output negated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Negate) -> Self { + fn from(variant: NEGATE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NEGATE` reader - Negates the DAC1 output"] -pub type NegateR = crate::BitReader; -impl NegateR { +pub type NEGATE_R = crate::BitReader; +impl NEGATE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Negate { + pub const fn variant(&self) -> NEGATE_A { match self.bits { - false => Negate::Value1, - true => Negate::Value2, + false => NEGATE_A::VALUE1, + true => NEGATE_A::VALUE2, } } #[doc = "DAC output not negated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Negate::Value1 + *self == NEGATE_A::VALUE1 } #[doc = "DAC output negated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Negate::Value2 + *self == NEGATE_A::VALUE2 } } #[doc = "Field `NEGATE` writer - Negates the DAC1 output"] -pub type NegateW<'a, REG> = crate::BitWriter<'a, REG, Negate>; -impl<'a, REG> NegateW<'a, REG> +pub type NEGATE_W<'a, REG> = crate::BitWriter<'a, REG, NEGATE_A>; +impl<'a, REG> NEGATE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC output not negated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Negate::Value1) + self.variant(NEGATE_A::VALUE1) } #[doc = "DAC output negated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Negate::Value2) + self.variant(NEGATE_A::VALUE2) } } #[doc = "Enable sign output of DAC1 pattern generator\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Signen { +pub enum SIGNEN_A { #[doc = "0: disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Signen) -> Self { + fn from(variant: SIGNEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIGNEN` reader - Enable sign output of DAC1 pattern generator"] -pub type SignenR = crate::BitReader; -impl SignenR { +pub type SIGNEN_R = crate::BitReader; +impl SIGNEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Signen { + pub const fn variant(&self) -> SIGNEN_A { match self.bits { - false => Signen::Value1, - true => Signen::Value2, + false => SIGNEN_A::VALUE1, + true => SIGNEN_A::VALUE2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Signen::Value1 + *self == SIGNEN_A::VALUE1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Signen::Value2 + *self == SIGNEN_A::VALUE2 } } #[doc = "Field `SIGNEN` writer - Enable sign output of DAC1 pattern generator"] -pub type SignenW<'a, REG> = crate::BitWriter<'a, REG, Signen>; -impl<'a, REG> SignenW<'a, REG> +pub type SIGNEN_W<'a, REG> = crate::BitWriter<'a, REG, SIGNEN_A>; +impl<'a, REG> SIGNEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Signen::Value1) + self.variant(SIGNEN_A::VALUE1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Signen::Value2) + self.variant(SIGNEN_A::VALUE2) } } #[doc = "Enable DAC1 service request interrupt generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sren { +pub enum SREN_A { #[doc = "0: disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sren) -> Self { + fn from(variant: SREN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SREN` reader - Enable DAC1 service request interrupt generation"] -pub type SrenR = crate::BitReader; -impl SrenR { +pub type SREN_R = crate::BitReader; +impl SREN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sren { + pub const fn variant(&self) -> SREN_A { match self.bits { - false => Sren::Value1, - true => Sren::Value2, + false => SREN_A::VALUE1, + true => SREN_A::VALUE2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sren::Value1 + *self == SREN_A::VALUE1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sren::Value2 + *self == SREN_A::VALUE2 } } #[doc = "Field `SREN` writer - Enable DAC1 service request interrupt generation"] -pub type SrenW<'a, REG> = crate::BitWriter<'a, REG, Sren>; -impl<'a, REG> SrenW<'a, REG> +pub type SREN_W<'a, REG> = crate::BitWriter<'a, REG, SREN_A>; +impl<'a, REG> SREN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sren::Value1) + self.variant(SREN_A::VALUE1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sren::Value2) + self.variant(SREN_A::VALUE2) } } #[doc = "RUN indicates the current DAC1 operation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Run { +pub enum RUN_A { #[doc = "0: DAC1 channel disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC1 channel in operation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Run) -> Self { + fn from(variant: RUN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RUN` reader - RUN indicates the current DAC1 operation status"] -pub type RunR = crate::BitReader; -impl RunR { +pub type RUN_R = crate::BitReader; +impl RUN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Run { + pub const fn variant(&self) -> RUN_A { match self.bits { - false => Run::Value1, - true => Run::Value2, + false => RUN_A::VALUE1, + true => RUN_A::VALUE2, } } #[doc = "DAC1 channel disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Run::Value1 + *self == RUN_A::VALUE1 } #[doc = "DAC1 channel in operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Run::Value2 + *self == RUN_A::VALUE2 } } impl R { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - pub fn freq(&self) -> FreqR { - FreqR::new(self.bits & 0x000f_ffff) + pub fn freq(&self) -> FREQ_R { + FREQ_R::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"] #[inline(always)] - pub fn mode(&self) -> ModeR { - ModeR::new(((self.bits >> 20) & 7) as u8) + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"] #[inline(always)] - pub fn sign(&self) -> SignR { - SignR::new(((self.bits >> 23) & 1) != 0) + pub fn sign(&self) -> SIGN_R { + SIGN_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Current write position inside the data FIFO"] #[inline(always)] - pub fn fifoind(&self) -> FifoindR { - FifoindR::new(((self.bits >> 24) & 3) as u8) + pub fn fifoind(&self) -> FIFOIND_R { + FIFOIND_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - Indicate if the FIFO is empty"] #[inline(always)] - pub fn fifoemp(&self) -> FifoempR { - FifoempR::new(((self.bits >> 26) & 1) != 0) + pub fn fifoemp(&self) -> FIFOEMP_R { + FIFOEMP_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Indicate if the FIFO is full"] #[inline(always)] - pub fn fifoful(&self) -> FifofulR { - FifofulR::new(((self.bits >> 27) & 1) != 0) + pub fn fifoful(&self) -> FIFOFUL_R { + FIFOFUL_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Negates the DAC1 output"] #[inline(always)] - pub fn negate(&self) -> NegateR { - NegateR::new(((self.bits >> 28) & 1) != 0) + pub fn negate(&self) -> NEGATE_R { + NEGATE_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"] #[inline(always)] - pub fn signen(&self) -> SignenR { - SignenR::new(((self.bits >> 29) & 1) != 0) + pub fn signen(&self) -> SIGNEN_R { + SIGNEN_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"] #[inline(always)] - pub fn sren(&self) -> SrenR { - SrenR::new(((self.bits >> 30) & 1) != 0) + pub fn sren(&self) -> SREN_R { + SREN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - RUN indicates the current DAC1 operation status"] #[inline(always)] - pub fn run(&self) -> RunR { - RunR::new(((self.bits >> 31) & 1) != 0) + pub fn run(&self) -> RUN_R { + RUN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] #[must_use] - pub fn freq(&mut self) -> FreqW { - FreqW::new(self, 0) + pub fn freq(&mut self) -> FREQ_W { + FREQ_W::new(self, 0) } #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> ModeW { - ModeW::new(self, 20) + pub fn mode(&mut self) -> MODE_W { + MODE_W::new(self, 20) } #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"] #[inline(always)] #[must_use] - pub fn sign(&mut self) -> SignW { - SignW::new(self, 23) + pub fn sign(&mut self) -> SIGN_W { + SIGN_W::new(self, 23) } #[doc = "Bit 28 - Negates the DAC1 output"] #[inline(always)] #[must_use] - pub fn negate(&mut self) -> NegateW { - NegateW::new(self, 28) + pub fn negate(&mut self) -> NEGATE_W { + NEGATE_W::new(self, 28) } #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"] #[inline(always)] #[must_use] - pub fn signen(&mut self) -> SignenW { - SignenW::new(self, 29) + pub fn signen(&mut self) -> SIGNEN_W { + SIGNEN_W::new(self, 29) } #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"] #[inline(always)] #[must_use] - pub fn sren(&mut self) -> SrenW { - SrenW::new(self, 30) + pub fn sren(&mut self) -> SREN_W { + SREN_W::new(self, 30) } } #[doc = "DAC1 Configuration Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac1cfg0Spec; -impl crate::RegisterSpec for Dac1cfg0Spec { +pub struct DAC1CFG0_SPEC; +impl crate::RegisterSpec for DAC1CFG0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac1cfg0::R`](R) reader structure"] -impl crate::Readable for Dac1cfg0Spec {} +impl crate::Readable for DAC1CFG0_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac1cfg0::W`](W) writer structure"] -impl crate::Writable for Dac1cfg0Spec { +impl crate::Writable for DAC1CFG0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1CFG0 to value 0"] -impl crate::Resettable for Dac1cfg0Spec { +impl crate::Resettable for DAC1CFG0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1cfg1.rs b/src/dac/dac1cfg1.rs index 73b584c9..c910debf 100644 --- a/src/dac/dac1cfg1.rs +++ b/src/dac/dac1cfg1.rs @@ -1,100 +1,100 @@ #[doc = "Register `DAC1CFG1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1CFG1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Scale { +pub enum SCALE_A { #[doc = "0: no shift = multiplication/division by 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: shift by 1 = multiplication/division by 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: shift by 2 = multiplication/division by 4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: shift left by 3 = multiplication/division by 8"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: shift left by 4 = multiplication/division by 16"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: shift left by 5 = multiplication/division by 32"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: shift left by 6 = multiplication/division by 64"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: shift left by 7 = multiplication/division by 128"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Scale) -> Self { + fn from(variant: SCALE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Scale { +impl crate::FieldSpec for SCALE_A { type Ux = u8; } -impl crate::IsEnum for Scale {} +impl crate::IsEnum for SCALE_A {} #[doc = "Field `SCALE` reader - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] -pub type ScaleR = crate::FieldReader; -impl ScaleR { +pub type SCALE_R = crate::FieldReader; +impl SCALE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scale { + pub const fn variant(&self) -> SCALE_A { match self.bits { - 0 => Scale::Value1, - 1 => Scale::Value2, - 2 => Scale::Value3, - 3 => Scale::Value4, - 4 => Scale::Value5, - 5 => Scale::Value6, - 6 => Scale::Value7, - 7 => Scale::Value8, + 0 => SCALE_A::VALUE1, + 1 => SCALE_A::VALUE2, + 2 => SCALE_A::VALUE3, + 3 => SCALE_A::VALUE4, + 4 => SCALE_A::VALUE5, + 5 => SCALE_A::VALUE6, + 6 => SCALE_A::VALUE7, + 7 => SCALE_A::VALUE8, _ => unreachable!(), } } #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scale::Value1 + *self == SCALE_A::VALUE1 } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scale::Value2 + *self == SCALE_A::VALUE2 } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Scale::Value3 + *self == SCALE_A::VALUE3 } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Scale::Value4 + *self == SCALE_A::VALUE4 } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Scale::Value5 + *self == SCALE_A::VALUE5 } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Scale::Value6 + *self == SCALE_A::VALUE6 } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Scale::Value7 + *self == SCALE_A::VALUE7 } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Scale::Value8 + *self == SCALE_A::VALUE8 } } #[doc = "Field `SCALE` writer - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] -pub type ScaleW<'a, REG> = crate::FieldWriter<'a, REG, 3, Scale, crate::Safe>; -impl<'a, REG> ScaleW<'a, REG> +pub type SCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SCALE_A, crate::Safe>; +impl<'a, REG> SCALE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,162 +102,162 @@ where #[doc = "no shift = multiplication/division by 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scale::Value1) + self.variant(SCALE_A::VALUE1) } #[doc = "shift by 1 = multiplication/division by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scale::Value2) + self.variant(SCALE_A::VALUE2) } #[doc = "shift by 2 = multiplication/division by 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Scale::Value3) + self.variant(SCALE_A::VALUE3) } #[doc = "shift left by 3 = multiplication/division by 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Scale::Value4) + self.variant(SCALE_A::VALUE4) } #[doc = "shift left by 4 = multiplication/division by 16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Scale::Value5) + self.variant(SCALE_A::VALUE5) } #[doc = "shift left by 5 = multiplication/division by 32"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Scale::Value6) + self.variant(SCALE_A::VALUE6) } #[doc = "shift left by 6 = multiplication/division by 64"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Scale::Value7) + self.variant(SCALE_A::VALUE7) } #[doc = "shift left by 7 = multiplication/division by 128"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Scale::Value8) + self.variant(SCALE_A::VALUE8) } } #[doc = "Switch between up- and downscale of the DAC1 input data values\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Muldiv { +pub enum MULDIV_A { #[doc = "0: downscale = division (shift SCALE positions to the right)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: upscale = multiplication (shift SCALE positions to the left)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Muldiv) -> Self { + fn from(variant: MULDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MULDIV` reader - Switch between up- and downscale of the DAC1 input data values"] -pub type MuldivR = crate::BitReader; -impl MuldivR { +pub type MULDIV_R = crate::BitReader; +impl MULDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Muldiv { + pub const fn variant(&self) -> MULDIV_A { match self.bits { - false => Muldiv::Value1, - true => Muldiv::Value2, + false => MULDIV_A::VALUE1, + true => MULDIV_A::VALUE2, } } #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Muldiv::Value1 + *self == MULDIV_A::VALUE1 } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Muldiv::Value2 + *self == MULDIV_A::VALUE2 } } #[doc = "Field `MULDIV` writer - Switch between up- and downscale of the DAC1 input data values"] -pub type MuldivW<'a, REG> = crate::BitWriter<'a, REG, Muldiv>; -impl<'a, REG> MuldivW<'a, REG> +pub type MULDIV_W<'a, REG> = crate::BitWriter<'a, REG, MULDIV_A>; +impl<'a, REG> MULDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "downscale = division (shift SCALE positions to the right)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Muldiv::Value1) + self.variant(MULDIV_A::VALUE1) } #[doc = "upscale = multiplication (shift SCALE positions to the left)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Muldiv::Value2) + self.variant(MULDIV_A::VALUE2) } } #[doc = "Field `OFFS` reader - 8-bit offset value addition"] -pub type OffsR = crate::FieldReader; +pub type OFFS_R = crate::FieldReader; #[doc = "Field `OFFS` writer - 8-bit offset value addition"] -pub type OffsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type OFFS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `TRIGSEL` reader - Selects one of the eight external trigger sources for DAC1"] -pub type TrigselR = crate::FieldReader; +pub type TRIGSEL_R = crate::FieldReader; #[doc = "Field `TRIGSEL` writer - Selects one of the eight external trigger sources for DAC1"] -pub type TrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SWTRIG` reader - Software Trigger"] -pub type SwtrigR = crate::BitReader; +pub type SWTRIG_R = crate::BitReader; #[doc = "Field `SWTRIG` writer - Software Trigger"] -pub type SwtrigW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SWTRIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Select the trigger source for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trigmod { +pub enum TRIGMOD_A { #[doc = "0: internal Trigger (integer divided clock - see FREQ parameter)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: external Trigger (preselected trigger by TRIGSEL parameter)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: software Trigger (see SWTRIG parameter)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trigmod) -> Self { + fn from(variant: TRIGMOD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trigmod { +impl crate::FieldSpec for TRIGMOD_A { type Ux = u8; } -impl crate::IsEnum for Trigmod {} +impl crate::IsEnum for TRIGMOD_A {} #[doc = "Field `TRIGMOD` reader - Select the trigger source for channel 1"] -pub type TrigmodR = crate::FieldReader; -impl TrigmodR { +pub type TRIGMOD_R = crate::FieldReader; +impl TRIGMOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Trigmod::Value1), - 1 => Some(Trigmod::Value2), - 2 => Some(Trigmod::Value3), + 0 => Some(TRIGMOD_A::VALUE1), + 1 => Some(TRIGMOD_A::VALUE2), + 2 => Some(TRIGMOD_A::VALUE3), _ => None, } } #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trigmod::Value1 + *self == TRIGMOD_A::VALUE1 } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trigmod::Value2 + *self == TRIGMOD_A::VALUE2 } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trigmod::Value3 + *self == TRIGMOD_A::VALUE3 } } #[doc = "Field `TRIGMOD` writer - Select the trigger source for channel 1"] -pub type TrigmodW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trigmod>; -impl<'a, REG> TrigmodW<'a, REG> +pub type TRIGMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRIGMOD_A>; +impl<'a, REG> TRIGMOD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -265,197 +265,197 @@ where #[doc = "internal Trigger (integer divided clock - see FREQ parameter)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trigmod::Value1) + self.variant(TRIGMOD_A::VALUE1) } #[doc = "external Trigger (preselected trigger by TRIGSEL parameter)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trigmod::Value2) + self.variant(TRIGMOD_A::VALUE2) } #[doc = "software Trigger (see SWTRIG parameter)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trigmod::Value3) + self.variant(TRIGMOD_A::VALUE3) } } #[doc = "Field `ANACFG` reader - DAC1 analog configuration/calibration parameters"] -pub type AnacfgR = crate::FieldReader; +pub type ANACFG_R = crate::FieldReader; #[doc = "Field `ANACFG` writer - DAC1 analog configuration/calibration parameters"] -pub type AnacfgW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ANACFG_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Enable analog DAC for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Anaen { +pub enum ANAEN_A { #[doc = "0: DAC1 is set to standby (analog output only)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable DAC1 (analog output only)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Anaen) -> Self { + fn from(variant: ANAEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ANAEN` reader - Enable analog DAC for channel 1"] -pub type AnaenR = crate::BitReader; -impl AnaenR { +pub type ANAEN_R = crate::BitReader; +impl ANAEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Anaen { + pub const fn variant(&self) -> ANAEN_A { match self.bits { - false => Anaen::Value1, - true => Anaen::Value2, + false => ANAEN_A::VALUE1, + true => ANAEN_A::VALUE2, } } #[doc = "DAC1 is set to standby (analog output only)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Anaen::Value1 + *self == ANAEN_A::VALUE1 } #[doc = "enable DAC1 (analog output only)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Anaen::Value2 + *self == ANAEN_A::VALUE2 } } #[doc = "Field `ANAEN` writer - Enable analog DAC for channel 1"] -pub type AnaenW<'a, REG> = crate::BitWriter<'a, REG, Anaen>; -impl<'a, REG> AnaenW<'a, REG> +pub type ANAEN_W<'a, REG> = crate::BitWriter<'a, REG, ANAEN_A>; +impl<'a, REG> ANAEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DAC1 is set to standby (analog output only)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Anaen::Value1) + self.variant(ANAEN_A::VALUE1) } #[doc = "enable DAC1 (analog output only)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Anaen::Value2) + self.variant(ANAEN_A::VALUE2) } } #[doc = "Field `REFCFGH` reader - Higher 4 band-gap configuration/calibration parameters"] -pub type RefcfghR = crate::FieldReader; +pub type REFCFGH_R = crate::FieldReader; #[doc = "Field `REFCFGH` writer - Higher 4 band-gap configuration/calibration parameters"] -pub type RefcfghW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REFCFGH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - pub fn scale(&self) -> ScaleR { - ScaleR::new((self.bits & 7) as u8) + pub fn scale(&self) -> SCALE_R { + SCALE_R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"] #[inline(always)] - pub fn muldiv(&self) -> MuldivR { - MuldivR::new(((self.bits >> 3) & 1) != 0) + pub fn muldiv(&self) -> MULDIV_R { + MULDIV_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - pub fn offs(&self) -> OffsR { - OffsR::new(((self.bits >> 4) & 0xff) as u8) + pub fn offs(&self) -> OFFS_R { + OFFS_R::new(((self.bits >> 4) & 0xff) as u8) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"] #[inline(always)] - pub fn trigsel(&self) -> TrigselR { - TrigselR::new(((self.bits >> 12) & 7) as u8) + pub fn trigsel(&self) -> TRIGSEL_R { + TRIGSEL_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - pub fn swtrig(&self) -> SwtrigR { - SwtrigR::new(((self.bits >> 16) & 1) != 0) + pub fn swtrig(&self) -> SWTRIG_R { + SWTRIG_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 17:18 - Select the trigger source for channel 1"] #[inline(always)] - pub fn trigmod(&self) -> TrigmodR { - TrigmodR::new(((self.bits >> 17) & 3) as u8) + pub fn trigmod(&self) -> TRIGMOD_R { + TRIGMOD_R::new(((self.bits >> 17) & 3) as u8) } #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"] #[inline(always)] - pub fn anacfg(&self) -> AnacfgR { - AnacfgR::new(((self.bits >> 19) & 0x1f) as u8) + pub fn anacfg(&self) -> ANACFG_R { + ANACFG_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bit 24 - Enable analog DAC for channel 1"] #[inline(always)] - pub fn anaen(&self) -> AnaenR { - AnaenR::new(((self.bits >> 24) & 1) != 0) + pub fn anaen(&self) -> ANAEN_R { + ANAEN_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"] #[inline(always)] - pub fn refcfgh(&self) -> RefcfghR { - RefcfghR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn refcfgh(&self) -> REFCFGH_R { + REFCFGH_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] #[must_use] - pub fn scale(&mut self) -> ScaleW { - ScaleW::new(self, 0) + pub fn scale(&mut self) -> SCALE_W { + SCALE_W::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"] #[inline(always)] #[must_use] - pub fn muldiv(&mut self) -> MuldivW { - MuldivW::new(self, 3) + pub fn muldiv(&mut self) -> MULDIV_W { + MULDIV_W::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] #[must_use] - pub fn offs(&mut self) -> OffsW { - OffsW::new(self, 4) + pub fn offs(&mut self) -> OFFS_W { + OFFS_W::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"] #[inline(always)] #[must_use] - pub fn trigsel(&mut self) -> TrigselW { - TrigselW::new(self, 12) + pub fn trigsel(&mut self) -> TRIGSEL_W { + TRIGSEL_W::new(self, 12) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] #[must_use] - pub fn swtrig(&mut self) -> SwtrigW { - SwtrigW::new(self, 16) + pub fn swtrig(&mut self) -> SWTRIG_W { + SWTRIG_W::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 1"] #[inline(always)] #[must_use] - pub fn trigmod(&mut self) -> TrigmodW { - TrigmodW::new(self, 17) + pub fn trigmod(&mut self) -> TRIGMOD_W { + TRIGMOD_W::new(self, 17) } #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn anacfg(&mut self) -> AnacfgW { - AnacfgW::new(self, 19) + pub fn anacfg(&mut self) -> ANACFG_W { + ANACFG_W::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 1"] #[inline(always)] #[must_use] - pub fn anaen(&mut self) -> AnaenW { - AnaenW::new(self, 24) + pub fn anaen(&mut self) -> ANAEN_W { + ANAEN_W::new(self, 24) } #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"] #[inline(always)] #[must_use] - pub fn refcfgh(&mut self) -> RefcfghW { - RefcfghW::new(self, 28) + pub fn refcfgh(&mut self) -> REFCFGH_W { + REFCFGH_W::new(self, 28) } } #[doc = "DAC1 Configuration Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac1cfg1Spec; -impl crate::RegisterSpec for Dac1cfg1Spec { +pub struct DAC1CFG1_SPEC; +impl crate::RegisterSpec for DAC1CFG1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac1cfg1::R`](R) reader structure"] -impl crate::Readable for Dac1cfg1Spec {} +impl crate::Readable for DAC1CFG1_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac1cfg1::W`](W) writer structure"] -impl crate::Writable for Dac1cfg1Spec { +impl crate::Writable for DAC1CFG1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1CFG1 to value 0"] -impl crate::Resettable for Dac1cfg1Spec { +impl crate::Resettable for DAC1CFG1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1data.rs b/src/dac/dac1data.rs index e8f0f305..38dd8c1e 100644 --- a/src/dac/dac1data.rs +++ b/src/dac/dac1data.rs @@ -1,40 +1,40 @@ #[doc = "Register `DAC1DATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1DATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA1` reader - DAC1 Data Bits"] -pub type Data1R = crate::FieldReader; +pub type DATA1_R = crate::FieldReader; #[doc = "Field `DATA1` writer - DAC1 Data Bits"] -pub type Data1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DATA1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - DAC1 Data Bits"] #[inline(always)] - pub fn data1(&self) -> Data1R { - Data1R::new((self.bits & 0x0fff) as u16) + pub fn data1(&self) -> DATA1_R { + DATA1_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC1 Data Bits"] #[inline(always)] #[must_use] - pub fn data1(&mut self) -> Data1W { - Data1W::new(self, 0) + pub fn data1(&mut self) -> DATA1_W { + DATA1_W::new(self, 0) } } #[doc = "DAC1 Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1data::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1data::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac1dataSpec; -impl crate::RegisterSpec for Dac1dataSpec { +pub struct DAC1DATA_SPEC; +impl crate::RegisterSpec for DAC1DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac1data::R`](R) reader structure"] -impl crate::Readable for Dac1dataSpec {} +impl crate::Readable for DAC1DATA_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac1data::W`](W) writer structure"] -impl crate::Writable for Dac1dataSpec { +impl crate::Writable for DAC1DATA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1DATA to value 0"] -impl crate::Resettable for Dac1dataSpec { +impl crate::Resettable for DAC1DATA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dac/dac1path.rs b/src/dac/dac1path.rs index 9342b7db..39a54f67 100644 --- a/src/dac/dac1path.rs +++ b/src/dac/dac1path.rs @@ -1,70 +1,70 @@ #[doc = "Register `DAC1PATH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1PATH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT6` reader - Pattern Number 6 for PATGEN of DAC1"] -pub type Pat6R = crate::FieldReader; +pub type PAT6_R = crate::FieldReader; #[doc = "Field `PAT6` writer - Pattern Number 6 for PATGEN of DAC1"] -pub type Pat6W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT6_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT7` reader - Pattern Number 7 for PATGEN of DAC1"] -pub type Pat7R = crate::FieldReader; +pub type PAT7_R = crate::FieldReader; #[doc = "Field `PAT7` writer - Pattern Number 7 for PATGEN of DAC1"] -pub type Pat7W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT7_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT8` reader - Pattern Number 8 for PATGEN of DAC1"] -pub type Pat8R = crate::FieldReader; +pub type PAT8_R = crate::FieldReader; #[doc = "Field `PAT8` writer - Pattern Number 8 for PATGEN of DAC1"] -pub type Pat8W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT8_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"] #[inline(always)] - pub fn pat6(&self) -> Pat6R { - Pat6R::new((self.bits & 0x1f) as u8) + pub fn pat6(&self) -> PAT6_R { + PAT6_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"] #[inline(always)] - pub fn pat7(&self) -> Pat7R { - Pat7R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat7(&self) -> PAT7_R { + PAT7_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"] #[inline(always)] - pub fn pat8(&self) -> Pat8R { - Pat8R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat8(&self) -> PAT8_R { + PAT8_R::new(((self.bits >> 10) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat6(&mut self) -> Pat6W { - Pat6W::new(self, 0) + pub fn pat6(&mut self) -> PAT6_W { + PAT6_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat7(&mut self) -> Pat7W { - Pat7W::new(self, 5) + pub fn pat7(&mut self) -> PAT7_W { + PAT7_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat8(&mut self) -> Pat8W { - Pat8W::new(self, 10) + pub fn pat8(&mut self) -> PAT8_W { + PAT8_W::new(self, 10) } } #[doc = "DAC1 Higher Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1path::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1path::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac1pathSpec; -impl crate::RegisterSpec for Dac1pathSpec { +pub struct DAC1PATH_SPEC; +impl crate::RegisterSpec for DAC1PATH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac1path::R`](R) reader structure"] -impl crate::Readable for Dac1pathSpec {} +impl crate::Readable for DAC1PATH_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac1path::W`](W) writer structure"] -impl crate::Writable for Dac1pathSpec { +impl crate::Writable for DAC1PATH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1PATH to value 0x7fdd"] -impl crate::Resettable for Dac1pathSpec { +impl crate::Resettable for DAC1PATH_SPEC { const RESET_VALUE: u32 = 0x7fdd; } diff --git a/src/dac/dac1patl.rs b/src/dac/dac1patl.rs index b75a28ca..b3a7683b 100644 --- a/src/dac/dac1patl.rs +++ b/src/dac/dac1patl.rs @@ -1,115 +1,115 @@ #[doc = "Register `DAC1PATL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAC1PATL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PAT0` reader - Pattern Number 0 for PATGEN of DAC1"] -pub type Pat0R = crate::FieldReader; +pub type PAT0_R = crate::FieldReader; #[doc = "Field `PAT0` writer - Pattern Number 0 for PATGEN of DAC1"] -pub type Pat0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT1` reader - Pattern Number 1 for PATGEN of DAC1"] -pub type Pat1R = crate::FieldReader; +pub type PAT1_R = crate::FieldReader; #[doc = "Field `PAT1` writer - Pattern Number 1 for PATGEN of DAC1"] -pub type Pat1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT2` reader - Pattern Number 2 for PATGEN of DAC1"] -pub type Pat2R = crate::FieldReader; +pub type PAT2_R = crate::FieldReader; #[doc = "Field `PAT2` writer - Pattern Number 2 for PATGEN of DAC1"] -pub type Pat2W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT2_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT3` reader - Pattern Number 3 for PATGEN of DAC1"] -pub type Pat3R = crate::FieldReader; +pub type PAT3_R = crate::FieldReader; #[doc = "Field `PAT3` writer - Pattern Number 3 for PATGEN of DAC1"] -pub type Pat3W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT3_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT4` reader - Pattern Number 4 for PATGEN of DAC1"] -pub type Pat4R = crate::FieldReader; +pub type PAT4_R = crate::FieldReader; #[doc = "Field `PAT4` writer - Pattern Number 4 for PATGEN of DAC1"] -pub type Pat4W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT4_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PAT5` reader - Pattern Number 5 for PATGEN of DAC1"] -pub type Pat5R = crate::FieldReader; +pub type PAT5_R = crate::FieldReader; #[doc = "Field `PAT5` writer - Pattern Number 5 for PATGEN of DAC1"] -pub type Pat5W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type PAT5_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"] #[inline(always)] - pub fn pat0(&self) -> Pat0R { - Pat0R::new((self.bits & 0x1f) as u8) + pub fn pat0(&self) -> PAT0_R { + PAT0_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"] #[inline(always)] - pub fn pat1(&self) -> Pat1R { - Pat1R::new(((self.bits >> 5) & 0x1f) as u8) + pub fn pat1(&self) -> PAT1_R { + PAT1_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"] #[inline(always)] - pub fn pat2(&self) -> Pat2R { - Pat2R::new(((self.bits >> 10) & 0x1f) as u8) + pub fn pat2(&self) -> PAT2_R { + PAT2_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"] #[inline(always)] - pub fn pat3(&self) -> Pat3R { - Pat3R::new(((self.bits >> 15) & 0x1f) as u8) + pub fn pat3(&self) -> PAT3_R { + PAT3_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"] #[inline(always)] - pub fn pat4(&self) -> Pat4R { - Pat4R::new(((self.bits >> 20) & 0x1f) as u8) + pub fn pat4(&self) -> PAT4_R { + PAT4_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"] #[inline(always)] - pub fn pat5(&self) -> Pat5R { - Pat5R::new(((self.bits >> 25) & 0x1f) as u8) + pub fn pat5(&self) -> PAT5_R { + PAT5_R::new(((self.bits >> 25) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat0(&mut self) -> Pat0W { - Pat0W::new(self, 0) + pub fn pat0(&mut self) -> PAT0_W { + PAT0_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat1(&mut self) -> Pat1W { - Pat1W::new(self, 5) + pub fn pat1(&mut self) -> PAT1_W { + PAT1_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat2(&mut self) -> Pat2W { - Pat2W::new(self, 10) + pub fn pat2(&mut self) -> PAT2_W { + PAT2_W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat3(&mut self) -> Pat3W { - Pat3W::new(self, 15) + pub fn pat3(&mut self) -> PAT3_W { + PAT3_W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat4(&mut self) -> Pat4W { - Pat4W::new(self, 20) + pub fn pat4(&mut self) -> PAT4_W { + PAT4_W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"] #[inline(always)] #[must_use] - pub fn pat5(&mut self) -> Pat5W { - Pat5W::new(self, 25) + pub fn pat5(&mut self) -> PAT5_W { + PAT5_W::new(self, 25) } } #[doc = "DAC1 Lower Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac1patl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac1patl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dac1patlSpec; -impl crate::RegisterSpec for Dac1patlSpec { +pub struct DAC1PATL_SPEC; +impl crate::RegisterSpec for DAC1PATL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dac1patl::R`](R) reader structure"] -impl crate::Readable for Dac1patlSpec {} +impl crate::Readable for DAC1PATL_SPEC {} #[doc = "`write(|w| ..)` method takes [`dac1patl::W`](W) writer structure"] -impl crate::Writable for Dac1patlSpec { +impl crate::Writable for DAC1PATL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAC1PATL to value 0x3568_b0c0"] -impl crate::Resettable for Dac1patlSpec { +impl crate::Resettable for DAC1PATL_SPEC { const RESET_VALUE: u32 = 0x3568_b0c0; } diff --git a/src/dac/id.rs b/src/dac/id.rs index 45285c85..e7416a95 100644 --- a/src/dac/id.rs +++ b/src/dac/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type ModrR = crate::FieldReader; +pub type MODR_R = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type ModtR = crate::FieldReader; +pub type MODT_R = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type ModnR = crate::FieldReader; +pub type MODN_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> ModrR { - ModrR::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> MODR_R { + MODR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> ModtR { - ModtR::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> MODT_R { + MODT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> ModnR { - ModnR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> MODN_R { + MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00a5_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00a5_c000; } diff --git a/src/dlr.rs b/src/dlr.rs index b742ccf9..08a8d556 100644 --- a/src/dlr.rs +++ b/src/dlr.rs @@ -1,55 +1,51 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - ovrstat: Ovrstat, - ovrclr: Ovrclr, - srsel0: Srsel0, + ovrstat: OVRSTAT, + ovrclr: OVRCLR, + srsel0: SRSEL0, _reserved3: [u8; 0x04], - lnen: Lnen, + lnen: LNEN, } impl RegisterBlock { #[doc = "0x00 - Overrun Status"] #[inline(always)] - pub const fn ovrstat(&self) -> &Ovrstat { + pub const fn ovrstat(&self) -> &OVRSTAT { &self.ovrstat } #[doc = "0x04 - Overrun Clear"] #[inline(always)] - pub const fn ovrclr(&self) -> &Ovrclr { + pub const fn ovrclr(&self) -> &OVRCLR { &self.ovrclr } #[doc = "0x08 - Service Request Selection 0"] #[inline(always)] - pub const fn srsel0(&self) -> &Srsel0 { + pub const fn srsel0(&self) -> &SRSEL0 { &self.srsel0 } #[doc = "0x10 - Line Enable"] #[inline(always)] - pub const fn lnen(&self) -> &Lnen { + pub const fn lnen(&self) -> &LNEN { &self.lnen } } #[doc = "OVRSTAT (r) register accessor: Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrstat`] module"] -#[doc(alias = "OVRSTAT")] -pub type Ovrstat = crate::Reg; +pub type OVRSTAT = crate::Reg; #[doc = "Overrun Status"] pub mod ovrstat; #[doc = "OVRCLR (w) register accessor: Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ovrclr`] module"] -#[doc(alias = "OVRCLR")] -pub type Ovrclr = crate::Reg; +pub type OVRCLR = crate::Reg; #[doc = "Overrun Clear"] pub mod ovrclr; #[doc = "SRSEL0 (rw) register accessor: Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srsel0`] module"] -#[doc(alias = "SRSEL0")] -pub type Srsel0 = crate::Reg; +pub type SRSEL0 = crate::Reg; #[doc = "Service Request Selection 0"] pub mod srsel0; #[doc = "LNEN (rw) register accessor: Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lnen`] module"] -#[doc(alias = "LNEN")] -pub type Lnen = crate::Reg; +pub type LNEN = crate::Reg; #[doc = "Line Enable"] pub mod lnen; diff --git a/src/dlr/lnen.rs b/src/dlr/lnen.rs index 9119bc4b..e4c2e215 100644 --- a/src/dlr/lnen.rs +++ b/src/dlr/lnen.rs @@ -1,537 +1,537 @@ #[doc = "Register `LNEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LNEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Line 0 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln0 { +pub enum LN0_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln0) -> Self { + fn from(variant: LN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN0` reader - Line 0 Enable"] -pub type Ln0R = crate::BitReader; -impl Ln0R { +pub type LN0_R = crate::BitReader; +impl LN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln0 { + pub const fn variant(&self) -> LN0_A { match self.bits { - false => Ln0::Value1, - true => Ln0::Value2, + false => LN0_A::VALUE1, + true => LN0_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln0::Value1 + *self == LN0_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln0::Value2 + *self == LN0_A::VALUE2 } } #[doc = "Field `LN0` writer - Line 0 Enable"] -pub type Ln0W<'a, REG> = crate::BitWriter<'a, REG, Ln0>; -impl<'a, REG> Ln0W<'a, REG> +pub type LN0_W<'a, REG> = crate::BitWriter<'a, REG, LN0_A>; +impl<'a, REG> LN0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln0::Value1) + self.variant(LN0_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln0::Value2) + self.variant(LN0_A::VALUE2) } } #[doc = "Line 1 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln1 { +pub enum LN1_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln1) -> Self { + fn from(variant: LN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN1` reader - Line 1 Enable"] -pub type Ln1R = crate::BitReader; -impl Ln1R { +pub type LN1_R = crate::BitReader; +impl LN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln1 { + pub const fn variant(&self) -> LN1_A { match self.bits { - false => Ln1::Value1, - true => Ln1::Value2, + false => LN1_A::VALUE1, + true => LN1_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln1::Value1 + *self == LN1_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln1::Value2 + *self == LN1_A::VALUE2 } } #[doc = "Field `LN1` writer - Line 1 Enable"] -pub type Ln1W<'a, REG> = crate::BitWriter<'a, REG, Ln1>; -impl<'a, REG> Ln1W<'a, REG> +pub type LN1_W<'a, REG> = crate::BitWriter<'a, REG, LN1_A>; +impl<'a, REG> LN1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln1::Value1) + self.variant(LN1_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln1::Value2) + self.variant(LN1_A::VALUE2) } } #[doc = "Line 2 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln2 { +pub enum LN2_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln2) -> Self { + fn from(variant: LN2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN2` reader - Line 2 Enable"] -pub type Ln2R = crate::BitReader; -impl Ln2R { +pub type LN2_R = crate::BitReader; +impl LN2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln2 { + pub const fn variant(&self) -> LN2_A { match self.bits { - false => Ln2::Value1, - true => Ln2::Value2, + false => LN2_A::VALUE1, + true => LN2_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln2::Value1 + *self == LN2_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln2::Value2 + *self == LN2_A::VALUE2 } } #[doc = "Field `LN2` writer - Line 2 Enable"] -pub type Ln2W<'a, REG> = crate::BitWriter<'a, REG, Ln2>; -impl<'a, REG> Ln2W<'a, REG> +pub type LN2_W<'a, REG> = crate::BitWriter<'a, REG, LN2_A>; +impl<'a, REG> LN2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln2::Value1) + self.variant(LN2_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln2::Value2) + self.variant(LN2_A::VALUE2) } } #[doc = "Line 3 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln3 { +pub enum LN3_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln3) -> Self { + fn from(variant: LN3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN3` reader - Line 3 Enable"] -pub type Ln3R = crate::BitReader; -impl Ln3R { +pub type LN3_R = crate::BitReader; +impl LN3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln3 { + pub const fn variant(&self) -> LN3_A { match self.bits { - false => Ln3::Value1, - true => Ln3::Value2, + false => LN3_A::VALUE1, + true => LN3_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln3::Value1 + *self == LN3_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln3::Value2 + *self == LN3_A::VALUE2 } } #[doc = "Field `LN3` writer - Line 3 Enable"] -pub type Ln3W<'a, REG> = crate::BitWriter<'a, REG, Ln3>; -impl<'a, REG> Ln3W<'a, REG> +pub type LN3_W<'a, REG> = crate::BitWriter<'a, REG, LN3_A>; +impl<'a, REG> LN3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln3::Value1) + self.variant(LN3_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln3::Value2) + self.variant(LN3_A::VALUE2) } } #[doc = "Line 4 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln4 { +pub enum LN4_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln4) -> Self { + fn from(variant: LN4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN4` reader - Line 4 Enable"] -pub type Ln4R = crate::BitReader; -impl Ln4R { +pub type LN4_R = crate::BitReader; +impl LN4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln4 { + pub const fn variant(&self) -> LN4_A { match self.bits { - false => Ln4::Value1, - true => Ln4::Value2, + false => LN4_A::VALUE1, + true => LN4_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln4::Value1 + *self == LN4_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln4::Value2 + *self == LN4_A::VALUE2 } } #[doc = "Field `LN4` writer - Line 4 Enable"] -pub type Ln4W<'a, REG> = crate::BitWriter<'a, REG, Ln4>; -impl<'a, REG> Ln4W<'a, REG> +pub type LN4_W<'a, REG> = crate::BitWriter<'a, REG, LN4_A>; +impl<'a, REG> LN4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln4::Value1) + self.variant(LN4_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln4::Value2) + self.variant(LN4_A::VALUE2) } } #[doc = "Line 5 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln5 { +pub enum LN5_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln5) -> Self { + fn from(variant: LN5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN5` reader - Line 5 Enable"] -pub type Ln5R = crate::BitReader; -impl Ln5R { +pub type LN5_R = crate::BitReader; +impl LN5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln5 { + pub const fn variant(&self) -> LN5_A { match self.bits { - false => Ln5::Value1, - true => Ln5::Value2, + false => LN5_A::VALUE1, + true => LN5_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln5::Value1 + *self == LN5_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln5::Value2 + *self == LN5_A::VALUE2 } } #[doc = "Field `LN5` writer - Line 5 Enable"] -pub type Ln5W<'a, REG> = crate::BitWriter<'a, REG, Ln5>; -impl<'a, REG> Ln5W<'a, REG> +pub type LN5_W<'a, REG> = crate::BitWriter<'a, REG, LN5_A>; +impl<'a, REG> LN5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln5::Value1) + self.variant(LN5_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln5::Value2) + self.variant(LN5_A::VALUE2) } } #[doc = "Line 6 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln6 { +pub enum LN6_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln6) -> Self { + fn from(variant: LN6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN6` reader - Line 6 Enable"] -pub type Ln6R = crate::BitReader; -impl Ln6R { +pub type LN6_R = crate::BitReader; +impl LN6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln6 { + pub const fn variant(&self) -> LN6_A { match self.bits { - false => Ln6::Value1, - true => Ln6::Value2, + false => LN6_A::VALUE1, + true => LN6_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln6::Value1 + *self == LN6_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln6::Value2 + *self == LN6_A::VALUE2 } } #[doc = "Field `LN6` writer - Line 6 Enable"] -pub type Ln6W<'a, REG> = crate::BitWriter<'a, REG, Ln6>; -impl<'a, REG> Ln6W<'a, REG> +pub type LN6_W<'a, REG> = crate::BitWriter<'a, REG, LN6_A>; +impl<'a, REG> LN6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln6::Value1) + self.variant(LN6_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln6::Value2) + self.variant(LN6_A::VALUE2) } } #[doc = "Line 7 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ln7 { +pub enum LN7_A { #[doc = "0: Disables the line"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables the line and resets a pending request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ln7) -> Self { + fn from(variant: LN7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LN7` reader - Line 7 Enable"] -pub type Ln7R = crate::BitReader; -impl Ln7R { +pub type LN7_R = crate::BitReader; +impl LN7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ln7 { + pub const fn variant(&self) -> LN7_A { match self.bits { - false => Ln7::Value1, - true => Ln7::Value2, + false => LN7_A::VALUE1, + true => LN7_A::VALUE2, } } #[doc = "Disables the line"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ln7::Value1 + *self == LN7_A::VALUE1 } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ln7::Value2 + *self == LN7_A::VALUE2 } } #[doc = "Field `LN7` writer - Line 7 Enable"] -pub type Ln7W<'a, REG> = crate::BitWriter<'a, REG, Ln7>; -impl<'a, REG> Ln7W<'a, REG> +pub type LN7_W<'a, REG> = crate::BitWriter<'a, REG, LN7_A>; +impl<'a, REG> LN7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables the line"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ln7::Value1) + self.variant(LN7_A::VALUE1) } #[doc = "Enables the line and resets a pending request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ln7::Value2) + self.variant(LN7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Line 0 Enable"] #[inline(always)] - pub fn ln0(&self) -> Ln0R { - Ln0R::new((self.bits & 1) != 0) + pub fn ln0(&self) -> LN0_R { + LN0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Line 1 Enable"] #[inline(always)] - pub fn ln1(&self) -> Ln1R { - Ln1R::new(((self.bits >> 1) & 1) != 0) + pub fn ln1(&self) -> LN1_R { + LN1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Line 2 Enable"] #[inline(always)] - pub fn ln2(&self) -> Ln2R { - Ln2R::new(((self.bits >> 2) & 1) != 0) + pub fn ln2(&self) -> LN2_R { + LN2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Line 3 Enable"] #[inline(always)] - pub fn ln3(&self) -> Ln3R { - Ln3R::new(((self.bits >> 3) & 1) != 0) + pub fn ln3(&self) -> LN3_R { + LN3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Line 4 Enable"] #[inline(always)] - pub fn ln4(&self) -> Ln4R { - Ln4R::new(((self.bits >> 4) & 1) != 0) + pub fn ln4(&self) -> LN4_R { + LN4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Line 5 Enable"] #[inline(always)] - pub fn ln5(&self) -> Ln5R { - Ln5R::new(((self.bits >> 5) & 1) != 0) + pub fn ln5(&self) -> LN5_R { + LN5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Line 6 Enable"] #[inline(always)] - pub fn ln6(&self) -> Ln6R { - Ln6R::new(((self.bits >> 6) & 1) != 0) + pub fn ln6(&self) -> LN6_R { + LN6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Line 7 Enable"] #[inline(always)] - pub fn ln7(&self) -> Ln7R { - Ln7R::new(((self.bits >> 7) & 1) != 0) + pub fn ln7(&self) -> LN7_R { + LN7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Line 0 Enable"] #[inline(always)] #[must_use] - pub fn ln0(&mut self) -> Ln0W { - Ln0W::new(self, 0) + pub fn ln0(&mut self) -> LN0_W { + LN0_W::new(self, 0) } #[doc = "Bit 1 - Line 1 Enable"] #[inline(always)] #[must_use] - pub fn ln1(&mut self) -> Ln1W { - Ln1W::new(self, 1) + pub fn ln1(&mut self) -> LN1_W { + LN1_W::new(self, 1) } #[doc = "Bit 2 - Line 2 Enable"] #[inline(always)] #[must_use] - pub fn ln2(&mut self) -> Ln2W { - Ln2W::new(self, 2) + pub fn ln2(&mut self) -> LN2_W { + LN2_W::new(self, 2) } #[doc = "Bit 3 - Line 3 Enable"] #[inline(always)] #[must_use] - pub fn ln3(&mut self) -> Ln3W { - Ln3W::new(self, 3) + pub fn ln3(&mut self) -> LN3_W { + LN3_W::new(self, 3) } #[doc = "Bit 4 - Line 4 Enable"] #[inline(always)] #[must_use] - pub fn ln4(&mut self) -> Ln4W { - Ln4W::new(self, 4) + pub fn ln4(&mut self) -> LN4_W { + LN4_W::new(self, 4) } #[doc = "Bit 5 - Line 5 Enable"] #[inline(always)] #[must_use] - pub fn ln5(&mut self) -> Ln5W { - Ln5W::new(self, 5) + pub fn ln5(&mut self) -> LN5_W { + LN5_W::new(self, 5) } #[doc = "Bit 6 - Line 6 Enable"] #[inline(always)] #[must_use] - pub fn ln6(&mut self) -> Ln6W { - Ln6W::new(self, 6) + pub fn ln6(&mut self) -> LN6_W { + LN6_W::new(self, 6) } #[doc = "Bit 7 - Line 7 Enable"] #[inline(always)] #[must_use] - pub fn ln7(&mut self) -> Ln7W { - Ln7W::new(self, 7) + pub fn ln7(&mut self) -> LN7_W { + LN7_W::new(self, 7) } } #[doc = "Line Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lnen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lnen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LnenSpec; -impl crate::RegisterSpec for LnenSpec { +pub struct LNEN_SPEC; +impl crate::RegisterSpec for LNEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lnen::R`](R) reader structure"] -impl crate::Readable for LnenSpec {} +impl crate::Readable for LNEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`lnen::W`](W) writer structure"] -impl crate::Writable for LnenSpec { +impl crate::Writable for LNEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LNEN to value 0"] -impl crate::Resettable for LnenSpec { +impl crate::Resettable for LNEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/ovrclr.rs b/src/dlr/ovrclr.rs index d6d7c24b..442291b4 100644 --- a/src/dlr/ovrclr.rs +++ b/src/dlr/ovrclr.rs @@ -1,83 +1,83 @@ #[doc = "Register `OVRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LN0` writer - Line 0 Overrun Status Clear"] -pub type Ln0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN1` writer - Line 1 Overrun Status Clear"] -pub type Ln1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN2` writer - Line 2 Overrun Status Clear"] -pub type Ln2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN3` writer - Line 3 Overrun Status Clear"] -pub type Ln3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN4` writer - Line 4 Overrun Status Clear"] -pub type Ln4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN5` writer - Line 5 Overrun Status Clear"] -pub type Ln5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN6` writer - Line 6 Overrun Status Clear"] -pub type Ln6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LN7` writer - Line 7 Overrun Status Clear"] -pub type Ln7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type LN7_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Line 0 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln0(&mut self) -> Ln0W { - Ln0W::new(self, 0) + pub fn ln0(&mut self) -> LN0_W { + LN0_W::new(self, 0) } #[doc = "Bit 1 - Line 1 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln1(&mut self) -> Ln1W { - Ln1W::new(self, 1) + pub fn ln1(&mut self) -> LN1_W { + LN1_W::new(self, 1) } #[doc = "Bit 2 - Line 2 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln2(&mut self) -> Ln2W { - Ln2W::new(self, 2) + pub fn ln2(&mut self) -> LN2_W { + LN2_W::new(self, 2) } #[doc = "Bit 3 - Line 3 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln3(&mut self) -> Ln3W { - Ln3W::new(self, 3) + pub fn ln3(&mut self) -> LN3_W { + LN3_W::new(self, 3) } #[doc = "Bit 4 - Line 4 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln4(&mut self) -> Ln4W { - Ln4W::new(self, 4) + pub fn ln4(&mut self) -> LN4_W { + LN4_W::new(self, 4) } #[doc = "Bit 5 - Line 5 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln5(&mut self) -> Ln5W { - Ln5W::new(self, 5) + pub fn ln5(&mut self) -> LN5_W { + LN5_W::new(self, 5) } #[doc = "Bit 6 - Line 6 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln6(&mut self) -> Ln6W { - Ln6W::new(self, 6) + pub fn ln6(&mut self) -> LN6_W { + LN6_W::new(self, 6) } #[doc = "Bit 7 - Line 7 Overrun Status Clear"] #[inline(always)] #[must_use] - pub fn ln7(&mut self) -> Ln7W { - Ln7W::new(self, 7) + pub fn ln7(&mut self) -> LN7_W { + LN7_W::new(self, 7) } } #[doc = "Overrun Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ovrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OvrclrSpec; -impl crate::RegisterSpec for OvrclrSpec { +pub struct OVRCLR_SPEC; +impl crate::RegisterSpec for OVRCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`ovrclr::W`](W) writer structure"] -impl crate::Writable for OvrclrSpec { +impl crate::Writable for OVRCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OVRCLR to value 0"] -impl crate::Resettable for OvrclrSpec { +impl crate::Resettable for OVRCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/ovrstat.rs b/src/dlr/ovrstat.rs index f1ebfa2f..1a203e97 100644 --- a/src/dlr/ovrstat.rs +++ b/src/dlr/ovrstat.rs @@ -1,71 +1,71 @@ #[doc = "Register `OVRSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `LN0` reader - Line 0 Overrun Status"] -pub type Ln0R = crate::BitReader; +pub type LN0_R = crate::BitReader; #[doc = "Field `LN1` reader - Line 1 Overrun Status"] -pub type Ln1R = crate::BitReader; +pub type LN1_R = crate::BitReader; #[doc = "Field `LN2` reader - Line 2 Overrun Status"] -pub type Ln2R = crate::BitReader; +pub type LN2_R = crate::BitReader; #[doc = "Field `LN3` reader - Line 3 Overrun Status"] -pub type Ln3R = crate::BitReader; +pub type LN3_R = crate::BitReader; #[doc = "Field `LN4` reader - Line 4 Overrun Status"] -pub type Ln4R = crate::BitReader; +pub type LN4_R = crate::BitReader; #[doc = "Field `LN5` reader - Line 5 Overrun Status"] -pub type Ln5R = crate::BitReader; +pub type LN5_R = crate::BitReader; #[doc = "Field `LN6` reader - Line 6 Overrun Status"] -pub type Ln6R = crate::BitReader; +pub type LN6_R = crate::BitReader; #[doc = "Field `LN7` reader - Line 7 Overrun Status"] -pub type Ln7R = crate::BitReader; +pub type LN7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Line 0 Overrun Status"] #[inline(always)] - pub fn ln0(&self) -> Ln0R { - Ln0R::new((self.bits & 1) != 0) + pub fn ln0(&self) -> LN0_R { + LN0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Line 1 Overrun Status"] #[inline(always)] - pub fn ln1(&self) -> Ln1R { - Ln1R::new(((self.bits >> 1) & 1) != 0) + pub fn ln1(&self) -> LN1_R { + LN1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Line 2 Overrun Status"] #[inline(always)] - pub fn ln2(&self) -> Ln2R { - Ln2R::new(((self.bits >> 2) & 1) != 0) + pub fn ln2(&self) -> LN2_R { + LN2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Line 3 Overrun Status"] #[inline(always)] - pub fn ln3(&self) -> Ln3R { - Ln3R::new(((self.bits >> 3) & 1) != 0) + pub fn ln3(&self) -> LN3_R { + LN3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Line 4 Overrun Status"] #[inline(always)] - pub fn ln4(&self) -> Ln4R { - Ln4R::new(((self.bits >> 4) & 1) != 0) + pub fn ln4(&self) -> LN4_R { + LN4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Line 5 Overrun Status"] #[inline(always)] - pub fn ln5(&self) -> Ln5R { - Ln5R::new(((self.bits >> 5) & 1) != 0) + pub fn ln5(&self) -> LN5_R { + LN5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Line 6 Overrun Status"] #[inline(always)] - pub fn ln6(&self) -> Ln6R { - Ln6R::new(((self.bits >> 6) & 1) != 0) + pub fn ln6(&self) -> LN6_R { + LN6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Line 7 Overrun Status"] #[inline(always)] - pub fn ln7(&self) -> Ln7R { - Ln7R::new(((self.bits >> 7) & 1) != 0) + pub fn ln7(&self) -> LN7_R { + LN7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Overrun Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ovrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OvrstatSpec; -impl crate::RegisterSpec for OvrstatSpec { +pub struct OVRSTAT_SPEC; +impl crate::RegisterSpec for OVRSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ovrstat::R`](R) reader structure"] -impl crate::Readable for OvrstatSpec {} +impl crate::Readable for OVRSTAT_SPEC {} #[doc = "`reset()` method sets OVRSTAT to value 0"] -impl crate::Resettable for OvrstatSpec { +impl crate::Resettable for OVRSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/dlr/srsel0.rs b/src/dlr/srsel0.rs index 666175ae..1e0cd9a5 100644 --- a/src/dlr/srsel0.rs +++ b/src/dlr/srsel0.rs @@ -1,145 +1,145 @@ #[doc = "Register `SRSEL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRSEL0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RS0` reader - Request Source for Line 0"] -pub type Rs0R = crate::FieldReader; +pub type RS0_R = crate::FieldReader; #[doc = "Field `RS0` writer - Request Source for Line 0"] -pub type Rs0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS1` reader - Request Source for Line 1"] -pub type Rs1R = crate::FieldReader; +pub type RS1_R = crate::FieldReader; #[doc = "Field `RS1` writer - Request Source for Line 1"] -pub type Rs1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS2` reader - Request Source for Line 2"] -pub type Rs2R = crate::FieldReader; +pub type RS2_R = crate::FieldReader; #[doc = "Field `RS2` writer - Request Source for Line 2"] -pub type Rs2W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS2_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS3` reader - Request Source for Line 3"] -pub type Rs3R = crate::FieldReader; +pub type RS3_R = crate::FieldReader; #[doc = "Field `RS3` writer - Request Source for Line 3"] -pub type Rs3W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS3_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS4` reader - Request Source for Line 4"] -pub type Rs4R = crate::FieldReader; +pub type RS4_R = crate::FieldReader; #[doc = "Field `RS4` writer - Request Source for Line 4"] -pub type Rs4W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS4_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS5` reader - Request Source for Line 5"] -pub type Rs5R = crate::FieldReader; +pub type RS5_R = crate::FieldReader; #[doc = "Field `RS5` writer - Request Source for Line 5"] -pub type Rs5W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS5_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS6` reader - Request Source for Line 6"] -pub type Rs6R = crate::FieldReader; +pub type RS6_R = crate::FieldReader; #[doc = "Field `RS6` writer - Request Source for Line 6"] -pub type Rs6W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS6_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `RS7` reader - Request Source for Line 7"] -pub type Rs7R = crate::FieldReader; +pub type RS7_R = crate::FieldReader; #[doc = "Field `RS7` writer - Request Source for Line 7"] -pub type Rs7W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type RS7_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Request Source for Line 0"] #[inline(always)] - pub fn rs0(&self) -> Rs0R { - Rs0R::new((self.bits & 0x0f) as u8) + pub fn rs0(&self) -> RS0_R { + RS0_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Request Source for Line 1"] #[inline(always)] - pub fn rs1(&self) -> Rs1R { - Rs1R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rs1(&self) -> RS1_R { + RS1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Request Source for Line 2"] #[inline(always)] - pub fn rs2(&self) -> Rs2R { - Rs2R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rs2(&self) -> RS2_R { + RS2_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Request Source for Line 3"] #[inline(always)] - pub fn rs3(&self) -> Rs3R { - Rs3R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rs3(&self) -> RS3_R { + RS3_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Request Source for Line 4"] #[inline(always)] - pub fn rs4(&self) -> Rs4R { - Rs4R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rs4(&self) -> RS4_R { + RS4_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Request Source for Line 5"] #[inline(always)] - pub fn rs5(&self) -> Rs5R { - Rs5R::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rs5(&self) -> RS5_R { + RS5_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Request Source for Line 6"] #[inline(always)] - pub fn rs6(&self) -> Rs6R { - Rs6R::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rs6(&self) -> RS6_R { + RS6_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Request Source for Line 7"] #[inline(always)] - pub fn rs7(&self) -> Rs7R { - Rs7R::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rs7(&self) -> RS7_R { + RS7_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Request Source for Line 0"] #[inline(always)] #[must_use] - pub fn rs0(&mut self) -> Rs0W { - Rs0W::new(self, 0) + pub fn rs0(&mut self) -> RS0_W { + RS0_W::new(self, 0) } #[doc = "Bits 4:7 - Request Source for Line 1"] #[inline(always)] #[must_use] - pub fn rs1(&mut self) -> Rs1W { - Rs1W::new(self, 4) + pub fn rs1(&mut self) -> RS1_W { + RS1_W::new(self, 4) } #[doc = "Bits 8:11 - Request Source for Line 2"] #[inline(always)] #[must_use] - pub fn rs2(&mut self) -> Rs2W { - Rs2W::new(self, 8) + pub fn rs2(&mut self) -> RS2_W { + RS2_W::new(self, 8) } #[doc = "Bits 12:15 - Request Source for Line 3"] #[inline(always)] #[must_use] - pub fn rs3(&mut self) -> Rs3W { - Rs3W::new(self, 12) + pub fn rs3(&mut self) -> RS3_W { + RS3_W::new(self, 12) } #[doc = "Bits 16:19 - Request Source for Line 4"] #[inline(always)] #[must_use] - pub fn rs4(&mut self) -> Rs4W { - Rs4W::new(self, 16) + pub fn rs4(&mut self) -> RS4_W { + RS4_W::new(self, 16) } #[doc = "Bits 20:23 - Request Source for Line 5"] #[inline(always)] #[must_use] - pub fn rs5(&mut self) -> Rs5W { - Rs5W::new(self, 20) + pub fn rs5(&mut self) -> RS5_W { + RS5_W::new(self, 20) } #[doc = "Bits 24:27 - Request Source for Line 6"] #[inline(always)] #[must_use] - pub fn rs6(&mut self) -> Rs6W { - Rs6W::new(self, 24) + pub fn rs6(&mut self) -> RS6_W { + RS6_W::new(self, 24) } #[doc = "Bits 28:31 - Request Source for Line 7"] #[inline(always)] #[must_use] - pub fn rs7(&mut self) -> Rs7W { - Rs7W::new(self, 28) + pub fn rs7(&mut self) -> RS7_W { + RS7_W::new(self, 28) } } #[doc = "Service Request Selection 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srsel0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srsel0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Srsel0Spec; -impl crate::RegisterSpec for Srsel0Spec { +pub struct SRSEL0_SPEC; +impl crate::RegisterSpec for SRSEL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srsel0::R`](R) reader structure"] -impl crate::Readable for Srsel0Spec {} +impl crate::Readable for SRSEL0_SPEC {} #[doc = "`write(|w| ..)` method takes [`srsel0::W`](W) writer structure"] -impl crate::Writable for Srsel0Spec { +impl crate::Writable for SRSEL0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRSEL0 to value 0"] -impl crate::Resettable for Srsel0Spec { +impl crate::Resettable for SRSEL0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/eru0.rs b/src/eru0.rs index ed352599..1a3ad6d9 100644 --- a/src/eru0.rs +++ b/src/eru0.rs @@ -1,55 +1,52 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - exisel: Exisel, + exisel: EXISEL, _reserved1: [u8; 0x0c], - exicon: [Exicon; 4], - exocon: [Exocon; 4], + exicon: [EXICON; 4], + exocon: [EXOCON; 4], } impl RegisterBlock { #[doc = "0x00 - Event Input Select"] #[inline(always)] - pub const fn exisel(&self) -> &Exisel { + pub const fn exisel(&self) -> &EXISEL { &self.exisel } #[doc = "0x10..0x20 - Event Input Control"] #[inline(always)] - pub const fn exicon(&self, n: usize) -> &Exicon { + pub const fn exicon(&self, n: usize) -> &EXICON { &self.exicon[n] } #[doc = "Iterator for array of:"] #[doc = "0x10..0x20 - Event Input Control"] #[inline(always)] - pub fn exicon_iter(&self) -> impl Iterator { + pub fn exicon_iter(&self) -> impl Iterator { self.exicon.iter() } #[doc = "0x20..0x30 - Event Output Trigger Control"] #[inline(always)] - pub const fn exocon(&self, n: usize) -> &Exocon { + pub const fn exocon(&self, n: usize) -> &EXOCON { &self.exocon[n] } #[doc = "Iterator for array of:"] #[doc = "0x20..0x30 - Event Output Trigger Control"] #[inline(always)] - pub fn exocon_iter(&self) -> impl Iterator { + pub fn exocon_iter(&self) -> impl Iterator { self.exocon.iter() } } #[doc = "EXISEL (rw) register accessor: Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exisel`] module"] -#[doc(alias = "EXISEL")] -pub type Exisel = crate::Reg; +pub type EXISEL = crate::Reg; #[doc = "Event Input Select"] pub mod exisel; #[doc = "EXICON (rw) register accessor: Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exicon`] module"] -#[doc(alias = "EXICON")] -pub type Exicon = crate::Reg; +pub type EXICON = crate::Reg; #[doc = "Event Input Control"] pub mod exicon; #[doc = "EXOCON (rw) register accessor: Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@exocon`] module"] -#[doc(alias = "EXOCON")] -pub type Exocon = crate::Reg; +pub type EXOCON = crate::Reg; #[doc = "Event Output Trigger Control"] pub mod exocon; diff --git a/src/eru0/exicon.rs b/src/eru0/exicon.rs index 2f7be1c6..b6e4b914 100644 --- a/src/eru0/exicon.rs +++ b/src/eru0/exicon.rs @@ -1,280 +1,280 @@ #[doc = "Register `EXICON[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXICON[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Output Trigger Pulse Enable for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pe { +pub enum PE_A { #[doc = "0: The trigger pulse generation is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The trigger pulse generation is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pe) -> Self { + fn from(variant: PE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PE` reader - Output Trigger Pulse Enable for ETLx"] -pub type PeR = crate::BitReader; -impl PeR { +pub type PE_R = crate::BitReader; +impl PE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pe { + pub const fn variant(&self) -> PE_A { match self.bits { - false => Pe::Value1, - true => Pe::Value2, + false => PE_A::VALUE1, + true => PE_A::VALUE2, } } #[doc = "The trigger pulse generation is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pe::Value1 + *self == PE_A::VALUE1 } #[doc = "The trigger pulse generation is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pe::Value2 + *self == PE_A::VALUE2 } } #[doc = "Field `PE` writer - Output Trigger Pulse Enable for ETLx"] -pub type PeW<'a, REG> = crate::BitWriter<'a, REG, Pe>; -impl<'a, REG> PeW<'a, REG> +pub type PE_W<'a, REG> = crate::BitWriter<'a, REG, PE_A>; +impl<'a, REG> PE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The trigger pulse generation is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pe::Value1) + self.variant(PE_A::VALUE1) } #[doc = "The trigger pulse generation is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pe::Value2) + self.variant(PE_A::VALUE2) } } #[doc = "Rebuild Level Detection for Status Flag for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ld { +pub enum LD_A { #[doc = "0: The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ld) -> Self { + fn from(variant: LD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LD` reader - Rebuild Level Detection for Status Flag for ETLx"] -pub type LdR = crate::BitReader; -impl LdR { +pub type LD_R = crate::BitReader; +impl LD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ld { + pub const fn variant(&self) -> LD_A { match self.bits { - false => Ld::Value1, - true => Ld::Value2, + false => LD_A::VALUE1, + true => LD_A::VALUE2, } } #[doc = "The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ld::Value1 + *self == LD_A::VALUE1 } #[doc = "The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ld::Value2 + *self == LD_A::VALUE2 } } #[doc = "Field `LD` writer - Rebuild Level Detection for Status Flag for ETLx"] -pub type LdW<'a, REG> = crate::BitWriter<'a, REG, Ld>; -impl<'a, REG> LdW<'a, REG> +pub type LD_W<'a, REG> = crate::BitWriter<'a, REG, LD_A>; +impl<'a, REG> LD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The status flag FL is not cleared by hardware and is used as \"sticky\" bit. Once set, it is not influenced by any edge until it becomes cleared by software."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ld::Value1) + self.variant(LD_A::VALUE1) } #[doc = "The status flag FL rebuilds a level detection of the desired event. It becomes automatically set with a rising edge if RE = 1 or with a falling edge if FE = 1. It becomes automatically cleared with a rising edge if RE = 0 or with a falling edge if FE = 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ld::Value2) + self.variant(LD_A::VALUE2) } } #[doc = "Rising Edge Detection Enable ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Re { +pub enum RE_A { #[doc = "0: A rising edge is not considered as edge event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge is considered as edge event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Re) -> Self { + fn from(variant: RE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RE` reader - Rising Edge Detection Enable ETLx"] -pub type ReR = crate::BitReader; -impl ReR { +pub type RE_R = crate::BitReader; +impl RE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Re { + pub const fn variant(&self) -> RE_A { match self.bits { - false => Re::Value1, - true => Re::Value2, + false => RE_A::VALUE1, + true => RE_A::VALUE2, } } #[doc = "A rising edge is not considered as edge event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Re::Value1 + *self == RE_A::VALUE1 } #[doc = "A rising edge is considered as edge event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Re::Value2 + *self == RE_A::VALUE2 } } #[doc = "Field `RE` writer - Rising Edge Detection Enable ETLx"] -pub type ReW<'a, REG> = crate::BitWriter<'a, REG, Re>; -impl<'a, REG> ReW<'a, REG> +pub type RE_W<'a, REG> = crate::BitWriter<'a, REG, RE_A>; +impl<'a, REG> RE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A rising edge is not considered as edge event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Re::Value1) + self.variant(RE_A::VALUE1) } #[doc = "A rising edge is considered as edge event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Re::Value2) + self.variant(RE_A::VALUE2) } } #[doc = "Falling Edge Detection Enable ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fe { +pub enum FE_A { #[doc = "0: A falling edge is not considered as edge event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A falling edge is considered as edge event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fe) -> Self { + fn from(variant: FE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FE` reader - Falling Edge Detection Enable ETLx"] -pub type FeR = crate::BitReader; -impl FeR { +pub type FE_R = crate::BitReader; +impl FE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fe { + pub const fn variant(&self) -> FE_A { match self.bits { - false => Fe::Value1, - true => Fe::Value2, + false => FE_A::VALUE1, + true => FE_A::VALUE2, } } #[doc = "A falling edge is not considered as edge event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fe::Value1 + *self == FE_A::VALUE1 } #[doc = "A falling edge is considered as edge event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fe::Value2 + *self == FE_A::VALUE2 } } #[doc = "Field `FE` writer - Falling Edge Detection Enable ETLx"] -pub type FeW<'a, REG> = crate::BitWriter<'a, REG, Fe>; -impl<'a, REG> FeW<'a, REG> +pub type FE_W<'a, REG> = crate::BitWriter<'a, REG, FE_A>; +impl<'a, REG> FE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A falling edge is not considered as edge event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fe::Value1) + self.variant(FE_A::VALUE1) } #[doc = "A falling edge is considered as edge event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fe::Value2) + self.variant(FE_A::VALUE2) } } #[doc = "Output Channel Select for ETLx Output Trigger Pulse\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ocs { +pub enum OCS_A { #[doc = "0: Trigger pulses are sent to OGU0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger pulses are sent to OGU1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Trigger pulses are sent to OGU2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Trigger pulses are sent to OGU3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ocs) -> Self { + fn from(variant: OCS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ocs { +impl crate::FieldSpec for OCS_A { type Ux = u8; } -impl crate::IsEnum for Ocs {} +impl crate::IsEnum for OCS_A {} #[doc = "Field `OCS` reader - Output Channel Select for ETLx Output Trigger Pulse"] -pub type OcsR = crate::FieldReader; -impl OcsR { +pub type OCS_R = crate::FieldReader; +impl OCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Ocs::Value1), - 1 => Some(Ocs::Value2), - 2 => Some(Ocs::Value3), - 3 => Some(Ocs::Value4), + 0 => Some(OCS_A::VALUE1), + 1 => Some(OCS_A::VALUE2), + 2 => Some(OCS_A::VALUE3), + 3 => Some(OCS_A::VALUE4), _ => None, } } #[doc = "Trigger pulses are sent to OGU0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs::Value1 + *self == OCS_A::VALUE1 } #[doc = "Trigger pulses are sent to OGU1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs::Value2 + *self == OCS_A::VALUE2 } #[doc = "Trigger pulses are sent to OGU2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ocs::Value3 + *self == OCS_A::VALUE3 } #[doc = "Trigger pulses are sent to OGU3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ocs::Value4 + *self == OCS_A::VALUE4 } } #[doc = "Field `OCS` writer - Output Channel Select for ETLx Output Trigger Pulse"] -pub type OcsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ocs>; -impl<'a, REG> OcsW<'a, REG> +pub type OCS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, OCS_A>; +impl<'a, REG> OCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -282,138 +282,138 @@ where #[doc = "Trigger pulses are sent to OGU0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs::Value1) + self.variant(OCS_A::VALUE1) } #[doc = "Trigger pulses are sent to OGU1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs::Value2) + self.variant(OCS_A::VALUE2) } #[doc = "Trigger pulses are sent to OGU2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ocs::Value3) + self.variant(OCS_A::VALUE3) } #[doc = "Trigger pulses are sent to OGU3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ocs::Value4) + self.variant(OCS_A::VALUE4) } } #[doc = "Status Flag for ETLx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fl { +pub enum FL_A { #[doc = "0: The enabled edge event has not been detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The enabled edge event has been detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fl) -> Self { + fn from(variant: FL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FL` reader - Status Flag for ETLx"] -pub type FlR = crate::BitReader; -impl FlR { +pub type FL_R = crate::BitReader; +impl FL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fl { + pub const fn variant(&self) -> FL_A { match self.bits { - false => Fl::Value1, - true => Fl::Value2, + false => FL_A::VALUE1, + true => FL_A::VALUE2, } } #[doc = "The enabled edge event has not been detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fl::Value1 + *self == FL_A::VALUE1 } #[doc = "The enabled edge event has been detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fl::Value2 + *self == FL_A::VALUE2 } } #[doc = "Field `FL` writer - Status Flag for ETLx"] -pub type FlW<'a, REG> = crate::BitWriter<'a, REG, Fl>; -impl<'a, REG> FlW<'a, REG> +pub type FL_W<'a, REG> = crate::BitWriter<'a, REG, FL_A>; +impl<'a, REG> FL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The enabled edge event has not been detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fl::Value1) + self.variant(FL_A::VALUE1) } #[doc = "The enabled edge event has been detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fl::Value2) + self.variant(FL_A::VALUE2) } } #[doc = "Input Source Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ss { +pub enum SS_A { #[doc = "0: Input A without additional combination"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input B without additional combination"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input A OR input B"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input A AND input B"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ss) -> Self { + fn from(variant: SS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ss { +impl crate::FieldSpec for SS_A { type Ux = u8; } -impl crate::IsEnum for Ss {} +impl crate::IsEnum for SS_A {} #[doc = "Field `SS` reader - Input Source Select for ERSx"] -pub type SsR = crate::FieldReader; -impl SsR { +pub type SS_R = crate::FieldReader; +impl SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ss { + pub const fn variant(&self) -> SS_A { match self.bits { - 0 => Ss::Value1, - 1 => Ss::Value2, - 2 => Ss::Value3, - 3 => Ss::Value4, + 0 => SS_A::VALUE1, + 1 => SS_A::VALUE2, + 2 => SS_A::VALUE3, + 3 => SS_A::VALUE4, _ => unreachable!(), } } #[doc = "Input A without additional combination"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ss::Value1 + *self == SS_A::VALUE1 } #[doc = "Input B without additional combination"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ss::Value2 + *self == SS_A::VALUE2 } #[doc = "Input A OR input B"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ss::Value3 + *self == SS_A::VALUE3 } #[doc = "Input A AND input B"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ss::Value4 + *self == SS_A::VALUE4 } } #[doc = "Field `SS` writer - Input Source Select for ERSx"] -pub type SsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ss, crate::Safe>; -impl<'a, REG> SsW<'a, REG> +pub type SS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SS_A, crate::Safe>; +impl<'a, REG> SS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -421,248 +421,248 @@ where #[doc = "Input A without additional combination"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ss::Value1) + self.variant(SS_A::VALUE1) } #[doc = "Input B without additional combination"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ss::Value2) + self.variant(SS_A::VALUE2) } #[doc = "Input A OR input B"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ss::Value3) + self.variant(SS_A::VALUE3) } #[doc = "Input A AND input B"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ss::Value4) + self.variant(SS_A::VALUE4) } } #[doc = "Input A Negation Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Na { +pub enum NA_A { #[doc = "0: Input A is used directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input A is inverted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Na) -> Self { + fn from(variant: NA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NA` reader - Input A Negation Select for ERSx"] -pub type NaR = crate::BitReader; -impl NaR { +pub type NA_R = crate::BitReader; +impl NA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Na { + pub const fn variant(&self) -> NA_A { match self.bits { - false => Na::Value1, - true => Na::Value2, + false => NA_A::VALUE1, + true => NA_A::VALUE2, } } #[doc = "Input A is used directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Na::Value1 + *self == NA_A::VALUE1 } #[doc = "Input A is inverted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Na::Value2 + *self == NA_A::VALUE2 } } #[doc = "Field `NA` writer - Input A Negation Select for ERSx"] -pub type NaW<'a, REG> = crate::BitWriter<'a, REG, Na>; -impl<'a, REG> NaW<'a, REG> +pub type NA_W<'a, REG> = crate::BitWriter<'a, REG, NA_A>; +impl<'a, REG> NA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Input A is used directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Na::Value1) + self.variant(NA_A::VALUE1) } #[doc = "Input A is inverted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Na::Value2) + self.variant(NA_A::VALUE2) } } #[doc = "Input B Negation Select for ERSx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Nb { +pub enum NB_A { #[doc = "0: Input B is used directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input B is inverted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Nb) -> Self { + fn from(variant: NB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NB` reader - Input B Negation Select for ERSx"] -pub type NbR = crate::BitReader; -impl NbR { +pub type NB_R = crate::BitReader; +impl NB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nb { + pub const fn variant(&self) -> NB_A { match self.bits { - false => Nb::Value1, - true => Nb::Value2, + false => NB_A::VALUE1, + true => NB_A::VALUE2, } } #[doc = "Input B is used directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nb::Value1 + *self == NB_A::VALUE1 } #[doc = "Input B is inverted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nb::Value2 + *self == NB_A::VALUE2 } } #[doc = "Field `NB` writer - Input B Negation Select for ERSx"] -pub type NbW<'a, REG> = crate::BitWriter<'a, REG, Nb>; -impl<'a, REG> NbW<'a, REG> +pub type NB_W<'a, REG> = crate::BitWriter<'a, REG, NB_A>; +impl<'a, REG> NB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Input B is used directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nb::Value1) + self.variant(NB_A::VALUE1) } #[doc = "Input B is inverted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nb::Value2) + self.variant(NB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"] #[inline(always)] - pub fn pe(&self) -> PeR { - PeR::new((self.bits & 1) != 0) + pub fn pe(&self) -> PE_R { + PE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"] #[inline(always)] - pub fn ld(&self) -> LdR { - LdR::new(((self.bits >> 1) & 1) != 0) + pub fn ld(&self) -> LD_R { + LD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"] #[inline(always)] - pub fn re(&self) -> ReR { - ReR::new(((self.bits >> 2) & 1) != 0) + pub fn re(&self) -> RE_R { + RE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"] #[inline(always)] - pub fn fe(&self) -> FeR { - FeR::new(((self.bits >> 3) & 1) != 0) + pub fn fe(&self) -> FE_R { + FE_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"] #[inline(always)] - pub fn ocs(&self) -> OcsR { - OcsR::new(((self.bits >> 4) & 7) as u8) + pub fn ocs(&self) -> OCS_R { + OCS_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 7 - Status Flag for ETLx"] #[inline(always)] - pub fn fl(&self) -> FlR { - FlR::new(((self.bits >> 7) & 1) != 0) + pub fn fl(&self) -> FL_R { + FL_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Input Source Select for ERSx"] #[inline(always)] - pub fn ss(&self) -> SsR { - SsR::new(((self.bits >> 8) & 3) as u8) + pub fn ss(&self) -> SS_R { + SS_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Input A Negation Select for ERSx"] #[inline(always)] - pub fn na(&self) -> NaR { - NaR::new(((self.bits >> 10) & 1) != 0) + pub fn na(&self) -> NA_R { + NA_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Input B Negation Select for ERSx"] #[inline(always)] - pub fn nb(&self) -> NbR { - NbR::new(((self.bits >> 11) & 1) != 0) + pub fn nb(&self) -> NB_R { + NB_R::new(((self.bits >> 11) & 1) != 0) } } impl W { #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"] #[inline(always)] #[must_use] - pub fn pe(&mut self) -> PeW { - PeW::new(self, 0) + pub fn pe(&mut self) -> PE_W { + PE_W::new(self, 0) } #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"] #[inline(always)] #[must_use] - pub fn ld(&mut self) -> LdW { - LdW::new(self, 1) + pub fn ld(&mut self) -> LD_W { + LD_W::new(self, 1) } #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"] #[inline(always)] #[must_use] - pub fn re(&mut self) -> ReW { - ReW::new(self, 2) + pub fn re(&mut self) -> RE_W { + RE_W::new(self, 2) } #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"] #[inline(always)] #[must_use] - pub fn fe(&mut self) -> FeW { - FeW::new(self, 3) + pub fn fe(&mut self) -> FE_W { + FE_W::new(self, 3) } #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"] #[inline(always)] #[must_use] - pub fn ocs(&mut self) -> OcsW { - OcsW::new(self, 4) + pub fn ocs(&mut self) -> OCS_W { + OCS_W::new(self, 4) } #[doc = "Bit 7 - Status Flag for ETLx"] #[inline(always)] #[must_use] - pub fn fl(&mut self) -> FlW { - FlW::new(self, 7) + pub fn fl(&mut self) -> FL_W { + FL_W::new(self, 7) } #[doc = "Bits 8:9 - Input Source Select for ERSx"] #[inline(always)] #[must_use] - pub fn ss(&mut self) -> SsW { - SsW::new(self, 8) + pub fn ss(&mut self) -> SS_W { + SS_W::new(self, 8) } #[doc = "Bit 10 - Input A Negation Select for ERSx"] #[inline(always)] #[must_use] - pub fn na(&mut self) -> NaW { - NaW::new(self, 10) + pub fn na(&mut self) -> NA_W { + NA_W::new(self, 10) } #[doc = "Bit 11 - Input B Negation Select for ERSx"] #[inline(always)] #[must_use] - pub fn nb(&mut self) -> NbW { - NbW::new(self, 11) + pub fn nb(&mut self) -> NB_W { + NB_W::new(self, 11) } } #[doc = "Event Input Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exicon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exicon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ExiconSpec; -impl crate::RegisterSpec for ExiconSpec { +pub struct EXICON_SPEC; +impl crate::RegisterSpec for EXICON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`exicon::R`](R) reader structure"] -impl crate::Readable for ExiconSpec {} +impl crate::Readable for EXICON_SPEC {} #[doc = "`write(|w| ..)` method takes [`exicon::W`](W) writer structure"] -impl crate::Writable for ExiconSpec { +impl crate::Writable for EXICON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXICON[%s] to value 0"] -impl crate::Resettable for ExiconSpec { +impl crate::Resettable for EXICON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/eru0/exisel.rs b/src/eru0/exisel.rs index f1f62bb0..2e9f1240 100644 --- a/src/eru0/exisel.rs +++ b/src/eru0/exisel.rs @@ -1,68 +1,68 @@ #[doc = "Register `EXISEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXISEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Event Source Select for A0 (ERS0)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs0a { +pub enum EXS0A_A { #[doc = "0: Input ERU_0A0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_0A1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_0A2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_0A3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs0a) -> Self { + fn from(variant: EXS0A_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs0a { +impl crate::FieldSpec for EXS0A_A { type Ux = u8; } -impl crate::IsEnum for Exs0a {} +impl crate::IsEnum for EXS0A_A {} #[doc = "Field `EXS0A` reader - Event Source Select for A0 (ERS0)"] -pub type Exs0aR = crate::FieldReader; -impl Exs0aR { +pub type EXS0A_R = crate::FieldReader; +impl EXS0A_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs0a { + pub const fn variant(&self) -> EXS0A_A { match self.bits { - 0 => Exs0a::Value1, - 1 => Exs0a::Value2, - 2 => Exs0a::Value3, - 3 => Exs0a::Value4, + 0 => EXS0A_A::VALUE1, + 1 => EXS0A_A::VALUE2, + 2 => EXS0A_A::VALUE3, + 3 => EXS0A_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_0A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs0a::Value1 + *self == EXS0A_A::VALUE1 } #[doc = "Input ERU_0A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs0a::Value2 + *self == EXS0A_A::VALUE2 } #[doc = "Input ERU_0A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs0a::Value3 + *self == EXS0A_A::VALUE3 } #[doc = "Input ERU_0A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs0a::Value4 + *self == EXS0A_A::VALUE4 } } #[doc = "Field `EXS0A` writer - Event Source Select for A0 (ERS0)"] -pub type Exs0aW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs0a, crate::Safe>; -impl<'a, REG> Exs0aW<'a, REG> +pub type EXS0A_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS0A_A, crate::Safe>; +impl<'a, REG> EXS0A_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Input ERU_0A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs0a::Value1) + self.variant(EXS0A_A::VALUE1) } #[doc = "Input ERU_0A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs0a::Value2) + self.variant(EXS0A_A::VALUE2) } #[doc = "Input ERU_0A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs0a::Value3) + self.variant(EXS0A_A::VALUE3) } #[doc = "Input ERU_0A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs0a::Value4) + self.variant(EXS0A_A::VALUE4) } } #[doc = "Event Source Select for B0 (ERS0)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs0b { +pub enum EXS0B_A { #[doc = "0: Input ERU_0B0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_0B1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_0B2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_0B3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs0b) -> Self { + fn from(variant: EXS0B_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs0b { +impl crate::FieldSpec for EXS0B_A { type Ux = u8; } -impl crate::IsEnum for Exs0b {} +impl crate::IsEnum for EXS0B_A {} #[doc = "Field `EXS0B` reader - Event Source Select for B0 (ERS0)"] -pub type Exs0bR = crate::FieldReader; -impl Exs0bR { +pub type EXS0B_R = crate::FieldReader; +impl EXS0B_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs0b { + pub const fn variant(&self) -> EXS0B_A { match self.bits { - 0 => Exs0b::Value1, - 1 => Exs0b::Value2, - 2 => Exs0b::Value3, - 3 => Exs0b::Value4, + 0 => EXS0B_A::VALUE1, + 1 => EXS0B_A::VALUE2, + 2 => EXS0B_A::VALUE3, + 3 => EXS0B_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_0B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs0b::Value1 + *self == EXS0B_A::VALUE1 } #[doc = "Input ERU_0B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs0b::Value2 + *self == EXS0B_A::VALUE2 } #[doc = "Input ERU_0B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs0b::Value3 + *self == EXS0B_A::VALUE3 } #[doc = "Input ERU_0B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs0b::Value4 + *self == EXS0B_A::VALUE4 } } #[doc = "Field `EXS0B` writer - Event Source Select for B0 (ERS0)"] -pub type Exs0bW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs0b, crate::Safe>; -impl<'a, REG> Exs0bW<'a, REG> +pub type EXS0B_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS0B_A, crate::Safe>; +impl<'a, REG> EXS0B_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Input ERU_0B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs0b::Value1) + self.variant(EXS0B_A::VALUE1) } #[doc = "Input ERU_0B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs0b::Value2) + self.variant(EXS0B_A::VALUE2) } #[doc = "Input ERU_0B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs0b::Value3) + self.variant(EXS0B_A::VALUE3) } #[doc = "Input ERU_0B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs0b::Value4) + self.variant(EXS0B_A::VALUE4) } } #[doc = "Event Source Select for A1 (ERS1)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs1a { +pub enum EXS1A_A { #[doc = "0: Input ERU_1A0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_1A1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_1A2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_1A3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs1a) -> Self { + fn from(variant: EXS1A_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs1a { +impl crate::FieldSpec for EXS1A_A { type Ux = u8; } -impl crate::IsEnum for Exs1a {} +impl crate::IsEnum for EXS1A_A {} #[doc = "Field `EXS1A` reader - Event Source Select for A1 (ERS1)"] -pub type Exs1aR = crate::FieldReader; -impl Exs1aR { +pub type EXS1A_R = crate::FieldReader; +impl EXS1A_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs1a { + pub const fn variant(&self) -> EXS1A_A { match self.bits { - 0 => Exs1a::Value1, - 1 => Exs1a::Value2, - 2 => Exs1a::Value3, - 3 => Exs1a::Value4, + 0 => EXS1A_A::VALUE1, + 1 => EXS1A_A::VALUE2, + 2 => EXS1A_A::VALUE3, + 3 => EXS1A_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_1A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs1a::Value1 + *self == EXS1A_A::VALUE1 } #[doc = "Input ERU_1A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs1a::Value2 + *self == EXS1A_A::VALUE2 } #[doc = "Input ERU_1A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs1a::Value3 + *self == EXS1A_A::VALUE3 } #[doc = "Input ERU_1A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs1a::Value4 + *self == EXS1A_A::VALUE4 } } #[doc = "Field `EXS1A` writer - Event Source Select for A1 (ERS1)"] -pub type Exs1aW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs1a, crate::Safe>; -impl<'a, REG> Exs1aW<'a, REG> +pub type EXS1A_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS1A_A, crate::Safe>; +impl<'a, REG> EXS1A_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Input ERU_1A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs1a::Value1) + self.variant(EXS1A_A::VALUE1) } #[doc = "Input ERU_1A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs1a::Value2) + self.variant(EXS1A_A::VALUE2) } #[doc = "Input ERU_1A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs1a::Value3) + self.variant(EXS1A_A::VALUE3) } #[doc = "Input ERU_1A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs1a::Value4) + self.variant(EXS1A_A::VALUE4) } } #[doc = "Event Source Select for B1 (ERS1)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs1b { +pub enum EXS1B_A { #[doc = "0: Input ERU_1B0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_1B1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_1B2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_1B3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs1b) -> Self { + fn from(variant: EXS1B_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs1b { +impl crate::FieldSpec for EXS1B_A { type Ux = u8; } -impl crate::IsEnum for Exs1b {} +impl crate::IsEnum for EXS1B_A {} #[doc = "Field `EXS1B` reader - Event Source Select for B1 (ERS1)"] -pub type Exs1bR = crate::FieldReader; -impl Exs1bR { +pub type EXS1B_R = crate::FieldReader; +impl EXS1B_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs1b { + pub const fn variant(&self) -> EXS1B_A { match self.bits { - 0 => Exs1b::Value1, - 1 => Exs1b::Value2, - 2 => Exs1b::Value3, - 3 => Exs1b::Value4, + 0 => EXS1B_A::VALUE1, + 1 => EXS1B_A::VALUE2, + 2 => EXS1B_A::VALUE3, + 3 => EXS1B_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_1B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs1b::Value1 + *self == EXS1B_A::VALUE1 } #[doc = "Input ERU_1B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs1b::Value2 + *self == EXS1B_A::VALUE2 } #[doc = "Input ERU_1B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs1b::Value3 + *self == EXS1B_A::VALUE3 } #[doc = "Input ERU_1B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs1b::Value4 + *self == EXS1B_A::VALUE4 } } #[doc = "Field `EXS1B` writer - Event Source Select for B1 (ERS1)"] -pub type Exs1bW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs1b, crate::Safe>; -impl<'a, REG> Exs1bW<'a, REG> +pub type EXS1B_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS1B_A, crate::Safe>; +impl<'a, REG> EXS1B_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Input ERU_1B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs1b::Value1) + self.variant(EXS1B_A::VALUE1) } #[doc = "Input ERU_1B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs1b::Value2) + self.variant(EXS1B_A::VALUE2) } #[doc = "Input ERU_1B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs1b::Value3) + self.variant(EXS1B_A::VALUE3) } #[doc = "Input ERU_1B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs1b::Value4) + self.variant(EXS1B_A::VALUE4) } } #[doc = "Event Source Select for A2 (ERS2)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs2a { +pub enum EXS2A_A { #[doc = "0: Input ERU_2A0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_2A1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_2A2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_2A3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs2a) -> Self { + fn from(variant: EXS2A_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs2a { +impl crate::FieldSpec for EXS2A_A { type Ux = u8; } -impl crate::IsEnum for Exs2a {} +impl crate::IsEnum for EXS2A_A {} #[doc = "Field `EXS2A` reader - Event Source Select for A2 (ERS2)"] -pub type Exs2aR = crate::FieldReader; -impl Exs2aR { +pub type EXS2A_R = crate::FieldReader; +impl EXS2A_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs2a { + pub const fn variant(&self) -> EXS2A_A { match self.bits { - 0 => Exs2a::Value1, - 1 => Exs2a::Value2, - 2 => Exs2a::Value3, - 3 => Exs2a::Value4, + 0 => EXS2A_A::VALUE1, + 1 => EXS2A_A::VALUE2, + 2 => EXS2A_A::VALUE3, + 3 => EXS2A_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_2A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs2a::Value1 + *self == EXS2A_A::VALUE1 } #[doc = "Input ERU_2A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs2a::Value2 + *self == EXS2A_A::VALUE2 } #[doc = "Input ERU_2A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs2a::Value3 + *self == EXS2A_A::VALUE3 } #[doc = "Input ERU_2A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs2a::Value4 + *self == EXS2A_A::VALUE4 } } #[doc = "Field `EXS2A` writer - Event Source Select for A2 (ERS2)"] -pub type Exs2aW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs2a, crate::Safe>; -impl<'a, REG> Exs2aW<'a, REG> +pub type EXS2A_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS2A_A, crate::Safe>; +impl<'a, REG> EXS2A_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "Input ERU_2A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs2a::Value1) + self.variant(EXS2A_A::VALUE1) } #[doc = "Input ERU_2A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs2a::Value2) + self.variant(EXS2A_A::VALUE2) } #[doc = "Input ERU_2A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs2a::Value3) + self.variant(EXS2A_A::VALUE3) } #[doc = "Input ERU_2A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs2a::Value4) + self.variant(EXS2A_A::VALUE4) } } #[doc = "Event Source Select for B2 (ERS2)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs2b { +pub enum EXS2B_A { #[doc = "0: Input ERU_2B0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_2B1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_2B2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_2B3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs2b) -> Self { + fn from(variant: EXS2B_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs2b { +impl crate::FieldSpec for EXS2B_A { type Ux = u8; } -impl crate::IsEnum for Exs2b {} +impl crate::IsEnum for EXS2B_A {} #[doc = "Field `EXS2B` reader - Event Source Select for B2 (ERS2)"] -pub type Exs2bR = crate::FieldReader; -impl Exs2bR { +pub type EXS2B_R = crate::FieldReader; +impl EXS2B_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs2b { + pub const fn variant(&self) -> EXS2B_A { match self.bits { - 0 => Exs2b::Value1, - 1 => Exs2b::Value2, - 2 => Exs2b::Value3, - 3 => Exs2b::Value4, + 0 => EXS2B_A::VALUE1, + 1 => EXS2B_A::VALUE2, + 2 => EXS2B_A::VALUE3, + 3 => EXS2B_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_2B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs2b::Value1 + *self == EXS2B_A::VALUE1 } #[doc = "Input ERU_2B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs2b::Value2 + *self == EXS2B_A::VALUE2 } #[doc = "Input ERU_2B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs2b::Value3 + *self == EXS2B_A::VALUE3 } #[doc = "Input ERU_2B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs2b::Value4 + *self == EXS2B_A::VALUE4 } } #[doc = "Field `EXS2B` writer - Event Source Select for B2 (ERS2)"] -pub type Exs2bW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs2b, crate::Safe>; -impl<'a, REG> Exs2bW<'a, REG> +pub type EXS2B_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS2B_A, crate::Safe>; +impl<'a, REG> EXS2B_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,85 +500,85 @@ where #[doc = "Input ERU_2B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs2b::Value1) + self.variant(EXS2B_A::VALUE1) } #[doc = "Input ERU_2B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs2b::Value2) + self.variant(EXS2B_A::VALUE2) } #[doc = "Input ERU_2B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs2b::Value3) + self.variant(EXS2B_A::VALUE3) } #[doc = "Input ERU_2B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs2b::Value4) + self.variant(EXS2B_A::VALUE4) } } #[doc = "Event Source Select for A3 (ERS3)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs3a { +pub enum EXS3A_A { #[doc = "0: Input ERU_3A0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_3A1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_3A2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_3A3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs3a) -> Self { + fn from(variant: EXS3A_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs3a { +impl crate::FieldSpec for EXS3A_A { type Ux = u8; } -impl crate::IsEnum for Exs3a {} +impl crate::IsEnum for EXS3A_A {} #[doc = "Field `EXS3A` reader - Event Source Select for A3 (ERS3)"] -pub type Exs3aR = crate::FieldReader; -impl Exs3aR { +pub type EXS3A_R = crate::FieldReader; +impl EXS3A_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs3a { + pub const fn variant(&self) -> EXS3A_A { match self.bits { - 0 => Exs3a::Value1, - 1 => Exs3a::Value2, - 2 => Exs3a::Value3, - 3 => Exs3a::Value4, + 0 => EXS3A_A::VALUE1, + 1 => EXS3A_A::VALUE2, + 2 => EXS3A_A::VALUE3, + 3 => EXS3A_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_3A0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs3a::Value1 + *self == EXS3A_A::VALUE1 } #[doc = "Input ERU_3A1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs3a::Value2 + *self == EXS3A_A::VALUE2 } #[doc = "Input ERU_3A2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs3a::Value3 + *self == EXS3A_A::VALUE3 } #[doc = "Input ERU_3A3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs3a::Value4 + *self == EXS3A_A::VALUE4 } } #[doc = "Field `EXS3A` writer - Event Source Select for A3 (ERS3)"] -pub type Exs3aW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs3a, crate::Safe>; -impl<'a, REG> Exs3aW<'a, REG> +pub type EXS3A_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS3A_A, crate::Safe>; +impl<'a, REG> EXS3A_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,85 +586,85 @@ where #[doc = "Input ERU_3A0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs3a::Value1) + self.variant(EXS3A_A::VALUE1) } #[doc = "Input ERU_3A1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs3a::Value2) + self.variant(EXS3A_A::VALUE2) } #[doc = "Input ERU_3A2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs3a::Value3) + self.variant(EXS3A_A::VALUE3) } #[doc = "Input ERU_3A3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs3a::Value4) + self.variant(EXS3A_A::VALUE4) } } #[doc = "Event Source Select for B3 (ERS3)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Exs3b { +pub enum EXS3B_A { #[doc = "0: Input ERU_3B0 is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_3B1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_3B2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_3B3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Exs3b) -> Self { + fn from(variant: EXS3B_A) -> Self { variant as _ } } -impl crate::FieldSpec for Exs3b { +impl crate::FieldSpec for EXS3B_A { type Ux = u8; } -impl crate::IsEnum for Exs3b {} +impl crate::IsEnum for EXS3B_A {} #[doc = "Field `EXS3B` reader - Event Source Select for B3 (ERS3)"] -pub type Exs3bR = crate::FieldReader; -impl Exs3bR { +pub type EXS3B_R = crate::FieldReader; +impl EXS3B_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Exs3b { + pub const fn variant(&self) -> EXS3B_A { match self.bits { - 0 => Exs3b::Value1, - 1 => Exs3b::Value2, - 2 => Exs3b::Value3, - 3 => Exs3b::Value4, + 0 => EXS3B_A::VALUE1, + 1 => EXS3B_A::VALUE2, + 2 => EXS3B_A::VALUE3, + 3 => EXS3B_A::VALUE4, _ => unreachable!(), } } #[doc = "Input ERU_3B0 is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Exs3b::Value1 + *self == EXS3B_A::VALUE1 } #[doc = "Input ERU_3B1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Exs3b::Value2 + *self == EXS3B_A::VALUE2 } #[doc = "Input ERU_3B2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Exs3b::Value3 + *self == EXS3B_A::VALUE3 } #[doc = "Input ERU_3B3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Exs3b::Value4 + *self == EXS3B_A::VALUE4 } } #[doc = "Field `EXS3B` writer - Event Source Select for B3 (ERS3)"] -pub type Exs3bW<'a, REG> = crate::FieldWriter<'a, REG, 2, Exs3b, crate::Safe>; -impl<'a, REG> Exs3bW<'a, REG> +pub type EXS3B_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EXS3B_A, crate::Safe>; +impl<'a, REG> EXS3B_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -672,130 +672,130 @@ where #[doc = "Input ERU_3B0 is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Exs3b::Value1) + self.variant(EXS3B_A::VALUE1) } #[doc = "Input ERU_3B1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Exs3b::Value2) + self.variant(EXS3B_A::VALUE2) } #[doc = "Input ERU_3B2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Exs3b::Value3) + self.variant(EXS3B_A::VALUE3) } #[doc = "Input ERU_3B3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Exs3b::Value4) + self.variant(EXS3B_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"] #[inline(always)] - pub fn exs0a(&self) -> Exs0aR { - Exs0aR::new((self.bits & 3) as u8) + pub fn exs0a(&self) -> EXS0A_R { + EXS0A_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"] #[inline(always)] - pub fn exs0b(&self) -> Exs0bR { - Exs0bR::new(((self.bits >> 2) & 3) as u8) + pub fn exs0b(&self) -> EXS0B_R { + EXS0B_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"] #[inline(always)] - pub fn exs1a(&self) -> Exs1aR { - Exs1aR::new(((self.bits >> 4) & 3) as u8) + pub fn exs1a(&self) -> EXS1A_R { + EXS1A_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"] #[inline(always)] - pub fn exs1b(&self) -> Exs1bR { - Exs1bR::new(((self.bits >> 6) & 3) as u8) + pub fn exs1b(&self) -> EXS1B_R { + EXS1B_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"] #[inline(always)] - pub fn exs2a(&self) -> Exs2aR { - Exs2aR::new(((self.bits >> 8) & 3) as u8) + pub fn exs2a(&self) -> EXS2A_R { + EXS2A_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"] #[inline(always)] - pub fn exs2b(&self) -> Exs2bR { - Exs2bR::new(((self.bits >> 10) & 3) as u8) + pub fn exs2b(&self) -> EXS2B_R { + EXS2B_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"] #[inline(always)] - pub fn exs3a(&self) -> Exs3aR { - Exs3aR::new(((self.bits >> 12) & 3) as u8) + pub fn exs3a(&self) -> EXS3A_R { + EXS3A_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"] #[inline(always)] - pub fn exs3b(&self) -> Exs3bR { - Exs3bR::new(((self.bits >> 14) & 3) as u8) + pub fn exs3b(&self) -> EXS3B_R { + EXS3B_R::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"] #[inline(always)] #[must_use] - pub fn exs0a(&mut self) -> Exs0aW { - Exs0aW::new(self, 0) + pub fn exs0a(&mut self) -> EXS0A_W { + EXS0A_W::new(self, 0) } #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"] #[inline(always)] #[must_use] - pub fn exs0b(&mut self) -> Exs0bW { - Exs0bW::new(self, 2) + pub fn exs0b(&mut self) -> EXS0B_W { + EXS0B_W::new(self, 2) } #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"] #[inline(always)] #[must_use] - pub fn exs1a(&mut self) -> Exs1aW { - Exs1aW::new(self, 4) + pub fn exs1a(&mut self) -> EXS1A_W { + EXS1A_W::new(self, 4) } #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"] #[inline(always)] #[must_use] - pub fn exs1b(&mut self) -> Exs1bW { - Exs1bW::new(self, 6) + pub fn exs1b(&mut self) -> EXS1B_W { + EXS1B_W::new(self, 6) } #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"] #[inline(always)] #[must_use] - pub fn exs2a(&mut self) -> Exs2aW { - Exs2aW::new(self, 8) + pub fn exs2a(&mut self) -> EXS2A_W { + EXS2A_W::new(self, 8) } #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"] #[inline(always)] #[must_use] - pub fn exs2b(&mut self) -> Exs2bW { - Exs2bW::new(self, 10) + pub fn exs2b(&mut self) -> EXS2B_W { + EXS2B_W::new(self, 10) } #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"] #[inline(always)] #[must_use] - pub fn exs3a(&mut self) -> Exs3aW { - Exs3aW::new(self, 12) + pub fn exs3a(&mut self) -> EXS3A_W { + EXS3A_W::new(self, 12) } #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"] #[inline(always)] #[must_use] - pub fn exs3b(&mut self) -> Exs3bW { - Exs3bW::new(self, 14) + pub fn exs3b(&mut self) -> EXS3B_W { + EXS3B_W::new(self, 14) } } #[doc = "Event Input Select\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exisel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exisel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ExiselSpec; -impl crate::RegisterSpec for ExiselSpec { +pub struct EXISEL_SPEC; +impl crate::RegisterSpec for EXISEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`exisel::R`](R) reader structure"] -impl crate::Readable for ExiselSpec {} +impl crate::Readable for EXISEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`exisel::W`](W) writer structure"] -impl crate::Writable for ExiselSpec { +impl crate::Writable for EXISEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXISEL to value 0"] -impl crate::Resettable for ExiselSpec { +impl crate::Resettable for EXISEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/eru0/exocon.rs b/src/eru0/exocon.rs index 707e7d1e..49b8ab02 100644 --- a/src/eru0/exocon.rs +++ b/src/eru0/exocon.rs @@ -1,68 +1,68 @@ #[doc = "Register `EXOCON[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXOCON[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Internal Trigger Source Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Iss { +pub enum ISS_A { #[doc = "0: The peripheral trigger function is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input ERU_OGUy1 is selected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input ERU_OGUy2 is selected"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input ERU_OGUy3 is selected"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Iss) -> Self { + fn from(variant: ISS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Iss { +impl crate::FieldSpec for ISS_A { type Ux = u8; } -impl crate::IsEnum for Iss {} +impl crate::IsEnum for ISS_A {} #[doc = "Field `ISS` reader - Internal Trigger Source Selection"] -pub type IssR = crate::FieldReader; -impl IssR { +pub type ISS_R = crate::FieldReader; +impl ISS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Iss { + pub const fn variant(&self) -> ISS_A { match self.bits { - 0 => Iss::Value1, - 1 => Iss::Value2, - 2 => Iss::Value3, - 3 => Iss::Value4, + 0 => ISS_A::VALUE1, + 1 => ISS_A::VALUE2, + 2 => ISS_A::VALUE3, + 3 => ISS_A::VALUE4, _ => unreachable!(), } } #[doc = "The peripheral trigger function is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Iss::Value1 + *self == ISS_A::VALUE1 } #[doc = "Input ERU_OGUy1 is selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Iss::Value2 + *self == ISS_A::VALUE2 } #[doc = "Input ERU_OGUy2 is selected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Iss::Value3 + *self == ISS_A::VALUE3 } #[doc = "Input ERU_OGUy3 is selected"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Iss::Value4 + *self == ISS_A::VALUE4 } } #[doc = "Field `ISS` writer - Internal Trigger Source Selection"] -pub type IssW<'a, REG> = crate::FieldWriter<'a, REG, 2, Iss, crate::Safe>; -impl<'a, REG> IssW<'a, REG> +pub type ISS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ISS_A, crate::Safe>; +impl<'a, REG> ISS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,174 +70,174 @@ where #[doc = "The peripheral trigger function is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Iss::Value1) + self.variant(ISS_A::VALUE1) } #[doc = "Input ERU_OGUy1 is selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Iss::Value2) + self.variant(ISS_A::VALUE2) } #[doc = "Input ERU_OGUy2 is selected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Iss::Value3) + self.variant(ISS_A::VALUE3) } #[doc = "Input ERU_OGUy3 is selected"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Iss::Value4) + self.variant(ISS_A::VALUE4) } } #[doc = "Gating Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Geen { +pub enum GEEN_A { #[doc = "0: The event detection is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The event detection is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Geen) -> Self { + fn from(variant: GEEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GEEN` reader - Gating Event Enable"] -pub type GeenR = crate::BitReader; -impl GeenR { +pub type GEEN_R = crate::BitReader; +impl GEEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Geen { + pub const fn variant(&self) -> GEEN_A { match self.bits { - false => Geen::Value1, - true => Geen::Value2, + false => GEEN_A::VALUE1, + true => GEEN_A::VALUE2, } } #[doc = "The event detection is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Geen::Value1 + *self == GEEN_A::VALUE1 } #[doc = "The event detection is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Geen::Value2 + *self == GEEN_A::VALUE2 } } #[doc = "Field `GEEN` writer - Gating Event Enable"] -pub type GeenW<'a, REG> = crate::BitWriter<'a, REG, Geen>; -impl<'a, REG> GeenW<'a, REG> +pub type GEEN_W<'a, REG> = crate::BitWriter<'a, REG, GEEN_A>; +impl<'a, REG> GEEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The event detection is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Geen::Value1) + self.variant(GEEN_A::VALUE1) } #[doc = "The event detection is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Geen::Value2) + self.variant(GEEN_A::VALUE2) } } #[doc = "Pattern Detection Result Flag\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdr { +pub enum PDR_A { #[doc = "0: A pattern miss is detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A pattern match is detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdr) -> Self { + fn from(variant: PDR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDR` reader - Pattern Detection Result Flag"] -pub type PdrR = crate::BitReader; -impl PdrR { +pub type PDR_R = crate::BitReader; +impl PDR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdr { + pub const fn variant(&self) -> PDR_A { match self.bits { - false => Pdr::Value1, - true => Pdr::Value2, + false => PDR_A::VALUE1, + true => PDR_A::VALUE2, } } #[doc = "A pattern miss is detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdr::Value1 + *self == PDR_A::VALUE1 } #[doc = "A pattern match is detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdr::Value2 + *self == PDR_A::VALUE2 } } #[doc = "Gating Selection for Pattern Detection Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Gp { +pub enum GP_A { #[doc = "0: ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Gp) -> Self { + fn from(variant: GP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Gp { +impl crate::FieldSpec for GP_A { type Ux = u8; } -impl crate::IsEnum for Gp {} +impl crate::IsEnum for GP_A {} #[doc = "Field `GP` reader - Gating Selection for Pattern Detection Result"] -pub type GpR = crate::FieldReader; -impl GpR { +pub type GP_R = crate::FieldReader; +impl GP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gp { + pub const fn variant(&self) -> GP_A { match self.bits { - 0 => Gp::Value1, - 1 => Gp::Value2, - 2 => Gp::Value3, - 3 => Gp::Value4, + 0 => GP_A::VALUE1, + 1 => GP_A::VALUE2, + 2 => GP_A::VALUE3, + 3 => GP_A::VALUE4, _ => unreachable!(), } } #[doc = "ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gp::Value1 + *self == GP_A::VALUE1 } #[doc = "ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gp::Value2 + *self == GP_A::VALUE2 } #[doc = "ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Gp::Value3 + *self == GP_A::VALUE3 } #[doc = "ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Gp::Value4 + *self == GP_A::VALUE4 } } #[doc = "Field `GP` writer - Gating Selection for Pattern Detection Result"] -pub type GpW<'a, REG> = crate::FieldWriter<'a, REG, 2, Gp, crate::Safe>; -impl<'a, REG> GpW<'a, REG> +pub type GP_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GP_A, crate::Safe>; +impl<'a, REG> GP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -245,337 +245,337 @@ where #[doc = "ERU_GOUTy is always disabled and ERU_IOUTy can not be activated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gp::Value1) + self.variant(GP_A::VALUE1) } #[doc = "ERU_GOUTy is always enabled and ERU_IOUTy becomes activated with each activation of ERU_TOUTy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gp::Value2) + self.variant(GP_A::VALUE2) } #[doc = "ERU_GOUTy is equal to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is detected (pattern match PDR = 1)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Gp::Value3) + self.variant(GP_A::VALUE3) } #[doc = "ERU_GOUTy is inverted to ERU_PDOUTy and ERU_IOUTy becomes activated with an activation of ERU_TOUTy while the desired pattern is not detected (pattern miss PDR = 0)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Gp::Value4) + self.variant(GP_A::VALUE4) } } #[doc = "Pattern Detection Enable for ETL0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ipen0 { +pub enum IPEN0_A { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ipen0) -> Self { + fn from(variant: IPEN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IPEN0` reader - Pattern Detection Enable for ETL0"] -pub type Ipen0R = crate::BitReader; -impl Ipen0R { +pub type IPEN0_R = crate::BitReader; +impl IPEN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ipen0 { + pub const fn variant(&self) -> IPEN0_A { match self.bits { - false => Ipen0::Value1, - true => Ipen0::Value2, + false => IPEN0_A::VALUE1, + true => IPEN0_A::VALUE2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ipen0::Value1 + *self == IPEN0_A::VALUE1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ipen0::Value2 + *self == IPEN0_A::VALUE2 } } #[doc = "Field `IPEN0` writer - Pattern Detection Enable for ETL0"] -pub type Ipen0W<'a, REG> = crate::BitWriter<'a, REG, Ipen0>; -impl<'a, REG> Ipen0W<'a, REG> +pub type IPEN0_W<'a, REG> = crate::BitWriter<'a, REG, IPEN0_A>; +impl<'a, REG> IPEN0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ipen0::Value1) + self.variant(IPEN0_A::VALUE1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ipen0::Value2) + self.variant(IPEN0_A::VALUE2) } } #[doc = "Pattern Detection Enable for ETL1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ipen1 { +pub enum IPEN1_A { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ipen1) -> Self { + fn from(variant: IPEN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IPEN1` reader - Pattern Detection Enable for ETL1"] -pub type Ipen1R = crate::BitReader; -impl Ipen1R { +pub type IPEN1_R = crate::BitReader; +impl IPEN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ipen1 { + pub const fn variant(&self) -> IPEN1_A { match self.bits { - false => Ipen1::Value1, - true => Ipen1::Value2, + false => IPEN1_A::VALUE1, + true => IPEN1_A::VALUE2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ipen1::Value1 + *self == IPEN1_A::VALUE1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ipen1::Value2 + *self == IPEN1_A::VALUE2 } } #[doc = "Field `IPEN1` writer - Pattern Detection Enable for ETL1"] -pub type Ipen1W<'a, REG> = crate::BitWriter<'a, REG, Ipen1>; -impl<'a, REG> Ipen1W<'a, REG> +pub type IPEN1_W<'a, REG> = crate::BitWriter<'a, REG, IPEN1_A>; +impl<'a, REG> IPEN1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ipen1::Value1) + self.variant(IPEN1_A::VALUE1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ipen1::Value2) + self.variant(IPEN1_A::VALUE2) } } #[doc = "Pattern Detection Enable for ETL2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ipen2 { +pub enum IPEN2_A { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ipen2) -> Self { + fn from(variant: IPEN2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IPEN2` reader - Pattern Detection Enable for ETL2"] -pub type Ipen2R = crate::BitReader; -impl Ipen2R { +pub type IPEN2_R = crate::BitReader; +impl IPEN2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ipen2 { + pub const fn variant(&self) -> IPEN2_A { match self.bits { - false => Ipen2::Value1, - true => Ipen2::Value2, + false => IPEN2_A::VALUE1, + true => IPEN2_A::VALUE2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ipen2::Value1 + *self == IPEN2_A::VALUE1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ipen2::Value2 + *self == IPEN2_A::VALUE2 } } #[doc = "Field `IPEN2` writer - Pattern Detection Enable for ETL2"] -pub type Ipen2W<'a, REG> = crate::BitWriter<'a, REG, Ipen2>; -impl<'a, REG> Ipen2W<'a, REG> +pub type IPEN2_W<'a, REG> = crate::BitWriter<'a, REG, IPEN2_A>; +impl<'a, REG> IPEN2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ipen2::Value1) + self.variant(IPEN2_A::VALUE1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ipen2::Value2) + self.variant(IPEN2_A::VALUE2) } } #[doc = "Pattern Detection Enable for ETL3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ipen3 { +pub enum IPEN3_A { #[doc = "0: Flag EXICONx.FL is excluded from the pattern detection"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag EXICONx.FL is included in the pattern detection"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ipen3) -> Self { + fn from(variant: IPEN3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IPEN3` reader - Pattern Detection Enable for ETL3"] -pub type Ipen3R = crate::BitReader; -impl Ipen3R { +pub type IPEN3_R = crate::BitReader; +impl IPEN3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ipen3 { + pub const fn variant(&self) -> IPEN3_A { match self.bits { - false => Ipen3::Value1, - true => Ipen3::Value2, + false => IPEN3_A::VALUE1, + true => IPEN3_A::VALUE2, } } #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ipen3::Value1 + *self == IPEN3_A::VALUE1 } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ipen3::Value2 + *self == IPEN3_A::VALUE2 } } #[doc = "Field `IPEN3` writer - Pattern Detection Enable for ETL3"] -pub type Ipen3W<'a, REG> = crate::BitWriter<'a, REG, Ipen3>; -impl<'a, REG> Ipen3W<'a, REG> +pub type IPEN3_W<'a, REG> = crate::BitWriter<'a, REG, IPEN3_A>; +impl<'a, REG> IPEN3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flag EXICONx.FL is excluded from the pattern detection"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ipen3::Value1) + self.variant(IPEN3_A::VALUE1) } #[doc = "Flag EXICONx.FL is included in the pattern detection"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ipen3::Value2) + self.variant(IPEN3_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Internal Trigger Source Selection"] #[inline(always)] - pub fn iss(&self) -> IssR { - IssR::new((self.bits & 3) as u8) + pub fn iss(&self) -> ISS_R { + ISS_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Gating Event Enable"] #[inline(always)] - pub fn geen(&self) -> GeenR { - GeenR::new(((self.bits >> 2) & 1) != 0) + pub fn geen(&self) -> GEEN_R { + GEEN_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pattern Detection Result Flag"] #[inline(always)] - pub fn pdr(&self) -> PdrR { - PdrR::new(((self.bits >> 3) & 1) != 0) + pub fn pdr(&self) -> PDR_R { + PDR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"] #[inline(always)] - pub fn gp(&self) -> GpR { - GpR::new(((self.bits >> 4) & 3) as u8) + pub fn gp(&self) -> GP_R { + GP_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 12 - Pattern Detection Enable for ETL0"] #[inline(always)] - pub fn ipen0(&self) -> Ipen0R { - Ipen0R::new(((self.bits >> 12) & 1) != 0) + pub fn ipen0(&self) -> IPEN0_R { + IPEN0_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pattern Detection Enable for ETL1"] #[inline(always)] - pub fn ipen1(&self) -> Ipen1R { - Ipen1R::new(((self.bits >> 13) & 1) != 0) + pub fn ipen1(&self) -> IPEN1_R { + IPEN1_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pattern Detection Enable for ETL2"] #[inline(always)] - pub fn ipen2(&self) -> Ipen2R { - Ipen2R::new(((self.bits >> 14) & 1) != 0) + pub fn ipen2(&self) -> IPEN2_R { + IPEN2_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pattern Detection Enable for ETL3"] #[inline(always)] - pub fn ipen3(&self) -> Ipen3R { - Ipen3R::new(((self.bits >> 15) & 1) != 0) + pub fn ipen3(&self) -> IPEN3_R { + IPEN3_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Internal Trigger Source Selection"] #[inline(always)] #[must_use] - pub fn iss(&mut self) -> IssW { - IssW::new(self, 0) + pub fn iss(&mut self) -> ISS_W { + ISS_W::new(self, 0) } #[doc = "Bit 2 - Gating Event Enable"] #[inline(always)] #[must_use] - pub fn geen(&mut self) -> GeenW { - GeenW::new(self, 2) + pub fn geen(&mut self) -> GEEN_W { + GEEN_W::new(self, 2) } #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"] #[inline(always)] #[must_use] - pub fn gp(&mut self) -> GpW { - GpW::new(self, 4) + pub fn gp(&mut self) -> GP_W { + GP_W::new(self, 4) } #[doc = "Bit 12 - Pattern Detection Enable for ETL0"] #[inline(always)] #[must_use] - pub fn ipen0(&mut self) -> Ipen0W { - Ipen0W::new(self, 12) + pub fn ipen0(&mut self) -> IPEN0_W { + IPEN0_W::new(self, 12) } #[doc = "Bit 13 - Pattern Detection Enable for ETL1"] #[inline(always)] #[must_use] - pub fn ipen1(&mut self) -> Ipen1W { - Ipen1W::new(self, 13) + pub fn ipen1(&mut self) -> IPEN1_W { + IPEN1_W::new(self, 13) } #[doc = "Bit 14 - Pattern Detection Enable for ETL2"] #[inline(always)] #[must_use] - pub fn ipen2(&mut self) -> Ipen2W { - Ipen2W::new(self, 14) + pub fn ipen2(&mut self) -> IPEN2_W { + IPEN2_W::new(self, 14) } #[doc = "Bit 15 - Pattern Detection Enable for ETL3"] #[inline(always)] #[must_use] - pub fn ipen3(&mut self) -> Ipen3W { - Ipen3W::new(self, 15) + pub fn ipen3(&mut self) -> IPEN3_W { + IPEN3_W::new(self, 15) } } #[doc = "Event Output Trigger Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`exocon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`exocon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ExoconSpec; -impl crate::RegisterSpec for ExoconSpec { +pub struct EXOCON_SPEC; +impl crate::RegisterSpec for EXOCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`exocon::R`](R) reader structure"] -impl crate::Readable for ExoconSpec {} +impl crate::Readable for EXOCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`exocon::W`](W) writer structure"] -impl crate::Writable for ExoconSpec { +impl crate::Writable for EXOCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXOCON[%s] to value 0x08"] -impl crate::Resettable for ExoconSpec { +impl crate::Resettable for EXOCON_SPEC { const RESET_VALUE: u32 = 0x08; } diff --git a/src/fce.rs b/src/fce.rs index e68f1231..45bdd5fd 100644 --- a/src/fce.rs +++ b/src/fce.rs @@ -1,31 +1,29 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - clc: Clc, + clc: CLC, _reserved1: [u8; 0x04], - id: Id, + id: ID, } impl RegisterBlock { #[doc = "0x00 - Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &Clc { + pub const fn clc(&self) -> &CLC { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } } #[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -#[doc(alias = "CLC")] -pub type Clc = crate::Reg; +pub type CLC = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; diff --git a/src/fce/clc.rs b/src/fce/clc.rs index 49755390..0baf3615 100644 --- a/src/fce/clc.rs +++ b/src/fce/clc.rs @@ -1,47 +1,47 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DisrR = crate::BitReader; +pub type DISR_R = crate::BitReader; #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DisrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DissR = crate::BitReader; +pub type DISS_R = crate::BitReader; impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DisrR { - DisrR::new((self.bits & 1) != 0) + pub fn disr(&self) -> DISR_R { + DISR_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DissR { - DissR::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DISS_R { + DISS_R::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DisrW { - DisrW::new(self, 0) + pub fn disr(&mut self) -> DISR_W { + DISR_W::new(self, 0) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClcSpec; -impl crate::RegisterSpec for ClcSpec { +pub struct CLC_SPEC; +impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for ClcSpec {} +impl crate::Readable for CLC_SPEC {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for ClcSpec { +impl crate::Writable for CLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for ClcSpec { +impl crate::Resettable for CLC_SPEC { const RESET_VALUE: u32 = 0x03; } diff --git a/src/fce/id.rs b/src/fce/id.rs index 551cc54b..f575170f 100644 --- a/src/fce/id.rs +++ b/src/fce/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00ca_c001"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00ca_c001; } diff --git a/src/fce_ke0.rs b/src/fce_ke0.rs index 54c7379c..356495fc 100644 --- a/src/fce_ke0.rs +++ b/src/fce_ke0.rs @@ -1,101 +1,93 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - ir: Ir, - res: Res, - cfg: Cfg, - sts: Sts, - length: Length, - check: Check, - crc: Crc, - ctr: Ctr, + ir: IR, + res: RES, + cfg: CFG, + sts: STS, + length: LENGTH, + check: CHECK, + crc: CRC, + ctr: CTR, } impl RegisterBlock { #[doc = "0x00 - Input Register"] #[inline(always)] - pub const fn ir(&self) -> &Ir { + pub const fn ir(&self) -> &IR { &self.ir } #[doc = "0x04 - CRC Result Register"] #[inline(always)] - pub const fn res(&self) -> &Res { + pub const fn res(&self) -> &RES { &self.res } #[doc = "0x08 - CRC Configuration Register"] #[inline(always)] - pub const fn cfg(&self) -> &Cfg { + pub const fn cfg(&self) -> &CFG { &self.cfg } #[doc = "0x0c - CRC Status Register"] #[inline(always)] - pub const fn sts(&self) -> &Sts { + pub const fn sts(&self) -> &STS { &self.sts } #[doc = "0x10 - CRC Length Register"] #[inline(always)] - pub const fn length(&self) -> &Length { + pub const fn length(&self) -> &LENGTH { &self.length } #[doc = "0x14 - CRC Check Register"] #[inline(always)] - pub const fn check(&self) -> &Check { + pub const fn check(&self) -> &CHECK { &self.check } #[doc = "0x18 - CRC Register"] #[inline(always)] - pub const fn crc(&self) -> &Crc { + pub const fn crc(&self) -> &CRC { &self.crc } #[doc = "0x1c - CRC Test Register"] #[inline(always)] - pub const fn ctr(&self) -> &Ctr { + pub const fn ctr(&self) -> &CTR { &self.ctr } } #[doc = "IR (rw) register accessor: Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ir`] module"] -#[doc(alias = "IR")] -pub type Ir = crate::Reg; +pub type IR = crate::Reg; #[doc = "Input Register"] pub mod ir; #[doc = "RES (r) register accessor: CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] module"] -#[doc(alias = "RES")] -pub type Res = crate::Reg; +pub type RES = crate::Reg; #[doc = "CRC Result Register"] pub mod res; #[doc = "CFG (rw) register accessor: CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -#[doc(alias = "CFG")] -pub type Cfg = crate::Reg; +pub type CFG = crate::Reg; #[doc = "CRC Configuration Register"] pub mod cfg; #[doc = "STS (rw) register accessor: CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] -#[doc(alias = "STS")] -pub type Sts = crate::Reg; +pub type STS = crate::Reg; #[doc = "CRC Status Register"] pub mod sts; #[doc = "LENGTH (rw) register accessor: CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`] module"] -#[doc(alias = "LENGTH")] -pub type Length = crate::Reg; +pub type LENGTH = crate::Reg; #[doc = "CRC Length Register"] pub mod length; #[doc = "CHECK (rw) register accessor: CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@check`] module"] -#[doc(alias = "CHECK")] -pub type Check = crate::Reg; +pub type CHECK = crate::Reg; #[doc = "CRC Check Register"] pub mod check; #[doc = "CRC (rw) register accessor: CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crc`] module"] -#[doc(alias = "CRC")] -pub type Crc = crate::Reg; +pub type CRC = crate::Reg; #[doc = "CRC Register"] pub mod crc; #[doc = "CTR (rw) register accessor: CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -#[doc(alias = "CTR")] -pub type Ctr = crate::Reg; +pub type CTR = crate::Reg; #[doc = "CRC Test Register"] pub mod ctr; diff --git a/src/fce_ke0/cfg.rs b/src/fce_ke0/cfg.rs index 89b79a7d..948f0f0b 100644 --- a/src/fce_ke0/cfg.rs +++ b/src/fce_ke0/cfg.rs @@ -1,601 +1,601 @@ #[doc = "Register `CFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CRC Mismatch Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmi { +pub enum CMI_A { #[doc = "0: CRC Mismatch Interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CRC Mismatch Interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmi) -> Self { + fn from(variant: CMI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMI` reader - CRC Mismatch Interrupt"] -pub type CmiR = crate::BitReader; -impl CmiR { +pub type CMI_R = crate::BitReader; +impl CMI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmi { + pub const fn variant(&self) -> CMI_A { match self.bits { - false => Cmi::Value1, - true => Cmi::Value2, + false => CMI_A::VALUE1, + true => CMI_A::VALUE2, } } #[doc = "CRC Mismatch Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmi::Value1 + *self == CMI_A::VALUE1 } #[doc = "CRC Mismatch Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmi::Value2 + *self == CMI_A::VALUE2 } } #[doc = "Field `CMI` writer - CRC Mismatch Interrupt"] -pub type CmiW<'a, REG> = crate::BitWriter<'a, REG, Cmi>; -impl<'a, REG> CmiW<'a, REG> +pub type CMI_W<'a, REG> = crate::BitWriter<'a, REG, CMI_A>; +impl<'a, REG> CMI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC Mismatch Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmi::Value1) + self.variant(CMI_A::VALUE1) } #[doc = "CRC Mismatch Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmi::Value2) + self.variant(CMI_A::VALUE2) } } #[doc = "Configuration Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cei { +pub enum CEI_A { #[doc = "0: Configuration Error Interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Configuration Error Interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cei) -> Self { + fn from(variant: CEI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEI` reader - Configuration Error Interrupt"] -pub type CeiR = crate::BitReader; -impl CeiR { +pub type CEI_R = crate::BitReader; +impl CEI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cei { + pub const fn variant(&self) -> CEI_A { match self.bits { - false => Cei::Value1, - true => Cei::Value2, + false => CEI_A::VALUE1, + true => CEI_A::VALUE2, } } #[doc = "Configuration Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cei::Value1 + *self == CEI_A::VALUE1 } #[doc = "Configuration Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cei::Value2 + *self == CEI_A::VALUE2 } } #[doc = "Field `CEI` writer - Configuration Error Interrupt"] -pub type CeiW<'a, REG> = crate::BitWriter<'a, REG, Cei>; -impl<'a, REG> CeiW<'a, REG> +pub type CEI_W<'a, REG> = crate::BitWriter<'a, REG, CEI_A>; +impl<'a, REG> CEI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Configuration Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cei::Value1) + self.variant(CEI_A::VALUE1) } #[doc = "Configuration Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cei::Value2) + self.variant(CEI_A::VALUE2) } } #[doc = "Length Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lei { +pub enum LEI_A { #[doc = "0: Length Error Interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Length Error Interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lei) -> Self { + fn from(variant: LEI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEI` reader - Length Error Interrupt"] -pub type LeiR = crate::BitReader; -impl LeiR { +pub type LEI_R = crate::BitReader; +impl LEI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lei { + pub const fn variant(&self) -> LEI_A { match self.bits { - false => Lei::Value1, - true => Lei::Value2, + false => LEI_A::VALUE1, + true => LEI_A::VALUE2, } } #[doc = "Length Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lei::Value1 + *self == LEI_A::VALUE1 } #[doc = "Length Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lei::Value2 + *self == LEI_A::VALUE2 } } #[doc = "Field `LEI` writer - Length Error Interrupt"] -pub type LeiW<'a, REG> = crate::BitWriter<'a, REG, Lei>; -impl<'a, REG> LeiW<'a, REG> +pub type LEI_W<'a, REG> = crate::BitWriter<'a, REG, LEI_A>; +impl<'a, REG> LEI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Length Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lei::Value1) + self.variant(LEI_A::VALUE1) } #[doc = "Length Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lei::Value2) + self.variant(LEI_A::VALUE2) } } #[doc = "Bus Error Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bei { +pub enum BEI_A { #[doc = "0: Bus Error Interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bus Error Interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bei) -> Self { + fn from(variant: BEI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BEI` reader - Bus Error Interrupt"] -pub type BeiR = crate::BitReader; -impl BeiR { +pub type BEI_R = crate::BitReader; +impl BEI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bei { + pub const fn variant(&self) -> BEI_A { match self.bits { - false => Bei::Value1, - true => Bei::Value2, + false => BEI_A::VALUE1, + true => BEI_A::VALUE2, } } #[doc = "Bus Error Interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bei::Value1 + *self == BEI_A::VALUE1 } #[doc = "Bus Error Interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bei::Value2 + *self == BEI_A::VALUE2 } } #[doc = "Field `BEI` writer - Bus Error Interrupt"] -pub type BeiW<'a, REG> = crate::BitWriter<'a, REG, Bei>; -impl<'a, REG> BeiW<'a, REG> +pub type BEI_W<'a, REG> = crate::BitWriter<'a, REG, BEI_A>; +impl<'a, REG> BEI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bus Error Interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bei::Value1) + self.variant(BEI_A::VALUE1) } #[doc = "Bus Error Interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bei::Value2) + self.variant(BEI_A::VALUE2) } } #[doc = "CRC Check Comparison\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cce { +pub enum CCE_A { #[doc = "0: CRC check comparison at the end of a message is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CRC check comparison at the end of a message is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cce) -> Self { + fn from(variant: CCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCE` reader - CRC Check Comparison"] -pub type CceR = crate::BitReader; -impl CceR { +pub type CCE_R = crate::BitReader; +impl CCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cce { + pub const fn variant(&self) -> CCE_A { match self.bits { - false => Cce::Value1, - true => Cce::Value2, + false => CCE_A::VALUE1, + true => CCE_A::VALUE2, } } #[doc = "CRC check comparison at the end of a message is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cce::Value1 + *self == CCE_A::VALUE1 } #[doc = "CRC check comparison at the end of a message is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cce::Value2 + *self == CCE_A::VALUE2 } } #[doc = "Field `CCE` writer - CRC Check Comparison"] -pub type CceW<'a, REG> = crate::BitWriter<'a, REG, Cce>; -impl<'a, REG> CceW<'a, REG> +pub type CCE_W<'a, REG> = crate::BitWriter<'a, REG, CCE_A>; +impl<'a, REG> CCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC check comparison at the end of a message is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cce::Value1) + self.variant(CCE_A::VALUE1) } #[doc = "CRC check comparison at the end of a message is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cce::Value2) + self.variant(CCE_A::VALUE2) } } #[doc = "Automatic Length Reload\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Alr { +pub enum ALR_A { #[doc = "0: Disables automatic reload of the LENGTH field."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enables automatic reload of the LENGTH field at the end of a message."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Alr) -> Self { + fn from(variant: ALR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ALR` reader - Automatic Length Reload"] -pub type AlrR = crate::BitReader; -impl AlrR { +pub type ALR_R = crate::BitReader; +impl ALR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Alr { + pub const fn variant(&self) -> ALR_A { match self.bits { - false => Alr::Value1, - true => Alr::Value2, + false => ALR_A::VALUE1, + true => ALR_A::VALUE2, } } #[doc = "Disables automatic reload of the LENGTH field."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Alr::Value1 + *self == ALR_A::VALUE1 } #[doc = "Enables automatic reload of the LENGTH field at the end of a message."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Alr::Value2 + *self == ALR_A::VALUE2 } } #[doc = "Field `ALR` writer - Automatic Length Reload"] -pub type AlrW<'a, REG> = crate::BitWriter<'a, REG, Alr>; -impl<'a, REG> AlrW<'a, REG> +pub type ALR_W<'a, REG> = crate::BitWriter<'a, REG, ALR_A>; +impl<'a, REG> ALR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disables automatic reload of the LENGTH field."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Alr::Value1) + self.variant(ALR_A::VALUE1) } #[doc = "Enables automatic reload of the LENGTH field at the end of a message."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Alr::Value2) + self.variant(ALR_A::VALUE2) } } #[doc = "IR Byte Wise Reflection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Refin { +pub enum REFIN_A { #[doc = "0: IR Byte Wise Reflection is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: IR Byte Wise Reflection is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Refin) -> Self { + fn from(variant: REFIN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REFIN` reader - IR Byte Wise Reflection"] -pub type RefinR = crate::BitReader; -impl RefinR { +pub type REFIN_R = crate::BitReader; +impl REFIN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Refin { + pub const fn variant(&self) -> REFIN_A { match self.bits { - false => Refin::Value1, - true => Refin::Value2, + false => REFIN_A::VALUE1, + true => REFIN_A::VALUE2, } } #[doc = "IR Byte Wise Reflection is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Refin::Value1 + *self == REFIN_A::VALUE1 } #[doc = "IR Byte Wise Reflection is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Refin::Value2 + *self == REFIN_A::VALUE2 } } #[doc = "Field `REFIN` writer - IR Byte Wise Reflection"] -pub type RefinW<'a, REG> = crate::BitWriter<'a, REG, Refin>; -impl<'a, REG> RefinW<'a, REG> +pub type REFIN_W<'a, REG> = crate::BitWriter<'a, REG, REFIN_A>; +impl<'a, REG> REFIN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "IR Byte Wise Reflection is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Refin::Value1) + self.variant(REFIN_A::VALUE1) } #[doc = "IR Byte Wise Reflection is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Refin::Value2) + self.variant(REFIN_A::VALUE2) } } #[doc = "CRC 32-Bit Wise Reflection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Refout { +pub enum REFOUT_A { #[doc = "0: CRC 32-bit wise is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CRC 32-bit wise is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Refout) -> Self { + fn from(variant: REFOUT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REFOUT` reader - CRC 32-Bit Wise Reflection"] -pub type RefoutR = crate::BitReader; -impl RefoutR { +pub type REFOUT_R = crate::BitReader; +impl REFOUT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Refout { + pub const fn variant(&self) -> REFOUT_A { match self.bits { - false => Refout::Value1, - true => Refout::Value2, + false => REFOUT_A::VALUE1, + true => REFOUT_A::VALUE2, } } #[doc = "CRC 32-bit wise is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Refout::Value1 + *self == REFOUT_A::VALUE1 } #[doc = "CRC 32-bit wise is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Refout::Value2 + *self == REFOUT_A::VALUE2 } } #[doc = "Field `REFOUT` writer - CRC 32-Bit Wise Reflection"] -pub type RefoutW<'a, REG> = crate::BitWriter<'a, REG, Refout>; -impl<'a, REG> RefoutW<'a, REG> +pub type REFOUT_W<'a, REG> = crate::BitWriter<'a, REG, REFOUT_A>; +impl<'a, REG> REFOUT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "CRC 32-bit wise is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Refout::Value1) + self.variant(REFOUT_A::VALUE1) } #[doc = "CRC 32-bit wise is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Refout::Value2) + self.variant(REFOUT_A::VALUE2) } } #[doc = "Selects the value to be xored with the final CRC\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xsel { +pub enum XSEL_A { #[doc = "0: 0x00000000"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 0xFFFFFFFF"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xsel) -> Self { + fn from(variant: XSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XSEL` reader - Selects the value to be xored with the final CRC"] -pub type XselR = crate::BitReader; -impl XselR { +pub type XSEL_R = crate::BitReader; +impl XSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xsel { + pub const fn variant(&self) -> XSEL_A { match self.bits { - false => Xsel::Value1, - true => Xsel::Value2, + false => XSEL_A::VALUE1, + true => XSEL_A::VALUE2, } } #[doc = "0x00000000"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xsel::Value1 + *self == XSEL_A::VALUE1 } #[doc = "0xFFFFFFFF"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xsel::Value2 + *self == XSEL_A::VALUE2 } } #[doc = "Field `XSEL` writer - Selects the value to be xored with the final CRC"] -pub type XselW<'a, REG> = crate::BitWriter<'a, REG, Xsel>; -impl<'a, REG> XselW<'a, REG> +pub type XSEL_W<'a, REG> = crate::BitWriter<'a, REG, XSEL_A>; +impl<'a, REG> XSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "0x00000000"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xsel::Value1) + self.variant(XSEL_A::VALUE1) } #[doc = "0xFFFFFFFF"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xsel::Value2) + self.variant(XSEL_A::VALUE2) } } impl R { #[doc = "Bit 0 - CRC Mismatch Interrupt"] #[inline(always)] - pub fn cmi(&self) -> CmiR { - CmiR::new((self.bits & 1) != 0) + pub fn cmi(&self) -> CMI_R { + CMI_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Error Interrupt"] #[inline(always)] - pub fn cei(&self) -> CeiR { - CeiR::new(((self.bits >> 1) & 1) != 0) + pub fn cei(&self) -> CEI_R { + CEI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Length Error Interrupt"] #[inline(always)] - pub fn lei(&self) -> LeiR { - LeiR::new(((self.bits >> 2) & 1) != 0) + pub fn lei(&self) -> LEI_R { + LEI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Bus Error Interrupt"] #[inline(always)] - pub fn bei(&self) -> BeiR { - BeiR::new(((self.bits >> 3) & 1) != 0) + pub fn bei(&self) -> BEI_R { + BEI_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - CRC Check Comparison"] #[inline(always)] - pub fn cce(&self) -> CceR { - CceR::new(((self.bits >> 4) & 1) != 0) + pub fn cce(&self) -> CCE_R { + CCE_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Automatic Length Reload"] #[inline(always)] - pub fn alr(&self) -> AlrR { - AlrR::new(((self.bits >> 5) & 1) != 0) + pub fn alr(&self) -> ALR_R { + ALR_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - IR Byte Wise Reflection"] #[inline(always)] - pub fn refin(&self) -> RefinR { - RefinR::new(((self.bits >> 8) & 1) != 0) + pub fn refin(&self) -> REFIN_R { + REFIN_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"] #[inline(always)] - pub fn refout(&self) -> RefoutR { - RefoutR::new(((self.bits >> 9) & 1) != 0) + pub fn refout(&self) -> REFOUT_R { + REFOUT_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Selects the value to be xored with the final CRC"] #[inline(always)] - pub fn xsel(&self) -> XselR { - XselR::new(((self.bits >> 10) & 1) != 0) + pub fn xsel(&self) -> XSEL_R { + XSEL_R::new(((self.bits >> 10) & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Mismatch Interrupt"] #[inline(always)] #[must_use] - pub fn cmi(&mut self) -> CmiW { - CmiW::new(self, 0) + pub fn cmi(&mut self) -> CMI_W { + CMI_W::new(self, 0) } #[doc = "Bit 1 - Configuration Error Interrupt"] #[inline(always)] #[must_use] - pub fn cei(&mut self) -> CeiW { - CeiW::new(self, 1) + pub fn cei(&mut self) -> CEI_W { + CEI_W::new(self, 1) } #[doc = "Bit 2 - Length Error Interrupt"] #[inline(always)] #[must_use] - pub fn lei(&mut self) -> LeiW { - LeiW::new(self, 2) + pub fn lei(&mut self) -> LEI_W { + LEI_W::new(self, 2) } #[doc = "Bit 3 - Bus Error Interrupt"] #[inline(always)] #[must_use] - pub fn bei(&mut self) -> BeiW { - BeiW::new(self, 3) + pub fn bei(&mut self) -> BEI_W { + BEI_W::new(self, 3) } #[doc = "Bit 4 - CRC Check Comparison"] #[inline(always)] #[must_use] - pub fn cce(&mut self) -> CceW { - CceW::new(self, 4) + pub fn cce(&mut self) -> CCE_W { + CCE_W::new(self, 4) } #[doc = "Bit 5 - Automatic Length Reload"] #[inline(always)] #[must_use] - pub fn alr(&mut self) -> AlrW { - AlrW::new(self, 5) + pub fn alr(&mut self) -> ALR_W { + ALR_W::new(self, 5) } #[doc = "Bit 8 - IR Byte Wise Reflection"] #[inline(always)] #[must_use] - pub fn refin(&mut self) -> RefinW { - RefinW::new(self, 8) + pub fn refin(&mut self) -> REFIN_W { + REFIN_W::new(self, 8) } #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"] #[inline(always)] #[must_use] - pub fn refout(&mut self) -> RefoutW { - RefoutW::new(self, 9) + pub fn refout(&mut self) -> REFOUT_W { + REFOUT_W::new(self, 9) } #[doc = "Bit 10 - Selects the value to be xored with the final CRC"] #[inline(always)] #[must_use] - pub fn xsel(&mut self) -> XselW { - XselW::new(self, 10) + pub fn xsel(&mut self) -> XSEL_W { + XSEL_W::new(self, 10) } } #[doc = "CRC Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfgSpec; -impl crate::RegisterSpec for CfgSpec { +pub struct CFG_SPEC; +impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfg::R`](R) reader structure"] -impl crate::Readable for CfgSpec {} +impl crate::Readable for CFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfg::W`](W) writer structure"] -impl crate::Writable for CfgSpec { +impl crate::Writable for CFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFG to value 0x0700"] -impl crate::Resettable for CfgSpec { +impl crate::Resettable for CFG_SPEC { const RESET_VALUE: u32 = 0x0700; } diff --git a/src/fce_ke0/check.rs b/src/fce_ke0/check.rs index 42b3f408..6b484ebb 100644 --- a/src/fce_ke0/check.rs +++ b/src/fce_ke0/check.rs @@ -1,40 +1,40 @@ #[doc = "Register `CHECK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHECK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CHECK` reader - CHECK Register"] -pub type CheckR = crate::FieldReader; +pub type CHECK_R = crate::FieldReader; #[doc = "Field `CHECK` writer - CHECK Register"] -pub type CheckW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type CHECK_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CHECK Register"] #[inline(always)] - pub fn check(&self) -> CheckR { - CheckR::new(self.bits) + pub fn check(&self) -> CHECK_R { + CHECK_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CHECK Register"] #[inline(always)] #[must_use] - pub fn check(&mut self) -> CheckW { - CheckW::new(self, 0) + pub fn check(&mut self) -> CHECK_W { + CHECK_W::new(self, 0) } } #[doc = "CRC Check Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`check::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`check::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CheckSpec; -impl crate::RegisterSpec for CheckSpec { +pub struct CHECK_SPEC; +impl crate::RegisterSpec for CHECK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`check::R`](R) reader structure"] -impl crate::Readable for CheckSpec {} +impl crate::Readable for CHECK_SPEC {} #[doc = "`write(|w| ..)` method takes [`check::W`](W) writer structure"] -impl crate::Writable for CheckSpec { +impl crate::Writable for CHECK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHECK to value 0"] -impl crate::Resettable for CheckSpec { +impl crate::Resettable for CHECK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/crc.rs b/src/fce_ke0/crc.rs index f2f728c3..22fabadb 100644 --- a/src/fce_ke0/crc.rs +++ b/src/fce_ke0/crc.rs @@ -1,40 +1,40 @@ #[doc = "Register `CRC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CRC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRC` reader - CRC Register"] -pub type CrcR = crate::FieldReader; +pub type CRC_R = crate::FieldReader; #[doc = "Field `CRC` writer - CRC Register"] -pub type CrcW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type CRC_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - CRC Register"] #[inline(always)] - pub fn crc(&self) -> CrcR { - CrcR::new(self.bits) + pub fn crc(&self) -> CRC_R { + CRC_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC Register"] #[inline(always)] #[must_use] - pub fn crc(&mut self) -> CrcW { - CrcW::new(self, 0) + pub fn crc(&mut self) -> CRC_W { + CRC_W::new(self, 0) } } #[doc = "CRC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CrcSpec; -impl crate::RegisterSpec for CrcSpec { +pub struct CRC_SPEC; +impl crate::RegisterSpec for CRC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`crc::R`](R) reader structure"] -impl crate::Readable for CrcSpec {} +impl crate::Readable for CRC_SPEC {} #[doc = "`write(|w| ..)` method takes [`crc::W`](W) writer structure"] -impl crate::Writable for CrcSpec { +impl crate::Writable for CRC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CRC to value 0"] -impl crate::Resettable for CrcSpec { +impl crate::Resettable for CRC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/ctr.rs b/src/fce_ke0/ctr.rs index 5b3a7351..5597415c 100644 --- a/src/fce_ke0/ctr.rs +++ b/src/fce_ke0/ctr.rs @@ -1,70 +1,70 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `FCM` reader - Force CRC Mismatch"] -pub type FcmR = crate::BitReader; +pub type FCM_R = crate::BitReader; #[doc = "Field `FCM` writer - Force CRC Mismatch"] -pub type FcmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FCM_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRM_CFG` reader - Force CFG Register Mismatch"] -pub type FrmCfgR = crate::BitReader; +pub type FRM_CFG_R = crate::BitReader; #[doc = "Field `FRM_CFG` writer - Force CFG Register Mismatch"] -pub type FrmCfgW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FRM_CFG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FRM_CHECK` reader - Force Check Register Mismatch"] -pub type FrmCheckR = crate::BitReader; +pub type FRM_CHECK_R = crate::BitReader; #[doc = "Field `FRM_CHECK` writer - Force Check Register Mismatch"] -pub type FrmCheckW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FRM_CHECK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Force CRC Mismatch"] #[inline(always)] - pub fn fcm(&self) -> FcmR { - FcmR::new((self.bits & 1) != 0) + pub fn fcm(&self) -> FCM_R { + FCM_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Force CFG Register Mismatch"] #[inline(always)] - pub fn frm_cfg(&self) -> FrmCfgR { - FrmCfgR::new(((self.bits >> 1) & 1) != 0) + pub fn frm_cfg(&self) -> FRM_CFG_R { + FRM_CFG_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Force Check Register Mismatch"] #[inline(always)] - pub fn frm_check(&self) -> FrmCheckR { - FrmCheckR::new(((self.bits >> 2) & 1) != 0) + pub fn frm_check(&self) -> FRM_CHECK_R { + FRM_CHECK_R::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Force CRC Mismatch"] #[inline(always)] #[must_use] - pub fn fcm(&mut self) -> FcmW { - FcmW::new(self, 0) + pub fn fcm(&mut self) -> FCM_W { + FCM_W::new(self, 0) } #[doc = "Bit 1 - Force CFG Register Mismatch"] #[inline(always)] #[must_use] - pub fn frm_cfg(&mut self) -> FrmCfgW { - FrmCfgW::new(self, 1) + pub fn frm_cfg(&mut self) -> FRM_CFG_W { + FRM_CFG_W::new(self, 1) } #[doc = "Bit 2 - Force Check Register Mismatch"] #[inline(always)] #[must_use] - pub fn frm_check(&mut self) -> FrmCheckW { - FrmCheckW::new(self, 2) + pub fn frm_check(&mut self) -> FRM_CHECK_W { + FRM_CHECK_W::new(self, 2) } } #[doc = "CRC Test Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtrSpec; -impl crate::RegisterSpec for CtrSpec { +pub struct CTR_SPEC; +impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CtrSpec {} +impl crate::Readable for CTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CtrSpec { +impl crate::Writable for CTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0"] -impl crate::Resettable for CtrSpec { +impl crate::Resettable for CTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/ir.rs b/src/fce_ke0/ir.rs index 4d3f58ca..010e034f 100644 --- a/src/fce_ke0/ir.rs +++ b/src/fce_ke0/ir.rs @@ -1,40 +1,40 @@ #[doc = "Register `IR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `IR` reader - Input Register"] -pub type IrR = crate::FieldReader; +pub type IR_R = crate::FieldReader; #[doc = "Field `IR` writer - Input Register"] -pub type IrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type IR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Input Register"] #[inline(always)] - pub fn ir(&self) -> IrR { - IrR::new(self.bits) + pub fn ir(&self) -> IR_R { + IR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Input Register"] #[inline(always)] #[must_use] - pub fn ir(&mut self) -> IrW { - IrW::new(self, 0) + pub fn ir(&mut self) -> IR_W { + IR_W::new(self, 0) } } #[doc = "Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ir::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ir::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IrSpec; -impl crate::RegisterSpec for IrSpec { +pub struct IR_SPEC; +impl crate::RegisterSpec for IR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ir::R`](R) reader structure"] -impl crate::Readable for IrSpec {} +impl crate::Readable for IR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ir::W`](W) writer structure"] -impl crate::Writable for IrSpec { +impl crate::Writable for IR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IR to value 0"] -impl crate::Resettable for IrSpec { +impl crate::Resettable for IR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/length.rs b/src/fce_ke0/length.rs index 0f784a0b..827655bc 100644 --- a/src/fce_ke0/length.rs +++ b/src/fce_ke0/length.rs @@ -1,40 +1,40 @@ #[doc = "Register `LENGTH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LENGTH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LENGTH` reader - Message Length Register"] -pub type LengthR = crate::FieldReader; +pub type LENGTH_R = crate::FieldReader; #[doc = "Field `LENGTH` writer - Message Length Register"] -pub type LengthW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type LENGTH_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Message Length Register"] #[inline(always)] - pub fn length(&self) -> LengthR { - LengthR::new((self.bits & 0xffff) as u16) + pub fn length(&self) -> LENGTH_R { + LENGTH_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Message Length Register"] #[inline(always)] #[must_use] - pub fn length(&mut self) -> LengthW { - LengthW::new(self, 0) + pub fn length(&mut self) -> LENGTH_W { + LENGTH_W::new(self, 0) } } #[doc = "CRC Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`length::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`length::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LengthSpec; -impl crate::RegisterSpec for LengthSpec { +pub struct LENGTH_SPEC; +impl crate::RegisterSpec for LENGTH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`length::R`](R) reader structure"] -impl crate::Readable for LengthSpec {} +impl crate::Readable for LENGTH_SPEC {} #[doc = "`write(|w| ..)` method takes [`length::W`](W) writer structure"] -impl crate::Writable for LengthSpec { +impl crate::Writable for LENGTH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LENGTH to value 0"] -impl crate::Resettable for LengthSpec { +impl crate::Resettable for LENGTH_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/fce_ke0/res.rs b/src/fce_ke0/res.rs index 064b7481..f673a85c 100644 --- a/src/fce_ke0/res.rs +++ b/src/fce_ke0/res.rs @@ -1,22 +1,22 @@ #[doc = "Register `RES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RES` reader - Result Register"] -pub type ResR = crate::FieldReader; +pub type RES_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Result Register"] #[inline(always)] - pub fn res(&self) -> ResR { - ResR::new(self.bits) + pub fn res(&self) -> RES_R { + RES_R::new(self.bits) } } #[doc = "CRC Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ResSpec; -impl crate::RegisterSpec for ResSpec { +pub struct RES_SPEC; +impl crate::RegisterSpec for RES_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`res::R`](R) reader structure"] -impl crate::Readable for ResSpec {} +impl crate::Readable for RES_SPEC {} #[doc = "`reset()` method sets RES to value 0xffff_ffff"] -impl crate::Resettable for ResSpec { +impl crate::Resettable for RES_SPEC { const RESET_VALUE: u32 = 0xffff_ffff; } diff --git a/src/fce_ke0/sts.rs b/src/fce_ke0/sts.rs index 188150e9..1af113e3 100644 --- a/src/fce_ke0/sts.rs +++ b/src/fce_ke0/sts.rs @@ -1,85 +1,85 @@ #[doc = "Register `STS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMF` reader - CRC Mismatch Flag"] -pub type CmfR = crate::BitReader; +pub type CMF_R = crate::BitReader; #[doc = "Field `CMF` writer - CRC Mismatch Flag"] -pub type CmfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CMF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CEF` reader - Configuration Error Flag"] -pub type CefR = crate::BitReader; +pub type CEF_R = crate::BitReader; #[doc = "Field `CEF` writer - Configuration Error Flag"] -pub type CefW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CEF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LEF` reader - Length Error Flag"] -pub type LefR = crate::BitReader; +pub type LEF_R = crate::BitReader; #[doc = "Field `LEF` writer - Length Error Flag"] -pub type LefW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LEF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BEF` reader - Bus Error Flag"] -pub type BefR = crate::BitReader; +pub type BEF_R = crate::BitReader; #[doc = "Field `BEF` writer - Bus Error Flag"] -pub type BefW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BEF_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - CRC Mismatch Flag"] #[inline(always)] - pub fn cmf(&self) -> CmfR { - CmfR::new((self.bits & 1) != 0) + pub fn cmf(&self) -> CMF_R { + CMF_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Configuration Error Flag"] #[inline(always)] - pub fn cef(&self) -> CefR { - CefR::new(((self.bits >> 1) & 1) != 0) + pub fn cef(&self) -> CEF_R { + CEF_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Length Error Flag"] #[inline(always)] - pub fn lef(&self) -> LefR { - LefR::new(((self.bits >> 2) & 1) != 0) + pub fn lef(&self) -> LEF_R { + LEF_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Bus Error Flag"] #[inline(always)] - pub fn bef(&self) -> BefR { - BefR::new(((self.bits >> 3) & 1) != 0) + pub fn bef(&self) -> BEF_R { + BEF_R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - CRC Mismatch Flag"] #[inline(always)] #[must_use] - pub fn cmf(&mut self) -> CmfW { - CmfW::new(self, 0) + pub fn cmf(&mut self) -> CMF_W { + CMF_W::new(self, 0) } #[doc = "Bit 1 - Configuration Error Flag"] #[inline(always)] #[must_use] - pub fn cef(&mut self) -> CefW { - CefW::new(self, 1) + pub fn cef(&mut self) -> CEF_W { + CEF_W::new(self, 1) } #[doc = "Bit 2 - Length Error Flag"] #[inline(always)] #[must_use] - pub fn lef(&mut self) -> LefW { - LefW::new(self, 2) + pub fn lef(&mut self) -> LEF_W { + LEF_W::new(self, 2) } #[doc = "Bit 3 - Bus Error Flag"] #[inline(always)] #[must_use] - pub fn bef(&mut self) -> BefW { - BefW::new(self, 3) + pub fn bef(&mut self) -> BEF_W { + BEF_W::new(self, 3) } } #[doc = "CRC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StsSpec; -impl crate::RegisterSpec for StsSpec { +pub struct STS_SPEC; +impl crate::RegisterSpec for STS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sts::R`](R) reader structure"] -impl crate::Readable for StsSpec {} +impl crate::Readable for STS_SPEC {} #[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] -impl crate::Writable for StsSpec { +impl crate::Writable for STS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0"] -impl crate::Resettable for StsSpec { +impl crate::Resettable for STS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0.rs b/src/flash0.rs index 909f7da1..773782c6 100644 --- a/src/flash0.rs +++ b/src/flash0.rs @@ -2,92 +2,85 @@ #[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x1008], - id: Id, + id: ID, _reserved1: [u8; 0x04], - fsr: Fsr, - fcon: Fcon, - marp: Marp, + fsr: FSR, + fcon: FCON, + marp: MARP, _reserved4: [u8; 0x04], - procon0: Procon0, - procon1: Procon1, - procon2: Procon2, + procon0: PROCON0, + procon1: PROCON1, + procon2: PROCON2, } impl RegisterBlock { #[doc = "0x1008 - Flash Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x1010 - Flash Status Register"] #[inline(always)] - pub const fn fsr(&self) -> &Fsr { + pub const fn fsr(&self) -> &FSR { &self.fsr } #[doc = "0x1014 - Flash Configuration Register"] #[inline(always)] - pub const fn fcon(&self) -> &Fcon { + pub const fn fcon(&self) -> &FCON { &self.fcon } #[doc = "0x1018 - Margin Control Register PFLASH"] #[inline(always)] - pub const fn marp(&self) -> &Marp { + pub const fn marp(&self) -> &MARP { &self.marp } #[doc = "0x1020 - Flash Protection Configuration Register User 0"] #[inline(always)] - pub const fn procon0(&self) -> &Procon0 { + pub const fn procon0(&self) -> &PROCON0 { &self.procon0 } #[doc = "0x1024 - Flash Protection Configuration Register User 1"] #[inline(always)] - pub const fn procon1(&self) -> &Procon1 { + pub const fn procon1(&self) -> &PROCON1 { &self.procon1 } #[doc = "0x1028 - Flash Protection Configuration Register User 2"] #[inline(always)] - pub const fn procon2(&self) -> &Procon2 { + pub const fn procon2(&self) -> &PROCON2 { &self.procon2 } } #[doc = "ID (r) register accessor: Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Flash Module Identification Register"] pub mod id; #[doc = "FSR (r) register accessor: Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fsr`] module"] -#[doc(alias = "FSR")] -pub type Fsr = crate::Reg; +pub type FSR = crate::Reg; #[doc = "Flash Status Register"] pub mod fsr; #[doc = "FCON (rw) register accessor: Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fcon`] module"] -#[doc(alias = "FCON")] -pub type Fcon = crate::Reg; +pub type FCON = crate::Reg; #[doc = "Flash Configuration Register"] pub mod fcon; #[doc = "MARP (rw) register accessor: Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@marp`] module"] -#[doc(alias = "MARP")] -pub type Marp = crate::Reg; +pub type MARP = crate::Reg; #[doc = "Margin Control Register PFLASH"] pub mod marp; #[doc = "PROCON0 (r) register accessor: Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon0`] module"] -#[doc(alias = "PROCON0")] -pub type Procon0 = crate::Reg; +pub type PROCON0 = crate::Reg; #[doc = "Flash Protection Configuration Register User 0"] pub mod procon0; #[doc = "PROCON1 (r) register accessor: Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon1`] module"] -#[doc(alias = "PROCON1")] -pub type Procon1 = crate::Reg; +pub type PROCON1 = crate::Reg; #[doc = "Flash Protection Configuration Register User 1"] pub mod procon1; #[doc = "PROCON2 (r) register accessor: Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@procon2`] module"] -#[doc(alias = "PROCON2")] -pub type Procon2 = crate::Reg; +pub type PROCON2 = crate::Reg; #[doc = "Flash Protection Configuration Register User 2"] pub mod procon2; diff --git a/src/flash0/fcon.rs b/src/flash0/fcon.rs index d3c35e0f..1325dc4c 100644 --- a/src/flash0/fcon.rs +++ b/src/flash0/fcon.rs @@ -1,76 +1,76 @@ #[doc = "Register `FCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wait States for read access to PFLASH\n\nValue on reset: 6"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Wspflash { +pub enum WSPFLASH_A { #[doc = "0: PFLASH access in one clock cycle"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PFLASH access in one clock cycle"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: PFLASH access in two clock cycles"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: PFLASH access in three clock cycles"] - Value4 = 3, + VALUE4 = 3, #[doc = "15: PFLASH access in fifteen clock cycles."] - Value5 = 15, + VALUE5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Wspflash) -> Self { + fn from(variant: WSPFLASH_A) -> Self { variant as _ } } -impl crate::FieldSpec for Wspflash { +impl crate::FieldSpec for WSPFLASH_A { type Ux = u8; } -impl crate::IsEnum for Wspflash {} +impl crate::IsEnum for WSPFLASH_A {} #[doc = "Field `WSPFLASH` reader - Wait States for read access to PFLASH"] -pub type WspflashR = crate::FieldReader; -impl WspflashR { +pub type WSPFLASH_R = crate::FieldReader; +impl WSPFLASH_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Wspflash::Value1), - 1 => Some(Wspflash::Value2), - 2 => Some(Wspflash::Value3), - 3 => Some(Wspflash::Value4), - 15 => Some(Wspflash::Value5), + 0 => Some(WSPFLASH_A::VALUE1), + 1 => Some(WSPFLASH_A::VALUE2), + 2 => Some(WSPFLASH_A::VALUE3), + 3 => Some(WSPFLASH_A::VALUE4), + 15 => Some(WSPFLASH_A::VALUE5), _ => None, } } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wspflash::Value1 + *self == WSPFLASH_A::VALUE1 } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wspflash::Value2 + *self == WSPFLASH_A::VALUE2 } #[doc = "PFLASH access in two clock cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Wspflash::Value3 + *self == WSPFLASH_A::VALUE3 } #[doc = "PFLASH access in three clock cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Wspflash::Value4 + *self == WSPFLASH_A::VALUE4 } #[doc = "PFLASH access in fifteen clock cycles."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Wspflash::Value5 + *self == WSPFLASH_A::VALUE5 } } #[doc = "Field `WSPFLASH` writer - Wait States for read access to PFLASH"] -pub type WspflashW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wspflash>; -impl<'a, REG> WspflashW<'a, REG> +pub type WSPFLASH_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WSPFLASH_A>; +impl<'a, REG> WSPFLASH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,867 +78,867 @@ where #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wspflash::Value1) + self.variant(WSPFLASH_A::VALUE1) } #[doc = "PFLASH access in one clock cycle"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wspflash::Value2) + self.variant(WSPFLASH_A::VALUE2) } #[doc = "PFLASH access in two clock cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Wspflash::Value3) + self.variant(WSPFLASH_A::VALUE3) } #[doc = "PFLASH access in three clock cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Wspflash::Value4) + self.variant(WSPFLASH_A::VALUE4) } #[doc = "PFLASH access in fifteen clock cycles."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Wspflash::Value5) + self.variant(WSPFLASH_A::VALUE5) } } #[doc = "Wait State for Error Correction of PFLASH\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wsecpf { +pub enum WSECPF_A { #[doc = "0: No additional wait state for error correction"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wsecpf) -> Self { + fn from(variant: WSECPF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WSECPF` reader - Wait State for Error Correction of PFLASH"] -pub type WsecpfR = crate::BitReader; -impl WsecpfR { +pub type WSECPF_R = crate::BitReader; +impl WSECPF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wsecpf { + pub const fn variant(&self) -> WSECPF_A { match self.bits { - false => Wsecpf::Value1, - true => Wsecpf::Value2, + false => WSECPF_A::VALUE1, + true => WSECPF_A::VALUE2, } } #[doc = "No additional wait state for error correction"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wsecpf::Value1 + *self == WSECPF_A::VALUE1 } #[doc = "One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wsecpf::Value2 + *self == WSECPF_A::VALUE2 } } #[doc = "Field `WSECPF` writer - Wait State for Error Correction of PFLASH"] -pub type WsecpfW<'a, REG> = crate::BitWriter<'a, REG, Wsecpf>; -impl<'a, REG> WsecpfW<'a, REG> +pub type WSECPF_W<'a, REG> = crate::BitWriter<'a, REG, WSECPF_A>; +impl<'a, REG> WSECPF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No additional wait state for error correction"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wsecpf::Value1) + self.variant(WSECPF_A::VALUE1) } #[doc = "One additional wait state for error correction during read access to Program Flash. If enabled, this wait state is only used for the first transfer of a burst transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wsecpf::Value2) + self.variant(WSECPF_A::VALUE2) } } #[doc = "Dynamic Flash Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Idle { +pub enum IDLE_A { #[doc = "0: Normal/standard Flash read operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Idle) -> Self { + fn from(variant: IDLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IDLE` reader - Dynamic Flash Idle"] -pub type IdleR = crate::BitReader; -impl IdleR { +pub type IDLE_R = crate::BitReader; +impl IDLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Idle { + pub const fn variant(&self) -> IDLE_A { match self.bits { - false => Idle::Value1, - true => Idle::Value2, + false => IDLE_A::VALUE1, + true => IDLE_A::VALUE2, } } #[doc = "Normal/standard Flash read operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Idle::Value1 + *self == IDLE_A::VALUE1 } #[doc = "Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Idle::Value2 + *self == IDLE_A::VALUE2 } } #[doc = "Field `IDLE` writer - Dynamic Flash Idle"] -pub type IdleW<'a, REG> = crate::BitWriter<'a, REG, Idle>; -impl<'a, REG> IdleW<'a, REG> +pub type IDLE_W<'a, REG> = crate::BitWriter<'a, REG, IDLE_A>; +impl<'a, REG> IDLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal/standard Flash read operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Idle::Value1) + self.variant(IDLE_A::VALUE1) } #[doc = "Dynamic idle of Program Flash enabled for power saving; static prefetching disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Idle::Value2) + self.variant(IDLE_A::VALUE2) } } #[doc = "External Sleep Request Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Esldis { +pub enum ESLDIS_A { #[doc = "0: External sleep request signal input is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Externally requested Flash sleep is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Esldis) -> Self { + fn from(variant: ESLDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ESLDIS` reader - External Sleep Request Disable"] -pub type EsldisR = crate::BitReader; -impl EsldisR { +pub type ESLDIS_R = crate::BitReader; +impl ESLDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Esldis { + pub const fn variant(&self) -> ESLDIS_A { match self.bits { - false => Esldis::Value1, - true => Esldis::Value2, + false => ESLDIS_A::VALUE1, + true => ESLDIS_A::VALUE2, } } #[doc = "External sleep request signal input is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Esldis::Value1 + *self == ESLDIS_A::VALUE1 } #[doc = "Externally requested Flash sleep is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Esldis::Value2 + *self == ESLDIS_A::VALUE2 } } #[doc = "Field `ESLDIS` writer - External Sleep Request Disable"] -pub type EsldisW<'a, REG> = crate::BitWriter<'a, REG, Esldis>; -impl<'a, REG> EsldisW<'a, REG> +pub type ESLDIS_W<'a, REG> = crate::BitWriter<'a, REG, ESLDIS_A>; +impl<'a, REG> ESLDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External sleep request signal input is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Esldis::Value1) + self.variant(ESLDIS_A::VALUE1) } #[doc = "Externally requested Flash sleep is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Esldis::Value2) + self.variant(ESLDIS_A::VALUE2) } } #[doc = "Flash SLEEP\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sleep { +pub enum SLEEP_A { #[doc = "0: Normal state or wake-up"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash sleep mode is requested"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sleep) -> Self { + fn from(variant: SLEEP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLEEP` reader - Flash SLEEP"] -pub type SleepR = crate::BitReader; -impl SleepR { +pub type SLEEP_R = crate::BitReader; +impl SLEEP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sleep { + pub const fn variant(&self) -> SLEEP_A { match self.bits { - false => Sleep::Value1, - true => Sleep::Value2, + false => SLEEP_A::VALUE1, + true => SLEEP_A::VALUE2, } } #[doc = "Normal state or wake-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sleep::Value1 + *self == SLEEP_A::VALUE1 } #[doc = "Flash sleep mode is requested"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sleep::Value2 + *self == SLEEP_A::VALUE2 } } #[doc = "Field `SLEEP` writer - Flash SLEEP"] -pub type SleepW<'a, REG> = crate::BitWriter<'a, REG, Sleep>; -impl<'a, REG> SleepW<'a, REG> +pub type SLEEP_W<'a, REG> = crate::BitWriter<'a, REG, SLEEP_A>; +impl<'a, REG> SLEEP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal state or wake-up"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sleep::Value1) + self.variant(SLEEP_A::VALUE1) } #[doc = "Flash sleep mode is requested"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sleep::Value2) + self.variant(SLEEP_A::VALUE2) } } #[doc = "Read Protection Activated\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rpa { +pub enum RPA_A { #[doc = "0: The Flash-internal read protection is not activated. Bits DCF, DDF are not taken into account. Bits DCF, DDFx can be cleared"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The Flash-internal read protection is activated. Bits DCF, DDF are enabled and evaluated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rpa) -> Self { + fn from(variant: RPA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPA` reader - Read Protection Activated"] -pub type RpaR = crate::BitReader; -impl RpaR { +pub type RPA_R = crate::BitReader; +impl RPA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rpa { + pub const fn variant(&self) -> RPA_A { match self.bits { - false => Rpa::Value1, - true => Rpa::Value2, + false => RPA_A::VALUE1, + true => RPA_A::VALUE2, } } #[doc = "The Flash-internal read protection is not activated. Bits DCF, DDF are not taken into account. Bits DCF, DDFx can be cleared"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rpa::Value1 + *self == RPA_A::VALUE1 } #[doc = "The Flash-internal read protection is activated. Bits DCF, DDF are enabled and evaluated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rpa::Value2 + *self == RPA_A::VALUE2 } } #[doc = "Disable Code Fetch from Flash Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcf { +pub enum DCF_A { #[doc = "0: Code fetching from the Flash memory area is allowed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcf) -> Self { + fn from(variant: DCF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCF` reader - Disable Code Fetch from Flash Memory"] -pub type DcfR = crate::BitReader; -impl DcfR { +pub type DCF_R = crate::BitReader; +impl DCF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcf { + pub const fn variant(&self) -> DCF_A { match self.bits { - false => Dcf::Value1, - true => Dcf::Value2, + false => DCF_A::VALUE1, + true => DCF_A::VALUE2, } } #[doc = "Code fetching from the Flash memory area is allowed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcf::Value1 + *self == DCF_A::VALUE1 } #[doc = "Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcf::Value2 + *self == DCF_A::VALUE2 } } #[doc = "Field `DCF` writer - Disable Code Fetch from Flash Memory"] -pub type DcfW<'a, REG> = crate::BitWriter<'a, REG, Dcf>; -impl<'a, REG> DcfW<'a, REG> +pub type DCF_W<'a, REG> = crate::BitWriter<'a, REG, DCF_A>; +impl<'a, REG> DCF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Code fetching from the Flash memory area is allowed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcf::Value1) + self.variant(DCF_A::VALUE1) } #[doc = "Code fetching from the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcf::Value2) + self.variant(DCF_A::VALUE2) } } #[doc = "Disable Any Data Fetch from Flash\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ddf { +pub enum DDF_A { #[doc = "0: Data read access to the Flash memory area is allowed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ddf) -> Self { + fn from(variant: DDF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DDF` reader - Disable Any Data Fetch from Flash"] -pub type DdfR = crate::BitReader; -impl DdfR { +pub type DDF_R = crate::BitReader; +impl DDF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ddf { + pub const fn variant(&self) -> DDF_A { match self.bits { - false => Ddf::Value1, - true => Ddf::Value2, + false => DDF_A::VALUE1, + true => DDF_A::VALUE2, } } #[doc = "Data read access to the Flash memory area is allowed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ddf::Value1 + *self == DDF_A::VALUE1 } #[doc = "Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ddf::Value2 + *self == DDF_A::VALUE2 } } #[doc = "Field `DDF` writer - Disable Any Data Fetch from Flash"] -pub type DdfW<'a, REG> = crate::BitWriter<'a, REG, Ddf>; -impl<'a, REG> DdfW<'a, REG> +pub type DDF_W<'a, REG> = crate::BitWriter<'a, REG, DDF_A>; +impl<'a, REG> DDF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data read access to the Flash memory area is allowed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ddf::Value1) + self.variant(DDF_A::VALUE1) } #[doc = "Data read access to the Flash memory area is not allowed. This bit is not taken into account while RPA='0'."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ddf::Value2) + self.variant(DDF_A::VALUE2) } } #[doc = "Verify and Operation Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Voperm { +pub enum VOPERM_A { #[doc = "0: Interrupt not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Voperm) -> Self { + fn from(variant: VOPERM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VOPERM` reader - Verify and Operation Error Interrupt Mask"] -pub type VopermR = crate::BitReader; -impl VopermR { +pub type VOPERM_R = crate::BitReader; +impl VOPERM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Voperm { + pub const fn variant(&self) -> VOPERM_A { match self.bits { - false => Voperm::Value1, - true => Voperm::Value2, + false => VOPERM_A::VALUE1, + true => VOPERM_A::VALUE2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Voperm::Value1 + *self == VOPERM_A::VALUE1 } #[doc = "Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Voperm::Value2 + *self == VOPERM_A::VALUE2 } } #[doc = "Field `VOPERM` writer - Verify and Operation Error Interrupt Mask"] -pub type VopermW<'a, REG> = crate::BitWriter<'a, REG, Voperm>; -impl<'a, REG> VopermW<'a, REG> +pub type VOPERM_W<'a, REG> = crate::BitWriter<'a, REG, VOPERM_A>; +impl<'a, REG> VOPERM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Voperm::Value1) + self.variant(VOPERM_A::VALUE1) } #[doc = "Flash interrupt because of Verify Error or Operation Error in Flash array (FSI) is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Voperm::Value2) + self.variant(VOPERM_A::VALUE2) } } #[doc = "Command Sequence Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sqerm { +pub enum SQERM_A { #[doc = "0: Interrupt not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash interrupt because of Sequence Error is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sqerm) -> Self { + fn from(variant: SQERM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SQERM` reader - Command Sequence Error Interrupt Mask"] -pub type SqermR = crate::BitReader; -impl SqermR { +pub type SQERM_R = crate::BitReader; +impl SQERM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sqerm { + pub const fn variant(&self) -> SQERM_A { match self.bits { - false => Sqerm::Value1, - true => Sqerm::Value2, + false => SQERM_A::VALUE1, + true => SQERM_A::VALUE2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sqerm::Value1 + *self == SQERM_A::VALUE1 } #[doc = "Flash interrupt because of Sequence Error is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sqerm::Value2 + *self == SQERM_A::VALUE2 } } #[doc = "Field `SQERM` writer - Command Sequence Error Interrupt Mask"] -pub type SqermW<'a, REG> = crate::BitWriter<'a, REG, Sqerm>; -impl<'a, REG> SqermW<'a, REG> +pub type SQERM_W<'a, REG> = crate::BitWriter<'a, REG, SQERM_A>; +impl<'a, REG> SQERM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sqerm::Value1) + self.variant(SQERM_A::VALUE1) } #[doc = "Flash interrupt because of Sequence Error is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sqerm::Value2) + self.variant(SQERM_A::VALUE2) } } #[doc = "Protection Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Proerm { +pub enum PROERM_A { #[doc = "0: Interrupt not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash interrupt because of Protection Error is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Proerm) -> Self { + fn from(variant: PROERM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PROERM` reader - Protection Error Interrupt Mask"] -pub type ProermR = crate::BitReader; -impl ProermR { +pub type PROERM_R = crate::BitReader; +impl PROERM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Proerm { + pub const fn variant(&self) -> PROERM_A { match self.bits { - false => Proerm::Value1, - true => Proerm::Value2, + false => PROERM_A::VALUE1, + true => PROERM_A::VALUE2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Proerm::Value1 + *self == PROERM_A::VALUE1 } #[doc = "Flash interrupt because of Protection Error is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Proerm::Value2 + *self == PROERM_A::VALUE2 } } #[doc = "Field `PROERM` writer - Protection Error Interrupt Mask"] -pub type ProermW<'a, REG> = crate::BitWriter<'a, REG, Proerm>; -impl<'a, REG> ProermW<'a, REG> +pub type PROERM_W<'a, REG> = crate::BitWriter<'a, REG, PROERM_A>; +impl<'a, REG> PROERM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Proerm::Value1) + self.variant(PROERM_A::VALUE1) } #[doc = "Flash interrupt because of Protection Error is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Proerm::Value2) + self.variant(PROERM_A::VALUE2) } } #[doc = "PFLASH Single-Bit Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfsberm { +pub enum PFSBERM_A { #[doc = "0: No Single-Bit Error interrupt enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single-Bit Error interrupt enabled for PFLASH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfsberm) -> Self { + fn from(variant: PFSBERM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFSBERM` reader - PFLASH Single-Bit Error Interrupt Mask"] -pub type PfsbermR = crate::BitReader; -impl PfsbermR { +pub type PFSBERM_R = crate::BitReader; +impl PFSBERM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfsberm { + pub const fn variant(&self) -> PFSBERM_A { match self.bits { - false => Pfsberm::Value1, - true => Pfsberm::Value2, + false => PFSBERM_A::VALUE1, + true => PFSBERM_A::VALUE2, } } #[doc = "No Single-Bit Error interrupt enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfsberm::Value1 + *self == PFSBERM_A::VALUE1 } #[doc = "Single-Bit Error interrupt enabled for PFLASH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfsberm::Value2 + *self == PFSBERM_A::VALUE2 } } #[doc = "Field `PFSBERM` writer - PFLASH Single-Bit Error Interrupt Mask"] -pub type PfsbermW<'a, REG> = crate::BitWriter<'a, REG, Pfsberm>; -impl<'a, REG> PfsbermW<'a, REG> +pub type PFSBERM_W<'a, REG> = crate::BitWriter<'a, REG, PFSBERM_A>; +impl<'a, REG> PFSBERM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No Single-Bit Error interrupt enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pfsberm::Value1) + self.variant(PFSBERM_A::VALUE1) } #[doc = "Single-Bit Error interrupt enabled for PFLASH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pfsberm::Value2) + self.variant(PFSBERM_A::VALUE2) } } #[doc = "PFLASH Double-Bit Error Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfdberm { +pub enum PFDBERM_A { #[doc = "0: Double-Bit Error interrupt for PFLASH not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfdberm) -> Self { + fn from(variant: PFDBERM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFDBERM` reader - PFLASH Double-Bit Error Interrupt Mask"] -pub type PfdbermR = crate::BitReader; -impl PfdbermR { +pub type PFDBERM_R = crate::BitReader; +impl PFDBERM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfdberm { + pub const fn variant(&self) -> PFDBERM_A { match self.bits { - false => Pfdberm::Value1, - true => Pfdberm::Value2, + false => PFDBERM_A::VALUE1, + true => PFDBERM_A::VALUE2, } } #[doc = "Double-Bit Error interrupt for PFLASH not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfdberm::Value1 + *self == PFDBERM_A::VALUE1 } #[doc = "Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfdberm::Value2 + *self == PFDBERM_A::VALUE2 } } #[doc = "Field `PFDBERM` writer - PFLASH Double-Bit Error Interrupt Mask"] -pub type PfdbermW<'a, REG> = crate::BitWriter<'a, REG, Pfdberm>; -impl<'a, REG> PfdbermW<'a, REG> +pub type PFDBERM_W<'a, REG> = crate::BitWriter<'a, REG, PFDBERM_A>; +impl<'a, REG> PFDBERM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Double-Bit Error interrupt for PFLASH not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pfdberm::Value1) + self.variant(PFDBERM_A::VALUE1) } #[doc = "Double-Bit Error interrupt for PFLASH enabled. Especially intended for margin check"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pfdberm::Value2) + self.variant(PFDBERM_A::VALUE2) } } #[doc = "End of Busy Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eobm { +pub enum EOBM_A { #[doc = "0: Interrupt not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: EOB interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eobm) -> Self { + fn from(variant: EOBM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EOBM` reader - End of Busy Interrupt Mask"] -pub type EobmR = crate::BitReader; -impl EobmR { +pub type EOBM_R = crate::BitReader; +impl EOBM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eobm { + pub const fn variant(&self) -> EOBM_A { match self.bits { - false => Eobm::Value1, - true => Eobm::Value2, + false => EOBM_A::VALUE1, + true => EOBM_A::VALUE2, } } #[doc = "Interrupt not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eobm::Value1 + *self == EOBM_A::VALUE1 } #[doc = "EOB interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eobm::Value2 + *self == EOBM_A::VALUE2 } } #[doc = "Field `EOBM` writer - End of Busy Interrupt Mask"] -pub type EobmW<'a, REG> = crate::BitWriter<'a, REG, Eobm>; -impl<'a, REG> EobmW<'a, REG> +pub type EOBM_W<'a, REG> = crate::BitWriter<'a, REG, EOBM_A>; +impl<'a, REG> EOBM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Interrupt not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eobm::Value1) + self.variant(EOBM_A::VALUE1) } #[doc = "EOB interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eobm::Value2) + self.variant(EOBM_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - Wait States for read access to PFLASH"] #[inline(always)] - pub fn wspflash(&self) -> WspflashR { - WspflashR::new((self.bits & 0x0f) as u8) + pub fn wspflash(&self) -> WSPFLASH_R { + WSPFLASH_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"] #[inline(always)] - pub fn wsecpf(&self) -> WsecpfR { - WsecpfR::new(((self.bits >> 4) & 1) != 0) + pub fn wsecpf(&self) -> WSECPF_R { + WSECPF_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 13 - Dynamic Flash Idle"] #[inline(always)] - pub fn idle(&self) -> IdleR { - IdleR::new(((self.bits >> 13) & 1) != 0) + pub fn idle(&self) -> IDLE_R { + IDLE_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - External Sleep Request Disable"] #[inline(always)] - pub fn esldis(&self) -> EsldisR { - EsldisR::new(((self.bits >> 14) & 1) != 0) + pub fn esldis(&self) -> ESLDIS_R { + ESLDIS_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Flash SLEEP"] #[inline(always)] - pub fn sleep(&self) -> SleepR { - SleepR::new(((self.bits >> 15) & 1) != 0) + pub fn sleep(&self) -> SLEEP_R { + SLEEP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Read Protection Activated"] #[inline(always)] - pub fn rpa(&self) -> RpaR { - RpaR::new(((self.bits >> 16) & 1) != 0) + pub fn rpa(&self) -> RPA_R { + RPA_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"] #[inline(always)] - pub fn dcf(&self) -> DcfR { - DcfR::new(((self.bits >> 17) & 1) != 0) + pub fn dcf(&self) -> DCF_R { + DCF_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Any Data Fetch from Flash"] #[inline(always)] - pub fn ddf(&self) -> DdfR { - DdfR::new(((self.bits >> 18) & 1) != 0) + pub fn ddf(&self) -> DDF_R { + DDF_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"] #[inline(always)] - pub fn voperm(&self) -> VopermR { - VopermR::new(((self.bits >> 24) & 1) != 0) + pub fn voperm(&self) -> VOPERM_R { + VOPERM_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"] #[inline(always)] - pub fn sqerm(&self) -> SqermR { - SqermR::new(((self.bits >> 25) & 1) != 0) + pub fn sqerm(&self) -> SQERM_R { + SQERM_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Protection Error Interrupt Mask"] #[inline(always)] - pub fn proerm(&self) -> ProermR { - ProermR::new(((self.bits >> 26) & 1) != 0) + pub fn proerm(&self) -> PROERM_R { + PROERM_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"] #[inline(always)] - pub fn pfsberm(&self) -> PfsbermR { - PfsbermR::new(((self.bits >> 27) & 1) != 0) + pub fn pfsberm(&self) -> PFSBERM_R { + PFSBERM_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"] #[inline(always)] - pub fn pfdberm(&self) -> PfdbermR { - PfdbermR::new(((self.bits >> 29) & 1) != 0) + pub fn pfdberm(&self) -> PFDBERM_R { + PFDBERM_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 31 - End of Busy Interrupt Mask"] #[inline(always)] - pub fn eobm(&self) -> EobmR { - EobmR::new(((self.bits >> 31) & 1) != 0) + pub fn eobm(&self) -> EOBM_R { + EOBM_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Wait States for read access to PFLASH"] #[inline(always)] #[must_use] - pub fn wspflash(&mut self) -> WspflashW { - WspflashW::new(self, 0) + pub fn wspflash(&mut self) -> WSPFLASH_W { + WSPFLASH_W::new(self, 0) } #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"] #[inline(always)] #[must_use] - pub fn wsecpf(&mut self) -> WsecpfW { - WsecpfW::new(self, 4) + pub fn wsecpf(&mut self) -> WSECPF_W { + WSECPF_W::new(self, 4) } #[doc = "Bit 13 - Dynamic Flash Idle"] #[inline(always)] #[must_use] - pub fn idle(&mut self) -> IdleW { - IdleW::new(self, 13) + pub fn idle(&mut self) -> IDLE_W { + IDLE_W::new(self, 13) } #[doc = "Bit 14 - External Sleep Request Disable"] #[inline(always)] #[must_use] - pub fn esldis(&mut self) -> EsldisW { - EsldisW::new(self, 14) + pub fn esldis(&mut self) -> ESLDIS_W { + ESLDIS_W::new(self, 14) } #[doc = "Bit 15 - Flash SLEEP"] #[inline(always)] #[must_use] - pub fn sleep(&mut self) -> SleepW { - SleepW::new(self, 15) + pub fn sleep(&mut self) -> SLEEP_W { + SLEEP_W::new(self, 15) } #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"] #[inline(always)] #[must_use] - pub fn dcf(&mut self) -> DcfW { - DcfW::new(self, 17) + pub fn dcf(&mut self) -> DCF_W { + DCF_W::new(self, 17) } #[doc = "Bit 18 - Disable Any Data Fetch from Flash"] #[inline(always)] #[must_use] - pub fn ddf(&mut self) -> DdfW { - DdfW::new(self, 18) + pub fn ddf(&mut self) -> DDF_W { + DDF_W::new(self, 18) } #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn voperm(&mut self) -> VopermW { - VopermW::new(self, 24) + pub fn voperm(&mut self) -> VOPERM_W { + VOPERM_W::new(self, 24) } #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn sqerm(&mut self) -> SqermW { - SqermW::new(self, 25) + pub fn sqerm(&mut self) -> SQERM_W { + SQERM_W::new(self, 25) } #[doc = "Bit 26 - Protection Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn proerm(&mut self) -> ProermW { - ProermW::new(self, 26) + pub fn proerm(&mut self) -> PROERM_W { + PROERM_W::new(self, 26) } #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pfsberm(&mut self) -> PfsbermW { - PfsbermW::new(self, 27) + pub fn pfsberm(&mut self) -> PFSBERM_W { + PFSBERM_W::new(self, 27) } #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pfdberm(&mut self) -> PfdbermW { - PfdbermW::new(self, 29) + pub fn pfdberm(&mut self) -> PFDBERM_W { + PFDBERM_W::new(self, 29) } #[doc = "Bit 31 - End of Busy Interrupt Mask"] #[inline(always)] #[must_use] - pub fn eobm(&mut self) -> EobmW { - EobmW::new(self, 31) + pub fn eobm(&mut self) -> EOBM_W { + EOBM_W::new(self, 31) } } #[doc = "Flash Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FconSpec; -impl crate::RegisterSpec for FconSpec { +pub struct FCON_SPEC; +impl crate::RegisterSpec for FCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fcon::R`](R) reader structure"] -impl crate::Readable for FconSpec {} +impl crate::Readable for FCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`fcon::W`](W) writer structure"] -impl crate::Writable for FconSpec { +impl crate::Writable for FCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FCON to value 0x06"] -impl crate::Resettable for FconSpec { +impl crate::Resettable for FCON_SPEC { const RESET_VALUE: u32 = 0x06; } diff --git a/src/flash0/fsr.rs b/src/flash0/fsr.rs index 5e86d241..db79d429 100644 --- a/src/flash0/fsr.rs +++ b/src/flash0/fsr.rs @@ -1,801 +1,801 @@ #[doc = "Register `FSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Program Flash Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pbusy { +pub enum PBUSY_A { #[doc = "0: PFLASH ready, not busy; PFLASH in read mode."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PFLASH busy; PFLASH not in read mode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pbusy) -> Self { + fn from(variant: PBUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PBUSY` reader - Program Flash Busy"] -pub type PbusyR = crate::BitReader; -impl PbusyR { +pub type PBUSY_R = crate::BitReader; +impl PBUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pbusy { + pub const fn variant(&self) -> PBUSY_A { match self.bits { - false => Pbusy::Value1, - true => Pbusy::Value2, + false => PBUSY_A::VALUE1, + true => PBUSY_A::VALUE2, } } #[doc = "PFLASH ready, not busy; PFLASH in read mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pbusy::Value1 + *self == PBUSY_A::VALUE1 } #[doc = "PFLASH busy; PFLASH not in read mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pbusy::Value2 + *self == PBUSY_A::VALUE2 } } #[doc = "Field `FABUSY` reader - Flash Array Busy"] -pub type FabusyR = crate::BitReader; +pub type FABUSY_R = crate::BitReader; #[doc = "Programming State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prog { +pub enum PROG_A { #[doc = "0: There is no program operation requested or in progress or just finished."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Programming operation (write page) requested (from FIM) or in action or finished."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prog) -> Self { + fn from(variant: PROG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PROG` reader - Programming State"] -pub type ProgR = crate::BitReader; -impl ProgR { +pub type PROG_R = crate::BitReader; +impl PROG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prog { + pub const fn variant(&self) -> PROG_A { match self.bits { - false => Prog::Value1, - true => Prog::Value2, + false => PROG_A::VALUE1, + true => PROG_A::VALUE2, } } #[doc = "There is no program operation requested or in progress or just finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prog::Value1 + *self == PROG_A::VALUE1 } #[doc = "Programming operation (write page) requested (from FIM) or in action or finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prog::Value2 + *self == PROG_A::VALUE2 } } #[doc = "Erase State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Erase { +pub enum ERASE_A { #[doc = "0: There is no erase operation requested or in progress or just finished"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Erase operation requested (from FIM) or in action or finished."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Erase) -> Self { + fn from(variant: ERASE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERASE` reader - Erase State"] -pub type EraseR = crate::BitReader; -impl EraseR { +pub type ERASE_R = crate::BitReader; +impl ERASE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Erase { + pub const fn variant(&self) -> ERASE_A { match self.bits { - false => Erase::Value1, - true => Erase::Value2, + false => ERASE_A::VALUE1, + true => ERASE_A::VALUE2, } } #[doc = "There is no erase operation requested or in progress or just finished"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Erase::Value1 + *self == ERASE_A::VALUE1 } #[doc = "Erase operation requested (from FIM) or in action or finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Erase::Value2 + *self == ERASE_A::VALUE2 } } #[doc = "Program Flash in Page Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfpage { +pub enum PFPAGE_A { #[doc = "0: Program Flash not in page mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Program Flash in page mode; assembly buffer of PFLASH (256 byte) is in use (being filled up)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfpage) -> Self { + fn from(variant: PFPAGE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFPAGE` reader - Program Flash in Page Mode"] -pub type PfpageR = crate::BitReader; -impl PfpageR { +pub type PFPAGE_R = crate::BitReader; +impl PFPAGE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfpage { + pub const fn variant(&self) -> PFPAGE_A { match self.bits { - false => Pfpage::Value1, - true => Pfpage::Value2, + false => PFPAGE_A::VALUE1, + true => PFPAGE_A::VALUE2, } } #[doc = "Program Flash not in page mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfpage::Value1 + *self == PFPAGE_A::VALUE1 } #[doc = "Program Flash in page mode; assembly buffer of PFLASH (256 byte) is in use (being filled up)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfpage::Value2 + *self == PFPAGE_A::VALUE2 } } #[doc = "Program Flash Operation Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfoper { +pub enum PFOPER_A { #[doc = "0: No operation error reported by Program Flash"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash array operation aborted, because of a Flash array failure, e.g. an ECC error in microcode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfoper) -> Self { + fn from(variant: PFOPER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFOPER` reader - Program Flash Operation Error"] -pub type PfoperR = crate::BitReader; -impl PfoperR { +pub type PFOPER_R = crate::BitReader; +impl PFOPER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfoper { + pub const fn variant(&self) -> PFOPER_A { match self.bits { - false => Pfoper::Value1, - true => Pfoper::Value2, + false => PFOPER_A::VALUE1, + true => PFOPER_A::VALUE2, } } #[doc = "No operation error reported by Program Flash"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfoper::Value1 + *self == PFOPER_A::VALUE1 } #[doc = "Flash array operation aborted, because of a Flash array failure, e.g. an ECC error in microcode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfoper::Value2 + *self == PFOPER_A::VALUE2 } } #[doc = "Command Sequence Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sqer { +pub enum SQER_A { #[doc = "0: No sequence error"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Command state machine operation unsuccessful because of improper address or command sequence."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sqer) -> Self { + fn from(variant: SQER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SQER` reader - Command Sequence Error"] -pub type SqerR = crate::BitReader; -impl SqerR { +pub type SQER_R = crate::BitReader; +impl SQER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sqer { + pub const fn variant(&self) -> SQER_A { match self.bits { - false => Sqer::Value1, - true => Sqer::Value2, + false => SQER_A::VALUE1, + true => SQER_A::VALUE2, } } #[doc = "No sequence error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sqer::Value1 + *self == SQER_A::VALUE1 } #[doc = "Command state machine operation unsuccessful because of improper address or command sequence."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sqer::Value2 + *self == SQER_A::VALUE2 } } #[doc = "Protection Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Proer { +pub enum PROER_A { #[doc = "0: No protection error"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Protection error."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Proer) -> Self { + fn from(variant: PROER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PROER` reader - Protection Error"] -pub type ProerR = crate::BitReader; -impl ProerR { +pub type PROER_R = crate::BitReader; +impl PROER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Proer { + pub const fn variant(&self) -> PROER_A { match self.bits { - false => Proer::Value1, - true => Proer::Value2, + false => PROER_A::VALUE1, + true => PROER_A::VALUE2, } } #[doc = "No protection error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Proer::Value1 + *self == PROER_A::VALUE1 } #[doc = "Protection error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Proer::Value2 + *self == PROER_A::VALUE2 } } #[doc = "PFLASH Single-Bit Error and Correction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfsber { +pub enum PFSBER_A { #[doc = "0: No Single-Bit Error detected during read access to PFLASH"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Single-Bit Error detected and corrected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfsber) -> Self { + fn from(variant: PFSBER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFSBER` reader - PFLASH Single-Bit Error and Correction"] -pub type PfsberR = crate::BitReader; -impl PfsberR { +pub type PFSBER_R = crate::BitReader; +impl PFSBER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfsber { + pub const fn variant(&self) -> PFSBER_A { match self.bits { - false => Pfsber::Value1, - true => Pfsber::Value2, + false => PFSBER_A::VALUE1, + true => PFSBER_A::VALUE2, } } #[doc = "No Single-Bit Error detected during read access to PFLASH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfsber::Value1 + *self == PFSBER_A::VALUE1 } #[doc = "Single-Bit Error detected and corrected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfsber::Value2 + *self == PFSBER_A::VALUE2 } } #[doc = "PFLASH Double-Bit Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pfdber { +pub enum PFDBER_A { #[doc = "0: No Double-Bit Error detected during read access to PFLASH"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Double-Bit Error detected in PFLASH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pfdber) -> Self { + fn from(variant: PFDBER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PFDBER` reader - PFLASH Double-Bit Error"] -pub type PfdberR = crate::BitReader; -impl PfdberR { +pub type PFDBER_R = crate::BitReader; +impl PFDBER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pfdber { + pub const fn variant(&self) -> PFDBER_A { match self.bits { - false => Pfdber::Value1, - true => Pfdber::Value2, + false => PFDBER_A::VALUE1, + true => PFDBER_A::VALUE2, } } #[doc = "No Double-Bit Error detected during read access to PFLASH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pfdber::Value1 + *self == PFDBER_A::VALUE1 } #[doc = "Double-Bit Error detected in PFLASH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pfdber::Value2 + *self == PFDBER_A::VALUE2 } } #[doc = "Protection Installed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Proin { +pub enum PROIN_A { #[doc = "0: No protection is installed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read or/and write protection for one or more users is configured and correctly confirmed in the User Configuration Block(s)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Proin) -> Self { + fn from(variant: PROIN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PROIN` reader - Protection Installed"] -pub type ProinR = crate::BitReader; -impl ProinR { +pub type PROIN_R = crate::BitReader; +impl PROIN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Proin { + pub const fn variant(&self) -> PROIN_A { match self.bits { - false => Proin::Value1, - true => Proin::Value2, + false => PROIN_A::VALUE1, + true => PROIN_A::VALUE2, } } #[doc = "No protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Proin::Value1 + *self == PROIN_A::VALUE1 } #[doc = "Read or/and write protection for one or more users is configured and correctly confirmed in the User Configuration Block(s)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Proin::Value2 + *self == PROIN_A::VALUE2 } } #[doc = "Read Protection Installed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rproin { +pub enum RPROIN_A { #[doc = "0: No read protection installed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read protection and global write protection is configured and correctly confirmed in the User Configuration Block 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rproin) -> Self { + fn from(variant: RPROIN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPROIN` reader - Read Protection Installed"] -pub type RproinR = crate::BitReader; -impl RproinR { +pub type RPROIN_R = crate::BitReader; +impl RPROIN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rproin { + pub const fn variant(&self) -> RPROIN_A { match self.bits { - false => Rproin::Value1, - true => Rproin::Value2, + false => RPROIN_A::VALUE1, + true => RPROIN_A::VALUE2, } } #[doc = "No read protection installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rproin::Value1 + *self == RPROIN_A::VALUE1 } #[doc = "Read protection and global write protection is configured and correctly confirmed in the User Configuration Block 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rproin::Value2 + *self == RPROIN_A::VALUE2 } } #[doc = "Read Protection Disable State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rprodis { +pub enum RPRODIS_A { #[doc = "0: Read protection (if installed) is not disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read and global write protection is temporarily disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rprodis) -> Self { + fn from(variant: RPRODIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPRODIS` reader - Read Protection Disable State"] -pub type RprodisR = crate::BitReader; -impl RprodisR { +pub type RPRODIS_R = crate::BitReader; +impl RPRODIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rprodis { + pub const fn variant(&self) -> RPRODIS_A { match self.bits { - false => Rprodis::Value1, - true => Rprodis::Value2, + false => RPRODIS_A::VALUE1, + true => RPRODIS_A::VALUE2, } } #[doc = "Read protection (if installed) is not disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rprodis::Value1 + *self == RPRODIS_A::VALUE1 } #[doc = "Read and global write protection is temporarily disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rprodis::Value2 + *self == RPRODIS_A::VALUE2 } } #[doc = "Sector Write Protection Installed for User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wproin0 { +pub enum WPROIN0_A { #[doc = "0: No write protection installed for user 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Sector write protection for user 0 is configured and correctly confirmed in the User Configuration Block 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wproin0) -> Self { + fn from(variant: WPROIN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WPROIN0` reader - Sector Write Protection Installed for User 0"] -pub type Wproin0R = crate::BitReader; -impl Wproin0R { +pub type WPROIN0_R = crate::BitReader; +impl WPROIN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wproin0 { + pub const fn variant(&self) -> WPROIN0_A { match self.bits { - false => Wproin0::Value1, - true => Wproin0::Value2, + false => WPROIN0_A::VALUE1, + true => WPROIN0_A::VALUE2, } } #[doc = "No write protection installed for user 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wproin0::Value1 + *self == WPROIN0_A::VALUE1 } #[doc = "Sector write protection for user 0 is configured and correctly confirmed in the User Configuration Block 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wproin0::Value2 + *self == WPROIN0_A::VALUE2 } } #[doc = "Sector Write Protection Installed for User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wproin1 { +pub enum WPROIN1_A { #[doc = "0: No write protection installed for user 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Sector write protection for user 1 is configured and correctly confirmed in the User Configuration Block 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wproin1) -> Self { + fn from(variant: WPROIN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WPROIN1` reader - Sector Write Protection Installed for User 1"] -pub type Wproin1R = crate::BitReader; -impl Wproin1R { +pub type WPROIN1_R = crate::BitReader; +impl WPROIN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wproin1 { + pub const fn variant(&self) -> WPROIN1_A { match self.bits { - false => Wproin1::Value1, - true => Wproin1::Value2, + false => WPROIN1_A::VALUE1, + true => WPROIN1_A::VALUE2, } } #[doc = "No write protection installed for user 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wproin1::Value1 + *self == WPROIN1_A::VALUE1 } #[doc = "Sector write protection for user 1 is configured and correctly confirmed in the User Configuration Block 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wproin1::Value2 + *self == WPROIN1_A::VALUE2 } } #[doc = "Sector OTP Protection Installed for User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wproin2 { +pub enum WPROIN2_A { #[doc = "0: No OTP write protection installed for user 2"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Sector OTP write protection with ROM functionality is configured and correctly confirmed in the UCB2. The protection is locked for ever."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wproin2) -> Self { + fn from(variant: WPROIN2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WPROIN2` reader - Sector OTP Protection Installed for User 2"] -pub type Wproin2R = crate::BitReader; -impl Wproin2R { +pub type WPROIN2_R = crate::BitReader; +impl WPROIN2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wproin2 { + pub const fn variant(&self) -> WPROIN2_A { match self.bits { - false => Wproin2::Value1, - true => Wproin2::Value2, + false => WPROIN2_A::VALUE1, + true => WPROIN2_A::VALUE2, } } #[doc = "No OTP write protection installed for user 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wproin2::Value1 + *self == WPROIN2_A::VALUE1 } #[doc = "Sector OTP write protection with ROM functionality is configured and correctly confirmed in the UCB2. The protection is locked for ever."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wproin2::Value2 + *self == WPROIN2_A::VALUE2 } } #[doc = "Sector Write Protection Disabled for User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wprodis0 { +pub enum WPRODIS0_A { #[doc = "0: All protected sectors of user 0 are locked if write protection is installed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: All write-protected sectors of user 0 are temporarily unlocked, if not coincidently locked by user 2 or via read protection."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wprodis0) -> Self { + fn from(variant: WPRODIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WPRODIS0` reader - Sector Write Protection Disabled for User 0"] -pub type Wprodis0R = crate::BitReader; -impl Wprodis0R { +pub type WPRODIS0_R = crate::BitReader; +impl WPRODIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wprodis0 { + pub const fn variant(&self) -> WPRODIS0_A { match self.bits { - false => Wprodis0::Value1, - true => Wprodis0::Value2, + false => WPRODIS0_A::VALUE1, + true => WPRODIS0_A::VALUE2, } } #[doc = "All protected sectors of user 0 are locked if write protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wprodis0::Value1 + *self == WPRODIS0_A::VALUE1 } #[doc = "All write-protected sectors of user 0 are temporarily unlocked, if not coincidently locked by user 2 or via read protection."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wprodis0::Value2 + *self == WPRODIS0_A::VALUE2 } } #[doc = "Sector Write Protection Disabled for User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wprodis1 { +pub enum WPRODIS1_A { #[doc = "0: All protected sectors of user 1 are locked if write protection is installed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: All write-protected sectors of user 1 are temporarily unlocked, if not coincidently locked by user 0 or user 2 or via read protection."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wprodis1) -> Self { + fn from(variant: WPRODIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WPRODIS1` reader - Sector Write Protection Disabled for User 1"] -pub type Wprodis1R = crate::BitReader; -impl Wprodis1R { +pub type WPRODIS1_R = crate::BitReader; +impl WPRODIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wprodis1 { + pub const fn variant(&self) -> WPRODIS1_A { match self.bits { - false => Wprodis1::Value1, - true => Wprodis1::Value2, + false => WPRODIS1_A::VALUE1, + true => WPRODIS1_A::VALUE2, } } #[doc = "All protected sectors of user 1 are locked if write protection is installed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wprodis1::Value1 + *self == WPRODIS1_A::VALUE1 } #[doc = "All write-protected sectors of user 1 are temporarily unlocked, if not coincidently locked by user 0 or user 2 or via read protection."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wprodis1::Value2 + *self == WPRODIS1_A::VALUE2 } } #[doc = "Flash Sleep Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Slm { +pub enum SLM_A { #[doc = "0: Flash not in sleep mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash is in sleep or shut down mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Slm) -> Self { + fn from(variant: SLM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLM` reader - Flash Sleep Mode"] -pub type SlmR = crate::BitReader; -impl SlmR { +pub type SLM_R = crate::BitReader; +impl SLM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Slm { + pub const fn variant(&self) -> SLM_A { match self.bits { - false => Slm::Value1, - true => Slm::Value2, + false => SLM_A::VALUE1, + true => SLM_A::VALUE2, } } #[doc = "Flash not in sleep mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Slm::Value1 + *self == SLM_A::VALUE1 } #[doc = "Flash is in sleep or shut down mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Slm::Value2 + *self == SLM_A::VALUE2 } } #[doc = "Verify Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ver { +pub enum VER_A { #[doc = "0: The page is correctly programmed or the sector correctly erased. All programmed or erased bits have full expected quality."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A program verify error or an erase verify error has been detected. Full quality (retention time) of all programmed (\"1\") or erased (\"0\") bits cannot be guaranteed."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ver) -> Self { + fn from(variant: VER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VER` reader - Verify Error"] -pub type VerR = crate::BitReader; -impl VerR { +pub type VER_R = crate::BitReader; +impl VER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ver { + pub const fn variant(&self) -> VER_A { match self.bits { - false => Ver::Value1, - true => Ver::Value2, + false => VER_A::VALUE1, + true => VER_A::VALUE2, } } #[doc = "The page is correctly programmed or the sector correctly erased. All programmed or erased bits have full expected quality."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ver::Value1 + *self == VER_A::VALUE1 } #[doc = "A program verify error or an erase verify error has been detected. Full quality (retention time) of all programmed (\"1\") or erased (\"0\") bits cannot be guaranteed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ver::Value2 + *self == VER_A::VALUE2 } } impl R { #[doc = "Bit 0 - Program Flash Busy"] #[inline(always)] - pub fn pbusy(&self) -> PbusyR { - PbusyR::new((self.bits & 1) != 0) + pub fn pbusy(&self) -> PBUSY_R { + PBUSY_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Flash Array Busy"] #[inline(always)] - pub fn fabusy(&self) -> FabusyR { - FabusyR::new(((self.bits >> 1) & 1) != 0) + pub fn fabusy(&self) -> FABUSY_R { + FABUSY_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Programming State"] #[inline(always)] - pub fn prog(&self) -> ProgR { - ProgR::new(((self.bits >> 4) & 1) != 0) + pub fn prog(&self) -> PROG_R { + PROG_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Erase State"] #[inline(always)] - pub fn erase(&self) -> EraseR { - EraseR::new(((self.bits >> 5) & 1) != 0) + pub fn erase(&self) -> ERASE_R { + ERASE_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Program Flash in Page Mode"] #[inline(always)] - pub fn pfpage(&self) -> PfpageR { - PfpageR::new(((self.bits >> 6) & 1) != 0) + pub fn pfpage(&self) -> PFPAGE_R { + PFPAGE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Program Flash Operation Error"] #[inline(always)] - pub fn pfoper(&self) -> PfoperR { - PfoperR::new(((self.bits >> 8) & 1) != 0) + pub fn pfoper(&self) -> PFOPER_R { + PFOPER_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - Command Sequence Error"] #[inline(always)] - pub fn sqer(&self) -> SqerR { - SqerR::new(((self.bits >> 10) & 1) != 0) + pub fn sqer(&self) -> SQER_R { + SQER_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Protection Error"] #[inline(always)] - pub fn proer(&self) -> ProerR { - ProerR::new(((self.bits >> 11) & 1) != 0) + pub fn proer(&self) -> PROER_R { + PROER_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - PFLASH Single-Bit Error and Correction"] #[inline(always)] - pub fn pfsber(&self) -> PfsberR { - PfsberR::new(((self.bits >> 12) & 1) != 0) + pub fn pfsber(&self) -> PFSBER_R { + PFSBER_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - PFLASH Double-Bit Error"] #[inline(always)] - pub fn pfdber(&self) -> PfdberR { - PfdberR::new(((self.bits >> 14) & 1) != 0) + pub fn pfdber(&self) -> PFDBER_R { + PFDBER_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Protection Installed"] #[inline(always)] - pub fn proin(&self) -> ProinR { - ProinR::new(((self.bits >> 16) & 1) != 0) + pub fn proin(&self) -> PROIN_R { + PROIN_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - Read Protection Installed"] #[inline(always)] - pub fn rproin(&self) -> RproinR { - RproinR::new(((self.bits >> 18) & 1) != 0) + pub fn rproin(&self) -> RPROIN_R { + RPROIN_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Read Protection Disable State"] #[inline(always)] - pub fn rprodis(&self) -> RprodisR { - RprodisR::new(((self.bits >> 19) & 1) != 0) + pub fn rprodis(&self) -> RPRODIS_R { + RPRODIS_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - Sector Write Protection Installed for User 0"] #[inline(always)] - pub fn wproin0(&self) -> Wproin0R { - Wproin0R::new(((self.bits >> 21) & 1) != 0) + pub fn wproin0(&self) -> WPROIN0_R { + WPROIN0_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Sector Write Protection Installed for User 1"] #[inline(always)] - pub fn wproin1(&self) -> Wproin1R { - Wproin1R::new(((self.bits >> 22) & 1) != 0) + pub fn wproin1(&self) -> WPROIN1_R { + WPROIN1_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Sector OTP Protection Installed for User 2"] #[inline(always)] - pub fn wproin2(&self) -> Wproin2R { - Wproin2R::new(((self.bits >> 23) & 1) != 0) + pub fn wproin2(&self) -> WPROIN2_R { + WPROIN2_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 25 - Sector Write Protection Disabled for User 0"] #[inline(always)] - pub fn wprodis0(&self) -> Wprodis0R { - Wprodis0R::new(((self.bits >> 25) & 1) != 0) + pub fn wprodis0(&self) -> WPRODIS0_R { + WPRODIS0_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Sector Write Protection Disabled for User 1"] #[inline(always)] - pub fn wprodis1(&self) -> Wprodis1R { - Wprodis1R::new(((self.bits >> 26) & 1) != 0) + pub fn wprodis1(&self) -> WPRODIS1_R { + WPRODIS1_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - Flash Sleep Mode"] #[inline(always)] - pub fn slm(&self) -> SlmR { - SlmR::new(((self.bits >> 28) & 1) != 0) + pub fn slm(&self) -> SLM_R { + SLM_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 31 - Verify Error"] #[inline(always)] - pub fn ver(&self) -> VerR { - VerR::new(((self.bits >> 31) & 1) != 0) + pub fn ver(&self) -> VER_R { + VER_R::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Flash Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FsrSpec; -impl crate::RegisterSpec for FsrSpec { +pub struct FSR_SPEC; +impl crate::RegisterSpec for FSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fsr::R`](R) reader structure"] -impl crate::Readable for FsrSpec {} +impl crate::Readable for FSR_SPEC {} #[doc = "`reset()` method sets FSR to value 0"] -impl crate::Resettable for FsrSpec { +impl crate::Resettable for FSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/id.rs b/src/flash0/id.rs index 10a4b4c5..c87c75a0 100644 --- a/src/flash0/id.rs +++ b/src/flash0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Flash Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x009c_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x009c_c000; } diff --git a/src/flash0/marp.rs b/src/flash0/marp.rs index f5e5c79d..f2476c99 100644 --- a/src/flash0/marp.rs +++ b/src/flash0/marp.rs @@ -1,60 +1,60 @@ #[doc = "Register `MARP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MARP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "PFLASH Margin Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Margin { +pub enum MARGIN_A { #[doc = "0: Standard (default) margin."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] - Value2 = 1, + VALUE2 = 1, #[doc = "4: Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] - Value3 = 4, + VALUE3 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Margin) -> Self { + fn from(variant: MARGIN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Margin { +impl crate::FieldSpec for MARGIN_A { type Ux = u8; } -impl crate::IsEnum for Margin {} +impl crate::IsEnum for MARGIN_A {} #[doc = "Field `MARGIN` reader - PFLASH Margin Selection"] -pub type MarginR = crate::FieldReader; -impl MarginR { +pub type MARGIN_R = crate::FieldReader; +impl MARGIN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Margin::Value1), - 1 => Some(Margin::Value2), - 4 => Some(Margin::Value3), + 0 => Some(MARGIN_A::VALUE1), + 1 => Some(MARGIN_A::VALUE2), + 4 => Some(MARGIN_A::VALUE3), _ => None, } } #[doc = "Standard (default) margin."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Margin::Value1 + *self == MARGIN_A::VALUE1 } #[doc = "Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Margin::Value2 + *self == MARGIN_A::VALUE2 } #[doc = "Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Margin::Value3 + *self == MARGIN_A::VALUE3 } } #[doc = "Field `MARGIN` writer - PFLASH Margin Selection"] -pub type MarginW<'a, REG> = crate::FieldWriter<'a, REG, 4, Margin>; -impl<'a, REG> MarginW<'a, REG> +pub type MARGIN_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MARGIN_A>; +impl<'a, REG> MARGIN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,112 +62,112 @@ where #[doc = "Standard (default) margin."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Margin::Value1) + self.variant(MARGIN_A::VALUE1) } #[doc = "Tight margin for 0 (low) level. Suboptimal 0-bits are read as 1s."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Margin::Value2) + self.variant(MARGIN_A::VALUE2) } #[doc = "Tight margin for 1 (high) level. Suboptimal 1-bits are read as 0s."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Margin::Value3) + self.variant(MARGIN_A::VALUE3) } } #[doc = "PFLASH Double-Bit Error Trap Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trapdis { +pub enum TRAPDIS_A { #[doc = "0: If a double-bit error occurs in PFLASH, a bus error trap is generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The double-bit error trap is disabled. Shall be used only during margin check"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trapdis) -> Self { + fn from(variant: TRAPDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRAPDIS` reader - PFLASH Double-Bit Error Trap Disable"] -pub type TrapdisR = crate::BitReader; -impl TrapdisR { +pub type TRAPDIS_R = crate::BitReader; +impl TRAPDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trapdis { + pub const fn variant(&self) -> TRAPDIS_A { match self.bits { - false => Trapdis::Value1, - true => Trapdis::Value2, + false => TRAPDIS_A::VALUE1, + true => TRAPDIS_A::VALUE2, } } #[doc = "If a double-bit error occurs in PFLASH, a bus error trap is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trapdis::Value1 + *self == TRAPDIS_A::VALUE1 } #[doc = "The double-bit error trap is disabled. Shall be used only during margin check"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trapdis::Value2 + *self == TRAPDIS_A::VALUE2 } } #[doc = "Field `TRAPDIS` writer - PFLASH Double-Bit Error Trap Disable"] -pub type TrapdisW<'a, REG> = crate::BitWriter<'a, REG, Trapdis>; -impl<'a, REG> TrapdisW<'a, REG> +pub type TRAPDIS_W<'a, REG> = crate::BitWriter<'a, REG, TRAPDIS_A>; +impl<'a, REG> TRAPDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "If a double-bit error occurs in PFLASH, a bus error trap is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trapdis::Value1) + self.variant(TRAPDIS_A::VALUE1) } #[doc = "The double-bit error trap is disabled. Shall be used only during margin check"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trapdis::Value2) + self.variant(TRAPDIS_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - PFLASH Margin Selection"] #[inline(always)] - pub fn margin(&self) -> MarginR { - MarginR::new((self.bits & 0x0f) as u8) + pub fn margin(&self) -> MARGIN_R { + MARGIN_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"] #[inline(always)] - pub fn trapdis(&self) -> TrapdisR { - TrapdisR::new(((self.bits >> 15) & 1) != 0) + pub fn trapdis(&self) -> TRAPDIS_R { + TRAPDIS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - PFLASH Margin Selection"] #[inline(always)] #[must_use] - pub fn margin(&mut self) -> MarginW { - MarginW::new(self, 0) + pub fn margin(&mut self) -> MARGIN_W { + MARGIN_W::new(self, 0) } #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"] #[inline(always)] #[must_use] - pub fn trapdis(&mut self) -> TrapdisW { - TrapdisW::new(self, 15) + pub fn trapdis(&mut self) -> TRAPDIS_W { + TRAPDIS_W::new(self, 15) } } #[doc = "Margin Control Register PFLASH\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`marp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`marp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MarpSpec; -impl crate::RegisterSpec for MarpSpec { +pub struct MARP_SPEC; +impl crate::RegisterSpec for MARP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`marp::R`](R) reader structure"] -impl crate::Readable for MarpSpec {} +impl crate::Readable for MARP_SPEC {} #[doc = "`write(|w| ..)` method takes [`marp::W`](W) writer structure"] -impl crate::Writable for MarpSpec { +impl crate::Writable for MARP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MARP to value 0"] -impl crate::Resettable for MarpSpec { +impl crate::Resettable for MARP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon0.rs b/src/flash0/procon0.rs index a7f807a6..19442184 100644 --- a/src/flash0/procon0.rs +++ b/src/flash0/procon0.rs @@ -1,425 +1,425 @@ #[doc = "Register `PROCON0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Sector 0 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0l { +pub enum S0L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0l) -> Self { + fn from(variant: S0L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 0"] -pub type S0lR = crate::BitReader; -impl S0lR { +pub type S0L_R = crate::BitReader; +impl S0L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0l { + pub const fn variant(&self) -> S0L_A { match self.bits { - false => S0l::Value1, - true => S0l::Value2, + false => S0L_A::VALUE1, + true => S0L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0l::Value1 + *self == S0L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0l::Value2 + *self == S0L_A::VALUE2 } } #[doc = "Sector 1 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1l { +pub enum S1L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1l) -> Self { + fn from(variant: S1L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 0"] -pub type S1lR = crate::BitReader; -impl S1lR { +pub type S1L_R = crate::BitReader; +impl S1L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1l { + pub const fn variant(&self) -> S1L_A { match self.bits { - false => S1l::Value1, - true => S1l::Value2, + false => S1L_A::VALUE1, + true => S1L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1l::Value1 + *self == S1L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1l::Value2 + *self == S1L_A::VALUE2 } } #[doc = "Sector 2 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2l { +pub enum S2L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2l) -> Self { + fn from(variant: S2L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 0"] -pub type S2lR = crate::BitReader; -impl S2lR { +pub type S2L_R = crate::BitReader; +impl S2L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2l { + pub const fn variant(&self) -> S2L_A { match self.bits { - false => S2l::Value1, - true => S2l::Value2, + false => S2L_A::VALUE1, + true => S2L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2l::Value1 + *self == S2L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2l::Value2 + *self == S2L_A::VALUE2 } } #[doc = "Sector 3 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3l { +pub enum S3L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3l) -> Self { + fn from(variant: S3L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 0"] -pub type S3lR = crate::BitReader; -impl S3lR { +pub type S3L_R = crate::BitReader; +impl S3L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3l { + pub const fn variant(&self) -> S3L_A { match self.bits { - false => S3l::Value1, - true => S3l::Value2, + false => S3L_A::VALUE1, + true => S3L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3l::Value1 + *self == S3L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3l::Value2 + *self == S3L_A::VALUE2 } } #[doc = "Sector 4 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4l { +pub enum S4L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4l) -> Self { + fn from(variant: S4L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 0"] -pub type S4lR = crate::BitReader; -impl S4lR { +pub type S4L_R = crate::BitReader; +impl S4L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4l { + pub const fn variant(&self) -> S4L_A { match self.bits { - false => S4l::Value1, - true => S4l::Value2, + false => S4L_A::VALUE1, + true => S4L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4l::Value1 + *self == S4L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4l::Value2 + *self == S4L_A::VALUE2 } } #[doc = "Sector 5 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5l { +pub enum S5L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5l) -> Self { + fn from(variant: S5L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 0"] -pub type S5lR = crate::BitReader; -impl S5lR { +pub type S5L_R = crate::BitReader; +impl S5L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5l { + pub const fn variant(&self) -> S5L_A { match self.bits { - false => S5l::Value1, - true => S5l::Value2, + false => S5L_A::VALUE1, + true => S5L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5l::Value1 + *self == S5L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5l::Value2 + *self == S5L_A::VALUE2 } } #[doc = "Sector 6 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6l { +pub enum S6L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6l) -> Self { + fn from(variant: S6L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 0"] -pub type S6lR = crate::BitReader; -impl S6lR { +pub type S6L_R = crate::BitReader; +impl S6L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6l { + pub const fn variant(&self) -> S6L_A { match self.bits { - false => S6l::Value1, - true => S6l::Value2, + false => S6L_A::VALUE1, + true => S6L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6l::Value1 + *self == S6L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6l::Value2 + *self == S6L_A::VALUE2 } } #[doc = "Sector 7 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7l { +pub enum S7L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7l) -> Self { + fn from(variant: S7L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 0"] -pub type S7lR = crate::BitReader; -impl S7lR { +pub type S7L_R = crate::BitReader; +impl S7L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7l { + pub const fn variant(&self) -> S7L_A { match self.bits { - false => S7l::Value1, - true => S7l::Value2, + false => S7L_A::VALUE1, + true => S7L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7l::Value1 + *self == S7L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7l::Value2 + *self == S7L_A::VALUE2 } } #[doc = "Sector 8 Locked for Write Protection by User 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8l { +pub enum S8L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8l) -> Self { + fn from(variant: S8L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 0"] -pub type S8lR = crate::BitReader; -impl S8lR { +pub type S8L_R = crate::BitReader; +impl S8L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8l { + pub const fn variant(&self) -> S8L_A { match self.bits { - false => S8l::Value1, - true => S8l::Value2, + false => S8L_A::VALUE1, + true => S8L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8l::Value1 + *self == S8L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8l::Value2 + *self == S8L_A::VALUE2 } } #[doc = "Read Protection Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rpro { +pub enum RPRO_A { #[doc = "0: No read protection configured"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read protection and global write protection is configured by user 0 (master user)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rpro) -> Self { + fn from(variant: RPRO_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPRO` reader - Read Protection Configuration"] -pub type RproR = crate::BitReader; -impl RproR { +pub type RPRO_R = crate::BitReader; +impl RPRO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rpro { + pub const fn variant(&self) -> RPRO_A { match self.bits { - false => Rpro::Value1, - true => Rpro::Value2, + false => RPRO_A::VALUE1, + true => RPRO_A::VALUE2, } } #[doc = "No read protection configured"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rpro::Value1 + *self == RPRO_A::VALUE1 } #[doc = "Read protection and global write protection is configured by user 0 (master user)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rpro::Value2 + *self == RPRO_A::VALUE2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s0l(&self) -> S0lR { - S0lR::new((self.bits & 1) != 0) + pub fn s0l(&self) -> S0L_R { + S0L_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s1l(&self) -> S1lR { - S1lR::new(((self.bits >> 1) & 1) != 0) + pub fn s1l(&self) -> S1L_R { + S1L_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s2l(&self) -> S2lR { - S2lR::new(((self.bits >> 2) & 1) != 0) + pub fn s2l(&self) -> S2L_R { + S2L_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s3l(&self) -> S3lR { - S3lR::new(((self.bits >> 3) & 1) != 0) + pub fn s3l(&self) -> S3L_R { + S3L_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s4l(&self) -> S4lR { - S4lR::new(((self.bits >> 4) & 1) != 0) + pub fn s4l(&self) -> S4L_R { + S4L_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s5l(&self) -> S5lR { - S5lR::new(((self.bits >> 5) & 1) != 0) + pub fn s5l(&self) -> S5L_R { + S5L_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s6l(&self) -> S6lR { - S6lR::new(((self.bits >> 6) & 1) != 0) + pub fn s6l(&self) -> S6L_R { + S6L_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s7l(&self) -> S7lR { - S7lR::new(((self.bits >> 7) & 1) != 0) + pub fn s7l(&self) -> S7L_R { + S7L_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked for Write Protection by User 0"] #[inline(always)] - pub fn s8l(&self) -> S8lR { - S8lR::new(((self.bits >> 8) & 1) != 0) + pub fn s8l(&self) -> S8L_R { + S8L_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 15 - Read Protection Configuration"] #[inline(always)] - pub fn rpro(&self) -> RproR { - RproR::new(((self.bits >> 15) & 1) != 0) + pub fn rpro(&self) -> RPRO_R { + RPRO_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Procon0Spec; -impl crate::RegisterSpec for Procon0Spec { +pub struct PROCON0_SPEC; +impl crate::RegisterSpec for PROCON0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`procon0::R`](R) reader structure"] -impl crate::Readable for Procon0Spec {} +impl crate::Readable for PROCON0_SPEC {} #[doc = "`reset()` method sets PROCON0 to value 0"] -impl crate::Resettable for Procon0Spec { +impl crate::Resettable for PROCON0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon1.rs b/src/flash0/procon1.rs index 70b5f10d..d0c634f2 100644 --- a/src/flash0/procon1.rs +++ b/src/flash0/procon1.rs @@ -1,384 +1,384 @@ #[doc = "Register `PROCON1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Sector 0 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0l { +pub enum S0L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0l) -> Self { + fn from(variant: S0L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0L` reader - Sector 0 Locked for Write Protection by User 1"] -pub type S0lR = crate::BitReader; -impl S0lR { +pub type S0L_R = crate::BitReader; +impl S0L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0l { + pub const fn variant(&self) -> S0L_A { match self.bits { - false => S0l::Value1, - true => S0l::Value2, + false => S0L_A::VALUE1, + true => S0L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0l::Value1 + *self == S0L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0l::Value2 + *self == S0L_A::VALUE2 } } #[doc = "Sector 1 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1l { +pub enum S1L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1l) -> Self { + fn from(variant: S1L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1L` reader - Sector 1 Locked for Write Protection by User 1"] -pub type S1lR = crate::BitReader; -impl S1lR { +pub type S1L_R = crate::BitReader; +impl S1L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1l { + pub const fn variant(&self) -> S1L_A { match self.bits { - false => S1l::Value1, - true => S1l::Value2, + false => S1L_A::VALUE1, + true => S1L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1l::Value1 + *self == S1L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1l::Value2 + *self == S1L_A::VALUE2 } } #[doc = "Sector 2 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2l { +pub enum S2L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2l) -> Self { + fn from(variant: S2L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2L` reader - Sector 2 Locked for Write Protection by User 1"] -pub type S2lR = crate::BitReader; -impl S2lR { +pub type S2L_R = crate::BitReader; +impl S2L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2l { + pub const fn variant(&self) -> S2L_A { match self.bits { - false => S2l::Value1, - true => S2l::Value2, + false => S2L_A::VALUE1, + true => S2L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2l::Value1 + *self == S2L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2l::Value2 + *self == S2L_A::VALUE2 } } #[doc = "Sector 3 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3l { +pub enum S3L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3l) -> Self { + fn from(variant: S3L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3L` reader - Sector 3 Locked for Write Protection by User 1"] -pub type S3lR = crate::BitReader; -impl S3lR { +pub type S3L_R = crate::BitReader; +impl S3L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3l { + pub const fn variant(&self) -> S3L_A { match self.bits { - false => S3l::Value1, - true => S3l::Value2, + false => S3L_A::VALUE1, + true => S3L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3l::Value1 + *self == S3L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3l::Value2 + *self == S3L_A::VALUE2 } } #[doc = "Sector 4 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4l { +pub enum S4L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4l) -> Self { + fn from(variant: S4L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S4L` reader - Sector 4 Locked for Write Protection by User 1"] -pub type S4lR = crate::BitReader; -impl S4lR { +pub type S4L_R = crate::BitReader; +impl S4L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4l { + pub const fn variant(&self) -> S4L_A { match self.bits { - false => S4l::Value1, - true => S4l::Value2, + false => S4L_A::VALUE1, + true => S4L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4l::Value1 + *self == S4L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4l::Value2 + *self == S4L_A::VALUE2 } } #[doc = "Sector 5 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5l { +pub enum S5L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5l) -> Self { + fn from(variant: S5L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S5L` reader - Sector 5 Locked for Write Protection by User 1"] -pub type S5lR = crate::BitReader; -impl S5lR { +pub type S5L_R = crate::BitReader; +impl S5L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5l { + pub const fn variant(&self) -> S5L_A { match self.bits { - false => S5l::Value1, - true => S5l::Value2, + false => S5L_A::VALUE1, + true => S5L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5l::Value1 + *self == S5L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5l::Value2 + *self == S5L_A::VALUE2 } } #[doc = "Sector 6 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6l { +pub enum S6L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6l) -> Self { + fn from(variant: S6L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S6L` reader - Sector 6 Locked for Write Protection by User 1"] -pub type S6lR = crate::BitReader; -impl S6lR { +pub type S6L_R = crate::BitReader; +impl S6L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6l { + pub const fn variant(&self) -> S6L_A { match self.bits { - false => S6l::Value1, - true => S6l::Value2, + false => S6L_A::VALUE1, + true => S6L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6l::Value1 + *self == S6L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6l::Value2 + *self == S6L_A::VALUE2 } } #[doc = "Sector 7 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7l { +pub enum S7L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7l) -> Self { + fn from(variant: S7L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S7L` reader - Sector 7 Locked for Write Protection by User 1"] -pub type S7lR = crate::BitReader; -impl S7lR { +pub type S7L_R = crate::BitReader; +impl S7L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7l { + pub const fn variant(&self) -> S7L_A { match self.bits { - false => S7l::Value1, - true => S7l::Value2, + false => S7L_A::VALUE1, + true => S7L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7l::Value1 + *self == S7L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7l::Value2 + *self == S7L_A::VALUE2 } } #[doc = "Sector 8 Locked for Write Protection by User 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8l { +pub enum S8L_A { #[doc = "0: No write protection is configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Write protection is configured for sector n."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8l) -> Self { + fn from(variant: S8L_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S8L` reader - Sector 8 Locked for Write Protection by User 1"] -pub type S8lR = crate::BitReader; -impl S8lR { +pub type S8L_R = crate::BitReader; +impl S8L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8l { + pub const fn variant(&self) -> S8L_A { match self.bits { - false => S8l::Value1, - true => S8l::Value2, + false => S8L_A::VALUE1, + true => S8L_A::VALUE2, } } #[doc = "No write protection is configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8l::Value1 + *self == S8L_A::VALUE1 } #[doc = "Write protection is configured for sector n."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8l::Value2 + *self == S8L_A::VALUE2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s0l(&self) -> S0lR { - S0lR::new((self.bits & 1) != 0) + pub fn s0l(&self) -> S0L_R { + S0L_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s1l(&self) -> S1lR { - S1lR::new(((self.bits >> 1) & 1) != 0) + pub fn s1l(&self) -> S1L_R { + S1L_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s2l(&self) -> S2lR { - S2lR::new(((self.bits >> 2) & 1) != 0) + pub fn s2l(&self) -> S2L_R { + S2L_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s3l(&self) -> S3lR { - S3lR::new(((self.bits >> 3) & 1) != 0) + pub fn s3l(&self) -> S3L_R { + S3L_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s4l(&self) -> S4lR { - S4lR::new(((self.bits >> 4) & 1) != 0) + pub fn s4l(&self) -> S4L_R { + S4L_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s5l(&self) -> S5lR { - S5lR::new(((self.bits >> 5) & 1) != 0) + pub fn s5l(&self) -> S5L_R { + S5L_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s6l(&self) -> S6lR { - S6lR::new(((self.bits >> 6) & 1) != 0) + pub fn s6l(&self) -> S6L_R { + S6L_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s7l(&self) -> S7lR { - S7lR::new(((self.bits >> 7) & 1) != 0) + pub fn s7l(&self) -> S7L_R { + S7L_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked for Write Protection by User 1"] #[inline(always)] - pub fn s8l(&self) -> S8lR { - S8lR::new(((self.bits >> 8) & 1) != 0) + pub fn s8l(&self) -> S8L_R { + S8L_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Procon1Spec; -impl crate::RegisterSpec for Procon1Spec { +pub struct PROCON1_SPEC; +impl crate::RegisterSpec for PROCON1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`procon1::R`](R) reader structure"] -impl crate::Readable for Procon1Spec {} +impl crate::Readable for PROCON1_SPEC {} #[doc = "`reset()` method sets PROCON1 to value 0"] -impl crate::Resettable for Procon1Spec { +impl crate::Resettable for PROCON1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/flash0/procon2.rs b/src/flash0/procon2.rs index c20002a7..d9e26fba 100644 --- a/src/flash0/procon2.rs +++ b/src/flash0/procon2.rs @@ -1,384 +1,384 @@ #[doc = "Register `PROCON2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Sector 0 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0rom { +pub enum S0ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0rom) -> Self { + fn from(variant: S0ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0ROM` reader - Sector 0 Locked Forever by User 2"] -pub type S0romR = crate::BitReader; -impl S0romR { +pub type S0ROM_R = crate::BitReader; +impl S0ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0rom { + pub const fn variant(&self) -> S0ROM_A { match self.bits { - false => S0rom::Value1, - true => S0rom::Value2, + false => S0ROM_A::VALUE1, + true => S0ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0rom::Value1 + *self == S0ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0rom::Value2 + *self == S0ROM_A::VALUE2 } } #[doc = "Sector 1 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1rom { +pub enum S1ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1rom) -> Self { + fn from(variant: S1ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1ROM` reader - Sector 1 Locked Forever by User 2"] -pub type S1romR = crate::BitReader; -impl S1romR { +pub type S1ROM_R = crate::BitReader; +impl S1ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1rom { + pub const fn variant(&self) -> S1ROM_A { match self.bits { - false => S1rom::Value1, - true => S1rom::Value2, + false => S1ROM_A::VALUE1, + true => S1ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1rom::Value1 + *self == S1ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1rom::Value2 + *self == S1ROM_A::VALUE2 } } #[doc = "Sector 2 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2rom { +pub enum S2ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2rom) -> Self { + fn from(variant: S2ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2ROM` reader - Sector 2 Locked Forever by User 2"] -pub type S2romR = crate::BitReader; -impl S2romR { +pub type S2ROM_R = crate::BitReader; +impl S2ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2rom { + pub const fn variant(&self) -> S2ROM_A { match self.bits { - false => S2rom::Value1, - true => S2rom::Value2, + false => S2ROM_A::VALUE1, + true => S2ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2rom::Value1 + *self == S2ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2rom::Value2 + *self == S2ROM_A::VALUE2 } } #[doc = "Sector 3 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S3rom { +pub enum S3ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S3rom) -> Self { + fn from(variant: S3ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S3ROM` reader - Sector 3 Locked Forever by User 2"] -pub type S3romR = crate::BitReader; -impl S3romR { +pub type S3ROM_R = crate::BitReader; +impl S3ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S3rom { + pub const fn variant(&self) -> S3ROM_A { match self.bits { - false => S3rom::Value1, - true => S3rom::Value2, + false => S3ROM_A::VALUE1, + true => S3ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S3rom::Value1 + *self == S3ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S3rom::Value2 + *self == S3ROM_A::VALUE2 } } #[doc = "Sector 4 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S4rom { +pub enum S4ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S4rom) -> Self { + fn from(variant: S4ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S4ROM` reader - Sector 4 Locked Forever by User 2"] -pub type S4romR = crate::BitReader; -impl S4romR { +pub type S4ROM_R = crate::BitReader; +impl S4ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S4rom { + pub const fn variant(&self) -> S4ROM_A { match self.bits { - false => S4rom::Value1, - true => S4rom::Value2, + false => S4ROM_A::VALUE1, + true => S4ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S4rom::Value1 + *self == S4ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S4rom::Value2 + *self == S4ROM_A::VALUE2 } } #[doc = "Sector 5 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S5rom { +pub enum S5ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S5rom) -> Self { + fn from(variant: S5ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S5ROM` reader - Sector 5 Locked Forever by User 2"] -pub type S5romR = crate::BitReader; -impl S5romR { +pub type S5ROM_R = crate::BitReader; +impl S5ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S5rom { + pub const fn variant(&self) -> S5ROM_A { match self.bits { - false => S5rom::Value1, - true => S5rom::Value2, + false => S5ROM_A::VALUE1, + true => S5ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S5rom::Value1 + *self == S5ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S5rom::Value2 + *self == S5ROM_A::VALUE2 } } #[doc = "Sector 6 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S6rom { +pub enum S6ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S6rom) -> Self { + fn from(variant: S6ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S6ROM` reader - Sector 6 Locked Forever by User 2"] -pub type S6romR = crate::BitReader; -impl S6romR { +pub type S6ROM_R = crate::BitReader; +impl S6ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S6rom { + pub const fn variant(&self) -> S6ROM_A { match self.bits { - false => S6rom::Value1, - true => S6rom::Value2, + false => S6ROM_A::VALUE1, + true => S6ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S6rom::Value1 + *self == S6ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S6rom::Value2 + *self == S6ROM_A::VALUE2 } } #[doc = "Sector 7 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S7rom { +pub enum S7ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S7rom) -> Self { + fn from(variant: S7ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S7ROM` reader - Sector 7 Locked Forever by User 2"] -pub type S7romR = crate::BitReader; -impl S7romR { +pub type S7ROM_R = crate::BitReader; +impl S7ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S7rom { + pub const fn variant(&self) -> S7ROM_A { match self.bits { - false => S7rom::Value1, - true => S7rom::Value2, + false => S7ROM_A::VALUE1, + true => S7ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S7rom::Value1 + *self == S7ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S7rom::Value2 + *self == S7ROM_A::VALUE2 } } #[doc = "Sector 8 Locked Forever by User 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S8rom { +pub enum S8ROM_A { #[doc = "0: No ROM functionality configured for sector n."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S8rom) -> Self { + fn from(variant: S8ROM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S8ROM` reader - Sector 8 Locked Forever by User 2"] -pub type S8romR = crate::BitReader; -impl S8romR { +pub type S8ROM_R = crate::BitReader; +impl S8ROM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S8rom { + pub const fn variant(&self) -> S8ROM_A { match self.bits { - false => S8rom::Value1, - true => S8rom::Value2, + false => S8ROM_A::VALUE1, + true => S8ROM_A::VALUE2, } } #[doc = "No ROM functionality configured for sector n."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S8rom::Value1 + *self == S8ROM_A::VALUE1 } #[doc = "ROM functionality is configured for sector n. Re-programming of this sector is no longer possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S8rom::Value2 + *self == S8ROM_A::VALUE2 } } impl R { #[doc = "Bit 0 - Sector 0 Locked Forever by User 2"] #[inline(always)] - pub fn s0rom(&self) -> S0romR { - S0romR::new((self.bits & 1) != 0) + pub fn s0rom(&self) -> S0ROM_R { + S0ROM_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Sector 1 Locked Forever by User 2"] #[inline(always)] - pub fn s1rom(&self) -> S1romR { - S1romR::new(((self.bits >> 1) & 1) != 0) + pub fn s1rom(&self) -> S1ROM_R { + S1ROM_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sector 2 Locked Forever by User 2"] #[inline(always)] - pub fn s2rom(&self) -> S2romR { - S2romR::new(((self.bits >> 2) & 1) != 0) + pub fn s2rom(&self) -> S2ROM_R { + S2ROM_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Sector 3 Locked Forever by User 2"] #[inline(always)] - pub fn s3rom(&self) -> S3romR { - S3romR::new(((self.bits >> 3) & 1) != 0) + pub fn s3rom(&self) -> S3ROM_R { + S3ROM_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Sector 4 Locked Forever by User 2"] #[inline(always)] - pub fn s4rom(&self) -> S4romR { - S4romR::new(((self.bits >> 4) & 1) != 0) + pub fn s4rom(&self) -> S4ROM_R { + S4ROM_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Sector 5 Locked Forever by User 2"] #[inline(always)] - pub fn s5rom(&self) -> S5romR { - S5romR::new(((self.bits >> 5) & 1) != 0) + pub fn s5rom(&self) -> S5ROM_R { + S5ROM_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Sector 6 Locked Forever by User 2"] #[inline(always)] - pub fn s6rom(&self) -> S6romR { - S6romR::new(((self.bits >> 6) & 1) != 0) + pub fn s6rom(&self) -> S6ROM_R { + S6ROM_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Sector 7 Locked Forever by User 2"] #[inline(always)] - pub fn s7rom(&self) -> S7romR { - S7romR::new(((self.bits >> 7) & 1) != 0) + pub fn s7rom(&self) -> S7ROM_R { + S7ROM_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Sector 8 Locked Forever by User 2"] #[inline(always)] - pub fn s8rom(&self) -> S8romR { - S8romR::new(((self.bits >> 8) & 1) != 0) + pub fn s8rom(&self) -> S8ROM_R { + S8ROM_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Flash Protection Configuration Register User 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procon2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Procon2Spec; -impl crate::RegisterSpec for Procon2Spec { +pub struct PROCON2_SPEC; +impl crate::RegisterSpec for PROCON2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`procon2::R`](R) reader structure"] -impl crate::Readable for Procon2Spec {} +impl crate::Readable for PROCON2_SPEC {} #[doc = "`reset()` method sets PROCON2 to value 0"] -impl crate::Resettable for Procon2Spec { +impl crate::Resettable for PROCON2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/generic.rs b/src/generic.rs index 3526c912..c8cae283 100644 --- a/src/generic.rs +++ b/src/generic.rs @@ -303,6 +303,12 @@ impl BitReader { pub struct Safe; #[doc = " You should check that value is allowed to pass to register/field writer marked with this"] pub struct Unsafe; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct Range; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeFrom; +#[doc = " Marker for field writers are safe to write in specified inclusive range"] +pub struct RangeTo; #[doc = " Write field Proxy"] pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>; impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> @@ -353,6 +359,57 @@ where unsafe { self.bits(value) } } } +impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> FieldWriter<'a, REG, WI, FI, Range> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN && value <= MAX); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, const MIN: u64> FieldWriter<'a, REG, WI, FI, RangeFrom> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN); + } + unsafe { self.bits(value) } + } +} +impl<'a, REG, const WI: u8, FI, const MAX: u64> FieldWriter<'a, REG, WI, FI, RangeTo> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + #[doc = " Writes raw bits to the field"] + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value <= MAX); + } + unsafe { self.bits(value) } + } +} impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, diff --git a/src/gpdma0.rs b/src/gpdma0.rs index d47ceb74..cb0daf62 100644 --- a/src/gpdma0.rs +++ b/src/gpdma0.rs @@ -1,420 +1,388 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - rawtfr: Rawtfr, + rawtfr: RAWTFR, _reserved1: [u8; 0x04], - rawblock: Rawblock, + rawblock: RAWBLOCK, _reserved2: [u8; 0x04], - rawsrctran: Rawsrctran, + rawsrctran: RAWSRCTRAN, _reserved3: [u8; 0x04], - rawdsttran: Rawdsttran, + rawdsttran: RAWDSTTRAN, _reserved4: [u8; 0x04], - rawerr: Rawerr, + rawerr: RAWERR, _reserved5: [u8; 0x04], - statustfr: Statustfr, + statustfr: STATUSTFR, _reserved6: [u8; 0x04], - statusblock: Statusblock, + statusblock: STATUSBLOCK, _reserved7: [u8; 0x04], - statussrctran: Statussrctran, + statussrctran: STATUSSRCTRAN, _reserved8: [u8; 0x04], - statusdsttran: Statusdsttran, + statusdsttran: STATUSDSTTRAN, _reserved9: [u8; 0x04], - statuserr: Statuserr, + statuserr: STATUSERR, _reserved10: [u8; 0x04], - masktfr: Masktfr, + masktfr: MASKTFR, _reserved11: [u8; 0x04], - maskblock: Maskblock, + maskblock: MASKBLOCK, _reserved12: [u8; 0x04], - masksrctran: Masksrctran, + masksrctran: MASKSRCTRAN, _reserved13: [u8; 0x04], - maskdsttran: Maskdsttran, + maskdsttran: MASKDSTTRAN, _reserved14: [u8; 0x04], - maskerr: Maskerr, + maskerr: MASKERR, _reserved15: [u8; 0x04], - cleartfr: Cleartfr, + cleartfr: CLEARTFR, _reserved16: [u8; 0x04], - clearblock: Clearblock, + clearblock: CLEARBLOCK, _reserved17: [u8; 0x04], - clearsrctran: Clearsrctran, + clearsrctran: CLEARSRCTRAN, _reserved18: [u8; 0x04], - cleardsttran: Cleardsttran, + cleardsttran: CLEARDSTTRAN, _reserved19: [u8; 0x04], - clearerr: Clearerr, + clearerr: CLEARERR, _reserved20: [u8; 0x04], - statusint: Statusint, + statusint: STATUSINT, _reserved21: [u8; 0x04], - reqsrcreg: Reqsrcreg, + reqsrcreg: REQSRCREG, _reserved22: [u8; 0x04], - reqdstreg: Reqdstreg, + reqdstreg: REQDSTREG, _reserved23: [u8; 0x04], - sglreqsrcreg: Sglreqsrcreg, + sglreqsrcreg: SGLREQSRCREG, _reserved24: [u8; 0x04], - sglreqdstreg: Sglreqdstreg, + sglreqdstreg: SGLREQDSTREG, _reserved25: [u8; 0x04], - lstsrcreg: Lstsrcreg, + lstsrcreg: LSTSRCREG, _reserved26: [u8; 0x04], - lstdstreg: Lstdstreg, + lstdstreg: LSTDSTREG, _reserved27: [u8; 0x04], - dmacfgreg: Dmacfgreg, + dmacfgreg: DMACFGREG, _reserved28: [u8; 0x04], - chenreg: Chenreg, + chenreg: CHENREG, _reserved29: [u8; 0x04], - id: Id, + id: ID, _reserved30: [u8; 0x4c], - type_: Type, - version: Version, + type_: TYPE, + version: VERSION, } impl RegisterBlock { #[doc = "0x00 - Raw IntTfr Status"] #[inline(always)] - pub const fn rawtfr(&self) -> &Rawtfr { + pub const fn rawtfr(&self) -> &RAWTFR { &self.rawtfr } #[doc = "0x08 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawblock(&self) -> &Rawblock { + pub const fn rawblock(&self) -> &RAWBLOCK { &self.rawblock } #[doc = "0x10 - Raw IntSrcTran Status"] #[inline(always)] - pub const fn rawsrctran(&self) -> &Rawsrctran { + pub const fn rawsrctran(&self) -> &RAWSRCTRAN { &self.rawsrctran } #[doc = "0x18 - Raw IntBlock Status"] #[inline(always)] - pub const fn rawdsttran(&self) -> &Rawdsttran { + pub const fn rawdsttran(&self) -> &RAWDSTTRAN { &self.rawdsttran } #[doc = "0x20 - Raw IntErr Status"] #[inline(always)] - pub const fn rawerr(&self) -> &Rawerr { + pub const fn rawerr(&self) -> &RAWERR { &self.rawerr } #[doc = "0x28 - IntTfr Status"] #[inline(always)] - pub const fn statustfr(&self) -> &Statustfr { + pub const fn statustfr(&self) -> &STATUSTFR { &self.statustfr } #[doc = "0x30 - IntBlock Status"] #[inline(always)] - pub const fn statusblock(&self) -> &Statusblock { + pub const fn statusblock(&self) -> &STATUSBLOCK { &self.statusblock } #[doc = "0x38 - IntSrcTran Status"] #[inline(always)] - pub const fn statussrctran(&self) -> &Statussrctran { + pub const fn statussrctran(&self) -> &STATUSSRCTRAN { &self.statussrctran } #[doc = "0x40 - IntBlock Status"] #[inline(always)] - pub const fn statusdsttran(&self) -> &Statusdsttran { + pub const fn statusdsttran(&self) -> &STATUSDSTTRAN { &self.statusdsttran } #[doc = "0x48 - IntErr Status"] #[inline(always)] - pub const fn statuserr(&self) -> &Statuserr { + pub const fn statuserr(&self) -> &STATUSERR { &self.statuserr } #[doc = "0x50 - Mask for Raw IntTfr Status"] #[inline(always)] - pub const fn masktfr(&self) -> &Masktfr { + pub const fn masktfr(&self) -> &MASKTFR { &self.masktfr } #[doc = "0x58 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskblock(&self) -> &Maskblock { + pub const fn maskblock(&self) -> &MASKBLOCK { &self.maskblock } #[doc = "0x60 - Mask for Raw IntSrcTran Status"] #[inline(always)] - pub const fn masksrctran(&self) -> &Masksrctran { + pub const fn masksrctran(&self) -> &MASKSRCTRAN { &self.masksrctran } #[doc = "0x68 - Mask for Raw IntBlock Status"] #[inline(always)] - pub const fn maskdsttran(&self) -> &Maskdsttran { + pub const fn maskdsttran(&self) -> &MASKDSTTRAN { &self.maskdsttran } #[doc = "0x70 - Mask for Raw IntErr Status"] #[inline(always)] - pub const fn maskerr(&self) -> &Maskerr { + pub const fn maskerr(&self) -> &MASKERR { &self.maskerr } #[doc = "0x78 - IntTfr Status"] #[inline(always)] - pub const fn cleartfr(&self) -> &Cleartfr { + pub const fn cleartfr(&self) -> &CLEARTFR { &self.cleartfr } #[doc = "0x80 - IntBlock Status"] #[inline(always)] - pub const fn clearblock(&self) -> &Clearblock { + pub const fn clearblock(&self) -> &CLEARBLOCK { &self.clearblock } #[doc = "0x88 - IntSrcTran Status"] #[inline(always)] - pub const fn clearsrctran(&self) -> &Clearsrctran { + pub const fn clearsrctran(&self) -> &CLEARSRCTRAN { &self.clearsrctran } #[doc = "0x90 - IntBlock Status"] #[inline(always)] - pub const fn cleardsttran(&self) -> &Cleardsttran { + pub const fn cleardsttran(&self) -> &CLEARDSTTRAN { &self.cleardsttran } #[doc = "0x98 - IntErr Status"] #[inline(always)] - pub const fn clearerr(&self) -> &Clearerr { + pub const fn clearerr(&self) -> &CLEARERR { &self.clearerr } #[doc = "0xa0 - Combined Interrupt Status Register"] #[inline(always)] - pub const fn statusint(&self) -> &Statusint { + pub const fn statusint(&self) -> &STATUSINT { &self.statusint } #[doc = "0xa8 - Source Software Transaction Request Register"] #[inline(always)] - pub const fn reqsrcreg(&self) -> &Reqsrcreg { + pub const fn reqsrcreg(&self) -> &REQSRCREG { &self.reqsrcreg } #[doc = "0xb0 - Destination Software Transaction Request Register"] #[inline(always)] - pub const fn reqdstreg(&self) -> &Reqdstreg { + pub const fn reqdstreg(&self) -> &REQDSTREG { &self.reqdstreg } #[doc = "0xb8 - Single Source Transaction Request Register"] #[inline(always)] - pub const fn sglreqsrcreg(&self) -> &Sglreqsrcreg { + pub const fn sglreqsrcreg(&self) -> &SGLREQSRCREG { &self.sglreqsrcreg } #[doc = "0xc0 - Single Destination Transaction Request Register"] #[inline(always)] - pub const fn sglreqdstreg(&self) -> &Sglreqdstreg { + pub const fn sglreqdstreg(&self) -> &SGLREQDSTREG { &self.sglreqdstreg } #[doc = "0xc8 - Last Source Transaction Request Register"] #[inline(always)] - pub const fn lstsrcreg(&self) -> &Lstsrcreg { + pub const fn lstsrcreg(&self) -> &LSTSRCREG { &self.lstsrcreg } #[doc = "0xd0 - Last Destination Transaction Request Register"] #[inline(always)] - pub const fn lstdstreg(&self) -> &Lstdstreg { + pub const fn lstdstreg(&self) -> &LSTDSTREG { &self.lstdstreg } #[doc = "0xd8 - GPDMA Configuration Register"] #[inline(always)] - pub const fn dmacfgreg(&self) -> &Dmacfgreg { + pub const fn dmacfgreg(&self) -> &DMACFGREG { &self.dmacfgreg } #[doc = "0xe0 - GPDMA Channel Enable Register"] #[inline(always)] - pub const fn chenreg(&self) -> &Chenreg { + pub const fn chenreg(&self) -> &CHENREG { &self.chenreg } #[doc = "0xe8 - GPDMA0 ID Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x138 - GPDMA Component Type"] #[inline(always)] - pub const fn type_(&self) -> &Type { + pub const fn type_(&self) -> &TYPE { &self.type_ } #[doc = "0x13c - DMA Component Version"] #[inline(always)] - pub const fn version(&self) -> &Version { + pub const fn version(&self) -> &VERSION { &self.version } } #[doc = "RAWTFR (rw) register accessor: Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawtfr`] module"] -#[doc(alias = "RAWTFR")] -pub type Rawtfr = crate::Reg; +pub type RAWTFR = crate::Reg; #[doc = "Raw IntTfr Status"] pub mod rawtfr; #[doc = "RAWBLOCK (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawblock`] module"] -#[doc(alias = "RAWBLOCK")] -pub type Rawblock = crate::Reg; +pub type RAWBLOCK = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawblock; #[doc = "RAWSRCTRAN (rw) register accessor: Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawsrctran`] module"] -#[doc(alias = "RAWSRCTRAN")] -pub type Rawsrctran = crate::Reg; +pub type RAWSRCTRAN = crate::Reg; #[doc = "Raw IntSrcTran Status"] pub mod rawsrctran; #[doc = "RAWDSTTRAN (rw) register accessor: Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawdsttran`] module"] -#[doc(alias = "RAWDSTTRAN")] -pub type Rawdsttran = crate::Reg; +pub type RAWDSTTRAN = crate::Reg; #[doc = "Raw IntBlock Status"] pub mod rawdsttran; #[doc = "RAWERR (rw) register accessor: Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawerr`] module"] -#[doc(alias = "RAWERR")] -pub type Rawerr = crate::Reg; +pub type RAWERR = crate::Reg; #[doc = "Raw IntErr Status"] pub mod rawerr; #[doc = "STATUSTFR (r) register accessor: IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statustfr`] module"] -#[doc(alias = "STATUSTFR")] -pub type Statustfr = crate::Reg; +pub type STATUSTFR = crate::Reg; #[doc = "IntTfr Status"] pub mod statustfr; #[doc = "STATUSBLOCK (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusblock`] module"] -#[doc(alias = "STATUSBLOCK")] -pub type Statusblock = crate::Reg; +pub type STATUSBLOCK = crate::Reg; #[doc = "IntBlock Status"] pub mod statusblock; #[doc = "STATUSSRCTRAN (r) register accessor: IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statussrctran`] module"] -#[doc(alias = "STATUSSRCTRAN")] -pub type Statussrctran = crate::Reg; +pub type STATUSSRCTRAN = crate::Reg; #[doc = "IntSrcTran Status"] pub mod statussrctran; #[doc = "STATUSDSTTRAN (r) register accessor: IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusdsttran`] module"] -#[doc(alias = "STATUSDSTTRAN")] -pub type Statusdsttran = crate::Reg; +pub type STATUSDSTTRAN = crate::Reg; #[doc = "IntBlock Status"] pub mod statusdsttran; #[doc = "STATUSERR (r) register accessor: IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statuserr`] module"] -#[doc(alias = "STATUSERR")] -pub type Statuserr = crate::Reg; +pub type STATUSERR = crate::Reg; #[doc = "IntErr Status"] pub mod statuserr; #[doc = "MASKTFR (rw) register accessor: Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masktfr`] module"] -#[doc(alias = "MASKTFR")] -pub type Masktfr = crate::Reg; +pub type MASKTFR = crate::Reg; #[doc = "Mask for Raw IntTfr Status"] pub mod masktfr; #[doc = "MASKBLOCK (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskblock`] module"] -#[doc(alias = "MASKBLOCK")] -pub type Maskblock = crate::Reg; +pub type MASKBLOCK = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskblock; #[doc = "MASKSRCTRAN (rw) register accessor: Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@masksrctran`] module"] -#[doc(alias = "MASKSRCTRAN")] -pub type Masksrctran = crate::Reg; +pub type MASKSRCTRAN = crate::Reg; #[doc = "Mask for Raw IntSrcTran Status"] pub mod masksrctran; #[doc = "MASKDSTTRAN (rw) register accessor: Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskdsttran`] module"] -#[doc(alias = "MASKDSTTRAN")] -pub type Maskdsttran = crate::Reg; +pub type MASKDSTTRAN = crate::Reg; #[doc = "Mask for Raw IntBlock Status"] pub mod maskdsttran; #[doc = "MASKERR (rw) register accessor: Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@maskerr`] module"] -#[doc(alias = "MASKERR")] -pub type Maskerr = crate::Reg; +pub type MASKERR = crate::Reg; #[doc = "Mask for Raw IntErr Status"] pub mod maskerr; #[doc = "CLEARTFR (w) register accessor: IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleartfr`] module"] -#[doc(alias = "CLEARTFR")] -pub type Cleartfr = crate::Reg; +pub type CLEARTFR = crate::Reg; #[doc = "IntTfr Status"] pub mod cleartfr; #[doc = "CLEARBLOCK (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearblock`] module"] -#[doc(alias = "CLEARBLOCK")] -pub type Clearblock = crate::Reg; +pub type CLEARBLOCK = crate::Reg; #[doc = "IntBlock Status"] pub mod clearblock; #[doc = "CLEARSRCTRAN (w) register accessor: IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearsrctran`] module"] -#[doc(alias = "CLEARSRCTRAN")] -pub type Clearsrctran = crate::Reg; +pub type CLEARSRCTRAN = crate::Reg; #[doc = "IntSrcTran Status"] pub mod clearsrctran; #[doc = "CLEARDSTTRAN (w) register accessor: IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cleardsttran`] module"] -#[doc(alias = "CLEARDSTTRAN")] -pub type Cleardsttran = crate::Reg; +pub type CLEARDSTTRAN = crate::Reg; #[doc = "IntBlock Status"] pub mod cleardsttran; #[doc = "CLEARERR (w) register accessor: IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clearerr`] module"] -#[doc(alias = "CLEARERR")] -pub type Clearerr = crate::Reg; +pub type CLEARERR = crate::Reg; #[doc = "IntErr Status"] pub mod clearerr; #[doc = "STATUSINT (r) register accessor: Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusint`] module"] -#[doc(alias = "STATUSINT")] -pub type Statusint = crate::Reg; +pub type STATUSINT = crate::Reg; #[doc = "Combined Interrupt Status Register"] pub mod statusint; #[doc = "REQSRCREG (rw) register accessor: Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqsrcreg`] module"] -#[doc(alias = "REQSRCREG")] -pub type Reqsrcreg = crate::Reg; +pub type REQSRCREG = crate::Reg; #[doc = "Source Software Transaction Request Register"] pub mod reqsrcreg; #[doc = "REQDSTREG (rw) register accessor: Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reqdstreg`] module"] -#[doc(alias = "REQDSTREG")] -pub type Reqdstreg = crate::Reg; +pub type REQDSTREG = crate::Reg; #[doc = "Destination Software Transaction Request Register"] pub mod reqdstreg; #[doc = "SGLREQSRCREG (rw) register accessor: Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqsrcreg`] module"] -#[doc(alias = "SGLREQSRCREG")] -pub type Sglreqsrcreg = crate::Reg; +pub type SGLREQSRCREG = crate::Reg; #[doc = "Single Source Transaction Request Register"] pub mod sglreqsrcreg; #[doc = "SGLREQDSTREG (rw) register accessor: Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sglreqdstreg`] module"] -#[doc(alias = "SGLREQDSTREG")] -pub type Sglreqdstreg = crate::Reg; +pub type SGLREQDSTREG = crate::Reg; #[doc = "Single Destination Transaction Request Register"] pub mod sglreqdstreg; #[doc = "LSTSRCREG (rw) register accessor: Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstsrcreg`] module"] -#[doc(alias = "LSTSRCREG")] -pub type Lstsrcreg = crate::Reg; +pub type LSTSRCREG = crate::Reg; #[doc = "Last Source Transaction Request Register"] pub mod lstsrcreg; #[doc = "LSTDSTREG (rw) register accessor: Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lstdstreg`] module"] -#[doc(alias = "LSTDSTREG")] -pub type Lstdstreg = crate::Reg; +pub type LSTDSTREG = crate::Reg; #[doc = "Last Destination Transaction Request Register"] pub mod lstdstreg; #[doc = "DMACFGREG (rw) register accessor: GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmacfgreg`] module"] -#[doc(alias = "DMACFGREG")] -pub type Dmacfgreg = crate::Reg; +pub type DMACFGREG = crate::Reg; #[doc = "GPDMA Configuration Register"] pub mod dmacfgreg; #[doc = "CHENREG (rw) register accessor: GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chenreg`] module"] -#[doc(alias = "CHENREG")] -pub type Chenreg = crate::Reg; +pub type CHENREG = crate::Reg; #[doc = "GPDMA Channel Enable Register"] pub mod chenreg; #[doc = "ID (r) register accessor: GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "GPDMA0 ID Register"] pub mod id; #[doc = "TYPE (r) register accessor: GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@type_`] module"] -#[doc(alias = "TYPE")] -pub type Type = crate::Reg; +pub type TYPE = crate::Reg; #[doc = "GPDMA Component Type"] pub mod type_; #[doc = "VERSION (r) register accessor: DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"] -#[doc(alias = "VERSION")] -pub type Version = crate::Reg; +pub type VERSION = crate::Reg; #[doc = "DMA Component Version"] pub mod version; diff --git a/src/gpdma0/chenreg.rs b/src/gpdma0/chenreg.rs index eb5b3702..5e16fec3 100644 --- a/src/gpdma0/chenreg.rs +++ b/src/gpdma0/chenreg.rs @@ -1,52 +1,52 @@ #[doc = "Register `CHENREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHENREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enables/Disables the channel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ch { +pub enum CH_A { #[doc = "0: Disable the Channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable the Channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ch) -> Self { + fn from(variant: CH_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ch { +impl crate::FieldSpec for CH_A { type Ux = u8; } -impl crate::IsEnum for Ch {} +impl crate::IsEnum for CH_A {} #[doc = "Field `CH` reader - Enables/Disables the channel"] -pub type ChR = crate::FieldReader; -impl ChR { +pub type CH_R = crate::FieldReader; +impl CH_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Ch::Value1), - 1 => Some(Ch::Value2), + 0 => Some(CH_A::VALUE1), + 1 => Some(CH_A::VALUE2), _ => None, } } #[doc = "Disable the Channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch::Value1 + *self == CH_A::VALUE1 } #[doc = "Enable the Channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch::Value2 + *self == CH_A::VALUE2 } } #[doc = "Field `CH` writer - Enables/Disables the channel"] -pub type ChW<'a, REG> = crate::FieldWriter<'a, REG, 8, Ch>; -impl<'a, REG> ChW<'a, REG> +pub type CH_W<'a, REG> = crate::FieldWriter<'a, REG, 8, CH_A>; +impl<'a, REG> CH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,51 +54,51 @@ where #[doc = "Disable the Channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch::Value1) + self.variant(CH_A::VALUE1) } #[doc = "Enable the Channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch::Value2) + self.variant(CH_A::VALUE2) } } #[doc = "Field `WE_CH` writer - Channel enable write enable"] -pub type WeChW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type WE_CH_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Enables/Disables the channel"] #[inline(always)] - pub fn ch(&self) -> ChR { - ChR::new((self.bits & 0xff) as u8) + pub fn ch(&self) -> CH_R { + CH_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Enables/Disables the channel"] #[inline(always)] #[must_use] - pub fn ch(&mut self) -> ChW { - ChW::new(self, 0) + pub fn ch(&mut self) -> CH_W { + CH_W::new(self, 0) } #[doc = "Bits 8:15 - Channel enable write enable"] #[inline(always)] #[must_use] - pub fn we_ch(&mut self) -> WeChW { - WeChW::new(self, 8) + pub fn we_ch(&mut self) -> WE_CH_W { + WE_CH_W::new(self, 8) } } #[doc = "GPDMA Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chenreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chenreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ChenregSpec; -impl crate::RegisterSpec for ChenregSpec { +pub struct CHENREG_SPEC; +impl crate::RegisterSpec for CHENREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`chenreg::R`](R) reader structure"] -impl crate::Readable for ChenregSpec {} +impl crate::Readable for CHENREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`chenreg::W`](W) writer structure"] -impl crate::Writable for ChenregSpec { +impl crate::Writable for CHENREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHENREG to value 0"] -impl crate::Resettable for ChenregSpec { +impl crate::Resettable for CHENREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearblock.rs b/src/gpdma0/clearblock.rs index 666404d1..0a4b3551 100644 --- a/src/gpdma0/clearblock.rs +++ b/src/gpdma0/clearblock.rs @@ -1,315 +1,315 @@ #[doc = "Register `CLEARBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearblock::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClearblockSpec; -impl crate::RegisterSpec for ClearblockSpec { +pub struct CLEARBLOCK_SPEC; +impl crate::RegisterSpec for CLEARBLOCK_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearblock::W`](W) writer structure"] -impl crate::Writable for ClearblockSpec { +impl crate::Writable for CLEARBLOCK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARBLOCK to value 0"] -impl crate::Resettable for ClearblockSpec { +impl crate::Resettable for CLEARBLOCK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/cleardsttran.rs b/src/gpdma0/cleardsttran.rs index e3a28b59..6bca8185 100644 --- a/src/gpdma0/cleardsttran.rs +++ b/src/gpdma0/cleardsttran.rs @@ -1,315 +1,315 @@ #[doc = "Register `CLEARDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "IntBlock Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleardsttran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CleardsttranSpec; -impl crate::RegisterSpec for CleardsttranSpec { +pub struct CLEARDSTTRAN_SPEC; +impl crate::RegisterSpec for CLEARDSTTRAN_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleardsttran::W`](W) writer structure"] -impl crate::Writable for CleardsttranSpec { +impl crate::Writable for CLEARDSTTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARDSTTRAN to value 0"] -impl crate::Resettable for CleardsttranSpec { +impl crate::Resettable for CLEARDSTTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearerr.rs b/src/gpdma0/clearerr.rs index 50120fac..db8fdc35 100644 --- a/src/gpdma0/clearerr.rs +++ b/src/gpdma0/clearerr.rs @@ -1,315 +1,315 @@ #[doc = "Register `CLEARERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "IntErr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearerr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClearerrSpec; -impl crate::RegisterSpec for ClearerrSpec { +pub struct CLEARERR_SPEC; +impl crate::RegisterSpec for CLEARERR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearerr::W`](W) writer structure"] -impl crate::Writable for ClearerrSpec { +impl crate::Writable for CLEARERR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARERR to value 0"] -impl crate::Resettable for ClearerrSpec { +impl crate::Resettable for CLEARERR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/clearsrctran.rs b/src/gpdma0/clearsrctran.rs index 0f9dfd0c..b3cc9614 100644 --- a/src/gpdma0/clearsrctran.rs +++ b/src/gpdma0/clearsrctran.rs @@ -1,315 +1,315 @@ #[doc = "Register `CLEARSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "IntSrcTran Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clearsrctran::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClearsrctranSpec; -impl crate::RegisterSpec for ClearsrctranSpec { +pub struct CLEARSRCTRAN_SPEC; +impl crate::RegisterSpec for CLEARSRCTRAN_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clearsrctran::W`](W) writer structure"] -impl crate::Writable for ClearsrctranSpec { +impl crate::Writable for CLEARSRCTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARSRCTRAN to value 0"] -impl crate::Resettable for ClearsrctranSpec { +impl crate::Resettable for CLEARSRCTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/cleartfr.rs b/src/gpdma0/cleartfr.rs index 5bcb63d3..b02edf6c 100644 --- a/src/gpdma0/cleartfr.rs +++ b/src/gpdma0/cleartfr.rs @@ -1,315 +1,315 @@ #[doc = "Register `CLEARTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Interrupt Status and Raw Status for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` writer - Clear Interrupt Status and Raw Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` writer - Clear Interrupt Status and Raw Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` writer - Clear Interrupt Status and Raw Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` writer - Clear Interrupt Status and Raw Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` writer - Clear Interrupt Status and Raw Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` writer - Clear Interrupt Status and Raw Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` writer - Clear Interrupt Status and Raw Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Clear Interrupt Status and Raw Status for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: clear status"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` writer - Clear Interrupt Status and Raw Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "clear status"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "IntTfr Status\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cleartfr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CleartfrSpec; -impl crate::RegisterSpec for CleartfrSpec { +pub struct CLEARTFR_SPEC; +impl crate::RegisterSpec for CLEARTFR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cleartfr::W`](W) writer structure"] -impl crate::Writable for CleartfrSpec { +impl crate::Writable for CLEARTFR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLEARTFR to value 0"] -impl crate::Resettable for CleartfrSpec { +impl crate::Resettable for CLEARTFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/dmacfgreg.rs b/src/gpdma0/dmacfgreg.rs index 18085a8a..f3f2f1ec 100644 --- a/src/gpdma0/dmacfgreg.rs +++ b/src/gpdma0/dmacfgreg.rs @@ -1,89 +1,89 @@ #[doc = "Register `DMACFGREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DMACFGREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "GPDMA Enable bit.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DmaEn { +pub enum DMA_EN_A { #[doc = "0: GPDMA Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: GPDMA Enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DmaEn) -> Self { + fn from(variant: DMA_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA_EN` reader - GPDMA Enable bit."] -pub type DmaEnR = crate::BitReader; -impl DmaEnR { +pub type DMA_EN_R = crate::BitReader; +impl DMA_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DmaEn { + pub const fn variant(&self) -> DMA_EN_A { match self.bits { - false => DmaEn::Value1, - true => DmaEn::Value2, + false => DMA_EN_A::VALUE1, + true => DMA_EN_A::VALUE2, } } #[doc = "GPDMA Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DmaEn::Value1 + *self == DMA_EN_A::VALUE1 } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DmaEn::Value2 + *self == DMA_EN_A::VALUE2 } } #[doc = "Field `DMA_EN` writer - GPDMA Enable bit."] -pub type DmaEnW<'a, REG> = crate::BitWriter<'a, REG, DmaEn>; -impl<'a, REG> DmaEnW<'a, REG> +pub type DMA_EN_W<'a, REG> = crate::BitWriter<'a, REG, DMA_EN_A>; +impl<'a, REG> DMA_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "GPDMA Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DmaEn::Value1) + self.variant(DMA_EN_A::VALUE1) } #[doc = "GPDMA Enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DmaEn::Value2) + self.variant(DMA_EN_A::VALUE2) } } impl R { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] - pub fn dma_en(&self) -> DmaEnR { - DmaEnR::new((self.bits & 1) != 0) + pub fn dma_en(&self) -> DMA_EN_R { + DMA_EN_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] #[must_use] - pub fn dma_en(&mut self) -> DmaEnW { - DmaEnW::new(self, 0) + pub fn dma_en(&mut self) -> DMA_EN_W { + DMA_EN_W::new(self, 0) } } #[doc = "GPDMA Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmacfgreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmacfgreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DmacfgregSpec; -impl crate::RegisterSpec for DmacfgregSpec { +pub struct DMACFGREG_SPEC; +impl crate::RegisterSpec for DMACFGREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dmacfgreg::R`](R) reader structure"] -impl crate::Readable for DmacfgregSpec {} +impl crate::Readable for DMACFGREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`dmacfgreg::W`](W) writer structure"] -impl crate::Writable for DmacfgregSpec { +impl crate::Writable for DMACFGREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DMACFGREG to value 0"] -impl crate::Resettable for DmacfgregSpec { +impl crate::Resettable for DMACFGREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/id.rs b/src/gpdma0/id.rs index adb8f451..489c2fcb 100644 --- a/src/gpdma0/id.rs +++ b/src/gpdma0/id.rs @@ -1,22 +1,22 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Hardcoded GPDMA Peripheral ID"] -pub type ValueR = crate::FieldReader; +pub type VALUE_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Hardcoded GPDMA Peripheral ID"] #[inline(always)] - pub fn value(&self) -> ValueR { - ValueR::new(self.bits) + pub fn value(&self) -> VALUE_R { + VALUE_R::new(self.bits) } } #[doc = "GPDMA0 ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00af_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00af_c000; } diff --git a/src/gpdma0/lstdstreg.rs b/src/gpdma0/lstdstreg.rs index e9ed2ff2..ac8bc165 100644 --- a/src/gpdma0/lstdstreg.rs +++ b/src/gpdma0/lstdstreg.rs @@ -1,833 +1,833 @@ #[doc = "Register `LSTDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Destination last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Destination last request for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Destination last request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Destination last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Destination last request for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Destination last request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Destination last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Destination last request for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Destination last request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Destination last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Destination last request for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Destination last request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Destination last request for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Destination last request for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Destination last request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Destination last request for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Destination last request for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Destination last request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Destination last request for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Destination last request for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Destination last request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Destination last request for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Destination last request for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Destination last request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Destination last transaction request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Destination last transaction request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Destination last transaction request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Destination last transaction request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Destination last transaction request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Destination last transaction request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Destination last transaction request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Destination last transaction request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Destination last transaction request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Destination last request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Destination last request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Destination last request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Destination last request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Destination last request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Destination last request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Destination last request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Destination last request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Destination last transaction request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Destination last transaction request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Destination last transaction request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Destination last transaction request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Last Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LstdstregSpec; -impl crate::RegisterSpec for LstdstregSpec { +pub struct LSTDSTREG_SPEC; +impl crate::RegisterSpec for LSTDSTREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lstdstreg::R`](R) reader structure"] -impl crate::Readable for LstdstregSpec {} +impl crate::Readable for LSTDSTREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`lstdstreg::W`](W) writer structure"] -impl crate::Writable for LstdstregSpec { +impl crate::Writable for LSTDSTREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTDSTREG to value 0"] -impl crate::Resettable for LstdstregSpec { +impl crate::Resettable for LSTDSTREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/lstsrcreg.rs b/src/gpdma0/lstsrcreg.rs index 20baa62c..a0b62124 100644 --- a/src/gpdma0/lstsrcreg.rs +++ b/src/gpdma0/lstsrcreg.rs @@ -1,833 +1,833 @@ #[doc = "Register `LSTSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LSTSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source last request for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Source last request for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Source last request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Source last request for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Source last request for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Source last request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Source last request for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Source last request for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Source last request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Source last request for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Source last request for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Source last request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Source last request for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Source last request for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Source last request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Source last request for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Source last request for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Source last request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Source last request for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Source last request for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Source last request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Source last request for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: Not last transaction in current block"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Last transaction in current block"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Source last request for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "Not last transaction in current block"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "Last transaction in current block"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Source last request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not last transaction in current block"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "Last transaction in current block"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source last transaction request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source last transaction request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source last transaction request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source last transaction request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source last transaction request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source last transaction request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source last transaction request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Source last transaction request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source last transaction request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source last request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source last request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source last request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source last request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Source last request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Source last request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Source last request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Source last request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Source last transaction request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source last transaction request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source last transaction request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source last transaction request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source last transaction request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source last transaction request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source last transaction request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source last transaction request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Last Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lstsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lstsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LstsrcregSpec; -impl crate::RegisterSpec for LstsrcregSpec { +pub struct LSTSRCREG_SPEC; +impl crate::RegisterSpec for LSTSRCREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lstsrcreg::R`](R) reader structure"] -impl crate::Readable for LstsrcregSpec {} +impl crate::Readable for LSTSRCREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`lstsrcreg::W`](W) writer structure"] -impl crate::Writable for LstsrcregSpec { +impl crate::Writable for LSTSRCREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LSTSRCREG to value 0"] -impl crate::Resettable for LstsrcregSpec { +impl crate::Resettable for LSTSRCREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskblock.rs b/src/gpdma0/maskblock.rs index 241e92e9..f1a8d4bb 100644 --- a/src/gpdma0/maskblock.rs +++ b/src/gpdma0/maskblock.rs @@ -1,833 +1,833 @@ #[doc = "Register `MASKBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MaskblockSpec; -impl crate::RegisterSpec for MaskblockSpec { +pub struct MASKBLOCK_SPEC; +impl crate::RegisterSpec for MASKBLOCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`maskblock::R`](R) reader structure"] -impl crate::Readable for MaskblockSpec {} +impl crate::Readable for MASKBLOCK_SPEC {} #[doc = "`write(|w| ..)` method takes [`maskblock::W`](W) writer structure"] -impl crate::Writable for MaskblockSpec { +impl crate::Writable for MASKBLOCK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKBLOCK to value 0"] -impl crate::Resettable for MaskblockSpec { +impl crate::Resettable for MASKBLOCK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskdsttran.rs b/src/gpdma0/maskdsttran.rs index 6cfb3530..46970271 100644 --- a/src/gpdma0/maskdsttran.rs +++ b/src/gpdma0/maskdsttran.rs @@ -1,833 +1,833 @@ #[doc = "Register `MASKDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Mask for Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MaskdsttranSpec; -impl crate::RegisterSpec for MaskdsttranSpec { +pub struct MASKDSTTRAN_SPEC; +impl crate::RegisterSpec for MASKDSTTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`maskdsttran::R`](R) reader structure"] -impl crate::Readable for MaskdsttranSpec {} +impl crate::Readable for MASKDSTTRAN_SPEC {} #[doc = "`write(|w| ..)` method takes [`maskdsttran::W`](W) writer structure"] -impl crate::Writable for MaskdsttranSpec { +impl crate::Writable for MASKDSTTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKDSTTRAN to value 0"] -impl crate::Resettable for MaskdsttranSpec { +impl crate::Resettable for MASKDSTTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/maskerr.rs b/src/gpdma0/maskerr.rs index 0ba98006..28ceec02 100644 --- a/src/gpdma0/maskerr.rs +++ b/src/gpdma0/maskerr.rs @@ -1,833 +1,833 @@ #[doc = "Register `MASKERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Mask for Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`maskerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`maskerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MaskerrSpec; -impl crate::RegisterSpec for MaskerrSpec { +pub struct MASKERR_SPEC; +impl crate::RegisterSpec for MASKERR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`maskerr::R`](R) reader structure"] -impl crate::Readable for MaskerrSpec {} +impl crate::Readable for MASKERR_SPEC {} #[doc = "`write(|w| ..)` method takes [`maskerr::W`](W) writer structure"] -impl crate::Writable for MaskerrSpec { +impl crate::Writable for MASKERR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKERR to value 0"] -impl crate::Resettable for MaskerrSpec { +impl crate::Resettable for MASKERR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/masksrctran.rs b/src/gpdma0/masksrctran.rs index a8e7ef37..9e4a8c01 100644 --- a/src/gpdma0/masksrctran.rs +++ b/src/gpdma0/masksrctran.rs @@ -1,833 +1,833 @@ #[doc = "Register `MASKSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Mask for Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masksrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masksrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MasksrctranSpec; -impl crate::RegisterSpec for MasksrctranSpec { +pub struct MASKSRCTRAN_SPEC; +impl crate::RegisterSpec for MASKSRCTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`masksrctran::R`](R) reader structure"] -impl crate::Readable for MasksrctranSpec {} +impl crate::Readable for MASKSRCTRAN_SPEC {} #[doc = "`write(|w| ..)` method takes [`masksrctran::W`](W) writer structure"] -impl crate::Writable for MasksrctranSpec { +impl crate::Writable for MASKSRCTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKSRCTRAN to value 0"] -impl crate::Resettable for MasksrctranSpec { +impl crate::Resettable for MASKSRCTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/masktfr.rs b/src/gpdma0/masktfr.rs index c5c3f920..a914cec9 100644 --- a/src/gpdma0/masktfr.rs +++ b/src/gpdma0/masktfr.rs @@ -1,833 +1,833 @@ #[doc = "Register `MASKTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MASKTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mask bit for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch0 { +pub enum CH0_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch0) -> Self { + fn from(variant: CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH0` reader - Mask bit for channel 0"] -pub type Ch0R = crate::BitReader; -impl Ch0R { +pub type CH0_R = crate::BitReader; +impl CH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch0 { + pub const fn variant(&self) -> CH0_A { match self.bits { - false => Ch0::Value1, - true => Ch0::Value2, + false => CH0_A::VALUE1, + true => CH0_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch0::Value1 + *self == CH0_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch0::Value2 + *self == CH0_A::VALUE2 } } #[doc = "Field `CH0` writer - Mask bit for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG, Ch0>; -impl<'a, REG> Ch0W<'a, REG> +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG, CH0_A>; +impl<'a, REG> CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch0::Value1) + self.variant(CH0_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch0::Value2) + self.variant(CH0_A::VALUE2) } } #[doc = "Mask bit for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch1 { +pub enum CH1_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch1) -> Self { + fn from(variant: CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1` reader - Mask bit for channel 1"] -pub type Ch1R = crate::BitReader; -impl Ch1R { +pub type CH1_R = crate::BitReader; +impl CH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch1 { + pub const fn variant(&self) -> CH1_A { match self.bits { - false => Ch1::Value1, - true => Ch1::Value2, + false => CH1_A::VALUE1, + true => CH1_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch1::Value1 + *self == CH1_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch1::Value2 + *self == CH1_A::VALUE2 } } #[doc = "Field `CH1` writer - Mask bit for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG, Ch1>; -impl<'a, REG> Ch1W<'a, REG> +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG, CH1_A>; +impl<'a, REG> CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch1::Value1) + self.variant(CH1_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch1::Value2) + self.variant(CH1_A::VALUE2) } } #[doc = "Mask bit for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch2 { +pub enum CH2_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch2) -> Self { + fn from(variant: CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH2` reader - Mask bit for channel 2"] -pub type Ch2R = crate::BitReader; -impl Ch2R { +pub type CH2_R = crate::BitReader; +impl CH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch2 { + pub const fn variant(&self) -> CH2_A { match self.bits { - false => Ch2::Value1, - true => Ch2::Value2, + false => CH2_A::VALUE1, + true => CH2_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch2::Value1 + *self == CH2_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch2::Value2 + *self == CH2_A::VALUE2 } } #[doc = "Field `CH2` writer - Mask bit for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG, Ch2>; -impl<'a, REG> Ch2W<'a, REG> +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG, CH2_A>; +impl<'a, REG> CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch2::Value1) + self.variant(CH2_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch2::Value2) + self.variant(CH2_A::VALUE2) } } #[doc = "Mask bit for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch3 { +pub enum CH3_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch3) -> Self { + fn from(variant: CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH3` reader - Mask bit for channel 3"] -pub type Ch3R = crate::BitReader; -impl Ch3R { +pub type CH3_R = crate::BitReader; +impl CH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch3 { + pub const fn variant(&self) -> CH3_A { match self.bits { - false => Ch3::Value1, - true => Ch3::Value2, + false => CH3_A::VALUE1, + true => CH3_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch3::Value1 + *self == CH3_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch3::Value2 + *self == CH3_A::VALUE2 } } #[doc = "Field `CH3` writer - Mask bit for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG, Ch3>; -impl<'a, REG> Ch3W<'a, REG> +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG, CH3_A>; +impl<'a, REG> CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch3::Value1) + self.variant(CH3_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch3::Value2) + self.variant(CH3_A::VALUE2) } } #[doc = "Mask bit for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch4 { +pub enum CH4_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch4) -> Self { + fn from(variant: CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH4` reader - Mask bit for channel 4"] -pub type Ch4R = crate::BitReader; -impl Ch4R { +pub type CH4_R = crate::BitReader; +impl CH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch4 { + pub const fn variant(&self) -> CH4_A { match self.bits { - false => Ch4::Value1, - true => Ch4::Value2, + false => CH4_A::VALUE1, + true => CH4_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch4::Value1 + *self == CH4_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch4::Value2 + *self == CH4_A::VALUE2 } } #[doc = "Field `CH4` writer - Mask bit for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG, Ch4>; -impl<'a, REG> Ch4W<'a, REG> +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG, CH4_A>; +impl<'a, REG> CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch4::Value1) + self.variant(CH4_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch4::Value2) + self.variant(CH4_A::VALUE2) } } #[doc = "Mask bit for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch5 { +pub enum CH5_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch5) -> Self { + fn from(variant: CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH5` reader - Mask bit for channel 5"] -pub type Ch5R = crate::BitReader; -impl Ch5R { +pub type CH5_R = crate::BitReader; +impl CH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch5 { + pub const fn variant(&self) -> CH5_A { match self.bits { - false => Ch5::Value1, - true => Ch5::Value2, + false => CH5_A::VALUE1, + true => CH5_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch5::Value1 + *self == CH5_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch5::Value2 + *self == CH5_A::VALUE2 } } #[doc = "Field `CH5` writer - Mask bit for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG, Ch5>; -impl<'a, REG> Ch5W<'a, REG> +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG, CH5_A>; +impl<'a, REG> CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch5::Value1) + self.variant(CH5_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch5::Value2) + self.variant(CH5_A::VALUE2) } } #[doc = "Mask bit for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch6 { +pub enum CH6_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch6) -> Self { + fn from(variant: CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH6` reader - Mask bit for channel 6"] -pub type Ch6R = crate::BitReader; -impl Ch6R { +pub type CH6_R = crate::BitReader; +impl CH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch6 { + pub const fn variant(&self) -> CH6_A { match self.bits { - false => Ch6::Value1, - true => Ch6::Value2, + false => CH6_A::VALUE1, + true => CH6_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch6::Value1 + *self == CH6_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch6::Value2 + *self == CH6_A::VALUE2 } } #[doc = "Field `CH6` writer - Mask bit for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG, Ch6>; -impl<'a, REG> Ch6W<'a, REG> +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG, CH6_A>; +impl<'a, REG> CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch6::Value1) + self.variant(CH6_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch6::Value2) + self.variant(CH6_A::VALUE2) } } #[doc = "Mask bit for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ch7 { +pub enum CH7_A { #[doc = "0: masked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unmasked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ch7) -> Self { + fn from(variant: CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH7` reader - Mask bit for channel 7"] -pub type Ch7R = crate::BitReader; -impl Ch7R { +pub type CH7_R = crate::BitReader; +impl CH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ch7 { + pub const fn variant(&self) -> CH7_A { match self.bits { - false => Ch7::Value1, - true => Ch7::Value2, + false => CH7_A::VALUE1, + true => CH7_A::VALUE2, } } #[doc = "masked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ch7::Value1 + *self == CH7_A::VALUE1 } #[doc = "unmasked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ch7::Value2 + *self == CH7_A::VALUE2 } } #[doc = "Field `CH7` writer - Mask bit for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG, Ch7>; -impl<'a, REG> Ch7W<'a, REG> +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG, CH7_A>; +impl<'a, REG> CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "masked"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ch7::Value1) + self.variant(CH7_A::VALUE1) } #[doc = "unmasked"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ch7::Value2) + self.variant(CH7_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Write enable for mask bit of channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Write enable for mask bit of channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Write enable for mask bit of channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Write enable for mask bit of channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Write enable for mask bit of channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Write enable for mask bit of channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Write enable for mask bit of channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Write enable for mask bit of channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Write enable for mask bit of channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Mask for Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`masktfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`masktfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MasktfrSpec; -impl crate::RegisterSpec for MasktfrSpec { +pub struct MASKTFR_SPEC; +impl crate::RegisterSpec for MASKTFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`masktfr::R`](R) reader structure"] -impl crate::Readable for MasktfrSpec {} +impl crate::Readable for MASKTFR_SPEC {} #[doc = "`write(|w| ..)` method takes [`masktfr::W`](W) writer structure"] -impl crate::Writable for MasktfrSpec { +impl crate::Writable for MASKTFR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MASKTFR to value 0"] -impl crate::Resettable for MasktfrSpec { +impl crate::Resettable for MASKTFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawblock.rs b/src/gpdma0/rawblock.rs index c0947a48..d15fb003 100644 --- a/src/gpdma0/rawblock.rs +++ b/src/gpdma0/rawblock.rs @@ -1,145 +1,145 @@ #[doc = "Register `RAWBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWBLOCK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawblock::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawblock::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawblockSpec; -impl crate::RegisterSpec for RawblockSpec { +pub struct RAWBLOCK_SPEC; +impl crate::RegisterSpec for RAWBLOCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawblock::R`](R) reader structure"] -impl crate::Readable for RawblockSpec {} +impl crate::Readable for RAWBLOCK_SPEC {} #[doc = "`write(|w| ..)` method takes [`rawblock::W`](W) writer structure"] -impl crate::Writable for RawblockSpec { +impl crate::Writable for RAWBLOCK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWBLOCK to value 0"] -impl crate::Resettable for RawblockSpec { +impl crate::Resettable for RAWBLOCK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawdsttran.rs b/src/gpdma0/rawdsttran.rs index d75ff89a..49acaece 100644 --- a/src/gpdma0/rawdsttran.rs +++ b/src/gpdma0/rawdsttran.rs @@ -1,145 +1,145 @@ #[doc = "Register `RAWDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWDSTTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "Raw IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawdsttran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawdsttran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawdsttranSpec; -impl crate::RegisterSpec for RawdsttranSpec { +pub struct RAWDSTTRAN_SPEC; +impl crate::RegisterSpec for RAWDSTTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawdsttran::R`](R) reader structure"] -impl crate::Readable for RawdsttranSpec {} +impl crate::Readable for RAWDSTTRAN_SPEC {} #[doc = "`write(|w| ..)` method takes [`rawdsttran::W`](W) writer structure"] -impl crate::Writable for RawdsttranSpec { +impl crate::Writable for RAWDSTTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWDSTTRAN to value 0"] -impl crate::Resettable for RawdsttranSpec { +impl crate::Resettable for RAWDSTTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawerr.rs b/src/gpdma0/rawerr.rs index 334c0e7b..8b388a24 100644 --- a/src/gpdma0/rawerr.rs +++ b/src/gpdma0/rawerr.rs @@ -1,145 +1,145 @@ #[doc = "Register `RAWERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWERR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "Raw IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawerr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawerr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawerrSpec; -impl crate::RegisterSpec for RawerrSpec { +pub struct RAWERR_SPEC; +impl crate::RegisterSpec for RAWERR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawerr::R`](R) reader structure"] -impl crate::Readable for RawerrSpec {} +impl crate::Readable for RAWERR_SPEC {} #[doc = "`write(|w| ..)` method takes [`rawerr::W`](W) writer structure"] -impl crate::Writable for RawerrSpec { +impl crate::Writable for RAWERR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWERR to value 0"] -impl crate::Resettable for RawerrSpec { +impl crate::Resettable for RAWERR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawsrctran.rs b/src/gpdma0/rawsrctran.rs index 7691e0e1..d7538a68 100644 --- a/src/gpdma0/rawsrctran.rs +++ b/src/gpdma0/rawsrctran.rs @@ -1,145 +1,145 @@ #[doc = "Register `RAWSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWSRCTRAN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "Raw IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawsrctran::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawsrctran::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawsrctranSpec; -impl crate::RegisterSpec for RawsrctranSpec { +pub struct RAWSRCTRAN_SPEC; +impl crate::RegisterSpec for RAWSRCTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawsrctran::R`](R) reader structure"] -impl crate::Readable for RawsrctranSpec {} +impl crate::Readable for RAWSRCTRAN_SPEC {} #[doc = "`write(|w| ..)` method takes [`rawsrctran::W`](W) writer structure"] -impl crate::Writable for RawsrctranSpec { +impl crate::Writable for RAWSRCTRAN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWSRCTRAN to value 0"] -impl crate::Resettable for RawsrctranSpec { +impl crate::Resettable for RAWSRCTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/rawtfr.rs b/src/gpdma0/rawtfr.rs index ac409458..9ff0d37a 100644 --- a/src/gpdma0/rawtfr.rs +++ b/src/gpdma0/rawtfr.rs @@ -1,145 +1,145 @@ #[doc = "Register `RAWTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RAWTFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Raw Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Raw Interrupt Status for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Raw Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Raw Interrupt Status for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Raw Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Raw Interrupt Status for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Raw Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Raw Interrupt Status for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Raw Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Raw Interrupt Status for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Raw Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Raw Interrupt Status for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Raw Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Raw Interrupt Status for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Raw Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Raw Interrupt Status for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } } #[doc = "Raw IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawtfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rawtfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawtfrSpec; -impl crate::RegisterSpec for RawtfrSpec { +pub struct RAWTFR_SPEC; +impl crate::RegisterSpec for RAWTFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawtfr::R`](R) reader structure"] -impl crate::Readable for RawtfrSpec {} +impl crate::Readable for RAWTFR_SPEC {} #[doc = "`write(|w| ..)` method takes [`rawtfr::W`](W) writer structure"] -impl crate::Writable for RawtfrSpec { +impl crate::Writable for RAWTFR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RAWTFR to value 0"] -impl crate::Resettable for RawtfrSpec { +impl crate::Resettable for RAWTFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/reqdstreg.rs b/src/gpdma0/reqdstreg.rs index b2c31957..4f619abd 100644 --- a/src/gpdma0/reqdstreg.rs +++ b/src/gpdma0/reqdstreg.rs @@ -1,441 +1,441 @@ #[doc = "Register `REQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Destination Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ReqdstregSpec; -impl crate::RegisterSpec for ReqdstregSpec { +pub struct REQDSTREG_SPEC; +impl crate::RegisterSpec for REQDSTREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`reqdstreg::R`](R) reader structure"] -impl crate::Readable for ReqdstregSpec {} +impl crate::Readable for REQDSTREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`reqdstreg::W`](W) writer structure"] -impl crate::Writable for ReqdstregSpec { +impl crate::Writable for REQDSTREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQDSTREG to value 0"] -impl crate::Resettable for ReqdstregSpec { +impl crate::Resettable for REQDSTREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/reqsrcreg.rs b/src/gpdma0/reqsrcreg.rs index 9d66ef8b..89299815 100644 --- a/src/gpdma0/reqsrcreg.rs +++ b/src/gpdma0/reqsrcreg.rs @@ -1,441 +1,441 @@ #[doc = "Register `REQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Source Software Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ReqsrcregSpec; -impl crate::RegisterSpec for ReqsrcregSpec { +pub struct REQSRCREG_SPEC; +impl crate::RegisterSpec for REQSRCREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`reqsrcreg::R`](R) reader structure"] -impl crate::Readable for ReqsrcregSpec {} +impl crate::Readable for REQSRCREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`reqsrcreg::W`](W) writer structure"] -impl crate::Writable for ReqsrcregSpec { +impl crate::Writable for REQSRCREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REQSRCREG to value 0"] -impl crate::Resettable for ReqsrcregSpec { +impl crate::Resettable for REQSRCREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/sglreqdstreg.rs b/src/gpdma0/sglreqdstreg.rs index c46e0148..f25c1c3b 100644 --- a/src/gpdma0/sglreqdstreg.rs +++ b/src/gpdma0/sglreqdstreg.rs @@ -1,441 +1,441 @@ #[doc = "Register `SGLREQDSTREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQDSTREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Single Destination Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqdstreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqdstreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SglreqdstregSpec; -impl crate::RegisterSpec for SglreqdstregSpec { +pub struct SGLREQDSTREG_SPEC; +impl crate::RegisterSpec for SGLREQDSTREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sglreqdstreg::R`](R) reader structure"] -impl crate::Readable for SglreqdstregSpec {} +impl crate::Readable for SGLREQDSTREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`sglreqdstreg::W`](W) writer structure"] -impl crate::Writable for SglreqdstregSpec { +impl crate::Writable for SGLREQDSTREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQDSTREG to value 0"] -impl crate::Resettable for SglreqdstregSpec { +impl crate::Resettable for SGLREQDSTREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/sglreqsrcreg.rs b/src/gpdma0/sglreqsrcreg.rs index 7bc377b2..234c671e 100644 --- a/src/gpdma0/sglreqsrcreg.rs +++ b/src/gpdma0/sglreqsrcreg.rs @@ -1,441 +1,441 @@ #[doc = "Register `SGLREQSRCREG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGLREQSRCREG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH0` reader - Source request for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH0` writer - Source request for channel 0"] -pub type Ch0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH1` reader - Source request for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH1` writer - Source request for channel 1"] -pub type Ch1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH2` reader - Source request for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH2` writer - Source request for channel 2"] -pub type Ch2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH3` reader - Source request for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH3` writer - Source request for channel 3"] -pub type Ch3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH4` reader - Source request for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH4` writer - Source request for channel 4"] -pub type Ch4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH5` reader - Source request for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH5` writer - Source request for channel 5"] -pub type Ch5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH6` reader - Source request for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH6` writer - Source request for channel 6"] -pub type Ch6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CH7` reader - Source request for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; #[doc = "Field `CH7` writer - Source request for channel 7"] -pub type Ch7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Source request write enable for channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh0 { +pub enum WE_CH0_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh0) -> Self { + fn from(variant: WE_CH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH0` writer - Source request write enable for channel 0"] -pub type WeCh0W<'a, REG> = crate::BitWriter<'a, REG, WeCh0>; -impl<'a, REG> WeCh0W<'a, REG> +pub type WE_CH0_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH0_A>; +impl<'a, REG> WE_CH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh0::Value1) + self.variant(WE_CH0_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh0::Value2) + self.variant(WE_CH0_A::VALUE2) } } #[doc = "Source request write enable for channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh1 { +pub enum WE_CH1_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh1) -> Self { + fn from(variant: WE_CH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH1` writer - Source request write enable for channel 1"] -pub type WeCh1W<'a, REG> = crate::BitWriter<'a, REG, WeCh1>; -impl<'a, REG> WeCh1W<'a, REG> +pub type WE_CH1_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH1_A>; +impl<'a, REG> WE_CH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh1::Value1) + self.variant(WE_CH1_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh1::Value2) + self.variant(WE_CH1_A::VALUE2) } } #[doc = "Source request write enable for channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh2 { +pub enum WE_CH2_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh2) -> Self { + fn from(variant: WE_CH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH2` writer - Source request write enable for channel 2"] -pub type WeCh2W<'a, REG> = crate::BitWriter<'a, REG, WeCh2>; -impl<'a, REG> WeCh2W<'a, REG> +pub type WE_CH2_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH2_A>; +impl<'a, REG> WE_CH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh2::Value1) + self.variant(WE_CH2_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh2::Value2) + self.variant(WE_CH2_A::VALUE2) } } #[doc = "Source request write enable for channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh3 { +pub enum WE_CH3_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh3) -> Self { + fn from(variant: WE_CH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH3` writer - Source request write enable for channel 3"] -pub type WeCh3W<'a, REG> = crate::BitWriter<'a, REG, WeCh3>; -impl<'a, REG> WeCh3W<'a, REG> +pub type WE_CH3_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH3_A>; +impl<'a, REG> WE_CH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh3::Value1) + self.variant(WE_CH3_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh3::Value2) + self.variant(WE_CH3_A::VALUE2) } } #[doc = "Source request write enable for channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh4 { +pub enum WE_CH4_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh4) -> Self { + fn from(variant: WE_CH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH4` writer - Source request write enable for channel 4"] -pub type WeCh4W<'a, REG> = crate::BitWriter<'a, REG, WeCh4>; -impl<'a, REG> WeCh4W<'a, REG> +pub type WE_CH4_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH4_A>; +impl<'a, REG> WE_CH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh4::Value1) + self.variant(WE_CH4_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh4::Value2) + self.variant(WE_CH4_A::VALUE2) } } #[doc = "Source request write enable for channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh5 { +pub enum WE_CH5_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh5) -> Self { + fn from(variant: WE_CH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH5` writer - Source request write enable for channel 5"] -pub type WeCh5W<'a, REG> = crate::BitWriter<'a, REG, WeCh5>; -impl<'a, REG> WeCh5W<'a, REG> +pub type WE_CH5_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH5_A>; +impl<'a, REG> WE_CH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh5::Value1) + self.variant(WE_CH5_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh5::Value2) + self.variant(WE_CH5_A::VALUE2) } } #[doc = "Source request write enable for channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh6 { +pub enum WE_CH6_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh6) -> Self { + fn from(variant: WE_CH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH6` writer - Source request write enable for channel 6"] -pub type WeCh6W<'a, REG> = crate::BitWriter<'a, REG, WeCh6>; -impl<'a, REG> WeCh6W<'a, REG> +pub type WE_CH6_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH6_A>; +impl<'a, REG> WE_CH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh6::Value1) + self.variant(WE_CH6_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh6::Value2) + self.variant(WE_CH6_A::VALUE2) } } #[doc = "Source request write enable for channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum WeCh7 { +pub enum WE_CH7_A { #[doc = "0: write disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: WeCh7) -> Self { + fn from(variant: WE_CH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WE_CH7` writer - Source request write enable for channel 7"] -pub type WeCh7W<'a, REG> = crate::BitWriter<'a, REG, WeCh7>; -impl<'a, REG> WeCh7W<'a, REG> +pub type WE_CH7_W<'a, REG> = crate::BitWriter<'a, REG, WE_CH7_A>; +impl<'a, REG> WE_CH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "write disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(WeCh7::Value1) + self.variant(WE_CH7_A::VALUE1) } #[doc = "write enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(WeCh7::Value2) + self.variant(WE_CH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] #[must_use] - pub fn ch0(&mut self) -> Ch0W { - Ch0W::new(self, 0) + pub fn ch0(&mut self) -> CH0_W { + CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] #[must_use] - pub fn ch1(&mut self) -> Ch1W { - Ch1W::new(self, 1) + pub fn ch1(&mut self) -> CH1_W { + CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] #[must_use] - pub fn ch2(&mut self) -> Ch2W { - Ch2W::new(self, 2) + pub fn ch2(&mut self) -> CH2_W { + CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] #[must_use] - pub fn ch3(&mut self) -> Ch3W { - Ch3W::new(self, 3) + pub fn ch3(&mut self) -> CH3_W { + CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] #[must_use] - pub fn ch4(&mut self) -> Ch4W { - Ch4W::new(self, 4) + pub fn ch4(&mut self) -> CH4_W { + CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] #[must_use] - pub fn ch5(&mut self) -> Ch5W { - Ch5W::new(self, 5) + pub fn ch5(&mut self) -> CH5_W { + CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] #[must_use] - pub fn ch6(&mut self) -> Ch6W { - Ch6W::new(self, 6) + pub fn ch6(&mut self) -> CH6_W { + CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] #[must_use] - pub fn ch7(&mut self) -> Ch7W { - Ch7W::new(self, 7) + pub fn ch7(&mut self) -> CH7_W { + CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] #[must_use] - pub fn we_ch0(&mut self) -> WeCh0W { - WeCh0W::new(self, 8) + pub fn we_ch0(&mut self) -> WE_CH0_W { + WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] #[must_use] - pub fn we_ch1(&mut self) -> WeCh1W { - WeCh1W::new(self, 9) + pub fn we_ch1(&mut self) -> WE_CH1_W { + WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] #[must_use] - pub fn we_ch2(&mut self) -> WeCh2W { - WeCh2W::new(self, 10) + pub fn we_ch2(&mut self) -> WE_CH2_W { + WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] #[must_use] - pub fn we_ch3(&mut self) -> WeCh3W { - WeCh3W::new(self, 11) + pub fn we_ch3(&mut self) -> WE_CH3_W { + WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] #[must_use] - pub fn we_ch4(&mut self) -> WeCh4W { - WeCh4W::new(self, 12) + pub fn we_ch4(&mut self) -> WE_CH4_W { + WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] #[must_use] - pub fn we_ch5(&mut self) -> WeCh5W { - WeCh5W::new(self, 13) + pub fn we_ch5(&mut self) -> WE_CH5_W { + WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] #[must_use] - pub fn we_ch6(&mut self) -> WeCh6W { - WeCh6W::new(self, 14) + pub fn we_ch6(&mut self) -> WE_CH6_W { + WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] #[must_use] - pub fn we_ch7(&mut self) -> WeCh7W { - WeCh7W::new(self, 15) + pub fn we_ch7(&mut self) -> WE_CH7_W { + WE_CH7_W::new(self, 15) } } #[doc = "Single Source Transaction Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sglreqsrcreg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sglreqsrcreg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SglreqsrcregSpec; -impl crate::RegisterSpec for SglreqsrcregSpec { +pub struct SGLREQSRCREG_SPEC; +impl crate::RegisterSpec for SGLREQSRCREG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sglreqsrcreg::R`](R) reader structure"] -impl crate::Readable for SglreqsrcregSpec {} +impl crate::Readable for SGLREQSRCREG_SPEC {} #[doc = "`write(|w| ..)` method takes [`sglreqsrcreg::W`](W) writer structure"] -impl crate::Writable for SglreqsrcregSpec { +impl crate::Writable for SGLREQSRCREG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGLREQSRCREG to value 0"] -impl crate::Resettable for SglreqsrcregSpec { +impl crate::Resettable for SGLREQSRCREG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusblock.rs b/src/gpdma0/statusblock.rs index 096403b6..6ee6c7ea 100644 --- a/src/gpdma0/statusblock.rs +++ b/src/gpdma0/statusblock.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSBLOCK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusblock::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatusblockSpec; -impl crate::RegisterSpec for StatusblockSpec { +pub struct STATUSBLOCK_SPEC; +impl crate::RegisterSpec for STATUSBLOCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statusblock::R`](R) reader structure"] -impl crate::Readable for StatusblockSpec {} +impl crate::Readable for STATUSBLOCK_SPEC {} #[doc = "`reset()` method sets STATUSBLOCK to value 0"] -impl crate::Resettable for StatusblockSpec { +impl crate::Resettable for STATUSBLOCK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusdsttran.rs b/src/gpdma0/statusdsttran.rs index 6b09cde7..bb986da7 100644 --- a/src/gpdma0/statusdsttran.rs +++ b/src/gpdma0/statusdsttran.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSDSTTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntBlock Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusdsttran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatusdsttranSpec; -impl crate::RegisterSpec for StatusdsttranSpec { +pub struct STATUSDSTTRAN_SPEC; +impl crate::RegisterSpec for STATUSDSTTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statusdsttran::R`](R) reader structure"] -impl crate::Readable for StatusdsttranSpec {} +impl crate::Readable for STATUSDSTTRAN_SPEC {} #[doc = "`reset()` method sets STATUSDSTTRAN to value 0"] -impl crate::Resettable for StatusdsttranSpec { +impl crate::Resettable for STATUSDSTTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statuserr.rs b/src/gpdma0/statuserr.rs index 9a24c4e8..b6b41015 100644 --- a/src/gpdma0/statuserr.rs +++ b/src/gpdma0/statuserr.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSERR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntErr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statuserr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatuserrSpec; -impl crate::RegisterSpec for StatuserrSpec { +pub struct STATUSERR_SPEC; +impl crate::RegisterSpec for STATUSERR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statuserr::R`](R) reader structure"] -impl crate::Readable for StatuserrSpec {} +impl crate::Readable for STATUSERR_SPEC {} #[doc = "`reset()` method sets STATUSERR to value 0"] -impl crate::Resettable for StatuserrSpec { +impl crate::Resettable for STATUSERR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statusint.rs b/src/gpdma0/statusint.rs index a98fb3e6..e8fd9f1e 100644 --- a/src/gpdma0/statusint.rs +++ b/src/gpdma0/statusint.rs @@ -1,50 +1,50 @@ #[doc = "Register `STATUSINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TFR` reader - OR of the contents of STATUSTFR register"] -pub type TfrR = crate::BitReader; +pub type TFR_R = crate::BitReader; #[doc = "Field `BLOCK` reader - OR of the contents of STATUSBLOCK register"] -pub type BlockR = crate::BitReader; +pub type BLOCK_R = crate::BitReader; #[doc = "Field `SRCT` reader - OR of the contents of STATUSSRCTRAN register"] -pub type SrctR = crate::BitReader; +pub type SRCT_R = crate::BitReader; #[doc = "Field `DSTT` reader - OR of the contents of STATUSDSTTRAN register"] -pub type DsttR = crate::BitReader; +pub type DSTT_R = crate::BitReader; #[doc = "Field `ERR` reader - OR of the contents of STATUSERR register"] -pub type ErrR = crate::BitReader; +pub type ERR_R = crate::BitReader; impl R { #[doc = "Bit 0 - OR of the contents of STATUSTFR register"] #[inline(always)] - pub fn tfr(&self) -> TfrR { - TfrR::new((self.bits & 1) != 0) + pub fn tfr(&self) -> TFR_R { + TFR_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - OR of the contents of STATUSBLOCK register"] #[inline(always)] - pub fn block(&self) -> BlockR { - BlockR::new(((self.bits >> 1) & 1) != 0) + pub fn block(&self) -> BLOCK_R { + BLOCK_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - OR of the contents of STATUSSRCTRAN register"] #[inline(always)] - pub fn srct(&self) -> SrctR { - SrctR::new(((self.bits >> 2) & 1) != 0) + pub fn srct(&self) -> SRCT_R { + SRCT_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - OR of the contents of STATUSDSTTRAN register"] #[inline(always)] - pub fn dstt(&self) -> DsttR { - DsttR::new(((self.bits >> 3) & 1) != 0) + pub fn dstt(&self) -> DSTT_R { + DSTT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OR of the contents of STATUSERR register"] #[inline(always)] - pub fn err(&self) -> ErrR { - ErrR::new(((self.bits >> 4) & 1) != 0) + pub fn err(&self) -> ERR_R { + ERR_R::new(((self.bits >> 4) & 1) != 0) } } #[doc = "Combined Interrupt Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statusint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatusintSpec; -impl crate::RegisterSpec for StatusintSpec { +pub struct STATUSINT_SPEC; +impl crate::RegisterSpec for STATUSINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statusint::R`](R) reader structure"] -impl crate::Readable for StatusintSpec {} +impl crate::Readable for STATUSINT_SPEC {} #[doc = "`reset()` method sets STATUSINT to value 0"] -impl crate::Resettable for StatusintSpec { +impl crate::Resettable for STATUSINT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statussrctran.rs b/src/gpdma0/statussrctran.rs index f270a0a4..69659f32 100644 --- a/src/gpdma0/statussrctran.rs +++ b/src/gpdma0/statussrctran.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSSRCTRAN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntSrcTran Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statussrctran::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatussrctranSpec; -impl crate::RegisterSpec for StatussrctranSpec { +pub struct STATUSSRCTRAN_SPEC; +impl crate::RegisterSpec for STATUSSRCTRAN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statussrctran::R`](R) reader structure"] -impl crate::Readable for StatussrctranSpec {} +impl crate::Readable for STATUSSRCTRAN_SPEC {} #[doc = "`reset()` method sets STATUSSRCTRAN to value 0"] -impl crate::Resettable for StatussrctranSpec { +impl crate::Resettable for STATUSSRCTRAN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/statustfr.rs b/src/gpdma0/statustfr.rs index 1ca2f1bd..cb402cb0 100644 --- a/src/gpdma0/statustfr.rs +++ b/src/gpdma0/statustfr.rs @@ -1,71 +1,71 @@ #[doc = "Register `STATUSTFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CH0` reader - Interrupt Status for channel 0"] -pub type Ch0R = crate::BitReader; +pub type CH0_R = crate::BitReader; #[doc = "Field `CH1` reader - Interrupt Status for channel 1"] -pub type Ch1R = crate::BitReader; +pub type CH1_R = crate::BitReader; #[doc = "Field `CH2` reader - Interrupt Status for channel 2"] -pub type Ch2R = crate::BitReader; +pub type CH2_R = crate::BitReader; #[doc = "Field `CH3` reader - Interrupt Status for channel 3"] -pub type Ch3R = crate::BitReader; +pub type CH3_R = crate::BitReader; #[doc = "Field `CH4` reader - Interrupt Status for channel 4"] -pub type Ch4R = crate::BitReader; +pub type CH4_R = crate::BitReader; #[doc = "Field `CH5` reader - Interrupt Status for channel 5"] -pub type Ch5R = crate::BitReader; +pub type CH5_R = crate::BitReader; #[doc = "Field `CH6` reader - Interrupt Status for channel 6"] -pub type Ch6R = crate::BitReader; +pub type CH6_R = crate::BitReader; #[doc = "Field `CH7` reader - Interrupt Status for channel 7"] -pub type Ch7R = crate::BitReader; +pub type CH7_R = crate::BitReader; impl R { #[doc = "Bit 0 - Interrupt Status for channel 0"] #[inline(always)] - pub fn ch0(&self) -> Ch0R { - Ch0R::new((self.bits & 1) != 0) + pub fn ch0(&self) -> CH0_R { + CH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Interrupt Status for channel 1"] #[inline(always)] - pub fn ch1(&self) -> Ch1R { - Ch1R::new(((self.bits >> 1) & 1) != 0) + pub fn ch1(&self) -> CH1_R { + CH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Interrupt Status for channel 2"] #[inline(always)] - pub fn ch2(&self) -> Ch2R { - Ch2R::new(((self.bits >> 2) & 1) != 0) + pub fn ch2(&self) -> CH2_R { + CH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Interrupt Status for channel 3"] #[inline(always)] - pub fn ch3(&self) -> Ch3R { - Ch3R::new(((self.bits >> 3) & 1) != 0) + pub fn ch3(&self) -> CH3_R { + CH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Interrupt Status for channel 4"] #[inline(always)] - pub fn ch4(&self) -> Ch4R { - Ch4R::new(((self.bits >> 4) & 1) != 0) + pub fn ch4(&self) -> CH4_R { + CH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Interrupt Status for channel 5"] #[inline(always)] - pub fn ch5(&self) -> Ch5R { - Ch5R::new(((self.bits >> 5) & 1) != 0) + pub fn ch5(&self) -> CH5_R { + CH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Interrupt Status for channel 6"] #[inline(always)] - pub fn ch6(&self) -> Ch6R { - Ch6R::new(((self.bits >> 6) & 1) != 0) + pub fn ch6(&self) -> CH6_R { + CH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Interrupt Status for channel 7"] #[inline(always)] - pub fn ch7(&self) -> Ch7R { - Ch7R::new(((self.bits >> 7) & 1) != 0) + pub fn ch7(&self) -> CH7_R { + CH7_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "IntTfr Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`statustfr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StatustfrSpec; -impl crate::RegisterSpec for StatustfrSpec { +pub struct STATUSTFR_SPEC; +impl crate::RegisterSpec for STATUSTFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`statustfr::R`](R) reader structure"] -impl crate::Readable for StatustfrSpec {} +impl crate::Readable for STATUSTFR_SPEC {} #[doc = "`reset()` method sets STATUSTFR to value 0"] -impl crate::Resettable for StatustfrSpec { +impl crate::Resettable for STATUSTFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0/type_.rs b/src/gpdma0/type_.rs index 49e402c0..cf672516 100644 --- a/src/gpdma0/type_.rs +++ b/src/gpdma0/type_.rs @@ -1,22 +1,22 @@ #[doc = "Register `TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Component Type"] -pub type ValueR = crate::FieldReader; +pub type VALUE_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Component Type"] #[inline(always)] - pub fn value(&self) -> ValueR { - ValueR::new(self.bits) + pub fn value(&self) -> VALUE_R { + VALUE_R::new(self.bits) } } #[doc = "GPDMA Component Type\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`type_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TypeSpec; -impl crate::RegisterSpec for TypeSpec { +pub struct TYPE_SPEC; +impl crate::RegisterSpec for TYPE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`type_::R`](R) reader structure"] -impl crate::Readable for TypeSpec {} +impl crate::Readable for TYPE_SPEC {} #[doc = "`reset()` method sets TYPE to value 0x4457_1110"] -impl crate::Resettable for TypeSpec { +impl crate::Resettable for TYPE_SPEC { const RESET_VALUE: u32 = 0x4457_1110; } diff --git a/src/gpdma0/version.rs b/src/gpdma0/version.rs index 66e4c358..1b3d1f83 100644 --- a/src/gpdma0/version.rs +++ b/src/gpdma0/version.rs @@ -1,22 +1,22 @@ #[doc = "Register `VERSION` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VALUE` reader - Version number of the component"] -pub type ValueR = crate::FieldReader; +pub type VALUE_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Version number of the component"] #[inline(always)] - pub fn value(&self) -> ValueR { - ValueR::new(self.bits) + pub fn value(&self) -> VALUE_R { + VALUE_R::new(self.bits) } } #[doc = "DMA Component Version\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VersionSpec; -impl crate::RegisterSpec for VersionSpec { +pub struct VERSION_SPEC; +impl crate::RegisterSpec for VERSION_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`version::R`](R) reader structure"] -impl crate::Readable for VersionSpec {} +impl crate::Readable for VERSION_SPEC {} #[doc = "`reset()` method sets VERSION to value 0x3231_342a"] -impl crate::Resettable for VersionSpec { +impl crate::Resettable for VERSION_SPEC { const RESET_VALUE: u32 = 0x3231_342a; } diff --git a/src/gpdma0_ch0.rs b/src/gpdma0_ch0.rs index 9850b313..d5af652f 100644 --- a/src/gpdma0_ch0.rs +++ b/src/gpdma0_ch0.rs @@ -1,170 +1,157 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - sar: Sar, + sar: SAR, _reserved1: [u8; 0x04], - dar: Dar, + dar: DAR, _reserved2: [u8; 0x04], - llp: Llp, + llp: LLP, _reserved3: [u8; 0x04], - ctll: Ctll, - ctlh: Ctlh, - sstat: Sstat, + ctll: CTLL, + ctlh: CTLH, + sstat: SSTAT, _reserved6: [u8; 0x04], - dstat: Dstat, + dstat: DSTAT, _reserved7: [u8; 0x04], - sstatar: Sstatar, + sstatar: SSTATAR, _reserved8: [u8; 0x04], - dstatar: Dstatar, + dstatar: DSTATAR, _reserved9: [u8; 0x04], - cfgl: Cfgl, - cfgh: Cfgh, - sgr: Sgr, + cfgl: CFGL, + cfgh: CFGH, + sgr: SGR, _reserved12: [u8; 0x04], - dsr: Dsr, + dsr: DSR, } impl RegisterBlock { #[doc = "0x00 - Source Address Register"] #[inline(always)] - pub const fn sar(&self) -> &Sar { + pub const fn sar(&self) -> &SAR { &self.sar } #[doc = "0x08 - Destination Address Register"] #[inline(always)] - pub const fn dar(&self) -> &Dar { + pub const fn dar(&self) -> &DAR { &self.dar } #[doc = "0x10 - Linked List Pointer Register"] #[inline(always)] - pub const fn llp(&self) -> &Llp { + pub const fn llp(&self) -> &LLP { &self.llp } #[doc = "0x18 - Control Register Low"] #[inline(always)] - pub const fn ctll(&self) -> &Ctll { + pub const fn ctll(&self) -> &CTLL { &self.ctll } #[doc = "0x1c - Control Register High"] #[inline(always)] - pub const fn ctlh(&self) -> &Ctlh { + pub const fn ctlh(&self) -> &CTLH { &self.ctlh } #[doc = "0x20 - Source Status Register"] #[inline(always)] - pub const fn sstat(&self) -> &Sstat { + pub const fn sstat(&self) -> &SSTAT { &self.sstat } #[doc = "0x28 - Destination Status Register"] #[inline(always)] - pub const fn dstat(&self) -> &Dstat { + pub const fn dstat(&self) -> &DSTAT { &self.dstat } #[doc = "0x30 - Source Status Address Register"] #[inline(always)] - pub const fn sstatar(&self) -> &Sstatar { + pub const fn sstatar(&self) -> &SSTATAR { &self.sstatar } #[doc = "0x38 - Destination Status Address Register"] #[inline(always)] - pub const fn dstatar(&self) -> &Dstatar { + pub const fn dstatar(&self) -> &DSTATAR { &self.dstatar } #[doc = "0x40 - Configuration Register Low"] #[inline(always)] - pub const fn cfgl(&self) -> &Cfgl { + pub const fn cfgl(&self) -> &CFGL { &self.cfgl } #[doc = "0x44 - Configuration Register High"] #[inline(always)] - pub const fn cfgh(&self) -> &Cfgh { + pub const fn cfgh(&self) -> &CFGH { &self.cfgh } #[doc = "0x48 - Source Gather Register"] #[inline(always)] - pub const fn sgr(&self) -> &Sgr { + pub const fn sgr(&self) -> &SGR { &self.sgr } #[doc = "0x50 - Destination Scatter Register"] #[inline(always)] - pub const fn dsr(&self) -> &Dsr { + pub const fn dsr(&self) -> &DSR { &self.dsr } } #[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] -#[doc(alias = "SAR")] -pub type Sar = crate::Reg; +pub type SAR = crate::Reg; #[doc = "Source Address Register"] pub mod sar; #[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] -#[doc(alias = "DAR")] -pub type Dar = crate::Reg; +pub type DAR = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; #[doc = "LLP (rw) register accessor: Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@llp`] module"] -#[doc(alias = "LLP")] -pub type Llp = crate::Reg; +pub type LLP = crate::Reg; #[doc = "Linked List Pointer Register"] pub mod llp; #[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] -#[doc(alias = "CTLL")] -pub type Ctll = crate::Reg; +pub type CTLL = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; #[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] -#[doc(alias = "CTLH")] -pub type Ctlh = crate::Reg; +pub type CTLH = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; #[doc = "SSTAT (rw) register accessor: Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstat`] module"] -#[doc(alias = "SSTAT")] -pub type Sstat = crate::Reg; +pub type SSTAT = crate::Reg; #[doc = "Source Status Register"] pub mod sstat; #[doc = "DSTAT (rw) register accessor: Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstat`] module"] -#[doc(alias = "DSTAT")] -pub type Dstat = crate::Reg; +pub type DSTAT = crate::Reg; #[doc = "Destination Status Register"] pub mod dstat; #[doc = "SSTATAR (rw) register accessor: Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sstatar`] module"] -#[doc(alias = "SSTATAR")] -pub type Sstatar = crate::Reg; +pub type SSTATAR = crate::Reg; #[doc = "Source Status Address Register"] pub mod sstatar; #[doc = "DSTATAR (rw) register accessor: Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dstatar`] module"] -#[doc(alias = "DSTATAR")] -pub type Dstatar = crate::Reg; +pub type DSTATAR = crate::Reg; #[doc = "Destination Status Address Register"] pub mod dstatar; #[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] -#[doc(alias = "CFGL")] -pub type Cfgl = crate::Reg; +pub type CFGL = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; #[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] -#[doc(alias = "CFGH")] -pub type Cfgh = crate::Reg; +pub type CFGH = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; #[doc = "SGR (rw) register accessor: Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sgr`] module"] -#[doc(alias = "SGR")] -pub type Sgr = crate::Reg; +pub type SGR = crate::Reg; #[doc = "Source Gather Register"] pub mod sgr; #[doc = "DSR (rw) register accessor: Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsr`] module"] -#[doc(alias = "DSR")] -pub type Dsr = crate::Reg; +pub type DSR = crate::Reg; #[doc = "Destination Scatter Register"] pub mod dsr; diff --git a/src/gpdma0_ch0/cfgh.rs b/src/gpdma0_ch0/cfgh.rs index 1dd259af..ba1676f8 100644 --- a/src/gpdma0_ch0/cfgh.rs +++ b/src/gpdma0_ch0/cfgh.rs @@ -1,228 +1,228 @@ #[doc = "Register `CFGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Flow Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcmode { +pub enum FCMODE_A { #[doc = "0: Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcmode) -> Self { + fn from(variant: FCMODE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCMODE` reader - Flow Control Mode"] -pub type FcmodeR = crate::BitReader; -impl FcmodeR { +pub type FCMODE_R = crate::BitReader; +impl FCMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcmode { + pub const fn variant(&self) -> FCMODE_A { match self.bits { - false => Fcmode::Value1, - true => Fcmode::Value2, + false => FCMODE_A::VALUE1, + true => FCMODE_A::VALUE2, } } #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcmode::Value1 + *self == FCMODE_A::VALUE1 } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcmode::Value2 + *self == FCMODE_A::VALUE2 } } #[doc = "Field `FCMODE` writer - Flow Control Mode"] -pub type FcmodeW<'a, REG> = crate::BitWriter<'a, REG, Fcmode>; -impl<'a, REG> FcmodeW<'a, REG> +pub type FCMODE_W<'a, REG> = crate::BitWriter<'a, REG, FCMODE_A>; +impl<'a, REG> FCMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fcmode::Value1) + self.variant(FCMODE_A::VALUE1) } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fcmode::Value2) + self.variant(FCMODE_A::VALUE2) } } #[doc = "FIFO Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FifoMode { +pub enum FIFO_MODE_A { #[doc = "0: Space/data available for single AHB transfer of the specified transfer width."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FifoMode) -> Self { + fn from(variant: FIFO_MODE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] -pub type FifoModeR = crate::BitReader; -impl FifoModeR { +pub type FIFO_MODE_R = crate::BitReader; +impl FIFO_MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FifoMode { + pub const fn variant(&self) -> FIFO_MODE_A { match self.bits { - false => FifoMode::Value1, - true => FifoMode::Value2, + false => FIFO_MODE_A::VALUE1, + true => FIFO_MODE_A::VALUE2, } } #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FifoMode::Value1 + *self == FIFO_MODE_A::VALUE1 } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FifoMode::Value2 + *self == FIFO_MODE_A::VALUE2 } } #[doc = "Field `FIFO_MODE` writer - FIFO Mode Select"] -pub type FifoModeW<'a, REG> = crate::BitWriter<'a, REG, FifoMode>; -impl<'a, REG> FifoModeW<'a, REG> +pub type FIFO_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FIFO_MODE_A>; +impl<'a, REG> FIFO_MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FifoMode::Value1) + self.variant(FIFO_MODE_A::VALUE1) } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FifoMode::Value2) + self.variant(FIFO_MODE_A::VALUE2) } } #[doc = "Field `PROTCTL` reader - Protection Control"] -pub type ProtctlR = crate::FieldReader; +pub type PROTCTL_R = crate::FieldReader; #[doc = "Field `PROTCTL` writer - Protection Control"] -pub type ProtctlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PROTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `DS_UPD_EN` reader - Destination Status Update Enable"] -pub type DsUpdEnR = crate::BitReader; +pub type DS_UPD_EN_R = crate::BitReader; #[doc = "Field `DS_UPD_EN` writer - Destination Status Update Enable"] -pub type DsUpdEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DS_UPD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SS_UPD_EN` reader - Source Status Update Enable"] -pub type SsUpdEnR = crate::BitReader; +pub type SS_UPD_EN_R = crate::BitReader; #[doc = "Field `SS_UPD_EN` writer - Source Status Update Enable"] -pub type SsUpdEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SS_UPD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SRC_PER` reader - Source Peripheral"] -pub type SrcPerR = crate::FieldReader; +pub type SRC_PER_R = crate::FieldReader; #[doc = "Field `SRC_PER` writer - Source Peripheral"] -pub type SrcPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `DEST_PER` reader - Destination Peripheral"] -pub type DestPerR = crate::FieldReader; +pub type DEST_PER_R = crate::FieldReader; #[doc = "Field `DEST_PER` writer - Destination Peripheral"] -pub type DestPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DEST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - pub fn fcmode(&self) -> FcmodeR { - FcmodeR::new((self.bits & 1) != 0) + pub fn fcmode(&self) -> FCMODE_R { + FCMODE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - pub fn fifo_mode(&self) -> FifoModeR { - FifoModeR::new(((self.bits >> 1) & 1) != 0) + pub fn fifo_mode(&self) -> FIFO_MODE_R { + FIFO_MODE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - pub fn protctl(&self) -> ProtctlR { - ProtctlR::new(((self.bits >> 2) & 7) as u8) + pub fn protctl(&self) -> PROTCTL_R { + PROTCTL_R::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bit 5 - Destination Status Update Enable"] #[inline(always)] - pub fn ds_upd_en(&self) -> DsUpdEnR { - DsUpdEnR::new(((self.bits >> 5) & 1) != 0) + pub fn ds_upd_en(&self) -> DS_UPD_EN_R { + DS_UPD_EN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Source Status Update Enable"] #[inline(always)] - pub fn ss_upd_en(&self) -> SsUpdEnR { - SsUpdEnR::new(((self.bits >> 6) & 1) != 0) + pub fn ss_upd_en(&self) -> SS_UPD_EN_R { + SS_UPD_EN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - pub fn src_per(&self) -> SrcPerR { - SrcPerR::new(((self.bits >> 7) & 0x0f) as u8) + pub fn src_per(&self) -> SRC_PER_R { + SRC_PER_R::new(((self.bits >> 7) & 0x0f) as u8) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - pub fn dest_per(&self) -> DestPerR { - DestPerR::new(((self.bits >> 11) & 0x0f) as u8) + pub fn dest_per(&self) -> DEST_PER_R { + DEST_PER_R::new(((self.bits >> 11) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] #[must_use] - pub fn fcmode(&mut self) -> FcmodeW { - FcmodeW::new(self, 0) + pub fn fcmode(&mut self) -> FCMODE_W { + FCMODE_W::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] #[must_use] - pub fn fifo_mode(&mut self) -> FifoModeW { - FifoModeW::new(self, 1) + pub fn fifo_mode(&mut self) -> FIFO_MODE_W { + FIFO_MODE_W::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] #[must_use] - pub fn protctl(&mut self) -> ProtctlW { - ProtctlW::new(self, 2) + pub fn protctl(&mut self) -> PROTCTL_W { + PROTCTL_W::new(self, 2) } #[doc = "Bit 5 - Destination Status Update Enable"] #[inline(always)] #[must_use] - pub fn ds_upd_en(&mut self) -> DsUpdEnW { - DsUpdEnW::new(self, 5) + pub fn ds_upd_en(&mut self) -> DS_UPD_EN_W { + DS_UPD_EN_W::new(self, 5) } #[doc = "Bit 6 - Source Status Update Enable"] #[inline(always)] #[must_use] - pub fn ss_upd_en(&mut self) -> SsUpdEnW { - SsUpdEnW::new(self, 6) + pub fn ss_upd_en(&mut self) -> SS_UPD_EN_W { + SS_UPD_EN_W::new(self, 6) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] #[must_use] - pub fn src_per(&mut self) -> SrcPerW { - SrcPerW::new(self, 7) + pub fn src_per(&mut self) -> SRC_PER_W { + SRC_PER_W::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] #[must_use] - pub fn dest_per(&mut self) -> DestPerW { - DestPerW::new(self, 11) + pub fn dest_per(&mut self) -> DEST_PER_W { + DEST_PER_W::new(self, 11) } } #[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfghSpec; -impl crate::RegisterSpec for CfghSpec { +pub struct CFGH_SPEC; +impl crate::RegisterSpec for CFGH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfgh::R`](R) reader structure"] -impl crate::Readable for CfghSpec {} +impl crate::Readable for CFGH_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfgh::W`](W) writer structure"] -impl crate::Writable for CfghSpec { +impl crate::Writable for CFGH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGH to value 0x04"] -impl crate::Resettable for CfghSpec { +impl crate::Resettable for CFGH_SPEC { const RESET_VALUE: u32 = 0x04; } diff --git a/src/gpdma0_ch0/cfgl.rs b/src/gpdma0_ch0/cfgl.rs index 2a99aae6..50f8561a 100644 --- a/src/gpdma0_ch0/cfgl.rs +++ b/src/gpdma0_ch0/cfgl.rs @@ -1,259 +1,259 @@ #[doc = "Register `CFGL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH_PRIOR` reader - Channel priority"] -pub type ChPriorR = crate::FieldReader; +pub type CH_PRIOR_R = crate::FieldReader; #[doc = "Field `CH_PRIOR` writer - Channel priority"] -pub type ChPriorW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Channel Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ChSusp { +pub enum CH_SUSP_A { #[doc = "0: Not suspended."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Suspend DMA transfer from the source."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ChSusp) -> Self { + fn from(variant: CH_SUSP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH_SUSP` reader - Channel Suspend"] -pub type ChSuspR = crate::BitReader; -impl ChSuspR { +pub type CH_SUSP_R = crate::BitReader; +impl CH_SUSP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ChSusp { + pub const fn variant(&self) -> CH_SUSP_A { match self.bits { - false => ChSusp::Value1, - true => ChSusp::Value2, + false => CH_SUSP_A::VALUE1, + true => CH_SUSP_A::VALUE2, } } #[doc = "Not suspended."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ChSusp::Value1 + *self == CH_SUSP_A::VALUE1 } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ChSusp::Value2 + *self == CH_SUSP_A::VALUE2 } } #[doc = "Field `CH_SUSP` writer - Channel Suspend"] -pub type ChSuspW<'a, REG> = crate::BitWriter<'a, REG, ChSusp>; -impl<'a, REG> ChSuspW<'a, REG> +pub type CH_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, CH_SUSP_A>; +impl<'a, REG> CH_SUSP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not suspended."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ChSusp::Value1) + self.variant(CH_SUSP_A::VALUE1) } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ChSusp::Value2) + self.variant(CH_SUSP_A::VALUE2) } } #[doc = "Indicates if there is data left in the channel FIFO\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FifoEmpty { +pub enum FIFO_EMPTY_A { #[doc = "1: Channel FIFO empty"] - Value1 = 1, + VALUE1 = 1, #[doc = "0: Channel FIFO not empty"] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FifoEmpty) -> Self { + fn from(variant: FIFO_EMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] -pub type FifoEmptyR = crate::BitReader; -impl FifoEmptyR { +pub type FIFO_EMPTY_R = crate::BitReader; +impl FIFO_EMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FifoEmpty { + pub const fn variant(&self) -> FIFO_EMPTY_A { match self.bits { - true => FifoEmpty::Value1, - false => FifoEmpty::Value2, + true => FIFO_EMPTY_A::VALUE1, + false => FIFO_EMPTY_A::VALUE2, } } #[doc = "Channel FIFO empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FifoEmpty::Value1 + *self == FIFO_EMPTY_A::VALUE1 } #[doc = "Channel FIFO not empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FifoEmpty::Value2 + *self == FIFO_EMPTY_A::VALUE2 } } #[doc = "Destination Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HsSelDst { +pub enum HS_SEL_DST_A { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Software handshaking interface. Hardware- initiated transaction requests are ignored."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HsSelDst) -> Self { + fn from(variant: HS_SEL_DST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] -pub type HsSelDstR = crate::BitReader; -impl HsSelDstR { +pub type HS_SEL_DST_R = crate::BitReader; +impl HS_SEL_DST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HsSelDst { + pub const fn variant(&self) -> HS_SEL_DST_A { match self.bits { - false => HsSelDst::Value1, - true => HsSelDst::Value2, + false => HS_SEL_DST_A::VALUE1, + true => HS_SEL_DST_A::VALUE2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HsSelDst::Value1 + *self == HS_SEL_DST_A::VALUE1 } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HsSelDst::Value2 + *self == HS_SEL_DST_A::VALUE2 } } #[doc = "Field `HS_SEL_DST` writer - Destination Software or Hardware Handshaking Select"] -pub type HsSelDstW<'a, REG> = crate::BitWriter<'a, REG, HsSelDst>; -impl<'a, REG> HsSelDstW<'a, REG> +pub type HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_DST_A>; +impl<'a, REG> HS_SEL_DST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HsSelDst::Value1) + self.variant(HS_SEL_DST_A::VALUE1) } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HsSelDst::Value2) + self.variant(HS_SEL_DST_A::VALUE2) } } #[doc = "Source Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HsSelSrc { +pub enum HS_SEL_SRC_A { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Software handshaking interface. Hardware-initiated transaction requests are ignored."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HsSelSrc) -> Self { + fn from(variant: HS_SEL_SRC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] -pub type HsSelSrcR = crate::BitReader; -impl HsSelSrcR { +pub type HS_SEL_SRC_R = crate::BitReader; +impl HS_SEL_SRC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HsSelSrc { + pub const fn variant(&self) -> HS_SEL_SRC_A { match self.bits { - false => HsSelSrc::Value1, - true => HsSelSrc::Value2, + false => HS_SEL_SRC_A::VALUE1, + true => HS_SEL_SRC_A::VALUE2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HsSelSrc::Value1 + *self == HS_SEL_SRC_A::VALUE1 } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HsSelSrc::Value2 + *self == HS_SEL_SRC_A::VALUE2 } } #[doc = "Field `HS_SEL_SRC` writer - Source Software or Hardware Handshaking Select"] -pub type HsSelSrcW<'a, REG> = crate::BitWriter<'a, REG, HsSelSrc>; -impl<'a, REG> HsSelSrcW<'a, REG> +pub type HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_SRC_A>; +impl<'a, REG> HS_SEL_SRC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HsSelSrc::Value1) + self.variant(HS_SEL_SRC_A::VALUE1) } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HsSelSrc::Value2) + self.variant(HS_SEL_SRC_A::VALUE2) } } #[doc = "Channel Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LockChL { +pub enum LOCK_CH_L_A { #[doc = "0: Over complete DMA transfer"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Over complete DMA block transfer"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Over complete DMA transaction"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LockChL) -> Self { + fn from(variant: LOCK_CH_L_A) -> Self { variant as _ } } -impl crate::FieldSpec for LockChL { +impl crate::FieldSpec for LOCK_CH_L_A { type Ux = u8; } -impl crate::IsEnum for LockChL {} +impl crate::IsEnum for LOCK_CH_L_A {} #[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] -pub type LockChLR = crate::FieldReader; -impl LockChLR { +pub type LOCK_CH_L_R = crate::FieldReader; +impl LOCK_CH_L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LockChL::Value1), - 1 => Some(LockChL::Value2), - 2 => Some(LockChL::Value3), + 0 => Some(LOCK_CH_L_A::VALUE1), + 1 => Some(LOCK_CH_L_A::VALUE2), + 2 => Some(LOCK_CH_L_A::VALUE3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LockChL::Value1 + *self == LOCK_CH_L_A::VALUE1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LockChL::Value2 + *self == LOCK_CH_L_A::VALUE2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LockChL::Value3 + *self == LOCK_CH_L_A::VALUE3 } } #[doc = "Field `LOCK_CH_L` writer - Channel Lock Level"] -pub type LockChLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockChL>; -impl<'a, REG> LockChLW<'a, REG> +pub type LOCK_CH_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_CH_L_A>; +impl<'a, REG> LOCK_CH_L_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -261,72 +261,72 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LockChL::Value1) + self.variant(LOCK_CH_L_A::VALUE1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LockChL::Value2) + self.variant(LOCK_CH_L_A::VALUE2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LockChL::Value3) + self.variant(LOCK_CH_L_A::VALUE3) } } #[doc = "Bus Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LockBL { +pub enum LOCK_B_L_A { #[doc = "0: Over complete DMA transfer"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Over complete DMA block transfer"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Over complete DMA transaction"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LockBL) -> Self { + fn from(variant: LOCK_B_L_A) -> Self { variant as _ } } -impl crate::FieldSpec for LockBL { +impl crate::FieldSpec for LOCK_B_L_A { type Ux = u8; } -impl crate::IsEnum for LockBL {} +impl crate::IsEnum for LOCK_B_L_A {} #[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] -pub type LockBLR = crate::FieldReader; -impl LockBLR { +pub type LOCK_B_L_R = crate::FieldReader; +impl LOCK_B_L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LockBL::Value1), - 1 => Some(LockBL::Value2), - 2 => Some(LockBL::Value3), + 0 => Some(LOCK_B_L_A::VALUE1), + 1 => Some(LOCK_B_L_A::VALUE2), + 2 => Some(LOCK_B_L_A::VALUE3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LockBL::Value1 + *self == LOCK_B_L_A::VALUE1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LockBL::Value2 + *self == LOCK_B_L_A::VALUE2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LockBL::Value3 + *self == LOCK_B_L_A::VALUE3 } } #[doc = "Field `LOCK_B_L` writer - Bus Lock Level"] -pub type LockBLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockBL>; -impl<'a, REG> LockBLW<'a, REG> +pub type LOCK_B_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_B_L_A>; +impl<'a, REG> LOCK_B_L_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -334,311 +334,311 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LockBL::Value1) + self.variant(LOCK_B_L_A::VALUE1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LockBL::Value2) + self.variant(LOCK_B_L_A::VALUE2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LockBL::Value3) + self.variant(LOCK_B_L_A::VALUE3) } } #[doc = "Field `LOCK_CH` reader - Channel Lock Bit"] -pub type LockChR = crate::BitReader; +pub type LOCK_CH_R = crate::BitReader; #[doc = "Field `LOCK_CH` writer - Channel Lock Bit"] -pub type LockChW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LOCK_CH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCK_B` reader - Bus Lock Bit"] -pub type LockBR = crate::BitReader; +pub type LOCK_B_R = crate::BitReader; #[doc = "Field `LOCK_B` writer - Bus Lock Bit"] -pub type LockBW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LOCK_B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Destination Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DstHsPol { +pub enum DST_HS_POL_A { #[doc = "0: Active high"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active low"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DstHsPol) -> Self { + fn from(variant: DST_HS_POL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] -pub type DstHsPolR = crate::BitReader; -impl DstHsPolR { +pub type DST_HS_POL_R = crate::BitReader; +impl DST_HS_POL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DstHsPol { + pub const fn variant(&self) -> DST_HS_POL_A { match self.bits { - false => DstHsPol::Value1, - true => DstHsPol::Value2, + false => DST_HS_POL_A::VALUE1, + true => DST_HS_POL_A::VALUE2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DstHsPol::Value1 + *self == DST_HS_POL_A::VALUE1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DstHsPol::Value2 + *self == DST_HS_POL_A::VALUE2 } } #[doc = "Field `DST_HS_POL` writer - Destination Handshaking Interface Polarity"] -pub type DstHsPolW<'a, REG> = crate::BitWriter<'a, REG, DstHsPol>; -impl<'a, REG> DstHsPolW<'a, REG> +pub type DST_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, DST_HS_POL_A>; +impl<'a, REG> DST_HS_POL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DstHsPol::Value1) + self.variant(DST_HS_POL_A::VALUE1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DstHsPol::Value2) + self.variant(DST_HS_POL_A::VALUE2) } } #[doc = "Source Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SrcHsPol { +pub enum SRC_HS_POL_A { #[doc = "0: Active high"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active low"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SrcHsPol) -> Self { + fn from(variant: SRC_HS_POL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] -pub type SrcHsPolR = crate::BitReader; -impl SrcHsPolR { +pub type SRC_HS_POL_R = crate::BitReader; +impl SRC_HS_POL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SrcHsPol { + pub const fn variant(&self) -> SRC_HS_POL_A { match self.bits { - false => SrcHsPol::Value1, - true => SrcHsPol::Value2, + false => SRC_HS_POL_A::VALUE1, + true => SRC_HS_POL_A::VALUE2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SrcHsPol::Value1 + *self == SRC_HS_POL_A::VALUE1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SrcHsPol::Value2 + *self == SRC_HS_POL_A::VALUE2 } } #[doc = "Field `SRC_HS_POL` writer - Source Handshaking Interface Polarity"] -pub type SrcHsPolW<'a, REG> = crate::BitWriter<'a, REG, SrcHsPol>; -impl<'a, REG> SrcHsPolW<'a, REG> +pub type SRC_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, SRC_HS_POL_A>; +impl<'a, REG> SRC_HS_POL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SrcHsPol::Value1) + self.variant(SRC_HS_POL_A::VALUE1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SrcHsPol::Value2) + self.variant(SRC_HS_POL_A::VALUE2) } } #[doc = "Field `MAX_ABRST` reader - Maximum AMBA Burst Length"] -pub type MaxAbrstR = crate::FieldReader; +pub type MAX_ABRST_R = crate::FieldReader; #[doc = "Field `MAX_ABRST` writer - Maximum AMBA Burst Length"] -pub type MaxAbrstW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type MAX_ABRST_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `RELOAD_SRC` reader - Automatic Source Reload"] -pub type ReloadSrcR = crate::BitReader; +pub type RELOAD_SRC_R = crate::BitReader; #[doc = "Field `RELOAD_SRC` writer - Automatic Source Reload"] -pub type ReloadSrcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RELOAD_SRC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RELOAD_DST` reader - Automatic Destination Reload"] -pub type ReloadDstR = crate::BitReader; +pub type RELOAD_DST_R = crate::BitReader; #[doc = "Field `RELOAD_DST` writer - Automatic Destination Reload"] -pub type ReloadDstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RELOAD_DST_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - pub fn ch_prior(&self) -> ChPriorR { - ChPriorR::new(((self.bits >> 5) & 7) as u8) + pub fn ch_prior(&self) -> CH_PRIOR_R { + CH_PRIOR_R::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - pub fn ch_susp(&self) -> ChSuspR { - ChSuspR::new(((self.bits >> 8) & 1) != 0) + pub fn ch_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Indicates if there is data left in the channel FIFO"] #[inline(always)] - pub fn fifo_empty(&self) -> FifoEmptyR { - FifoEmptyR::new(((self.bits >> 9) & 1) != 0) + pub fn fifo_empty(&self) -> FIFO_EMPTY_R { + FIFO_EMPTY_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HsSelDstR { - HsSelDstR::new(((self.bits >> 10) & 1) != 0) + pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { + HS_SEL_DST_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_src(&self) -> HsSelSrcR { - HsSelSrcR::new(((self.bits >> 11) & 1) != 0) + pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { + HS_SEL_SRC_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - pub fn lock_ch_l(&self) -> LockChLR { - LockChLR::new(((self.bits >> 12) & 3) as u8) + pub fn lock_ch_l(&self) -> LOCK_CH_L_R { + LOCK_CH_L_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - pub fn lock_b_l(&self) -> LockBLR { - LockBLR::new(((self.bits >> 14) & 3) as u8) + pub fn lock_b_l(&self) -> LOCK_B_L_R { + LOCK_B_L_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - pub fn lock_ch(&self) -> LockChR { - LockChR::new(((self.bits >> 16) & 1) != 0) + pub fn lock_ch(&self) -> LOCK_CH_R { + LOCK_CH_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - pub fn lock_b(&self) -> LockBR { - LockBR::new(((self.bits >> 17) & 1) != 0) + pub fn lock_b(&self) -> LOCK_B_R { + LOCK_B_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - pub fn dst_hs_pol(&self) -> DstHsPolR { - DstHsPolR::new(((self.bits >> 18) & 1) != 0) + pub fn dst_hs_pol(&self) -> DST_HS_POL_R { + DST_HS_POL_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - pub fn src_hs_pol(&self) -> SrcHsPolR { - SrcHsPolR::new(((self.bits >> 19) & 1) != 0) + pub fn src_hs_pol(&self) -> SRC_HS_POL_R { + SRC_HS_POL_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - pub fn max_abrst(&self) -> MaxAbrstR { - MaxAbrstR::new(((self.bits >> 20) & 0x03ff) as u16) + pub fn max_abrst(&self) -> MAX_ABRST_R { + MAX_ABRST_R::new(((self.bits >> 20) & 0x03ff) as u16) } #[doc = "Bit 30 - Automatic Source Reload"] #[inline(always)] - pub fn reload_src(&self) -> ReloadSrcR { - ReloadSrcR::new(((self.bits >> 30) & 1) != 0) + pub fn reload_src(&self) -> RELOAD_SRC_R { + RELOAD_SRC_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Automatic Destination Reload"] #[inline(always)] - pub fn reload_dst(&self) -> ReloadDstR { - ReloadDstR::new(((self.bits >> 31) & 1) != 0) + pub fn reload_dst(&self) -> RELOAD_DST_R { + RELOAD_DST_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] #[must_use] - pub fn ch_prior(&mut self) -> ChPriorW { - ChPriorW::new(self, 5) + pub fn ch_prior(&mut self) -> CH_PRIOR_W { + CH_PRIOR_W::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] #[must_use] - pub fn ch_susp(&mut self) -> ChSuspW { - ChSuspW::new(self, 8) + pub fn ch_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_dst(&mut self) -> HsSelDstW { - HsSelDstW::new(self, 10) + pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { + HS_SEL_DST_W::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_src(&mut self) -> HsSelSrcW { - HsSelSrcW::new(self, 11) + pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { + HS_SEL_SRC_W::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] #[must_use] - pub fn lock_ch_l(&mut self) -> LockChLW { - LockChLW::new(self, 12) + pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { + LOCK_CH_L_W::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] #[must_use] - pub fn lock_b_l(&mut self) -> LockBLW { - LockBLW::new(self, 14) + pub fn lock_b_l(&mut self) -> LOCK_B_L_W { + LOCK_B_L_W::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_ch(&mut self) -> LockChW { - LockChW::new(self, 16) + pub fn lock_ch(&mut self) -> LOCK_CH_W { + LOCK_CH_W::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_b(&mut self) -> LockBW { - LockBW::new(self, 17) + pub fn lock_b(&mut self) -> LOCK_B_W { + LOCK_B_W::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn dst_hs_pol(&mut self) -> DstHsPolW { - DstHsPolW::new(self, 18) + pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { + DST_HS_POL_W::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn src_hs_pol(&mut self) -> SrcHsPolW { - SrcHsPolW::new(self, 19) + pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { + SRC_HS_POL_W::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] #[must_use] - pub fn max_abrst(&mut self) -> MaxAbrstW { - MaxAbrstW::new(self, 20) + pub fn max_abrst(&mut self) -> MAX_ABRST_W { + MAX_ABRST_W::new(self, 20) } #[doc = "Bit 30 - Automatic Source Reload"] #[inline(always)] #[must_use] - pub fn reload_src(&mut self) -> ReloadSrcW { - ReloadSrcW::new(self, 30) + pub fn reload_src(&mut self) -> RELOAD_SRC_W { + RELOAD_SRC_W::new(self, 30) } #[doc = "Bit 31 - Automatic Destination Reload"] #[inline(always)] #[must_use] - pub fn reload_dst(&mut self) -> ReloadDstW { - ReloadDstW::new(self, 31) + pub fn reload_dst(&mut self) -> RELOAD_DST_W { + RELOAD_DST_W::new(self, 31) } } #[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfglSpec; -impl crate::RegisterSpec for CfglSpec { +pub struct CFGL_SPEC; +impl crate::RegisterSpec for CFGL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfgl::R`](R) reader structure"] -impl crate::Readable for CfglSpec {} +impl crate::Readable for CFGL_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfgl::W`](W) writer structure"] -impl crate::Writable for CfglSpec { +impl crate::Writable for CFGL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGL to value 0x0e00"] -impl crate::Resettable for CfglSpec { +impl crate::Resettable for CFGL_SPEC { const RESET_VALUE: u32 = 0x0e00; } diff --git a/src/gpdma0_ch0/ctlh.rs b/src/gpdma0_ch0/ctlh.rs index 828a2d1a..624dc573 100644 --- a/src/gpdma0_ch0/ctlh.rs +++ b/src/gpdma0_ch0/ctlh.rs @@ -1,55 +1,55 @@ #[doc = "Register `CTLH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_TS` reader - Block Transfer Size"] -pub type BlockTsR = crate::FieldReader; +pub type BLOCK_TS_R = crate::FieldReader; #[doc = "Field `BLOCK_TS` writer - Block Transfer Size"] -pub type BlockTsW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BLOCK_TS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DONE` reader - Done bit"] -pub type DoneR = crate::BitReader; +pub type DONE_R = crate::BitReader; #[doc = "Field `DONE` writer - Done bit"] -pub type DoneW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DONE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - pub fn block_ts(&self) -> BlockTsR { - BlockTsR::new((self.bits & 0x0fff) as u16) + pub fn block_ts(&self) -> BLOCK_TS_R { + BLOCK_TS_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - pub fn done(&self) -> DoneR { - DoneR::new(((self.bits >> 12) & 1) != 0) + pub fn done(&self) -> DONE_R { + DONE_R::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn block_ts(&mut self) -> BlockTsW { - BlockTsW::new(self, 0) + pub fn block_ts(&mut self) -> BLOCK_TS_W { + BLOCK_TS_W::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DoneW { - DoneW::new(self, 12) + pub fn done(&mut self) -> DONE_W { + DONE_W::new(self, 12) } } #[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtlhSpec; -impl crate::RegisterSpec for CtlhSpec { +pub struct CTLH_SPEC; +impl crate::RegisterSpec for CTLH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctlh::R`](R) reader structure"] -impl crate::Readable for CtlhSpec {} +impl crate::Readable for CTLH_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctlh::W`](W) writer structure"] -impl crate::Writable for CtlhSpec { +impl crate::Writable for CTLH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLH to value 0x02"] -impl crate::Resettable for CtlhSpec { +impl crate::Resettable for CTLH_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/gpdma0_ch0/ctll.rs b/src/gpdma0_ch0/ctll.rs index f9342087..5d1b9606 100644 --- a/src/gpdma0_ch0/ctll.rs +++ b/src/gpdma0_ch0/ctll.rs @@ -1,72 +1,72 @@ #[doc = "Register `CTLL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INT_EN` reader - Interrupt Enable Bit"] -pub type IntEnR = crate::BitReader; +pub type INT_EN_R = crate::BitReader; #[doc = "Field `INT_EN` writer - Interrupt Enable Bit"] -pub type IntEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DST_TR_WIDTH` reader - Destination Transfer Width"] -pub type DstTrWidthR = crate::FieldReader; +pub type DST_TR_WIDTH_R = crate::FieldReader; #[doc = "Field `DST_TR_WIDTH` writer - Destination Transfer Width"] -pub type DstTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_TR_WIDTH` reader - Source Transfer Width"] -pub type SrcTrWidthR = crate::FieldReader; +pub type SRC_TR_WIDTH_R = crate::FieldReader; #[doc = "Field `SRC_TR_WIDTH` writer - Source Transfer Width"] -pub type SrcTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Destination Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dinc { +pub enum DINC_A { #[doc = "0: Increment"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Decrement"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: No change"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dinc) -> Self { + fn from(variant: DINC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dinc { +impl crate::FieldSpec for DINC_A { type Ux = u8; } -impl crate::IsEnum for Dinc {} +impl crate::IsEnum for DINC_A {} #[doc = "Field `DINC` reader - Destination Address Increment"] -pub type DincR = crate::FieldReader; -impl DincR { +pub type DINC_R = crate::FieldReader; +impl DINC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Dinc::Value1), - 1 => Some(Dinc::Value2), - 2 => Some(Dinc::Value3), + 0 => Some(DINC_A::VALUE1), + 1 => Some(DINC_A::VALUE2), + 2 => Some(DINC_A::VALUE3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dinc::Value1 + *self == DINC_A::VALUE1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dinc::Value2 + *self == DINC_A::VALUE2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dinc::Value3 + *self == DINC_A::VALUE3 } } #[doc = "Field `DINC` writer - Destination Address Increment"] -pub type DincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dinc>; -impl<'a, REG> DincW<'a, REG> +pub type DINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DINC_A>; +impl<'a, REG> DINC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,72 +74,72 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dinc::Value1) + self.variant(DINC_A::VALUE1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dinc::Value2) + self.variant(DINC_A::VALUE2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dinc::Value3) + self.variant(DINC_A::VALUE3) } } #[doc = "Source Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sinc { +pub enum SINC_A { #[doc = "0: Increment"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Decrement"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: No change"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sinc) -> Self { + fn from(variant: SINC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sinc { +impl crate::FieldSpec for SINC_A { type Ux = u8; } -impl crate::IsEnum for Sinc {} +impl crate::IsEnum for SINC_A {} #[doc = "Field `SINC` reader - Source Address Increment"] -pub type SincR = crate::FieldReader; -impl SincR { +pub type SINC_R = crate::FieldReader; +impl SINC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sinc::Value1), - 1 => Some(Sinc::Value2), - 2 => Some(Sinc::Value3), + 0 => Some(SINC_A::VALUE1), + 1 => Some(SINC_A::VALUE2), + 2 => Some(SINC_A::VALUE3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sinc::Value1 + *self == SINC_A::VALUE1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sinc::Value2 + *self == SINC_A::VALUE2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sinc::Value3 + *self == SINC_A::VALUE3 } } #[doc = "Field `SINC` writer - Source Address Increment"] -pub type SincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sinc>; -impl<'a, REG> SincW<'a, REG> +pub type SINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SINC_A>; +impl<'a, REG> SINC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -147,295 +147,295 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sinc::Value1) + self.variant(SINC_A::VALUE1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sinc::Value2) + self.variant(SINC_A::VALUE2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sinc::Value3) + self.variant(SINC_A::VALUE3) } } #[doc = "Field `DEST_MSIZE` reader - Destination Burst Transaction Length"] -pub type DestMsizeR = crate::FieldReader; +pub type DEST_MSIZE_R = crate::FieldReader; #[doc = "Field `DEST_MSIZE` writer - Destination Burst Transaction Length"] -pub type DestMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DEST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_MSIZE` reader - Source Burst Transaction Length"] -pub type SrcMsizeR = crate::FieldReader; +pub type SRC_MSIZE_R = crate::FieldReader; #[doc = "Field `SRC_MSIZE` writer - Source Burst Transaction Length"] -pub type SrcMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Source gather enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SrcGatherEn { +pub enum SRC_GATHER_EN_A { #[doc = "0: Gather disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gather enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SrcGatherEn) -> Self { + fn from(variant: SRC_GATHER_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRC_GATHER_EN` reader - Source gather enable"] -pub type SrcGatherEnR = crate::BitReader; -impl SrcGatherEnR { +pub type SRC_GATHER_EN_R = crate::BitReader; +impl SRC_GATHER_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SrcGatherEn { + pub const fn variant(&self) -> SRC_GATHER_EN_A { match self.bits { - false => SrcGatherEn::Value1, - true => SrcGatherEn::Value2, + false => SRC_GATHER_EN_A::VALUE1, + true => SRC_GATHER_EN_A::VALUE2, } } #[doc = "Gather disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SrcGatherEn::Value1 + *self == SRC_GATHER_EN_A::VALUE1 } #[doc = "Gather enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SrcGatherEn::Value2 + *self == SRC_GATHER_EN_A::VALUE2 } } #[doc = "Field `SRC_GATHER_EN` writer - Source gather enable"] -pub type SrcGatherEnW<'a, REG> = crate::BitWriter<'a, REG, SrcGatherEn>; -impl<'a, REG> SrcGatherEnW<'a, REG> +pub type SRC_GATHER_EN_W<'a, REG> = crate::BitWriter<'a, REG, SRC_GATHER_EN_A>; +impl<'a, REG> SRC_GATHER_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Gather disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SrcGatherEn::Value1) + self.variant(SRC_GATHER_EN_A::VALUE1) } #[doc = "Gather enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SrcGatherEn::Value2) + self.variant(SRC_GATHER_EN_A::VALUE2) } } #[doc = "Destination scatter enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DstScatterEn { +pub enum DST_SCATTER_EN_A { #[doc = "0: Scatter disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Scatter enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DstScatterEn) -> Self { + fn from(variant: DST_SCATTER_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DST_SCATTER_EN` reader - Destination scatter enable"] -pub type DstScatterEnR = crate::BitReader; -impl DstScatterEnR { +pub type DST_SCATTER_EN_R = crate::BitReader; +impl DST_SCATTER_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DstScatterEn { + pub const fn variant(&self) -> DST_SCATTER_EN_A { match self.bits { - false => DstScatterEn::Value1, - true => DstScatterEn::Value2, + false => DST_SCATTER_EN_A::VALUE1, + true => DST_SCATTER_EN_A::VALUE2, } } #[doc = "Scatter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DstScatterEn::Value1 + *self == DST_SCATTER_EN_A::VALUE1 } #[doc = "Scatter enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DstScatterEn::Value2 + *self == DST_SCATTER_EN_A::VALUE2 } } #[doc = "Field `DST_SCATTER_EN` writer - Destination scatter enable"] -pub type DstScatterEnW<'a, REG> = crate::BitWriter<'a, REG, DstScatterEn>; -impl<'a, REG> DstScatterEnW<'a, REG> +pub type DST_SCATTER_EN_W<'a, REG> = crate::BitWriter<'a, REG, DST_SCATTER_EN_A>; +impl<'a, REG> DST_SCATTER_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Scatter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DstScatterEn::Value1) + self.variant(DST_SCATTER_EN_A::VALUE1) } #[doc = "Scatter enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DstScatterEn::Value2) + self.variant(DST_SCATTER_EN_A::VALUE2) } } #[doc = "Field `TT_FC` reader - Transfer Type and Flow Control"] -pub type TtFcR = crate::FieldReader; +pub type TT_FC_R = crate::FieldReader; #[doc = "Field `TT_FC` writer - Transfer Type and Flow Control"] -pub type TtFcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `LLP_DST_EN` reader - Linked List Pointer for Destination Enable"] -pub type LlpDstEnR = crate::BitReader; +pub type LLP_DST_EN_R = crate::BitReader; #[doc = "Field `LLP_DST_EN` writer - Linked List Pointer for Destination Enable"] -pub type LlpDstEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LLP_DST_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LLP_SRC_EN` reader - Linked List Pointer for Source Enable"] -pub type LlpSrcEnR = crate::BitReader; +pub type LLP_SRC_EN_R = crate::BitReader; #[doc = "Field `LLP_SRC_EN` writer - Linked List Pointer for Source Enable"] -pub type LlpSrcEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LLP_SRC_EN_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - pub fn int_en(&self) -> IntEnR { - IntEnR::new((self.bits & 1) != 0) + pub fn int_en(&self) -> INT_EN_R { + INT_EN_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - pub fn dst_tr_width(&self) -> DstTrWidthR { - DstTrWidthR::new(((self.bits >> 1) & 7) as u8) + pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { + DST_TR_WIDTH_R::new(((self.bits >> 1) & 7) as u8) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - pub fn src_tr_width(&self) -> SrcTrWidthR { - SrcTrWidthR::new(((self.bits >> 4) & 7) as u8) + pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { + SRC_TR_WIDTH_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - pub fn dinc(&self) -> DincR { - DincR::new(((self.bits >> 7) & 3) as u8) + pub fn dinc(&self) -> DINC_R { + DINC_R::new(((self.bits >> 7) & 3) as u8) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - pub fn sinc(&self) -> SincR { - SincR::new(((self.bits >> 9) & 3) as u8) + pub fn sinc(&self) -> SINC_R { + SINC_R::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - pub fn dest_msize(&self) -> DestMsizeR { - DestMsizeR::new(((self.bits >> 11) & 7) as u8) + pub fn dest_msize(&self) -> DEST_MSIZE_R { + DEST_MSIZE_R::new(((self.bits >> 11) & 7) as u8) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - pub fn src_msize(&self) -> SrcMsizeR { - SrcMsizeR::new(((self.bits >> 14) & 7) as u8) + pub fn src_msize(&self) -> SRC_MSIZE_R { + SRC_MSIZE_R::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bit 17 - Source gather enable"] #[inline(always)] - pub fn src_gather_en(&self) -> SrcGatherEnR { - SrcGatherEnR::new(((self.bits >> 17) & 1) != 0) + pub fn src_gather_en(&self) -> SRC_GATHER_EN_R { + SRC_GATHER_EN_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination scatter enable"] #[inline(always)] - pub fn dst_scatter_en(&self) -> DstScatterEnR { - DstScatterEnR::new(((self.bits >> 18) & 1) != 0) + pub fn dst_scatter_en(&self) -> DST_SCATTER_EN_R { + DST_SCATTER_EN_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - pub fn tt_fc(&self) -> TtFcR { - TtFcR::new(((self.bits >> 20) & 7) as u8) + pub fn tt_fc(&self) -> TT_FC_R { + TT_FC_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bit 27 - Linked List Pointer for Destination Enable"] #[inline(always)] - pub fn llp_dst_en(&self) -> LlpDstEnR { - LlpDstEnR::new(((self.bits >> 27) & 1) != 0) + pub fn llp_dst_en(&self) -> LLP_DST_EN_R { + LLP_DST_EN_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Linked List Pointer for Source Enable"] #[inline(always)] - pub fn llp_src_en(&self) -> LlpSrcEnR { - LlpSrcEnR::new(((self.bits >> 28) & 1) != 0) + pub fn llp_src_en(&self) -> LLP_SRC_EN_R { + LLP_SRC_EN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] #[must_use] - pub fn int_en(&mut self) -> IntEnW { - IntEnW::new(self, 0) + pub fn int_en(&mut self) -> INT_EN_W { + INT_EN_W::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] #[must_use] - pub fn dst_tr_width(&mut self) -> DstTrWidthW { - DstTrWidthW::new(self, 1) + pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { + DST_TR_WIDTH_W::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] #[must_use] - pub fn src_tr_width(&mut self) -> SrcTrWidthW { - SrcTrWidthW::new(self, 4) + pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { + SRC_TR_WIDTH_W::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] #[must_use] - pub fn dinc(&mut self) -> DincW { - DincW::new(self, 7) + pub fn dinc(&mut self) -> DINC_W { + DINC_W::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] #[must_use] - pub fn sinc(&mut self) -> SincW { - SincW::new(self, 9) + pub fn sinc(&mut self) -> SINC_W { + SINC_W::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn dest_msize(&mut self) -> DestMsizeW { - DestMsizeW::new(self, 11) + pub fn dest_msize(&mut self) -> DEST_MSIZE_W { + DEST_MSIZE_W::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn src_msize(&mut self) -> SrcMsizeW { - SrcMsizeW::new(self, 14) + pub fn src_msize(&mut self) -> SRC_MSIZE_W { + SRC_MSIZE_W::new(self, 14) } #[doc = "Bit 17 - Source gather enable"] #[inline(always)] #[must_use] - pub fn src_gather_en(&mut self) -> SrcGatherEnW { - SrcGatherEnW::new(self, 17) + pub fn src_gather_en(&mut self) -> SRC_GATHER_EN_W { + SRC_GATHER_EN_W::new(self, 17) } #[doc = "Bit 18 - Destination scatter enable"] #[inline(always)] #[must_use] - pub fn dst_scatter_en(&mut self) -> DstScatterEnW { - DstScatterEnW::new(self, 18) + pub fn dst_scatter_en(&mut self) -> DST_SCATTER_EN_W { + DST_SCATTER_EN_W::new(self, 18) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] #[must_use] - pub fn tt_fc(&mut self) -> TtFcW { - TtFcW::new(self, 20) + pub fn tt_fc(&mut self) -> TT_FC_W { + TT_FC_W::new(self, 20) } #[doc = "Bit 27 - Linked List Pointer for Destination Enable"] #[inline(always)] #[must_use] - pub fn llp_dst_en(&mut self) -> LlpDstEnW { - LlpDstEnW::new(self, 27) + pub fn llp_dst_en(&mut self) -> LLP_DST_EN_W { + LLP_DST_EN_W::new(self, 27) } #[doc = "Bit 28 - Linked List Pointer for Source Enable"] #[inline(always)] #[must_use] - pub fn llp_src_en(&mut self) -> LlpSrcEnW { - LlpSrcEnW::new(self, 28) + pub fn llp_src_en(&mut self) -> LLP_SRC_EN_W { + LLP_SRC_EN_W::new(self, 28) } } #[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtllSpec; -impl crate::RegisterSpec for CtllSpec { +pub struct CTLL_SPEC; +impl crate::RegisterSpec for CTLL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctll::R`](R) reader structure"] -impl crate::Readable for CtllSpec {} +impl crate::Readable for CTLL_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctll::W`](W) writer structure"] -impl crate::Writable for CtllSpec { +impl crate::Writable for CTLL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLL to value 0x0030_4801"] -impl crate::Resettable for CtllSpec { +impl crate::Resettable for CTLL_SPEC { const RESET_VALUE: u32 = 0x0030_4801; } diff --git a/src/gpdma0_ch0/dar.rs b/src/gpdma0_ch0/dar.rs index c29a247f..3b87df70 100644 --- a/src/gpdma0_ch0/dar.rs +++ b/src/gpdma0_ch0/dar.rs @@ -1,40 +1,40 @@ #[doc = "Register `DAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAR` reader - Current Destination address of DMA transfer"] -pub type DarR = crate::FieldReader; +pub type DAR_R = crate::FieldReader; #[doc = "Field `DAR` writer - Current Destination address of DMA transfer"] -pub type DarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - pub fn dar(&self) -> DarR { - DarR::new(self.bits) + pub fn dar(&self) -> DAR_R { + DAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] #[must_use] - pub fn dar(&mut self) -> DarW { - DarW::new(self, 0) + pub fn dar(&mut self) -> DAR_W { + DAR_W::new(self, 0) } } #[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DarSpec; -impl crate::RegisterSpec for DarSpec { +pub struct DAR_SPEC; +impl crate::RegisterSpec for DAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dar::R`](R) reader structure"] -impl crate::Readable for DarSpec {} +impl crate::Readable for DAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dar::W`](W) writer structure"] -impl crate::Writable for DarSpec { +impl crate::Writable for DAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAR to value 0"] -impl crate::Resettable for DarSpec { +impl crate::Resettable for DAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dsr.rs b/src/gpdma0_ch0/dsr.rs index e8fb90ca..a1f6dff2 100644 --- a/src/gpdma0_ch0/dsr.rs +++ b/src/gpdma0_ch0/dsr.rs @@ -1,55 +1,55 @@ #[doc = "Register `DSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSI` reader - Destination scatter interval"] -pub type DsiR = crate::FieldReader; +pub type DSI_R = crate::FieldReader; #[doc = "Field `DSI` writer - Destination scatter interval"] -pub type DsiW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type DSI_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `DSC` reader - Destination scatter count"] -pub type DscR = crate::FieldReader; +pub type DSC_R = crate::FieldReader; #[doc = "Field `DSC` writer - Destination scatter count"] -pub type DscW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DSC_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:19 - Destination scatter interval"] #[inline(always)] - pub fn dsi(&self) -> DsiR { - DsiR::new(self.bits & 0x000f_ffff) + pub fn dsi(&self) -> DSI_R { + DSI_R::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:31 - Destination scatter count"] #[inline(always)] - pub fn dsc(&self) -> DscR { - DscR::new(((self.bits >> 20) & 0x0fff) as u16) + pub fn dsc(&self) -> DSC_R { + DSC_R::new(((self.bits >> 20) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:19 - Destination scatter interval"] #[inline(always)] #[must_use] - pub fn dsi(&mut self) -> DsiW { - DsiW::new(self, 0) + pub fn dsi(&mut self) -> DSI_W { + DSI_W::new(self, 0) } #[doc = "Bits 20:31 - Destination scatter count"] #[inline(always)] #[must_use] - pub fn dsc(&mut self) -> DscW { - DscW::new(self, 20) + pub fn dsc(&mut self) -> DSC_W { + DSC_W::new(self, 20) } } #[doc = "Destination Scatter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DsrSpec; -impl crate::RegisterSpec for DsrSpec { +pub struct DSR_SPEC; +impl crate::RegisterSpec for DSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dsr::R`](R) reader structure"] -impl crate::Readable for DsrSpec {} +impl crate::Readable for DSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dsr::W`](W) writer structure"] -impl crate::Writable for DsrSpec { +impl crate::Writable for DSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSR to value 0"] -impl crate::Resettable for DsrSpec { +impl crate::Resettable for DSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dstat.rs b/src/gpdma0_ch0/dstat.rs index b9c36c84..466d701d 100644 --- a/src/gpdma0_ch0/dstat.rs +++ b/src/gpdma0_ch0/dstat.rs @@ -1,40 +1,40 @@ #[doc = "Register `DSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSTAT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSTAT` reader - Destination Status"] -pub type DstatR = crate::FieldReader; +pub type DSTAT_R = crate::FieldReader; #[doc = "Field `DSTAT` writer - Destination Status"] -pub type DstatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DSTAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Status"] #[inline(always)] - pub fn dstat(&self) -> DstatR { - DstatR::new(self.bits) + pub fn dstat(&self) -> DSTAT_R { + DSTAT_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Status"] #[inline(always)] #[must_use] - pub fn dstat(&mut self) -> DstatW { - DstatW::new(self, 0) + pub fn dstat(&mut self) -> DSTAT_W { + DSTAT_W::new(self, 0) } } #[doc = "Destination Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DstatSpec; -impl crate::RegisterSpec for DstatSpec { +pub struct DSTAT_SPEC; +impl crate::RegisterSpec for DSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dstat::R`](R) reader structure"] -impl crate::Readable for DstatSpec {} +impl crate::Readable for DSTAT_SPEC {} #[doc = "`write(|w| ..)` method takes [`dstat::W`](W) writer structure"] -impl crate::Writable for DstatSpec { +impl crate::Writable for DSTAT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSTAT to value 0"] -impl crate::Resettable for DstatSpec { +impl crate::Resettable for DSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/dstatar.rs b/src/gpdma0_ch0/dstatar.rs index 50b3aa7a..88925a53 100644 --- a/src/gpdma0_ch0/dstatar.rs +++ b/src/gpdma0_ch0/dstatar.rs @@ -1,40 +1,40 @@ #[doc = "Register `DSTATAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSTATAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSTATAR` reader - Destination Status Address"] -pub type DstatarR = crate::FieldReader; +pub type DSTATAR_R = crate::FieldReader; #[doc = "Field `DSTATAR` writer - Destination Status Address"] -pub type DstatarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DSTATAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Destination Status Address"] #[inline(always)] - pub fn dstatar(&self) -> DstatarR { - DstatarR::new(self.bits) + pub fn dstatar(&self) -> DSTATAR_R { + DSTATAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Destination Status Address"] #[inline(always)] #[must_use] - pub fn dstatar(&mut self) -> DstatarW { - DstatarW::new(self, 0) + pub fn dstatar(&mut self) -> DSTATAR_W { + DSTATAR_W::new(self, 0) } } #[doc = "Destination Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DstatarSpec; -impl crate::RegisterSpec for DstatarSpec { +pub struct DSTATAR_SPEC; +impl crate::RegisterSpec for DSTATAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dstatar::R`](R) reader structure"] -impl crate::Readable for DstatarSpec {} +impl crate::Readable for DSTATAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dstatar::W`](W) writer structure"] -impl crate::Writable for DstatarSpec { +impl crate::Writable for DSTATAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSTATAR to value 0"] -impl crate::Resettable for DstatarSpec { +impl crate::Resettable for DSTATAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/llp.rs b/src/gpdma0_ch0/llp.rs index decbe30e..41d1027d 100644 --- a/src/gpdma0_ch0/llp.rs +++ b/src/gpdma0_ch0/llp.rs @@ -1,40 +1,40 @@ #[doc = "Register `LLP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LLP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LOC` reader - Starting Address In Memory"] -pub type LocR = crate::FieldReader; +pub type LOC_R = crate::FieldReader; #[doc = "Field `LOC` writer - Starting Address In Memory"] -pub type LocW<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; +pub type LOC_W<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>; impl R { #[doc = "Bits 2:31 - Starting Address In Memory"] #[inline(always)] - pub fn loc(&self) -> LocR { - LocR::new((self.bits >> 2) & 0x3fff_ffff) + pub fn loc(&self) -> LOC_R { + LOC_R::new((self.bits >> 2) & 0x3fff_ffff) } } impl W { #[doc = "Bits 2:31 - Starting Address In Memory"] #[inline(always)] #[must_use] - pub fn loc(&mut self) -> LocW { - LocW::new(self, 2) + pub fn loc(&mut self) -> LOC_W { + LOC_W::new(self, 2) } } #[doc = "Linked List Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`llp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`llp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LlpSpec; -impl crate::RegisterSpec for LlpSpec { +pub struct LLP_SPEC; +impl crate::RegisterSpec for LLP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`llp::R`](R) reader structure"] -impl crate::Readable for LlpSpec {} +impl crate::Readable for LLP_SPEC {} #[doc = "`write(|w| ..)` method takes [`llp::W`](W) writer structure"] -impl crate::Writable for LlpSpec { +impl crate::Writable for LLP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LLP to value 0"] -impl crate::Resettable for LlpSpec { +impl crate::Resettable for LLP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sar.rs b/src/gpdma0_ch0/sar.rs index cf5b145b..b69328d6 100644 --- a/src/gpdma0_ch0/sar.rs +++ b/src/gpdma0_ch0/sar.rs @@ -1,40 +1,40 @@ #[doc = "Register `SAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SAR` reader - Current Source Address of DMA transfer"] -pub type SarR = crate::FieldReader; +pub type SAR_R = crate::FieldReader; #[doc = "Field `SAR` writer - Current Source Address of DMA transfer"] -pub type SarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - pub fn sar(&self) -> SarR { - SarR::new(self.bits) + pub fn sar(&self) -> SAR_R { + SAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] #[must_use] - pub fn sar(&mut self) -> SarW { - SarW::new(self, 0) + pub fn sar(&mut self) -> SAR_W { + SAR_W::new(self, 0) } } #[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SarSpec; -impl crate::RegisterSpec for SarSpec { +pub struct SAR_SPEC; +impl crate::RegisterSpec for SAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sar::R`](R) reader structure"] -impl crate::Readable for SarSpec {} +impl crate::Readable for SAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sar::W`](W) writer structure"] -impl crate::Writable for SarSpec { +impl crate::Writable for SAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAR to value 0"] -impl crate::Resettable for SarSpec { +impl crate::Resettable for SAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sgr.rs b/src/gpdma0_ch0/sgr.rs index 69c6079a..0bc5870b 100644 --- a/src/gpdma0_ch0/sgr.rs +++ b/src/gpdma0_ch0/sgr.rs @@ -1,55 +1,55 @@ #[doc = "Register `SGR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SGR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SGI` reader - Source gather interval"] -pub type SgiR = crate::FieldReader; +pub type SGI_R = crate::FieldReader; #[doc = "Field `SGI` writer - Source gather interval"] -pub type SgiW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; +pub type SGI_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>; #[doc = "Field `SGC` reader - Source gather count"] -pub type SgcR = crate::FieldReader; +pub type SGC_R = crate::FieldReader; #[doc = "Field `SGC` writer - Source gather count"] -pub type SgcW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type SGC_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:19 - Source gather interval"] #[inline(always)] - pub fn sgi(&self) -> SgiR { - SgiR::new(self.bits & 0x000f_ffff) + pub fn sgi(&self) -> SGI_R { + SGI_R::new(self.bits & 0x000f_ffff) } #[doc = "Bits 20:31 - Source gather count"] #[inline(always)] - pub fn sgc(&self) -> SgcR { - SgcR::new(((self.bits >> 20) & 0x0fff) as u16) + pub fn sgc(&self) -> SGC_R { + SGC_R::new(((self.bits >> 20) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:19 - Source gather interval"] #[inline(always)] #[must_use] - pub fn sgi(&mut self) -> SgiW { - SgiW::new(self, 0) + pub fn sgi(&mut self) -> SGI_W { + SGI_W::new(self, 0) } #[doc = "Bits 20:31 - Source gather count"] #[inline(always)] #[must_use] - pub fn sgc(&mut self) -> SgcW { - SgcW::new(self, 20) + pub fn sgc(&mut self) -> SGC_W { + SGC_W::new(self, 20) } } #[doc = "Source Gather Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sgr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sgr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SgrSpec; -impl crate::RegisterSpec for SgrSpec { +pub struct SGR_SPEC; +impl crate::RegisterSpec for SGR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sgr::R`](R) reader structure"] -impl crate::Readable for SgrSpec {} +impl crate::Readable for SGR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sgr::W`](W) writer structure"] -impl crate::Writable for SgrSpec { +impl crate::Writable for SGR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SGR to value 0"] -impl crate::Resettable for SgrSpec { +impl crate::Resettable for SGR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sstat.rs b/src/gpdma0_ch0/sstat.rs index 8082f02d..ee59b76c 100644 --- a/src/gpdma0_ch0/sstat.rs +++ b/src/gpdma0_ch0/sstat.rs @@ -1,40 +1,40 @@ #[doc = "Register `SSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SSTAT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SSTAT` reader - Source Status"] -pub type SstatR = crate::FieldReader; +pub type SSTAT_R = crate::FieldReader; #[doc = "Field `SSTAT` writer - Source Status"] -pub type SstatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SSTAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Status"] #[inline(always)] - pub fn sstat(&self) -> SstatR { - SstatR::new(self.bits) + pub fn sstat(&self) -> SSTAT_R { + SSTAT_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Status"] #[inline(always)] #[must_use] - pub fn sstat(&mut self) -> SstatW { - SstatW::new(self, 0) + pub fn sstat(&mut self) -> SSTAT_W { + SSTAT_W::new(self, 0) } } #[doc = "Source Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SstatSpec; -impl crate::RegisterSpec for SstatSpec { +pub struct SSTAT_SPEC; +impl crate::RegisterSpec for SSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sstat::R`](R) reader structure"] -impl crate::Readable for SstatSpec {} +impl crate::Readable for SSTAT_SPEC {} #[doc = "`write(|w| ..)` method takes [`sstat::W`](W) writer structure"] -impl crate::Writable for SstatSpec { +impl crate::Writable for SSTAT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SSTAT to value 0"] -impl crate::Resettable for SstatSpec { +impl crate::Resettable for SSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch0/sstatar.rs b/src/gpdma0_ch0/sstatar.rs index cbf9847c..1e8ea1d7 100644 --- a/src/gpdma0_ch0/sstatar.rs +++ b/src/gpdma0_ch0/sstatar.rs @@ -1,40 +1,40 @@ #[doc = "Register `SSTATAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SSTATAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SSTATAR` reader - Source Status Address"] -pub type SstatarR = crate::FieldReader; +pub type SSTATAR_R = crate::FieldReader; #[doc = "Field `SSTATAR` writer - Source Status Address"] -pub type SstatarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SSTATAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Source Status Address"] #[inline(always)] - pub fn sstatar(&self) -> SstatarR { - SstatarR::new(self.bits) + pub fn sstatar(&self) -> SSTATAR_R { + SSTATAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Source Status Address"] #[inline(always)] #[must_use] - pub fn sstatar(&mut self) -> SstatarW { - SstatarW::new(self, 0) + pub fn sstatar(&mut self) -> SSTATAR_W { + SSTATAR_W::new(self, 0) } } #[doc = "Source Status Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sstatar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sstatar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SstatarSpec; -impl crate::RegisterSpec for SstatarSpec { +pub struct SSTATAR_SPEC; +impl crate::RegisterSpec for SSTATAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sstatar::R`](R) reader structure"] -impl crate::Readable for SstatarSpec {} +impl crate::Readable for SSTATAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sstatar::W`](W) writer structure"] -impl crate::Writable for SstatarSpec { +impl crate::Writable for SSTATAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SSTATAR to value 0"] -impl crate::Resettable for SstatarSpec { +impl crate::Resettable for SSTATAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch2.rs b/src/gpdma0_ch2.rs index 6850653c..f89803ec 100644 --- a/src/gpdma0_ch2.rs +++ b/src/gpdma0_ch2.rs @@ -1,81 +1,75 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - sar: Sar, + sar: SAR, _reserved1: [u8; 0x04], - dar: Dar, + dar: DAR, _reserved2: [u8; 0x0c], - ctll: Ctll, - ctlh: Ctlh, + ctll: CTLL, + ctlh: CTLH, _reserved4: [u8; 0x20], - cfgl: Cfgl, - cfgh: Cfgh, + cfgl: CFGL, + cfgh: CFGH, } impl RegisterBlock { #[doc = "0x00 - Source Address Register"] #[inline(always)] - pub const fn sar(&self) -> &Sar { + pub const fn sar(&self) -> &SAR { &self.sar } #[doc = "0x08 - Destination Address Register"] #[inline(always)] - pub const fn dar(&self) -> &Dar { + pub const fn dar(&self) -> &DAR { &self.dar } #[doc = "0x18 - Control Register Low"] #[inline(always)] - pub const fn ctll(&self) -> &Ctll { + pub const fn ctll(&self) -> &CTLL { &self.ctll } #[doc = "0x1c - Control Register High"] #[inline(always)] - pub const fn ctlh(&self) -> &Ctlh { + pub const fn ctlh(&self) -> &CTLH { &self.ctlh } #[doc = "0x40 - Configuration Register Low"] #[inline(always)] - pub const fn cfgl(&self) -> &Cfgl { + pub const fn cfgl(&self) -> &CFGL { &self.cfgl } #[doc = "0x44 - Configuration Register High"] #[inline(always)] - pub const fn cfgh(&self) -> &Cfgh { + pub const fn cfgh(&self) -> &CFGH { &self.cfgh } } #[doc = "SAR (rw) register accessor: Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar`] module"] -#[doc(alias = "SAR")] -pub type Sar = crate::Reg; +pub type SAR = crate::Reg; #[doc = "Source Address Register"] pub mod sar; #[doc = "DAR (rw) register accessor: Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dar`] module"] -#[doc(alias = "DAR")] -pub type Dar = crate::Reg; +pub type DAR = crate::Reg; #[doc = "Destination Address Register"] pub mod dar; #[doc = "CTLL (rw) register accessor: Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctll`] module"] -#[doc(alias = "CTLL")] -pub type Ctll = crate::Reg; +pub type CTLL = crate::Reg; #[doc = "Control Register Low"] pub mod ctll; #[doc = "CTLH (rw) register accessor: Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctlh`] module"] -#[doc(alias = "CTLH")] -pub type Ctlh = crate::Reg; +pub type CTLH = crate::Reg; #[doc = "Control Register High"] pub mod ctlh; #[doc = "CFGL (rw) register accessor: Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgl`] module"] -#[doc(alias = "CFGL")] -pub type Cfgl = crate::Reg; +pub type CFGL = crate::Reg; #[doc = "Configuration Register Low"] pub mod cfgl; #[doc = "CFGH (rw) register accessor: Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfgh`] module"] -#[doc(alias = "CFGH")] -pub type Cfgh = crate::Reg; +pub type CFGH = crate::Reg; #[doc = "Configuration Register High"] pub mod cfgh; diff --git a/src/gpdma0_ch2/cfgh.rs b/src/gpdma0_ch2/cfgh.rs index 32adc452..45ce891b 100644 --- a/src/gpdma0_ch2/cfgh.rs +++ b/src/gpdma0_ch2/cfgh.rs @@ -1,198 +1,198 @@ #[doc = "Register `CFGH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Flow Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcmode { +pub enum FCMODE_A { #[doc = "0: Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcmode) -> Self { + fn from(variant: FCMODE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCMODE` reader - Flow Control Mode"] -pub type FcmodeR = crate::BitReader; -impl FcmodeR { +pub type FCMODE_R = crate::BitReader; +impl FCMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcmode { + pub const fn variant(&self) -> FCMODE_A { match self.bits { - false => Fcmode::Value1, - true => Fcmode::Value2, + false => FCMODE_A::VALUE1, + true => FCMODE_A::VALUE2, } } #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcmode::Value1 + *self == FCMODE_A::VALUE1 } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcmode::Value2 + *self == FCMODE_A::VALUE2 } } #[doc = "Field `FCMODE` writer - Flow Control Mode"] -pub type FcmodeW<'a, REG> = crate::BitWriter<'a, REG, Fcmode>; -impl<'a, REG> FcmodeW<'a, REG> +pub type FCMODE_W<'a, REG> = crate::BitWriter<'a, REG, FCMODE_A>; +impl<'a, REG> FCMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Source transaction requests are serviced when they occur. Data pre-fetching is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fcmode::Value1) + self.variant(FCMODE_A::VALUE1) } #[doc = "Source transaction requests are not serviced until a destination transaction request occurs. In this mode, the amount of data transferred from the source is limited so that it is guaranteed to be transferred to the destination prior to block termination by the destination. Data pre-fetching is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fcmode::Value2) + self.variant(FCMODE_A::VALUE2) } } #[doc = "FIFO Mode Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FifoMode { +pub enum FIFO_MODE_A { #[doc = "0: Space/data available for single AHB transfer of the specified transfer width."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FifoMode) -> Self { + fn from(variant: FIFO_MODE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFO_MODE` reader - FIFO Mode Select"] -pub type FifoModeR = crate::BitReader; -impl FifoModeR { +pub type FIFO_MODE_R = crate::BitReader; +impl FIFO_MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FifoMode { + pub const fn variant(&self) -> FIFO_MODE_A { match self.bits { - false => FifoMode::Value1, - true => FifoMode::Value2, + false => FIFO_MODE_A::VALUE1, + true => FIFO_MODE_A::VALUE2, } } #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FifoMode::Value1 + *self == FIFO_MODE_A::VALUE1 } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FifoMode::Value2 + *self == FIFO_MODE_A::VALUE2 } } #[doc = "Field `FIFO_MODE` writer - FIFO Mode Select"] -pub type FifoModeW<'a, REG> = crate::BitWriter<'a, REG, FifoMode>; -impl<'a, REG> FifoModeW<'a, REG> +pub type FIFO_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FIFO_MODE_A>; +impl<'a, REG> FIFO_MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Space/data available for single AHB transfer of the specified transfer width."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(FifoMode::Value1) + self.variant(FIFO_MODE_A::VALUE1) } #[doc = "Data available is greater than or equal to half the FIFO depth for destination transfers and space available is greater than half the fifo depth for source transfers. The exceptions are at the end of a burst transaction request or at the end of a block transfer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(FifoMode::Value2) + self.variant(FIFO_MODE_A::VALUE2) } } #[doc = "Field `PROTCTL` reader - Protection Control"] -pub type ProtctlR = crate::FieldReader; +pub type PROTCTL_R = crate::FieldReader; #[doc = "Field `PROTCTL` writer - Protection Control"] -pub type ProtctlW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PROTCTL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_PER` reader - Source Peripheral"] -pub type SrcPerR = crate::FieldReader; +pub type SRC_PER_R = crate::FieldReader; #[doc = "Field `SRC_PER` writer - Source Peripheral"] -pub type SrcPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `DEST_PER` reader - Destination Peripheral"] -pub type DestPerR = crate::FieldReader; +pub type DEST_PER_R = crate::FieldReader; #[doc = "Field `DEST_PER` writer - Destination Peripheral"] -pub type DestPerW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DEST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - pub fn fcmode(&self) -> FcmodeR { - FcmodeR::new((self.bits & 1) != 0) + pub fn fcmode(&self) -> FCMODE_R { + FCMODE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - pub fn fifo_mode(&self) -> FifoModeR { - FifoModeR::new(((self.bits >> 1) & 1) != 0) + pub fn fifo_mode(&self) -> FIFO_MODE_R { + FIFO_MODE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - pub fn protctl(&self) -> ProtctlR { - ProtctlR::new(((self.bits >> 2) & 7) as u8) + pub fn protctl(&self) -> PROTCTL_R { + PROTCTL_R::new(((self.bits >> 2) & 7) as u8) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - pub fn src_per(&self) -> SrcPerR { - SrcPerR::new(((self.bits >> 7) & 0x0f) as u8) + pub fn src_per(&self) -> SRC_PER_R { + SRC_PER_R::new(((self.bits >> 7) & 0x0f) as u8) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - pub fn dest_per(&self) -> DestPerR { - DestPerR::new(((self.bits >> 11) & 0x0f) as u8) + pub fn dest_per(&self) -> DEST_PER_R { + DEST_PER_R::new(((self.bits >> 11) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] #[must_use] - pub fn fcmode(&mut self) -> FcmodeW { - FcmodeW::new(self, 0) + pub fn fcmode(&mut self) -> FCMODE_W { + FCMODE_W::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] #[must_use] - pub fn fifo_mode(&mut self) -> FifoModeW { - FifoModeW::new(self, 1) + pub fn fifo_mode(&mut self) -> FIFO_MODE_W { + FIFO_MODE_W::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] #[must_use] - pub fn protctl(&mut self) -> ProtctlW { - ProtctlW::new(self, 2) + pub fn protctl(&mut self) -> PROTCTL_W { + PROTCTL_W::new(self, 2) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] #[must_use] - pub fn src_per(&mut self) -> SrcPerW { - SrcPerW::new(self, 7) + pub fn src_per(&mut self) -> SRC_PER_W { + SRC_PER_W::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] #[must_use] - pub fn dest_per(&mut self) -> DestPerW { - DestPerW::new(self, 11) + pub fn dest_per(&mut self) -> DEST_PER_W { + DEST_PER_W::new(self, 11) } } #[doc = "Configuration Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfghSpec; -impl crate::RegisterSpec for CfghSpec { +pub struct CFGH_SPEC; +impl crate::RegisterSpec for CFGH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfgh::R`](R) reader structure"] -impl crate::Readable for CfghSpec {} +impl crate::Readable for CFGH_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfgh::W`](W) writer structure"] -impl crate::Writable for CfghSpec { +impl crate::Writable for CFGH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGH to value 0x04"] -impl crate::Resettable for CfghSpec { +impl crate::Resettable for CFGH_SPEC { const RESET_VALUE: u32 = 0x04; } diff --git a/src/gpdma0_ch2/cfgl.rs b/src/gpdma0_ch2/cfgl.rs index cbb83736..a81ebc10 100644 --- a/src/gpdma0_ch2/cfgl.rs +++ b/src/gpdma0_ch2/cfgl.rs @@ -1,259 +1,259 @@ #[doc = "Register `CFGL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFGL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CH_PRIOR` reader - Channel priority"] -pub type ChPriorR = crate::FieldReader; +pub type CH_PRIOR_R = crate::FieldReader; #[doc = "Field `CH_PRIOR` writer - Channel priority"] -pub type ChPriorW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Channel Suspend\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ChSusp { +pub enum CH_SUSP_A { #[doc = "0: Not suspended."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Suspend DMA transfer from the source."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ChSusp) -> Self { + fn from(variant: CH_SUSP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CH_SUSP` reader - Channel Suspend"] -pub type ChSuspR = crate::BitReader; -impl ChSuspR { +pub type CH_SUSP_R = crate::BitReader; +impl CH_SUSP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ChSusp { + pub const fn variant(&self) -> CH_SUSP_A { match self.bits { - false => ChSusp::Value1, - true => ChSusp::Value2, + false => CH_SUSP_A::VALUE1, + true => CH_SUSP_A::VALUE2, } } #[doc = "Not suspended."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ChSusp::Value1 + *self == CH_SUSP_A::VALUE1 } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ChSusp::Value2 + *self == CH_SUSP_A::VALUE2 } } #[doc = "Field `CH_SUSP` writer - Channel Suspend"] -pub type ChSuspW<'a, REG> = crate::BitWriter<'a, REG, ChSusp>; -impl<'a, REG> ChSuspW<'a, REG> +pub type CH_SUSP_W<'a, REG> = crate::BitWriter<'a, REG, CH_SUSP_A>; +impl<'a, REG> CH_SUSP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not suspended."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ChSusp::Value1) + self.variant(CH_SUSP_A::VALUE1) } #[doc = "Suspend DMA transfer from the source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ChSusp::Value2) + self.variant(CH_SUSP_A::VALUE2) } } #[doc = "Indicates if there is data left in the channel FIFO\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum FifoEmpty { +pub enum FIFO_EMPTY_A { #[doc = "1: Channel FIFO empty"] - Value1 = 1, + VALUE1 = 1, #[doc = "0: Channel FIFO not empty"] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: FifoEmpty) -> Self { + fn from(variant: FIFO_EMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FIFO_EMPTY` reader - Indicates if there is data left in the channel FIFO"] -pub type FifoEmptyR = crate::BitReader; -impl FifoEmptyR { +pub type FIFO_EMPTY_R = crate::BitReader; +impl FIFO_EMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> FifoEmpty { + pub const fn variant(&self) -> FIFO_EMPTY_A { match self.bits { - true => FifoEmpty::Value1, - false => FifoEmpty::Value2, + true => FIFO_EMPTY_A::VALUE1, + false => FIFO_EMPTY_A::VALUE2, } } #[doc = "Channel FIFO empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == FifoEmpty::Value1 + *self == FIFO_EMPTY_A::VALUE1 } #[doc = "Channel FIFO not empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == FifoEmpty::Value2 + *self == FIFO_EMPTY_A::VALUE2 } } #[doc = "Destination Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HsSelDst { +pub enum HS_SEL_DST_A { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Software handshaking interface. Hardware- initiated transaction requests are ignored."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HsSelDst) -> Self { + fn from(variant: HS_SEL_DST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HS_SEL_DST` reader - Destination Software or Hardware Handshaking Select"] -pub type HsSelDstR = crate::BitReader; -impl HsSelDstR { +pub type HS_SEL_DST_R = crate::BitReader; +impl HS_SEL_DST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HsSelDst { + pub const fn variant(&self) -> HS_SEL_DST_A { match self.bits { - false => HsSelDst::Value1, - true => HsSelDst::Value2, + false => HS_SEL_DST_A::VALUE1, + true => HS_SEL_DST_A::VALUE2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HsSelDst::Value1 + *self == HS_SEL_DST_A::VALUE1 } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HsSelDst::Value2 + *self == HS_SEL_DST_A::VALUE2 } } #[doc = "Field `HS_SEL_DST` writer - Destination Software or Hardware Handshaking Select"] -pub type HsSelDstW<'a, REG> = crate::BitWriter<'a, REG, HsSelDst>; -impl<'a, REG> HsSelDstW<'a, REG> +pub type HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_DST_A>; +impl<'a, REG> HS_SEL_DST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HsSelDst::Value1) + self.variant(HS_SEL_DST_A::VALUE1) } #[doc = "Software handshaking interface. Hardware- initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HsSelDst::Value2) + self.variant(HS_SEL_DST_A::VALUE2) } } #[doc = "Source Software or Hardware Handshaking Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum HsSelSrc { +pub enum HS_SEL_SRC_A { #[doc = "0: Hardware handshaking interface. Software-initiated transaction requests are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Software handshaking interface. Hardware-initiated transaction requests are ignored."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: HsSelSrc) -> Self { + fn from(variant: HS_SEL_SRC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HS_SEL_SRC` reader - Source Software or Hardware Handshaking Select"] -pub type HsSelSrcR = crate::BitReader; -impl HsSelSrcR { +pub type HS_SEL_SRC_R = crate::BitReader; +impl HS_SEL_SRC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> HsSelSrc { + pub const fn variant(&self) -> HS_SEL_SRC_A { match self.bits { - false => HsSelSrc::Value1, - true => HsSelSrc::Value2, + false => HS_SEL_SRC_A::VALUE1, + true => HS_SEL_SRC_A::VALUE2, } } #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HsSelSrc::Value1 + *self == HS_SEL_SRC_A::VALUE1 } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HsSelSrc::Value2 + *self == HS_SEL_SRC_A::VALUE2 } } #[doc = "Field `HS_SEL_SRC` writer - Source Software or Hardware Handshaking Select"] -pub type HsSelSrcW<'a, REG> = crate::BitWriter<'a, REG, HsSelSrc>; -impl<'a, REG> HsSelSrcW<'a, REG> +pub type HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG, HS_SEL_SRC_A>; +impl<'a, REG> HS_SEL_SRC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hardware handshaking interface. Software-initiated transaction requests are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HsSelSrc::Value1) + self.variant(HS_SEL_SRC_A::VALUE1) } #[doc = "Software handshaking interface. Hardware-initiated transaction requests are ignored."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HsSelSrc::Value2) + self.variant(HS_SEL_SRC_A::VALUE2) } } #[doc = "Channel Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LockChL { +pub enum LOCK_CH_L_A { #[doc = "0: Over complete DMA transfer"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Over complete DMA block transfer"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Over complete DMA transaction"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LockChL) -> Self { + fn from(variant: LOCK_CH_L_A) -> Self { variant as _ } } -impl crate::FieldSpec for LockChL { +impl crate::FieldSpec for LOCK_CH_L_A { type Ux = u8; } -impl crate::IsEnum for LockChL {} +impl crate::IsEnum for LOCK_CH_L_A {} #[doc = "Field `LOCK_CH_L` reader - Channel Lock Level"] -pub type LockChLR = crate::FieldReader; -impl LockChLR { +pub type LOCK_CH_L_R = crate::FieldReader; +impl LOCK_CH_L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LockChL::Value1), - 1 => Some(LockChL::Value2), - 2 => Some(LockChL::Value3), + 0 => Some(LOCK_CH_L_A::VALUE1), + 1 => Some(LOCK_CH_L_A::VALUE2), + 2 => Some(LOCK_CH_L_A::VALUE3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LockChL::Value1 + *self == LOCK_CH_L_A::VALUE1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LockChL::Value2 + *self == LOCK_CH_L_A::VALUE2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LockChL::Value3 + *self == LOCK_CH_L_A::VALUE3 } } #[doc = "Field `LOCK_CH_L` writer - Channel Lock Level"] -pub type LockChLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockChL>; -impl<'a, REG> LockChLW<'a, REG> +pub type LOCK_CH_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_CH_L_A>; +impl<'a, REG> LOCK_CH_L_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -261,72 +261,72 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LockChL::Value1) + self.variant(LOCK_CH_L_A::VALUE1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LockChL::Value2) + self.variant(LOCK_CH_L_A::VALUE2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LockChL::Value3) + self.variant(LOCK_CH_L_A::VALUE3) } } #[doc = "Bus Lock Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum LockBL { +pub enum LOCK_B_L_A { #[doc = "0: Over complete DMA transfer"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Over complete DMA block transfer"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Over complete DMA transaction"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: LockBL) -> Self { + fn from(variant: LOCK_B_L_A) -> Self { variant as _ } } -impl crate::FieldSpec for LockBL { +impl crate::FieldSpec for LOCK_B_L_A { type Ux = u8; } -impl crate::IsEnum for LockBL {} +impl crate::IsEnum for LOCK_B_L_A {} #[doc = "Field `LOCK_B_L` reader - Bus Lock Level"] -pub type LockBLR = crate::FieldReader; -impl LockBLR { +pub type LOCK_B_L_R = crate::FieldReader; +impl LOCK_B_L_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(LockBL::Value1), - 1 => Some(LockBL::Value2), - 2 => Some(LockBL::Value3), + 0 => Some(LOCK_B_L_A::VALUE1), + 1 => Some(LOCK_B_L_A::VALUE2), + 2 => Some(LOCK_B_L_A::VALUE3), _ => None, } } #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == LockBL::Value1 + *self == LOCK_B_L_A::VALUE1 } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == LockBL::Value2 + *self == LOCK_B_L_A::VALUE2 } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == LockBL::Value3 + *self == LOCK_B_L_A::VALUE3 } } #[doc = "Field `LOCK_B_L` writer - Bus Lock Level"] -pub type LockBLW<'a, REG> = crate::FieldWriter<'a, REG, 2, LockBL>; -impl<'a, REG> LockBLW<'a, REG> +pub type LOCK_B_L_W<'a, REG> = crate::FieldWriter<'a, REG, 2, LOCK_B_L_A>; +impl<'a, REG> LOCK_B_L_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -334,281 +334,281 @@ where #[doc = "Over complete DMA transfer"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(LockBL::Value1) + self.variant(LOCK_B_L_A::VALUE1) } #[doc = "Over complete DMA block transfer"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(LockBL::Value2) + self.variant(LOCK_B_L_A::VALUE2) } #[doc = "Over complete DMA transaction"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(LockBL::Value3) + self.variant(LOCK_B_L_A::VALUE3) } } #[doc = "Field `LOCK_CH` reader - Channel Lock Bit"] -pub type LockChR = crate::BitReader; +pub type LOCK_CH_R = crate::BitReader; #[doc = "Field `LOCK_CH` writer - Channel Lock Bit"] -pub type LockChW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LOCK_CH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LOCK_B` reader - Bus Lock Bit"] -pub type LockBR = crate::BitReader; +pub type LOCK_B_R = crate::BitReader; #[doc = "Field `LOCK_B` writer - Bus Lock Bit"] -pub type LockBW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LOCK_B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Destination Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum DstHsPol { +pub enum DST_HS_POL_A { #[doc = "0: Active high"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active low"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: DstHsPol) -> Self { + fn from(variant: DST_HS_POL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DST_HS_POL` reader - Destination Handshaking Interface Polarity"] -pub type DstHsPolR = crate::BitReader; -impl DstHsPolR { +pub type DST_HS_POL_R = crate::BitReader; +impl DST_HS_POL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> DstHsPol { + pub const fn variant(&self) -> DST_HS_POL_A { match self.bits { - false => DstHsPol::Value1, - true => DstHsPol::Value2, + false => DST_HS_POL_A::VALUE1, + true => DST_HS_POL_A::VALUE2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == DstHsPol::Value1 + *self == DST_HS_POL_A::VALUE1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == DstHsPol::Value2 + *self == DST_HS_POL_A::VALUE2 } } #[doc = "Field `DST_HS_POL` writer - Destination Handshaking Interface Polarity"] -pub type DstHsPolW<'a, REG> = crate::BitWriter<'a, REG, DstHsPol>; -impl<'a, REG> DstHsPolW<'a, REG> +pub type DST_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, DST_HS_POL_A>; +impl<'a, REG> DST_HS_POL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(DstHsPol::Value1) + self.variant(DST_HS_POL_A::VALUE1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(DstHsPol::Value2) + self.variant(DST_HS_POL_A::VALUE2) } } #[doc = "Source Handshaking Interface Polarity\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SrcHsPol { +pub enum SRC_HS_POL_A { #[doc = "0: Active high"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active low"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SrcHsPol) -> Self { + fn from(variant: SRC_HS_POL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRC_HS_POL` reader - Source Handshaking Interface Polarity"] -pub type SrcHsPolR = crate::BitReader; -impl SrcHsPolR { +pub type SRC_HS_POL_R = crate::BitReader; +impl SRC_HS_POL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SrcHsPol { + pub const fn variant(&self) -> SRC_HS_POL_A { match self.bits { - false => SrcHsPol::Value1, - true => SrcHsPol::Value2, + false => SRC_HS_POL_A::VALUE1, + true => SRC_HS_POL_A::VALUE2, } } #[doc = "Active high"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SrcHsPol::Value1 + *self == SRC_HS_POL_A::VALUE1 } #[doc = "Active low"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SrcHsPol::Value2 + *self == SRC_HS_POL_A::VALUE2 } } #[doc = "Field `SRC_HS_POL` writer - Source Handshaking Interface Polarity"] -pub type SrcHsPolW<'a, REG> = crate::BitWriter<'a, REG, SrcHsPol>; -impl<'a, REG> SrcHsPolW<'a, REG> +pub type SRC_HS_POL_W<'a, REG> = crate::BitWriter<'a, REG, SRC_HS_POL_A>; +impl<'a, REG> SRC_HS_POL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active high"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SrcHsPol::Value1) + self.variant(SRC_HS_POL_A::VALUE1) } #[doc = "Active low"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SrcHsPol::Value2) + self.variant(SRC_HS_POL_A::VALUE2) } } #[doc = "Field `MAX_ABRST` reader - Maximum AMBA Burst Length"] -pub type MaxAbrstR = crate::FieldReader; +pub type MAX_ABRST_R = crate::FieldReader; #[doc = "Field `MAX_ABRST` writer - Maximum AMBA Burst Length"] -pub type MaxAbrstW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type MAX_ABRST_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - pub fn ch_prior(&self) -> ChPriorR { - ChPriorR::new(((self.bits >> 5) & 7) as u8) + pub fn ch_prior(&self) -> CH_PRIOR_R { + CH_PRIOR_R::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - pub fn ch_susp(&self) -> ChSuspR { - ChSuspR::new(((self.bits >> 8) & 1) != 0) + pub fn ch_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Indicates if there is data left in the channel FIFO"] #[inline(always)] - pub fn fifo_empty(&self) -> FifoEmptyR { - FifoEmptyR::new(((self.bits >> 9) & 1) != 0) + pub fn fifo_empty(&self) -> FIFO_EMPTY_R { + FIFO_EMPTY_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HsSelDstR { - HsSelDstR::new(((self.bits >> 10) & 1) != 0) + pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { + HS_SEL_DST_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - pub fn hs_sel_src(&self) -> HsSelSrcR { - HsSelSrcR::new(((self.bits >> 11) & 1) != 0) + pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { + HS_SEL_SRC_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - pub fn lock_ch_l(&self) -> LockChLR { - LockChLR::new(((self.bits >> 12) & 3) as u8) + pub fn lock_ch_l(&self) -> LOCK_CH_L_R { + LOCK_CH_L_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - pub fn lock_b_l(&self) -> LockBLR { - LockBLR::new(((self.bits >> 14) & 3) as u8) + pub fn lock_b_l(&self) -> LOCK_B_L_R { + LOCK_B_L_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - pub fn lock_ch(&self) -> LockChR { - LockChR::new(((self.bits >> 16) & 1) != 0) + pub fn lock_ch(&self) -> LOCK_CH_R { + LOCK_CH_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - pub fn lock_b(&self) -> LockBR { - LockBR::new(((self.bits >> 17) & 1) != 0) + pub fn lock_b(&self) -> LOCK_B_R { + LOCK_B_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - pub fn dst_hs_pol(&self) -> DstHsPolR { - DstHsPolR::new(((self.bits >> 18) & 1) != 0) + pub fn dst_hs_pol(&self) -> DST_HS_POL_R { + DST_HS_POL_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - pub fn src_hs_pol(&self) -> SrcHsPolR { - SrcHsPolR::new(((self.bits >> 19) & 1) != 0) + pub fn src_hs_pol(&self) -> SRC_HS_POL_R { + SRC_HS_POL_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - pub fn max_abrst(&self) -> MaxAbrstR { - MaxAbrstR::new(((self.bits >> 20) & 0x03ff) as u16) + pub fn max_abrst(&self) -> MAX_ABRST_R { + MAX_ABRST_R::new(((self.bits >> 20) & 0x03ff) as u16) } } impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] #[must_use] - pub fn ch_prior(&mut self) -> ChPriorW { - ChPriorW::new(self, 5) + pub fn ch_prior(&mut self) -> CH_PRIOR_W { + CH_PRIOR_W::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] #[must_use] - pub fn ch_susp(&mut self) -> ChSuspW { - ChSuspW::new(self, 8) + pub fn ch_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_dst(&mut self) -> HsSelDstW { - HsSelDstW::new(self, 10) + pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { + HS_SEL_DST_W::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] #[must_use] - pub fn hs_sel_src(&mut self) -> HsSelSrcW { - HsSelSrcW::new(self, 11) + pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { + HS_SEL_SRC_W::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] #[must_use] - pub fn lock_ch_l(&mut self) -> LockChLW { - LockChLW::new(self, 12) + pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { + LOCK_CH_L_W::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] #[must_use] - pub fn lock_b_l(&mut self) -> LockBLW { - LockBLW::new(self, 14) + pub fn lock_b_l(&mut self) -> LOCK_B_L_W { + LOCK_B_L_W::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_ch(&mut self) -> LockChW { - LockChW::new(self, 16) + pub fn lock_ch(&mut self) -> LOCK_CH_W { + LOCK_CH_W::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] #[must_use] - pub fn lock_b(&mut self) -> LockBW { - LockBW::new(self, 17) + pub fn lock_b(&mut self) -> LOCK_B_W { + LOCK_B_W::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn dst_hs_pol(&mut self) -> DstHsPolW { - DstHsPolW::new(self, 18) + pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { + DST_HS_POL_W::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] #[must_use] - pub fn src_hs_pol(&mut self) -> SrcHsPolW { - SrcHsPolW::new(self, 19) + pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { + SRC_HS_POL_W::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] #[must_use] - pub fn max_abrst(&mut self) -> MaxAbrstW { - MaxAbrstW::new(self, 20) + pub fn max_abrst(&mut self) -> MAX_ABRST_W { + MAX_ABRST_W::new(self, 20) } } #[doc = "Configuration Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfgl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfgl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfglSpec; -impl crate::RegisterSpec for CfglSpec { +pub struct CFGL_SPEC; +impl crate::RegisterSpec for CFGL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfgl::R`](R) reader structure"] -impl crate::Readable for CfglSpec {} +impl crate::Readable for CFGL_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfgl::W`](W) writer structure"] -impl crate::Writable for CfglSpec { +impl crate::Writable for CFGL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFGL to value 0x0e00"] -impl crate::Resettable for CfglSpec { +impl crate::Resettable for CFGL_SPEC { const RESET_VALUE: u32 = 0x0e00; } diff --git a/src/gpdma0_ch2/ctlh.rs b/src/gpdma0_ch2/ctlh.rs index 828a2d1a..624dc573 100644 --- a/src/gpdma0_ch2/ctlh.rs +++ b/src/gpdma0_ch2/ctlh.rs @@ -1,55 +1,55 @@ #[doc = "Register `CTLH` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLH` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLOCK_TS` reader - Block Transfer Size"] -pub type BlockTsR = crate::FieldReader; +pub type BLOCK_TS_R = crate::FieldReader; #[doc = "Field `BLOCK_TS` writer - Block Transfer Size"] -pub type BlockTsW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BLOCK_TS_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `DONE` reader - Done bit"] -pub type DoneR = crate::BitReader; +pub type DONE_R = crate::BitReader; #[doc = "Field `DONE` writer - Done bit"] -pub type DoneW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DONE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - pub fn block_ts(&self) -> BlockTsR { - BlockTsR::new((self.bits & 0x0fff) as u16) + pub fn block_ts(&self) -> BLOCK_TS_R { + BLOCK_TS_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - pub fn done(&self) -> DoneR { - DoneR::new(((self.bits >> 12) & 1) != 0) + pub fn done(&self) -> DONE_R { + DONE_R::new(((self.bits >> 12) & 1) != 0) } } impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] #[must_use] - pub fn block_ts(&mut self) -> BlockTsW { - BlockTsW::new(self, 0) + pub fn block_ts(&mut self) -> BLOCK_TS_W { + BLOCK_TS_W::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] #[must_use] - pub fn done(&mut self) -> DoneW { - DoneW::new(self, 12) + pub fn done(&mut self) -> DONE_W { + DONE_W::new(self, 12) } } #[doc = "Control Register High\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctlh::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctlh::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtlhSpec; -impl crate::RegisterSpec for CtlhSpec { +pub struct CTLH_SPEC; +impl crate::RegisterSpec for CTLH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctlh::R`](R) reader structure"] -impl crate::Readable for CtlhSpec {} +impl crate::Readable for CTLH_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctlh::W`](W) writer structure"] -impl crate::Writable for CtlhSpec { +impl crate::Writable for CTLH_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLH to value 0x02"] -impl crate::Resettable for CtlhSpec { +impl crate::Resettable for CTLH_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/gpdma0_ch2/ctll.rs b/src/gpdma0_ch2/ctll.rs index f20691be..97a04bac 100644 --- a/src/gpdma0_ch2/ctll.rs +++ b/src/gpdma0_ch2/ctll.rs @@ -1,72 +1,72 @@ #[doc = "Register `CTLL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTLL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INT_EN` reader - Interrupt Enable Bit"] -pub type IntEnR = crate::BitReader; +pub type INT_EN_R = crate::BitReader; #[doc = "Field `INT_EN` writer - Interrupt Enable Bit"] -pub type IntEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INT_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DST_TR_WIDTH` reader - Destination Transfer Width"] -pub type DstTrWidthR = crate::FieldReader; +pub type DST_TR_WIDTH_R = crate::FieldReader; #[doc = "Field `DST_TR_WIDTH` writer - Destination Transfer Width"] -pub type DstTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DST_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_TR_WIDTH` reader - Source Transfer Width"] -pub type SrcTrWidthR = crate::FieldReader; +pub type SRC_TR_WIDTH_R = crate::FieldReader; #[doc = "Field `SRC_TR_WIDTH` writer - Source Transfer Width"] -pub type SrcTrWidthW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SRC_TR_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Destination Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dinc { +pub enum DINC_A { #[doc = "0: Increment"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Decrement"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: No change"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dinc) -> Self { + fn from(variant: DINC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dinc { +impl crate::FieldSpec for DINC_A { type Ux = u8; } -impl crate::IsEnum for Dinc {} +impl crate::IsEnum for DINC_A {} #[doc = "Field `DINC` reader - Destination Address Increment"] -pub type DincR = crate::FieldReader; -impl DincR { +pub type DINC_R = crate::FieldReader; +impl DINC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Dinc::Value1), - 1 => Some(Dinc::Value2), - 2 => Some(Dinc::Value3), + 0 => Some(DINC_A::VALUE1), + 1 => Some(DINC_A::VALUE2), + 2 => Some(DINC_A::VALUE3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dinc::Value1 + *self == DINC_A::VALUE1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dinc::Value2 + *self == DINC_A::VALUE2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dinc::Value3 + *self == DINC_A::VALUE3 } } #[doc = "Field `DINC` writer - Destination Address Increment"] -pub type DincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dinc>; -impl<'a, REG> DincW<'a, REG> +pub type DINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DINC_A>; +impl<'a, REG> DINC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,72 +74,72 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dinc::Value1) + self.variant(DINC_A::VALUE1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dinc::Value2) + self.variant(DINC_A::VALUE2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dinc::Value3) + self.variant(DINC_A::VALUE3) } } #[doc = "Source Address Increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sinc { +pub enum SINC_A { #[doc = "0: Increment"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Decrement"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: No change"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sinc) -> Self { + fn from(variant: SINC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sinc { +impl crate::FieldSpec for SINC_A { type Ux = u8; } -impl crate::IsEnum for Sinc {} +impl crate::IsEnum for SINC_A {} #[doc = "Field `SINC` reader - Source Address Increment"] -pub type SincR = crate::FieldReader; -impl SincR { +pub type SINC_R = crate::FieldReader; +impl SINC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sinc::Value1), - 1 => Some(Sinc::Value2), - 2 => Some(Sinc::Value3), + 0 => Some(SINC_A::VALUE1), + 1 => Some(SINC_A::VALUE2), + 2 => Some(SINC_A::VALUE3), _ => None, } } #[doc = "Increment"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sinc::Value1 + *self == SINC_A::VALUE1 } #[doc = "Decrement"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sinc::Value2 + *self == SINC_A::VALUE2 } #[doc = "No change"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sinc::Value3 + *self == SINC_A::VALUE3 } } #[doc = "Field `SINC` writer - Source Address Increment"] -pub type SincW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sinc>; -impl<'a, REG> SincW<'a, REG> +pub type SINC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SINC_A>; +impl<'a, REG> SINC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -147,137 +147,137 @@ where #[doc = "Increment"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sinc::Value1) + self.variant(SINC_A::VALUE1) } #[doc = "Decrement"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sinc::Value2) + self.variant(SINC_A::VALUE2) } #[doc = "No change"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sinc::Value3) + self.variant(SINC_A::VALUE3) } } #[doc = "Field `DEST_MSIZE` reader - Destination Burst Transaction Length"] -pub type DestMsizeR = crate::FieldReader; +pub type DEST_MSIZE_R = crate::FieldReader; #[doc = "Field `DEST_MSIZE` writer - Destination Burst Transaction Length"] -pub type DestMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DEST_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SRC_MSIZE` reader - Source Burst Transaction Length"] -pub type SrcMsizeR = crate::FieldReader; +pub type SRC_MSIZE_R = crate::FieldReader; #[doc = "Field `SRC_MSIZE` writer - Source Burst Transaction Length"] -pub type SrcMsizeW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SRC_MSIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `TT_FC` reader - Transfer Type and Flow Control"] -pub type TtFcR = crate::FieldReader; +pub type TT_FC_R = crate::FieldReader; #[doc = "Field `TT_FC` writer - Transfer Type and Flow Control"] -pub type TtFcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - pub fn int_en(&self) -> IntEnR { - IntEnR::new((self.bits & 1) != 0) + pub fn int_en(&self) -> INT_EN_R { + INT_EN_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - pub fn dst_tr_width(&self) -> DstTrWidthR { - DstTrWidthR::new(((self.bits >> 1) & 7) as u8) + pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { + DST_TR_WIDTH_R::new(((self.bits >> 1) & 7) as u8) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - pub fn src_tr_width(&self) -> SrcTrWidthR { - SrcTrWidthR::new(((self.bits >> 4) & 7) as u8) + pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { + SRC_TR_WIDTH_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - pub fn dinc(&self) -> DincR { - DincR::new(((self.bits >> 7) & 3) as u8) + pub fn dinc(&self) -> DINC_R { + DINC_R::new(((self.bits >> 7) & 3) as u8) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - pub fn sinc(&self) -> SincR { - SincR::new(((self.bits >> 9) & 3) as u8) + pub fn sinc(&self) -> SINC_R { + SINC_R::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - pub fn dest_msize(&self) -> DestMsizeR { - DestMsizeR::new(((self.bits >> 11) & 7) as u8) + pub fn dest_msize(&self) -> DEST_MSIZE_R { + DEST_MSIZE_R::new(((self.bits >> 11) & 7) as u8) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - pub fn src_msize(&self) -> SrcMsizeR { - SrcMsizeR::new(((self.bits >> 14) & 7) as u8) + pub fn src_msize(&self) -> SRC_MSIZE_R { + SRC_MSIZE_R::new(((self.bits >> 14) & 7) as u8) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - pub fn tt_fc(&self) -> TtFcR { - TtFcR::new(((self.bits >> 20) & 7) as u8) + pub fn tt_fc(&self) -> TT_FC_R { + TT_FC_R::new(((self.bits >> 20) & 7) as u8) } } impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] #[must_use] - pub fn int_en(&mut self) -> IntEnW { - IntEnW::new(self, 0) + pub fn int_en(&mut self) -> INT_EN_W { + INT_EN_W::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] #[must_use] - pub fn dst_tr_width(&mut self) -> DstTrWidthW { - DstTrWidthW::new(self, 1) + pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { + DST_TR_WIDTH_W::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] #[must_use] - pub fn src_tr_width(&mut self) -> SrcTrWidthW { - SrcTrWidthW::new(self, 4) + pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { + SRC_TR_WIDTH_W::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] #[must_use] - pub fn dinc(&mut self) -> DincW { - DincW::new(self, 7) + pub fn dinc(&mut self) -> DINC_W { + DINC_W::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] #[must_use] - pub fn sinc(&mut self) -> SincW { - SincW::new(self, 9) + pub fn sinc(&mut self) -> SINC_W { + SINC_W::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn dest_msize(&mut self) -> DestMsizeW { - DestMsizeW::new(self, 11) + pub fn dest_msize(&mut self) -> DEST_MSIZE_W { + DEST_MSIZE_W::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] #[must_use] - pub fn src_msize(&mut self) -> SrcMsizeW { - SrcMsizeW::new(self, 14) + pub fn src_msize(&mut self) -> SRC_MSIZE_W { + SRC_MSIZE_W::new(self, 14) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] #[must_use] - pub fn tt_fc(&mut self) -> TtFcW { - TtFcW::new(self, 20) + pub fn tt_fc(&mut self) -> TT_FC_W { + TT_FC_W::new(self, 20) } } #[doc = "Control Register Low\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctll::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctll::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtllSpec; -impl crate::RegisterSpec for CtllSpec { +pub struct CTLL_SPEC; +impl crate::RegisterSpec for CTLL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctll::R`](R) reader structure"] -impl crate::Readable for CtllSpec {} +impl crate::Readable for CTLL_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctll::W`](W) writer structure"] -impl crate::Writable for CtllSpec { +impl crate::Writable for CTLL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTLL to value 0x0030_4801"] -impl crate::Resettable for CtllSpec { +impl crate::Resettable for CTLL_SPEC { const RESET_VALUE: u32 = 0x0030_4801; } diff --git a/src/gpdma0_ch2/dar.rs b/src/gpdma0_ch2/dar.rs index c29a247f..3b87df70 100644 --- a/src/gpdma0_ch2/dar.rs +++ b/src/gpdma0_ch2/dar.rs @@ -1,40 +1,40 @@ #[doc = "Register `DAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAR` reader - Current Destination address of DMA transfer"] -pub type DarR = crate::FieldReader; +pub type DAR_R = crate::FieldReader; #[doc = "Field `DAR` writer - Current Destination address of DMA transfer"] -pub type DarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - pub fn dar(&self) -> DarR { - DarR::new(self.bits) + pub fn dar(&self) -> DAR_R { + DAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] #[must_use] - pub fn dar(&mut self) -> DarW { - DarW::new(self, 0) + pub fn dar(&mut self) -> DAR_W { + DAR_W::new(self, 0) } } #[doc = "Destination Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DarSpec; -impl crate::RegisterSpec for DarSpec { +pub struct DAR_SPEC; +impl crate::RegisterSpec for DAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dar::R`](R) reader structure"] -impl crate::Readable for DarSpec {} +impl crate::Readable for DAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dar::W`](W) writer structure"] -impl crate::Writable for DarSpec { +impl crate::Writable for DAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAR to value 0"] -impl crate::Resettable for DarSpec { +impl crate::Resettable for DAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/gpdma0_ch2/sar.rs b/src/gpdma0_ch2/sar.rs index cf5b145b..b69328d6 100644 --- a/src/gpdma0_ch2/sar.rs +++ b/src/gpdma0_ch2/sar.rs @@ -1,40 +1,40 @@ #[doc = "Register `SAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SAR` reader - Current Source Address of DMA transfer"] -pub type SarR = crate::FieldReader; +pub type SAR_R = crate::FieldReader; #[doc = "Field `SAR` writer - Current Source Address of DMA transfer"] -pub type SarW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SAR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - pub fn sar(&self) -> SarR { - SarR::new(self.bits) + pub fn sar(&self) -> SAR_R { + SAR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] #[must_use] - pub fn sar(&mut self) -> SarW { - SarW::new(self, 0) + pub fn sar(&mut self) -> SAR_W { + SAR_W::new(self, 0) } } #[doc = "Source Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SarSpec; -impl crate::RegisterSpec for SarSpec { +pub struct SAR_SPEC; +impl crate::RegisterSpec for SAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sar::R`](R) reader structure"] -impl crate::Readable for SarSpec {} +impl crate::Readable for SAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sar::W`](W) writer structure"] -impl crate::Writable for SarSpec { +impl crate::Writable for SAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SAR to value 0"] -impl crate::Resettable for SarSpec { +impl crate::Resettable for SAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0.rs b/src/hrpwm0.rs index 55ce32ef..ff32ea7b 100644 --- a/src/hrpwm0.rs +++ b/src/hrpwm0.rs @@ -1,214 +1,197 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - hrbsc: Hrbsc, + hrbsc: HRBSC, _reserved1: [u8; 0x04], - midr: Midr, + midr: MIDR, _reserved2: [u8; 0x08], - glbana: Glbana, + glbana: GLBANA, _reserved3: [u8; 0x08], - csgcfg: Csgcfg, - csgsetg: Csgsetg, - csgclrg: Csgclrg, - csgstatg: Csgstatg, - csgfcg: Csgfcg, - csgfsg: Csgfsg, - csgtrg: Csgtrg, - csgtrc: Csgtrc, - csgtrsg: Csgtrsg, + csgcfg: CSGCFG, + csgsetg: CSGSETG, + csgclrg: CSGCLRG, + csgstatg: CSGSTATG, + csgfcg: CSGFCG, + csgfsg: CSGFSG, + csgtrg: CSGTRG, + csgtrc: CSGTRC, + csgtrsg: CSGTRSG, _reserved12: [u8; 0x1c], - hrccfg: Hrccfg, - hrcstrg: Hrcstrg, - hrcctrg: Hrcctrg, - hrcstsg: Hrcstsg, - hrghrs: Hrghrs, + hrccfg: HRCCFG, + hrcstrg: HRCSTRG, + hrcctrg: HRCCTRG, + hrcstsg: HRCSTSG, + hrghrs: HRGHRS, } impl RegisterBlock { #[doc = "0x00 - Bias and suspend configuration"] #[inline(always)] - pub const fn hrbsc(&self) -> &Hrbsc { + pub const fn hrbsc(&self) -> &HRBSC { &self.hrbsc } #[doc = "0x08 - Module identification register"] #[inline(always)] - pub const fn midr(&self) -> &Midr { + pub const fn midr(&self) -> &MIDR { &self.midr } #[doc = "0x14 - Global Analog Configuration"] #[inline(always)] - pub const fn glbana(&self) -> &Glbana { + pub const fn glbana(&self) -> &GLBANA { &self.glbana } #[doc = "0x20 - Global CSG configuration"] #[inline(always)] - pub const fn csgcfg(&self) -> &Csgcfg { + pub const fn csgcfg(&self) -> &CSGCFG { &self.csgcfg } #[doc = "0x24 - Global CSG run bit set"] #[inline(always)] - pub const fn csgsetg(&self) -> &Csgsetg { + pub const fn csgsetg(&self) -> &CSGSETG { &self.csgsetg } #[doc = "0x28 - Global CSG run bit clear"] #[inline(always)] - pub const fn csgclrg(&self) -> &Csgclrg { + pub const fn csgclrg(&self) -> &CSGCLRG { &self.csgclrg } #[doc = "0x2c - Global CSG run bit status"] #[inline(always)] - pub const fn csgstatg(&self) -> &Csgstatg { + pub const fn csgstatg(&self) -> &CSGSTATG { &self.csgstatg } #[doc = "0x30 - Global CSG slope/prescaler control"] #[inline(always)] - pub const fn csgfcg(&self) -> &Csgfcg { + pub const fn csgfcg(&self) -> &CSGFCG { &self.csgfcg } #[doc = "0x34 - Global CSG slope/prescaler status"] #[inline(always)] - pub const fn csgfsg(&self) -> &Csgfsg { + pub const fn csgfsg(&self) -> &CSGFSG { &self.csgfsg } #[doc = "0x38 - Global CSG shadow/switch trigger"] #[inline(always)] - pub const fn csgtrg(&self) -> &Csgtrg { + pub const fn csgtrg(&self) -> &CSGTRG { &self.csgtrg } #[doc = "0x3c - Global CSG shadow trigger clear"] #[inline(always)] - pub const fn csgtrc(&self) -> &Csgtrc { + pub const fn csgtrc(&self) -> &CSGTRC { &self.csgtrc } #[doc = "0x40 - Global CSG shadow/switch status"] #[inline(always)] - pub const fn csgtrsg(&self) -> &Csgtrsg { + pub const fn csgtrsg(&self) -> &CSGTRSG { &self.csgtrsg } #[doc = "0x60 - Global HRC configuration"] #[inline(always)] - pub const fn hrccfg(&self) -> &Hrccfg { + pub const fn hrccfg(&self) -> &HRCCFG { &self.hrccfg } #[doc = "0x64 - Global HRC shadow trigger set"] #[inline(always)] - pub const fn hrcstrg(&self) -> &Hrcstrg { + pub const fn hrcstrg(&self) -> &HRCSTRG { &self.hrcstrg } #[doc = "0x68 - Global HRC shadow trigger clear"] #[inline(always)] - pub const fn hrcctrg(&self) -> &Hrcctrg { + pub const fn hrcctrg(&self) -> &HRCCTRG { &self.hrcctrg } #[doc = "0x6c - Global HRC shadow transfer status"] #[inline(always)] - pub const fn hrcstsg(&self) -> &Hrcstsg { + pub const fn hrcstsg(&self) -> &HRCSTSG { &self.hrcstsg } #[doc = "0x70 - High Resolution Generation Status"] #[inline(always)] - pub const fn hrghrs(&self) -> &Hrghrs { + pub const fn hrghrs(&self) -> &HRGHRS { &self.hrghrs } } #[doc = "HRBSC (rw) register accessor: Bias and suspend configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrbsc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrbsc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrbsc`] module"] -#[doc(alias = "HRBSC")] -pub type Hrbsc = crate::Reg; +pub type HRBSC = crate::Reg; #[doc = "Bias and suspend configuration"] pub mod hrbsc; #[doc = "MIDR (r) register accessor: Module identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -#[doc(alias = "MIDR")] -pub type Midr = crate::Reg; +pub type MIDR = crate::Reg; #[doc = "Module identification register"] pub mod midr; #[doc = "GLBANA (rw) register accessor: Global Analog Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`glbana::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`glbana::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@glbana`] module"] -#[doc(alias = "GLBANA")] -pub type Glbana = crate::Reg; +pub type GLBANA = crate::Reg; #[doc = "Global Analog Configuration"] pub mod glbana; #[doc = "CSGCFG (rw) register accessor: Global CSG configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgcfg`] module"] -#[doc(alias = "CSGCFG")] -pub type Csgcfg = crate::Reg; +pub type CSGCFG = crate::Reg; #[doc = "Global CSG configuration"] pub mod csgcfg; #[doc = "CSGSETG (w) register accessor: Global CSG run bit set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgsetg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgsetg`] module"] -#[doc(alias = "CSGSETG")] -pub type Csgsetg = crate::Reg; +pub type CSGSETG = crate::Reg; #[doc = "Global CSG run bit set"] pub mod csgsetg; #[doc = "CSGCLRG (w) register accessor: Global CSG run bit clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgclrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgclrg`] module"] -#[doc(alias = "CSGCLRG")] -pub type Csgclrg = crate::Reg; +pub type CSGCLRG = crate::Reg; #[doc = "Global CSG run bit clear"] pub mod csgclrg; #[doc = "CSGSTATG (r) register accessor: Global CSG run bit status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgstatg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgstatg`] module"] -#[doc(alias = "CSGSTATG")] -pub type Csgstatg = crate::Reg; +pub type CSGSTATG = crate::Reg; #[doc = "Global CSG run bit status"] pub mod csgstatg; #[doc = "CSGFCG (w) register accessor: Global CSG slope/prescaler control\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgfcg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfcg`] module"] -#[doc(alias = "CSGFCG")] -pub type Csgfcg = crate::Reg; +pub type CSGFCG = crate::Reg; #[doc = "Global CSG slope/prescaler control"] pub mod csgfcg; #[doc = "CSGFSG (r) register accessor: Global CSG slope/prescaler status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgfsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgfsg`] module"] -#[doc(alias = "CSGFSG")] -pub type Csgfsg = crate::Reg; +pub type CSGFSG = crate::Reg; #[doc = "Global CSG slope/prescaler status"] pub mod csgfsg; #[doc = "CSGTRG (w) register accessor: Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrg`] module"] -#[doc(alias = "CSGTRG")] -pub type Csgtrg = crate::Reg; +pub type CSGTRG = crate::Reg; #[doc = "Global CSG shadow/switch trigger"] pub mod csgtrg; #[doc = "CSGTRC (w) register accessor: Global CSG shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrc`] module"] -#[doc(alias = "CSGTRC")] -pub type Csgtrc = crate::Reg; +pub type CSGTRC = crate::Reg; #[doc = "Global CSG shadow trigger clear"] pub mod csgtrc; #[doc = "CSGTRSG (r) register accessor: Global CSG shadow/switch status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgtrsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@csgtrsg`] module"] -#[doc(alias = "CSGTRSG")] -pub type Csgtrsg = crate::Reg; +pub type CSGTRSG = crate::Reg; #[doc = "Global CSG shadow/switch status"] pub mod csgtrsg; #[doc = "HRCCFG (rw) register accessor: Global HRC configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrccfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrccfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrccfg`] module"] -#[doc(alias = "HRCCFG")] -pub type Hrccfg = crate::Reg; +pub type HRCCFG = crate::Reg; #[doc = "Global HRC configuration"] pub mod hrccfg; #[doc = "HRCSTRG (w) register accessor: Global HRC shadow trigger set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcstrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstrg`] module"] -#[doc(alias = "HRCSTRG")] -pub type Hrcstrg = crate::Reg; +pub type HRCSTRG = crate::Reg; #[doc = "Global HRC shadow trigger set"] pub mod hrcstrg; #[doc = "HRCCTRG (w) register accessor: Global HRC shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcctrg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcctrg`] module"] -#[doc(alias = "HRCCTRG")] -pub type Hrcctrg = crate::Reg; +pub type HRCCTRG = crate::Reg; #[doc = "Global HRC shadow trigger clear"] pub mod hrcctrg; #[doc = "HRCSTSG (r) register accessor: Global HRC shadow transfer status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrcstsg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrcstsg`] module"] -#[doc(alias = "HRCSTSG")] -pub type Hrcstsg = crate::Reg; +pub type HRCSTSG = crate::Reg; #[doc = "Global HRC shadow transfer status"] pub mod hrcstsg; #[doc = "HRGHRS (r) register accessor: High Resolution Generation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrghrs::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hrghrs`] module"] -#[doc(alias = "HRGHRS")] -pub type Hrghrs = crate::Reg; +pub type HRGHRS = crate::Reg; #[doc = "High Resolution Generation Status"] pub mod hrghrs; diff --git a/src/hrpwm0/csgcfg.rs b/src/hrpwm0/csgcfg.rs index 3b30668a..480fdf9c 100644 --- a/src/hrpwm0/csgcfg.rs +++ b/src/hrpwm0/csgcfg.rs @@ -1,60 +1,60 @@ #[doc = "Register `CSGCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CSGCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CSG0 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C0pm { +pub enum C0PM_A { #[doc = "0: CSG0 unit is powered OFF"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSG0 unit is set in Low Speed Mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: CSG0 unit is set in High Speed Mode"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C0pm) -> Self { + fn from(variant: C0PM_A) -> Self { variant as _ } } -impl crate::FieldSpec for C0pm { +impl crate::FieldSpec for C0PM_A { type Ux = u8; } -impl crate::IsEnum for C0pm {} +impl crate::IsEnum for C0PM_A {} #[doc = "Field `C0PM` reader - CSG0 Power Mode"] -pub type C0pmR = crate::FieldReader; -impl C0pmR { +pub type C0PM_R = crate::FieldReader; +impl C0PM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C0pm::Value1), - 1 => Some(C0pm::Value2), - 3 => Some(C0pm::Value4), + 0 => Some(C0PM_A::VALUE1), + 1 => Some(C0PM_A::VALUE2), + 3 => Some(C0PM_A::VALUE4), _ => None, } } #[doc = "CSG0 unit is powered OFF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0pm::Value1 + *self == C0PM_A::VALUE1 } #[doc = "CSG0 unit is set in Low Speed Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0pm::Value2 + *self == C0PM_A::VALUE2 } #[doc = "CSG0 unit is set in High Speed Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == C0pm::Value4 + *self == C0PM_A::VALUE4 } } #[doc = "Field `C0PM` writer - CSG0 Power Mode"] -pub type C0pmW<'a, REG> = crate::FieldWriter<'a, REG, 2, C0pm>; -impl<'a, REG> C0pmW<'a, REG> +pub type C0PM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C0PM_A>; +impl<'a, REG> C0PM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "CSG0 unit is powered OFF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C0pm::Value1) + self.variant(C0PM_A::VALUE1) } #[doc = "CSG0 unit is set in Low Speed Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C0pm::Value2) + self.variant(C0PM_A::VALUE2) } #[doc = "CSG0 unit is set in High Speed Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(C0pm::Value4) + self.variant(C0PM_A::VALUE4) } } #[doc = "CSG1 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C1pm { +pub enum C1PM_A { #[doc = "0: CSG1 unit is powered OFF"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSG1 unit is set in Low Speed Mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: CSG1 unit is set in High Speed Mode"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C1pm) -> Self { + fn from(variant: C1PM_A) -> Self { variant as _ } } -impl crate::FieldSpec for C1pm { +impl crate::FieldSpec for C1PM_A { type Ux = u8; } -impl crate::IsEnum for C1pm {} +impl crate::IsEnum for C1PM_A {} #[doc = "Field `C1PM` reader - CSG1 Power Mode"] -pub type C1pmR = crate::FieldReader; -impl C1pmR { +pub type C1PM_R = crate::FieldReader; +impl C1PM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C1pm::Value1), - 1 => Some(C1pm::Value2), - 3 => Some(C1pm::Value4), + 0 => Some(C1PM_A::VALUE1), + 1 => Some(C1PM_A::VALUE2), + 3 => Some(C1PM_A::VALUE4), _ => None, } } #[doc = "CSG1 unit is powered OFF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1pm::Value1 + *self == C1PM_A::VALUE1 } #[doc = "CSG1 unit is set in Low Speed Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1pm::Value2 + *self == C1PM_A::VALUE2 } #[doc = "CSG1 unit is set in High Speed Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == C1pm::Value4 + *self == C1PM_A::VALUE4 } } #[doc = "Field `C1PM` writer - CSG1 Power Mode"] -pub type C1pmW<'a, REG> = crate::FieldWriter<'a, REG, 2, C1pm>; -impl<'a, REG> C1pmW<'a, REG> +pub type C1PM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C1PM_A>; +impl<'a, REG> C1PM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "CSG1 unit is powered OFF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C1pm::Value1) + self.variant(C1PM_A::VALUE1) } #[doc = "CSG1 unit is set in Low Speed Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C1pm::Value2) + self.variant(C1PM_A::VALUE2) } #[doc = "CSG1 unit is set in High Speed Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(C1pm::Value4) + self.variant(C1PM_A::VALUE4) } } #[doc = "CSG2 Power Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C2pm { +pub enum C2PM_A { #[doc = "0: CSG2 unit is powered OFF"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSG2 unit is set in Low Speed Mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: CSG2 unit is set in High Speed Mode"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C2pm) -> Self { + fn from(variant: C2PM_A) -> Self { variant as _ } } -impl crate::FieldSpec for C2pm { +impl crate::FieldSpec for C2PM_A { type Ux = u8; } -impl crate::IsEnum for C2pm {} +impl crate::IsEnum for C2PM_A {} #[doc = "Field `C2PM` reader - CSG2 Power Mode"] -pub type C2pmR = crate::FieldReader; -impl C2pmR { +pub type C2PM_R = crate::FieldReader; +impl C2PM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C2pm::Value1), - 1 => Some(C2pm::Value2), - 3 => Some(C2pm::Value4), + 0 => Some(C2PM_A::VALUE1), + 1 => Some(C2PM_A::VALUE2), + 3 => Some(C2PM_A::VALUE4), _ => None, } } #[doc = "CSG2 unit is powered OFF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C2pm::Value1 + *self == C2PM_A::VALUE1 } #[doc = "CSG2 unit is set in Low Speed Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C2pm::Value2 + *self == C2PM_A::VALUE2 } #[doc = "CSG2 unit is set in High Speed Mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == C2pm::Value4 + *self == C2PM_A::VALUE4 } } #[doc = "Field `C2PM` writer - CSG2 Power Mode"] -pub type C2pmW<'a, REG> = crate::FieldWriter<'a, REG, 2, C2pm>; -impl<'a, REG> C2pmW<'a, REG> +pub type C2PM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C2PM_A>; +impl<'a, REG> C2PM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,115 +208,115 @@ where #[doc = "CSG2 unit is powered OFF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C2pm::Value1) + self.variant(C2PM_A::VALUE1) } #[doc = "CSG2 unit is set in Low Speed Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C2pm::Value2) + self.variant(C2PM_A::VALUE2) } #[doc = "CSG2 unit is set in High Speed Mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(C2pm::Value4) + self.variant(C2PM_A::VALUE4) } } #[doc = "Field `C0CD` reader - CSG0 Clock disable"] -pub type C0cdR = crate::BitReader; +pub type C0CD_R = crate::BitReader; #[doc = "Field `C0CD` writer - CSG0 Clock disable"] -pub type C0cdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C0CD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C1CD` reader - CSG1 Clock disable"] -pub type C1cdR = crate::BitReader; +pub type C1CD_R = crate::BitReader; #[doc = "Field `C1CD` writer - CSG1 Clock disable"] -pub type C1cdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C1CD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C2CD` reader - CSG2 Clock disable"] -pub type C2cdR = crate::BitReader; +pub type C2CD_R = crate::BitReader; #[doc = "Field `C2CD` writer - CSG2 Clock disable"] -pub type C2cdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C2CD_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - CSG0 Power Mode"] #[inline(always)] - pub fn c0pm(&self) -> C0pmR { - C0pmR::new((self.bits & 3) as u8) + pub fn c0pm(&self) -> C0PM_R { + C0PM_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - CSG1 Power Mode"] #[inline(always)] - pub fn c1pm(&self) -> C1pmR { - C1pmR::new(((self.bits >> 2) & 3) as u8) + pub fn c1pm(&self) -> C1PM_R { + C1PM_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - CSG2 Power Mode"] #[inline(always)] - pub fn c2pm(&self) -> C2pmR { - C2pmR::new(((self.bits >> 4) & 3) as u8) + pub fn c2pm(&self) -> C2PM_R { + C2PM_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 16 - CSG0 Clock disable"] #[inline(always)] - pub fn c0cd(&self) -> C0cdR { - C0cdR::new(((self.bits >> 16) & 1) != 0) + pub fn c0cd(&self) -> C0CD_R { + C0CD_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - CSG1 Clock disable"] #[inline(always)] - pub fn c1cd(&self) -> C1cdR { - C1cdR::new(((self.bits >> 17) & 1) != 0) + pub fn c1cd(&self) -> C1CD_R { + C1CD_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - CSG2 Clock disable"] #[inline(always)] - pub fn c2cd(&self) -> C2cdR { - C2cdR::new(((self.bits >> 18) & 1) != 0) + pub fn c2cd(&self) -> C2CD_R { + C2CD_R::new(((self.bits >> 18) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - CSG0 Power Mode"] #[inline(always)] #[must_use] - pub fn c0pm(&mut self) -> C0pmW { - C0pmW::new(self, 0) + pub fn c0pm(&mut self) -> C0PM_W { + C0PM_W::new(self, 0) } #[doc = "Bits 2:3 - CSG1 Power Mode"] #[inline(always)] #[must_use] - pub fn c1pm(&mut self) -> C1pmW { - C1pmW::new(self, 2) + pub fn c1pm(&mut self) -> C1PM_W { + C1PM_W::new(self, 2) } #[doc = "Bits 4:5 - CSG2 Power Mode"] #[inline(always)] #[must_use] - pub fn c2pm(&mut self) -> C2pmW { - C2pmW::new(self, 4) + pub fn c2pm(&mut self) -> C2PM_W { + C2PM_W::new(self, 4) } #[doc = "Bit 16 - CSG0 Clock disable"] #[inline(always)] #[must_use] - pub fn c0cd(&mut self) -> C0cdW { - C0cdW::new(self, 16) + pub fn c0cd(&mut self) -> C0CD_W { + C0CD_W::new(self, 16) } #[doc = "Bit 17 - CSG1 Clock disable"] #[inline(always)] #[must_use] - pub fn c1cd(&mut self) -> C1cdW { - C1cdW::new(self, 17) + pub fn c1cd(&mut self) -> C1CD_W { + C1CD_W::new(self, 17) } #[doc = "Bit 18 - CSG2 Clock disable"] #[inline(always)] #[must_use] - pub fn c2cd(&mut self) -> C2cdW { - C2cdW::new(self, 18) + pub fn c2cd(&mut self) -> C2CD_W { + C2CD_W::new(self, 18) } } #[doc = "Global CSG configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgcfgSpec; -impl crate::RegisterSpec for CsgcfgSpec { +pub struct CSGCFG_SPEC; +impl crate::RegisterSpec for CSGCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`csgcfg::R`](R) reader structure"] -impl crate::Readable for CsgcfgSpec {} +impl crate::Readable for CSGCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`csgcfg::W`](W) writer structure"] -impl crate::Writable for CsgcfgSpec { +impl crate::Writable for CSGCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGCFG to value 0"] -impl crate::Resettable for CsgcfgSpec { +impl crate::Resettable for CSGCFG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgclrg.rs b/src/hrpwm0/csgclrg.rs index 1ff72e3e..64505644 100644 --- a/src/hrpwm0/csgclrg.rs +++ b/src/hrpwm0/csgclrg.rs @@ -1,91 +1,91 @@ #[doc = "Register `CSGCLRG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CD0R` writer - DAC0 run bit clear"] -pub type Cd0rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CD0R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0R` writer - CMP0 run bit clear"] -pub type Cc0rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC0R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC0P` writer - CMP0 passive level clear"] -pub type Cc0pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC0P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CD1R` writer - DAC1 run bit clear"] -pub type Cd1rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CD1R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1R` writer - CMP1 run bit clear"] -pub type Cc1rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC1R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC1P` writer - CMP1 passive level clear"] -pub type Cc1pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC1P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CD2R` writer - DAC2 run bit clear"] -pub type Cd2rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CD2R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2R` writer - CMP2 run bit clear"] -pub type Cc2rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC2R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CC2P` writer - CMP2 passive level clear"] -pub type Cc2pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CC2P_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC0 run bit clear"] #[inline(always)] #[must_use] - pub fn cd0r(&mut self) -> Cd0rW { - Cd0rW::new(self, 0) + pub fn cd0r(&mut self) -> CD0R_W { + CD0R_W::new(self, 0) } #[doc = "Bit 1 - CMP0 run bit clear"] #[inline(always)] #[must_use] - pub fn cc0r(&mut self) -> Cc0rW { - Cc0rW::new(self, 1) + pub fn cc0r(&mut self) -> CC0R_W { + CC0R_W::new(self, 1) } #[doc = "Bit 2 - CMP0 passive level clear"] #[inline(always)] #[must_use] - pub fn cc0p(&mut self) -> Cc0pW { - Cc0pW::new(self, 2) + pub fn cc0p(&mut self) -> CC0P_W { + CC0P_W::new(self, 2) } #[doc = "Bit 4 - DAC1 run bit clear"] #[inline(always)] #[must_use] - pub fn cd1r(&mut self) -> Cd1rW { - Cd1rW::new(self, 4) + pub fn cd1r(&mut self) -> CD1R_W { + CD1R_W::new(self, 4) } #[doc = "Bit 5 - CMP1 run bit clear"] #[inline(always)] #[must_use] - pub fn cc1r(&mut self) -> Cc1rW { - Cc1rW::new(self, 5) + pub fn cc1r(&mut self) -> CC1R_W { + CC1R_W::new(self, 5) } #[doc = "Bit 6 - CMP1 passive level clear"] #[inline(always)] #[must_use] - pub fn cc1p(&mut self) -> Cc1pW { - Cc1pW::new(self, 6) + pub fn cc1p(&mut self) -> CC1P_W { + CC1P_W::new(self, 6) } #[doc = "Bit 8 - DAC2 run bit clear"] #[inline(always)] #[must_use] - pub fn cd2r(&mut self) -> Cd2rW { - Cd2rW::new(self, 8) + pub fn cd2r(&mut self) -> CD2R_W { + CD2R_W::new(self, 8) } #[doc = "Bit 9 - CMP2 run bit clear"] #[inline(always)] #[must_use] - pub fn cc2r(&mut self) -> Cc2rW { - Cc2rW::new(self, 9) + pub fn cc2r(&mut self) -> CC2R_W { + CC2R_W::new(self, 9) } #[doc = "Bit 10 - CMP2 passive level clear"] #[inline(always)] #[must_use] - pub fn cc2p(&mut self) -> Cc2pW { - Cc2pW::new(self, 10) + pub fn cc2p(&mut self) -> CC2P_W { + CC2P_W::new(self, 10) } } #[doc = "Global CSG run bit clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgclrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgclrgSpec; -impl crate::RegisterSpec for CsgclrgSpec { +pub struct CSGCLRG_SPEC; +impl crate::RegisterSpec for CSGCLRG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`csgclrg::W`](W) writer structure"] -impl crate::Writable for CsgclrgSpec { +impl crate::Writable for CSGCLRG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGCLRG to value 0"] -impl crate::Resettable for CsgclrgSpec { +impl crate::Resettable for CSGCLRG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgfcg.rs b/src/hrpwm0/csgfcg.rs index 0618ec78..cb73eb13 100644 --- a/src/hrpwm0/csgfcg.rs +++ b/src/hrpwm0/csgfcg.rs @@ -1,139 +1,139 @@ #[doc = "Register `CSGFCG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `S0STR` writer - Slope 0 start"] -pub type S0strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S0STP` writer - Slope 0 stop"] -pub type S0stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S0STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS0STR` writer - Prescaler 0 start"] -pub type Ps0strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS0STP` writer - Prescaler 0 stop"] -pub type Ps0stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS0CLR` writer - Prescaler 0 clear"] -pub type Ps0clrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0CLR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STR` writer - Slope 1 start"] -pub type S1strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S1STP` writer - Slope 1 stop"] -pub type S1stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S1STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1STR` writer - Prescaler 1 start"] -pub type Ps1strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1STP` writer - Prescaler 1 stop"] -pub type Ps1stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1CLR` writer - Prescaler 1 clear"] -pub type Ps1clrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1CLR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STR` writer - Slope 2 start"] -pub type S2strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S2STP` writer - Slope 2 stop"] -pub type S2stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S2STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2STR` writer - Prescaler 2 start"] -pub type Ps2strW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2STR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2STP` writer - Prescaler 2 stop"] -pub type Ps2stpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2STP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2CLR` writer - Prescaler 2 clear"] -pub type Ps2clrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2CLR_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slope 0 start"] #[inline(always)] #[must_use] - pub fn s0str(&mut self) -> S0strW { - S0strW::new(self, 0) + pub fn s0str(&mut self) -> S0STR_W { + S0STR_W::new(self, 0) } #[doc = "Bit 1 - Slope 0 stop"] #[inline(always)] #[must_use] - pub fn s0stp(&mut self) -> S0stpW { - S0stpW::new(self, 1) + pub fn s0stp(&mut self) -> S0STP_W { + S0STP_W::new(self, 1) } #[doc = "Bit 2 - Prescaler 0 start"] #[inline(always)] #[must_use] - pub fn ps0str(&mut self) -> Ps0strW { - Ps0strW::new(self, 2) + pub fn ps0str(&mut self) -> PS0STR_W { + PS0STR_W::new(self, 2) } #[doc = "Bit 3 - Prescaler 0 stop"] #[inline(always)] #[must_use] - pub fn ps0stp(&mut self) -> Ps0stpW { - Ps0stpW::new(self, 3) + pub fn ps0stp(&mut self) -> PS0STP_W { + PS0STP_W::new(self, 3) } #[doc = "Bit 4 - Prescaler 0 clear"] #[inline(always)] #[must_use] - pub fn ps0clr(&mut self) -> Ps0clrW { - Ps0clrW::new(self, 4) + pub fn ps0clr(&mut self) -> PS0CLR_W { + PS0CLR_W::new(self, 4) } #[doc = "Bit 8 - Slope 1 start"] #[inline(always)] #[must_use] - pub fn s1str(&mut self) -> S1strW { - S1strW::new(self, 8) + pub fn s1str(&mut self) -> S1STR_W { + S1STR_W::new(self, 8) } #[doc = "Bit 9 - Slope 1 stop"] #[inline(always)] #[must_use] - pub fn s1stp(&mut self) -> S1stpW { - S1stpW::new(self, 9) + pub fn s1stp(&mut self) -> S1STP_W { + S1STP_W::new(self, 9) } #[doc = "Bit 10 - Prescaler 1 start"] #[inline(always)] #[must_use] - pub fn ps1str(&mut self) -> Ps1strW { - Ps1strW::new(self, 10) + pub fn ps1str(&mut self) -> PS1STR_W { + PS1STR_W::new(self, 10) } #[doc = "Bit 11 - Prescaler 1 stop"] #[inline(always)] #[must_use] - pub fn ps1stp(&mut self) -> Ps1stpW { - Ps1stpW::new(self, 11) + pub fn ps1stp(&mut self) -> PS1STP_W { + PS1STP_W::new(self, 11) } #[doc = "Bit 12 - Prescaler 1 clear"] #[inline(always)] #[must_use] - pub fn ps1clr(&mut self) -> Ps1clrW { - Ps1clrW::new(self, 12) + pub fn ps1clr(&mut self) -> PS1CLR_W { + PS1CLR_W::new(self, 12) } #[doc = "Bit 16 - Slope 2 start"] #[inline(always)] #[must_use] - pub fn s2str(&mut self) -> S2strW { - S2strW::new(self, 16) + pub fn s2str(&mut self) -> S2STR_W { + S2STR_W::new(self, 16) } #[doc = "Bit 17 - Slope 2 stop"] #[inline(always)] #[must_use] - pub fn s2stp(&mut self) -> S2stpW { - S2stpW::new(self, 17) + pub fn s2stp(&mut self) -> S2STP_W { + S2STP_W::new(self, 17) } #[doc = "Bit 18 - Prescaler 2 start"] #[inline(always)] #[must_use] - pub fn ps2str(&mut self) -> Ps2strW { - Ps2strW::new(self, 18) + pub fn ps2str(&mut self) -> PS2STR_W { + PS2STR_W::new(self, 18) } #[doc = "Bit 19 - Prescaler 2 stop"] #[inline(always)] #[must_use] - pub fn ps2stp(&mut self) -> Ps2stpW { - Ps2stpW::new(self, 19) + pub fn ps2stp(&mut self) -> PS2STP_W { + PS2STP_W::new(self, 19) } #[doc = "Bit 20 - Prescaler 2 clear"] #[inline(always)] #[must_use] - pub fn ps2clr(&mut self) -> Ps2clrW { - Ps2clrW::new(self, 20) + pub fn ps2clr(&mut self) -> PS2CLR_W { + PS2CLR_W::new(self, 20) } } #[doc = "Global CSG slope/prescaler control\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgfcg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgfcgSpec; -impl crate::RegisterSpec for CsgfcgSpec { +pub struct CSGFCG_SPEC; +impl crate::RegisterSpec for CSGFCG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`csgfcg::W`](W) writer structure"] -impl crate::Writable for CsgfcgSpec { +impl crate::Writable for CSGFCG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGFCG to value 0"] -impl crate::Resettable for CsgfcgSpec { +impl crate::Resettable for CSGFCG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgfsg.rs b/src/hrpwm0/csgfsg.rs index 3dbdc9e8..d48f238f 100644 --- a/src/hrpwm0/csgfsg.rs +++ b/src/hrpwm0/csgfsg.rs @@ -1,261 +1,261 @@ #[doc = "Register `CSGFSG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "DAC0 slope generation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S0rb { +pub enum S0RB_A { #[doc = "0: Slope generation is stopped."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Slope generation is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S0rb) -> Self { + fn from(variant: S0RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S0RB` reader - DAC0 slope generation status"] -pub type S0rbR = crate::BitReader; -impl S0rbR { +pub type S0RB_R = crate::BitReader; +impl S0RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0rb { + pub const fn variant(&self) -> S0RB_A { match self.bits { - false => S0rb::Value1, - true => S0rb::Value2, + false => S0RB_A::VALUE1, + true => S0RB_A::VALUE2, } } #[doc = "Slope generation is stopped."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0rb::Value1 + *self == S0RB_A::VALUE1 } #[doc = "Slope generation is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0rb::Value2 + *self == S0RB_A::VALUE2 } } #[doc = "CSG0 prescaler status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0rb { +pub enum P0RB_A { #[doc = "0: Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0rb) -> Self { + fn from(variant: P0RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0RB` reader - CSG0 prescaler status"] -pub type P0rbR = crate::BitReader; -impl P0rbR { +pub type P0RB_R = crate::BitReader; +impl P0RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0rb { + pub const fn variant(&self) -> P0RB_A { match self.bits { - false => P0rb::Value1, - true => P0rb::Value2, + false => P0RB_A::VALUE1, + true => P0RB_A::VALUE2, } } #[doc = "Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0rb::Value1 + *self == P0RB_A::VALUE1 } #[doc = "Prescaler is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0rb::Value2 + *self == P0RB_A::VALUE2 } } #[doc = "DAC1 slope generation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S1rb { +pub enum S1RB_A { #[doc = "0: Slope generation is stopped."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Slope generation is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S1rb) -> Self { + fn from(variant: S1RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S1RB` reader - DAC1 slope generation status"] -pub type S1rbR = crate::BitReader; -impl S1rbR { +pub type S1RB_R = crate::BitReader; +impl S1RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1rb { + pub const fn variant(&self) -> S1RB_A { match self.bits { - false => S1rb::Value1, - true => S1rb::Value2, + false => S1RB_A::VALUE1, + true => S1RB_A::VALUE2, } } #[doc = "Slope generation is stopped."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1rb::Value1 + *self == S1RB_A::VALUE1 } #[doc = "Slope generation is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1rb::Value2 + *self == S1RB_A::VALUE2 } } #[doc = "CSG1 prescaler status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1rb { +pub enum P1RB_A { #[doc = "0: Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1rb) -> Self { + fn from(variant: P1RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1RB` reader - CSG1 prescaler status"] -pub type P1rbR = crate::BitReader; -impl P1rbR { +pub type P1RB_R = crate::BitReader; +impl P1RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1rb { + pub const fn variant(&self) -> P1RB_A { match self.bits { - false => P1rb::Value1, - true => P1rb::Value2, + false => P1RB_A::VALUE1, + true => P1RB_A::VALUE2, } } #[doc = "Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1rb::Value1 + *self == P1RB_A::VALUE1 } #[doc = "Prescaler is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1rb::Value2 + *self == P1RB_A::VALUE2 } } #[doc = "DAC2 slope generation status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum S2rb { +pub enum S2RB_A { #[doc = "0: Slope generation is stopped."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Slope generation is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: S2rb) -> Self { + fn from(variant: S2RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `S2RB` reader - DAC2 slope generation status"] -pub type S2rbR = crate::BitReader; -impl S2rbR { +pub type S2RB_R = crate::BitReader; +impl S2RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S2rb { + pub const fn variant(&self) -> S2RB_A { match self.bits { - false => S2rb::Value1, - true => S2rb::Value2, + false => S2RB_A::VALUE1, + true => S2RB_A::VALUE2, } } #[doc = "Slope generation is stopped."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S2rb::Value1 + *self == S2RB_A::VALUE1 } #[doc = "Slope generation is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S2rb::Value2 + *self == S2RB_A::VALUE2 } } #[doc = "CSG2 prescaler status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2rb { +pub enum P2RB_A { #[doc = "0: Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler is running."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2rb) -> Self { + fn from(variant: P2RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2RB` reader - CSG2 prescaler status"] -pub type P2rbR = crate::BitReader; -impl P2rbR { +pub type P2RB_R = crate::BitReader; +impl P2RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2rb { + pub const fn variant(&self) -> P2RB_A { match self.bits { - false => P2rb::Value1, - true => P2rb::Value2, + false => P2RB_A::VALUE1, + true => P2RB_A::VALUE2, } } #[doc = "Prescaler is stopped. The clock used for the slope generation is halted and therefore the slope is frozen."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2rb::Value1 + *self == P2RB_A::VALUE1 } #[doc = "Prescaler is running."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2rb::Value2 + *self == P2RB_A::VALUE2 } } impl R { #[doc = "Bit 0 - DAC0 slope generation status"] #[inline(always)] - pub fn s0rb(&self) -> S0rbR { - S0rbR::new((self.bits & 1) != 0) + pub fn s0rb(&self) -> S0RB_R { + S0RB_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CSG0 prescaler status"] #[inline(always)] - pub fn p0rb(&self) -> P0rbR { - P0rbR::new(((self.bits >> 1) & 1) != 0) + pub fn p0rb(&self) -> P0RB_R { + P0RB_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - DAC1 slope generation status"] #[inline(always)] - pub fn s1rb(&self) -> S1rbR { - S1rbR::new(((self.bits >> 8) & 1) != 0) + pub fn s1rb(&self) -> S1RB_R { + S1RB_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CSG1 prescaler status"] #[inline(always)] - pub fn p1rb(&self) -> P1rbR { - P1rbR::new(((self.bits >> 9) & 1) != 0) + pub fn p1rb(&self) -> P1RB_R { + P1RB_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 16 - DAC2 slope generation status"] #[inline(always)] - pub fn s2rb(&self) -> S2rbR { - S2rbR::new(((self.bits >> 16) & 1) != 0) + pub fn s2rb(&self) -> S2RB_R { + S2RB_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - CSG2 prescaler status"] #[inline(always)] - pub fn p2rb(&self) -> P2rbR { - P2rbR::new(((self.bits >> 17) & 1) != 0) + pub fn p2rb(&self) -> P2RB_R { + P2RB_R::new(((self.bits >> 17) & 1) != 0) } } #[doc = "Global CSG slope/prescaler status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgfsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgfsgSpec; -impl crate::RegisterSpec for CsgfsgSpec { +pub struct CSGFSG_SPEC; +impl crate::RegisterSpec for CSGFSG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`csgfsg::R`](R) reader structure"] -impl crate::Readable for CsgfsgSpec {} +impl crate::Readable for CSGFSG_SPEC {} #[doc = "`reset()` method sets CSGFSG to value 0"] -impl crate::Resettable for CsgfsgSpec { +impl crate::Resettable for CSGFSG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgsetg.rs b/src/hrpwm0/csgsetg.rs index 31dd092b..d47d58bb 100644 --- a/src/hrpwm0/csgsetg.rs +++ b/src/hrpwm0/csgsetg.rs @@ -1,91 +1,91 @@ #[doc = "Register `CSGSETG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SD0R` writer - DAC0 run bit set"] -pub type Sd0rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SD0R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC0R` writer - CMP0 run bit set"] -pub type Sc0rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC0R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC0P` writer - CMP0 passive level set"] -pub type Sc0pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC0P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SD1R` writer - DAC1 run bit set"] -pub type Sd1rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SD1R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC1R` writer - CMP1 run bit set"] -pub type Sc1rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC1R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC1P` writer - CMP1 passive level set"] -pub type Sc1pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC1P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SD2R` writer - DAC2 run bit set"] -pub type Sd2rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SD2R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC2R` writer - CMP2 run bit set"] -pub type Sc2rW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC2R_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SC2P` writer - CMP2 passive level set"] -pub type Sc2pW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SC2P_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC0 run bit set"] #[inline(always)] #[must_use] - pub fn sd0r(&mut self) -> Sd0rW { - Sd0rW::new(self, 0) + pub fn sd0r(&mut self) -> SD0R_W { + SD0R_W::new(self, 0) } #[doc = "Bit 1 - CMP0 run bit set"] #[inline(always)] #[must_use] - pub fn sc0r(&mut self) -> Sc0rW { - Sc0rW::new(self, 1) + pub fn sc0r(&mut self) -> SC0R_W { + SC0R_W::new(self, 1) } #[doc = "Bit 2 - CMP0 passive level set"] #[inline(always)] #[must_use] - pub fn sc0p(&mut self) -> Sc0pW { - Sc0pW::new(self, 2) + pub fn sc0p(&mut self) -> SC0P_W { + SC0P_W::new(self, 2) } #[doc = "Bit 4 - DAC1 run bit set"] #[inline(always)] #[must_use] - pub fn sd1r(&mut self) -> Sd1rW { - Sd1rW::new(self, 4) + pub fn sd1r(&mut self) -> SD1R_W { + SD1R_W::new(self, 4) } #[doc = "Bit 5 - CMP1 run bit set"] #[inline(always)] #[must_use] - pub fn sc1r(&mut self) -> Sc1rW { - Sc1rW::new(self, 5) + pub fn sc1r(&mut self) -> SC1R_W { + SC1R_W::new(self, 5) } #[doc = "Bit 6 - CMP1 passive level set"] #[inline(always)] #[must_use] - pub fn sc1p(&mut self) -> Sc1pW { - Sc1pW::new(self, 6) + pub fn sc1p(&mut self) -> SC1P_W { + SC1P_W::new(self, 6) } #[doc = "Bit 8 - DAC2 run bit set"] #[inline(always)] #[must_use] - pub fn sd2r(&mut self) -> Sd2rW { - Sd2rW::new(self, 8) + pub fn sd2r(&mut self) -> SD2R_W { + SD2R_W::new(self, 8) } #[doc = "Bit 9 - CMP2 run bit set"] #[inline(always)] #[must_use] - pub fn sc2r(&mut self) -> Sc2rW { - Sc2rW::new(self, 9) + pub fn sc2r(&mut self) -> SC2R_W { + SC2R_W::new(self, 9) } #[doc = "Bit 10 - CMP2 passive level set"] #[inline(always)] #[must_use] - pub fn sc2p(&mut self) -> Sc2pW { - Sc2pW::new(self, 10) + pub fn sc2p(&mut self) -> SC2P_W { + SC2P_W::new(self, 10) } } #[doc = "Global CSG run bit set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgsetg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgsetgSpec; -impl crate::RegisterSpec for CsgsetgSpec { +pub struct CSGSETG_SPEC; +impl crate::RegisterSpec for CSGSETG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`csgsetg::W`](W) writer structure"] -impl crate::Writable for CsgsetgSpec { +impl crate::Writable for CSGSETG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGSETG to value 0"] -impl crate::Resettable for CsgsetgSpec { +impl crate::Resettable for CSGSETG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgstatg.rs b/src/hrpwm0/csgstatg.rs index 4115757d..e93cc76e 100644 --- a/src/hrpwm0/csgstatg.rs +++ b/src/hrpwm0/csgstatg.rs @@ -1,384 +1,384 @@ #[doc = "Register `CSGSTATG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "DAC0 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D0rb { +pub enum D0RB_A { #[doc = "0: DAC0 is not running (control logic is disabled)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC0 is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D0rb) -> Self { + fn from(variant: D0RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D0RB` reader - DAC0 run bit status"] -pub type D0rbR = crate::BitReader; -impl D0rbR { +pub type D0RB_R = crate::BitReader; +impl D0RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D0rb { + pub const fn variant(&self) -> D0RB_A { match self.bits { - false => D0rb::Value1, - true => D0rb::Value2, + false => D0RB_A::VALUE1, + true => D0RB_A::VALUE2, } } #[doc = "DAC0 is not running (control logic is disabled)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D0rb::Value1 + *self == D0RB_A::VALUE1 } #[doc = "DAC0 is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D0rb::Value2 + *self == D0RB_A::VALUE2 } } #[doc = "CMP0 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum C0rb { +pub enum C0RB_A { #[doc = "0: CMP0 functionality is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP0 functionality is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: C0rb) -> Self { + fn from(variant: C0RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `C0RB` reader - CMP0 run bit status"] -pub type C0rbR = crate::BitReader; -impl C0rbR { +pub type C0RB_R = crate::BitReader; +impl C0RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> C0rb { + pub const fn variant(&self) -> C0RB_A { match self.bits { - false => C0rb::Value1, - true => C0rb::Value2, + false => C0RB_A::VALUE1, + true => C0RB_A::VALUE2, } } #[doc = "CMP0 functionality is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0rb::Value1 + *self == C0RB_A::VALUE1 } #[doc = "CMP0 functionality is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0rb::Value2 + *self == C0RB_A::VALUE2 } } #[doc = "CMP0 output passive status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psls0 { +pub enum PSLS0_A { #[doc = "0: CMP0 output is not clamped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP0 output is clamped"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psls0) -> Self { + fn from(variant: PSLS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSLS0` reader - CMP0 output passive status"] -pub type Psls0R = crate::BitReader; -impl Psls0R { +pub type PSLS0_R = crate::BitReader; +impl PSLS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psls0 { + pub const fn variant(&self) -> PSLS0_A { match self.bits { - false => Psls0::Value1, - true => Psls0::Value2, + false => PSLS0_A::VALUE1, + true => PSLS0_A::VALUE2, } } #[doc = "CMP0 output is not clamped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psls0::Value1 + *self == PSLS0_A::VALUE1 } #[doc = "CMP0 output is clamped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psls0::Value2 + *self == PSLS0_A::VALUE2 } } #[doc = "DAC1 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D1rb { +pub enum D1RB_A { #[doc = "0: DAC1 is not running (control logic is disabled)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC1 is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D1rb) -> Self { + fn from(variant: D1RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D1RB` reader - DAC1 run bit status"] -pub type D1rbR = crate::BitReader; -impl D1rbR { +pub type D1RB_R = crate::BitReader; +impl D1RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D1rb { + pub const fn variant(&self) -> D1RB_A { match self.bits { - false => D1rb::Value1, - true => D1rb::Value2, + false => D1RB_A::VALUE1, + true => D1RB_A::VALUE2, } } #[doc = "DAC1 is not running (control logic is disabled)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D1rb::Value1 + *self == D1RB_A::VALUE1 } #[doc = "DAC1 is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D1rb::Value2 + *self == D1RB_A::VALUE2 } } #[doc = "CMP1 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum C1rb { +pub enum C1RB_A { #[doc = "0: CMP1 functionality is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP1 functionality is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: C1rb) -> Self { + fn from(variant: C1RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `C1RB` reader - CMP1 run bit status"] -pub type C1rbR = crate::BitReader; -impl C1rbR { +pub type C1RB_R = crate::BitReader; +impl C1RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> C1rb { + pub const fn variant(&self) -> C1RB_A { match self.bits { - false => C1rb::Value1, - true => C1rb::Value2, + false => C1RB_A::VALUE1, + true => C1RB_A::VALUE2, } } #[doc = "CMP1 functionality is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1rb::Value1 + *self == C1RB_A::VALUE1 } #[doc = "CMP1 functionality is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1rb::Value2 + *self == C1RB_A::VALUE2 } } #[doc = "CMP1 output passive status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psls1 { +pub enum PSLS1_A { #[doc = "0: CMP1 output is not clamped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP1 output is clamped"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psls1) -> Self { + fn from(variant: PSLS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSLS1` reader - CMP1 output passive status"] -pub type Psls1R = crate::BitReader; -impl Psls1R { +pub type PSLS1_R = crate::BitReader; +impl PSLS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psls1 { + pub const fn variant(&self) -> PSLS1_A { match self.bits { - false => Psls1::Value1, - true => Psls1::Value2, + false => PSLS1_A::VALUE1, + true => PSLS1_A::VALUE2, } } #[doc = "CMP1 output is not clamped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psls1::Value1 + *self == PSLS1_A::VALUE1 } #[doc = "CMP1 output is clamped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psls1::Value2 + *self == PSLS1_A::VALUE2 } } #[doc = "DAC2 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D2rb { +pub enum D2RB_A { #[doc = "0: DAC2 is not running (control logic is disabled)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DAC1 is running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D2rb) -> Self { + fn from(variant: D2RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D2RB` reader - DAC2 run bit status"] -pub type D2rbR = crate::BitReader; -impl D2rbR { +pub type D2RB_R = crate::BitReader; +impl D2RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D2rb { + pub const fn variant(&self) -> D2RB_A { match self.bits { - false => D2rb::Value1, - true => D2rb::Value2, + false => D2RB_A::VALUE1, + true => D2RB_A::VALUE2, } } #[doc = "DAC2 is not running (control logic is disabled)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D2rb::Value1 + *self == D2RB_A::VALUE1 } #[doc = "DAC1 is running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D2rb::Value2 + *self == D2RB_A::VALUE2 } } #[doc = "CMP2 run bit status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum C2rb { +pub enum C2RB_A { #[doc = "0: CMP2 functionality is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP2 functionality is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: C2rb) -> Self { + fn from(variant: C2RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `C2RB` reader - CMP2 run bit status"] -pub type C2rbR = crate::BitReader; -impl C2rbR { +pub type C2RB_R = crate::BitReader; +impl C2RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> C2rb { + pub const fn variant(&self) -> C2RB_A { match self.bits { - false => C2rb::Value1, - true => C2rb::Value2, + false => C2RB_A::VALUE1, + true => C2RB_A::VALUE2, } } #[doc = "CMP2 functionality is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C2rb::Value1 + *self == C2RB_A::VALUE1 } #[doc = "CMP2 functionality is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C2rb::Value2 + *self == C2RB_A::VALUE2 } } #[doc = "CMP2 output passive status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psls2 { +pub enum PSLS2_A { #[doc = "0: CMP2 output is not clamped"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP2 output is clamped"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psls2) -> Self { + fn from(variant: PSLS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSLS2` reader - CMP2 output passive status"] -pub type Psls2R = crate::BitReader; -impl Psls2R { +pub type PSLS2_R = crate::BitReader; +impl PSLS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psls2 { + pub const fn variant(&self) -> PSLS2_A { match self.bits { - false => Psls2::Value1, - true => Psls2::Value2, + false => PSLS2_A::VALUE1, + true => PSLS2_A::VALUE2, } } #[doc = "CMP2 output is not clamped"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psls2::Value1 + *self == PSLS2_A::VALUE1 } #[doc = "CMP2 output is clamped"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psls2::Value2 + *self == PSLS2_A::VALUE2 } } impl R { #[doc = "Bit 0 - DAC0 run bit status"] #[inline(always)] - pub fn d0rb(&self) -> D0rbR { - D0rbR::new((self.bits & 1) != 0) + pub fn d0rb(&self) -> D0RB_R { + D0RB_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CMP0 run bit status"] #[inline(always)] - pub fn c0rb(&self) -> C0rbR { - C0rbR::new(((self.bits >> 1) & 1) != 0) + pub fn c0rb(&self) -> C0RB_R { + C0RB_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - CMP0 output passive status"] #[inline(always)] - pub fn psls0(&self) -> Psls0R { - Psls0R::new(((self.bits >> 2) & 1) != 0) + pub fn psls0(&self) -> PSLS0_R { + PSLS0_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - DAC1 run bit status"] #[inline(always)] - pub fn d1rb(&self) -> D1rbR { - D1rbR::new(((self.bits >> 4) & 1) != 0) + pub fn d1rb(&self) -> D1RB_R { + D1RB_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CMP1 run bit status"] #[inline(always)] - pub fn c1rb(&self) -> C1rbR { - C1rbR::new(((self.bits >> 5) & 1) != 0) + pub fn c1rb(&self) -> C1RB_R { + C1RB_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - CMP1 output passive status"] #[inline(always)] - pub fn psls1(&self) -> Psls1R { - Psls1R::new(((self.bits >> 6) & 1) != 0) + pub fn psls1(&self) -> PSLS1_R { + PSLS1_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - DAC2 run bit status"] #[inline(always)] - pub fn d2rb(&self) -> D2rbR { - D2rbR::new(((self.bits >> 8) & 1) != 0) + pub fn d2rb(&self) -> D2RB_R { + D2RB_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CMP2 run bit status"] #[inline(always)] - pub fn c2rb(&self) -> C2rbR { - C2rbR::new(((self.bits >> 9) & 1) != 0) + pub fn c2rb(&self) -> C2RB_R { + C2RB_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - CMP2 output passive status"] #[inline(always)] - pub fn psls2(&self) -> Psls2R { - Psls2R::new(((self.bits >> 10) & 1) != 0) + pub fn psls2(&self) -> PSLS2_R { + PSLS2_R::new(((self.bits >> 10) & 1) != 0) } } #[doc = "Global CSG run bit status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgstatg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgstatgSpec; -impl crate::RegisterSpec for CsgstatgSpec { +pub struct CSGSTATG_SPEC; +impl crate::RegisterSpec for CSGSTATG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`csgstatg::R`](R) reader structure"] -impl crate::Readable for CsgstatgSpec {} +impl crate::Readable for CSGSTATG_SPEC {} #[doc = "`reset()` method sets CSGSTATG to value 0"] -impl crate::Resettable for CsgstatgSpec { +impl crate::Resettable for CSGSTATG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgtrc.rs b/src/hrpwm0/csgtrc.rs index 4eacd2cc..b6f1287b 100644 --- a/src/hrpwm0/csgtrc.rs +++ b/src/hrpwm0/csgtrc.rs @@ -1,43 +1,43 @@ #[doc = "Register `CSGTRC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `D0SEC` writer - DAC0 shadow transfer enable clear"] -pub type D0secW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D0SEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D1SEC` writer - DAC1 shadow transfer enable clear"] -pub type D1secW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D1SEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D2SEC` writer - DAC2 shadow transfer enable clear"] -pub type D2secW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D2SEC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC0 shadow transfer enable clear"] #[inline(always)] #[must_use] - pub fn d0sec(&mut self) -> D0secW { - D0secW::new(self, 0) + pub fn d0sec(&mut self) -> D0SEC_W { + D0SEC_W::new(self, 0) } #[doc = "Bit 4 - DAC1 shadow transfer enable clear"] #[inline(always)] #[must_use] - pub fn d1sec(&mut self) -> D1secW { - D1secW::new(self, 4) + pub fn d1sec(&mut self) -> D1SEC_W { + D1SEC_W::new(self, 4) } #[doc = "Bit 8 - DAC2 shadow transfer enable clear"] #[inline(always)] #[must_use] - pub fn d2sec(&mut self) -> D2secW { - D2secW::new(self, 8) + pub fn d2sec(&mut self) -> D2SEC_W { + D2SEC_W::new(self, 8) } } #[doc = "Global CSG shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgtrcSpec; -impl crate::RegisterSpec for CsgtrcSpec { +pub struct CSGTRC_SPEC; +impl crate::RegisterSpec for CSGTRC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`csgtrc::W`](W) writer structure"] -impl crate::Writable for CsgtrcSpec { +impl crate::Writable for CSGTRC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGTRC to value 0"] -impl crate::Resettable for CsgtrcSpec { +impl crate::Resettable for CSGTRC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgtrg.rs b/src/hrpwm0/csgtrg.rs index 86634c10..8bfcb28d 100644 --- a/src/hrpwm0/csgtrg.rs +++ b/src/hrpwm0/csgtrg.rs @@ -1,67 +1,67 @@ #[doc = "Register `CSGTRG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `D0SES` writer - DAC0 shadow transfer enable set"] -pub type D0sesW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D0SES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D0SVS` writer - CMP0 inverting input switch request"] -pub type D0svsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D0SVS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D1SES` writer - DAC1 shadow transfer enable set"] -pub type D1sesW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D1SES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D1SVS` writer - CMP1 inverting input switch request"] -pub type D1svsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D1SVS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D2SES` writer - DAC2 shadow transfer enable set"] -pub type D2sesW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D2SES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `D2SVS` writer - CMP2 inverting input switch request"] -pub type D2svsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type D2SVS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - DAC0 shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn d0ses(&mut self) -> D0sesW { - D0sesW::new(self, 0) + pub fn d0ses(&mut self) -> D0SES_W { + D0SES_W::new(self, 0) } #[doc = "Bit 1 - CMP0 inverting input switch request"] #[inline(always)] #[must_use] - pub fn d0svs(&mut self) -> D0svsW { - D0svsW::new(self, 1) + pub fn d0svs(&mut self) -> D0SVS_W { + D0SVS_W::new(self, 1) } #[doc = "Bit 4 - DAC1 shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn d1ses(&mut self) -> D1sesW { - D1sesW::new(self, 4) + pub fn d1ses(&mut self) -> D1SES_W { + D1SES_W::new(self, 4) } #[doc = "Bit 5 - CMP1 inverting input switch request"] #[inline(always)] #[must_use] - pub fn d1svs(&mut self) -> D1svsW { - D1svsW::new(self, 5) + pub fn d1svs(&mut self) -> D1SVS_W { + D1SVS_W::new(self, 5) } #[doc = "Bit 8 - DAC2 shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn d2ses(&mut self) -> D2sesW { - D2sesW::new(self, 8) + pub fn d2ses(&mut self) -> D2SES_W { + D2SES_W::new(self, 8) } #[doc = "Bit 9 - CMP2 inverting input switch request"] #[inline(always)] #[must_use] - pub fn d2svs(&mut self) -> D2svsW { - D2svsW::new(self, 9) + pub fn d2svs(&mut self) -> D2SVS_W { + D2SVS_W::new(self, 9) } } #[doc = "Global CSG shadow/switch trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`csgtrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgtrgSpec; -impl crate::RegisterSpec for CsgtrgSpec { +pub struct CSGTRG_SPEC; +impl crate::RegisterSpec for CSGTRG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`csgtrg::W`](W) writer structure"] -impl crate::Writable for CsgtrgSpec { +impl crate::Writable for CSGTRG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CSGTRG to value 0"] -impl crate::Resettable for CsgtrgSpec { +impl crate::Resettable for CSGTRG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/csgtrsg.rs b/src/hrpwm0/csgtrsg.rs index 2c17dc37..369912dc 100644 --- a/src/hrpwm0/csgtrsg.rs +++ b/src/hrpwm0/csgtrsg.rs @@ -1,261 +1,261 @@ #[doc = "Register `CSGTRSG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "DAC0 shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D0ste { +pub enum D0STE_A { #[doc = "0: Shadow transfer has been performed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested but is still pending completion."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D0ste) -> Self { + fn from(variant: D0STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D0STE` reader - DAC0 shadow transfer enable"] -pub type D0steR = crate::BitReader; -impl D0steR { +pub type D0STE_R = crate::BitReader; +impl D0STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D0ste { + pub const fn variant(&self) -> D0STE_A { match self.bits { - false => D0ste::Value1, - true => D0ste::Value2, + false => D0STE_A::VALUE1, + true => D0STE_A::VALUE2, } } #[doc = "Shadow transfer has been performed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D0ste::Value1 + *self == D0STE_A::VALUE1 } #[doc = "Shadow transfer has been requested but is still pending completion."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D0ste::Value2 + *self == D0STE_A::VALUE2 } } #[doc = "CMP0 inverting input connection status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sw0st { +pub enum SW0ST_A { #[doc = "0: Inverting input connected to HRPWMx.C0I\\[A\\]"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverting input connected to HRPWMx.C0I\\[B\\]"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sw0st) -> Self { + fn from(variant: SW0ST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SW0ST` reader - CMP0 inverting input connection status"] -pub type Sw0stR = crate::BitReader; -impl Sw0stR { +pub type SW0ST_R = crate::BitReader; +impl SW0ST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sw0st { + pub const fn variant(&self) -> SW0ST_A { match self.bits { - false => Sw0st::Value1, - true => Sw0st::Value2, + false => SW0ST_A::VALUE1, + true => SW0ST_A::VALUE2, } } #[doc = "Inverting input connected to HRPWMx.C0I\\[A\\]"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sw0st::Value1 + *self == SW0ST_A::VALUE1 } #[doc = "Inverting input connected to HRPWMx.C0I\\[B\\]"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sw0st::Value2 + *self == SW0ST_A::VALUE2 } } #[doc = "DAC1 shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D1ste { +pub enum D1STE_A { #[doc = "0: Shadow transfer has been performed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested but is still pending completion."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D1ste) -> Self { + fn from(variant: D1STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D1STE` reader - DAC1 shadow transfer enable"] -pub type D1steR = crate::BitReader; -impl D1steR { +pub type D1STE_R = crate::BitReader; +impl D1STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D1ste { + pub const fn variant(&self) -> D1STE_A { match self.bits { - false => D1ste::Value1, - true => D1ste::Value2, + false => D1STE_A::VALUE1, + true => D1STE_A::VALUE2, } } #[doc = "Shadow transfer has been performed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D1ste::Value1 + *self == D1STE_A::VALUE1 } #[doc = "Shadow transfer has been requested but is still pending completion."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D1ste::Value2 + *self == D1STE_A::VALUE2 } } #[doc = "CMP1 inverting input connection status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sw1st { +pub enum SW1ST_A { #[doc = "0: Inverting input connected to HRPWMx.C1I\\[A\\]"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverting input connected to HRPWMx.C1I\\[B\\]"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sw1st) -> Self { + fn from(variant: SW1ST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SW1ST` reader - CMP1 inverting input connection status"] -pub type Sw1stR = crate::BitReader; -impl Sw1stR { +pub type SW1ST_R = crate::BitReader; +impl SW1ST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sw1st { + pub const fn variant(&self) -> SW1ST_A { match self.bits { - false => Sw1st::Value1, - true => Sw1st::Value2, + false => SW1ST_A::VALUE1, + true => SW1ST_A::VALUE2, } } #[doc = "Inverting input connected to HRPWMx.C1I\\[A\\]"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sw1st::Value1 + *self == SW1ST_A::VALUE1 } #[doc = "Inverting input connected to HRPWMx.C1I\\[B\\]"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sw1st::Value2 + *self == SW1ST_A::VALUE2 } } #[doc = "DAC2 shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum D2ste { +pub enum D2STE_A { #[doc = "0: Shadow transfer has been performed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer has been requested but is still pending completion."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: D2ste) -> Self { + fn from(variant: D2STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `D2STE` reader - DAC2 shadow transfer enable"] -pub type D2steR = crate::BitReader; -impl D2steR { +pub type D2STE_R = crate::BitReader; +impl D2STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> D2ste { + pub const fn variant(&self) -> D2STE_A { match self.bits { - false => D2ste::Value1, - true => D2ste::Value2, + false => D2STE_A::VALUE1, + true => D2STE_A::VALUE2, } } #[doc = "Shadow transfer has been performed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == D2ste::Value1 + *self == D2STE_A::VALUE1 } #[doc = "Shadow transfer has been requested but is still pending completion."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == D2ste::Value2 + *self == D2STE_A::VALUE2 } } #[doc = "CMP2 inverting input connection status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sw2st { +pub enum SW2ST_A { #[doc = "0: Inverting input connected to HRPWMx.C2I\\[A\\]"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverting input connected to HRPWMx.C2I\\[B\\]"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sw2st) -> Self { + fn from(variant: SW2ST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SW2ST` reader - CMP2 inverting input connection status"] -pub type Sw2stR = crate::BitReader; -impl Sw2stR { +pub type SW2ST_R = crate::BitReader; +impl SW2ST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sw2st { + pub const fn variant(&self) -> SW2ST_A { match self.bits { - false => Sw2st::Value1, - true => Sw2st::Value2, + false => SW2ST_A::VALUE1, + true => SW2ST_A::VALUE2, } } #[doc = "Inverting input connected to HRPWMx.C2I\\[A\\]"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sw2st::Value1 + *self == SW2ST_A::VALUE1 } #[doc = "Inverting input connected to HRPWMx.C2I\\[B\\]"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sw2st::Value2 + *self == SW2ST_A::VALUE2 } } impl R { #[doc = "Bit 0 - DAC0 shadow transfer enable"] #[inline(always)] - pub fn d0ste(&self) -> D0steR { - D0steR::new((self.bits & 1) != 0) + pub fn d0ste(&self) -> D0STE_R { + D0STE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - CMP0 inverting input connection status"] #[inline(always)] - pub fn sw0st(&self) -> Sw0stR { - Sw0stR::new(((self.bits >> 1) & 1) != 0) + pub fn sw0st(&self) -> SW0ST_R { + SW0ST_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - DAC1 shadow transfer enable"] #[inline(always)] - pub fn d1ste(&self) -> D1steR { - D1steR::new(((self.bits >> 4) & 1) != 0) + pub fn d1ste(&self) -> D1STE_R { + D1STE_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - CMP1 inverting input connection status"] #[inline(always)] - pub fn sw1st(&self) -> Sw1stR { - Sw1stR::new(((self.bits >> 5) & 1) != 0) + pub fn sw1st(&self) -> SW1ST_R { + SW1ST_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - DAC2 shadow transfer enable"] #[inline(always)] - pub fn d2ste(&self) -> D2steR { - D2steR::new(((self.bits >> 8) & 1) != 0) + pub fn d2ste(&self) -> D2STE_R { + D2STE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - CMP2 inverting input connection status"] #[inline(always)] - pub fn sw2st(&self) -> Sw2stR { - Sw2stR::new(((self.bits >> 9) & 1) != 0) + pub fn sw2st(&self) -> SW2ST_R { + SW2ST_R::new(((self.bits >> 9) & 1) != 0) } } #[doc = "Global CSG shadow/switch status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`csgtrsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CsgtrsgSpec; -impl crate::RegisterSpec for CsgtrsgSpec { +pub struct CSGTRSG_SPEC; +impl crate::RegisterSpec for CSGTRSG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`csgtrsg::R`](R) reader structure"] -impl crate::Readable for CsgtrsgSpec {} +impl crate::Readable for CSGTRSG_SPEC {} #[doc = "`reset()` method sets CSGTRSG to value 0"] -impl crate::Resettable for CsgtrsgSpec { +impl crate::Resettable for CSGTRSG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/glbana.rs b/src/hrpwm0/glbana.rs index 1444d67b..9f788b3b 100644 --- a/src/hrpwm0/glbana.rs +++ b/src/hrpwm0/glbana.rs @@ -1,209 +1,209 @@ #[doc = "Register `GLBANA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLBANA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SLDLY` reader - Delay of lock detection"] -pub type SldlyR = crate::FieldReader; +pub type SLDLY_R = crate::FieldReader; #[doc = "Field `SLDLY` writer - Delay of lock detection"] -pub type SldlyW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SLDLY_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FUP` reader - Force chargepump up"] -pub type FupR = crate::BitReader; +pub type FUP_R = crate::BitReader; #[doc = "Field `FUP` writer - Force chargepump up"] -pub type FupW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `FDN` reader - Force chargepump down"] -pub type FdnR = crate::BitReader; +pub type FDN_R = crate::BitReader; #[doc = "Field `FDN` writer - Force chargepump down"] -pub type FdnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FDN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SLCP` reader - HRCs chargepump current selection"] -pub type SlcpR = crate::FieldReader; +pub type SLCP_R = crate::FieldReader; #[doc = "Field `SLCP` writer - HRCs chargepump current selection"] -pub type SlcpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SLCP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `SLIBLDO` reader - HRCs LDO bias current"] -pub type SlibldoR = crate::FieldReader; +pub type SLIBLDO_R = crate::FieldReader; #[doc = "Field `SLIBLDO` writer - HRCs LDO bias current"] -pub type SlibldoW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SLIBLDO_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SLIBLF` reader - HRCs loop filter bias current"] -pub type SliblfR = crate::FieldReader; +pub type SLIBLF_R = crate::FieldReader; #[doc = "Field `SLIBLF` writer - HRCs loop filter bias current"] -pub type SliblfW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SLIBLF_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `SLVREF` reader - Reference voltage for chargepump and loop filter"] -pub type SlvrefR = crate::FieldReader; +pub type SLVREF_R = crate::FieldReader; #[doc = "Field `SLVREF` writer - Reference voltage for chargepump and loop filter"] -pub type SlvrefW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type SLVREF_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `TRIBIAS` reader - Bias trimming"] -pub type TribiasR = crate::FieldReader; +pub type TRIBIAS_R = crate::FieldReader; #[doc = "Field `TRIBIAS` writer - Bias trimming"] -pub type TribiasW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type TRIBIAS_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Force chargepump down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ghren { +pub enum GHREN_A { #[doc = "0: Global high resolution generation is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Global high resolution generation is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ghren) -> Self { + fn from(variant: GHREN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GHREN` reader - Force chargepump down"] -pub type GhrenR = crate::BitReader; -impl GhrenR { +pub type GHREN_R = crate::BitReader; +impl GHREN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ghren { + pub const fn variant(&self) -> GHREN_A { match self.bits { - false => Ghren::Value1, - true => Ghren::Value2, + false => GHREN_A::VALUE1, + true => GHREN_A::VALUE2, } } #[doc = "Global high resolution generation is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ghren::Value1 + *self == GHREN_A::VALUE1 } #[doc = "Global high resolution generation is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ghren::Value2 + *self == GHREN_A::VALUE2 } } #[doc = "Field `GHREN` writer - Force chargepump down"] -pub type GhrenW<'a, REG> = crate::BitWriter<'a, REG, Ghren>; -impl<'a, REG> GhrenW<'a, REG> +pub type GHREN_W<'a, REG> = crate::BitWriter<'a, REG, GHREN_A>; +impl<'a, REG> GHREN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Global high resolution generation is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ghren::Value1) + self.variant(GHREN_A::VALUE1) } #[doc = "Global high resolution generation is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ghren::Value2) + self.variant(GHREN_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Delay of lock detection"] #[inline(always)] - pub fn sldly(&self) -> SldlyR { - SldlyR::new((self.bits & 3) as u8) + pub fn sldly(&self) -> SLDLY_R { + SLDLY_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Force chargepump up"] #[inline(always)] - pub fn fup(&self) -> FupR { - FupR::new(((self.bits >> 2) & 1) != 0) + pub fn fup(&self) -> FUP_R { + FUP_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Force chargepump down"] #[inline(always)] - pub fn fdn(&self) -> FdnR { - FdnR::new(((self.bits >> 3) & 1) != 0) + pub fn fdn(&self) -> FDN_R { + FDN_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 6:8 - HRCs chargepump current selection"] #[inline(always)] - pub fn slcp(&self) -> SlcpR { - SlcpR::new(((self.bits >> 6) & 7) as u8) + pub fn slcp(&self) -> SLCP_R { + SLCP_R::new(((self.bits >> 6) & 7) as u8) } #[doc = "Bits 9:10 - HRCs LDO bias current"] #[inline(always)] - pub fn slibldo(&self) -> SlibldoR { - SlibldoR::new(((self.bits >> 9) & 3) as u8) + pub fn slibldo(&self) -> SLIBLDO_R { + SLIBLDO_R::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bits 11:12 - HRCs loop filter bias current"] #[inline(always)] - pub fn sliblf(&self) -> SliblfR { - SliblfR::new(((self.bits >> 11) & 3) as u8) + pub fn sliblf(&self) -> SLIBLF_R { + SLIBLF_R::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bits 13:15 - Reference voltage for chargepump and loop filter"] #[inline(always)] - pub fn slvref(&self) -> SlvrefR { - SlvrefR::new(((self.bits >> 13) & 7) as u8) + pub fn slvref(&self) -> SLVREF_R { + SLVREF_R::new(((self.bits >> 13) & 7) as u8) } #[doc = "Bits 16:17 - Bias trimming"] #[inline(always)] - pub fn tribias(&self) -> TribiasR { - TribiasR::new(((self.bits >> 16) & 3) as u8) + pub fn tribias(&self) -> TRIBIAS_R { + TRIBIAS_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 18 - Force chargepump down"] #[inline(always)] - pub fn ghren(&self) -> GhrenR { - GhrenR::new(((self.bits >> 18) & 1) != 0) + pub fn ghren(&self) -> GHREN_R { + GHREN_R::new(((self.bits >> 18) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Delay of lock detection"] #[inline(always)] #[must_use] - pub fn sldly(&mut self) -> SldlyW { - SldlyW::new(self, 0) + pub fn sldly(&mut self) -> SLDLY_W { + SLDLY_W::new(self, 0) } #[doc = "Bit 2 - Force chargepump up"] #[inline(always)] #[must_use] - pub fn fup(&mut self) -> FupW { - FupW::new(self, 2) + pub fn fup(&mut self) -> FUP_W { + FUP_W::new(self, 2) } #[doc = "Bit 3 - Force chargepump down"] #[inline(always)] #[must_use] - pub fn fdn(&mut self) -> FdnW { - FdnW::new(self, 3) + pub fn fdn(&mut self) -> FDN_W { + FDN_W::new(self, 3) } #[doc = "Bits 6:8 - HRCs chargepump current selection"] #[inline(always)] #[must_use] - pub fn slcp(&mut self) -> SlcpW { - SlcpW::new(self, 6) + pub fn slcp(&mut self) -> SLCP_W { + SLCP_W::new(self, 6) } #[doc = "Bits 9:10 - HRCs LDO bias current"] #[inline(always)] #[must_use] - pub fn slibldo(&mut self) -> SlibldoW { - SlibldoW::new(self, 9) + pub fn slibldo(&mut self) -> SLIBLDO_W { + SLIBLDO_W::new(self, 9) } #[doc = "Bits 11:12 - HRCs loop filter bias current"] #[inline(always)] #[must_use] - pub fn sliblf(&mut self) -> SliblfW { - SliblfW::new(self, 11) + pub fn sliblf(&mut self) -> SLIBLF_W { + SLIBLF_W::new(self, 11) } #[doc = "Bits 13:15 - Reference voltage for chargepump and loop filter"] #[inline(always)] #[must_use] - pub fn slvref(&mut self) -> SlvrefW { - SlvrefW::new(self, 13) + pub fn slvref(&mut self) -> SLVREF_W { + SLVREF_W::new(self, 13) } #[doc = "Bits 16:17 - Bias trimming"] #[inline(always)] #[must_use] - pub fn tribias(&mut self) -> TribiasW { - TribiasW::new(self, 16) + pub fn tribias(&mut self) -> TRIBIAS_W { + TRIBIAS_W::new(self, 16) } #[doc = "Bit 18 - Force chargepump down"] #[inline(always)] #[must_use] - pub fn ghren(&mut self) -> GhrenW { - GhrenW::new(self, 18) + pub fn ghren(&mut self) -> GHREN_W { + GHREN_W::new(self, 18) } } #[doc = "Global Analog Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`glbana::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`glbana::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlbanaSpec; -impl crate::RegisterSpec for GlbanaSpec { +pub struct GLBANA_SPEC; +impl crate::RegisterSpec for GLBANA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`glbana::R`](R) reader structure"] -impl crate::Readable for GlbanaSpec {} +impl crate::Readable for GLBANA_SPEC {} #[doc = "`write(|w| ..)` method takes [`glbana::W`](W) writer structure"] -impl crate::Writable for GlbanaSpec { +impl crate::Writable for GLBANA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLBANA to value 0x4b8c"] -impl crate::Resettable for GlbanaSpec { +impl crate::Resettable for GLBANA_SPEC { const RESET_VALUE: u32 = 0x4b8c; } diff --git a/src/hrpwm0/hrbsc.rs b/src/hrpwm0/hrbsc.rs index 1fd57df0..d76d5bce 100644 --- a/src/hrpwm0/hrbsc.rs +++ b/src/hrpwm0/hrbsc.rs @@ -1,68 +1,68 @@ #[doc = "Register `HRBSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HRBSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Suspend configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Suscfg { +pub enum SUSCFG_A { #[doc = "0: Suspend is ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGy and HRCy units are halted."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Comparator outputs, HRPWMx.CyO are clamped to passive level and the CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Suscfg) -> Self { + fn from(variant: SUSCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Suscfg { +impl crate::FieldSpec for SUSCFG_A { type Ux = u8; } -impl crate::IsEnum for Suscfg {} +impl crate::IsEnum for SUSCFG_A {} #[doc = "Field `SUSCFG` reader - Suspend configuration"] -pub type SuscfgR = crate::FieldReader; -impl SuscfgR { +pub type SUSCFG_R = crate::FieldReader; +impl SUSCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Suscfg::Value1), - 1 => Some(Suscfg::Value2), - 2 => Some(Suscfg::Value3), - 3 => Some(Suscfg::Value4), + 0 => Some(SUSCFG_A::VALUE1), + 1 => Some(SUSCFG_A::VALUE2), + 2 => Some(SUSCFG_A::VALUE3), + 3 => Some(SUSCFG_A::VALUE4), _ => None, } } #[doc = "Suspend is ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Suscfg::Value1 + *self == SUSCFG_A::VALUE1 } #[doc = "CSGy and HRCy units are halted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Suscfg::Value2 + *self == SUSCFG_A::VALUE2 } #[doc = "Comparator outputs, HRPWMx.CyO are clamped to passive level and the CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Suscfg::Value3 + *self == SUSCFG_A::VALUE3 } #[doc = "CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Suscfg::Value4 + *self == SUSCFG_A::VALUE4 } } #[doc = "Field `SUSCFG` writer - Suspend configuration"] -pub type SuscfgW<'a, REG> = crate::FieldWriter<'a, REG, 3, Suscfg>; -impl<'a, REG> SuscfgW<'a, REG> +pub type SUSCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SUSCFG_A>; +impl<'a, REG> SUSCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,68 +70,68 @@ where #[doc = "Suspend is ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Suscfg::Value1) + self.variant(SUSCFG_A::VALUE1) } #[doc = "CSGy and HRCy units are halted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Suscfg::Value2) + self.variant(SUSCFG_A::VALUE2) } #[doc = "Comparator outputs, HRPWMx.CyO are clamped to passive level and the CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Suscfg::Value3) + self.variant(SUSCFG_A::VALUE3) } #[doc = "CSGy units are halted. High resolution channel outputs, HRPWMx.HROUTy0 and HRPWMx.HROUTy1, are clamped to passive state and the HRCy units are halted."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Suscfg::Value4) + self.variant(SUSCFG_A::VALUE4) } } #[doc = "Field `HRBE` reader - HRPWM bias enable"] -pub type HrbeR = crate::BitReader; +pub type HRBE_R = crate::BitReader; #[doc = "Field `HRBE` writer - HRPWM bias enable"] -pub type HrbeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type HRBE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - Suspend configuration"] #[inline(always)] - pub fn suscfg(&self) -> SuscfgR { - SuscfgR::new((self.bits & 7) as u8) + pub fn suscfg(&self) -> SUSCFG_R { + SUSCFG_R::new((self.bits & 7) as u8) } #[doc = "Bit 8 - HRPWM bias enable"] #[inline(always)] - pub fn hrbe(&self) -> HrbeR { - HrbeR::new(((self.bits >> 8) & 1) != 0) + pub fn hrbe(&self) -> HRBE_R { + HRBE_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Suspend configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SuscfgW { - SuscfgW::new(self, 0) + pub fn suscfg(&mut self) -> SUSCFG_W { + SUSCFG_W::new(self, 0) } #[doc = "Bit 8 - HRPWM bias enable"] #[inline(always)] #[must_use] - pub fn hrbe(&mut self) -> HrbeW { - HrbeW::new(self, 8) + pub fn hrbe(&mut self) -> HRBE_W { + HRBE_W::new(self, 8) } } #[doc = "Bias and suspend configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrbsc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrbsc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrbscSpec; -impl crate::RegisterSpec for HrbscSpec { +pub struct HRBSC_SPEC; +impl crate::RegisterSpec for HRBSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hrbsc::R`](R) reader structure"] -impl crate::Readable for HrbscSpec {} +impl crate::Readable for HRBSC_SPEC {} #[doc = "`write(|w| ..)` method takes [`hrbsc::W`](W) writer structure"] -impl crate::Writable for HrbscSpec { +impl crate::Writable for HRBSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HRBSC to value 0"] -impl crate::Resettable for HrbscSpec { +impl crate::Resettable for HRBSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/hrccfg.rs b/src/hrpwm0/hrccfg.rs index 91a5f836..8df8e213 100644 --- a/src/hrpwm0/hrccfg.rs +++ b/src/hrpwm0/hrccfg.rs @@ -1,333 +1,333 @@ #[doc = "Register `HRCCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HRCCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "High resolution channels power mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrcpm { +pub enum HRCPM_A { #[doc = "0: High resolution generation logic is OFF. It is not possible to generate high resolution signals throughout any of the high resolution channels, HRCy."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: High resolution generation logic is ON. In this mode it is possible to generate a high resolution signal placement with the HRCy subunits."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrcpm) -> Self { + fn from(variant: HRCPM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRCPM` reader - High resolution channels power mode"] -pub type HrcpmR = crate::BitReader; -impl HrcpmR { +pub type HRCPM_R = crate::BitReader; +impl HRCPM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrcpm { + pub const fn variant(&self) -> HRCPM_A { match self.bits { - false => Hrcpm::Value1, - true => Hrcpm::Value2, + false => HRCPM_A::VALUE1, + true => HRCPM_A::VALUE2, } } #[doc = "High resolution generation logic is OFF. It is not possible to generate high resolution signals throughout any of the high resolution channels, HRCy."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrcpm::Value1 + *self == HRCPM_A::VALUE1 } #[doc = "High resolution generation logic is ON. In this mode it is possible to generate a high resolution signal placement with the HRCy subunits."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrcpm::Value2 + *self == HRCPM_A::VALUE2 } } #[doc = "Field `HRCPM` writer - High resolution channels power mode"] -pub type HrcpmW<'a, REG> = crate::BitWriter<'a, REG, Hrcpm>; -impl<'a, REG> HrcpmW<'a, REG> +pub type HRCPM_W<'a, REG> = crate::BitWriter<'a, REG, HRCPM_A>; +impl<'a, REG> HRCPM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "High resolution generation logic is OFF. It is not possible to generate high resolution signals throughout any of the high resolution channels, HRCy."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrcpm::Value1) + self.variant(HRCPM_A::VALUE1) } #[doc = "High resolution generation logic is ON. In this mode it is possible to generate a high resolution signal placement with the HRCy subunits."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrcpm::Value2) + self.variant(HRCPM_A::VALUE2) } } #[doc = "HRC0 high resolution enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrc0e { +pub enum HRC0E_A { #[doc = "0: HRC0 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC0 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC0 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrc0e) -> Self { + fn from(variant: HRC0E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRC0E` reader - HRC0 high resolution enable"] -pub type Hrc0eR = crate::BitReader; -impl Hrc0eR { +pub type HRC0E_R = crate::BitReader; +impl HRC0E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrc0e { + pub const fn variant(&self) -> HRC0E_A { match self.bits { - false => Hrc0e::Value1, - true => Hrc0e::Value2, + false => HRC0E_A::VALUE1, + true => HRC0E_A::VALUE2, } } #[doc = "HRC0 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC0 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrc0e::Value1 + *self == HRC0E_A::VALUE1 } #[doc = "HRC0 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrc0e::Value2 + *self == HRC0E_A::VALUE2 } } #[doc = "Field `HRC0E` writer - HRC0 high resolution enable"] -pub type Hrc0eW<'a, REG> = crate::BitWriter<'a, REG, Hrc0e>; -impl<'a, REG> Hrc0eW<'a, REG> +pub type HRC0E_W<'a, REG> = crate::BitWriter<'a, REG, HRC0E_A>; +impl<'a, REG> HRC0E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC0 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC0 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrc0e::Value1) + self.variant(HRC0E_A::VALUE1) } #[doc = "HRC0 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrc0e::Value2) + self.variant(HRC0E_A::VALUE2) } } #[doc = "HRC1 high resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrc1e { +pub enum HRC1E_A { #[doc = "0: HRC1 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC1 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC1 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrc1e) -> Self { + fn from(variant: HRC1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRC1E` reader - HRC1 high resolution channel enable"] -pub type Hrc1eR = crate::BitReader; -impl Hrc1eR { +pub type HRC1E_R = crate::BitReader; +impl HRC1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrc1e { + pub const fn variant(&self) -> HRC1E_A { match self.bits { - false => Hrc1e::Value1, - true => Hrc1e::Value2, + false => HRC1E_A::VALUE1, + true => HRC1E_A::VALUE2, } } #[doc = "HRC1 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC1 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrc1e::Value1 + *self == HRC1E_A::VALUE1 } #[doc = "HRC1 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrc1e::Value2 + *self == HRC1E_A::VALUE2 } } #[doc = "Field `HRC1E` writer - HRC1 high resolution channel enable"] -pub type Hrc1eW<'a, REG> = crate::BitWriter<'a, REG, Hrc1e>; -impl<'a, REG> Hrc1eW<'a, REG> +pub type HRC1E_W<'a, REG> = crate::BitWriter<'a, REG, HRC1E_A>; +impl<'a, REG> HRC1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC1 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC1 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrc1e::Value1) + self.variant(HRC1E_A::VALUE1) } #[doc = "HRC1 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrc1e::Value2) + self.variant(HRC1E_A::VALUE2) } } #[doc = "HRC2 high resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrc2e { +pub enum HRC2E_A { #[doc = "0: HRC2 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC2 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC2 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrc2e) -> Self { + fn from(variant: HRC2E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRC2E` reader - HRC2 high resolution channel enable"] -pub type Hrc2eR = crate::BitReader; -impl Hrc2eR { +pub type HRC2E_R = crate::BitReader; +impl HRC2E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrc2e { + pub const fn variant(&self) -> HRC2E_A { match self.bits { - false => Hrc2e::Value1, - true => Hrc2e::Value2, + false => HRC2E_A::VALUE1, + true => HRC2E_A::VALUE2, } } #[doc = "HRC2 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC2 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrc2e::Value1 + *self == HRC2E_A::VALUE1 } #[doc = "HRC2 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrc2e::Value2 + *self == HRC2E_A::VALUE2 } } #[doc = "Field `HRC2E` writer - HRC2 high resolution channel enable"] -pub type Hrc2eW<'a, REG> = crate::BitWriter<'a, REG, Hrc2e>; -impl<'a, REG> Hrc2eW<'a, REG> +pub type HRC2E_W<'a, REG> = crate::BitWriter<'a, REG, HRC2E_A>; +impl<'a, REG> HRC2E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC2 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC2 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrc2e::Value1) + self.variant(HRC2E_A::VALUE1) } #[doc = "HRC2 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrc2e::Value2) + self.variant(HRC2E_A::VALUE2) } } #[doc = "HRC3 high resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrc3e { +pub enum HRC3E_A { #[doc = "0: HRC3 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC3 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC3 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrc3e) -> Self { + fn from(variant: HRC3E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRC3E` reader - HRC3 high resolution channel enable"] -pub type Hrc3eR = crate::BitReader; -impl Hrc3eR { +pub type HRC3E_R = crate::BitReader; +impl HRC3E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrc3e { + pub const fn variant(&self) -> HRC3E_A { match self.bits { - false => Hrc3e::Value1, - true => Hrc3e::Value2, + false => HRC3E_A::VALUE1, + true => HRC3E_A::VALUE2, } } #[doc = "HRC3 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC3 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrc3e::Value1 + *self == HRC3E_A::VALUE1 } #[doc = "HRC3 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrc3e::Value2 + *self == HRC3E_A::VALUE2 } } #[doc = "Field `HRC3E` writer - HRC3 high resolution channel enable"] -pub type Hrc3eW<'a, REG> = crate::BitWriter<'a, REG, Hrc3e>; -impl<'a, REG> Hrc3eW<'a, REG> +pub type HRC3E_W<'a, REG> = crate::BitWriter<'a, REG, HRC3E_A>; +impl<'a, REG> HRC3E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC3 High Resolution Path is disabled. In this mode, is not possible to use the High Resolution Path inside of HRC3 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrc3e::Value1) + self.variant(HRC3E_A::VALUE1) } #[doc = "HRC3 High Resolution Path is enabled. In this mode it is possible to generate a high resolution PWM signal if HRCPM = 1#."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrc3e::Value2) + self.variant(HRC3E_A::VALUE2) } } #[doc = "Clock information control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Clkc { +pub enum CLKC_A { #[doc = "0: No clock frequency is selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Module clock frequency is 180 MHz"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Module clock frequency is 120 MHz"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Module clock frequency is 80 MHz"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Clkc) -> Self { + fn from(variant: CLKC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clkc { +impl crate::FieldSpec for CLKC_A { type Ux = u8; } -impl crate::IsEnum for Clkc {} +impl crate::IsEnum for CLKC_A {} #[doc = "Field `CLKC` reader - Clock information control"] -pub type ClkcR = crate::FieldReader; -impl ClkcR { +pub type CLKC_R = crate::FieldReader; +impl CLKC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clkc::Value1), - 1 => Some(Clkc::Value2), - 2 => Some(Clkc::Value3), - 3 => Some(Clkc::Value4), + 0 => Some(CLKC_A::VALUE1), + 1 => Some(CLKC_A::VALUE2), + 2 => Some(CLKC_A::VALUE3), + 3 => Some(CLKC_A::VALUE4), _ => None, } } #[doc = "No clock frequency is selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Clkc::Value1 + *self == CLKC_A::VALUE1 } #[doc = "Module clock frequency is 180 MHz"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Clkc::Value2 + *self == CLKC_A::VALUE2 } #[doc = "Module clock frequency is 120 MHz"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clkc::Value3 + *self == CLKC_A::VALUE3 } #[doc = "Module clock frequency is 80 MHz"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clkc::Value4 + *self == CLKC_A::VALUE4 } } #[doc = "Field `CLKC` writer - Clock information control"] -pub type ClkcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Clkc>; -impl<'a, REG> ClkcW<'a, REG> +pub type CLKC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CLKC_A>; +impl<'a, REG> CLKC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -335,364 +335,364 @@ where #[doc = "No clock frequency is selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clkc::Value1) + self.variant(CLKC_A::VALUE1) } #[doc = "Module clock frequency is 180 MHz"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Clkc::Value2) + self.variant(CLKC_A::VALUE2) } #[doc = "Module clock frequency is 120 MHz"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clkc::Value3) + self.variant(CLKC_A::VALUE3) } #[doc = "Module clock frequency is 80 MHz"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clkc::Value4) + self.variant(CLKC_A::VALUE4) } } #[doc = "HRC0 low resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lrc0e { +pub enum LRC0E_A { #[doc = "0: HRC0 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC0 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC0 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lrc0e) -> Self { + fn from(variant: LRC0E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LRC0E` reader - HRC0 low resolution channel enable"] -pub type Lrc0eR = crate::BitReader; -impl Lrc0eR { +pub type LRC0E_R = crate::BitReader; +impl LRC0E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lrc0e { + pub const fn variant(&self) -> LRC0E_A { match self.bits { - false => Lrc0e::Value1, - true => Lrc0e::Value2, + false => LRC0E_A::VALUE1, + true => LRC0E_A::VALUE2, } } #[doc = "HRC0 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC0 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lrc0e::Value1 + *self == LRC0E_A::VALUE1 } #[doc = "HRC0 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lrc0e::Value2 + *self == LRC0E_A::VALUE2 } } #[doc = "Field `LRC0E` writer - HRC0 low resolution channel enable"] -pub type Lrc0eW<'a, REG> = crate::BitWriter<'a, REG, Lrc0e>; -impl<'a, REG> Lrc0eW<'a, REG> +pub type LRC0E_W<'a, REG> = crate::BitWriter<'a, REG, LRC0E_A>; +impl<'a, REG> LRC0E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC0 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC0 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lrc0e::Value1) + self.variant(LRC0E_A::VALUE1) } #[doc = "HRC0 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lrc0e::Value2) + self.variant(LRC0E_A::VALUE2) } } #[doc = "HRC1 low resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lrc1e { +pub enum LRC1E_A { #[doc = "0: HRC1 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC1 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC1 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lrc1e) -> Self { + fn from(variant: LRC1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LRC1E` reader - HRC1 low resolution channel enable"] -pub type Lrc1eR = crate::BitReader; -impl Lrc1eR { +pub type LRC1E_R = crate::BitReader; +impl LRC1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lrc1e { + pub const fn variant(&self) -> LRC1E_A { match self.bits { - false => Lrc1e::Value1, - true => Lrc1e::Value2, + false => LRC1E_A::VALUE1, + true => LRC1E_A::VALUE2, } } #[doc = "HRC1 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC1 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lrc1e::Value1 + *self == LRC1E_A::VALUE1 } #[doc = "HRC1 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lrc1e::Value2 + *self == LRC1E_A::VALUE2 } } #[doc = "Field `LRC1E` writer - HRC1 low resolution channel enable"] -pub type Lrc1eW<'a, REG> = crate::BitWriter<'a, REG, Lrc1e>; -impl<'a, REG> Lrc1eW<'a, REG> +pub type LRC1E_W<'a, REG> = crate::BitWriter<'a, REG, LRC1E_A>; +impl<'a, REG> LRC1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC1 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC1 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lrc1e::Value1) + self.variant(LRC1E_A::VALUE1) } #[doc = "HRC1 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lrc1e::Value2) + self.variant(LRC1E_A::VALUE2) } } #[doc = "HRC2 low resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lrc2e { +pub enum LRC2E_A { #[doc = "0: HRC2 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC2 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC2 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lrc2e) -> Self { + fn from(variant: LRC2E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LRC2E` reader - HRC2 low resolution channel enable"] -pub type Lrc2eR = crate::BitReader; -impl Lrc2eR { +pub type LRC2E_R = crate::BitReader; +impl LRC2E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lrc2e { + pub const fn variant(&self) -> LRC2E_A { match self.bits { - false => Lrc2e::Value1, - true => Lrc2e::Value2, + false => LRC2E_A::VALUE1, + true => LRC2E_A::VALUE2, } } #[doc = "HRC2 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC2 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lrc2e::Value1 + *self == LRC2E_A::VALUE1 } #[doc = "HRC2 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lrc2e::Value2 + *self == LRC2E_A::VALUE2 } } #[doc = "Field `LRC2E` writer - HRC2 low resolution channel enable"] -pub type Lrc2eW<'a, REG> = crate::BitWriter<'a, REG, Lrc2e>; -impl<'a, REG> Lrc2eW<'a, REG> +pub type LRC2E_W<'a, REG> = crate::BitWriter<'a, REG, LRC2E_A>; +impl<'a, REG> LRC2E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC2 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC2 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lrc2e::Value1) + self.variant(LRC2E_A::VALUE1) } #[doc = "HRC2 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lrc2e::Value2) + self.variant(LRC2E_A::VALUE2) } } #[doc = "HRC3 low resolution channel enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lrc3e { +pub enum LRC3E_A { #[doc = "0: HRC3 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC3 to generate an output PWM signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRC3 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lrc3e) -> Self { + fn from(variant: LRC3E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LRC3E` reader - HRC3 low resolution channel enable"] -pub type Lrc3eR = crate::BitReader; -impl Lrc3eR { +pub type LRC3E_R = crate::BitReader; +impl LRC3E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lrc3e { + pub const fn variant(&self) -> LRC3E_A { match self.bits { - false => Lrc3e::Value1, - true => Lrc3e::Value2, + false => LRC3E_A::VALUE1, + true => LRC3E_A::VALUE2, } } #[doc = "HRC3 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC3 to generate an output PWM signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lrc3e::Value1 + *self == LRC3E_A::VALUE1 } #[doc = "HRC3 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lrc3e::Value2 + *self == LRC3E_A::VALUE2 } } #[doc = "Field `LRC3E` writer - HRC3 low resolution channel enable"] -pub type Lrc3eW<'a, REG> = crate::BitWriter<'a, REG, Lrc3e>; -impl<'a, REG> Lrc3eW<'a, REG> +pub type LRC3E_W<'a, REG> = crate::BitWriter<'a, REG, LRC3E_A>; +impl<'a, REG> LRC3E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRC3 Low Resolution Path is disabled. In this mode, is not possible to use the Low Resolution Path inside of HRC3 to generate an output PWM signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lrc3e::Value1) + self.variant(LRC3E_A::VALUE1) } #[doc = "HRC3 Low Resolution Path is enabled. In this mode it is possible to generate a an output PWM signal via the Low Resolution Path."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lrc3e::Value2) + self.variant(LRC3E_A::VALUE2) } } impl R { #[doc = "Bit 0 - High resolution channels power mode"] #[inline(always)] - pub fn hrcpm(&self) -> HrcpmR { - HrcpmR::new((self.bits & 1) != 0) + pub fn hrcpm(&self) -> HRCPM_R { + HRCPM_R::new((self.bits & 1) != 0) } #[doc = "Bit 4 - HRC0 high resolution enable"] #[inline(always)] - pub fn hrc0e(&self) -> Hrc0eR { - Hrc0eR::new(((self.bits >> 4) & 1) != 0) + pub fn hrc0e(&self) -> HRC0E_R { + HRC0E_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - HRC1 high resolution channel enable"] #[inline(always)] - pub fn hrc1e(&self) -> Hrc1eR { - Hrc1eR::new(((self.bits >> 5) & 1) != 0) + pub fn hrc1e(&self) -> HRC1E_R { + HRC1E_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - HRC2 high resolution channel enable"] #[inline(always)] - pub fn hrc2e(&self) -> Hrc2eR { - Hrc2eR::new(((self.bits >> 6) & 1) != 0) + pub fn hrc2e(&self) -> HRC2E_R { + HRC2E_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - HRC3 high resolution channel enable"] #[inline(always)] - pub fn hrc3e(&self) -> Hrc3eR { - Hrc3eR::new(((self.bits >> 7) & 1) != 0) + pub fn hrc3e(&self) -> HRC3E_R { + HRC3E_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 16:18 - Clock information control"] #[inline(always)] - pub fn clkc(&self) -> ClkcR { - ClkcR::new(((self.bits >> 16) & 7) as u8) + pub fn clkc(&self) -> CLKC_R { + CLKC_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bit 20 - HRC0 low resolution channel enable"] #[inline(always)] - pub fn lrc0e(&self) -> Lrc0eR { - Lrc0eR::new(((self.bits >> 20) & 1) != 0) + pub fn lrc0e(&self) -> LRC0E_R { + LRC0E_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - HRC1 low resolution channel enable"] #[inline(always)] - pub fn lrc1e(&self) -> Lrc1eR { - Lrc1eR::new(((self.bits >> 21) & 1) != 0) + pub fn lrc1e(&self) -> LRC1E_R { + LRC1E_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - HRC2 low resolution channel enable"] #[inline(always)] - pub fn lrc2e(&self) -> Lrc2eR { - Lrc2eR::new(((self.bits >> 22) & 1) != 0) + pub fn lrc2e(&self) -> LRC2E_R { + LRC2E_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - HRC3 low resolution channel enable"] #[inline(always)] - pub fn lrc3e(&self) -> Lrc3eR { - Lrc3eR::new(((self.bits >> 23) & 1) != 0) + pub fn lrc3e(&self) -> LRC3E_R { + LRC3E_R::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - High resolution channels power mode"] #[inline(always)] #[must_use] - pub fn hrcpm(&mut self) -> HrcpmW { - HrcpmW::new(self, 0) + pub fn hrcpm(&mut self) -> HRCPM_W { + HRCPM_W::new(self, 0) } #[doc = "Bit 4 - HRC0 high resolution enable"] #[inline(always)] #[must_use] - pub fn hrc0e(&mut self) -> Hrc0eW { - Hrc0eW::new(self, 4) + pub fn hrc0e(&mut self) -> HRC0E_W { + HRC0E_W::new(self, 4) } #[doc = "Bit 5 - HRC1 high resolution channel enable"] #[inline(always)] #[must_use] - pub fn hrc1e(&mut self) -> Hrc1eW { - Hrc1eW::new(self, 5) + pub fn hrc1e(&mut self) -> HRC1E_W { + HRC1E_W::new(self, 5) } #[doc = "Bit 6 - HRC2 high resolution channel enable"] #[inline(always)] #[must_use] - pub fn hrc2e(&mut self) -> Hrc2eW { - Hrc2eW::new(self, 6) + pub fn hrc2e(&mut self) -> HRC2E_W { + HRC2E_W::new(self, 6) } #[doc = "Bit 7 - HRC3 high resolution channel enable"] #[inline(always)] #[must_use] - pub fn hrc3e(&mut self) -> Hrc3eW { - Hrc3eW::new(self, 7) + pub fn hrc3e(&mut self) -> HRC3E_W { + HRC3E_W::new(self, 7) } #[doc = "Bits 16:18 - Clock information control"] #[inline(always)] #[must_use] - pub fn clkc(&mut self) -> ClkcW { - ClkcW::new(self, 16) + pub fn clkc(&mut self) -> CLKC_W { + CLKC_W::new(self, 16) } #[doc = "Bit 20 - HRC0 low resolution channel enable"] #[inline(always)] #[must_use] - pub fn lrc0e(&mut self) -> Lrc0eW { - Lrc0eW::new(self, 20) + pub fn lrc0e(&mut self) -> LRC0E_W { + LRC0E_W::new(self, 20) } #[doc = "Bit 21 - HRC1 low resolution channel enable"] #[inline(always)] #[must_use] - pub fn lrc1e(&mut self) -> Lrc1eW { - Lrc1eW::new(self, 21) + pub fn lrc1e(&mut self) -> LRC1E_W { + LRC1E_W::new(self, 21) } #[doc = "Bit 22 - HRC2 low resolution channel enable"] #[inline(always)] #[must_use] - pub fn lrc2e(&mut self) -> Lrc2eW { - Lrc2eW::new(self, 22) + pub fn lrc2e(&mut self) -> LRC2E_W { + LRC2E_W::new(self, 22) } #[doc = "Bit 23 - HRC3 low resolution channel enable"] #[inline(always)] #[must_use] - pub fn lrc3e(&mut self) -> Lrc3eW { - Lrc3eW::new(self, 23) + pub fn lrc3e(&mut self) -> LRC3E_W { + LRC3E_W::new(self, 23) } } #[doc = "Global HRC configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrccfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrccfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrccfgSpec; -impl crate::RegisterSpec for HrccfgSpec { +pub struct HRCCFG_SPEC; +impl crate::RegisterSpec for HRCCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hrccfg::R`](R) reader structure"] -impl crate::Readable for HrccfgSpec {} +impl crate::Readable for HRCCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`hrccfg::W`](W) writer structure"] -impl crate::Writable for HrccfgSpec { +impl crate::Writable for HRCCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HRCCFG to value 0"] -impl crate::Resettable for HrccfgSpec { +impl crate::Resettable for HRCCFG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/hrcctrg.rs b/src/hrpwm0/hrcctrg.rs index 334af9b2..90530b0c 100644 --- a/src/hrpwm0/hrcctrg.rs +++ b/src/hrpwm0/hrcctrg.rs @@ -1,83 +1,83 @@ #[doc = "Register `HRCCTRG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `H0EC` writer - HRC0 high resolution values shadow transfer Enable Clear"] -pub type H0ecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H0EC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H0DEC` writer - HRC0 dead time value shadow transfer Enable Clear"] -pub type H0decW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H0DEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H1EC` writer - HRC1 high resolution values shadow transfer Enable Clear"] -pub type H1ecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H1EC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H1DEC` writer - HRC1 dead time value shadow transfer Enable Clear"] -pub type H1decW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H1DEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H2CEC` writer - HRC2 high resolution values shadow transfer Enable Clear"] -pub type H2cecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H2CEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H2DEC` writer - HRC2 dead time value shadow transfer Enable Clear"] -pub type H2decW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H2DEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H3EC` writer - HRC3 high resolution values shadow transfer Enable Clear"] -pub type H3ecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H3EC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H3DEC` writer - HRC3 dead time value shadow transfer Enable Clear"] -pub type H3decW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H3DEC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - HRC0 high resolution values shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h0ec(&mut self) -> H0ecW { - H0ecW::new(self, 0) + pub fn h0ec(&mut self) -> H0EC_W { + H0EC_W::new(self, 0) } #[doc = "Bit 1 - HRC0 dead time value shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h0dec(&mut self) -> H0decW { - H0decW::new(self, 1) + pub fn h0dec(&mut self) -> H0DEC_W { + H0DEC_W::new(self, 1) } #[doc = "Bit 4 - HRC1 high resolution values shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h1ec(&mut self) -> H1ecW { - H1ecW::new(self, 4) + pub fn h1ec(&mut self) -> H1EC_W { + H1EC_W::new(self, 4) } #[doc = "Bit 5 - HRC1 dead time value shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h1dec(&mut self) -> H1decW { - H1decW::new(self, 5) + pub fn h1dec(&mut self) -> H1DEC_W { + H1DEC_W::new(self, 5) } #[doc = "Bit 8 - HRC2 high resolution values shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h2cec(&mut self) -> H2cecW { - H2cecW::new(self, 8) + pub fn h2cec(&mut self) -> H2CEC_W { + H2CEC_W::new(self, 8) } #[doc = "Bit 9 - HRC2 dead time value shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h2dec(&mut self) -> H2decW { - H2decW::new(self, 9) + pub fn h2dec(&mut self) -> H2DEC_W { + H2DEC_W::new(self, 9) } #[doc = "Bit 12 - HRC3 high resolution values shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h3ec(&mut self) -> H3ecW { - H3ecW::new(self, 12) + pub fn h3ec(&mut self) -> H3EC_W { + H3EC_W::new(self, 12) } #[doc = "Bit 13 - HRC3 dead time value shadow transfer Enable Clear"] #[inline(always)] #[must_use] - pub fn h3dec(&mut self) -> H3decW { - H3decW::new(self, 13) + pub fn h3dec(&mut self) -> H3DEC_W { + H3DEC_W::new(self, 13) } } #[doc = "Global HRC shadow trigger clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcctrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrcctrgSpec; -impl crate::RegisterSpec for HrcctrgSpec { +pub struct HRCCTRG_SPEC; +impl crate::RegisterSpec for HRCCTRG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hrcctrg::W`](W) writer structure"] -impl crate::Writable for HrcctrgSpec { +impl crate::Writable for HRCCTRG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HRCCTRG to value 0"] -impl crate::Resettable for HrcctrgSpec { +impl crate::Resettable for HRCCTRG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/hrcstrg.rs b/src/hrpwm0/hrcstrg.rs index 29f2acf3..7d3871a7 100644 --- a/src/hrpwm0/hrcstrg.rs +++ b/src/hrpwm0/hrcstrg.rs @@ -1,83 +1,83 @@ #[doc = "Register `HRCSTRG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `H0ES` writer - HRC0 high resolution values shadow transfer Enable Set"] -pub type H0esW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H0ES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H0DES` writer - HRC0 dead time value shadow transfer enable set"] -pub type H0desW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H0DES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H1ES` writer - HRC1 high resolution values shadow transfer Enable Set"] -pub type H1esW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H1ES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H1DES` writer - HRC0 dead time value shadow transfer enable set"] -pub type H1desW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H1DES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H2ES` writer - HRC2 high resolution values shadow transfer Enable Set"] -pub type H2esW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H2ES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H2DES` writer - HRC0 dead time value shadow transfer enable set"] -pub type H2desW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H2DES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H3ES` writer - HRC3 high resolution values shadow transfer Enable Set"] -pub type H3esW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H3ES_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `H3DES` writer - HRC0 dead time value shadow transfer enable set"] -pub type H3desW<'a, REG> = crate::BitWriter<'a, REG>; +pub type H3DES_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - HRC0 high resolution values shadow transfer Enable Set"] #[inline(always)] #[must_use] - pub fn h0es(&mut self) -> H0esW { - H0esW::new(self, 0) + pub fn h0es(&mut self) -> H0ES_W { + H0ES_W::new(self, 0) } #[doc = "Bit 1 - HRC0 dead time value shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn h0des(&mut self) -> H0desW { - H0desW::new(self, 1) + pub fn h0des(&mut self) -> H0DES_W { + H0DES_W::new(self, 1) } #[doc = "Bit 4 - HRC1 high resolution values shadow transfer Enable Set"] #[inline(always)] #[must_use] - pub fn h1es(&mut self) -> H1esW { - H1esW::new(self, 4) + pub fn h1es(&mut self) -> H1ES_W { + H1ES_W::new(self, 4) } #[doc = "Bit 5 - HRC0 dead time value shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn h1des(&mut self) -> H1desW { - H1desW::new(self, 5) + pub fn h1des(&mut self) -> H1DES_W { + H1DES_W::new(self, 5) } #[doc = "Bit 8 - HRC2 high resolution values shadow transfer Enable Set"] #[inline(always)] #[must_use] - pub fn h2es(&mut self) -> H2esW { - H2esW::new(self, 8) + pub fn h2es(&mut self) -> H2ES_W { + H2ES_W::new(self, 8) } #[doc = "Bit 9 - HRC0 dead time value shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn h2des(&mut self) -> H2desW { - H2desW::new(self, 9) + pub fn h2des(&mut self) -> H2DES_W { + H2DES_W::new(self, 9) } #[doc = "Bit 12 - HRC3 high resolution values shadow transfer Enable Set"] #[inline(always)] #[must_use] - pub fn h3es(&mut self) -> H3esW { - H3esW::new(self, 12) + pub fn h3es(&mut self) -> H3ES_W { + H3ES_W::new(self, 12) } #[doc = "Bit 13 - HRC0 dead time value shadow transfer enable set"] #[inline(always)] #[must_use] - pub fn h3des(&mut self) -> H3desW { - H3desW::new(self, 13) + pub fn h3des(&mut self) -> H3DES_W { + H3DES_W::new(self, 13) } } #[doc = "Global HRC shadow trigger set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hrcstrg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrcstrgSpec; -impl crate::RegisterSpec for HrcstrgSpec { +pub struct HRCSTRG_SPEC; +impl crate::RegisterSpec for HRCSTRG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hrcstrg::W`](W) writer structure"] -impl crate::Writable for HrcstrgSpec { +impl crate::Writable for HRCSTRG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HRCSTRG to value 0"] -impl crate::Resettable for HrcstrgSpec { +impl crate::Resettable for HRCSTRG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/hrcstsg.rs b/src/hrpwm0/hrcstsg.rs index d3bd04ba..e0fe7197 100644 --- a/src/hrpwm0/hrcstsg.rs +++ b/src/hrpwm0/hrcstsg.rs @@ -1,343 +1,343 @@ #[doc = "Register `HRCSTSG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "HRC0 high resolution values shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H0ste { +pub enum H0STE_A { #[doc = "0: No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H0ste) -> Self { + fn from(variant: H0STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H0STE` reader - HRC0 high resolution values shadow transfer status"] -pub type H0steR = crate::BitReader; -impl H0steR { +pub type H0STE_R = crate::BitReader; +impl H0STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H0ste { + pub const fn variant(&self) -> H0STE_A { match self.bits { - false => H0ste::Value1, - true => H0ste::Value2, + false => H0STE_A::VALUE1, + true => H0STE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H0ste::Value1 + *self == H0STE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H0ste::Value2 + *self == H0STE_A::VALUE2 } } #[doc = "HRC0 dead time value shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H0dste { +pub enum H0DSTE_A { #[doc = "0: No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H0dste) -> Self { + fn from(variant: H0DSTE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H0DSTE` reader - HRC0 dead time value shadow transfer status"] -pub type H0dsteR = crate::BitReader; -impl H0dsteR { +pub type H0DSTE_R = crate::BitReader; +impl H0DSTE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H0dste { + pub const fn variant(&self) -> H0DSTE_A { match self.bits { - false => H0dste::Value1, - true => H0dste::Value2, + false => H0DSTE_A::VALUE1, + true => H0DSTE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H0dste::Value1 + *self == H0DSTE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H0dste::Value2 + *self == H0DSTE_A::VALUE2 } } #[doc = "HRC1 high resolution values shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H1ste { +pub enum H1STE_A { #[doc = "0: No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H1ste) -> Self { + fn from(variant: H1STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H1STE` reader - HRC1 high resolution values shadow transfer status"] -pub type H1steR = crate::BitReader; -impl H1steR { +pub type H1STE_R = crate::BitReader; +impl H1STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H1ste { + pub const fn variant(&self) -> H1STE_A { match self.bits { - false => H1ste::Value1, - true => H1ste::Value2, + false => H1STE_A::VALUE1, + true => H1STE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H1ste::Value1 + *self == H1STE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H1ste::Value2 + *self == H1STE_A::VALUE2 } } #[doc = "HRC1 dead time value shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H1dste { +pub enum H1DSTE_A { #[doc = "0: No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H1dste) -> Self { + fn from(variant: H1DSTE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H1DSTE` reader - HRC1 dead time value shadow transfer status"] -pub type H1dsteR = crate::BitReader; -impl H1dsteR { +pub type H1DSTE_R = crate::BitReader; +impl H1DSTE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H1dste { + pub const fn variant(&self) -> H1DSTE_A { match self.bits { - false => H1dste::Value1, - true => H1dste::Value2, + false => H1DSTE_A::VALUE1, + true => H1DSTE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H1dste::Value1 + *self == H1DSTE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H1dste::Value2 + *self == H1DSTE_A::VALUE2 } } #[doc = "HRC2 high resolution values shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H2ste { +pub enum H2STE_A { #[doc = "0: No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H2ste) -> Self { + fn from(variant: H2STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H2STE` reader - HRC2 high resolution values shadow transfer status"] -pub type H2steR = crate::BitReader; -impl H2steR { +pub type H2STE_R = crate::BitReader; +impl H2STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H2ste { + pub const fn variant(&self) -> H2STE_A { match self.bits { - false => H2ste::Value1, - true => H2ste::Value2, + false => H2STE_A::VALUE1, + true => H2STE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H2ste::Value1 + *self == H2STE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H2ste::Value2 + *self == H2STE_A::VALUE2 } } #[doc = "HRC2 dead time value shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H2dste { +pub enum H2DSTE_A { #[doc = "0: No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H2dste) -> Self { + fn from(variant: H2DSTE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H2DSTE` reader - HRC2 dead time value shadow transfer status"] -pub type H2dsteR = crate::BitReader; -impl H2dsteR { +pub type H2DSTE_R = crate::BitReader; +impl H2DSTE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H2dste { + pub const fn variant(&self) -> H2DSTE_A { match self.bits { - false => H2dste::Value1, - true => H2dste::Value2, + false => H2DSTE_A::VALUE1, + true => H2DSTE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H2dste::Value1 + *self == H2DSTE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H2dste::Value2 + *self == H2DSTE_A::VALUE2 } } #[doc = "HRC3 high resolution values shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H3ste { +pub enum H3STE_A { #[doc = "0: No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H3ste) -> Self { + fn from(variant: H3STE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H3STE` reader - HRC3 high resolution values shadow transfer status"] -pub type H3steR = crate::BitReader; -impl H3steR { +pub type H3STE_R = crate::BitReader; +impl H3STE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H3ste { + pub const fn variant(&self) -> H3STE_A { match self.bits { - false => H3ste::Value1, - true => H3ste::Value2, + false => H3STE_A::VALUE1, + true => H3STE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H3ste::Value1 + *self == H3STE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H3ste::Value2 + *self == H3STE_A::VALUE2 } } #[doc = "HRC3 dead time value shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum H3dste { +pub enum H3DSTE_A { #[doc = "0: No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: H3dste) -> Self { + fn from(variant: H3DSTE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `H3DSTE` reader - HRC3 dead time value shadow transfer status"] -pub type H3dsteR = crate::BitReader; -impl H3dsteR { +pub type H3DSTE_R = crate::BitReader; +impl H3DSTE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> H3dste { + pub const fn variant(&self) -> H3DSTE_A { match self.bits { - false => H3dste::Value1, - true => H3dste::Value2, + false => H3DSTE_A::VALUE1, + true => H3DSTE_A::VALUE2, } } #[doc = "No shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == H3dste::Value1 + *self == H3DSTE_A::VALUE1 } #[doc = "Shadow transfer pending for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == H3dste::Value2 + *self == H3DSTE_A::VALUE2 } } impl R { #[doc = "Bit 0 - HRC0 high resolution values shadow transfer status"] #[inline(always)] - pub fn h0ste(&self) -> H0steR { - H0steR::new((self.bits & 1) != 0) + pub fn h0ste(&self) -> H0STE_R { + H0STE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - HRC0 dead time value shadow transfer status"] #[inline(always)] - pub fn h0dste(&self) -> H0dsteR { - H0dsteR::new(((self.bits >> 1) & 1) != 0) + pub fn h0dste(&self) -> H0DSTE_R { + H0DSTE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - HRC1 high resolution values shadow transfer status"] #[inline(always)] - pub fn h1ste(&self) -> H1steR { - H1steR::new(((self.bits >> 4) & 1) != 0) + pub fn h1ste(&self) -> H1STE_R { + H1STE_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - HRC1 dead time value shadow transfer status"] #[inline(always)] - pub fn h1dste(&self) -> H1dsteR { - H1dsteR::new(((self.bits >> 5) & 1) != 0) + pub fn h1dste(&self) -> H1DSTE_R { + H1DSTE_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 8 - HRC2 high resolution values shadow transfer status"] #[inline(always)] - pub fn h2ste(&self) -> H2steR { - H2steR::new(((self.bits >> 8) & 1) != 0) + pub fn h2ste(&self) -> H2STE_R { + H2STE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - HRC2 dead time value shadow transfer status"] #[inline(always)] - pub fn h2dste(&self) -> H2dsteR { - H2dsteR::new(((self.bits >> 9) & 1) != 0) + pub fn h2dste(&self) -> H2DSTE_R { + H2DSTE_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - HRC3 high resolution values shadow transfer status"] #[inline(always)] - pub fn h3ste(&self) -> H3steR { - H3steR::new(((self.bits >> 12) & 1) != 0) + pub fn h3ste(&self) -> H3STE_R { + H3STE_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HRC3 dead time value shadow transfer status"] #[inline(always)] - pub fn h3dste(&self) -> H3dsteR { - H3dsteR::new(((self.bits >> 13) & 1) != 0) + pub fn h3dste(&self) -> H3DSTE_R { + H3DSTE_R::new(((self.bits >> 13) & 1) != 0) } } #[doc = "Global HRC shadow transfer status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrcstsg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrcstsgSpec; -impl crate::RegisterSpec for HrcstsgSpec { +pub struct HRCSTSG_SPEC; +impl crate::RegisterSpec for HRCSTSG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hrcstsg::R`](R) reader structure"] -impl crate::Readable for HrcstsgSpec {} +impl crate::Readable for HRCSTSG_SPEC {} #[doc = "`reset()` method sets HRCSTSG to value 0"] -impl crate::Resettable for HrcstsgSpec { +impl crate::Resettable for HRCSTSG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/hrghrs.rs b/src/hrpwm0/hrghrs.rs index 35f82616..1ae91a57 100644 --- a/src/hrpwm0/hrghrs.rs +++ b/src/hrpwm0/hrghrs.rs @@ -1,56 +1,56 @@ #[doc = "Register `HRGHRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "High Resolution Generation Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrgr { +pub enum HRGR_A { #[doc = "0: High resolution logic is not working"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: High resolution logic is working"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrgr) -> Self { + fn from(variant: HRGR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRGR` reader - High Resolution Generation Ready"] -pub type HrgrR = crate::BitReader; -impl HrgrR { +pub type HRGR_R = crate::BitReader; +impl HRGR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrgr { + pub const fn variant(&self) -> HRGR_A { match self.bits { - false => Hrgr::Value1, - true => Hrgr::Value2, + false => HRGR_A::VALUE1, + true => HRGR_A::VALUE2, } } #[doc = "High resolution logic is not working"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrgr::Value1 + *self == HRGR_A::VALUE1 } #[doc = "High resolution logic is working"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrgr::Value2 + *self == HRGR_A::VALUE2 } } impl R { #[doc = "Bit 0 - High Resolution Generation Ready"] #[inline(always)] - pub fn hrgr(&self) -> HrgrR { - HrgrR::new((self.bits & 1) != 0) + pub fn hrgr(&self) -> HRGR_R { + HRGR_R::new((self.bits & 1) != 0) } } #[doc = "High Resolution Generation Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hrghrs::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HrghrsSpec; -impl crate::RegisterSpec for HrghrsSpec { +pub struct HRGHRS_SPEC; +impl crate::RegisterSpec for HRGHRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hrghrs::R`](R) reader structure"] -impl crate::Readable for HrghrsSpec {} +impl crate::Readable for HRGHRS_SPEC {} #[doc = "`reset()` method sets HRGHRS to value 0"] -impl crate::Resettable for HrghrsSpec { +impl crate::Resettable for HRGHRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0/midr.rs b/src/hrpwm0/midr.rs index 78dfe54c..22096da2 100644 --- a/src/hrpwm0/midr.rs +++ b/src/hrpwm0/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type ModrR = crate::FieldReader; +pub type MODR_R = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type ModtR = crate::FieldReader; +pub type MODT_R = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type ModnR = crate::FieldReader; +pub type MODN_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> ModrR { - ModrR::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> MODR_R { + MODR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> ModtR { - ModtR::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> MODT_R { + MODT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> ModnR { - ModnR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> MODN_R { + MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MidrSpec; -impl crate::RegisterSpec for MidrSpec { +pub struct MIDR_SPEC; +impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MidrSpec {} +impl crate::Readable for MIDR_SPEC {} #[doc = "`reset()` method sets MIDR to value 0x00a9_c000"] -impl crate::Resettable for MidrSpec { +impl crate::Resettable for MIDR_SPEC { const RESET_VALUE: u32 = 0x00a9_c000; } diff --git a/src/hrpwm0_csg0.rs b/src/hrpwm0_csg0.rs index 412f6735..dbaa7df1 100644 --- a/src/hrpwm0_csg0.rs +++ b/src/hrpwm0_csg0.rs @@ -1,198 +1,182 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - dci: Dci, - ies: Ies, - sc: Sc, - pc: Pc, - dsv1: Dsv1, - dsv2: Dsv2, - sdsv1: Sdsv1, - spc: Spc, - cc: Cc, - plc: Plc, - blv: Blv, - sre: Sre, - srs: Srs, - sws: Sws, - swc: Swc, - istat: Istat, + dci: DCI, + ies: IES, + sc: SC, + pc: PC, + dsv1: DSV1, + dsv2: DSV2, + sdsv1: SDSV1, + spc: SPC, + cc: CC, + plc: PLC, + blv: BLV, + sre: SRE, + srs: SRS, + sws: SWS, + swc: SWC, + istat: ISTAT, } impl RegisterBlock { #[doc = "0x00 - External input selection"] #[inline(always)] - pub const fn dci(&self) -> &Dci { + pub const fn dci(&self) -> &DCI { &self.dci } #[doc = "0x04 - External input selection"] #[inline(always)] - pub const fn ies(&self) -> &Ies { + pub const fn ies(&self) -> &IES { &self.ies } #[doc = "0x08 - Slope generation control"] #[inline(always)] - pub const fn sc(&self) -> &Sc { + pub const fn sc(&self) -> &SC { &self.sc } #[doc = "0x0c - Pulse swallow configuration"] #[inline(always)] - pub const fn pc(&self) -> &Pc { + pub const fn pc(&self) -> &PC { &self.pc } #[doc = "0x10 - DAC reference value 1"] #[inline(always)] - pub const fn dsv1(&self) -> &Dsv1 { + pub const fn dsv1(&self) -> &DSV1 { &self.dsv1 } #[doc = "0x14 - DAC reference value 1"] #[inline(always)] - pub const fn dsv2(&self) -> &Dsv2 { + pub const fn dsv2(&self) -> &DSV2 { &self.dsv2 } #[doc = "0x18 - Shadow reference value 1"] #[inline(always)] - pub const fn sdsv1(&self) -> &Sdsv1 { + pub const fn sdsv1(&self) -> &SDSV1 { &self.sdsv1 } #[doc = "0x1c - Shadow Pulse swallow value"] #[inline(always)] - pub const fn spc(&self) -> &Spc { + pub const fn spc(&self) -> &SPC { &self.spc } #[doc = "0x20 - Comparator configuration"] #[inline(always)] - pub const fn cc(&self) -> &Cc { + pub const fn cc(&self) -> &CC { &self.cc } #[doc = "0x24 - Passive level configuration"] #[inline(always)] - pub const fn plc(&self) -> &Plc { + pub const fn plc(&self) -> &PLC { &self.plc } #[doc = "0x28 - Comparator blanking value"] #[inline(always)] - pub const fn blv(&self) -> &Blv { + pub const fn blv(&self) -> &BLV { &self.blv } #[doc = "0x2c - Service request enable"] #[inline(always)] - pub const fn sre(&self) -> &Sre { + pub const fn sre(&self) -> &SRE { &self.sre } #[doc = "0x30 - Service request line selector"] #[inline(always)] - pub const fn srs(&self) -> &Srs { + pub const fn srs(&self) -> &SRS { &self.srs } #[doc = "0x34 - Service request SW set"] #[inline(always)] - pub const fn sws(&self) -> &Sws { + pub const fn sws(&self) -> &SWS { &self.sws } #[doc = "0x38 - Service request SW clear"] #[inline(always)] - pub const fn swc(&self) -> &Swc { + pub const fn swc(&self) -> &SWC { &self.swc } #[doc = "0x3c - Service request status"] #[inline(always)] - pub const fn istat(&self) -> &Istat { + pub const fn istat(&self) -> &ISTAT { &self.istat } } #[doc = "DCI (rw) register accessor: External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dci::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dci::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dci`] module"] -#[doc(alias = "DCI")] -pub type Dci = crate::Reg; +pub type DCI = crate::Reg; #[doc = "External input selection"] pub mod dci; #[doc = "IES (rw) register accessor: External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ies::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ies::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ies`] module"] -#[doc(alias = "IES")] -pub type Ies = crate::Reg; +pub type IES = crate::Reg; #[doc = "External input selection"] pub mod ies; #[doc = "SC (rw) register accessor: Slope generation control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] module"] -#[doc(alias = "SC")] -pub type Sc = crate::Reg; +pub type SC = crate::Reg; #[doc = "Slope generation control"] pub mod sc; #[doc = "PC (r) register accessor: Pulse swallow configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pc`] module"] -#[doc(alias = "PC")] -pub type Pc = crate::Reg; +pub type PC = crate::Reg; #[doc = "Pulse swallow configuration"] pub mod pc; #[doc = "DSV1 (r) register accessor: DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv1`] module"] -#[doc(alias = "DSV1")] -pub type Dsv1 = crate::Reg; +pub type DSV1 = crate::Reg; #[doc = "DAC reference value 1"] pub mod dsv1; #[doc = "DSV2 (rw) register accessor: DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsv2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsv2`] module"] -#[doc(alias = "DSV2")] -pub type Dsv2 = crate::Reg; +pub type DSV2 = crate::Reg; #[doc = "DAC reference value 1"] pub mod dsv2; #[doc = "SDSV1 (rw) register accessor: Shadow reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdsv1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdsv1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdsv1`] module"] -#[doc(alias = "SDSV1")] -pub type Sdsv1 = crate::Reg; +pub type SDSV1 = crate::Reg; #[doc = "Shadow reference value 1"] pub mod sdsv1; #[doc = "SPC (rw) register accessor: Shadow Pulse swallow value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spc`] module"] -#[doc(alias = "SPC")] -pub type Spc = crate::Reg; +pub type SPC = crate::Reg; #[doc = "Shadow Pulse swallow value"] pub mod spc; #[doc = "CC (rw) register accessor: Comparator configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cc`] module"] -#[doc(alias = "CC")] -pub type Cc = crate::Reg; +pub type CC = crate::Reg; #[doc = "Comparator configuration"] pub mod cc; #[doc = "PLC (rw) register accessor: Passive level configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`plc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`plc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@plc`] module"] -#[doc(alias = "PLC")] -pub type Plc = crate::Reg; +pub type PLC = crate::Reg; #[doc = "Passive level configuration"] pub mod plc; #[doc = "BLV (rw) register accessor: Comparator blanking value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`blv::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`blv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@blv`] module"] -#[doc(alias = "BLV")] -pub type Blv = crate::Reg; +pub type BLV = crate::Reg; #[doc = "Comparator blanking value"] pub mod blv; #[doc = "SRE (rw) register accessor: Service request enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sre::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sre::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sre`] module"] -#[doc(alias = "SRE")] -pub type Sre = crate::Reg; +pub type SRE = crate::Reg; #[doc = "Service request enable"] pub mod sre; #[doc = "SRS (rw) register accessor: Service request line selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srs`] module"] -#[doc(alias = "SRS")] -pub type Srs = crate::Reg; +pub type SRS = crate::Reg; #[doc = "Service request line selector"] pub mod srs; #[doc = "SWS (w) register accessor: Service request SW set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sws`] module"] -#[doc(alias = "SWS")] -pub type Sws = crate::Reg; +pub type SWS = crate::Reg; #[doc = "Service request SW set"] pub mod sws; #[doc = "SWC (w) register accessor: Service request SW clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@swc`] module"] -#[doc(alias = "SWC")] -pub type Swc = crate::Reg; +pub type SWC = crate::Reg; #[doc = "Service request SW clear"] pub mod swc; #[doc = "ISTAT (r) register accessor: Service request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`istat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@istat`] module"] -#[doc(alias = "ISTAT")] -pub type Istat = crate::Reg; +pub type ISTAT = crate::Reg; #[doc = "Service request status"] pub mod istat; diff --git a/src/hrpwm0_csg0/blv.rs b/src/hrpwm0_csg0/blv.rs index d5175ae3..699c32b3 100644 --- a/src/hrpwm0_csg0/blv.rs +++ b/src/hrpwm0_csg0/blv.rs @@ -1,40 +1,40 @@ #[doc = "Register `BLV` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BLV` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BLV` reader - Blanking value"] -pub type BlvR = crate::FieldReader; +pub type BLV_R = crate::FieldReader; #[doc = "Field `BLV` writer - Blanking value"] -pub type BlvW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type BLV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Blanking value"] #[inline(always)] - pub fn blv(&self) -> BlvR { - BlvR::new((self.bits & 0xff) as u8) + pub fn blv(&self) -> BLV_R { + BLV_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Blanking value"] #[inline(always)] #[must_use] - pub fn blv(&mut self) -> BlvW { - BlvW::new(self, 0) + pub fn blv(&mut self) -> BLV_W { + BLV_W::new(self, 0) } } #[doc = "Comparator blanking value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`blv::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`blv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BlvSpec; -impl crate::RegisterSpec for BlvSpec { +pub struct BLV_SPEC; +impl crate::RegisterSpec for BLV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`blv::R`](R) reader structure"] -impl crate::Readable for BlvSpec {} +impl crate::Readable for BLV_SPEC {} #[doc = "`write(|w| ..)` method takes [`blv::W`](W) writer structure"] -impl crate::Writable for BlvSpec { +impl crate::Writable for BLV_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BLV to value 0"] -impl crate::Resettable for BlvSpec { +impl crate::Resettable for BLV_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/cc.rs b/src/hrpwm0_csg0/cc.rs index 26e8e0ab..7df822e0 100644 --- a/src/hrpwm0_csg0/cc.rs +++ b/src/hrpwm0_csg0/cc.rs @@ -1,164 +1,164 @@ #[doc = "Register `CC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "External blanking trigger selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ibs { +pub enum IBS_A { #[doc = "0: HRPWMx.BLyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.BLyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HRPWMx.BLyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: HRPWMx.BLyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: HRPWMx.BLyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: HRPWMx.BLyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: HRPWMx.BLyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: HRPWMx.BLyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: HRPWMx.BLyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: HRPWMx.BLyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: HRPWMx.BLyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: HRPWMx.BLyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: HRPWMx.BLyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: HRPWMx.BLyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: HRPWMx.BLyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: HRPWMx.BLyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ibs) -> Self { + fn from(variant: IBS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ibs { +impl crate::FieldSpec for IBS_A { type Ux = u8; } -impl crate::IsEnum for Ibs {} +impl crate::IsEnum for IBS_A {} #[doc = "Field `IBS` reader - External blanking trigger selector"] -pub type IbsR = crate::FieldReader; -impl IbsR { +pub type IBS_R = crate::FieldReader; +impl IBS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ibs { + pub const fn variant(&self) -> IBS_A { match self.bits { - 0 => Ibs::Value1, - 1 => Ibs::Value2, - 2 => Ibs::Value3, - 3 => Ibs::Value4, - 4 => Ibs::Value5, - 5 => Ibs::Value6, - 6 => Ibs::Value7, - 7 => Ibs::Value8, - 8 => Ibs::Value9, - 9 => Ibs::Value10, - 10 => Ibs::Value11, - 11 => Ibs::Value12, - 12 => Ibs::Value13, - 13 => Ibs::Value14, - 14 => Ibs::Value15, - 15 => Ibs::Value16, + 0 => IBS_A::VALUE1, + 1 => IBS_A::VALUE2, + 2 => IBS_A::VALUE3, + 3 => IBS_A::VALUE4, + 4 => IBS_A::VALUE5, + 5 => IBS_A::VALUE6, + 6 => IBS_A::VALUE7, + 7 => IBS_A::VALUE8, + 8 => IBS_A::VALUE9, + 9 => IBS_A::VALUE10, + 10 => IBS_A::VALUE11, + 11 => IBS_A::VALUE12, + 12 => IBS_A::VALUE13, + 13 => IBS_A::VALUE14, + 14 => IBS_A::VALUE15, + 15 => IBS_A::VALUE16, _ => unreachable!(), } } #[doc = "HRPWMx.BLyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ibs::Value1 + *self == IBS_A::VALUE1 } #[doc = "HRPWMx.BLyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ibs::Value2 + *self == IBS_A::VALUE2 } #[doc = "HRPWMx.BLyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ibs::Value3 + *self == IBS_A::VALUE3 } #[doc = "HRPWMx.BLyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ibs::Value4 + *self == IBS_A::VALUE4 } #[doc = "HRPWMx.BLyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ibs::Value5 + *self == IBS_A::VALUE5 } #[doc = "HRPWMx.BLyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ibs::Value6 + *self == IBS_A::VALUE6 } #[doc = "HRPWMx.BLyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ibs::Value7 + *self == IBS_A::VALUE7 } #[doc = "HRPWMx.BLyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ibs::Value8 + *self == IBS_A::VALUE8 } #[doc = "HRPWMx.BLyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ibs::Value9 + *self == IBS_A::VALUE9 } #[doc = "HRPWMx.BLyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ibs::Value10 + *self == IBS_A::VALUE10 } #[doc = "HRPWMx.BLyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ibs::Value11 + *self == IBS_A::VALUE11 } #[doc = "HRPWMx.BLyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ibs::Value12 + *self == IBS_A::VALUE12 } #[doc = "HRPWMx.BLyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ibs::Value13 + *self == IBS_A::VALUE13 } #[doc = "HRPWMx.BLyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ibs::Value14 + *self == IBS_A::VALUE14 } #[doc = "HRPWMx.BLyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ibs::Value15 + *self == IBS_A::VALUE15 } #[doc = "HRPWMx.BLyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ibs::Value16 + *self == IBS_A::VALUE16 } } #[doc = "Field `IBS` writer - External blanking trigger selector"] -pub type IbsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ibs, crate::Safe>; -impl<'a, REG> IbsW<'a, REG> +pub type IBS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, IBS_A, crate::Safe>; +impl<'a, REG> IBS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -166,190 +166,190 @@ where #[doc = "HRPWMx.BLyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ibs::Value1) + self.variant(IBS_A::VALUE1) } #[doc = "HRPWMx.BLyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ibs::Value2) + self.variant(IBS_A::VALUE2) } #[doc = "HRPWMx.BLyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ibs::Value3) + self.variant(IBS_A::VALUE3) } #[doc = "HRPWMx.BLyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ibs::Value4) + self.variant(IBS_A::VALUE4) } #[doc = "HRPWMx.BLyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ibs::Value5) + self.variant(IBS_A::VALUE5) } #[doc = "HRPWMx.BLyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ibs::Value6) + self.variant(IBS_A::VALUE6) } #[doc = "HRPWMx.BLyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ibs::Value7) + self.variant(IBS_A::VALUE7) } #[doc = "HRPWMx.BLyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ibs::Value8) + self.variant(IBS_A::VALUE8) } #[doc = "HRPWMx.BLyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ibs::Value9) + self.variant(IBS_A::VALUE9) } #[doc = "HRPWMx.BLyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ibs::Value10) + self.variant(IBS_A::VALUE10) } #[doc = "HRPWMx.BLyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ibs::Value11) + self.variant(IBS_A::VALUE11) } #[doc = "HRPWMx.BLyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ibs::Value12) + self.variant(IBS_A::VALUE12) } #[doc = "HRPWMx.BLyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ibs::Value13) + self.variant(IBS_A::VALUE13) } #[doc = "HRPWMx.BLyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ibs::Value14) + self.variant(IBS_A::VALUE14) } #[doc = "HRPWMx.BLyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ibs::Value15) + self.variant(IBS_A::VALUE15) } #[doc = "HRPWMx.BLyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ibs::Value16) + self.variant(IBS_A::VALUE16) } } #[doc = "Inverting comparator input selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Imcs { +pub enum IMCS_A { #[doc = "0: HRPWMx.CyINA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.CyINB"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Imcs) -> Self { + fn from(variant: IMCS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IMCS` reader - Inverting comparator input selector"] -pub type ImcsR = crate::BitReader; -impl ImcsR { +pub type IMCS_R = crate::BitReader; +impl IMCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Imcs { + pub const fn variant(&self) -> IMCS_A { match self.bits { - false => Imcs::Value1, - true => Imcs::Value2, + false => IMCS_A::VALUE1, + true => IMCS_A::VALUE2, } } #[doc = "HRPWMx.CyINA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Imcs::Value1 + *self == IMCS_A::VALUE1 } #[doc = "HRPWMx.CyINB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Imcs::Value2 + *self == IMCS_A::VALUE2 } } #[doc = "Field `IMCS` writer - Inverting comparator input selector"] -pub type ImcsW<'a, REG> = crate::BitWriter<'a, REG, Imcs>; -impl<'a, REG> ImcsW<'a, REG> +pub type IMCS_W<'a, REG> = crate::BitWriter<'a, REG, IMCS_A>; +impl<'a, REG> IMCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRPWMx.CyINA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Imcs::Value1) + self.variant(IMCS_A::VALUE1) } #[doc = "HRPWMx.CyINB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Imcs::Value2) + self.variant(IMCS_A::VALUE2) } } #[doc = "Comparator input switching configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Imcc { +pub enum IMCC_A { #[doc = "0: Dynamic switch disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Imcc) -> Self { + fn from(variant: IMCC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Imcc { +impl crate::FieldSpec for IMCC_A { type Ux = u8; } -impl crate::IsEnum for Imcc {} +impl crate::IsEnum for IMCC_A {} #[doc = "Field `IMCC` reader - Comparator input switching configuration"] -pub type ImccR = crate::FieldReader; -impl ImccR { +pub type IMCC_R = crate::FieldReader; +impl IMCC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Imcc::Value1), - 1 => Some(Imcc::Value2), - 2 => Some(Imcc::Value3), + 0 => Some(IMCC_A::VALUE1), + 1 => Some(IMCC_A::VALUE2), + 2 => Some(IMCC_A::VALUE3), _ => None, } } #[doc = "Dynamic switch disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Imcc::Value1 + *self == IMCC_A::VALUE1 } #[doc = "Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Imcc::Value2 + *self == IMCC_A::VALUE2 } #[doc = "Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Imcc::Value3 + *self == IMCC_A::VALUE3 } } #[doc = "Field `IMCC` writer - Comparator input switching configuration"] -pub type ImccW<'a, REG> = crate::FieldWriter<'a, REG, 2, Imcc>; -impl<'a, REG> ImccW<'a, REG> +pub type IMCC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, IMCC_A>; +impl<'a, REG> IMCC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -357,92 +357,92 @@ where #[doc = "Dynamic switch disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Imcc::Value1) + self.variant(IMCC_A::VALUE1) } #[doc = "Comparator input is connected to HRPWMx.CyINB when the control signal is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Imcc::Value2) + self.variant(IMCC_A::VALUE2) } #[doc = "Comparator input is connected to HRPWMx.CyINA when the control signal is HIGH"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Imcc::Value3) + self.variant(IMCC_A::VALUE3) } } #[doc = "Field `ESE` reader - External triggered switch enable"] -pub type EseR = crate::BitReader; +pub type ESE_R = crate::BitReader; #[doc = "Field `ESE` writer - External triggered switch enable"] -pub type EseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ESE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OIE` reader - Comparator output inversion enable"] -pub type OieR = crate::BitReader; +pub type OIE_R = crate::BitReader; #[doc = "Field `OIE` writer - Comparator output inversion enable"] -pub type OieW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OIE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OSE` reader - Comparator output synchronization enable"] -pub type OseR = crate::BitReader; +pub type OSE_R = crate::BitReader; #[doc = "Field `OSE` writer - Comparator output synchronization enable"] -pub type OseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Blanking mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Blmc { +pub enum BLMC_A { #[doc = "0: Blanking disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Blanking on a LOW to HIGH transition"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Blanking on a HIGH to LOW transition"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Blanking on both transitions"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Blmc) -> Self { + fn from(variant: BLMC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Blmc { +impl crate::FieldSpec for BLMC_A { type Ux = u8; } -impl crate::IsEnum for Blmc {} +impl crate::IsEnum for BLMC_A {} #[doc = "Field `BLMC` reader - Blanking mode"] -pub type BlmcR = crate::FieldReader; -impl BlmcR { +pub type BLMC_R = crate::FieldReader; +impl BLMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Blmc { + pub const fn variant(&self) -> BLMC_A { match self.bits { - 0 => Blmc::Value1, - 1 => Blmc::Value2, - 2 => Blmc::Value3, - 3 => Blmc::Value4, + 0 => BLMC_A::VALUE1, + 1 => BLMC_A::VALUE2, + 2 => BLMC_A::VALUE3, + 3 => BLMC_A::VALUE4, _ => unreachable!(), } } #[doc = "Blanking disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Blmc::Value1 + *self == BLMC_A::VALUE1 } #[doc = "Blanking on a LOW to HIGH transition"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Blmc::Value2 + *self == BLMC_A::VALUE2 } #[doc = "Blanking on a HIGH to LOW transition"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Blmc::Value3 + *self == BLMC_A::VALUE3 } #[doc = "Blanking on both transitions"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Blmc::Value4 + *self == BLMC_A::VALUE4 } } #[doc = "Field `BLMC` writer - Blanking mode"] -pub type BlmcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Blmc, crate::Safe>; -impl<'a, REG> BlmcW<'a, REG> +pub type BLMC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BLMC_A, crate::Safe>; +impl<'a, REG> BLMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,174 +450,174 @@ where #[doc = "Blanking disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Blmc::Value1) + self.variant(BLMC_A::VALUE1) } #[doc = "Blanking on a LOW to HIGH transition"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Blmc::Value2) + self.variant(BLMC_A::VALUE2) } #[doc = "Blanking on a HIGH to LOW transition"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Blmc::Value3) + self.variant(BLMC_A::VALUE3) } #[doc = "Blanking on both transitions"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Blmc::Value4) + self.variant(BLMC_A::VALUE4) } } #[doc = "Field `EBE` reader - External blanking trigger enabled"] -pub type EbeR = crate::BitReader; +pub type EBE_R = crate::BitReader; #[doc = "Field `EBE` writer - External blanking trigger enabled"] -pub type EbeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EBE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Comparator output filter enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cofe { +pub enum COFE_A { #[doc = "0: Filtering stage disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Filtering stage enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cofe) -> Self { + fn from(variant: COFE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `COFE` reader - Comparator output filter enable"] -pub type CofeR = crate::BitReader; -impl CofeR { +pub type COFE_R = crate::BitReader; +impl COFE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cofe { + pub const fn variant(&self) -> COFE_A { match self.bits { - false => Cofe::Value1, - true => Cofe::Value2, + false => COFE_A::VALUE1, + true => COFE_A::VALUE2, } } #[doc = "Filtering stage disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cofe::Value1 + *self == COFE_A::VALUE1 } #[doc = "Filtering stage enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cofe::Value2 + *self == COFE_A::VALUE2 } } #[doc = "Field `COFE` writer - Comparator output filter enable"] -pub type CofeW<'a, REG> = crate::BitWriter<'a, REG, Cofe>; -impl<'a, REG> CofeW<'a, REG> +pub type COFE_W<'a, REG> = crate::BitWriter<'a, REG, COFE_A>; +impl<'a, REG> COFE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Filtering stage disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cofe::Value1) + self.variant(COFE_A::VALUE1) } #[doc = "Filtering stage enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cofe::Value2) + self.variant(COFE_A::VALUE2) } } #[doc = "Comparator output filter window\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cofm { +pub enum COFM_A { #[doc = "0: Comparator Output needs to be stable for 2 clock cycles"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator Output needs to be stable for 3 clock cycles"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Comparator Output needs to be stable for 4 clock cycles"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Comparator Output needs to be stable for 5 clock cycles"] - Value4 = 3, + VALUE4 = 3, #[doc = "12: Comparator Output needs to be stable for 14 clock cycles"] - Value5 = 12, + VALUE5 = 12, #[doc = "13: Comparator Output needs to be stable for 15 clock cycles"] - Value6 = 13, + VALUE6 = 13, #[doc = "14: Comparator Output needs to be stable for 16 clock cycles"] - Value7 = 14, + VALUE7 = 14, #[doc = "15: Comparator Output needs to be stable for 32 clock cycles"] - Value8 = 15, + VALUE8 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cofm) -> Self { + fn from(variant: COFM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cofm { +impl crate::FieldSpec for COFM_A { type Ux = u8; } -impl crate::IsEnum for Cofm {} +impl crate::IsEnum for COFM_A {} #[doc = "Field `COFM` reader - Comparator output filter window"] -pub type CofmR = crate::FieldReader; -impl CofmR { +pub type COFM_R = crate::FieldReader; +impl COFM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cofm::Value1), - 1 => Some(Cofm::Value2), - 2 => Some(Cofm::Value3), - 3 => Some(Cofm::Value4), - 12 => Some(Cofm::Value5), - 13 => Some(Cofm::Value6), - 14 => Some(Cofm::Value7), - 15 => Some(Cofm::Value8), + 0 => Some(COFM_A::VALUE1), + 1 => Some(COFM_A::VALUE2), + 2 => Some(COFM_A::VALUE3), + 3 => Some(COFM_A::VALUE4), + 12 => Some(COFM_A::VALUE5), + 13 => Some(COFM_A::VALUE6), + 14 => Some(COFM_A::VALUE7), + 15 => Some(COFM_A::VALUE8), _ => None, } } #[doc = "Comparator Output needs to be stable for 2 clock cycles"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cofm::Value1 + *self == COFM_A::VALUE1 } #[doc = "Comparator Output needs to be stable for 3 clock cycles"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cofm::Value2 + *self == COFM_A::VALUE2 } #[doc = "Comparator Output needs to be stable for 4 clock cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cofm::Value3 + *self == COFM_A::VALUE3 } #[doc = "Comparator Output needs to be stable for 5 clock cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cofm::Value4 + *self == COFM_A::VALUE4 } #[doc = "Comparator Output needs to be stable for 14 clock cycles"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Cofm::Value5 + *self == COFM_A::VALUE5 } #[doc = "Comparator Output needs to be stable for 15 clock cycles"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Cofm::Value6 + *self == COFM_A::VALUE6 } #[doc = "Comparator Output needs to be stable for 16 clock cycles"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Cofm::Value7 + *self == COFM_A::VALUE7 } #[doc = "Comparator Output needs to be stable for 32 clock cycles"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Cofm::Value8 + *self == COFM_A::VALUE8 } } #[doc = "Field `COFM` writer - Comparator output filter window"] -pub type CofmW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cofm>; -impl<'a, REG> CofmW<'a, REG> +pub type COFM_W<'a, REG> = crate::FieldWriter<'a, REG, 4, COFM_A>; +impl<'a, REG> COFM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -625,97 +625,97 @@ where #[doc = "Comparator Output needs to be stable for 2 clock cycles"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cofm::Value1) + self.variant(COFM_A::VALUE1) } #[doc = "Comparator Output needs to be stable for 3 clock cycles"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cofm::Value2) + self.variant(COFM_A::VALUE2) } #[doc = "Comparator Output needs to be stable for 4 clock cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cofm::Value3) + self.variant(COFM_A::VALUE3) } #[doc = "Comparator Output needs to be stable for 5 clock cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cofm::Value4) + self.variant(COFM_A::VALUE4) } #[doc = "Comparator Output needs to be stable for 14 clock cycles"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Cofm::Value5) + self.variant(COFM_A::VALUE5) } #[doc = "Comparator Output needs to be stable for 15 clock cycles"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Cofm::Value6) + self.variant(COFM_A::VALUE6) } #[doc = "Comparator Output needs to be stable for 16 clock cycles"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Cofm::Value7) + self.variant(COFM_A::VALUE7) } #[doc = "Comparator Output needs to be stable for 32 clock cycles"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Cofm::Value8) + self.variant(COFM_A::VALUE8) } } #[doc = "Comparator output filter control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cofc { +pub enum COFC_A { #[doc = "0: Filtering is always done if enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Filtering is only done when CSGyDSV1 value is currently fed to the DAC"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Filtering is only done when the CSGyDSV2 value is currently fed to the DAC"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cofc) -> Self { + fn from(variant: COFC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cofc { +impl crate::FieldSpec for COFC_A { type Ux = u8; } -impl crate::IsEnum for Cofc {} +impl crate::IsEnum for COFC_A {} #[doc = "Field `COFC` reader - Comparator output filter control"] -pub type CofcR = crate::FieldReader; -impl CofcR { +pub type COFC_R = crate::FieldReader; +impl COFC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cofc::Value1), - 1 => Some(Cofc::Value2), - 2 => Some(Cofc::Value3), + 0 => Some(COFC_A::VALUE1), + 1 => Some(COFC_A::VALUE2), + 2 => Some(COFC_A::VALUE3), _ => None, } } #[doc = "Filtering is always done if enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cofc::Value1 + *self == COFC_A::VALUE1 } #[doc = "Filtering is only done when CSGyDSV1 value is currently fed to the DAC"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cofc::Value2 + *self == COFC_A::VALUE2 } #[doc = "Filtering is only done when the CSGyDSV2 value is currently fed to the DAC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cofc::Value3 + *self == COFC_A::VALUE3 } } #[doc = "Field `COFC` writer - Comparator output filter control"] -pub type CofcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cofc>; -impl<'a, REG> CofcW<'a, REG> +pub type COFC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, COFC_A>; +impl<'a, REG> COFC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -723,158 +723,158 @@ where #[doc = "Filtering is always done if enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cofc::Value1) + self.variant(COFC_A::VALUE1) } #[doc = "Filtering is only done when CSGyDSV1 value is currently fed to the DAC"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cofc::Value2) + self.variant(COFC_A::VALUE2) } #[doc = "Filtering is only done when the CSGyDSV2 value is currently fed to the DAC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cofc::Value3) + self.variant(COFC_A::VALUE3) } } impl R { #[doc = "Bits 0:3 - External blanking trigger selector"] #[inline(always)] - pub fn ibs(&self) -> IbsR { - IbsR::new((self.bits & 0x0f) as u8) + pub fn ibs(&self) -> IBS_R { + IBS_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Inverting comparator input selector"] #[inline(always)] - pub fn imcs(&self) -> ImcsR { - ImcsR::new(((self.bits >> 8) & 1) != 0) + pub fn imcs(&self) -> IMCS_R { + IMCS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 9:10 - Comparator input switching configuration"] #[inline(always)] - pub fn imcc(&self) -> ImccR { - ImccR::new(((self.bits >> 9) & 3) as u8) + pub fn imcc(&self) -> IMCC_R { + IMCC_R::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bit 11 - External triggered switch enable"] #[inline(always)] - pub fn ese(&self) -> EseR { - EseR::new(((self.bits >> 11) & 1) != 0) + pub fn ese(&self) -> ESE_R { + ESE_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Comparator output inversion enable"] #[inline(always)] - pub fn oie(&self) -> OieR { - OieR::new(((self.bits >> 12) & 1) != 0) + pub fn oie(&self) -> OIE_R { + OIE_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Comparator output synchronization enable"] #[inline(always)] - pub fn ose(&self) -> OseR { - OseR::new(((self.bits >> 13) & 1) != 0) + pub fn ose(&self) -> OSE_R { + OSE_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bits 14:15 - Blanking mode"] #[inline(always)] - pub fn blmc(&self) -> BlmcR { - BlmcR::new(((self.bits >> 14) & 3) as u8) + pub fn blmc(&self) -> BLMC_R { + BLMC_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bit 16 - External blanking trigger enabled"] #[inline(always)] - pub fn ebe(&self) -> EbeR { - EbeR::new(((self.bits >> 16) & 1) != 0) + pub fn ebe(&self) -> EBE_R { + EBE_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Comparator output filter enable"] #[inline(always)] - pub fn cofe(&self) -> CofeR { - CofeR::new(((self.bits >> 17) & 1) != 0) + pub fn cofe(&self) -> COFE_R { + COFE_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:21 - Comparator output filter window"] #[inline(always)] - pub fn cofm(&self) -> CofmR { - CofmR::new(((self.bits >> 18) & 0x0f) as u8) + pub fn cofm(&self) -> COFM_R { + COFM_R::new(((self.bits >> 18) & 0x0f) as u8) } #[doc = "Bits 24:25 - Comparator output filter control"] #[inline(always)] - pub fn cofc(&self) -> CofcR { - CofcR::new(((self.bits >> 24) & 3) as u8) + pub fn cofc(&self) -> COFC_R { + COFC_R::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - External blanking trigger selector"] #[inline(always)] #[must_use] - pub fn ibs(&mut self) -> IbsW { - IbsW::new(self, 0) + pub fn ibs(&mut self) -> IBS_W { + IBS_W::new(self, 0) } #[doc = "Bit 8 - Inverting comparator input selector"] #[inline(always)] #[must_use] - pub fn imcs(&mut self) -> ImcsW { - ImcsW::new(self, 8) + pub fn imcs(&mut self) -> IMCS_W { + IMCS_W::new(self, 8) } #[doc = "Bits 9:10 - Comparator input switching configuration"] #[inline(always)] #[must_use] - pub fn imcc(&mut self) -> ImccW { - ImccW::new(self, 9) + pub fn imcc(&mut self) -> IMCC_W { + IMCC_W::new(self, 9) } #[doc = "Bit 11 - External triggered switch enable"] #[inline(always)] #[must_use] - pub fn ese(&mut self) -> EseW { - EseW::new(self, 11) + pub fn ese(&mut self) -> ESE_W { + ESE_W::new(self, 11) } #[doc = "Bit 12 - Comparator output inversion enable"] #[inline(always)] #[must_use] - pub fn oie(&mut self) -> OieW { - OieW::new(self, 12) + pub fn oie(&mut self) -> OIE_W { + OIE_W::new(self, 12) } #[doc = "Bit 13 - Comparator output synchronization enable"] #[inline(always)] #[must_use] - pub fn ose(&mut self) -> OseW { - OseW::new(self, 13) + pub fn ose(&mut self) -> OSE_W { + OSE_W::new(self, 13) } #[doc = "Bits 14:15 - Blanking mode"] #[inline(always)] #[must_use] - pub fn blmc(&mut self) -> BlmcW { - BlmcW::new(self, 14) + pub fn blmc(&mut self) -> BLMC_W { + BLMC_W::new(self, 14) } #[doc = "Bit 16 - External blanking trigger enabled"] #[inline(always)] #[must_use] - pub fn ebe(&mut self) -> EbeW { - EbeW::new(self, 16) + pub fn ebe(&mut self) -> EBE_W { + EBE_W::new(self, 16) } #[doc = "Bit 17 - Comparator output filter enable"] #[inline(always)] #[must_use] - pub fn cofe(&mut self) -> CofeW { - CofeW::new(self, 17) + pub fn cofe(&mut self) -> COFE_W { + COFE_W::new(self, 17) } #[doc = "Bits 18:21 - Comparator output filter window"] #[inline(always)] #[must_use] - pub fn cofm(&mut self) -> CofmW { - CofmW::new(self, 18) + pub fn cofm(&mut self) -> COFM_W { + COFM_W::new(self, 18) } #[doc = "Bits 24:25 - Comparator output filter control"] #[inline(always)] #[must_use] - pub fn cofc(&mut self) -> CofcW { - CofcW::new(self, 24) + pub fn cofc(&mut self) -> COFC_W { + COFC_W::new(self, 24) } } #[doc = "Comparator configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcSpec; -impl crate::RegisterSpec for CcSpec { +pub struct CC_SPEC; +impl crate::RegisterSpec for CC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cc::R`](R) reader structure"] -impl crate::Readable for CcSpec {} +impl crate::Readable for CC_SPEC {} #[doc = "`write(|w| ..)` method takes [`cc::W`](W) writer structure"] -impl crate::Writable for CcSpec { +impl crate::Writable for CC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CC to value 0"] -impl crate::Resettable for CcSpec { +impl crate::Resettable for CC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/dci.rs b/src/hrpwm0_csg0/dci.rs index 639843ba..e65877e6 100644 --- a/src/hrpwm0_csg0/dci.rs +++ b/src/hrpwm0_csg0/dci.rs @@ -1,164 +1,164 @@ #[doc = "Register `DCI` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DCI` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Value Selector input selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Svis { +pub enum SVIS_A { #[doc = "0: HRPWMx.SyIA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.SyIB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HRPWMx.SyIC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: HRPWMx.SyID"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: HRPWMx.SyIE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: HRPWMx.SyIF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: HRPWMx.SyIG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: HRPWMx.SyIH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: HRPWMx.SyII"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: HRPWMx.SyIJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: HRPWMx.SyIK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: HRPWMx.SyIL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: HRPWMx.SyIM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: HRPWMx.SyIN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: HRPWMx.SyIO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: HRPWMx.SyIP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Svis) -> Self { + fn from(variant: SVIS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Svis { +impl crate::FieldSpec for SVIS_A { type Ux = u8; } -impl crate::IsEnum for Svis {} +impl crate::IsEnum for SVIS_A {} #[doc = "Field `SVIS` reader - Value Selector input selection"] -pub type SvisR = crate::FieldReader; -impl SvisR { +pub type SVIS_R = crate::FieldReader; +impl SVIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Svis { + pub const fn variant(&self) -> SVIS_A { match self.bits { - 0 => Svis::Value1, - 1 => Svis::Value2, - 2 => Svis::Value3, - 3 => Svis::Value4, - 4 => Svis::Value5, - 5 => Svis::Value6, - 6 => Svis::Value7, - 7 => Svis::Value8, - 8 => Svis::Value9, - 9 => Svis::Value10, - 10 => Svis::Value11, - 11 => Svis::Value12, - 12 => Svis::Value13, - 13 => Svis::Value14, - 14 => Svis::Value15, - 15 => Svis::Value16, + 0 => SVIS_A::VALUE1, + 1 => SVIS_A::VALUE2, + 2 => SVIS_A::VALUE3, + 3 => SVIS_A::VALUE4, + 4 => SVIS_A::VALUE5, + 5 => SVIS_A::VALUE6, + 6 => SVIS_A::VALUE7, + 7 => SVIS_A::VALUE8, + 8 => SVIS_A::VALUE9, + 9 => SVIS_A::VALUE10, + 10 => SVIS_A::VALUE11, + 11 => SVIS_A::VALUE12, + 12 => SVIS_A::VALUE13, + 13 => SVIS_A::VALUE14, + 14 => SVIS_A::VALUE15, + 15 => SVIS_A::VALUE16, _ => unreachable!(), } } #[doc = "HRPWMx.SyIA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svis::Value1 + *self == SVIS_A::VALUE1 } #[doc = "HRPWMx.SyIB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svis::Value2 + *self == SVIS_A::VALUE2 } #[doc = "HRPWMx.SyIC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Svis::Value3 + *self == SVIS_A::VALUE3 } #[doc = "HRPWMx.SyID"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Svis::Value4 + *self == SVIS_A::VALUE4 } #[doc = "HRPWMx.SyIE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Svis::Value5 + *self == SVIS_A::VALUE5 } #[doc = "HRPWMx.SyIF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Svis::Value6 + *self == SVIS_A::VALUE6 } #[doc = "HRPWMx.SyIG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Svis::Value7 + *self == SVIS_A::VALUE7 } #[doc = "HRPWMx.SyIH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Svis::Value8 + *self == SVIS_A::VALUE8 } #[doc = "HRPWMx.SyII"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Svis::Value9 + *self == SVIS_A::VALUE9 } #[doc = "HRPWMx.SyIJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Svis::Value10 + *self == SVIS_A::VALUE10 } #[doc = "HRPWMx.SyIK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Svis::Value11 + *self == SVIS_A::VALUE11 } #[doc = "HRPWMx.SyIL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Svis::Value12 + *self == SVIS_A::VALUE12 } #[doc = "HRPWMx.SyIM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Svis::Value13 + *self == SVIS_A::VALUE13 } #[doc = "HRPWMx.SyIN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Svis::Value14 + *self == SVIS_A::VALUE14 } #[doc = "HRPWMx.SyIO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Svis::Value15 + *self == SVIS_A::VALUE15 } #[doc = "HRPWMx.SyIP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Svis::Value16 + *self == SVIS_A::VALUE16 } } #[doc = "Field `SVIS` writer - Value Selector input selection"] -pub type SvisW<'a, REG> = crate::FieldWriter<'a, REG, 4, Svis, crate::Safe>; -impl<'a, REG> SvisW<'a, REG> +pub type SVIS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SVIS_A, crate::Safe>; +impl<'a, REG> SVIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -166,161 +166,161 @@ where #[doc = "HRPWMx.SyIA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svis::Value1) + self.variant(SVIS_A::VALUE1) } #[doc = "HRPWMx.SyIB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svis::Value2) + self.variant(SVIS_A::VALUE2) } #[doc = "HRPWMx.SyIC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Svis::Value3) + self.variant(SVIS_A::VALUE3) } #[doc = "HRPWMx.SyID"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Svis::Value4) + self.variant(SVIS_A::VALUE4) } #[doc = "HRPWMx.SyIE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Svis::Value5) + self.variant(SVIS_A::VALUE5) } #[doc = "HRPWMx.SyIF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Svis::Value6) + self.variant(SVIS_A::VALUE6) } #[doc = "HRPWMx.SyIG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Svis::Value7) + self.variant(SVIS_A::VALUE7) } #[doc = "HRPWMx.SyIH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Svis::Value8) + self.variant(SVIS_A::VALUE8) } #[doc = "HRPWMx.SyII"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Svis::Value9) + self.variant(SVIS_A::VALUE9) } #[doc = "HRPWMx.SyIJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Svis::Value10) + self.variant(SVIS_A::VALUE10) } #[doc = "HRPWMx.SyIK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Svis::Value11) + self.variant(SVIS_A::VALUE11) } #[doc = "HRPWMx.SyIL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Svis::Value12) + self.variant(SVIS_A::VALUE12) } #[doc = "HRPWMx.SyIM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Svis::Value13) + self.variant(SVIS_A::VALUE13) } #[doc = "HRPWMx.SyIN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Svis::Value14) + self.variant(SVIS_A::VALUE14) } #[doc = "HRPWMx.SyIO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Svis::Value15) + self.variant(SVIS_A::VALUE15) } #[doc = "HRPWMx.SyIP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Svis::Value16) + self.variant(SVIS_A::VALUE16) } } #[doc = "Field `STRIS` reader - Slope generation start control input selection"] -pub type StrisR = crate::FieldReader; +pub type STRIS_R = crate::FieldReader; #[doc = "Field `STRIS` writer - Slope generation start control input selection"] -pub type StrisW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type STRIS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `STPIS` reader - Slope generation stop control input selection"] -pub type StpisR = crate::FieldReader; +pub type STPIS_R = crate::FieldReader; #[doc = "Field `STPIS` writer - Slope generation stop control input selection"] -pub type StpisW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type STPIS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `TRGIS` reader - External conversion trigger input selection"] -pub type TrgisR = crate::FieldReader; +pub type TRGIS_R = crate::FieldReader; #[doc = "Field `TRGIS` writer - External conversion trigger input selection"] -pub type TrgisW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TRGIS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `STIS` reader - External shadow request enable input selection"] -pub type StisR = crate::FieldReader; +pub type STIS_R = crate::FieldReader; #[doc = "Field `STIS` writer - External shadow request enable input selection"] -pub type StisW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type STIS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Slope generation clock selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Scs { +pub enum SCS_A { #[doc = "0: HRPWMx.MCLK (Module clock is used)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.ECLKA (External clock is used)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HRPWMx.ECLKB (External clock is used)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: HRPWMx.ECLKC (External clock is used)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Scs) -> Self { + fn from(variant: SCS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Scs { +impl crate::FieldSpec for SCS_A { type Ux = u8; } -impl crate::IsEnum for Scs {} +impl crate::IsEnum for SCS_A {} #[doc = "Field `SCS` reader - Slope generation clock selection"] -pub type ScsR = crate::FieldReader; -impl ScsR { +pub type SCS_R = crate::FieldReader; +impl SCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scs { + pub const fn variant(&self) -> SCS_A { match self.bits { - 0 => Scs::Value1, - 1 => Scs::Value2, - 2 => Scs::Value3, - 3 => Scs::Value4, + 0 => SCS_A::VALUE1, + 1 => SCS_A::VALUE2, + 2 => SCS_A::VALUE3, + 3 => SCS_A::VALUE4, _ => unreachable!(), } } #[doc = "HRPWMx.MCLK (Module clock is used)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scs::Value1 + *self == SCS_A::VALUE1 } #[doc = "HRPWMx.ECLKA (External clock is used)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scs::Value2 + *self == SCS_A::VALUE2 } #[doc = "HRPWMx.ECLKB (External clock is used)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Scs::Value3 + *self == SCS_A::VALUE3 } #[doc = "HRPWMx.ECLKC (External clock is used)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Scs::Value4 + *self == SCS_A::VALUE4 } } #[doc = "Field `SCS` writer - Slope generation clock selection"] -pub type ScsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Scs, crate::Safe>; -impl<'a, REG> ScsW<'a, REG> +pub type SCS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SCS_A, crate::Safe>; +impl<'a, REG> SCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,108 +328,108 @@ where #[doc = "HRPWMx.MCLK (Module clock is used)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scs::Value1) + self.variant(SCS_A::VALUE1) } #[doc = "HRPWMx.ECLKA (External clock is used)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scs::Value2) + self.variant(SCS_A::VALUE2) } #[doc = "HRPWMx.ECLKB (External clock is used)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Scs::Value3) + self.variant(SCS_A::VALUE3) } #[doc = "HRPWMx.ECLKC (External clock is used)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Scs::Value4) + self.variant(SCS_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Value Selector input selection"] #[inline(always)] - pub fn svis(&self) -> SvisR { - SvisR::new((self.bits & 0x0f) as u8) + pub fn svis(&self) -> SVIS_R { + SVIS_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Slope generation start control input selection"] #[inline(always)] - pub fn stris(&self) -> StrisR { - StrisR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn stris(&self) -> STRIS_R { + STRIS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Slope generation stop control input selection"] #[inline(always)] - pub fn stpis(&self) -> StpisR { - StpisR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn stpis(&self) -> STPIS_R { + STPIS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - External conversion trigger input selection"] #[inline(always)] - pub fn trgis(&self) -> TrgisR { - TrgisR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn trgis(&self) -> TRGIS_R { + TRGIS_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - External shadow request enable input selection"] #[inline(always)] - pub fn stis(&self) -> StisR { - StisR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn stis(&self) -> STIS_R { + STIS_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Slope generation clock selection"] #[inline(always)] - pub fn scs(&self) -> ScsR { - ScsR::new(((self.bits >> 20) & 3) as u8) + pub fn scs(&self) -> SCS_R { + SCS_R::new(((self.bits >> 20) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Value Selector input selection"] #[inline(always)] #[must_use] - pub fn svis(&mut self) -> SvisW { - SvisW::new(self, 0) + pub fn svis(&mut self) -> SVIS_W { + SVIS_W::new(self, 0) } #[doc = "Bits 4:7 - Slope generation start control input selection"] #[inline(always)] #[must_use] - pub fn stris(&mut self) -> StrisW { - StrisW::new(self, 4) + pub fn stris(&mut self) -> STRIS_W { + STRIS_W::new(self, 4) } #[doc = "Bits 8:11 - Slope generation stop control input selection"] #[inline(always)] #[must_use] - pub fn stpis(&mut self) -> StpisW { - StpisW::new(self, 8) + pub fn stpis(&mut self) -> STPIS_W { + STPIS_W::new(self, 8) } #[doc = "Bits 12:15 - External conversion trigger input selection"] #[inline(always)] #[must_use] - pub fn trgis(&mut self) -> TrgisW { - TrgisW::new(self, 12) + pub fn trgis(&mut self) -> TRGIS_W { + TRGIS_W::new(self, 12) } #[doc = "Bits 16:19 - External shadow request enable input selection"] #[inline(always)] #[must_use] - pub fn stis(&mut self) -> StisW { - StisW::new(self, 16) + pub fn stis(&mut self) -> STIS_W { + STIS_W::new(self, 16) } #[doc = "Bits 20:21 - Slope generation clock selection"] #[inline(always)] #[must_use] - pub fn scs(&mut self) -> ScsW { - ScsW::new(self, 20) + pub fn scs(&mut self) -> SCS_W { + SCS_W::new(self, 20) } } #[doc = "External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dci::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dci::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DciSpec; -impl crate::RegisterSpec for DciSpec { +pub struct DCI_SPEC; +impl crate::RegisterSpec for DCI_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dci::R`](R) reader structure"] -impl crate::Readable for DciSpec {} +impl crate::Readable for DCI_SPEC {} #[doc = "`write(|w| ..)` method takes [`dci::W`](W) writer structure"] -impl crate::Writable for DciSpec { +impl crate::Writable for DCI_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DCI to value 0"] -impl crate::Resettable for DciSpec { +impl crate::Resettable for DCI_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/dsv1.rs b/src/hrpwm0_csg0/dsv1.rs index 4baa1484..f67f6956 100644 --- a/src/hrpwm0_csg0/dsv1.rs +++ b/src/hrpwm0_csg0/dsv1.rs @@ -1,22 +1,22 @@ #[doc = "Register `DSV1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSV1` reader - DAC reference value 1"] -pub type Dsv1R = crate::FieldReader; +pub type DSV1_R = crate::FieldReader; impl R { #[doc = "Bits 0:9 - DAC reference value 1"] #[inline(always)] - pub fn dsv1(&self) -> Dsv1R { - Dsv1R::new((self.bits & 0x03ff) as u16) + pub fn dsv1(&self) -> DSV1_R { + DSV1_R::new((self.bits & 0x03ff) as u16) } } #[doc = "DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dsv1Spec; -impl crate::RegisterSpec for Dsv1Spec { +pub struct DSV1_SPEC; +impl crate::RegisterSpec for DSV1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dsv1::R`](R) reader structure"] -impl crate::Readable for Dsv1Spec {} +impl crate::Readable for DSV1_SPEC {} #[doc = "`reset()` method sets DSV1 to value 0"] -impl crate::Resettable for Dsv1Spec { +impl crate::Resettable for DSV1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/dsv2.rs b/src/hrpwm0_csg0/dsv2.rs index 6828eac6..727579ad 100644 --- a/src/hrpwm0_csg0/dsv2.rs +++ b/src/hrpwm0_csg0/dsv2.rs @@ -1,40 +1,40 @@ #[doc = "Register `DSV2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSV2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DSV2` reader - DAC reference value 2"] -pub type Dsv2R = crate::FieldReader; +pub type DSV2_R = crate::FieldReader; #[doc = "Field `DSV2` writer - DAC reference value 2"] -pub type Dsv2W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type DSV2_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - DAC reference value 2"] #[inline(always)] - pub fn dsv2(&self) -> Dsv2R { - Dsv2R::new((self.bits & 0x03ff) as u16) + pub fn dsv2(&self) -> DSV2_R { + DSV2_R::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - DAC reference value 2"] #[inline(always)] #[must_use] - pub fn dsv2(&mut self) -> Dsv2W { - Dsv2W::new(self, 0) + pub fn dsv2(&mut self) -> DSV2_W { + DSV2_W::new(self, 0) } } #[doc = "DAC reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsv2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsv2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dsv2Spec; -impl crate::RegisterSpec for Dsv2Spec { +pub struct DSV2_SPEC; +impl crate::RegisterSpec for DSV2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dsv2::R`](R) reader structure"] -impl crate::Readable for Dsv2Spec {} +impl crate::Readable for DSV2_SPEC {} #[doc = "`write(|w| ..)` method takes [`dsv2::W`](W) writer structure"] -impl crate::Writable for Dsv2Spec { +impl crate::Writable for DSV2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSV2 to value 0"] -impl crate::Resettable for Dsv2Spec { +impl crate::Resettable for DSV2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/ies.rs b/src/hrpwm0_csg0/ies.rs index 4cc1b01e..1e51a137 100644 --- a/src/hrpwm0_csg0/ies.rs +++ b/src/hrpwm0_csg0/ies.rs @@ -1,60 +1,60 @@ #[doc = "Register `IES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IES` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "External value switch function level selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Svls { +pub enum SVLS_A { #[doc = "0: Function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active when input is HIGH"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Active when input is LOW"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Svls) -> Self { + fn from(variant: SVLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Svls { +impl crate::FieldSpec for SVLS_A { type Ux = u8; } -impl crate::IsEnum for Svls {} +impl crate::IsEnum for SVLS_A {} #[doc = "Field `SVLS` reader - External value switch function level selection"] -pub type SvlsR = crate::FieldReader; -impl SvlsR { +pub type SVLS_R = crate::FieldReader; +impl SVLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Svls::Value1), - 1 => Some(Svls::Value2), - 2 => Some(Svls::Value3), + 0 => Some(SVLS_A::VALUE1), + 1 => Some(SVLS_A::VALUE2), + 2 => Some(SVLS_A::VALUE3), _ => None, } } #[doc = "Function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svls::Value1 + *self == SVLS_A::VALUE1 } #[doc = "Active when input is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svls::Value2 + *self == SVLS_A::VALUE2 } #[doc = "Active when input is LOW"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Svls::Value3 + *self == SVLS_A::VALUE3 } } #[doc = "Field `SVLS` writer - External value switch function level selection"] -pub type SvlsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Svls>; -impl<'a, REG> SvlsW<'a, REG> +pub type SVLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SVLS_A>; +impl<'a, REG> SVLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,80 +62,80 @@ where #[doc = "Function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svls::Value1) + self.variant(SVLS_A::VALUE1) } #[doc = "Active when input is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svls::Value2) + self.variant(SVLS_A::VALUE2) } #[doc = "Active when input is LOW"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Svls::Value3) + self.variant(SVLS_A::VALUE3) } } #[doc = "External start function edge selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stres { +pub enum STRES_A { #[doc = "0: Function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stres) -> Self { + fn from(variant: STRES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stres { +impl crate::FieldSpec for STRES_A { type Ux = u8; } -impl crate::IsEnum for Stres {} +impl crate::IsEnum for STRES_A {} #[doc = "Field `STRES` reader - External start function edge selection"] -pub type StresR = crate::FieldReader; -impl StresR { +pub type STRES_R = crate::FieldReader; +impl STRES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stres { + pub const fn variant(&self) -> STRES_A { match self.bits { - 0 => Stres::Value1, - 1 => Stres::Value2, - 2 => Stres::Value3, - 3 => Stres::Value4, + 0 => STRES_A::VALUE1, + 1 => STRES_A::VALUE2, + 2 => STRES_A::VALUE3, + 3 => STRES_A::VALUE4, _ => unreachable!(), } } #[doc = "Function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stres::Value1 + *self == STRES_A::VALUE1 } #[doc = "Active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stres::Value2 + *self == STRES_A::VALUE2 } #[doc = "Active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stres::Value3 + *self == STRES_A::VALUE3 } #[doc = "Active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stres::Value4 + *self == STRES_A::VALUE4 } } #[doc = "Field `STRES` writer - External start function edge selection"] -pub type StresW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stres, crate::Safe>; -impl<'a, REG> StresW<'a, REG> +pub type STRES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STRES_A, crate::Safe>; +impl<'a, REG> STRES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -143,85 +143,85 @@ where #[doc = "Function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stres::Value1) + self.variant(STRES_A::VALUE1) } #[doc = "Active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stres::Value2) + self.variant(STRES_A::VALUE2) } #[doc = "Active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stres::Value3) + self.variant(STRES_A::VALUE3) } #[doc = "Active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stres::Value4) + self.variant(STRES_A::VALUE4) } } #[doc = "External stop function edge selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stpes { +pub enum STPES_A { #[doc = "0: Function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stpes) -> Self { + fn from(variant: STPES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stpes { +impl crate::FieldSpec for STPES_A { type Ux = u8; } -impl crate::IsEnum for Stpes {} +impl crate::IsEnum for STPES_A {} #[doc = "Field `STPES` reader - External stop function edge selection"] -pub type StpesR = crate::FieldReader; -impl StpesR { +pub type STPES_R = crate::FieldReader; +impl STPES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stpes { + pub const fn variant(&self) -> STPES_A { match self.bits { - 0 => Stpes::Value1, - 1 => Stpes::Value2, - 2 => Stpes::Value3, - 3 => Stpes::Value4, + 0 => STPES_A::VALUE1, + 1 => STPES_A::VALUE2, + 2 => STPES_A::VALUE3, + 3 => STPES_A::VALUE4, _ => unreachable!(), } } #[doc = "Function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stpes::Value1 + *self == STPES_A::VALUE1 } #[doc = "Active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stpes::Value2 + *self == STPES_A::VALUE2 } #[doc = "Active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stpes::Value3 + *self == STPES_A::VALUE3 } #[doc = "Active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stpes::Value4 + *self == STPES_A::VALUE4 } } #[doc = "Field `STPES` writer - External stop function edge selection"] -pub type StpesW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stpes, crate::Safe>; -impl<'a, REG> StpesW<'a, REG> +pub type STPES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STPES_A, crate::Safe>; +impl<'a, REG> STPES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,85 +229,85 @@ where #[doc = "Function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stpes::Value1) + self.variant(STPES_A::VALUE1) } #[doc = "Active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stpes::Value2) + self.variant(STPES_A::VALUE2) } #[doc = "Active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stpes::Value3) + self.variant(STPES_A::VALUE3) } #[doc = "Active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stpes::Value4) + self.variant(STPES_A::VALUE4) } } #[doc = "External trigger function edge selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trges { +pub enum TRGES_A { #[doc = "0: Function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trges) -> Self { + fn from(variant: TRGES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trges { +impl crate::FieldSpec for TRGES_A { type Ux = u8; } -impl crate::IsEnum for Trges {} +impl crate::IsEnum for TRGES_A {} #[doc = "Field `TRGES` reader - External trigger function edge selection"] -pub type TrgesR = crate::FieldReader; -impl TrgesR { +pub type TRGES_R = crate::FieldReader; +impl TRGES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trges { + pub const fn variant(&self) -> TRGES_A { match self.bits { - 0 => Trges::Value1, - 1 => Trges::Value2, - 2 => Trges::Value3, - 3 => Trges::Value4, + 0 => TRGES_A::VALUE1, + 1 => TRGES_A::VALUE2, + 2 => TRGES_A::VALUE3, + 3 => TRGES_A::VALUE4, _ => unreachable!(), } } #[doc = "Function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trges::Value1 + *self == TRGES_A::VALUE1 } #[doc = "Active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trges::Value2 + *self == TRGES_A::VALUE2 } #[doc = "Active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trges::Value3 + *self == TRGES_A::VALUE3 } #[doc = "Active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Trges::Value4 + *self == TRGES_A::VALUE4 } } #[doc = "Field `TRGES` writer - External trigger function edge selection"] -pub type TrgesW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trges, crate::Safe>; -impl<'a, REG> TrgesW<'a, REG> +pub type TRGES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRGES_A, crate::Safe>; +impl<'a, REG> TRGES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -315,85 +315,85 @@ where #[doc = "Function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trges::Value1) + self.variant(TRGES_A::VALUE1) } #[doc = "Active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trges::Value2) + self.variant(TRGES_A::VALUE2) } #[doc = "Active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trges::Value3) + self.variant(TRGES_A::VALUE3) } #[doc = "Active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Trges::Value4) + self.variant(TRGES_A::VALUE4) } } #[doc = "External shadow transfer enable edge selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stes { +pub enum STES_A { #[doc = "0: Function disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active on rising edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Active on falling edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Active on both edges"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stes) -> Self { + fn from(variant: STES_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stes { +impl crate::FieldSpec for STES_A { type Ux = u8; } -impl crate::IsEnum for Stes {} +impl crate::IsEnum for STES_A {} #[doc = "Field `STES` reader - External shadow transfer enable edge selection"] -pub type StesR = crate::FieldReader; -impl StesR { +pub type STES_R = crate::FieldReader; +impl STES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stes { + pub const fn variant(&self) -> STES_A { match self.bits { - 0 => Stes::Value1, - 1 => Stes::Value2, - 2 => Stes::Value3, - 3 => Stes::Value4, + 0 => STES_A::VALUE1, + 1 => STES_A::VALUE2, + 2 => STES_A::VALUE3, + 3 => STES_A::VALUE4, _ => unreachable!(), } } #[doc = "Function disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stes::Value1 + *self == STES_A::VALUE1 } #[doc = "Active on rising edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stes::Value2 + *self == STES_A::VALUE2 } #[doc = "Active on falling edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stes::Value3 + *self == STES_A::VALUE3 } #[doc = "Active on both edges"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stes::Value4 + *self == STES_A::VALUE4 } } #[doc = "Field `STES` writer - External shadow transfer enable edge selection"] -pub type StesW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stes, crate::Safe>; -impl<'a, REG> StesW<'a, REG> +pub type STES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STES_A, crate::Safe>; +impl<'a, REG> STES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -401,97 +401,97 @@ where #[doc = "Function disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stes::Value1) + self.variant(STES_A::VALUE1) } #[doc = "Active on rising edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stes::Value2) + self.variant(STES_A::VALUE2) } #[doc = "Active on falling edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stes::Value3) + self.variant(STES_A::VALUE3) } #[doc = "Active on both edges"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stes::Value4) + self.variant(STES_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - External value switch function level selection"] #[inline(always)] - pub fn svls(&self) -> SvlsR { - SvlsR::new((self.bits & 3) as u8) + pub fn svls(&self) -> SVLS_R { + SVLS_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - External start function edge selection"] #[inline(always)] - pub fn stres(&self) -> StresR { - StresR::new(((self.bits >> 2) & 3) as u8) + pub fn stres(&self) -> STRES_R { + STRES_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - External stop function edge selection"] #[inline(always)] - pub fn stpes(&self) -> StpesR { - StpesR::new(((self.bits >> 4) & 3) as u8) + pub fn stpes(&self) -> STPES_R { + STPES_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - External trigger function edge selection"] #[inline(always)] - pub fn trges(&self) -> TrgesR { - TrgesR::new(((self.bits >> 6) & 3) as u8) + pub fn trges(&self) -> TRGES_R { + TRGES_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - External shadow transfer enable edge selection"] #[inline(always)] - pub fn stes(&self) -> StesR { - StesR::new(((self.bits >> 8) & 3) as u8) + pub fn stes(&self) -> STES_R { + STES_R::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - External value switch function level selection"] #[inline(always)] #[must_use] - pub fn svls(&mut self) -> SvlsW { - SvlsW::new(self, 0) + pub fn svls(&mut self) -> SVLS_W { + SVLS_W::new(self, 0) } #[doc = "Bits 2:3 - External start function edge selection"] #[inline(always)] #[must_use] - pub fn stres(&mut self) -> StresW { - StresW::new(self, 2) + pub fn stres(&mut self) -> STRES_W { + STRES_W::new(self, 2) } #[doc = "Bits 4:5 - External stop function edge selection"] #[inline(always)] #[must_use] - pub fn stpes(&mut self) -> StpesW { - StpesW::new(self, 4) + pub fn stpes(&mut self) -> STPES_W { + STPES_W::new(self, 4) } #[doc = "Bits 6:7 - External trigger function edge selection"] #[inline(always)] #[must_use] - pub fn trges(&mut self) -> TrgesW { - TrgesW::new(self, 6) + pub fn trges(&mut self) -> TRGES_W { + TRGES_W::new(self, 6) } #[doc = "Bits 8:9 - External shadow transfer enable edge selection"] #[inline(always)] #[must_use] - pub fn stes(&mut self) -> StesW { - StesW::new(self, 8) + pub fn stes(&mut self) -> STES_W { + STES_W::new(self, 8) } } #[doc = "External input selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ies::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ies::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IesSpec; -impl crate::RegisterSpec for IesSpec { +pub struct IES_SPEC; +impl crate::RegisterSpec for IES_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ies::R`](R) reader structure"] -impl crate::Readable for IesSpec {} +impl crate::Readable for IES_SPEC {} #[doc = "`write(|w| ..)` method takes [`ies::W`](W) writer structure"] -impl crate::Writable for IesSpec { +impl crate::Writable for IES_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IES to value 0"] -impl crate::Resettable for IesSpec { +impl crate::Resettable for IES_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/istat.rs b/src/hrpwm0_csg0/istat.rs index 74677a35..3cfdf527 100644 --- a/src/hrpwm0_csg0/istat.rs +++ b/src/hrpwm0_csg0/istat.rs @@ -1,384 +1,384 @@ #[doc = "Register `ISTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Value switch from CSGyDSV1 to CSGyDSV2 interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vls1s { +pub enum VLS1S_A { #[doc = "0: Value switch not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Value switch detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vls1s) -> Self { + fn from(variant: VLS1S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VLS1S` reader - Value switch from CSGyDSV1 to CSGyDSV2 interrupt status"] -pub type Vls1sR = crate::BitReader; -impl Vls1sR { +pub type VLS1S_R = crate::BitReader; +impl VLS1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vls1s { + pub const fn variant(&self) -> VLS1S_A { match self.bits { - false => Vls1s::Value1, - true => Vls1s::Value2, + false => VLS1S_A::VALUE1, + true => VLS1S_A::VALUE2, } } #[doc = "Value switch not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vls1s::Value1 + *self == VLS1S_A::VALUE1 } #[doc = "Value switch detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vls1s::Value2 + *self == VLS1S_A::VALUE2 } } #[doc = "Value switch from CSGyDSV2 to CSGyDSV1 interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vls2s { +pub enum VLS2S_A { #[doc = "0: Value switch not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Value switch detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vls2s) -> Self { + fn from(variant: VLS2S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VLS2S` reader - Value switch from CSGyDSV2 to CSGyDSV1 interrupt status"] -pub type Vls2sR = crate::BitReader; -impl Vls2sR { +pub type VLS2S_R = crate::BitReader; +impl VLS2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vls2s { + pub const fn variant(&self) -> VLS2S_A { match self.bits { - false => Vls2s::Value1, - true => Vls2s::Value2, + false => VLS2S_A::VALUE1, + true => VLS2S_A::VALUE2, } } #[doc = "Value switch not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vls2s::Value1 + *self == VLS2S_A::VALUE1 } #[doc = "Value switch detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vls2s::Value2 + *self == VLS2S_A::VALUE2 } } #[doc = "Conversion trigger status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trgss { +pub enum TRGSS_A { #[doc = "0: Conversion trigger was not generated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Conversion trigger was generated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trgss) -> Self { + fn from(variant: TRGSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TRGSS` reader - Conversion trigger status"] -pub type TrgssR = crate::BitReader; -impl TrgssR { +pub type TRGSS_R = crate::BitReader; +impl TRGSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trgss { + pub const fn variant(&self) -> TRGSS_A { match self.bits { - false => Trgss::Value1, - true => Trgss::Value2, + false => TRGSS_A::VALUE1, + true => TRGSS_A::VALUE2, } } #[doc = "Conversion trigger was not generated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trgss::Value1 + *self == TRGSS_A::VALUE1 } #[doc = "Conversion trigger was generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trgss::Value2 + *self == TRGSS_A::VALUE2 } } #[doc = "Start trigger interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Strss { +pub enum STRSS_A { #[doc = "0: Start trigger not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start trigger detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Strss) -> Self { + fn from(variant: STRSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STRSS` reader - Start trigger interrupt status"] -pub type StrssR = crate::BitReader; -impl StrssR { +pub type STRSS_R = crate::BitReader; +impl STRSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Strss { + pub const fn variant(&self) -> STRSS_A { match self.bits { - false => Strss::Value1, - true => Strss::Value2, + false => STRSS_A::VALUE1, + true => STRSS_A::VALUE2, } } #[doc = "Start trigger not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Strss::Value1 + *self == STRSS_A::VALUE1 } #[doc = "Start trigger detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Strss::Value2 + *self == STRSS_A::VALUE2 } } #[doc = "Stop trigger interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stpss { +pub enum STPSS_A { #[doc = "0: Stop trigger not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stop trigger detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stpss) -> Self { + fn from(variant: STPSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STPSS` reader - Stop trigger interrupt status"] -pub type StpssR = crate::BitReader; -impl StpssR { +pub type STPSS_R = crate::BitReader; +impl STPSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stpss { + pub const fn variant(&self) -> STPSS_A { match self.bits { - false => Stpss::Value1, - true => Stpss::Value2, + false => STPSS_A::VALUE1, + true => STPSS_A::VALUE2, } } #[doc = "Stop trigger not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stpss::Value1 + *self == STPSS_A::VALUE1 } #[doc = "Stop trigger detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stpss::Value2 + *self == STPSS_A::VALUE2 } } #[doc = "Shadow transfer interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stds { +pub enum STDS_A { #[doc = "0: Shadow transfer was not performed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer was performed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stds) -> Self { + fn from(variant: STDS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STDS` reader - Shadow transfer interrupt status"] -pub type StdsR = crate::BitReader; -impl StdsR { +pub type STDS_R = crate::BitReader; +impl STDS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stds { + pub const fn variant(&self) -> STDS_A { match self.bits { - false => Stds::Value1, - true => Stds::Value2, + false => STDS_A::VALUE1, + true => STDS_A::VALUE2, } } #[doc = "Shadow transfer was not performed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stds::Value1 + *self == STDS_A::VALUE1 } #[doc = "Shadow transfer was performed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stds::Value2 + *self == STDS_A::VALUE2 } } #[doc = "Comparator rise interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crss { +pub enum CRSS_A { #[doc = "0: Comparator output LOW to HIGH transition not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator output LOW to HIGH transition detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crss) -> Self { + fn from(variant: CRSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRSS` reader - Comparator rise interrupt status"] -pub type CrssR = crate::BitReader; -impl CrssR { +pub type CRSS_R = crate::BitReader; +impl CRSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Crss { + pub const fn variant(&self) -> CRSS_A { match self.bits { - false => Crss::Value1, - true => Crss::Value2, + false => CRSS_A::VALUE1, + true => CRSS_A::VALUE2, } } #[doc = "Comparator output LOW to HIGH transition not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Crss::Value1 + *self == CRSS_A::VALUE1 } #[doc = "Comparator output LOW to HIGH transition detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Crss::Value2 + *self == CRSS_A::VALUE2 } } #[doc = "Comparator fall interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cfss { +pub enum CFSS_A { #[doc = "0: Comparator output HIGH to LOW transition not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator output HIGH to LOW transition detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cfss) -> Self { + fn from(variant: CFSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CFSS` reader - Comparator fall interrupt status"] -pub type CfssR = crate::BitReader; -impl CfssR { +pub type CFSS_R = crate::BitReader; +impl CFSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cfss { + pub const fn variant(&self) -> CFSS_A { match self.bits { - false => Cfss::Value1, - true => Cfss::Value2, + false => CFSS_A::VALUE1, + true => CFSS_A::VALUE2, } } #[doc = "Comparator output HIGH to LOW transition not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cfss::Value1 + *self == CFSS_A::VALUE1 } #[doc = "Comparator output HIGH to LOW transition detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cfss::Value2 + *self == CFSS_A::VALUE2 } } #[doc = "Comparator clamped interrupt status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cses { +pub enum CSES_A { #[doc = "0: Comparator output has been set to the clamped state"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator output has not been set to the clamped state"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cses) -> Self { + fn from(variant: CSES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSES` reader - Comparator clamped interrupt status"] -pub type CsesR = crate::BitReader; -impl CsesR { +pub type CSES_R = crate::BitReader; +impl CSES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cses { + pub const fn variant(&self) -> CSES_A { match self.bits { - false => Cses::Value1, - true => Cses::Value2, + false => CSES_A::VALUE1, + true => CSES_A::VALUE2, } } #[doc = "Comparator output has been set to the clamped state"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cses::Value1 + *self == CSES_A::VALUE1 } #[doc = "Comparator output has not been set to the clamped state"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cses::Value2 + *self == CSES_A::VALUE2 } } impl R { #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt status"] #[inline(always)] - pub fn vls1s(&self) -> Vls1sR { - Vls1sR::new((self.bits & 1) != 0) + pub fn vls1s(&self) -> VLS1S_R { + VLS1S_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt status"] #[inline(always)] - pub fn vls2s(&self) -> Vls2sR { - Vls2sR::new(((self.bits >> 1) & 1) != 0) + pub fn vls2s(&self) -> VLS2S_R { + VLS2S_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Conversion trigger status"] #[inline(always)] - pub fn trgss(&self) -> TrgssR { - TrgssR::new(((self.bits >> 2) & 1) != 0) + pub fn trgss(&self) -> TRGSS_R { + TRGSS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start trigger interrupt status"] #[inline(always)] - pub fn strss(&self) -> StrssR { - StrssR::new(((self.bits >> 3) & 1) != 0) + pub fn strss(&self) -> STRSS_R { + STRSS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Stop trigger interrupt status"] #[inline(always)] - pub fn stpss(&self) -> StpssR { - StpssR::new(((self.bits >> 4) & 1) != 0) + pub fn stpss(&self) -> STPSS_R { + STPSS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Shadow transfer interrupt status"] #[inline(always)] - pub fn stds(&self) -> StdsR { - StdsR::new(((self.bits >> 5) & 1) != 0) + pub fn stds(&self) -> STDS_R { + STDS_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Comparator rise interrupt status"] #[inline(always)] - pub fn crss(&self) -> CrssR { - CrssR::new(((self.bits >> 6) & 1) != 0) + pub fn crss(&self) -> CRSS_R { + CRSS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Comparator fall interrupt status"] #[inline(always)] - pub fn cfss(&self) -> CfssR { - CfssR::new(((self.bits >> 7) & 1) != 0) + pub fn cfss(&self) -> CFSS_R { + CFSS_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Comparator clamped interrupt status"] #[inline(always)] - pub fn cses(&self) -> CsesR { - CsesR::new(((self.bits >> 8) & 1) != 0) + pub fn cses(&self) -> CSES_R { + CSES_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Service request status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`istat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IstatSpec; -impl crate::RegisterSpec for IstatSpec { +pub struct ISTAT_SPEC; +impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`istat::R`](R) reader structure"] -impl crate::Readable for IstatSpec {} +impl crate::Readable for ISTAT_SPEC {} #[doc = "`reset()` method sets ISTAT to value 0"] -impl crate::Resettable for IstatSpec { +impl crate::Resettable for ISTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/pc.rs b/src/hrpwm0_csg0/pc.rs index 77dab2a5..2b683a34 100644 --- a/src/hrpwm0_csg0/pc.rs +++ b/src/hrpwm0_csg0/pc.rs @@ -1,22 +1,22 @@ #[doc = "Register `PC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `PSWV` reader - Pulse swallow configuration"] -pub type PswvR = crate::FieldReader; +pub type PSWV_R = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Pulse swallow configuration"] #[inline(always)] - pub fn pswv(&self) -> PswvR { - PswvR::new((self.bits & 0x3f) as u8) + pub fn pswv(&self) -> PSWV_R { + PSWV_R::new((self.bits & 0x3f) as u8) } } #[doc = "Pulse swallow configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcSpec; -impl crate::RegisterSpec for PcSpec { +pub struct PC_SPEC; +impl crate::RegisterSpec for PC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pc::R`](R) reader structure"] -impl crate::Readable for PcSpec {} +impl crate::Readable for PC_SPEC {} #[doc = "`reset()` method sets PC to value 0"] -impl crate::Resettable for PcSpec { +impl crate::Resettable for PC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/plc.rs b/src/hrpwm0_csg0/plc.rs index ed2f9f8b..d5ab9e06 100644 --- a/src/hrpwm0_csg0/plc.rs +++ b/src/hrpwm0_csg0/plc.rs @@ -1,164 +1,164 @@ #[doc = "Register `PLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clamping control signal selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ipls { +pub enum IPLS_A { #[doc = "0: HRPWMx.BLyA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.BLyB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HRPWMx.BLyC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: HRPWMx.BLyD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: HRPWMx.BLyE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: HRPWMx.BLyF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: HRPWMx.BLyG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: HRPWMx.BLyH"] - Value8 = 7, + VALUE8 = 7, #[doc = "8: HRPWMx.BLyI"] - Value9 = 8, + VALUE9 = 8, #[doc = "9: HRPWMx.BLyJ"] - Value10 = 9, + VALUE10 = 9, #[doc = "10: HRPWMx.BLyK"] - Value11 = 10, + VALUE11 = 10, #[doc = "11: HRPWMx.BLyL"] - Value12 = 11, + VALUE12 = 11, #[doc = "12: HRPWMx.BLyM"] - Value13 = 12, + VALUE13 = 12, #[doc = "13: HRPWMx.BLyN"] - Value14 = 13, + VALUE14 = 13, #[doc = "14: HRPWMx.BLyO"] - Value15 = 14, + VALUE15 = 14, #[doc = "15: HRPWMx.BLyP"] - Value16 = 15, + VALUE16 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ipls) -> Self { + fn from(variant: IPLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ipls { +impl crate::FieldSpec for IPLS_A { type Ux = u8; } -impl crate::IsEnum for Ipls {} +impl crate::IsEnum for IPLS_A {} #[doc = "Field `IPLS` reader - Clamping control signal selector"] -pub type IplsR = crate::FieldReader; -impl IplsR { +pub type IPLS_R = crate::FieldReader; +impl IPLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ipls { + pub const fn variant(&self) -> IPLS_A { match self.bits { - 0 => Ipls::Value1, - 1 => Ipls::Value2, - 2 => Ipls::Value3, - 3 => Ipls::Value4, - 4 => Ipls::Value5, - 5 => Ipls::Value6, - 6 => Ipls::Value7, - 7 => Ipls::Value8, - 8 => Ipls::Value9, - 9 => Ipls::Value10, - 10 => Ipls::Value11, - 11 => Ipls::Value12, - 12 => Ipls::Value13, - 13 => Ipls::Value14, - 14 => Ipls::Value15, - 15 => Ipls::Value16, + 0 => IPLS_A::VALUE1, + 1 => IPLS_A::VALUE2, + 2 => IPLS_A::VALUE3, + 3 => IPLS_A::VALUE4, + 4 => IPLS_A::VALUE5, + 5 => IPLS_A::VALUE6, + 6 => IPLS_A::VALUE7, + 7 => IPLS_A::VALUE8, + 8 => IPLS_A::VALUE9, + 9 => IPLS_A::VALUE10, + 10 => IPLS_A::VALUE11, + 11 => IPLS_A::VALUE12, + 12 => IPLS_A::VALUE13, + 13 => IPLS_A::VALUE14, + 14 => IPLS_A::VALUE15, + 15 => IPLS_A::VALUE16, _ => unreachable!(), } } #[doc = "HRPWMx.BLyA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ipls::Value1 + *self == IPLS_A::VALUE1 } #[doc = "HRPWMx.BLyB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ipls::Value2 + *self == IPLS_A::VALUE2 } #[doc = "HRPWMx.BLyC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ipls::Value3 + *self == IPLS_A::VALUE3 } #[doc = "HRPWMx.BLyD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ipls::Value4 + *self == IPLS_A::VALUE4 } #[doc = "HRPWMx.BLyE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ipls::Value5 + *self == IPLS_A::VALUE5 } #[doc = "HRPWMx.BLyF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Ipls::Value6 + *self == IPLS_A::VALUE6 } #[doc = "HRPWMx.BLyG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Ipls::Value7 + *self == IPLS_A::VALUE7 } #[doc = "HRPWMx.BLyH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Ipls::Value8 + *self == IPLS_A::VALUE8 } #[doc = "HRPWMx.BLyI"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Ipls::Value9 + *self == IPLS_A::VALUE9 } #[doc = "HRPWMx.BLyJ"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Ipls::Value10 + *self == IPLS_A::VALUE10 } #[doc = "HRPWMx.BLyK"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Ipls::Value11 + *self == IPLS_A::VALUE11 } #[doc = "HRPWMx.BLyL"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Ipls::Value12 + *self == IPLS_A::VALUE12 } #[doc = "HRPWMx.BLyM"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Ipls::Value13 + *self == IPLS_A::VALUE13 } #[doc = "HRPWMx.BLyN"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Ipls::Value14 + *self == IPLS_A::VALUE14 } #[doc = "HRPWMx.BLyO"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Ipls::Value15 + *self == IPLS_A::VALUE15 } #[doc = "HRPWMx.BLyP"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Ipls::Value16 + *self == IPLS_A::VALUE16 } } #[doc = "Field `IPLS` writer - Clamping control signal selector"] -pub type IplsW<'a, REG> = crate::FieldWriter<'a, REG, 4, Ipls, crate::Safe>; -impl<'a, REG> IplsW<'a, REG> +pub type IPLS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, IPLS_A, crate::Safe>; +impl<'a, REG> IPLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -166,137 +166,137 @@ where #[doc = "HRPWMx.BLyA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ipls::Value1) + self.variant(IPLS_A::VALUE1) } #[doc = "HRPWMx.BLyB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ipls::Value2) + self.variant(IPLS_A::VALUE2) } #[doc = "HRPWMx.BLyC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ipls::Value3) + self.variant(IPLS_A::VALUE3) } #[doc = "HRPWMx.BLyD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ipls::Value4) + self.variant(IPLS_A::VALUE4) } #[doc = "HRPWMx.BLyE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ipls::Value5) + self.variant(IPLS_A::VALUE5) } #[doc = "HRPWMx.BLyF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Ipls::Value6) + self.variant(IPLS_A::VALUE6) } #[doc = "HRPWMx.BLyG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Ipls::Value7) + self.variant(IPLS_A::VALUE7) } #[doc = "HRPWMx.BLyH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Ipls::Value8) + self.variant(IPLS_A::VALUE8) } #[doc = "HRPWMx.BLyI"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Ipls::Value9) + self.variant(IPLS_A::VALUE9) } #[doc = "HRPWMx.BLyJ"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Ipls::Value10) + self.variant(IPLS_A::VALUE10) } #[doc = "HRPWMx.BLyK"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Ipls::Value11) + self.variant(IPLS_A::VALUE11) } #[doc = "HRPWMx.BLyL"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Ipls::Value12) + self.variant(IPLS_A::VALUE12) } #[doc = "HRPWMx.BLyM"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Ipls::Value13) + self.variant(IPLS_A::VALUE13) } #[doc = "HRPWMx.BLyN"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Ipls::Value14) + self.variant(IPLS_A::VALUE14) } #[doc = "HRPWMx.BLyO"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Ipls::Value15) + self.variant(IPLS_A::VALUE15) } #[doc = "HRPWMx.BLyP"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Ipls::Value16) + self.variant(IPLS_A::VALUE16) } } #[doc = "Clamping control signal level selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Plcl { +pub enum PLCL_A { #[doc = "0: Clamping control disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output is set to clamped level when the control signal is HIGH"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output is set to clamped level when the control signal is LOW"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Plcl) -> Self { + fn from(variant: PLCL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Plcl { +impl crate::FieldSpec for PLCL_A { type Ux = u8; } -impl crate::IsEnum for Plcl {} +impl crate::IsEnum for PLCL_A {} #[doc = "Field `PLCL` reader - Clamping control signal level selection"] -pub type PlclR = crate::FieldReader; -impl PlclR { +pub type PLCL_R = crate::FieldReader; +impl PLCL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Plcl::Value1), - 1 => Some(Plcl::Value2), - 2 => Some(Plcl::Value3), + 0 => Some(PLCL_A::VALUE1), + 1 => Some(PLCL_A::VALUE2), + 2 => Some(PLCL_A::VALUE3), _ => None, } } #[doc = "Clamping control disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Plcl::Value1 + *self == PLCL_A::VALUE1 } #[doc = "Output is set to clamped level when the control signal is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Plcl::Value2 + *self == PLCL_A::VALUE2 } #[doc = "Output is set to clamped level when the control signal is LOW"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Plcl::Value3 + *self == PLCL_A::VALUE3 } } #[doc = "Field `PLCL` writer - Clamping control signal level selection"] -pub type PlclW<'a, REG> = crate::FieldWriter<'a, REG, 2, Plcl>; -impl<'a, REG> PlclW<'a, REG> +pub type PLCL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PLCL_A>; +impl<'a, REG> PLCL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -304,178 +304,178 @@ where #[doc = "Clamping control disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Plcl::Value1) + self.variant(PLCL_A::VALUE1) } #[doc = "Output is set to clamped level when the control signal is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Plcl::Value2) + self.variant(PLCL_A::VALUE2) } #[doc = "Output is set to clamped level when the control signal is LOW"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Plcl::Value3) + self.variant(PLCL_A::VALUE3) } } #[doc = "Output passive level value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl { +pub enum PSL_A { #[doc = "0: Output clamped level is LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output clamped level is HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl) -> Self { + fn from(variant: PSL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL` reader - Output passive level value"] -pub type PslR = crate::BitReader; -impl PslR { +pub type PSL_R = crate::BitReader; +impl PSL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl { + pub const fn variant(&self) -> PSL_A { match self.bits { - false => Psl::Value1, - true => Psl::Value2, + false => PSL_A::VALUE1, + true => PSL_A::VALUE2, } } #[doc = "Output clamped level is LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl::Value1 + *self == PSL_A::VALUE1 } #[doc = "Output clamped level is HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl::Value2 + *self == PSL_A::VALUE2 } } #[doc = "Field `PSL` writer - Output passive level value"] -pub type PslW<'a, REG> = crate::BitWriter<'a, REG, Psl>; -impl<'a, REG> PslW<'a, REG> +pub type PSL_W<'a, REG> = crate::BitWriter<'a, REG, PSL_A>; +impl<'a, REG> PSL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Output clamped level is LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl::Value1) + self.variant(PSL_A::VALUE1) } #[doc = "Output clamped level is HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl::Value2) + self.variant(PSL_A::VALUE2) } } #[doc = "Clamped state exit SW configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Plsw { +pub enum PLSW_A { #[doc = "0: External signal and SW can remove the output from the clamped state"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Only SW can remove the output from the clamped state"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Plsw) -> Self { + fn from(variant: PLSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLSW` reader - Clamped state exit SW configuration"] -pub type PlswR = crate::BitReader; -impl PlswR { +pub type PLSW_R = crate::BitReader; +impl PLSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Plsw { + pub const fn variant(&self) -> PLSW_A { match self.bits { - false => Plsw::Value1, - true => Plsw::Value2, + false => PLSW_A::VALUE1, + true => PLSW_A::VALUE2, } } #[doc = "External signal and SW can remove the output from the clamped state"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Plsw::Value1 + *self == PLSW_A::VALUE1 } #[doc = "Only SW can remove the output from the clamped state"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Plsw::Value2 + *self == PLSW_A::VALUE2 } } #[doc = "Field `PLSW` writer - Clamped state exit SW configuration"] -pub type PlswW<'a, REG> = crate::BitWriter<'a, REG, Plsw>; -impl<'a, REG> PlswW<'a, REG> +pub type PLSW_W<'a, REG> = crate::BitWriter<'a, REG, PLSW_A>; +impl<'a, REG> PLSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External signal and SW can remove the output from the clamped state"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Plsw::Value1) + self.variant(PLSW_A::VALUE1) } #[doc = "Only SW can remove the output from the clamped state"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Plsw::Value2) + self.variant(PLSW_A::VALUE2) } } #[doc = "Passive level enter configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Plec { +pub enum PLEC_A { #[doc = "0: Passive level is entered immediately"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive level is entered only after the comparator output passes to LOW (output from the blanking stage)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Plec) -> Self { + fn from(variant: PLEC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Plec { +impl crate::FieldSpec for PLEC_A { type Ux = u8; } -impl crate::IsEnum for Plec {} +impl crate::IsEnum for PLEC_A {} #[doc = "Field `PLEC` reader - Passive level enter configuration"] -pub type PlecR = crate::FieldReader; -impl PlecR { +pub type PLEC_R = crate::FieldReader; +impl PLEC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Plec::Value1), - 1 => Some(Plec::Value2), - 2 => Some(Plec::Value3), + 0 => Some(PLEC_A::VALUE1), + 1 => Some(PLEC_A::VALUE2), + 2 => Some(PLEC_A::VALUE3), _ => None, } } #[doc = "Passive level is entered immediately"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Plec::Value1 + *self == PLEC_A::VALUE1 } #[doc = "Passive level is entered only after the comparator output passes to LOW (output from the blanking stage)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Plec::Value2 + *self == PLEC_A::VALUE2 } #[doc = "Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Plec::Value3 + *self == PLEC_A::VALUE3 } } #[doc = "Field `PLEC` writer - Passive level enter configuration"] -pub type PlecW<'a, REG> = crate::FieldWriter<'a, REG, 2, Plec>; -impl<'a, REG> PlecW<'a, REG> +pub type PLEC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PLEC_A>; +impl<'a, REG> PLEC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -483,72 +483,72 @@ where #[doc = "Passive level is entered immediately"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Plec::Value1) + self.variant(PLEC_A::VALUE1) } #[doc = "Passive level is entered only after the comparator output passes to LOW (output from the blanking stage)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Plec::Value2) + self.variant(PLEC_A::VALUE2) } #[doc = "Passive level is entered only after the comparator output passes to HIGH (output from the blanking stage)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Plec::Value3) + self.variant(PLEC_A::VALUE3) } } #[doc = "Passive level exit configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Plxc { +pub enum PLXC_A { #[doc = "0: Passive level is exit immediately"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Passive level is exit only after the comparator output passes to LOW (output from the blanking stage)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage)"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Plxc) -> Self { + fn from(variant: PLXC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Plxc { +impl crate::FieldSpec for PLXC_A { type Ux = u8; } -impl crate::IsEnum for Plxc {} +impl crate::IsEnum for PLXC_A {} #[doc = "Field `PLXC` reader - Passive level exit configuration"] -pub type PlxcR = crate::FieldReader; -impl PlxcR { +pub type PLXC_R = crate::FieldReader; +impl PLXC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Plxc::Value1), - 1 => Some(Plxc::Value2), - 2 => Some(Plxc::Value3), + 0 => Some(PLXC_A::VALUE1), + 1 => Some(PLXC_A::VALUE2), + 2 => Some(PLXC_A::VALUE3), _ => None, } } #[doc = "Passive level is exit immediately"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Plxc::Value1 + *self == PLXC_A::VALUE1 } #[doc = "Passive level is exit only after the comparator output passes to LOW (output from the blanking stage)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Plxc::Value2 + *self == PLXC_A::VALUE2 } #[doc = "Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Plxc::Value3 + *self == PLXC_A::VALUE3 } } #[doc = "Field `PLXC` writer - Passive level exit configuration"] -pub type PlxcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Plxc>; -impl<'a, REG> PlxcW<'a, REG> +pub type PLXC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PLXC_A>; +impl<'a, REG> PLXC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -556,103 +556,103 @@ where #[doc = "Passive level is exit immediately"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Plxc::Value1) + self.variant(PLXC_A::VALUE1) } #[doc = "Passive level is exit only after the comparator output passes to LOW (output from the blanking stage)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Plxc::Value2) + self.variant(PLXC_A::VALUE2) } #[doc = "Passive level is exit only after the comparator output passes to HIGH (output from the blanking stage)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Plxc::Value3) + self.variant(PLXC_A::VALUE3) } } impl R { #[doc = "Bits 0:3 - Clamping control signal selector"] #[inline(always)] - pub fn ipls(&self) -> IplsR { - IplsR::new((self.bits & 0x0f) as u8) + pub fn ipls(&self) -> IPLS_R { + IPLS_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:9 - Clamping control signal level selection"] #[inline(always)] - pub fn plcl(&self) -> PlclR { - PlclR::new(((self.bits >> 8) & 3) as u8) + pub fn plcl(&self) -> PLCL_R { + PLCL_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Output passive level value"] #[inline(always)] - pub fn psl(&self) -> PslR { - PslR::new(((self.bits >> 10) & 1) != 0) + pub fn psl(&self) -> PSL_R { + PSL_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Clamped state exit SW configuration"] #[inline(always)] - pub fn plsw(&self) -> PlswR { - PlswR::new(((self.bits >> 11) & 1) != 0) + pub fn plsw(&self) -> PLSW_R { + PLSW_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:13 - Passive level enter configuration"] #[inline(always)] - pub fn plec(&self) -> PlecR { - PlecR::new(((self.bits >> 12) & 3) as u8) + pub fn plec(&self) -> PLEC_R { + PLEC_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Passive level exit configuration"] #[inline(always)] - pub fn plxc(&self) -> PlxcR { - PlxcR::new(((self.bits >> 14) & 3) as u8) + pub fn plxc(&self) -> PLXC_R { + PLXC_R::new(((self.bits >> 14) & 3) as u8) } } impl W { #[doc = "Bits 0:3 - Clamping control signal selector"] #[inline(always)] #[must_use] - pub fn ipls(&mut self) -> IplsW { - IplsW::new(self, 0) + pub fn ipls(&mut self) -> IPLS_W { + IPLS_W::new(self, 0) } #[doc = "Bits 8:9 - Clamping control signal level selection"] #[inline(always)] #[must_use] - pub fn plcl(&mut self) -> PlclW { - PlclW::new(self, 8) + pub fn plcl(&mut self) -> PLCL_W { + PLCL_W::new(self, 8) } #[doc = "Bit 10 - Output passive level value"] #[inline(always)] #[must_use] - pub fn psl(&mut self) -> PslW { - PslW::new(self, 10) + pub fn psl(&mut self) -> PSL_W { + PSL_W::new(self, 10) } #[doc = "Bit 11 - Clamped state exit SW configuration"] #[inline(always)] #[must_use] - pub fn plsw(&mut self) -> PlswW { - PlswW::new(self, 11) + pub fn plsw(&mut self) -> PLSW_W { + PLSW_W::new(self, 11) } #[doc = "Bits 12:13 - Passive level enter configuration"] #[inline(always)] #[must_use] - pub fn plec(&mut self) -> PlecW { - PlecW::new(self, 12) + pub fn plec(&mut self) -> PLEC_W { + PLEC_W::new(self, 12) } #[doc = "Bits 14:15 - Passive level exit configuration"] #[inline(always)] #[must_use] - pub fn plxc(&mut self) -> PlxcW { - PlxcW::new(self, 14) + pub fn plxc(&mut self) -> PLXC_W { + PLXC_W::new(self, 14) } } #[doc = "Passive level configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`plc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`plc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PlcSpec; -impl crate::RegisterSpec for PlcSpec { +pub struct PLC_SPEC; +impl crate::RegisterSpec for PLC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`plc::R`](R) reader structure"] -impl crate::Readable for PlcSpec {} +impl crate::Readable for PLC_SPEC {} #[doc = "`write(|w| ..)` method takes [`plc::W`](W) writer structure"] -impl crate::Writable for PlcSpec { +impl crate::Writable for PLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLC to value 0"] -impl crate::Resettable for PlcSpec { +impl crate::Resettable for PLC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/sc.rs b/src/hrpwm0_csg0/sc.rs index b26ccc60..4f809ef4 100644 --- a/src/hrpwm0_csg0/sc.rs +++ b/src/hrpwm0_csg0/sc.rs @@ -1,68 +1,68 @@ #[doc = "Register `SC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Prescaler external start configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Psrm { +pub enum PSRM_A { #[doc = "0: External start trigger is ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start prescaler"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clear prescaler"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Clear & Start prescaler"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Psrm) -> Self { + fn from(variant: PSRM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Psrm { +impl crate::FieldSpec for PSRM_A { type Ux = u8; } -impl crate::IsEnum for Psrm {} +impl crate::IsEnum for PSRM_A {} #[doc = "Field `PSRM` reader - Prescaler external start configuration"] -pub type PsrmR = crate::FieldReader; -impl PsrmR { +pub type PSRM_R = crate::FieldReader; +impl PSRM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psrm { + pub const fn variant(&self) -> PSRM_A { match self.bits { - 0 => Psrm::Value1, - 1 => Psrm::Value2, - 2 => Psrm::Value3, - 3 => Psrm::Value4, + 0 => PSRM_A::VALUE1, + 1 => PSRM_A::VALUE2, + 2 => PSRM_A::VALUE3, + 3 => PSRM_A::VALUE4, _ => unreachable!(), } } #[doc = "External start trigger is ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psrm::Value1 + *self == PSRM_A::VALUE1 } #[doc = "Start prescaler"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psrm::Value2 + *self == PSRM_A::VALUE2 } #[doc = "Clear prescaler"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Psrm::Value3 + *self == PSRM_A::VALUE3 } #[doc = "Clear & Start prescaler"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Psrm::Value4 + *self == PSRM_A::VALUE4 } } #[doc = "Field `PSRM` writer - Prescaler external start configuration"] -pub type PsrmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Psrm, crate::Safe>; -impl<'a, REG> PsrmW<'a, REG> +pub type PSRM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PSRM_A, crate::Safe>; +impl<'a, REG> PSRM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "External start trigger is ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psrm::Value1) + self.variant(PSRM_A::VALUE1) } #[doc = "Start prescaler"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psrm::Value2) + self.variant(PSRM_A::VALUE2) } #[doc = "Clear prescaler"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Psrm::Value3) + self.variant(PSRM_A::VALUE3) } #[doc = "Clear & Start prescaler"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Psrm::Value4) + self.variant(PSRM_A::VALUE4) } } #[doc = "Prescaler external stop configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pstm { +pub enum PSTM_A { #[doc = "0: External stop trigger is ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stop prescaler"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clear prescaler"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Clear & Stop prescaler"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pstm) -> Self { + fn from(variant: PSTM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pstm { +impl crate::FieldSpec for PSTM_A { type Ux = u8; } -impl crate::IsEnum for Pstm {} +impl crate::IsEnum for PSTM_A {} #[doc = "Field `PSTM` reader - Prescaler external stop configuration"] -pub type PstmR = crate::FieldReader; -impl PstmR { +pub type PSTM_R = crate::FieldReader; +impl PSTM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pstm { + pub const fn variant(&self) -> PSTM_A { match self.bits { - 0 => Pstm::Value1, - 1 => Pstm::Value2, - 2 => Pstm::Value3, - 3 => Pstm::Value4, + 0 => PSTM_A::VALUE1, + 1 => PSTM_A::VALUE2, + 2 => PSTM_A::VALUE3, + 3 => PSTM_A::VALUE4, _ => unreachable!(), } } #[doc = "External stop trigger is ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pstm::Value1 + *self == PSTM_A::VALUE1 } #[doc = "Stop prescaler"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pstm::Value2 + *self == PSTM_A::VALUE2 } #[doc = "Clear prescaler"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pstm::Value3 + *self == PSTM_A::VALUE3 } #[doc = "Clear & Stop prescaler"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pstm::Value4 + *self == PSTM_A::VALUE4 } } #[doc = "Field `PSTM` writer - Prescaler external stop configuration"] -pub type PstmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pstm, crate::Safe>; -impl<'a, REG> PstmW<'a, REG> +pub type PSTM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PSTM_A, crate::Safe>; +impl<'a, REG> PSTM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,138 +156,138 @@ where #[doc = "External stop trigger is ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pstm::Value1) + self.variant(PSTM_A::VALUE1) } #[doc = "Stop prescaler"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pstm::Value2) + self.variant(PSTM_A::VALUE2) } #[doc = "Clear prescaler"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pstm::Value3) + self.variant(PSTM_A::VALUE3) } #[doc = "Clear & Stop prescaler"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pstm::Value4) + self.variant(PSTM_A::VALUE4) } } #[doc = "Fixed division disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fpd { +pub enum FPD_A { #[doc = "0: Division by 4 enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Division by 4 disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fpd) -> Self { + fn from(variant: FPD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FPD` reader - Fixed division disable"] -pub type FpdR = crate::BitReader; -impl FpdR { +pub type FPD_R = crate::BitReader; +impl FPD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fpd { + pub const fn variant(&self) -> FPD_A { match self.bits { - false => Fpd::Value1, - true => Fpd::Value2, + false => FPD_A::VALUE1, + true => FPD_A::VALUE2, } } #[doc = "Division by 4 enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fpd::Value1 + *self == FPD_A::VALUE1 } #[doc = "Division by 4 disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fpd::Value2 + *self == FPD_A::VALUE2 } } #[doc = "Field `FPD` writer - Fixed division disable"] -pub type FpdW<'a, REG> = crate::BitWriter<'a, REG, Fpd>; -impl<'a, REG> FpdW<'a, REG> +pub type FPD_W<'a, REG> = crate::BitWriter<'a, REG, FPD_A>; +impl<'a, REG> FPD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Division by 4 enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fpd::Value1) + self.variant(FPD_A::VALUE1) } #[doc = "Division by 4 disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fpd::Value2) + self.variant(FPD_A::VALUE2) } } #[doc = "Prescaler division factor\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Psv { +pub enum PSV_A { #[doc = "0: division by 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: division by 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: division by 4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: division by 8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Psv) -> Self { + fn from(variant: PSV_A) -> Self { variant as _ } } -impl crate::FieldSpec for Psv { +impl crate::FieldSpec for PSV_A { type Ux = u8; } -impl crate::IsEnum for Psv {} +impl crate::IsEnum for PSV_A {} #[doc = "Field `PSV` reader - Prescaler division factor"] -pub type PsvR = crate::FieldReader; -impl PsvR { +pub type PSV_R = crate::FieldReader; +impl PSV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psv { + pub const fn variant(&self) -> PSV_A { match self.bits { - 0 => Psv::Value1, - 1 => Psv::Value2, - 2 => Psv::Value3, - 3 => Psv::Value4, + 0 => PSV_A::VALUE1, + 1 => PSV_A::VALUE2, + 2 => PSV_A::VALUE3, + 3 => PSV_A::VALUE4, _ => unreachable!(), } } #[doc = "division by 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psv::Value1 + *self == PSV_A::VALUE1 } #[doc = "division by 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psv::Value2 + *self == PSV_A::VALUE2 } #[doc = "division by 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Psv::Value3 + *self == PSV_A::VALUE3 } #[doc = "division by 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Psv::Value4 + *self == PSV_A::VALUE4 } } #[doc = "Field `PSV` writer - Prescaler division factor"] -pub type PsvW<'a, REG> = crate::FieldWriter<'a, REG, 2, Psv, crate::Safe>; -impl<'a, REG> PsvW<'a, REG> +pub type PSV_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PSV_A, crate::Safe>; +impl<'a, REG> PSV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -295,85 +295,85 @@ where #[doc = "division by 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psv::Value1) + self.variant(PSV_A::VALUE1) } #[doc = "division by 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psv::Value2) + self.variant(PSV_A::VALUE2) } #[doc = "division by 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Psv::Value3) + self.variant(PSV_A::VALUE3) } #[doc = "division by 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Psv::Value4) + self.variant(PSV_A::VALUE4) } } #[doc = "Slope control mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Scm { +pub enum SCM_A { #[doc = "0: Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Decrementing slope generation."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Incrementing slope generation."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Triangular slope generation."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Scm) -> Self { + fn from(variant: SCM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Scm { +impl crate::FieldSpec for SCM_A { type Ux = u8; } -impl crate::IsEnum for Scm {} +impl crate::IsEnum for SCM_A {} #[doc = "Field `SCM` reader - Slope control mode"] -pub type ScmR = crate::FieldReader; -impl ScmR { +pub type SCM_R = crate::FieldReader; +impl SCM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scm { + pub const fn variant(&self) -> SCM_A { match self.bits { - 0 => Scm::Value1, - 1 => Scm::Value2, - 2 => Scm::Value3, - 3 => Scm::Value4, + 0 => SCM_A::VALUE1, + 1 => SCM_A::VALUE2, + 2 => SCM_A::VALUE3, + 3 => SCM_A::VALUE4, _ => unreachable!(), } } #[doc = "Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scm::Value1 + *self == SCM_A::VALUE1 } #[doc = "Decrementing slope generation."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scm::Value2 + *self == SCM_A::VALUE2 } #[doc = "Incrementing slope generation."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Scm::Value3 + *self == SCM_A::VALUE3 } #[doc = "Triangular slope generation."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Scm::Value4 + *self == SCM_A::VALUE4 } } #[doc = "Field `SCM` writer - Slope control mode"] -pub type ScmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Scm, crate::Safe>; -impl<'a, REG> ScmW<'a, REG> +pub type SCM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SCM_A, crate::Safe>; +impl<'a, REG> SCM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -381,77 +381,77 @@ where #[doc = "Slope generation disabled. Used when the switch between the two reference values, CSGyDSV1This register contains the actual value used for the DSV1 reference. and CSGyDSV2This register contains the actual value used for the DSV2 reference. is done via external signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scm::Value1) + self.variant(SCM_A::VALUE1) } #[doc = "Decrementing slope generation."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scm::Value2) + self.variant(SCM_A::VALUE2) } #[doc = "Incrementing slope generation."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Scm::Value3) + self.variant(SCM_A::VALUE3) } #[doc = "Triangular slope generation."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Scm::Value4) + self.variant(SCM_A::VALUE4) } } #[doc = "Slope external start configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ssrm { +pub enum SSRM_A { #[doc = "0: External start trigger is ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start/restart slope generation"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Resumes slope"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ssrm) -> Self { + fn from(variant: SSRM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ssrm { +impl crate::FieldSpec for SSRM_A { type Ux = u8; } -impl crate::IsEnum for Ssrm {} +impl crate::IsEnum for SSRM_A {} #[doc = "Field `SSRM` reader - Slope external start configuration"] -pub type SsrmR = crate::FieldReader; -impl SsrmR { +pub type SSRM_R = crate::FieldReader; +impl SSRM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Ssrm::Value1), - 1 => Some(Ssrm::Value2), - 2 => Some(Ssrm::Value3), + 0 => Some(SSRM_A::VALUE1), + 1 => Some(SSRM_A::VALUE2), + 2 => Some(SSRM_A::VALUE3), _ => None, } } #[doc = "External start trigger is ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ssrm::Value1 + *self == SSRM_A::VALUE1 } #[doc = "Start/restart slope generation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ssrm::Value2 + *self == SSRM_A::VALUE2 } #[doc = "Resumes slope"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ssrm::Value3 + *self == SSRM_A::VALUE3 } } #[doc = "Field `SSRM` writer - Slope external start configuration"] -pub type SsrmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ssrm>; -impl<'a, REG> SsrmW<'a, REG> +pub type SSRM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SSRM_A>; +impl<'a, REG> SSRM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -459,72 +459,72 @@ where #[doc = "External start trigger is ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ssrm::Value1) + self.variant(SSRM_A::VALUE1) } #[doc = "Start/restart slope generation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ssrm::Value2) + self.variant(SSRM_A::VALUE2) } #[doc = "Resumes slope"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ssrm::Value3) + self.variant(SSRM_A::VALUE3) } } #[doc = "Slope external stop configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sstm { +pub enum SSTM_A { #[doc = "0: External stop trigger is ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stops/Halts the slope generation"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sstm) -> Self { + fn from(variant: SSTM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sstm { +impl crate::FieldSpec for SSTM_A { type Ux = u8; } -impl crate::IsEnum for Sstm {} +impl crate::IsEnum for SSTM_A {} #[doc = "Field `SSTM` reader - Slope external stop configuration"] -pub type SstmR = crate::FieldReader; -impl SstmR { +pub type SSTM_R = crate::FieldReader; +impl SSTM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sstm::Value1), - 1 => Some(Sstm::Value2), - 2 => Some(Sstm::Value3), + 0 => Some(SSTM_A::VALUE1), + 1 => Some(SSTM_A::VALUE2), + 2 => Some(SSTM_A::VALUE3), _ => None, } } #[doc = "External stop trigger is ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sstm::Value1 + *self == SSTM_A::VALUE1 } #[doc = "Stops/Halts the slope generation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sstm::Value2 + *self == SSTM_A::VALUE2 } #[doc = "Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sstm::Value3 + *self == SSTM_A::VALUE3 } } #[doc = "Field `SSTM` writer - Slope external stop configuration"] -pub type SstmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sstm>; -impl<'a, REG> SstmW<'a, REG> +pub type SSTM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SSTM_A>; +impl<'a, REG> SSTM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -532,72 +532,72 @@ where #[doc = "External stop trigger is ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sstm::Value1) + self.variant(SSTM_A::VALUE1) } #[doc = "Stops/Halts the slope generation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sstm::Value2) + self.variant(SSTM_A::VALUE2) } #[doc = "Used in hybrid mode. It freezes the slope generation and feeds constantly the value programmed in CSGyDSV2This register contains the actual value used for the DSV2 reference. to the DAC."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sstm::Value3) + self.variant(SSTM_A::VALUE3) } } #[doc = "Slope reference value mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Svsc { +pub enum SVSC_A { #[doc = "0: Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected)."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Svsc) -> Self { + fn from(variant: SVSC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Svsc { +impl crate::FieldSpec for SVSC_A { type Ux = u8; } -impl crate::IsEnum for Svsc {} +impl crate::IsEnum for SVSC_A {} #[doc = "Field `SVSC` reader - Slope reference value mode"] -pub type SvscR = crate::FieldReader; -impl SvscR { +pub type SVSC_R = crate::FieldReader; +impl SVSC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Svsc::Value1), - 1 => Some(Svsc::Value2), - 2 => Some(Svsc::Value3), + 0 => Some(SVSC_A::VALUE1), + 1 => Some(SVSC_A::VALUE2), + 2 => Some(SVSC_A::VALUE3), _ => None, } } #[doc = "Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svsc::Value1 + *self == SVSC_A::VALUE1 } #[doc = "The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svsc::Value2 + *self == SVSC_A::VALUE2 } #[doc = "The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Svsc::Value3 + *self == SVSC_A::VALUE3 } } #[doc = "Field `SVSC` writer - Slope reference value mode"] -pub type SvscW<'a, REG> = crate::FieldWriter<'a, REG, 2, Svsc>; -impl<'a, REG> SvscW<'a, REG> +pub type SVSC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SVSC_A>; +impl<'a, REG> SVSC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -605,80 +605,80 @@ where #[doc = "Only CSGyDSV1This register contains the actual value used for the DSV1 reference. value is used for the slope generation: if slope is incrementing, CSGyDSV1This register contains the actual value used for the DSV1 reference. is the bottom reference value from where the ramp starts; if decrementing, then CSGyDSV1This register contains the actual value used for the DSV1 reference. is the upper reference value from where the ramp starts."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svsc::Value1) + self.variant(SVSC_A::VALUE1) } #[doc = "The two reference values are being used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the ramp starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as a static value (this value is constantly fed to the DAC after a stop trigger as been detected)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svsc::Value2) + self.variant(SVSC_A::VALUE2) } #[doc = "The two reference values are used: CSGyDSV1This register contains the actual value used for the DSV1 reference. is the low or high reference value from where the slope starts (incrementing or decrementing respectively); CSGyDSV2This register contains the actual value used for the DSV2 reference. is used as an internal re start condition for the slope."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Svsc::Value3) + self.variant(SVSC_A::VALUE3) } } #[doc = "Initial DAC start mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Swsm { +pub enum SWSM_A { #[doc = "0: CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Swsm) -> Self { + fn from(variant: SWSM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Swsm { +impl crate::FieldSpec for SWSM_A { type Ux = u8; } -impl crate::IsEnum for Swsm {} +impl crate::IsEnum for SWSM_A {} #[doc = "Field `SWSM` reader - Initial DAC start mode"] -pub type SwsmR = crate::FieldReader; -impl SwsmR { +pub type SWSM_R = crate::FieldReader; +impl SWSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Swsm { + pub const fn variant(&self) -> SWSM_A { match self.bits { - 0 => Swsm::Value1, - 1 => Swsm::Value2, - 2 => Swsm::Value3, - 3 => Swsm::Value4, + 0 => SWSM_A::VALUE1, + 1 => SWSM_A::VALUE2, + 2 => SWSM_A::VALUE3, + 3 => SWSM_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Swsm::Value1 + *self == SWSM_A::VALUE1 } #[doc = "CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Swsm::Value2 + *self == SWSM_A::VALUE2 } #[doc = "CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Swsm::Value3 + *self == SWSM_A::VALUE3 } #[doc = "CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Swsm::Value4 + *self == SWSM_A::VALUE4 } } #[doc = "Field `SWSM` writer - Initial DAC start mode"] -pub type SwsmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Swsm, crate::Safe>; -impl<'a, REG> SwsmW<'a, REG> +pub type SWSM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SWSM_A, crate::Safe>; +impl<'a, REG> SWSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -686,85 +686,85 @@ where #[doc = "CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC and initial conversion trigger is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Swsm::Value1) + self.variant(SWSM_A::VALUE1) } #[doc = "CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC and initial conversion trigger is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Swsm::Value2) + self.variant(SWSM_A::VALUE2) } #[doc = "CSGyDSV2This register contains the actual value used for the DSV2 reference. is fed to the DAC but initial conversion trigger is not generated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Swsm::Value3) + self.variant(SWSM_A::VALUE3) } #[doc = "CSGyDSV1This register contains the actual value used for the DSV1 reference. is fed to the DAC but initial conversion trigger is not generated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Swsm::Value4) + self.variant(SWSM_A::VALUE4) } } #[doc = "Slope step gain configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Gcfg { +pub enum GCFG_A { #[doc = "0: Each slope step has an increment/decrement of 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Each slope step has an increment/decrement of 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Each slope step has an increment/decrement of 4"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Each slope step has an increment/decrement of 8"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Gcfg) -> Self { + fn from(variant: GCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Gcfg { +impl crate::FieldSpec for GCFG_A { type Ux = u8; } -impl crate::IsEnum for Gcfg {} +impl crate::IsEnum for GCFG_A {} #[doc = "Field `GCFG` reader - Slope step gain configuration"] -pub type GcfgR = crate::FieldReader; -impl GcfgR { +pub type GCFG_R = crate::FieldReader; +impl GCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gcfg { + pub const fn variant(&self) -> GCFG_A { match self.bits { - 0 => Gcfg::Value1, - 1 => Gcfg::Value2, - 2 => Gcfg::Value3, - 3 => Gcfg::Value4, + 0 => GCFG_A::VALUE1, + 1 => GCFG_A::VALUE2, + 2 => GCFG_A::VALUE3, + 3 => GCFG_A::VALUE4, _ => unreachable!(), } } #[doc = "Each slope step has an increment/decrement of 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gcfg::Value1 + *self == GCFG_A::VALUE1 } #[doc = "Each slope step has an increment/decrement of 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gcfg::Value2 + *self == GCFG_A::VALUE2 } #[doc = "Each slope step has an increment/decrement of 4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Gcfg::Value3 + *self == GCFG_A::VALUE3 } #[doc = "Each slope step has an increment/decrement of 8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Gcfg::Value4 + *self == GCFG_A::VALUE4 } } #[doc = "Field `GCFG` writer - Slope step gain configuration"] -pub type GcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Gcfg, crate::Safe>; -impl<'a, REG> GcfgW<'a, REG> +pub type GCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GCFG_A, crate::Safe>; +impl<'a, REG> GCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -772,134 +772,134 @@ where #[doc = "Each slope step has an increment/decrement of 1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gcfg::Value1) + self.variant(GCFG_A::VALUE1) } #[doc = "Each slope step has an increment/decrement of 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gcfg::Value2) + self.variant(GCFG_A::VALUE2) } #[doc = "Each slope step has an increment/decrement of 4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Gcfg::Value3) + self.variant(GCFG_A::VALUE3) } #[doc = "Each slope step has an increment/decrement of 8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Gcfg::Value4) + self.variant(GCFG_A::VALUE4) } } #[doc = "Field `IST` reader - Immediate shadow transfer"] -pub type IstR = crate::BitReader; +pub type IST_R = crate::BitReader; #[doc = "Field `IST` writer - Immediate shadow transfer"] -pub type IstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type IST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Pulse swallow enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pse { +pub enum PSE_A { #[doc = "0: Pulse swallow disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pulse swallow enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pse) -> Self { + fn from(variant: PSE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSE` reader - Pulse swallow enable"] -pub type PseR = crate::BitReader; -impl PseR { +pub type PSE_R = crate::BitReader; +impl PSE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pse { + pub const fn variant(&self) -> PSE_A { match self.bits { - false => Pse::Value1, - true => Pse::Value2, + false => PSE_A::VALUE1, + true => PSE_A::VALUE2, } } #[doc = "Pulse swallow disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pse::Value1 + *self == PSE_A::VALUE1 } #[doc = "Pulse swallow enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pse::Value2 + *self == PSE_A::VALUE2 } } #[doc = "Field `PSE` writer - Pulse swallow enable"] -pub type PseW<'a, REG> = crate::BitWriter<'a, REG, Pse>; -impl<'a, REG> PseW<'a, REG> +pub type PSE_W<'a, REG> = crate::BitWriter<'a, REG, PSE_A>; +impl<'a, REG> PSE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pulse swallow disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pse::Value1) + self.variant(PSE_A::VALUE1) } #[doc = "Pulse swallow enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pse::Value2) + self.variant(PSE_A::VALUE2) } } #[doc = "Pulse swallow window mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pswm { +pub enum PSWM_A { #[doc = "0: 16 clock cycle window"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 32 clock cycle window"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 64 clock cycle window"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pswm) -> Self { + fn from(variant: PSWM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pswm { +impl crate::FieldSpec for PSWM_A { type Ux = u8; } -impl crate::IsEnum for Pswm {} +impl crate::IsEnum for PSWM_A {} #[doc = "Field `PSWM` reader - Pulse swallow window mode"] -pub type PswmR = crate::FieldReader; -impl PswmR { +pub type PSWM_R = crate::FieldReader; +impl PSWM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pswm::Value1), - 1 => Some(Pswm::Value2), - 2 => Some(Pswm::Value3), + 0 => Some(PSWM_A::VALUE1), + 1 => Some(PSWM_A::VALUE2), + 2 => Some(PSWM_A::VALUE3), _ => None, } } #[doc = "16 clock cycle window"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pswm::Value1 + *self == PSWM_A::VALUE1 } #[doc = "32 clock cycle window"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pswm::Value2 + *self == PSWM_A::VALUE2 } #[doc = "64 clock cycle window"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pswm::Value3 + *self == PSWM_A::VALUE3 } } #[doc = "Field `PSWM` writer - Pulse swallow window mode"] -pub type PswmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pswm>; -impl<'a, REG> PswmW<'a, REG> +pub type PSWM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PSWM_A>; +impl<'a, REG> PSWM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -907,180 +907,180 @@ where #[doc = "16 clock cycle window"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pswm::Value1) + self.variant(PSWM_A::VALUE1) } #[doc = "32 clock cycle window"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pswm::Value2) + self.variant(PSWM_A::VALUE2) } #[doc = "64 clock cycle window"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pswm::Value3) + self.variant(PSWM_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Prescaler external start configuration"] #[inline(always)] - pub fn psrm(&self) -> PsrmR { - PsrmR::new((self.bits & 3) as u8) + pub fn psrm(&self) -> PSRM_R { + PSRM_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Prescaler external stop configuration"] #[inline(always)] - pub fn pstm(&self) -> PstmR { - PstmR::new(((self.bits >> 2) & 3) as u8) + pub fn pstm(&self) -> PSTM_R { + PSTM_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Fixed division disable"] #[inline(always)] - pub fn fpd(&self) -> FpdR { - FpdR::new(((self.bits >> 4) & 1) != 0) + pub fn fpd(&self) -> FPD_R { + FPD_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:6 - Prescaler division factor"] #[inline(always)] - pub fn psv(&self) -> PsvR { - PsvR::new(((self.bits >> 5) & 3) as u8) + pub fn psv(&self) -> PSV_R { + PSV_R::new(((self.bits >> 5) & 3) as u8) } #[doc = "Bits 8:9 - Slope control mode"] #[inline(always)] - pub fn scm(&self) -> ScmR { - ScmR::new(((self.bits >> 8) & 3) as u8) + pub fn scm(&self) -> SCM_R { + SCM_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Slope external start configuration"] #[inline(always)] - pub fn ssrm(&self) -> SsrmR { - SsrmR::new(((self.bits >> 10) & 3) as u8) + pub fn ssrm(&self) -> SSRM_R { + SSRM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Slope external stop configuration"] #[inline(always)] - pub fn sstm(&self) -> SstmR { - SstmR::new(((self.bits >> 12) & 3) as u8) + pub fn sstm(&self) -> SSTM_R { + SSTM_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Slope reference value mode"] #[inline(always)] - pub fn svsc(&self) -> SvscR { - SvscR::new(((self.bits >> 14) & 3) as u8) + pub fn svsc(&self) -> SVSC_R { + SVSC_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Initial DAC start mode"] #[inline(always)] - pub fn swsm(&self) -> SwsmR { - SwsmR::new(((self.bits >> 16) & 3) as u8) + pub fn swsm(&self) -> SWSM_R { + SWSM_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Slope step gain configuration"] #[inline(always)] - pub fn gcfg(&self) -> GcfgR { - GcfgR::new(((self.bits >> 18) & 3) as u8) + pub fn gcfg(&self) -> GCFG_R { + GCFG_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Immediate shadow transfer"] #[inline(always)] - pub fn ist(&self) -> IstR { - IstR::new(((self.bits >> 20) & 1) != 0) + pub fn ist(&self) -> IST_R { + IST_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Pulse swallow enable"] #[inline(always)] - pub fn pse(&self) -> PseR { - PseR::new(((self.bits >> 21) & 1) != 0) + pub fn pse(&self) -> PSE_R { + PSE_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 24:25 - Pulse swallow window mode"] #[inline(always)] - pub fn pswm(&self) -> PswmR { - PswmR::new(((self.bits >> 24) & 3) as u8) + pub fn pswm(&self) -> PSWM_R { + PSWM_R::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Prescaler external start configuration"] #[inline(always)] #[must_use] - pub fn psrm(&mut self) -> PsrmW { - PsrmW::new(self, 0) + pub fn psrm(&mut self) -> PSRM_W { + PSRM_W::new(self, 0) } #[doc = "Bits 2:3 - Prescaler external stop configuration"] #[inline(always)] #[must_use] - pub fn pstm(&mut self) -> PstmW { - PstmW::new(self, 2) + pub fn pstm(&mut self) -> PSTM_W { + PSTM_W::new(self, 2) } #[doc = "Bit 4 - Fixed division disable"] #[inline(always)] #[must_use] - pub fn fpd(&mut self) -> FpdW { - FpdW::new(self, 4) + pub fn fpd(&mut self) -> FPD_W { + FPD_W::new(self, 4) } #[doc = "Bits 5:6 - Prescaler division factor"] #[inline(always)] #[must_use] - pub fn psv(&mut self) -> PsvW { - PsvW::new(self, 5) + pub fn psv(&mut self) -> PSV_W { + PSV_W::new(self, 5) } #[doc = "Bits 8:9 - Slope control mode"] #[inline(always)] #[must_use] - pub fn scm(&mut self) -> ScmW { - ScmW::new(self, 8) + pub fn scm(&mut self) -> SCM_W { + SCM_W::new(self, 8) } #[doc = "Bits 10:11 - Slope external start configuration"] #[inline(always)] #[must_use] - pub fn ssrm(&mut self) -> SsrmW { - SsrmW::new(self, 10) + pub fn ssrm(&mut self) -> SSRM_W { + SSRM_W::new(self, 10) } #[doc = "Bits 12:13 - Slope external stop configuration"] #[inline(always)] #[must_use] - pub fn sstm(&mut self) -> SstmW { - SstmW::new(self, 12) + pub fn sstm(&mut self) -> SSTM_W { + SSTM_W::new(self, 12) } #[doc = "Bits 14:15 - Slope reference value mode"] #[inline(always)] #[must_use] - pub fn svsc(&mut self) -> SvscW { - SvscW::new(self, 14) + pub fn svsc(&mut self) -> SVSC_W { + SVSC_W::new(self, 14) } #[doc = "Bits 16:17 - Initial DAC start mode"] #[inline(always)] #[must_use] - pub fn swsm(&mut self) -> SwsmW { - SwsmW::new(self, 16) + pub fn swsm(&mut self) -> SWSM_W { + SWSM_W::new(self, 16) } #[doc = "Bits 18:19 - Slope step gain configuration"] #[inline(always)] #[must_use] - pub fn gcfg(&mut self) -> GcfgW { - GcfgW::new(self, 18) + pub fn gcfg(&mut self) -> GCFG_W { + GCFG_W::new(self, 18) } #[doc = "Bit 20 - Immediate shadow transfer"] #[inline(always)] #[must_use] - pub fn ist(&mut self) -> IstW { - IstW::new(self, 20) + pub fn ist(&mut self) -> IST_W { + IST_W::new(self, 20) } #[doc = "Bit 21 - Pulse swallow enable"] #[inline(always)] #[must_use] - pub fn pse(&mut self) -> PseW { - PseW::new(self, 21) + pub fn pse(&mut self) -> PSE_W { + PSE_W::new(self, 21) } #[doc = "Bits 24:25 - Pulse swallow window mode"] #[inline(always)] #[must_use] - pub fn pswm(&mut self) -> PswmW { - PswmW::new(self, 24) + pub fn pswm(&mut self) -> PSWM_W { + PSWM_W::new(self, 24) } } #[doc = "Slope generation control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ScSpec; -impl crate::RegisterSpec for ScSpec { +pub struct SC_SPEC; +impl crate::RegisterSpec for SC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sc::R`](R) reader structure"] -impl crate::Readable for ScSpec {} +impl crate::Readable for SC_SPEC {} #[doc = "`write(|w| ..)` method takes [`sc::W`](W) writer structure"] -impl crate::Writable for ScSpec { +impl crate::Writable for SC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SC to value 0"] -impl crate::Resettable for ScSpec { +impl crate::Resettable for SC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/sdsv1.rs b/src/hrpwm0_csg0/sdsv1.rs index 6e32c617..9152e8a5 100644 --- a/src/hrpwm0_csg0/sdsv1.rs +++ b/src/hrpwm0_csg0/sdsv1.rs @@ -1,40 +1,40 @@ #[doc = "Register `SDSV1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDSV1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SDSV1` reader - Shadow DAC reference value 1"] -pub type Sdsv1R = crate::FieldReader; +pub type SDSV1_R = crate::FieldReader; #[doc = "Field `SDSV1` writer - Shadow DAC reference value 1"] -pub type Sdsv1W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type SDSV1_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Shadow DAC reference value 1"] #[inline(always)] - pub fn sdsv1(&self) -> Sdsv1R { - Sdsv1R::new((self.bits & 0x03ff) as u16) + pub fn sdsv1(&self) -> SDSV1_R { + SDSV1_R::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Shadow DAC reference value 1"] #[inline(always)] #[must_use] - pub fn sdsv1(&mut self) -> Sdsv1W { - Sdsv1W::new(self, 0) + pub fn sdsv1(&mut self) -> SDSV1_W { + SDSV1_W::new(self, 0) } } #[doc = "Shadow reference value 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdsv1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdsv1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Sdsv1Spec; -impl crate::RegisterSpec for Sdsv1Spec { +pub struct SDSV1_SPEC; +impl crate::RegisterSpec for SDSV1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sdsv1::R`](R) reader structure"] -impl crate::Readable for Sdsv1Spec {} +impl crate::Readable for SDSV1_SPEC {} #[doc = "`write(|w| ..)` method takes [`sdsv1::W`](W) writer structure"] -impl crate::Writable for Sdsv1Spec { +impl crate::Writable for SDSV1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDSV1 to value 0"] -impl crate::Resettable for Sdsv1Spec { +impl crate::Resettable for SDSV1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/spc.rs b/src/hrpwm0_csg0/spc.rs index 630bfd34..c1a7099c 100644 --- a/src/hrpwm0_csg0/spc.rs +++ b/src/hrpwm0_csg0/spc.rs @@ -1,40 +1,40 @@ #[doc = "Register `SPC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SPC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SPSWV` reader - Shadow pulse swallow value"] -pub type SpswvR = crate::FieldReader; +pub type SPSWV_R = crate::FieldReader; #[doc = "Field `SPSWV` writer - Shadow pulse swallow value"] -pub type SpswvW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type SPSWV_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - Shadow pulse swallow value"] #[inline(always)] - pub fn spswv(&self) -> SpswvR { - SpswvR::new((self.bits & 0x3f) as u8) + pub fn spswv(&self) -> SPSWV_R { + SPSWV_R::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - Shadow pulse swallow value"] #[inline(always)] #[must_use] - pub fn spswv(&mut self) -> SpswvW { - SpswvW::new(self, 0) + pub fn spswv(&mut self) -> SPSWV_W { + SPSWV_W::new(self, 0) } } #[doc = "Shadow Pulse swallow value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`spc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SpcSpec; -impl crate::RegisterSpec for SpcSpec { +pub struct SPC_SPEC; +impl crate::RegisterSpec for SPC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`spc::R`](R) reader structure"] -impl crate::Readable for SpcSpec {} +impl crate::Readable for SPC_SPEC {} #[doc = "`write(|w| ..)` method takes [`spc::W`](W) writer structure"] -impl crate::Writable for SpcSpec { +impl crate::Writable for SPC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SPC to value 0"] -impl crate::Resettable for SpcSpec { +impl crate::Resettable for SPC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/sre.rs b/src/hrpwm0_csg0/sre.rs index 96b6f5f8..add38301 100644 --- a/src/hrpwm0_csg0/sre.rs +++ b/src/hrpwm0_csg0/sre.rs @@ -1,160 +1,160 @@ #[doc = "Register `SRE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VLS1E` reader - Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable"] -pub type Vls1eR = crate::BitReader; +pub type VLS1E_R = crate::BitReader; #[doc = "Field `VLS1E` writer - Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable"] -pub type Vls1eW<'a, REG> = crate::BitWriter<'a, REG>; +pub type VLS1E_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VLS2E` reader - Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable"] -pub type Vls2eR = crate::BitReader; +pub type VLS2E_R = crate::BitReader; #[doc = "Field `VLS2E` writer - Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable"] -pub type Vls2eW<'a, REG> = crate::BitWriter<'a, REG>; +pub type VLS2E_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TRGSE` reader - Conversion trigger interrupt enable"] -pub type TrgseR = crate::BitReader; +pub type TRGSE_R = crate::BitReader; #[doc = "Field `TRGSE` writer - Conversion trigger interrupt enable"] -pub type TrgseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TRGSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRSE` reader - Start trigger interrupt enable"] -pub type StrseR = crate::BitReader; +pub type STRSE_R = crate::BitReader; #[doc = "Field `STRSE` writer - Start trigger interrupt enable"] -pub type StrseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STRSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STPSE` reader - Stop trigger interrupt enable"] -pub type StpseR = crate::BitReader; +pub type STPSE_R = crate::BitReader; #[doc = "Field `STPSE` writer - Stop trigger interrupt enable"] -pub type StpseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STPSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STDE` reader - Shadow transfer done interrupt enable"] -pub type StdeR = crate::BitReader; +pub type STDE_R = crate::BitReader; #[doc = "Field `STDE` writer - Shadow transfer done interrupt enable"] -pub type StdeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STDE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CRSE` reader - Comparator rise interrupt enable"] -pub type CrseR = crate::BitReader; +pub type CRSE_R = crate::BitReader; #[doc = "Field `CRSE` writer - Comparator rise interrupt enable"] -pub type CrseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CRSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CFSE` reader - Comparator fall interrupt enable"] -pub type CfseR = crate::BitReader; +pub type CFSE_R = crate::BitReader; #[doc = "Field `CFSE` writer - Comparator fall interrupt enable"] -pub type CfseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CFSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSEE` reader - Clamped state interrupt enable"] -pub type CseeR = crate::BitReader; +pub type CSEE_R = crate::BitReader; #[doc = "Field `CSEE` writer - Clamped state interrupt enable"] -pub type CseeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSEE_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable"] #[inline(always)] - pub fn vls1e(&self) -> Vls1eR { - Vls1eR::new((self.bits & 1) != 0) + pub fn vls1e(&self) -> VLS1E_R { + VLS1E_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable"] #[inline(always)] - pub fn vls2e(&self) -> Vls2eR { - Vls2eR::new(((self.bits >> 1) & 1) != 0) + pub fn vls2e(&self) -> VLS2E_R { + VLS2E_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Conversion trigger interrupt enable"] #[inline(always)] - pub fn trgse(&self) -> TrgseR { - TrgseR::new(((self.bits >> 2) & 1) != 0) + pub fn trgse(&self) -> TRGSE_R { + TRGSE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Start trigger interrupt enable"] #[inline(always)] - pub fn strse(&self) -> StrseR { - StrseR::new(((self.bits >> 3) & 1) != 0) + pub fn strse(&self) -> STRSE_R { + STRSE_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Stop trigger interrupt enable"] #[inline(always)] - pub fn stpse(&self) -> StpseR { - StpseR::new(((self.bits >> 4) & 1) != 0) + pub fn stpse(&self) -> STPSE_R { + STPSE_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Shadow transfer done interrupt enable"] #[inline(always)] - pub fn stde(&self) -> StdeR { - StdeR::new(((self.bits >> 5) & 1) != 0) + pub fn stde(&self) -> STDE_R { + STDE_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Comparator rise interrupt enable"] #[inline(always)] - pub fn crse(&self) -> CrseR { - CrseR::new(((self.bits >> 6) & 1) != 0) + pub fn crse(&self) -> CRSE_R { + CRSE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Comparator fall interrupt enable"] #[inline(always)] - pub fn cfse(&self) -> CfseR { - CfseR::new(((self.bits >> 7) & 1) != 0) + pub fn cfse(&self) -> CFSE_R { + CFSE_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Clamped state interrupt enable"] #[inline(always)] - pub fn csee(&self) -> CseeR { - CseeR::new(((self.bits >> 8) & 1) != 0) + pub fn csee(&self) -> CSEE_R { + CSEE_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt enable"] #[inline(always)] #[must_use] - pub fn vls1e(&mut self) -> Vls1eW { - Vls1eW::new(self, 0) + pub fn vls1e(&mut self) -> VLS1E_W { + VLS1E_W::new(self, 0) } #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt enable"] #[inline(always)] #[must_use] - pub fn vls2e(&mut self) -> Vls2eW { - Vls2eW::new(self, 1) + pub fn vls2e(&mut self) -> VLS2E_W { + VLS2E_W::new(self, 1) } #[doc = "Bit 2 - Conversion trigger interrupt enable"] #[inline(always)] #[must_use] - pub fn trgse(&mut self) -> TrgseW { - TrgseW::new(self, 2) + pub fn trgse(&mut self) -> TRGSE_W { + TRGSE_W::new(self, 2) } #[doc = "Bit 3 - Start trigger interrupt enable"] #[inline(always)] #[must_use] - pub fn strse(&mut self) -> StrseW { - StrseW::new(self, 3) + pub fn strse(&mut self) -> STRSE_W { + STRSE_W::new(self, 3) } #[doc = "Bit 4 - Stop trigger interrupt enable"] #[inline(always)] #[must_use] - pub fn stpse(&mut self) -> StpseW { - StpseW::new(self, 4) + pub fn stpse(&mut self) -> STPSE_W { + STPSE_W::new(self, 4) } #[doc = "Bit 5 - Shadow transfer done interrupt enable"] #[inline(always)] #[must_use] - pub fn stde(&mut self) -> StdeW { - StdeW::new(self, 5) + pub fn stde(&mut self) -> STDE_W { + STDE_W::new(self, 5) } #[doc = "Bit 6 - Comparator rise interrupt enable"] #[inline(always)] #[must_use] - pub fn crse(&mut self) -> CrseW { - CrseW::new(self, 6) + pub fn crse(&mut self) -> CRSE_W { + CRSE_W::new(self, 6) } #[doc = "Bit 7 - Comparator fall interrupt enable"] #[inline(always)] #[must_use] - pub fn cfse(&mut self) -> CfseW { - CfseW::new(self, 7) + pub fn cfse(&mut self) -> CFSE_W { + CFSE_W::new(self, 7) } #[doc = "Bit 8 - Clamped state interrupt enable"] #[inline(always)] #[must_use] - pub fn csee(&mut self) -> CseeW { - CseeW::new(self, 8) + pub fn csee(&mut self) -> CSEE_W { + CSEE_W::new(self, 8) } } #[doc = "Service request enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sre::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sre::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SreSpec; -impl crate::RegisterSpec for SreSpec { +pub struct SRE_SPEC; +impl crate::RegisterSpec for SRE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sre::R`](R) reader structure"] -impl crate::Readable for SreSpec {} +impl crate::Readable for SRE_SPEC {} #[doc = "`write(|w| ..)` method takes [`sre::W`](W) writer structure"] -impl crate::Writable for SreSpec { +impl crate::Writable for SRE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRE to value 0"] -impl crate::Resettable for SreSpec { +impl crate::Resettable for SRE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/srs.rs b/src/hrpwm0_csg0/srs.rs index f97b0292..9e8ef2b8 100644 --- a/src/hrpwm0_csg0/srs.rs +++ b/src/hrpwm0_csg0/srs.rs @@ -1,68 +1,68 @@ #[doc = "Register `SRS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Vls1s { +pub enum VLS1S_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Vls1s) -> Self { + fn from(variant: VLS1S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vls1s { +impl crate::FieldSpec for VLS1S_A { type Ux = u8; } -impl crate::IsEnum for Vls1s {} +impl crate::IsEnum for VLS1S_A {} #[doc = "Field `VLS1S` reader - Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection"] -pub type Vls1sR = crate::FieldReader; -impl Vls1sR { +pub type VLS1S_R = crate::FieldReader; +impl VLS1S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vls1s { + pub const fn variant(&self) -> VLS1S_A { match self.bits { - 0 => Vls1s::Value1, - 1 => Vls1s::Value2, - 2 => Vls1s::Value3, - 3 => Vls1s::Value4, + 0 => VLS1S_A::VALUE1, + 1 => VLS1S_A::VALUE2, + 2 => VLS1S_A::VALUE3, + 3 => VLS1S_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vls1s::Value1 + *self == VLS1S_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vls1s::Value2 + *self == VLS1S_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Vls1s::Value3 + *self == VLS1S_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Vls1s::Value4 + *self == VLS1S_A::VALUE4 } } #[doc = "Field `VLS1S` writer - Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection"] -pub type Vls1sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Vls1s, crate::Safe>; -impl<'a, REG> Vls1sW<'a, REG> +pub type VLS1S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, VLS1S_A, crate::Safe>; +impl<'a, REG> VLS1S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vls1s::Value1) + self.variant(VLS1S_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vls1s::Value2) + self.variant(VLS1S_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Vls1s::Value3) + self.variant(VLS1S_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Vls1s::Value4) + self.variant(VLS1S_A::VALUE4) } } #[doc = "Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Vls2s { +pub enum VLS2S_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Vls2s) -> Self { + fn from(variant: VLS2S_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vls2s { +impl crate::FieldSpec for VLS2S_A { type Ux = u8; } -impl crate::IsEnum for Vls2s {} +impl crate::IsEnum for VLS2S_A {} #[doc = "Field `VLS2S` reader - Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection"] -pub type Vls2sR = crate::FieldReader; -impl Vls2sR { +pub type VLS2S_R = crate::FieldReader; +impl VLS2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vls2s { + pub const fn variant(&self) -> VLS2S_A { match self.bits { - 0 => Vls2s::Value1, - 1 => Vls2s::Value2, - 2 => Vls2s::Value3, - 3 => Vls2s::Value4, + 0 => VLS2S_A::VALUE1, + 1 => VLS2S_A::VALUE2, + 2 => VLS2S_A::VALUE3, + 3 => VLS2S_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vls2s::Value1 + *self == VLS2S_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vls2s::Value2 + *self == VLS2S_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Vls2s::Value3 + *self == VLS2S_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Vls2s::Value4 + *self == VLS2S_A::VALUE4 } } #[doc = "Field `VLS2S` writer - Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection"] -pub type Vls2sW<'a, REG> = crate::FieldWriter<'a, REG, 2, Vls2s, crate::Safe>; -impl<'a, REG> Vls2sW<'a, REG> +pub type VLS2S_W<'a, REG> = crate::FieldWriter<'a, REG, 2, VLS2S_A, crate::Safe>; +impl<'a, REG> VLS2S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vls2s::Value1) + self.variant(VLS2S_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vls2s::Value2) + self.variant(VLS2S_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Vls2s::Value3) + self.variant(VLS2S_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Vls2s::Value4) + self.variant(VLS2S_A::VALUE4) } } #[doc = "Conversion trigger interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trls { +pub enum TRLS_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trls) -> Self { + fn from(variant: TRLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trls { +impl crate::FieldSpec for TRLS_A { type Ux = u8; } -impl crate::IsEnum for Trls {} +impl crate::IsEnum for TRLS_A {} #[doc = "Field `TRLS` reader - Conversion trigger interrupt line selection"] -pub type TrlsR = crate::FieldReader; -impl TrlsR { +pub type TRLS_R = crate::FieldReader; +impl TRLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trls { + pub const fn variant(&self) -> TRLS_A { match self.bits { - 0 => Trls::Value1, - 1 => Trls::Value2, - 2 => Trls::Value3, - 3 => Trls::Value4, + 0 => TRLS_A::VALUE1, + 1 => TRLS_A::VALUE2, + 2 => TRLS_A::VALUE3, + 3 => TRLS_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trls::Value1 + *self == TRLS_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trls::Value2 + *self == TRLS_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trls::Value3 + *self == TRLS_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Trls::Value4 + *self == TRLS_A::VALUE4 } } #[doc = "Field `TRLS` writer - Conversion trigger interrupt line selection"] -pub type TrlsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trls, crate::Safe>; -impl<'a, REG> TrlsW<'a, REG> +pub type TRLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRLS_A, crate::Safe>; +impl<'a, REG> TRLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trls::Value1) + self.variant(TRLS_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trls::Value2) + self.variant(TRLS_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trls::Value3) + self.variant(TRLS_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Trls::Value4) + self.variant(TRLS_A::VALUE4) } } #[doc = "Start/Stop trigger interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ssls { +pub enum SSLS_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ssls) -> Self { + fn from(variant: SSLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ssls { +impl crate::FieldSpec for SSLS_A { type Ux = u8; } -impl crate::IsEnum for Ssls {} +impl crate::IsEnum for SSLS_A {} #[doc = "Field `SSLS` reader - Start/Stop trigger interrupt line selection"] -pub type SslsR = crate::FieldReader; -impl SslsR { +pub type SSLS_R = crate::FieldReader; +impl SSLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ssls { + pub const fn variant(&self) -> SSLS_A { match self.bits { - 0 => Ssls::Value1, - 1 => Ssls::Value2, - 2 => Ssls::Value3, - 3 => Ssls::Value4, + 0 => SSLS_A::VALUE1, + 1 => SSLS_A::VALUE2, + 2 => SSLS_A::VALUE3, + 3 => SSLS_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ssls::Value1 + *self == SSLS_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ssls::Value2 + *self == SSLS_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ssls::Value3 + *self == SSLS_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ssls::Value4 + *self == SSLS_A::VALUE4 } } #[doc = "Field `SSLS` writer - Start/Stop trigger interrupt line selection"] -pub type SslsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ssls, crate::Safe>; -impl<'a, REG> SslsW<'a, REG> +pub type SSLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SSLS_A, crate::Safe>; +impl<'a, REG> SSLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ssls::Value1) + self.variant(SSLS_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ssls::Value2) + self.variant(SSLS_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ssls::Value3) + self.variant(SSLS_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ssls::Value4) + self.variant(SSLS_A::VALUE4) } } #[doc = "Shadow transfer done interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stls { +pub enum STLS_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stls) -> Self { + fn from(variant: STLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stls { +impl crate::FieldSpec for STLS_A { type Ux = u8; } -impl crate::IsEnum for Stls {} +impl crate::IsEnum for STLS_A {} #[doc = "Field `STLS` reader - Shadow transfer done interrupt line selection"] -pub type StlsR = crate::FieldReader; -impl StlsR { +pub type STLS_R = crate::FieldReader; +impl STLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stls { + pub const fn variant(&self) -> STLS_A { match self.bits { - 0 => Stls::Value1, - 1 => Stls::Value2, - 2 => Stls::Value3, - 3 => Stls::Value4, + 0 => STLS_A::VALUE1, + 1 => STLS_A::VALUE2, + 2 => STLS_A::VALUE3, + 3 => STLS_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stls::Value1 + *self == STLS_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stls::Value2 + *self == STLS_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stls::Value3 + *self == STLS_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stls::Value4 + *self == STLS_A::VALUE4 } } #[doc = "Field `STLS` writer - Shadow transfer done interrupt line selection"] -pub type StlsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stls, crate::Safe>; -impl<'a, REG> StlsW<'a, REG> +pub type STLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STLS_A, crate::Safe>; +impl<'a, REG> STLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stls::Value1) + self.variant(STLS_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stls::Value2) + self.variant(STLS_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stls::Value3) + self.variant(STLS_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stls::Value4) + self.variant(STLS_A::VALUE4) } } #[doc = "Comparator rise/fall interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Crfls { +pub enum CRFLS_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Crfls) -> Self { + fn from(variant: CRFLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Crfls { +impl crate::FieldSpec for CRFLS_A { type Ux = u8; } -impl crate::IsEnum for Crfls {} +impl crate::IsEnum for CRFLS_A {} #[doc = "Field `CRFLS` reader - Comparator rise/fall interrupt line selection"] -pub type CrflsR = crate::FieldReader; -impl CrflsR { +pub type CRFLS_R = crate::FieldReader; +impl CRFLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Crfls { + pub const fn variant(&self) -> CRFLS_A { match self.bits { - 0 => Crfls::Value1, - 1 => Crfls::Value2, - 2 => Crfls::Value3, - 3 => Crfls::Value4, + 0 => CRFLS_A::VALUE1, + 1 => CRFLS_A::VALUE2, + 2 => CRFLS_A::VALUE3, + 3 => CRFLS_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Crfls::Value1 + *self == CRFLS_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Crfls::Value2 + *self == CRFLS_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Crfls::Value3 + *self == CRFLS_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Crfls::Value4 + *self == CRFLS_A::VALUE4 } } #[doc = "Field `CRFLS` writer - Comparator rise/fall interrupt line selection"] -pub type CrflsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Crfls, crate::Safe>; -impl<'a, REG> CrflsW<'a, REG> +pub type CRFLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CRFLS_A, crate::Safe>; +impl<'a, REG> CRFLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,85 +500,85 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crfls::Value1) + self.variant(CRFLS_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crfls::Value2) + self.variant(CRFLS_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Crfls::Value3) + self.variant(CRFLS_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Crfls::Value4) + self.variant(CRFLS_A::VALUE4) } } #[doc = "Comparator clamped state interrupt line selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Csls { +pub enum CSLS_A { #[doc = "0: CSGySR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CSGySR1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CSGySR2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CSGySR3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Csls) -> Self { + fn from(variant: CSLS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Csls { +impl crate::FieldSpec for CSLS_A { type Ux = u8; } -impl crate::IsEnum for Csls {} +impl crate::IsEnum for CSLS_A {} #[doc = "Field `CSLS` reader - Comparator clamped state interrupt line selection"] -pub type CslsR = crate::FieldReader; -impl CslsR { +pub type CSLS_R = crate::FieldReader; +impl CSLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Csls { + pub const fn variant(&self) -> CSLS_A { match self.bits { - 0 => Csls::Value1, - 1 => Csls::Value2, - 2 => Csls::Value3, - 3 => Csls::Value4, + 0 => CSLS_A::VALUE1, + 1 => CSLS_A::VALUE2, + 2 => CSLS_A::VALUE3, + 3 => CSLS_A::VALUE4, _ => unreachable!(), } } #[doc = "CSGySR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Csls::Value1 + *self == CSLS_A::VALUE1 } #[doc = "CSGySR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Csls::Value2 + *self == CSLS_A::VALUE2 } #[doc = "CSGySR2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Csls::Value3 + *self == CSLS_A::VALUE3 } #[doc = "CSGySR3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Csls::Value4 + *self == CSLS_A::VALUE4 } } #[doc = "Field `CSLS` writer - Comparator clamped state interrupt line selection"] -pub type CslsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Csls, crate::Safe>; -impl<'a, REG> CslsW<'a, REG> +pub type CSLS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CSLS_A, crate::Safe>; +impl<'a, REG> CSLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,119 +586,119 @@ where #[doc = "CSGySR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Csls::Value1) + self.variant(CSLS_A::VALUE1) } #[doc = "CSGySR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Csls::Value2) + self.variant(CSLS_A::VALUE2) } #[doc = "CSGySR2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Csls::Value3) + self.variant(CSLS_A::VALUE3) } #[doc = "CSGySR3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Csls::Value4) + self.variant(CSLS_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection"] #[inline(always)] - pub fn vls1s(&self) -> Vls1sR { - Vls1sR::new((self.bits & 3) as u8) + pub fn vls1s(&self) -> VLS1S_R { + VLS1S_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection"] #[inline(always)] - pub fn vls2s(&self) -> Vls2sR { - Vls2sR::new(((self.bits >> 2) & 3) as u8) + pub fn vls2s(&self) -> VLS2S_R { + VLS2S_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Conversion trigger interrupt line selection"] #[inline(always)] - pub fn trls(&self) -> TrlsR { - TrlsR::new(((self.bits >> 4) & 3) as u8) + pub fn trls(&self) -> TRLS_R { + TRLS_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Start/Stop trigger interrupt line selection"] #[inline(always)] - pub fn ssls(&self) -> SslsR { - SslsR::new(((self.bits >> 6) & 3) as u8) + pub fn ssls(&self) -> SSLS_R { + SSLS_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Shadow transfer done interrupt line selection"] #[inline(always)] - pub fn stls(&self) -> StlsR { - StlsR::new(((self.bits >> 8) & 3) as u8) + pub fn stls(&self) -> STLS_R { + STLS_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Comparator rise/fall interrupt line selection"] #[inline(always)] - pub fn crfls(&self) -> CrflsR { - CrflsR::new(((self.bits >> 10) & 3) as u8) + pub fn crfls(&self) -> CRFLS_R { + CRFLS_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Comparator clamped state interrupt line selection"] #[inline(always)] - pub fn csls(&self) -> CslsR { - CslsR::new(((self.bits >> 12) & 3) as u8) + pub fn csls(&self) -> CSLS_R { + CSLS_R::new(((self.bits >> 12) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Value switch from CSGyDSV1 to CSGyDSV2 interrupt line selection"] #[inline(always)] #[must_use] - pub fn vls1s(&mut self) -> Vls1sW { - Vls1sW::new(self, 0) + pub fn vls1s(&mut self) -> VLS1S_W { + VLS1S_W::new(self, 0) } #[doc = "Bits 2:3 - Value switch from CSGyDSV2 to CSGyDSV1 interrupt line selection"] #[inline(always)] #[must_use] - pub fn vls2s(&mut self) -> Vls2sW { - Vls2sW::new(self, 2) + pub fn vls2s(&mut self) -> VLS2S_W { + VLS2S_W::new(self, 2) } #[doc = "Bits 4:5 - Conversion trigger interrupt line selection"] #[inline(always)] #[must_use] - pub fn trls(&mut self) -> TrlsW { - TrlsW::new(self, 4) + pub fn trls(&mut self) -> TRLS_W { + TRLS_W::new(self, 4) } #[doc = "Bits 6:7 - Start/Stop trigger interrupt line selection"] #[inline(always)] #[must_use] - pub fn ssls(&mut self) -> SslsW { - SslsW::new(self, 6) + pub fn ssls(&mut self) -> SSLS_W { + SSLS_W::new(self, 6) } #[doc = "Bits 8:9 - Shadow transfer done interrupt line selection"] #[inline(always)] #[must_use] - pub fn stls(&mut self) -> StlsW { - StlsW::new(self, 8) + pub fn stls(&mut self) -> STLS_W { + STLS_W::new(self, 8) } #[doc = "Bits 10:11 - Comparator rise/fall interrupt line selection"] #[inline(always)] #[must_use] - pub fn crfls(&mut self) -> CrflsW { - CrflsW::new(self, 10) + pub fn crfls(&mut self) -> CRFLS_W { + CRFLS_W::new(self, 10) } #[doc = "Bits 12:13 - Comparator clamped state interrupt line selection"] #[inline(always)] #[must_use] - pub fn csls(&mut self) -> CslsW { - CslsW::new(self, 12) + pub fn csls(&mut self) -> CSLS_W { + CSLS_W::new(self, 12) } } #[doc = "Service request line selector\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrsSpec; -impl crate::RegisterSpec for SrsSpec { +pub struct SRS_SPEC; +impl crate::RegisterSpec for SRS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srs::R`](R) reader structure"] -impl crate::Readable for SrsSpec {} +impl crate::Readable for SRS_SPEC {} #[doc = "`write(|w| ..)` method takes [`srs::W`](W) writer structure"] -impl crate::Writable for SrsSpec { +impl crate::Writable for SRS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRS to value 0"] -impl crate::Resettable for SrsSpec { +impl crate::Resettable for SRS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/swc.rs b/src/hrpwm0_csg0/swc.rs index 3eca57ab..3c87b30c 100644 --- a/src/hrpwm0_csg0/swc.rs +++ b/src/hrpwm0_csg0/swc.rs @@ -1,91 +1,91 @@ #[doc = "Register `SWC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CVLS1` writer - Value switch from CSGyDSV1 to CSGyDSV2 status clear"] -pub type Cvls1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CVLS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CVLS2` writer - Value switch from CSGyDSV2 to CSGyDSV1 status clear"] -pub type Cvls2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CVLS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTRGS` writer - Conversion trigger status clear"] -pub type CtrgsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTRGS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSTRS` writer - Start trigger status clear"] -pub type CstrsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSTRS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSTPS` writer - Stop trigger status clear"] -pub type CstpsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSTPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSTD` writer - Shadow transfer status clear"] -pub type CstdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCRS` writer - Comparator rise status clear"] -pub type CcrsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CCRS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCFS` writer - Comparator fall status clear"] -pub type CcfsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CCFS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CCSS` writer - Comparator clamped status clear"] -pub type CcssW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CCSS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 status clear"] #[inline(always)] #[must_use] - pub fn cvls1(&mut self) -> Cvls1W { - Cvls1W::new(self, 0) + pub fn cvls1(&mut self) -> CVLS1_W { + CVLS1_W::new(self, 0) } #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 status clear"] #[inline(always)] #[must_use] - pub fn cvls2(&mut self) -> Cvls2W { - Cvls2W::new(self, 1) + pub fn cvls2(&mut self) -> CVLS2_W { + CVLS2_W::new(self, 1) } #[doc = "Bit 2 - Conversion trigger status clear"] #[inline(always)] #[must_use] - pub fn ctrgs(&mut self) -> CtrgsW { - CtrgsW::new(self, 2) + pub fn ctrgs(&mut self) -> CTRGS_W { + CTRGS_W::new(self, 2) } #[doc = "Bit 3 - Start trigger status clear"] #[inline(always)] #[must_use] - pub fn cstrs(&mut self) -> CstrsW { - CstrsW::new(self, 3) + pub fn cstrs(&mut self) -> CSTRS_W { + CSTRS_W::new(self, 3) } #[doc = "Bit 4 - Stop trigger status clear"] #[inline(always)] #[must_use] - pub fn cstps(&mut self) -> CstpsW { - CstpsW::new(self, 4) + pub fn cstps(&mut self) -> CSTPS_W { + CSTPS_W::new(self, 4) } #[doc = "Bit 5 - Shadow transfer status clear"] #[inline(always)] #[must_use] - pub fn cstd(&mut self) -> CstdW { - CstdW::new(self, 5) + pub fn cstd(&mut self) -> CSTD_W { + CSTD_W::new(self, 5) } #[doc = "Bit 6 - Comparator rise status clear"] #[inline(always)] #[must_use] - pub fn ccrs(&mut self) -> CcrsW { - CcrsW::new(self, 6) + pub fn ccrs(&mut self) -> CCRS_W { + CCRS_W::new(self, 6) } #[doc = "Bit 7 - Comparator fall status clear"] #[inline(always)] #[must_use] - pub fn ccfs(&mut self) -> CcfsW { - CcfsW::new(self, 7) + pub fn ccfs(&mut self) -> CCFS_W { + CCFS_W::new(self, 7) } #[doc = "Bit 8 - Comparator clamped status clear"] #[inline(always)] #[must_use] - pub fn ccss(&mut self) -> CcssW { - CcssW::new(self, 8) + pub fn ccss(&mut self) -> CCSS_W { + CCSS_W::new(self, 8) } } #[doc = "Service request SW clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwcSpec; -impl crate::RegisterSpec for SwcSpec { +pub struct SWC_SPEC; +impl crate::RegisterSpec for SWC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`swc::W`](W) writer structure"] -impl crate::Writable for SwcSpec { +impl crate::Writable for SWC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWC to value 0"] -impl crate::Resettable for SwcSpec { +impl crate::Resettable for SWC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_csg0/sws.rs b/src/hrpwm0_csg0/sws.rs index c6fe2ca0..c2052995 100644 --- a/src/hrpwm0_csg0/sws.rs +++ b/src/hrpwm0_csg0/sws.rs @@ -1,91 +1,91 @@ #[doc = "Register `SWS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SVLS1` writer - Value switch from CSGyDSV1 to CSGyDSV2 status set"] -pub type Svls1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SVLS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SVLS2` writer - Value switch from CSGyDSV2 to CSGyDSV1 status set"] -pub type Svls2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type SVLS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STRGS` writer - Conversion trigger status set"] -pub type StrgsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STRGS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTRS` writer - Start trigger status set"] -pub type SstrsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SSTRS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTPS` writer - Stop trigger status set"] -pub type SstpsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SSTPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SSTD` writer - Shadow transfer status set"] -pub type SstdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SSTD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCRS` writer - Comparator rise status set"] -pub type ScrsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCRS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCFS` writer - Comparator fall status set"] -pub type ScfsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCFS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCSS` writer - Comparator clamped state status set"] -pub type ScssW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCSS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Value switch from CSGyDSV1 to CSGyDSV2 status set"] #[inline(always)] #[must_use] - pub fn svls1(&mut self) -> Svls1W { - Svls1W::new(self, 0) + pub fn svls1(&mut self) -> SVLS1_W { + SVLS1_W::new(self, 0) } #[doc = "Bit 1 - Value switch from CSGyDSV2 to CSGyDSV1 status set"] #[inline(always)] #[must_use] - pub fn svls2(&mut self) -> Svls2W { - Svls2W::new(self, 1) + pub fn svls2(&mut self) -> SVLS2_W { + SVLS2_W::new(self, 1) } #[doc = "Bit 2 - Conversion trigger status set"] #[inline(always)] #[must_use] - pub fn strgs(&mut self) -> StrgsW { - StrgsW::new(self, 2) + pub fn strgs(&mut self) -> STRGS_W { + STRGS_W::new(self, 2) } #[doc = "Bit 3 - Start trigger status set"] #[inline(always)] #[must_use] - pub fn sstrs(&mut self) -> SstrsW { - SstrsW::new(self, 3) + pub fn sstrs(&mut self) -> SSTRS_W { + SSTRS_W::new(self, 3) } #[doc = "Bit 4 - Stop trigger status set"] #[inline(always)] #[must_use] - pub fn sstps(&mut self) -> SstpsW { - SstpsW::new(self, 4) + pub fn sstps(&mut self) -> SSTPS_W { + SSTPS_W::new(self, 4) } #[doc = "Bit 5 - Shadow transfer status set"] #[inline(always)] #[must_use] - pub fn sstd(&mut self) -> SstdW { - SstdW::new(self, 5) + pub fn sstd(&mut self) -> SSTD_W { + SSTD_W::new(self, 5) } #[doc = "Bit 6 - Comparator rise status set"] #[inline(always)] #[must_use] - pub fn scrs(&mut self) -> ScrsW { - ScrsW::new(self, 6) + pub fn scrs(&mut self) -> SCRS_W { + SCRS_W::new(self, 6) } #[doc = "Bit 7 - Comparator fall status set"] #[inline(always)] #[must_use] - pub fn scfs(&mut self) -> ScfsW { - ScfsW::new(self, 7) + pub fn scfs(&mut self) -> SCFS_W { + SCFS_W::new(self, 7) } #[doc = "Bit 8 - Comparator clamped state status set"] #[inline(always)] #[must_use] - pub fn scss(&mut self) -> ScssW { - ScssW::new(self, 8) + pub fn scss(&mut self) -> SCSS_W { + SCSS_W::new(self, 8) } } #[doc = "Service request SW set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sws::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SwsSpec; -impl crate::RegisterSpec for SwsSpec { +pub struct SWS_SPEC; +impl crate::RegisterSpec for SWS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sws::W`](W) writer structure"] -impl crate::Writable for SwsSpec { +impl crate::Writable for SWS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SWS to value 0"] -impl crate::Resettable for SwsSpec { +impl crate::Resettable for SWS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0.rs b/src/hrpwm0_hrc0.rs index 5dada844..210264db 100644 --- a/src/hrpwm0_hrc0.rs +++ b/src/hrpwm0_hrc0.rs @@ -1,174 +1,160 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - gc: Gc, - pl: Pl, - gsel: Gsel, - tsel: Tsel, - sc: Sc, - dcr: Dcr, - dcf: Dcf, - cr1: Cr1, - cr2: Cr2, - ssc: Ssc, - sdcr: Sdcr, - sdcf: Sdcf, - scr1: Scr1, - scr2: Scr2, + gc: GC, + pl: PL, + gsel: GSEL, + tsel: TSEL, + sc: SC, + dcr: DCR, + dcf: DCF, + cr1: CR1, + cr2: CR2, + ssc: SSC, + sdcr: SDCR, + sdcf: SDCF, + scr1: SCR1, + scr2: SCR2, } impl RegisterBlock { #[doc = "0x00 - HRC mode configuration"] #[inline(always)] - pub const fn gc(&self) -> &Gc { + pub const fn gc(&self) -> &GC { &self.gc } #[doc = "0x04 - HRC output passive level"] #[inline(always)] - pub const fn pl(&self) -> &Pl { + pub const fn pl(&self) -> &PL { &self.pl } #[doc = "0x08 - HRC global control selection"] #[inline(always)] - pub const fn gsel(&self) -> &Gsel { + pub const fn gsel(&self) -> &GSEL { &self.gsel } #[doc = "0x0c - HRC timer selection"] #[inline(always)] - pub const fn tsel(&self) -> &Tsel { + pub const fn tsel(&self) -> &TSEL { &self.tsel } #[doc = "0x10 - HRC current source for shadow"] #[inline(always)] - pub const fn sc(&self) -> &Sc { + pub const fn sc(&self) -> &SC { &self.sc } #[doc = "0x14 - HRC dead time rising value"] #[inline(always)] - pub const fn dcr(&self) -> &Dcr { + pub const fn dcr(&self) -> &DCR { &self.dcr } #[doc = "0x18 - HRC dead time falling value"] #[inline(always)] - pub const fn dcf(&self) -> &Dcf { + pub const fn dcf(&self) -> &DCF { &self.dcf } #[doc = "0x1c - HRC rising edge value"] #[inline(always)] - pub const fn cr1(&self) -> &Cr1 { + pub const fn cr1(&self) -> &CR1 { &self.cr1 } #[doc = "0x20 - HRC falling edge value"] #[inline(always)] - pub const fn cr2(&self) -> &Cr2 { + pub const fn cr2(&self) -> &CR2 { &self.cr2 } #[doc = "0x24 - HRC next source for shadow"] #[inline(always)] - pub const fn ssc(&self) -> &Ssc { + pub const fn ssc(&self) -> &SSC { &self.ssc } #[doc = "0x28 - HRC shadow dead time rising"] #[inline(always)] - pub const fn sdcr(&self) -> &Sdcr { + pub const fn sdcr(&self) -> &SDCR { &self.sdcr } #[doc = "0x2c - HRC shadow dead time falling"] #[inline(always)] - pub const fn sdcf(&self) -> &Sdcf { + pub const fn sdcf(&self) -> &SDCF { &self.sdcf } #[doc = "0x30 - HRC shadow rising edge value"] #[inline(always)] - pub const fn scr1(&self) -> &Scr1 { + pub const fn scr1(&self) -> &SCR1 { &self.scr1 } #[doc = "0x34 - HRC shadow falling edge value"] #[inline(always)] - pub const fn scr2(&self) -> &Scr2 { + pub const fn scr2(&self) -> &SCR2 { &self.scr2 } } #[doc = "GC (rw) register accessor: HRC mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gc`] module"] -#[doc(alias = "GC")] -pub type Gc = crate::Reg; +pub type GC = crate::Reg; #[doc = "HRC mode configuration"] pub mod gc; #[doc = "PL (rw) register accessor: HRC output passive level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pl`] module"] -#[doc(alias = "PL")] -pub type Pl = crate::Reg; +pub type PL = crate::Reg; #[doc = "HRC output passive level"] pub mod pl; #[doc = "GSEL (rw) register accessor: HRC global control selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gsel`] module"] -#[doc(alias = "GSEL")] -pub type Gsel = crate::Reg; +pub type GSEL = crate::Reg; #[doc = "HRC global control selection"] pub mod gsel; #[doc = "TSEL (rw) register accessor: HRC timer selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsel`] module"] -#[doc(alias = "TSEL")] -pub type Tsel = crate::Reg; +pub type TSEL = crate::Reg; #[doc = "HRC timer selection"] pub mod tsel; #[doc = "SC (r) register accessor: HRC current source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sc`] module"] -#[doc(alias = "SC")] -pub type Sc = crate::Reg; +pub type SC = crate::Reg; #[doc = "HRC current source for shadow"] pub mod sc; #[doc = "DCR (r) register accessor: HRC dead time rising value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcr`] module"] -#[doc(alias = "DCR")] -pub type Dcr = crate::Reg; +pub type DCR = crate::Reg; #[doc = "HRC dead time rising value"] pub mod dcr; #[doc = "DCF (r) register accessor: HRC dead time falling value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcf`] module"] -#[doc(alias = "DCF")] -pub type Dcf = crate::Reg; +pub type DCF = crate::Reg; #[doc = "HRC dead time falling value"] pub mod dcf; #[doc = "CR1 (r) register accessor: HRC rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr1`] module"] -#[doc(alias = "CR1")] -pub type Cr1 = crate::Reg; +pub type CR1 = crate::Reg; #[doc = "HRC rising edge value"] pub mod cr1; #[doc = "CR2 (r) register accessor: HRC falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr2`] module"] -#[doc(alias = "CR2")] -pub type Cr2 = crate::Reg; +pub type CR2 = crate::Reg; #[doc = "HRC falling edge value"] pub mod cr2; #[doc = "SSC (rw) register accessor: HRC next source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ssc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ssc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ssc`] module"] -#[doc(alias = "SSC")] -pub type Ssc = crate::Reg; +pub type SSC = crate::Reg; #[doc = "HRC next source for shadow"] pub mod ssc; #[doc = "SDCR (rw) register accessor: HRC shadow dead time rising\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcr`] module"] -#[doc(alias = "SDCR")] -pub type Sdcr = crate::Reg; +pub type SDCR = crate::Reg; #[doc = "HRC shadow dead time rising"] pub mod sdcr; #[doc = "SDCF (rw) register accessor: HRC shadow dead time falling\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdcf`] module"] -#[doc(alias = "SDCF")] -pub type Sdcf = crate::Reg; +pub type SDCF = crate::Reg; #[doc = "HRC shadow dead time falling"] pub mod sdcf; #[doc = "SCR1 (rw) register accessor: HRC shadow rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr1`] module"] -#[doc(alias = "SCR1")] -pub type Scr1 = crate::Reg; +pub type SCR1 = crate::Reg; #[doc = "HRC shadow rising edge value"] pub mod scr1; #[doc = "SCR2 (rw) register accessor: HRC shadow falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr2`] module"] -#[doc(alias = "SCR2")] -pub type Scr2 = crate::Reg; +pub type SCR2 = crate::Reg; #[doc = "HRC shadow falling edge value"] pub mod scr2; diff --git a/src/hrpwm0_hrc0/cr1.rs b/src/hrpwm0_hrc0/cr1.rs index b472ca04..531b1093 100644 --- a/src/hrpwm0_hrc0/cr1.rs +++ b/src/hrpwm0_hrc0/cr1.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR1` reader - High resolution rising edge value"] -pub type Cr1R = crate::FieldReader; +pub type CR1_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - High resolution rising edge value"] #[inline(always)] - pub fn cr1(&self) -> Cr1R { - Cr1R::new((self.bits & 0xff) as u8) + pub fn cr1(&self) -> CR1_R { + CR1_R::new((self.bits & 0xff) as u8) } } #[doc = "HRC rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr1Spec; -impl crate::RegisterSpec for Cr1Spec { +pub struct CR1_SPEC; +impl crate::RegisterSpec for CR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr1::R`](R) reader structure"] -impl crate::Readable for Cr1Spec {} +impl crate::Readable for CR1_SPEC {} #[doc = "`reset()` method sets CR1 to value 0"] -impl crate::Resettable for Cr1Spec { +impl crate::Resettable for CR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/cr2.rs b/src/hrpwm0_hrc0/cr2.rs index b88a1782..2659afd1 100644 --- a/src/hrpwm0_hrc0/cr2.rs +++ b/src/hrpwm0_hrc0/cr2.rs @@ -1,22 +1,22 @@ #[doc = "Register `CR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `CR2` reader - High resolution falling edge value"] -pub type Cr2R = crate::FieldReader; +pub type CR2_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - High resolution falling edge value"] #[inline(always)] - pub fn cr2(&self) -> Cr2R { - Cr2R::new((self.bits & 0xff) as u8) + pub fn cr2(&self) -> CR2_R { + CR2_R::new((self.bits & 0xff) as u8) } } #[doc = "HRC falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cr2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cr2Spec; -impl crate::RegisterSpec for Cr2Spec { +pub struct CR2_SPEC; +impl crate::RegisterSpec for CR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cr2::R`](R) reader structure"] -impl crate::Readable for Cr2Spec {} +impl crate::Readable for CR2_SPEC {} #[doc = "`reset()` method sets CR2 to value 0"] -impl crate::Resettable for Cr2Spec { +impl crate::Resettable for CR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/dcf.rs b/src/hrpwm0_hrc0/dcf.rs index 66a11677..0ebf652e 100644 --- a/src/hrpwm0_hrc0/dcf.rs +++ b/src/hrpwm0_hrc0/dcf.rs @@ -1,22 +1,22 @@ #[doc = "Register `DCF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DTFV` reader - Dead time falling value"] -pub type DtfvR = crate::FieldReader; +pub type DTFV_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Dead time falling value"] #[inline(always)] - pub fn dtfv(&self) -> DtfvR { - DtfvR::new((self.bits & 0xffff) as u16) + pub fn dtfv(&self) -> DTFV_R { + DTFV_R::new((self.bits & 0xffff) as u16) } } #[doc = "HRC dead time falling value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DcfSpec; -impl crate::RegisterSpec for DcfSpec { +pub struct DCF_SPEC; +impl crate::RegisterSpec for DCF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dcf::R`](R) reader structure"] -impl crate::Readable for DcfSpec {} +impl crate::Readable for DCF_SPEC {} #[doc = "`reset()` method sets DCF to value 0x01"] -impl crate::Resettable for DcfSpec { +impl crate::Resettable for DCF_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/hrpwm0_hrc0/dcr.rs b/src/hrpwm0_hrc0/dcr.rs index 5e8cd1cc..c3a2350c 100644 --- a/src/hrpwm0_hrc0/dcr.rs +++ b/src/hrpwm0_hrc0/dcr.rs @@ -1,22 +1,22 @@ #[doc = "Register `DCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DTRV` reader - Dead time rising value"] -pub type DtrvR = crate::FieldReader; +pub type DTRV_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Dead time rising value"] #[inline(always)] - pub fn dtrv(&self) -> DtrvR { - DtrvR::new((self.bits & 0xffff) as u16) + pub fn dtrv(&self) -> DTRV_R { + DTRV_R::new((self.bits & 0xffff) as u16) } } #[doc = "HRC dead time rising value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DcrSpec; -impl crate::RegisterSpec for DcrSpec { +pub struct DCR_SPEC; +impl crate::RegisterSpec for DCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dcr::R`](R) reader structure"] -impl crate::Readable for DcrSpec {} +impl crate::Readable for DCR_SPEC {} #[doc = "`reset()` method sets DCR to value 0x01"] -impl crate::Resettable for DcrSpec { +impl crate::Resettable for DCR_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/hrpwm0_hrc0/gc.rs b/src/hrpwm0_hrc0/gc.rs index 51c844d9..3c6f3fb0 100644 --- a/src/hrpwm0_hrc0/gc.rs +++ b/src/hrpwm0_hrc0/gc.rs @@ -1,68 +1,68 @@ #[doc = "Register `GC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "HRCy high resolution mode configuration for source selector 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hrm0 { +pub enum HRM0_A { #[doc = "0: Rising edge high resolution signal positioning enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Falling edge high resolution signal positioning enabled"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Both edges high resolution signal positioning is enabled"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: No high resolution positioning"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hrm0) -> Self { + fn from(variant: HRM0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hrm0 { +impl crate::FieldSpec for HRM0_A { type Ux = u8; } -impl crate::IsEnum for Hrm0 {} +impl crate::IsEnum for HRM0_A {} #[doc = "Field `HRM0` reader - HRCy high resolution mode configuration for source selector 0"] -pub type Hrm0R = crate::FieldReader; -impl Hrm0R { +pub type HRM0_R = crate::FieldReader; +impl HRM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrm0 { + pub const fn variant(&self) -> HRM0_A { match self.bits { - 0 => Hrm0::Value1, - 1 => Hrm0::Value2, - 2 => Hrm0::Value3, - 3 => Hrm0::Value4, + 0 => HRM0_A::VALUE1, + 1 => HRM0_A::VALUE2, + 2 => HRM0_A::VALUE3, + 3 => HRM0_A::VALUE4, _ => unreachable!(), } } #[doc = "Rising edge high resolution signal positioning enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrm0::Value1 + *self == HRM0_A::VALUE1 } #[doc = "Falling edge high resolution signal positioning enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrm0::Value2 + *self == HRM0_A::VALUE2 } #[doc = "Both edges high resolution signal positioning is enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hrm0::Value3 + *self == HRM0_A::VALUE3 } #[doc = "No high resolution positioning"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Hrm0::Value4 + *self == HRM0_A::VALUE4 } } #[doc = "Field `HRM0` writer - HRCy high resolution mode configuration for source selector 0"] -pub type Hrm0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hrm0, crate::Safe>; -impl<'a, REG> Hrm0W<'a, REG> +pub type HRM0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HRM0_A, crate::Safe>; +impl<'a, REG> HRM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Rising edge high resolution signal positioning enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrm0::Value1) + self.variant(HRM0_A::VALUE1) } #[doc = "Falling edge high resolution signal positioning enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrm0::Value2) + self.variant(HRM0_A::VALUE2) } #[doc = "Both edges high resolution signal positioning is enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hrm0::Value3) + self.variant(HRM0_A::VALUE3) } #[doc = "No high resolution positioning"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Hrm0::Value4) + self.variant(HRM0_A::VALUE4) } } #[doc = "HRCy high resolution mode configuration for source selector 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hrm1 { +pub enum HRM1_A { #[doc = "0: Rising edge high resolution signal positioning enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Falling edge high resolution signal positioning enabled"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Both edges high resolution signal positioning is enabled"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: No high resolution positioning"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hrm1) -> Self { + fn from(variant: HRM1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hrm1 { +impl crate::FieldSpec for HRM1_A { type Ux = u8; } -impl crate::IsEnum for Hrm1 {} +impl crate::IsEnum for HRM1_A {} #[doc = "Field `HRM1` reader - HRCy high resolution mode configuration for source selector 1"] -pub type Hrm1R = crate::FieldReader; -impl Hrm1R { +pub type HRM1_R = crate::FieldReader; +impl HRM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrm1 { + pub const fn variant(&self) -> HRM1_A { match self.bits { - 0 => Hrm1::Value1, - 1 => Hrm1::Value2, - 2 => Hrm1::Value3, - 3 => Hrm1::Value4, + 0 => HRM1_A::VALUE1, + 1 => HRM1_A::VALUE2, + 2 => HRM1_A::VALUE3, + 3 => HRM1_A::VALUE4, _ => unreachable!(), } } #[doc = "Rising edge high resolution signal positioning enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrm1::Value1 + *self == HRM1_A::VALUE1 } #[doc = "Falling edge high resolution signal positioning enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrm1::Value2 + *self == HRM1_A::VALUE2 } #[doc = "Both edges high resolution signal positioning is enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hrm1::Value3 + *self == HRM1_A::VALUE3 } #[doc = "No high resolution positioning"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Hrm1::Value4 + *self == HRM1_A::VALUE4 } } #[doc = "Field `HRM1` writer - HRCy high resolution mode configuration for source selector 1"] -pub type Hrm1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hrm1, crate::Safe>; -impl<'a, REG> Hrm1W<'a, REG> +pub type HRM1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HRM1_A, crate::Safe>; +impl<'a, REG> HRM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,576 +156,576 @@ where #[doc = "Rising edge high resolution signal positioning enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrm1::Value1) + self.variant(HRM1_A::VALUE1) } #[doc = "Falling edge high resolution signal positioning enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrm1::Value2) + self.variant(HRM1_A::VALUE2) } #[doc = "Both edges high resolution signal positioning is enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hrm1::Value3) + self.variant(HRM1_A::VALUE3) } #[doc = "No high resolution positioning"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Hrm1::Value4) + self.variant(HRM1_A::VALUE4) } } #[doc = "HRCy dead time enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dte { +pub enum DTE_A { #[doc = "0: Dead time insertion is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Dead time insertion is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dte) -> Self { + fn from(variant: DTE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTE` reader - HRCy dead time enable"] -pub type DteR = crate::BitReader; -impl DteR { +pub type DTE_R = crate::BitReader; +impl DTE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dte { + pub const fn variant(&self) -> DTE_A { match self.bits { - false => Dte::Value1, - true => Dte::Value2, + false => DTE_A::VALUE1, + true => DTE_A::VALUE2, } } #[doc = "Dead time insertion is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dte::Value1 + *self == DTE_A::VALUE1 } #[doc = "Dead time insertion is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dte::Value2 + *self == DTE_A::VALUE2 } } #[doc = "Field `DTE` writer - HRCy dead time enable"] -pub type DteW<'a, REG> = crate::BitWriter<'a, REG, Dte>; -impl<'a, REG> DteW<'a, REG> +pub type DTE_W<'a, REG> = crate::BitWriter<'a, REG, DTE_A>; +impl<'a, REG> DTE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Dead time insertion is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dte::Value1) + self.variant(DTE_A::VALUE1) } #[doc = "Dead time insertion is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dte::Value2) + self.variant(DTE_A::VALUE2) } } #[doc = "HRCy trap enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tr0e { +pub enum TR0E_A { #[doc = "0: Trap function for HRPWMx.HROUTy0 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap function for HRPWMx.HROUTy0 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tr0e) -> Self { + fn from(variant: TR0E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TR0E` reader - HRCy trap enable"] -pub type Tr0eR = crate::BitReader; -impl Tr0eR { +pub type TR0E_R = crate::BitReader; +impl TR0E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tr0e { + pub const fn variant(&self) -> TR0E_A { match self.bits { - false => Tr0e::Value1, - true => Tr0e::Value2, + false => TR0E_A::VALUE1, + true => TR0E_A::VALUE2, } } #[doc = "Trap function for HRPWMx.HROUTy0 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tr0e::Value1 + *self == TR0E_A::VALUE1 } #[doc = "Trap function for HRPWMx.HROUTy0 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tr0e::Value2 + *self == TR0E_A::VALUE2 } } #[doc = "Field `TR0E` writer - HRCy trap enable"] -pub type Tr0eW<'a, REG> = crate::BitWriter<'a, REG, Tr0e>; -impl<'a, REG> Tr0eW<'a, REG> +pub type TR0E_W<'a, REG> = crate::BitWriter<'a, REG, TR0E_A>; +impl<'a, REG> TR0E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function for HRPWMx.HROUTy0 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tr0e::Value1) + self.variant(TR0E_A::VALUE1) } #[doc = "Trap function for HRPWMx.HROUTy0 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tr0e::Value2) + self.variant(TR0E_A::VALUE2) } } #[doc = "HRCy complementary trap enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tr1e { +pub enum TR1E_A { #[doc = "0: Trap function for HRPWMx.HROUTy1 is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap function for HRPWMx.HROUTy1 is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tr1e) -> Self { + fn from(variant: TR1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TR1E` reader - HRCy complementary trap enable"] -pub type Tr1eR = crate::BitReader; -impl Tr1eR { +pub type TR1E_R = crate::BitReader; +impl TR1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tr1e { + pub const fn variant(&self) -> TR1E_A { match self.bits { - false => Tr1e::Value1, - true => Tr1e::Value2, + false => TR1E_A::VALUE1, + true => TR1E_A::VALUE2, } } #[doc = "Trap function for HRPWMx.HROUTy1 is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tr1e::Value1 + *self == TR1E_A::VALUE1 } #[doc = "Trap function for HRPWMx.HROUTy1 is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tr1e::Value2 + *self == TR1E_A::VALUE2 } } #[doc = "Field `TR1E` writer - HRCy complementary trap enable"] -pub type Tr1eW<'a, REG> = crate::BitWriter<'a, REG, Tr1e>; -impl<'a, REG> Tr1eW<'a, REG> +pub type TR1E_W<'a, REG> = crate::BitWriter<'a, REG, TR1E_A>; +impl<'a, REG> TR1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap function for HRPWMx.HROUTy1 is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tr1e::Value1) + self.variant(TR1E_A::VALUE1) } #[doc = "Trap function for HRPWMx.HROUTy1 is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tr1e::Value2) + self.variant(TR1E_A::VALUE2) } } #[doc = "HRCy shadow transfer configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stc { +pub enum STC_A { #[doc = "0: HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stc) -> Self { + fn from(variant: STC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STC` reader - HRCy shadow transfer configuration"] -pub type StcR = crate::BitReader; -impl StcR { +pub type STC_R = crate::BitReader; +impl STC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stc { + pub const fn variant(&self) -> STC_A { match self.bits { - false => Stc::Value1, - true => Stc::Value2, + false => STC_A::VALUE1, + true => STC_A::VALUE2, } } #[doc = "HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stc::Value1 + *self == STC_A::VALUE1 } #[doc = "HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stc::Value2 + *self == STC_A::VALUE2 } } #[doc = "Field `STC` writer - HRCy shadow transfer configuration"] -pub type StcW<'a, REG> = crate::BitWriter<'a, REG, Stc>; -impl<'a, REG> StcW<'a, REG> +pub type STC_W<'a, REG> = crate::BitWriter<'a, REG, STC_A>; +impl<'a, REG> STC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is not linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stc::Value1) + self.variant(STC_A::VALUE1) } #[doc = "HRCy shadow transfer enable for HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . values is linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stc::Value2) + self.variant(STC_A::VALUE2) } } #[doc = "HRCy dead time shadow transfer configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dstc { +pub enum DSTC_A { #[doc = "0: HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dstc) -> Self { + fn from(variant: DSTC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSTC` reader - HRCy dead time shadow transfer configuration"] -pub type DstcR = crate::BitReader; -impl DstcR { +pub type DSTC_R = crate::BitReader; +impl DSTC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dstc { + pub const fn variant(&self) -> DSTC_A { match self.bits { - false => Dstc::Value1, - true => Dstc::Value2, + false => DSTC_A::VALUE1, + true => DSTC_A::VALUE2, } } #[doc = "HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dstc::Value1 + *self == DSTC_A::VALUE1 } #[doc = "HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dstc::Value2 + *self == DSTC_A::VALUE2 } } #[doc = "Field `DSTC` writer - HRCy dead time shadow transfer configuration"] -pub type DstcW<'a, REG> = crate::BitWriter<'a, REG, Dstc>; -impl<'a, REG> DstcW<'a, REG> +pub type DSTC_W<'a, REG> = crate::BitWriter<'a, REG, DSTC_A>; +impl<'a, REG> DSTC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is not linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dstc::Value1) + self.variant(DSTC_A::VALUE1) } #[doc = "HRCy shadow transfer enable for HRCyDCRThis register holds the dead time value that is going to be inserted whenever a rising transition on the output latch is sensed. and HRCyDCFThis register holds the dead time value that is going to be inserted whenever a falling transition on the output latch is sensed. values is linked with the specific Capture/Compare Unit timer."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dstc::Value2) + self.variant(DSTC_A::VALUE2) } } #[doc = "HRPWMx.OUTy0 channel selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs0 { +pub enum OCS0_A { #[doc = "0: HRPWMx.OUTy0 is connected to the latch Q channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.OUTy0 is connected to the latch Qn channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs0) -> Self { + fn from(variant: OCS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS0` reader - HRPWMx.OUTy0 channel selector"] -pub type Ocs0R = crate::BitReader; -impl Ocs0R { +pub type OCS0_R = crate::BitReader; +impl OCS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs0 { + pub const fn variant(&self) -> OCS0_A { match self.bits { - false => Ocs0::Value1, - true => Ocs0::Value2, + false => OCS0_A::VALUE1, + true => OCS0_A::VALUE2, } } #[doc = "HRPWMx.OUTy0 is connected to the latch Q channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs0::Value1 + *self == OCS0_A::VALUE1 } #[doc = "HRPWMx.OUTy0 is connected to the latch Qn channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs0::Value2 + *self == OCS0_A::VALUE2 } } #[doc = "Field `OCS0` writer - HRPWMx.OUTy0 channel selector"] -pub type Ocs0W<'a, REG> = crate::BitWriter<'a, REG, Ocs0>; -impl<'a, REG> Ocs0W<'a, REG> +pub type OCS0_W<'a, REG> = crate::BitWriter<'a, REG, OCS0_A>; +impl<'a, REG> OCS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRPWMx.OUTy0 is connected to the latch Q channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs0::Value1) + self.variant(OCS0_A::VALUE1) } #[doc = "HRPWMx.OUTy0 is connected to the latch Qn channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs0::Value2) + self.variant(OCS0_A::VALUE2) } } #[doc = "HRPWMx.OUTy1 channel selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ocs1 { +pub enum OCS1_A { #[doc = "0: HRPWMx.OUTy1 is connected to the latch Qn channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.OUTy1 is connected to the latch Q channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ocs1) -> Self { + fn from(variant: OCS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OCS1` reader - HRPWMx.OUTy1 channel selector"] -pub type Ocs1R = crate::BitReader; -impl Ocs1R { +pub type OCS1_R = crate::BitReader; +impl OCS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ocs1 { + pub const fn variant(&self) -> OCS1_A { match self.bits { - false => Ocs1::Value1, - true => Ocs1::Value2, + false => OCS1_A::VALUE1, + true => OCS1_A::VALUE2, } } #[doc = "HRPWMx.OUTy1 is connected to the latch Qn channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ocs1::Value1 + *self == OCS1_A::VALUE1 } #[doc = "HRPWMx.OUTy1 is connected to the latch Q channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ocs1::Value2 + *self == OCS1_A::VALUE2 } } #[doc = "Field `OCS1` writer - HRPWMx.OUTy1 channel selector"] -pub type Ocs1W<'a, REG> = crate::BitWriter<'a, REG, Ocs1>; -impl<'a, REG> Ocs1W<'a, REG> +pub type OCS1_W<'a, REG> = crate::BitWriter<'a, REG, OCS1_A>; +impl<'a, REG> OCS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRPWMx.OUTy1 is connected to the latch Qn channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ocs1::Value1) + self.variant(OCS1_A::VALUE1) } #[doc = "HRPWMx.OUTy1 is connected to the latch Q channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ocs1::Value2) + self.variant(OCS1_A::VALUE2) } } #[doc = "Dead Time update trigger selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dtus { +pub enum DTUS_A { #[doc = "0: The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dtus) -> Self { + fn from(variant: DTUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTUS` reader - Dead Time update trigger selector"] -pub type DtusR = crate::BitReader; -impl DtusR { +pub type DTUS_R = crate::BitReader; +impl DTUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dtus { + pub const fn variant(&self) -> DTUS_A { match self.bits { - false => Dtus::Value1, - true => Dtus::Value2, + false => DTUS_A::VALUE1, + true => DTUS_A::VALUE2, } } #[doc = "The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dtus::Value1 + *self == DTUS_A::VALUE1 } #[doc = "The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dtus::Value2 + *self == DTUS_A::VALUE2 } } #[doc = "Field `DTUS` writer - Dead Time update trigger selector"] -pub type DtusW<'a, REG> = crate::BitWriter<'a, REG, Dtus>; -impl<'a, REG> DtusW<'a, REG> +pub type DTUS_W<'a, REG> = crate::BitWriter<'a, REG, DTUS_A>; +impl<'a, REG> DTUS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The update of the values is done with the trigger generated by the timers. This is the same trigger that is used to update the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, .."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dtus::Value1) + self.variant(DTUS_A::VALUE1) } #[doc = "The update of the dead time values is done when the dead time counter is not running, independently of the HRCyCR1This register holds the value for the rising edge high resolution signal placement. the update of this value should be done via the associated shadow register, . and HRCyCR2This register holds the value for the falling edge high resolution signal placement. the update of this value should be done via the associated shadow register, . registers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dtus::Value2) + self.variant(DTUS_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - HRCy high resolution mode configuration for source selector 0"] #[inline(always)] - pub fn hrm0(&self) -> Hrm0R { - Hrm0R::new((self.bits & 3) as u8) + pub fn hrm0(&self) -> HRM0_R { + HRM0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - HRCy high resolution mode configuration for source selector 1"] #[inline(always)] - pub fn hrm1(&self) -> Hrm1R { - Hrm1R::new(((self.bits >> 2) & 3) as u8) + pub fn hrm1(&self) -> HRM1_R { + HRM1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 8 - HRCy dead time enable"] #[inline(always)] - pub fn dte(&self) -> DteR { - DteR::new(((self.bits >> 8) & 1) != 0) + pub fn dte(&self) -> DTE_R { + DTE_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - HRCy trap enable"] #[inline(always)] - pub fn tr0e(&self) -> Tr0eR { - Tr0eR::new(((self.bits >> 9) & 1) != 0) + pub fn tr0e(&self) -> TR0E_R { + TR0E_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - HRCy complementary trap enable"] #[inline(always)] - pub fn tr1e(&self) -> Tr1eR { - Tr1eR::new(((self.bits >> 10) & 1) != 0) + pub fn tr1e(&self) -> TR1E_R { + TR1E_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - HRCy shadow transfer configuration"] #[inline(always)] - pub fn stc(&self) -> StcR { - StcR::new(((self.bits >> 11) & 1) != 0) + pub fn stc(&self) -> STC_R { + STC_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - HRCy dead time shadow transfer configuration"] #[inline(always)] - pub fn dstc(&self) -> DstcR { - DstcR::new(((self.bits >> 12) & 1) != 0) + pub fn dstc(&self) -> DSTC_R { + DSTC_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HRPWMx.OUTy0 channel selector"] #[inline(always)] - pub fn ocs0(&self) -> Ocs0R { - Ocs0R::new(((self.bits >> 13) & 1) != 0) + pub fn ocs0(&self) -> OCS0_R { + OCS0_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - HRPWMx.OUTy1 channel selector"] #[inline(always)] - pub fn ocs1(&self) -> Ocs1R { - Ocs1R::new(((self.bits >> 14) & 1) != 0) + pub fn ocs1(&self) -> OCS1_R { + OCS1_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 16 - Dead Time update trigger selector"] #[inline(always)] - pub fn dtus(&self) -> DtusR { - DtusR::new(((self.bits >> 16) & 1) != 0) + pub fn dtus(&self) -> DTUS_R { + DTUS_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - HRCy high resolution mode configuration for source selector 0"] #[inline(always)] #[must_use] - pub fn hrm0(&mut self) -> Hrm0W { - Hrm0W::new(self, 0) + pub fn hrm0(&mut self) -> HRM0_W { + HRM0_W::new(self, 0) } #[doc = "Bits 2:3 - HRCy high resolution mode configuration for source selector 1"] #[inline(always)] #[must_use] - pub fn hrm1(&mut self) -> Hrm1W { - Hrm1W::new(self, 2) + pub fn hrm1(&mut self) -> HRM1_W { + HRM1_W::new(self, 2) } #[doc = "Bit 8 - HRCy dead time enable"] #[inline(always)] #[must_use] - pub fn dte(&mut self) -> DteW { - DteW::new(self, 8) + pub fn dte(&mut self) -> DTE_W { + DTE_W::new(self, 8) } #[doc = "Bit 9 - HRCy trap enable"] #[inline(always)] #[must_use] - pub fn tr0e(&mut self) -> Tr0eW { - Tr0eW::new(self, 9) + pub fn tr0e(&mut self) -> TR0E_W { + TR0E_W::new(self, 9) } #[doc = "Bit 10 - HRCy complementary trap enable"] #[inline(always)] #[must_use] - pub fn tr1e(&mut self) -> Tr1eW { - Tr1eW::new(self, 10) + pub fn tr1e(&mut self) -> TR1E_W { + TR1E_W::new(self, 10) } #[doc = "Bit 11 - HRCy shadow transfer configuration"] #[inline(always)] #[must_use] - pub fn stc(&mut self) -> StcW { - StcW::new(self, 11) + pub fn stc(&mut self) -> STC_W { + STC_W::new(self, 11) } #[doc = "Bit 12 - HRCy dead time shadow transfer configuration"] #[inline(always)] #[must_use] - pub fn dstc(&mut self) -> DstcW { - DstcW::new(self, 12) + pub fn dstc(&mut self) -> DSTC_W { + DSTC_W::new(self, 12) } #[doc = "Bit 13 - HRPWMx.OUTy0 channel selector"] #[inline(always)] #[must_use] - pub fn ocs0(&mut self) -> Ocs0W { - Ocs0W::new(self, 13) + pub fn ocs0(&mut self) -> OCS0_W { + OCS0_W::new(self, 13) } #[doc = "Bit 14 - HRPWMx.OUTy1 channel selector"] #[inline(always)] #[must_use] - pub fn ocs1(&mut self) -> Ocs1W { - Ocs1W::new(self, 14) + pub fn ocs1(&mut self) -> OCS1_W { + OCS1_W::new(self, 14) } #[doc = "Bit 16 - Dead Time update trigger selector"] #[inline(always)] #[must_use] - pub fn dtus(&mut self) -> DtusW { - DtusW::new(self, 16) + pub fn dtus(&mut self) -> DTUS_W { + DTUS_W::new(self, 16) } } #[doc = "HRC mode configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GcSpec; -impl crate::RegisterSpec for GcSpec { +pub struct GC_SPEC; +impl crate::RegisterSpec for GC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gc::R`](R) reader structure"] -impl crate::Readable for GcSpec {} +impl crate::Readable for GC_SPEC {} #[doc = "`write(|w| ..)` method takes [`gc::W`](W) writer structure"] -impl crate::Writable for GcSpec { +impl crate::Writable for GC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GC to value 0"] -impl crate::Resettable for GcSpec { +impl crate::Resettable for GC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/gsel.rs b/src/hrpwm0_hrc0/gsel.rs index 46881c2b..94aa9c5f 100644 --- a/src/hrpwm0_hrc0/gsel.rs +++ b/src/hrpwm0_hrc0/gsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `GSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source selector 0 comparator set configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C0ss { +pub enum C0SS_A { #[doc = "0: CMP output of CSG0 unit can be used as set source for the output latch"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP output of CSG1 unit can be used as set source for the output latch"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CMP output of CSG2 unit can be used as set source for the output latch"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C0ss) -> Self { + fn from(variant: C0SS_A) -> Self { variant as _ } } -impl crate::FieldSpec for C0ss { +impl crate::FieldSpec for C0SS_A { type Ux = u8; } -impl crate::IsEnum for C0ss {} +impl crate::IsEnum for C0SS_A {} #[doc = "Field `C0SS` reader - Source selector 0 comparator set configuration"] -pub type C0ssR = crate::FieldReader; -impl C0ssR { +pub type C0SS_R = crate::FieldReader; +impl C0SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C0ss::Value1), - 1 => Some(C0ss::Value2), - 2 => Some(C0ss::Value3), + 0 => Some(C0SS_A::VALUE1), + 1 => Some(C0SS_A::VALUE2), + 2 => Some(C0SS_A::VALUE3), _ => None, } } #[doc = "CMP output of CSG0 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0ss::Value1 + *self == C0SS_A::VALUE1 } #[doc = "CMP output of CSG1 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0ss::Value2 + *self == C0SS_A::VALUE2 } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C0ss::Value3 + *self == C0SS_A::VALUE3 } } #[doc = "Field `C0SS` writer - Source selector 0 comparator set configuration"] -pub type C0ssW<'a, REG> = crate::FieldWriter<'a, REG, 3, C0ss>; -impl<'a, REG> C0ssW<'a, REG> +pub type C0SS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, C0SS_A>; +impl<'a, REG> C0SS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "CMP output of CSG0 unit can be used as set source for the output latch"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C0ss::Value1) + self.variant(C0SS_A::VALUE1) } #[doc = "CMP output of CSG1 unit can be used as set source for the output latch"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C0ss::Value2) + self.variant(C0SS_A::VALUE2) } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C0ss::Value3) + self.variant(C0SS_A::VALUE3) } } #[doc = "Source selector 0 comparator clear configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C0cs { +pub enum C0CS_A { #[doc = "0: CMP output of CSG0 unit can be used as clear source for the output latch"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP output of CSG1 unit can be used as clear source for the output latch"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CMP output of CSG2 unit can be used as clear source for the output latch"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C0cs) -> Self { + fn from(variant: C0CS_A) -> Self { variant as _ } } -impl crate::FieldSpec for C0cs { +impl crate::FieldSpec for C0CS_A { type Ux = u8; } -impl crate::IsEnum for C0cs {} +impl crate::IsEnum for C0CS_A {} #[doc = "Field `C0CS` reader - Source selector 0 comparator clear configuration"] -pub type C0csR = crate::FieldReader; -impl C0csR { +pub type C0CS_R = crate::FieldReader; +impl C0CS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C0cs::Value1), - 1 => Some(C0cs::Value2), - 2 => Some(C0cs::Value3), + 0 => Some(C0CS_A::VALUE1), + 1 => Some(C0CS_A::VALUE2), + 2 => Some(C0CS_A::VALUE3), _ => None, } } #[doc = "CMP output of CSG0 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0cs::Value1 + *self == C0CS_A::VALUE1 } #[doc = "CMP output of CSG1 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0cs::Value2 + *self == C0CS_A::VALUE2 } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C0cs::Value3 + *self == C0CS_A::VALUE3 } } #[doc = "Field `C0CS` writer - Source selector 0 comparator clear configuration"] -pub type C0csW<'a, REG> = crate::FieldWriter<'a, REG, 3, C0cs>; -impl<'a, REG> C0csW<'a, REG> +pub type C0CS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, C0CS_A>; +impl<'a, REG> C0CS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,64 +135,64 @@ where #[doc = "CMP output of CSG0 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C0cs::Value1) + self.variant(C0CS_A::VALUE1) } #[doc = "CMP output of CSG1 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C0cs::Value2) + self.variant(C0CS_A::VALUE2) } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C0cs::Value3) + self.variant(C0CS_A::VALUE3) } } #[doc = "Source selector 0 set configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum S0m { +pub enum S0M_A { #[doc = "0: Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field."] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: S0m) -> Self { + fn from(variant: S0M_A) -> Self { variant as _ } } -impl crate::FieldSpec for S0m { +impl crate::FieldSpec for S0M_A { type Ux = u8; } -impl crate::IsEnum for S0m {} +impl crate::IsEnum for S0M_A {} #[doc = "Field `S0M` reader - Source selector 0 set configuration"] -pub type S0mR = crate::FieldReader; -impl S0mR { +pub type S0M_R = crate::FieldReader; +impl S0M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(S0m::Value1), - 1 => Some(S0m::Value2), + 0 => Some(S0M_A::VALUE1), + 1 => Some(S0M_A::VALUE2), _ => None, } } #[doc = "Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0m::Value1 + *self == S0M_A::VALUE1 } #[doc = "Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0m::Value2 + *self == S0M_A::VALUE2 } } #[doc = "Field `S0M` writer - Source selector 0 set configuration"] -pub type S0mW<'a, REG> = crate::FieldWriter<'a, REG, 2, S0m>; -impl<'a, REG> S0mW<'a, REG> +pub type S0M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, S0M_A>; +impl<'a, REG> S0M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -200,59 +200,59 @@ where #[doc = "Set from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(S0m::Value1) + self.variant(S0M_A::VALUE1) } #[doc = "Set from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0SS field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(S0m::Value2) + self.variant(S0M_A::VALUE2) } } #[doc = "Source selector 0 clear configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C0m { +pub enum C0M_A { #[doc = "0: Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field."] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C0m) -> Self { + fn from(variant: C0M_A) -> Self { variant as _ } } -impl crate::FieldSpec for C0m { +impl crate::FieldSpec for C0M_A { type Ux = u8; } -impl crate::IsEnum for C0m {} +impl crate::IsEnum for C0M_A {} #[doc = "Field `C0M` reader - Source selector 0 clear configuration"] -pub type C0mR = crate::FieldReader; -impl C0mR { +pub type C0M_R = crate::FieldReader; +impl C0M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C0m::Value1), - 1 => Some(C0m::Value2), + 0 => Some(C0M_A::VALUE1), + 1 => Some(C0M_A::VALUE2), _ => None, } } #[doc = "Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0m::Value1 + *self == C0M_A::VALUE1 } #[doc = "Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0m::Value2 + *self == C0M_A::VALUE2 } } #[doc = "Field `C0M` writer - Source selector 0 clear configuration"] -pub type C0mW<'a, REG> = crate::FieldWriter<'a, REG, 2, C0m>; -impl<'a, REG> C0mW<'a, REG> +pub type C0M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C0M_A>; +impl<'a, REG> C0M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -260,75 +260,75 @@ where #[doc = "Clear from source selector 0 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C0m::Value1) + self.variant(C0M_A::VALUE1) } #[doc = "Clear from source selector 0 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C0CS field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C0m::Value2) + self.variant(C0M_A::VALUE2) } } #[doc = "Source selector 0 set edge configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum S0es { +pub enum S0ES_A { #[doc = "0: Generation of the set signal is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set signal is generated on a LOW to HIGH transition of the selected input"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Set signal is generated on a HIGH to LOW transition of the selected input"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Set signal is generated on both transitions of the selected input"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: S0es) -> Self { + fn from(variant: S0ES_A) -> Self { variant as _ } } -impl crate::FieldSpec for S0es { +impl crate::FieldSpec for S0ES_A { type Ux = u8; } -impl crate::IsEnum for S0es {} +impl crate::IsEnum for S0ES_A {} #[doc = "Field `S0ES` reader - Source selector 0 set edge configuration"] -pub type S0esR = crate::FieldReader; -impl S0esR { +pub type S0ES_R = crate::FieldReader; +impl S0ES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S0es { + pub const fn variant(&self) -> S0ES_A { match self.bits { - 0 => S0es::Value1, - 1 => S0es::Value2, - 2 => S0es::Value3, - 3 => S0es::Value4, + 0 => S0ES_A::VALUE1, + 1 => S0ES_A::VALUE2, + 2 => S0ES_A::VALUE3, + 3 => S0ES_A::VALUE4, _ => unreachable!(), } } #[doc = "Generation of the set signal is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S0es::Value1 + *self == S0ES_A::VALUE1 } #[doc = "Set signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S0es::Value2 + *self == S0ES_A::VALUE2 } #[doc = "Set signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == S0es::Value3 + *self == S0ES_A::VALUE3 } #[doc = "Set signal is generated on both transitions of the selected input"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == S0es::Value4 + *self == S0ES_A::VALUE4 } } #[doc = "Field `S0ES` writer - Source selector 0 set edge configuration"] -pub type S0esW<'a, REG> = crate::FieldWriter<'a, REG, 2, S0es, crate::Safe>; -impl<'a, REG> S0esW<'a, REG> +pub type S0ES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, S0ES_A, crate::Safe>; +impl<'a, REG> S0ES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -336,85 +336,85 @@ where #[doc = "Generation of the set signal is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(S0es::Value1) + self.variant(S0ES_A::VALUE1) } #[doc = "Set signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(S0es::Value2) + self.variant(S0ES_A::VALUE2) } #[doc = "Set signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(S0es::Value3) + self.variant(S0ES_A::VALUE3) } #[doc = "Set signal is generated on both transitions of the selected input"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(S0es::Value4) + self.variant(S0ES_A::VALUE4) } } #[doc = "Source selector 0 clear edge configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C0es { +pub enum C0ES_A { #[doc = "0: Generation of the clear signal is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear signal is generated on a LOW to HIGH transition of the selected input"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clear signal is generated on a HIGH to LOW transition of the selected input"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Clear signal is generated on both transitions of the selected input"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C0es) -> Self { + fn from(variant: C0ES_A) -> Self { variant as _ } } -impl crate::FieldSpec for C0es { +impl crate::FieldSpec for C0ES_A { type Ux = u8; } -impl crate::IsEnum for C0es {} +impl crate::IsEnum for C0ES_A {} #[doc = "Field `C0ES` reader - Source selector 0 clear edge configuration"] -pub type C0esR = crate::FieldReader; -impl C0esR { +pub type C0ES_R = crate::FieldReader; +impl C0ES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> C0es { + pub const fn variant(&self) -> C0ES_A { match self.bits { - 0 => C0es::Value1, - 1 => C0es::Value2, - 2 => C0es::Value3, - 3 => C0es::Value4, + 0 => C0ES_A::VALUE1, + 1 => C0ES_A::VALUE2, + 2 => C0ES_A::VALUE3, + 3 => C0ES_A::VALUE4, _ => unreachable!(), } } #[doc = "Generation of the clear signal is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C0es::Value1 + *self == C0ES_A::VALUE1 } #[doc = "Clear signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C0es::Value2 + *self == C0ES_A::VALUE2 } #[doc = "Clear signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C0es::Value3 + *self == C0ES_A::VALUE3 } #[doc = "Clear signal is generated on both transitions of the selected input"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == C0es::Value4 + *self == C0ES_A::VALUE4 } } #[doc = "Field `C0ES` writer - Source selector 0 clear edge configuration"] -pub type C0esW<'a, REG> = crate::FieldWriter<'a, REG, 2, C0es, crate::Safe>; -impl<'a, REG> C0esW<'a, REG> +pub type C0ES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C0ES_A, crate::Safe>; +impl<'a, REG> C0ES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -422,77 +422,77 @@ where #[doc = "Generation of the clear signal is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C0es::Value1) + self.variant(C0ES_A::VALUE1) } #[doc = "Clear signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C0es::Value2) + self.variant(C0ES_A::VALUE2) } #[doc = "Clear signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C0es::Value3) + self.variant(C0ES_A::VALUE3) } #[doc = "Clear signal is generated on both transitions of the selected input"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(C0es::Value4) + self.variant(C0ES_A::VALUE4) } } #[doc = "Source selector 1 comparator set configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C1ss { +pub enum C1SS_A { #[doc = "0: CMP output of CSG0 unit can be used as set source for the output latch"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP output of CSG2 unit can be used as set source for the output latch"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CMP output of CSG2 unit can be used as set source for the output latch"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C1ss) -> Self { + fn from(variant: C1SS_A) -> Self { variant as _ } } -impl crate::FieldSpec for C1ss { +impl crate::FieldSpec for C1SS_A { type Ux = u8; } -impl crate::IsEnum for C1ss {} +impl crate::IsEnum for C1SS_A {} #[doc = "Field `C1SS` reader - Source selector 1 comparator set configuration"] -pub type C1ssR = crate::FieldReader; -impl C1ssR { +pub type C1SS_R = crate::FieldReader; +impl C1SS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C1ss::Value1), - 1 => Some(C1ss::Value2), - 2 => Some(C1ss::Value3), + 0 => Some(C1SS_A::VALUE1), + 1 => Some(C1SS_A::VALUE2), + 2 => Some(C1SS_A::VALUE3), _ => None, } } #[doc = "CMP output of CSG0 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1ss::Value1 + *self == C1SS_A::VALUE1 } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1ss::Value2 + *self == C1SS_A::VALUE2 } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C1ss::Value3 + *self == C1SS_A::VALUE3 } } #[doc = "Field `C1SS` writer - Source selector 1 comparator set configuration"] -pub type C1ssW<'a, REG> = crate::FieldWriter<'a, REG, 3, C1ss>; -impl<'a, REG> C1ssW<'a, REG> +pub type C1SS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, C1SS_A>; +impl<'a, REG> C1SS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "CMP output of CSG0 unit can be used as set source for the output latch"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C1ss::Value1) + self.variant(C1SS_A::VALUE1) } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C1ss::Value2) + self.variant(C1SS_A::VALUE2) } #[doc = "CMP output of CSG2 unit can be used as set source for the output latch"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C1ss::Value3) + self.variant(C1SS_A::VALUE3) } } #[doc = "Source selector 1 comparator clear configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C1cs { +pub enum C1CS_A { #[doc = "0: CMP output of CSG0 unit can be used as clear source for the output latch"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: CMP output of CSG2 unit can be used as clear source for the output latch"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: CMP output of CSG2 unit can be used as clear source for the output latch"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C1cs) -> Self { + fn from(variant: C1CS_A) -> Self { variant as _ } } -impl crate::FieldSpec for C1cs { +impl crate::FieldSpec for C1CS_A { type Ux = u8; } -impl crate::IsEnum for C1cs {} +impl crate::IsEnum for C1CS_A {} #[doc = "Field `C1CS` reader - Source selector 1 comparator clear configuration"] -pub type C1csR = crate::FieldReader; -impl C1csR { +pub type C1CS_R = crate::FieldReader; +impl C1CS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C1cs::Value1), - 1 => Some(C1cs::Value2), - 2 => Some(C1cs::Value3), + 0 => Some(C1CS_A::VALUE1), + 1 => Some(C1CS_A::VALUE2), + 2 => Some(C1CS_A::VALUE3), _ => None, } } #[doc = "CMP output of CSG0 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1cs::Value1 + *self == C1CS_A::VALUE1 } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1cs::Value2 + *self == C1CS_A::VALUE2 } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C1cs::Value3 + *self == C1CS_A::VALUE3 } } #[doc = "Field `C1CS` writer - Source selector 1 comparator clear configuration"] -pub type C1csW<'a, REG> = crate::FieldWriter<'a, REG, 3, C1cs>; -impl<'a, REG> C1csW<'a, REG> +pub type C1CS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, C1CS_A>; +impl<'a, REG> C1CS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,64 +573,64 @@ where #[doc = "CMP output of CSG0 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C1cs::Value1) + self.variant(C1CS_A::VALUE1) } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C1cs::Value2) + self.variant(C1CS_A::VALUE2) } #[doc = "CMP output of CSG2 unit can be used as clear source for the output latch"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C1cs::Value3) + self.variant(C1CS_A::VALUE3) } } #[doc = "Source selector 1 set configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum S1m { +pub enum S1M_A { #[doc = "0: Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field."] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: S1m) -> Self { + fn from(variant: S1M_A) -> Self { variant as _ } } -impl crate::FieldSpec for S1m { +impl crate::FieldSpec for S1M_A { type Ux = u8; } -impl crate::IsEnum for S1m {} +impl crate::IsEnum for S1M_A {} #[doc = "Field `S1M` reader - Source selector 1 set configuration"] -pub type S1mR = crate::FieldReader; -impl S1mR { +pub type S1M_R = crate::FieldReader; +impl S1M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(S1m::Value1), - 1 => Some(S1m::Value2), + 0 => Some(S1M_A::VALUE1), + 1 => Some(S1M_A::VALUE2), _ => None, } } #[doc = "Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1m::Value1 + *self == S1M_A::VALUE1 } #[doc = "Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1m::Value2 + *self == S1M_A::VALUE2 } } #[doc = "Field `S1M` writer - Source selector 1 set configuration"] -pub type S1mW<'a, REG> = crate::FieldWriter<'a, REG, 2, S1m>; -impl<'a, REG> S1mW<'a, REG> +pub type S1M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, S1M_A>; +impl<'a, REG> S1M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -638,59 +638,59 @@ where #[doc = "Set from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(S1m::Value1) + self.variant(S1M_A::VALUE1) } #[doc = "Set from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1SS field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(S1m::Value2) + self.variant(S1M_A::VALUE2) } } #[doc = "Source selector 1 clear configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C1m { +pub enum C1M_A { #[doc = "0: Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field."] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C1m) -> Self { + fn from(variant: C1M_A) -> Self { variant as _ } } -impl crate::FieldSpec for C1m { +impl crate::FieldSpec for C1M_A { type Ux = u8; } -impl crate::IsEnum for C1m {} +impl crate::IsEnum for C1M_A {} #[doc = "Field `C1M` reader - Source selector 1 clear configuration"] -pub type C1mR = crate::FieldReader; -impl C1mR { +pub type C1M_R = crate::FieldReader; +impl C1M_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(C1m::Value1), - 1 => Some(C1m::Value2), + 0 => Some(C1M_A::VALUE1), + 1 => Some(C1M_A::VALUE2), _ => None, } } #[doc = "Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1m::Value1 + *self == C1M_A::VALUE1 } #[doc = "Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1m::Value2 + *self == C1M_A::VALUE2 } } #[doc = "Field `C1M` writer - Source selector 1 clear configuration"] -pub type C1mW<'a, REG> = crate::FieldWriter<'a, REG, 2, C1m>; -impl<'a, REG> C1mW<'a, REG> +pub type C1M_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C1M_A>; +impl<'a, REG> C1M_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -698,75 +698,75 @@ where #[doc = "Clear from source selector 1 is controlled via the Capture/Compare Unit timer, CCSTy signal"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C1m::Value1) + self.variant(C1M_A::VALUE1) } #[doc = "Clear from source selector 1 is controlled via the CMP output from the CSGy unit. Which unit is being used is configured via the C1CS field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C1m::Value2) + self.variant(C1M_A::VALUE2) } } #[doc = "Source selector 1 set edge configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum S1es { +pub enum S1ES_A { #[doc = "0: Generation of the set signal is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set signal is generated on a LOW to HIGH transition of the selected input"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Set signal is generated on a HIGH to LOW transition of the selected input"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Set signal is generated on both transitions of the selected input"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: S1es) -> Self { + fn from(variant: S1ES_A) -> Self { variant as _ } } -impl crate::FieldSpec for S1es { +impl crate::FieldSpec for S1ES_A { type Ux = u8; } -impl crate::IsEnum for S1es {} +impl crate::IsEnum for S1ES_A {} #[doc = "Field `S1ES` reader - Source selector 1 set edge configuration"] -pub type S1esR = crate::FieldReader; -impl S1esR { +pub type S1ES_R = crate::FieldReader; +impl S1ES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> S1es { + pub const fn variant(&self) -> S1ES_A { match self.bits { - 0 => S1es::Value1, - 1 => S1es::Value2, - 2 => S1es::Value3, - 3 => S1es::Value4, + 0 => S1ES_A::VALUE1, + 1 => S1ES_A::VALUE2, + 2 => S1ES_A::VALUE3, + 3 => S1ES_A::VALUE4, _ => unreachable!(), } } #[doc = "Generation of the set signal is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == S1es::Value1 + *self == S1ES_A::VALUE1 } #[doc = "Set signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == S1es::Value2 + *self == S1ES_A::VALUE2 } #[doc = "Set signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == S1es::Value3 + *self == S1ES_A::VALUE3 } #[doc = "Set signal is generated on both transitions of the selected input"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == S1es::Value4 + *self == S1ES_A::VALUE4 } } #[doc = "Field `S1ES` writer - Source selector 1 set edge configuration"] -pub type S1esW<'a, REG> = crate::FieldWriter<'a, REG, 2, S1es, crate::Safe>; -impl<'a, REG> S1esW<'a, REG> +pub type S1ES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, S1ES_A, crate::Safe>; +impl<'a, REG> S1ES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -774,85 +774,85 @@ where #[doc = "Generation of the set signal is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(S1es::Value1) + self.variant(S1ES_A::VALUE1) } #[doc = "Set signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(S1es::Value2) + self.variant(S1ES_A::VALUE2) } #[doc = "Set signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(S1es::Value3) + self.variant(S1ES_A::VALUE3) } #[doc = "Set signal is generated on both transitions of the selected input"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(S1es::Value4) + self.variant(S1ES_A::VALUE4) } } #[doc = "Source selector 1 clear edge configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum C1es { +pub enum C1ES_A { #[doc = "0: Generation of the clear signal is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear signal is generated on a LOW to HIGH transition of the selected input"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Clear signal is generated on a HIGH to LOW transition of the selected input"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Clear signal is generated on both transitions of the selected input"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: C1es) -> Self { + fn from(variant: C1ES_A) -> Self { variant as _ } } -impl crate::FieldSpec for C1es { +impl crate::FieldSpec for C1ES_A { type Ux = u8; } -impl crate::IsEnum for C1es {} +impl crate::IsEnum for C1ES_A {} #[doc = "Field `C1ES` reader - Source selector 1 clear edge configuration"] -pub type C1esR = crate::FieldReader; -impl C1esR { +pub type C1ES_R = crate::FieldReader; +impl C1ES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> C1es { + pub const fn variant(&self) -> C1ES_A { match self.bits { - 0 => C1es::Value1, - 1 => C1es::Value2, - 2 => C1es::Value3, - 3 => C1es::Value4, + 0 => C1ES_A::VALUE1, + 1 => C1ES_A::VALUE2, + 2 => C1ES_A::VALUE3, + 3 => C1ES_A::VALUE4, _ => unreachable!(), } } #[doc = "Generation of the clear signal is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == C1es::Value1 + *self == C1ES_A::VALUE1 } #[doc = "Clear signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == C1es::Value2 + *self == C1ES_A::VALUE2 } #[doc = "Clear signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == C1es::Value3 + *self == C1ES_A::VALUE3 } #[doc = "Clear signal is generated on both transitions of the selected input"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == C1es::Value4 + *self == C1ES_A::VALUE4 } } #[doc = "Field `C1ES` writer - Source selector 1 clear edge configuration"] -pub type C1esW<'a, REG> = crate::FieldWriter<'a, REG, 2, C1es, crate::Safe>; -impl<'a, REG> C1esW<'a, REG> +pub type C1ES_W<'a, REG> = crate::FieldWriter<'a, REG, 2, C1ES_A, crate::Safe>; +impl<'a, REG> C1ES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -860,174 +860,174 @@ where #[doc = "Generation of the clear signal is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(C1es::Value1) + self.variant(C1ES_A::VALUE1) } #[doc = "Clear signal is generated on a LOW to HIGH transition of the selected input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(C1es::Value2) + self.variant(C1ES_A::VALUE2) } #[doc = "Clear signal is generated on a HIGH to LOW transition of the selected input"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(C1es::Value3) + self.variant(C1ES_A::VALUE3) } #[doc = "Clear signal is generated on both transitions of the selected input"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(C1es::Value4) + self.variant(C1ES_A::VALUE4) } } impl R { #[doc = "Bits 0:2 - Source selector 0 comparator set configuration"] #[inline(always)] - pub fn c0ss(&self) -> C0ssR { - C0ssR::new((self.bits & 7) as u8) + pub fn c0ss(&self) -> C0SS_R { + C0SS_R::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Source selector 0 comparator clear configuration"] #[inline(always)] - pub fn c0cs(&self) -> C0csR { - C0csR::new(((self.bits >> 3) & 7) as u8) + pub fn c0cs(&self) -> C0CS_R { + C0CS_R::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bits 6:7 - Source selector 0 set configuration"] #[inline(always)] - pub fn s0m(&self) -> S0mR { - S0mR::new(((self.bits >> 6) & 3) as u8) + pub fn s0m(&self) -> S0M_R { + S0M_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Source selector 0 clear configuration"] #[inline(always)] - pub fn c0m(&self) -> C0mR { - C0mR::new(((self.bits >> 8) & 3) as u8) + pub fn c0m(&self) -> C0M_R { + C0M_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Source selector 0 set edge configuration"] #[inline(always)] - pub fn s0es(&self) -> S0esR { - S0esR::new(((self.bits >> 10) & 3) as u8) + pub fn s0es(&self) -> S0ES_R { + S0ES_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Source selector 0 clear edge configuration"] #[inline(always)] - pub fn c0es(&self) -> C0esR { - C0esR::new(((self.bits >> 12) & 3) as u8) + pub fn c0es(&self) -> C0ES_R { + C0ES_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 16:18 - Source selector 1 comparator set configuration"] #[inline(always)] - pub fn c1ss(&self) -> C1ssR { - C1ssR::new(((self.bits >> 16) & 7) as u8) + pub fn c1ss(&self) -> C1SS_R { + C1SS_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Source selector 1 comparator clear configuration"] #[inline(always)] - pub fn c1cs(&self) -> C1csR { - C1csR::new(((self.bits >> 19) & 7) as u8) + pub fn c1cs(&self) -> C1CS_R { + C1CS_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 22:23 - Source selector 1 set configuration"] #[inline(always)] - pub fn s1m(&self) -> S1mR { - S1mR::new(((self.bits >> 22) & 3) as u8) + pub fn s1m(&self) -> S1M_R { + S1M_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Source selector 1 clear configuration"] #[inline(always)] - pub fn c1m(&self) -> C1mR { - C1mR::new(((self.bits >> 24) & 3) as u8) + pub fn c1m(&self) -> C1M_R { + C1M_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Source selector 1 set edge configuration"] #[inline(always)] - pub fn s1es(&self) -> S1esR { - S1esR::new(((self.bits >> 26) & 3) as u8) + pub fn s1es(&self) -> S1ES_R { + S1ES_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Source selector 1 clear edge configuration"] #[inline(always)] - pub fn c1es(&self) -> C1esR { - C1esR::new(((self.bits >> 28) & 3) as u8) + pub fn c1es(&self) -> C1ES_R { + C1ES_R::new(((self.bits >> 28) & 3) as u8) } } impl W { #[doc = "Bits 0:2 - Source selector 0 comparator set configuration"] #[inline(always)] #[must_use] - pub fn c0ss(&mut self) -> C0ssW { - C0ssW::new(self, 0) + pub fn c0ss(&mut self) -> C0SS_W { + C0SS_W::new(self, 0) } #[doc = "Bits 3:5 - Source selector 0 comparator clear configuration"] #[inline(always)] #[must_use] - pub fn c0cs(&mut self) -> C0csW { - C0csW::new(self, 3) + pub fn c0cs(&mut self) -> C0CS_W { + C0CS_W::new(self, 3) } #[doc = "Bits 6:7 - Source selector 0 set configuration"] #[inline(always)] #[must_use] - pub fn s0m(&mut self) -> S0mW { - S0mW::new(self, 6) + pub fn s0m(&mut self) -> S0M_W { + S0M_W::new(self, 6) } #[doc = "Bits 8:9 - Source selector 0 clear configuration"] #[inline(always)] #[must_use] - pub fn c0m(&mut self) -> C0mW { - C0mW::new(self, 8) + pub fn c0m(&mut self) -> C0M_W { + C0M_W::new(self, 8) } #[doc = "Bits 10:11 - Source selector 0 set edge configuration"] #[inline(always)] #[must_use] - pub fn s0es(&mut self) -> S0esW { - S0esW::new(self, 10) + pub fn s0es(&mut self) -> S0ES_W { + S0ES_W::new(self, 10) } #[doc = "Bits 12:13 - Source selector 0 clear edge configuration"] #[inline(always)] #[must_use] - pub fn c0es(&mut self) -> C0esW { - C0esW::new(self, 12) + pub fn c0es(&mut self) -> C0ES_W { + C0ES_W::new(self, 12) } #[doc = "Bits 16:18 - Source selector 1 comparator set configuration"] #[inline(always)] #[must_use] - pub fn c1ss(&mut self) -> C1ssW { - C1ssW::new(self, 16) + pub fn c1ss(&mut self) -> C1SS_W { + C1SS_W::new(self, 16) } #[doc = "Bits 19:21 - Source selector 1 comparator clear configuration"] #[inline(always)] #[must_use] - pub fn c1cs(&mut self) -> C1csW { - C1csW::new(self, 19) + pub fn c1cs(&mut self) -> C1CS_W { + C1CS_W::new(self, 19) } #[doc = "Bits 22:23 - Source selector 1 set configuration"] #[inline(always)] #[must_use] - pub fn s1m(&mut self) -> S1mW { - S1mW::new(self, 22) + pub fn s1m(&mut self) -> S1M_W { + S1M_W::new(self, 22) } #[doc = "Bits 24:25 - Source selector 1 clear configuration"] #[inline(always)] #[must_use] - pub fn c1m(&mut self) -> C1mW { - C1mW::new(self, 24) + pub fn c1m(&mut self) -> C1M_W { + C1M_W::new(self, 24) } #[doc = "Bits 26:27 - Source selector 1 set edge configuration"] #[inline(always)] #[must_use] - pub fn s1es(&mut self) -> S1esW { - S1esW::new(self, 26) + pub fn s1es(&mut self) -> S1ES_W { + S1ES_W::new(self, 26) } #[doc = "Bits 28:29 - Source selector 1 clear edge configuration"] #[inline(always)] #[must_use] - pub fn c1es(&mut self) -> C1esW { - C1esW::new(self, 28) + pub fn c1es(&mut self) -> C1ES_W { + C1ES_W::new(self, 28) } } #[doc = "HRC global control selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GselSpec; -impl crate::RegisterSpec for GselSpec { +pub struct GSEL_SPEC; +impl crate::RegisterSpec for GSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gsel::R`](R) reader structure"] -impl crate::Readable for GselSpec {} +impl crate::Readable for GSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`gsel::W`](W) writer structure"] -impl crate::Writable for GselSpec { +impl crate::Writable for GSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GSEL to value 0"] -impl crate::Resettable for GselSpec { +impl crate::Resettable for GSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/pl.rs b/src/hrpwm0_hrc0/pl.rs index 179f86df..d3d69c87 100644 --- a/src/hrpwm0_hrc0/pl.rs +++ b/src/hrpwm0_hrc0/pl.rs @@ -1,153 +1,153 @@ #[doc = "Register `PL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "HRPWMx.OUTy0 passive level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl0 { +pub enum PSL0_A { #[doc = "0: HRPWMx.OUTy0 output passive level is set to LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.OUTy0 output passive level is set to HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl0) -> Self { + fn from(variant: PSL0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL0` reader - HRPWMx.OUTy0 passive level"] -pub type Psl0R = crate::BitReader; -impl Psl0R { +pub type PSL0_R = crate::BitReader; +impl PSL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl0 { + pub const fn variant(&self) -> PSL0_A { match self.bits { - false => Psl0::Value1, - true => Psl0::Value2, + false => PSL0_A::VALUE1, + true => PSL0_A::VALUE2, } } #[doc = "HRPWMx.OUTy0 output passive level is set to LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl0::Value1 + *self == PSL0_A::VALUE1 } #[doc = "HRPWMx.OUTy0 output passive level is set to HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl0::Value2 + *self == PSL0_A::VALUE2 } } #[doc = "Field `PSL0` writer - HRPWMx.OUTy0 passive level"] -pub type Psl0W<'a, REG> = crate::BitWriter<'a, REG, Psl0>; -impl<'a, REG> Psl0W<'a, REG> +pub type PSL0_W<'a, REG> = crate::BitWriter<'a, REG, PSL0_A>; +impl<'a, REG> PSL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRPWMx.OUTy0 output passive level is set to LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl0::Value1) + self.variant(PSL0_A::VALUE1) } #[doc = "HRPWMx.OUTy0 output passive level is set to HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl0::Value2) + self.variant(PSL0_A::VALUE2) } } #[doc = "HRPWMx.OUTy1 passive level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Psl1 { +pub enum PSL1_A { #[doc = "0: HRPWMx.OUTy1 output passive level is set to LOW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HRPWMx.OUTy1 output passive level is set to HIGH"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Psl1) -> Self { + fn from(variant: PSL1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PSL1` reader - HRPWMx.OUTy1 passive level"] -pub type Psl1R = crate::BitReader; -impl Psl1R { +pub type PSL1_R = crate::BitReader; +impl PSL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Psl1 { + pub const fn variant(&self) -> PSL1_A { match self.bits { - false => Psl1::Value1, - true => Psl1::Value2, + false => PSL1_A::VALUE1, + true => PSL1_A::VALUE2, } } #[doc = "HRPWMx.OUTy1 output passive level is set to LOW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Psl1::Value1 + *self == PSL1_A::VALUE1 } #[doc = "HRPWMx.OUTy1 output passive level is set to HIGH"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Psl1::Value2 + *self == PSL1_A::VALUE2 } } #[doc = "Field `PSL1` writer - HRPWMx.OUTy1 passive level"] -pub type Psl1W<'a, REG> = crate::BitWriter<'a, REG, Psl1>; -impl<'a, REG> Psl1W<'a, REG> +pub type PSL1_W<'a, REG> = crate::BitWriter<'a, REG, PSL1_A>; +impl<'a, REG> PSL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HRPWMx.OUTy1 output passive level is set to LOW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Psl1::Value1) + self.variant(PSL1_A::VALUE1) } #[doc = "HRPWMx.OUTy1 output passive level is set to HIGH"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Psl1::Value2) + self.variant(PSL1_A::VALUE2) } } impl R { #[doc = "Bit 0 - HRPWMx.OUTy0 passive level"] #[inline(always)] - pub fn psl0(&self) -> Psl0R { - Psl0R::new((self.bits & 1) != 0) + pub fn psl0(&self) -> PSL0_R { + PSL0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - HRPWMx.OUTy1 passive level"] #[inline(always)] - pub fn psl1(&self) -> Psl1R { - Psl1R::new(((self.bits >> 1) & 1) != 0) + pub fn psl1(&self) -> PSL1_R { + PSL1_R::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - HRPWMx.OUTy0 passive level"] #[inline(always)] #[must_use] - pub fn psl0(&mut self) -> Psl0W { - Psl0W::new(self, 0) + pub fn psl0(&mut self) -> PSL0_W { + PSL0_W::new(self, 0) } #[doc = "Bit 1 - HRPWMx.OUTy1 passive level"] #[inline(always)] #[must_use] - pub fn psl1(&mut self) -> Psl1W { - Psl1W::new(self, 1) + pub fn psl1(&mut self) -> PSL1_W { + PSL1_W::new(self, 1) } } #[doc = "HRC output passive level\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PlSpec; -impl crate::RegisterSpec for PlSpec { +pub struct PL_SPEC; +impl crate::RegisterSpec for PL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pl::R`](R) reader structure"] -impl crate::Readable for PlSpec {} +impl crate::Readable for PL_SPEC {} #[doc = "`write(|w| ..)` method takes [`pl::W`](W) writer structure"] -impl crate::Writable for PlSpec { +impl crate::Writable for PL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PL to value 0"] -impl crate::Resettable for PlSpec { +impl crate::Resettable for PL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/sc.rs b/src/hrpwm0_hrc0/sc.rs index 1edc4d7c..eacb2e91 100644 --- a/src/hrpwm0_hrc0/sc.rs +++ b/src/hrpwm0_hrc0/sc.rs @@ -1,56 +1,56 @@ #[doc = "Register `SC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Source selector for the shadow transfer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum St { +pub enum ST_A { #[doc = "0: Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: St) -> Self { + fn from(variant: ST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ST` reader - Source selector for the shadow transfer"] -pub type StR = crate::BitReader; -impl StR { +pub type ST_R = crate::BitReader; +impl ST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> St { + pub const fn variant(&self) -> ST_A { match self.bits { - false => St::Value1, - true => St::Value2, + false => ST_A::VALUE1, + true => ST_A::VALUE2, } } #[doc = "Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == St::Value1 + *self == ST_A::VALUE1 } #[doc = "Shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == St::Value2 + *self == ST_A::VALUE2 } } impl R { #[doc = "Bit 0 - Source selector for the shadow transfer"] #[inline(always)] - pub fn st(&self) -> StR { - StR::new((self.bits & 1) != 0) + pub fn st(&self) -> ST_R { + ST_R::new((self.bits & 1) != 0) } } #[doc = "HRC current source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ScSpec; -impl crate::RegisterSpec for ScSpec { +pub struct SC_SPEC; +impl crate::RegisterSpec for SC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sc::R`](R) reader structure"] -impl crate::Readable for ScSpec {} +impl crate::Readable for SC_SPEC {} #[doc = "`reset()` method sets SC to value 0"] -impl crate::Resettable for ScSpec { +impl crate::Resettable for SC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/scr1.rs b/src/hrpwm0_hrc0/scr1.rs index c48c3696..6c8be0b8 100644 --- a/src/hrpwm0_hrc0/scr1.rs +++ b/src/hrpwm0_hrc0/scr1.rs @@ -1,40 +1,40 @@ #[doc = "Register `SCR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SCR1` reader - High resolution falling edge value"] -pub type Scr1R = crate::FieldReader; +pub type SCR1_R = crate::FieldReader; #[doc = "Field `SCR1` writer - High resolution falling edge value"] -pub type Scr1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SCR1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - High resolution falling edge value"] #[inline(always)] - pub fn scr1(&self) -> Scr1R { - Scr1R::new((self.bits & 0xff) as u8) + pub fn scr1(&self) -> SCR1_R { + SCR1_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - High resolution falling edge value"] #[inline(always)] #[must_use] - pub fn scr1(&mut self) -> Scr1W { - Scr1W::new(self, 0) + pub fn scr1(&mut self) -> SCR1_W { + SCR1_W::new(self, 0) } } #[doc = "HRC shadow rising edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Scr1Spec; -impl crate::RegisterSpec for Scr1Spec { +pub struct SCR1_SPEC; +impl crate::RegisterSpec for SCR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`scr1::R`](R) reader structure"] -impl crate::Readable for Scr1Spec {} +impl crate::Readable for SCR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`scr1::W`](W) writer structure"] -impl crate::Writable for Scr1Spec { +impl crate::Writable for SCR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCR1 to value 0"] -impl crate::Resettable for Scr1Spec { +impl crate::Resettable for SCR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/scr2.rs b/src/hrpwm0_hrc0/scr2.rs index 2c9d648e..b5f5d3ee 100644 --- a/src/hrpwm0_hrc0/scr2.rs +++ b/src/hrpwm0_hrc0/scr2.rs @@ -1,40 +1,40 @@ #[doc = "Register `SCR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SCR2` reader - High resolution rising edge value"] -pub type Scr2R = crate::FieldReader; +pub type SCR2_R = crate::FieldReader; #[doc = "Field `SCR2` writer - High resolution rising edge value"] -pub type Scr2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SCR2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - High resolution rising edge value"] #[inline(always)] - pub fn scr2(&self) -> Scr2R { - Scr2R::new((self.bits & 0xff) as u8) + pub fn scr2(&self) -> SCR2_R { + SCR2_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - High resolution rising edge value"] #[inline(always)] #[must_use] - pub fn scr2(&mut self) -> Scr2W { - Scr2W::new(self, 0) + pub fn scr2(&mut self) -> SCR2_W { + SCR2_W::new(self, 0) } } #[doc = "HRC shadow falling edge value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Scr2Spec; -impl crate::RegisterSpec for Scr2Spec { +pub struct SCR2_SPEC; +impl crate::RegisterSpec for SCR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`scr2::R`](R) reader structure"] -impl crate::Readable for Scr2Spec {} +impl crate::Readable for SCR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`scr2::W`](W) writer structure"] -impl crate::Writable for Scr2Spec { +impl crate::Writable for SCR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCR2 to value 0"] -impl crate::Resettable for Scr2Spec { +impl crate::Resettable for SCR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/sdcf.rs b/src/hrpwm0_hrc0/sdcf.rs index 0a8ac239..ffb1c5ba 100644 --- a/src/hrpwm0_hrc0/sdcf.rs +++ b/src/hrpwm0_hrc0/sdcf.rs @@ -1,40 +1,40 @@ #[doc = "Register `SDCF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDCF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SDTFV` reader - Shadow dead time falling value"] -pub type SdtfvR = crate::FieldReader; +pub type SDTFV_R = crate::FieldReader; #[doc = "Field `SDTFV` writer - Shadow dead time falling value"] -pub type SdtfvW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type SDTFV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow dead time falling value"] #[inline(always)] - pub fn sdtfv(&self) -> SdtfvR { - SdtfvR::new((self.bits & 0xffff) as u16) + pub fn sdtfv(&self) -> SDTFV_R { + SDTFV_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow dead time falling value"] #[inline(always)] #[must_use] - pub fn sdtfv(&mut self) -> SdtfvW { - SdtfvW::new(self, 0) + pub fn sdtfv(&mut self) -> SDTFV_W { + SDTFV_W::new(self, 0) } } #[doc = "HRC shadow dead time falling\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SdcfSpec; -impl crate::RegisterSpec for SdcfSpec { +pub struct SDCF_SPEC; +impl crate::RegisterSpec for SDCF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sdcf::R`](R) reader structure"] -impl crate::Readable for SdcfSpec {} +impl crate::Readable for SDCF_SPEC {} #[doc = "`write(|w| ..)` method takes [`sdcf::W`](W) writer structure"] -impl crate::Writable for SdcfSpec { +impl crate::Writable for SDCF_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDCF to value 0x01"] -impl crate::Resettable for SdcfSpec { +impl crate::Resettable for SDCF_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/hrpwm0_hrc0/sdcr.rs b/src/hrpwm0_hrc0/sdcr.rs index 7de111ac..14578a1f 100644 --- a/src/hrpwm0_hrc0/sdcr.rs +++ b/src/hrpwm0_hrc0/sdcr.rs @@ -1,40 +1,40 @@ #[doc = "Register `SDCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SDCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SDTRV` reader - Shadow dead time rising value"] -pub type SdtrvR = crate::FieldReader; +pub type SDTRV_R = crate::FieldReader; #[doc = "Field `SDTRV` writer - Shadow dead time rising value"] -pub type SdtrvW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type SDTRV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow dead time rising value"] #[inline(always)] - pub fn sdtrv(&self) -> SdtrvR { - SdtrvR::new((self.bits & 0xffff) as u16) + pub fn sdtrv(&self) -> SDTRV_R { + SDTRV_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow dead time rising value"] #[inline(always)] #[must_use] - pub fn sdtrv(&mut self) -> SdtrvW { - SdtrvW::new(self, 0) + pub fn sdtrv(&mut self) -> SDTRV_W { + SDTRV_W::new(self, 0) } } #[doc = "HRC shadow dead time rising\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SdcrSpec; -impl crate::RegisterSpec for SdcrSpec { +pub struct SDCR_SPEC; +impl crate::RegisterSpec for SDCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sdcr::R`](R) reader structure"] -impl crate::Readable for SdcrSpec {} +impl crate::Readable for SDCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sdcr::W`](W) writer structure"] -impl crate::Writable for SdcrSpec { +impl crate::Writable for SDCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SDCR to value 0x01"] -impl crate::Resettable for SdcrSpec { +impl crate::Resettable for SDCR_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/hrpwm0_hrc0/ssc.rs b/src/hrpwm0_hrc0/ssc.rs index 30c0f5e9..f12f13f3 100644 --- a/src/hrpwm0_hrc0/ssc.rs +++ b/src/hrpwm0_hrc0/ssc.rs @@ -1,89 +1,89 @@ #[doc = "Register `SSC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SSC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source selector for the shadow transfer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sst { +pub enum SST_A { #[doc = "0: Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sst) -> Self { + fn from(variant: SST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SST` reader - Source selector for the shadow transfer"] -pub type SstR = crate::BitReader; -impl SstR { +pub type SST_R = crate::BitReader; +impl SST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sst { + pub const fn variant(&self) -> SST_A { match self.bits { - false => Sst::Value1, - true => Sst::Value2, + false => SST_A::VALUE1, + true => SST_A::VALUE2, } } #[doc = "Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sst::Value1 + *self == SST_A::VALUE1 } #[doc = "Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sst::Value2 + *self == SST_A::VALUE2 } } #[doc = "Field `SST` writer - Source selector for the shadow transfer"] -pub type SstW<'a, REG> = crate::BitWriter<'a, REG, Sst>; -impl<'a, REG> SstW<'a, REG> +pub type SST_W<'a, REG> = crate::BitWriter<'a, REG, SST_A>; +impl<'a, REG> SST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sst::Value1) + self.variant(SST_A::VALUE1) } #[doc = "Next shadow transfer signals (shadow transfer trigger and shadow transfer enable) are linked with the timer CC8y connected to the Source Selector 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sst::Value2) + self.variant(SST_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source selector for the shadow transfer"] #[inline(always)] - pub fn sst(&self) -> SstR { - SstR::new((self.bits & 1) != 0) + pub fn sst(&self) -> SST_R { + SST_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Source selector for the shadow transfer"] #[inline(always)] #[must_use] - pub fn sst(&mut self) -> SstW { - SstW::new(self, 0) + pub fn sst(&mut self) -> SST_W { + SST_W::new(self, 0) } } #[doc = "HRC next source for shadow\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ssc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ssc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SscSpec; -impl crate::RegisterSpec for SscSpec { +pub struct SSC_SPEC; +impl crate::RegisterSpec for SSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ssc::R`](R) reader structure"] -impl crate::Readable for SscSpec {} +impl crate::Readable for SSC_SPEC {} #[doc = "`write(|w| ..)` method takes [`ssc::W`](W) writer structure"] -impl crate::Writable for SscSpec { +impl crate::Writable for SSC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SSC to value 0"] -impl crate::Resettable for SscSpec { +impl crate::Resettable for SSC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/hrpwm0_hrc0/tsel.rs b/src/hrpwm0_hrc0/tsel.rs index 4e4eef84..e12ff4f5 100644 --- a/src/hrpwm0_hrc0/tsel.rs +++ b/src/hrpwm0_hrc0/tsel.rs @@ -1,68 +1,68 @@ #[doc = "Register `TSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source Selector 0 Timer connection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tsel0 { +pub enum TSEL0_A { #[doc = "0: Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tsel0) -> Self { + fn from(variant: TSEL0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tsel0 { +impl crate::FieldSpec for TSEL0_A { type Ux = u8; } -impl crate::IsEnum for Tsel0 {} +impl crate::IsEnum for TSEL0_A {} #[doc = "Field `TSEL0` reader - Source Selector 0 Timer connection"] -pub type Tsel0R = crate::FieldReader; -impl Tsel0R { +pub type TSEL0_R = crate::FieldReader; +impl TSEL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Tsel0::Value1), - 1 => Some(Tsel0::Value2), - 2 => Some(Tsel0::Value3), - 3 => Some(Tsel0::Value4), + 0 => Some(TSEL0_A::VALUE1), + 1 => Some(TSEL0_A::VALUE2), + 2 => Some(TSEL0_A::VALUE3), + 3 => Some(TSEL0_A::VALUE4), _ => None, } } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsel0::Value1 + *self == TSEL0_A::VALUE1 } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsel0::Value2 + *self == TSEL0_A::VALUE2 } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Tsel0::Value3 + *self == TSEL0_A::VALUE3 } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Tsel0::Value4 + *self == TSEL0_A::VALUE4 } } #[doc = "Field `TSEL0` writer - Source Selector 0 Timer connection"] -pub type Tsel0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Tsel0>; -impl<'a, REG> Tsel0W<'a, REG> +pub type TSEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TSEL0_A>; +impl<'a, REG> TSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsel0::Value1) + self.variant(TSEL0_A::VALUE1) } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsel0::Value2) + self.variant(TSEL0_A::VALUE2) } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Tsel0::Value3) + self.variant(TSEL0_A::VALUE3) } #[doc = "Source Selector 0 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Tsel0::Value4) + self.variant(TSEL0_A::VALUE4) } } #[doc = "Source Selector 1 Timer connection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tsel1 { +pub enum TSEL1_A { #[doc = "0: Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tsel1) -> Self { + fn from(variant: TSEL1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tsel1 { +impl crate::FieldSpec for TSEL1_A { type Ux = u8; } -impl crate::IsEnum for Tsel1 {} +impl crate::IsEnum for TSEL1_A {} #[doc = "Field `TSEL1` reader - Source Selector 1 Timer connection"] -pub type Tsel1R = crate::FieldReader; -impl Tsel1R { +pub type TSEL1_R = crate::FieldReader; +impl TSEL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Tsel1::Value1), - 1 => Some(Tsel1::Value2), - 2 => Some(Tsel1::Value3), - 3 => Some(Tsel1::Value4), + 0 => Some(TSEL1_A::VALUE1), + 1 => Some(TSEL1_A::VALUE2), + 2 => Some(TSEL1_A::VALUE3), + 3 => Some(TSEL1_A::VALUE4), _ => None, } } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsel1::Value1 + *self == TSEL1_A::VALUE1 } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsel1::Value2 + *self == TSEL1_A::VALUE2 } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Tsel1::Value3 + *self == TSEL1_A::VALUE3 } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Tsel1::Value4 + *self == TSEL1_A::VALUE4 } } #[doc = "Field `TSEL1` writer - Source Selector 1 Timer connection"] -pub type Tsel1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Tsel1>; -impl<'a, REG> Tsel1W<'a, REG> +pub type TSEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TSEL1_A>; +impl<'a, REG> TSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,192 +156,192 @@ where #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 0 (CCST0 can be used)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsel1::Value1) + self.variant(TSEL1_A::VALUE1) } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 1 (CCST1 can be used)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsel1::Value2) + self.variant(TSEL1_A::VALUE2) } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 2 (CCST2 can be used)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Tsel1::Value3) + self.variant(TSEL1_A::VALUE3) } #[doc = "Source Selector 1 is connected to Capture/Compare Unit Timer 3 (CCST3 can be used)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Tsel1::Value4) + self.variant(TSEL1_A::VALUE4) } } #[doc = "Source selector 0 TRAP enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ts0e { +pub enum TS0E_A { #[doc = "0: TRAP signal generated from the Timer connected to Source Selector 0 is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP signal generated from the Timer connected to Source Selector 0 is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ts0e) -> Self { + fn from(variant: TS0E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TS0E` reader - Source selector 0 TRAP enable"] -pub type Ts0eR = crate::BitReader; -impl Ts0eR { +pub type TS0E_R = crate::BitReader; +impl TS0E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ts0e { + pub const fn variant(&self) -> TS0E_A { match self.bits { - false => Ts0e::Value1, - true => Ts0e::Value2, + false => TS0E_A::VALUE1, + true => TS0E_A::VALUE2, } } #[doc = "TRAP signal generated from the Timer connected to Source Selector 0 is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ts0e::Value1 + *self == TS0E_A::VALUE1 } #[doc = "TRAP signal generated from the Timer connected to Source Selector 0 is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ts0e::Value2 + *self == TS0E_A::VALUE2 } } #[doc = "Field `TS0E` writer - Source selector 0 TRAP enable"] -pub type Ts0eW<'a, REG> = crate::BitWriter<'a, REG, Ts0e>; -impl<'a, REG> Ts0eW<'a, REG> +pub type TS0E_W<'a, REG> = crate::BitWriter<'a, REG, TS0E_A>; +impl<'a, REG> TS0E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP signal generated from the Timer connected to Source Selector 0 is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ts0e::Value1) + self.variant(TS0E_A::VALUE1) } #[doc = "TRAP signal generated from the Timer connected to Source Selector 0 is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ts0e::Value2) + self.variant(TS0E_A::VALUE2) } } #[doc = "Source selector 1 TRAP enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ts1e { +pub enum TS1E_A { #[doc = "0: TRAP signal generated from the Timer connected to Source Selector 1 is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TRAP signal generated from the Timer connected to Source Selector 1 is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ts1e) -> Self { + fn from(variant: TS1E_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TS1E` reader - Source selector 1 TRAP enable"] -pub type Ts1eR = crate::BitReader; -impl Ts1eR { +pub type TS1E_R = crate::BitReader; +impl TS1E_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ts1e { + pub const fn variant(&self) -> TS1E_A { match self.bits { - false => Ts1e::Value1, - true => Ts1e::Value2, + false => TS1E_A::VALUE1, + true => TS1E_A::VALUE2, } } #[doc = "TRAP signal generated from the Timer connected to Source Selector 1 is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ts1e::Value1 + *self == TS1E_A::VALUE1 } #[doc = "TRAP signal generated from the Timer connected to Source Selector 1 is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ts1e::Value2 + *self == TS1E_A::VALUE2 } } #[doc = "Field `TS1E` writer - Source selector 1 TRAP enable"] -pub type Ts1eW<'a, REG> = crate::BitWriter<'a, REG, Ts1e>; -impl<'a, REG> Ts1eW<'a, REG> +pub type TS1E_W<'a, REG> = crate::BitWriter<'a, REG, TS1E_A>; +impl<'a, REG> TS1E_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TRAP signal generated from the Timer connected to Source Selector 1 is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ts1e::Value1) + self.variant(TS1E_A::VALUE1) } #[doc = "TRAP signal generated from the Timer connected to Source Selector 1 is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ts1e::Value2) + self.variant(TS1E_A::VALUE2) } } impl R { #[doc = "Bits 0:2 - Source Selector 0 Timer connection"] #[inline(always)] - pub fn tsel0(&self) -> Tsel0R { - Tsel0R::new((self.bits & 7) as u8) + pub fn tsel0(&self) -> TSEL0_R { + TSEL0_R::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Source Selector 1 Timer connection"] #[inline(always)] - pub fn tsel1(&self) -> Tsel1R { - Tsel1R::new(((self.bits >> 3) & 7) as u8) + pub fn tsel1(&self) -> TSEL1_R { + TSEL1_R::new(((self.bits >> 3) & 7) as u8) } #[doc = "Bit 16 - Source selector 0 TRAP enable"] #[inline(always)] - pub fn ts0e(&self) -> Ts0eR { - Ts0eR::new(((self.bits >> 16) & 1) != 0) + pub fn ts0e(&self) -> TS0E_R { + TS0E_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Source selector 1 TRAP enable"] #[inline(always)] - pub fn ts1e(&self) -> Ts1eR { - Ts1eR::new(((self.bits >> 17) & 1) != 0) + pub fn ts1e(&self) -> TS1E_R { + TS1E_R::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Source Selector 0 Timer connection"] #[inline(always)] #[must_use] - pub fn tsel0(&mut self) -> Tsel0W { - Tsel0W::new(self, 0) + pub fn tsel0(&mut self) -> TSEL0_W { + TSEL0_W::new(self, 0) } #[doc = "Bits 3:5 - Source Selector 1 Timer connection"] #[inline(always)] #[must_use] - pub fn tsel1(&mut self) -> Tsel1W { - Tsel1W::new(self, 3) + pub fn tsel1(&mut self) -> TSEL1_W { + TSEL1_W::new(self, 3) } #[doc = "Bit 16 - Source selector 0 TRAP enable"] #[inline(always)] #[must_use] - pub fn ts0e(&mut self) -> Ts0eW { - Ts0eW::new(self, 16) + pub fn ts0e(&mut self) -> TS0E_W { + TS0E_W::new(self, 16) } #[doc = "Bit 17 - Source selector 1 TRAP enable"] #[inline(always)] #[must_use] - pub fn ts1e(&mut self) -> Ts1eW { - Ts1eW::new(self, 17) + pub fn ts1e(&mut self) -> TS1E_W { + TS1E_W::new(self, 17) } } #[doc = "HRC timer selection\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TselSpec; -impl crate::RegisterSpec for TselSpec { +pub struct TSEL_SPEC; +impl crate::RegisterSpec for TSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tsel::R`](R) reader structure"] -impl crate::Readable for TselSpec {} +impl crate::Readable for TSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`tsel::W`](W) writer structure"] -impl crate::Writable for TselSpec { +impl crate::Writable for TSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSEL to value 0"] -impl crate::Resettable for TselSpec { +impl crate::Resettable for TSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0.rs b/src/ledts0.rs index 80f8b83e..080588b5 100644 --- a/src/ledts0.rs +++ b/src/ledts0.rs @@ -1,138 +1,127 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, - globctl: Globctl, - fnctl: Fnctl, - evfr: Evfr, - tsval: Tsval, - line0: Line0, - line1: Line1, - ldcmp0: Ldcmp0, - ldcmp1: Ldcmp1, - tscmp0: Tscmp0, - tscmp1: Tscmp1, + id: ID, + globctl: GLOBCTL, + fnctl: FNCTL, + evfr: EVFR, + tsval: TSVAL, + line0: LINE0, + line1: LINE1, + ldcmp0: LDCMP0, + ldcmp1: LDCMP1, + tscmp0: TSCMP0, + tscmp1: TSCMP1, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x04 - Global Control Register"] #[inline(always)] - pub const fn globctl(&self) -> &Globctl { + pub const fn globctl(&self) -> &GLOBCTL { &self.globctl } #[doc = "0x08 - Function Control Register"] #[inline(always)] - pub const fn fnctl(&self) -> &Fnctl { + pub const fn fnctl(&self) -> &FNCTL { &self.fnctl } #[doc = "0x0c - Event Flag Register"] #[inline(always)] - pub const fn evfr(&self) -> &Evfr { + pub const fn evfr(&self) -> &EVFR { &self.evfr } #[doc = "0x10 - Touch-sense TS-Counter Value"] #[inline(always)] - pub const fn tsval(&self) -> &Tsval { + pub const fn tsval(&self) -> &TSVAL { &self.tsval } #[doc = "0x14 - Line Pattern Register 0"] #[inline(always)] - pub const fn line0(&self) -> &Line0 { + pub const fn line0(&self) -> &LINE0 { &self.line0 } #[doc = "0x18 - Line Pattern Register 1"] #[inline(always)] - pub const fn line1(&self) -> &Line1 { + pub const fn line1(&self) -> &LINE1 { &self.line1 } #[doc = "0x1c - LED Compare Register 0"] #[inline(always)] - pub const fn ldcmp0(&self) -> &Ldcmp0 { + pub const fn ldcmp0(&self) -> &LDCMP0 { &self.ldcmp0 } #[doc = "0x20 - LED Compare Register 1"] #[inline(always)] - pub const fn ldcmp1(&self) -> &Ldcmp1 { + pub const fn ldcmp1(&self) -> &LDCMP1 { &self.ldcmp1 } #[doc = "0x24 - Touch-sense Compare Register 0"] #[inline(always)] - pub const fn tscmp0(&self) -> &Tscmp0 { + pub const fn tscmp0(&self) -> &TSCMP0 { &self.tscmp0 } #[doc = "0x28 - Touch-sense Compare Register 1"] #[inline(always)] - pub const fn tscmp1(&self) -> &Tscmp1 { + pub const fn tscmp1(&self) -> &TSCMP1 { &self.tscmp1 } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "GLOBCTL (rw) register accessor: Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globctl`] module"] -#[doc(alias = "GLOBCTL")] -pub type Globctl = crate::Reg; +pub type GLOBCTL = crate::Reg; #[doc = "Global Control Register"] pub mod globctl; #[doc = "FNCTL (rw) register accessor: Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fnctl`] module"] -#[doc(alias = "FNCTL")] -pub type Fnctl = crate::Reg; +pub type FNCTL = crate::Reg; #[doc = "Function Control Register"] pub mod fnctl; #[doc = "EVFR (rw) register accessor: Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evfr`] module"] -#[doc(alias = "EVFR")] -pub type Evfr = crate::Reg; +pub type EVFR = crate::Reg; #[doc = "Event Flag Register"] pub mod evfr; #[doc = "TSVAL (rw) register accessor: Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsval`] module"] -#[doc(alias = "TSVAL")] -pub type Tsval = crate::Reg; +pub type TSVAL = crate::Reg; #[doc = "Touch-sense TS-Counter Value"] pub mod tsval; #[doc = "LINE0 (rw) register accessor: Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line0`] module"] -#[doc(alias = "LINE0")] -pub type Line0 = crate::Reg; +pub type LINE0 = crate::Reg; #[doc = "Line Pattern Register 0"] pub mod line0; #[doc = "LINE1 (rw) register accessor: Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@line1`] module"] -#[doc(alias = "LINE1")] -pub type Line1 = crate::Reg; +pub type LINE1 = crate::Reg; #[doc = "Line Pattern Register 1"] pub mod line1; #[doc = "LDCMP0 (rw) register accessor: LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp0`] module"] -#[doc(alias = "LDCMP0")] -pub type Ldcmp0 = crate::Reg; +pub type LDCMP0 = crate::Reg; #[doc = "LED Compare Register 0"] pub mod ldcmp0; #[doc = "LDCMP1 (rw) register accessor: LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ldcmp1`] module"] -#[doc(alias = "LDCMP1")] -pub type Ldcmp1 = crate::Reg; +pub type LDCMP1 = crate::Reg; #[doc = "LED Compare Register 1"] pub mod ldcmp1; #[doc = "TSCMP0 (rw) register accessor: Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp0`] module"] -#[doc(alias = "TSCMP0")] -pub type Tscmp0 = crate::Reg; +pub type TSCMP0 = crate::Reg; #[doc = "Touch-sense Compare Register 0"] pub mod tscmp0; #[doc = "TSCMP1 (rw) register accessor: Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tscmp1`] module"] -#[doc(alias = "TSCMP1")] -pub type Tscmp1 = crate::Reg; +pub type TSCMP1 = crate::Reg; #[doc = "Touch-sense Compare Register 1"] pub mod tscmp1; diff --git a/src/ledts0/evfr.rs b/src/ledts0/evfr.rs index c22b9d74..c6a204b8 100644 --- a/src/ledts0/evfr.rs +++ b/src/ledts0/evfr.rs @@ -1,198 +1,198 @@ #[doc = "Register `EVFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EVFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSF` reader - Time Slice Interrupt Flag"] -pub type TsfR = crate::BitReader; +pub type TSF_R = crate::BitReader; #[doc = "Field `TFF` reader - (Extended) Time Frame Interrupt Flag"] -pub type TffR = crate::BitReader; +pub type TFF_R = crate::BitReader; #[doc = "Field `TPF` reader - Autoscan Time Period Interrupt Flag"] -pub type TpfR = crate::BitReader; +pub type TPF_R = crate::BitReader; #[doc = "TS-Counter Overflow Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsctrovf { +pub enum TSCTROVF_A { #[doc = "0: No overflow has occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The TS-counter has overflowed at least once."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsctrovf) -> Self { + fn from(variant: TSCTROVF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSCTROVF` reader - TS-Counter Overflow Indication"] -pub type TsctrovfR = crate::BitReader; -impl TsctrovfR { +pub type TSCTROVF_R = crate::BitReader; +impl TSCTROVF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsctrovf { + pub const fn variant(&self) -> TSCTROVF_A { match self.bits { - false => Tsctrovf::Value1, - true => Tsctrovf::Value2, + false => TSCTROVF_A::VALUE1, + true => TSCTROVF_A::VALUE2, } } #[doc = "No overflow has occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsctrovf::Value1 + *self == TSCTROVF_A::VALUE1 } #[doc = "The TS-counter has overflowed at least once."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsctrovf::Value2 + *self == TSCTROVF_A::VALUE2 } } #[doc = "Clear Time Slice Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctsf { +pub enum CTSF_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TSF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctsf) -> Self { + fn from(variant: CTSF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTSF` writer - Clear Time Slice Interrupt Flag"] -pub type CtsfW<'a, REG> = crate::BitWriter<'a, REG, Ctsf>; -impl<'a, REG> CtsfW<'a, REG> +pub type CTSF_W<'a, REG> = crate::BitWriter<'a, REG, CTSF_A>; +impl<'a, REG> CTSF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctsf::Value1) + self.variant(CTSF_A::VALUE1) } #[doc = "Bit TSF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctsf::Value2) + self.variant(CTSF_A::VALUE2) } } #[doc = "Clear (Extended) Time Frame Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctff { +pub enum CTFF_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TFF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctff) -> Self { + fn from(variant: CTFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTFF` writer - Clear (Extended) Time Frame Interrupt Flag"] -pub type CtffW<'a, REG> = crate::BitWriter<'a, REG, Ctff>; -impl<'a, REG> CtffW<'a, REG> +pub type CTFF_W<'a, REG> = crate::BitWriter<'a, REG, CTFF_A>; +impl<'a, REG> CTFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctff::Value1) + self.variant(CTFF_A::VALUE1) } #[doc = "Bit TFF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctff::Value2) + self.variant(CTFF_A::VALUE2) } } #[doc = "Clear Autoscan Time Period Interrupt Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctpf { +pub enum CTPF_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TPF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctpf) -> Self { + fn from(variant: CTPF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTPF` writer - Clear Autoscan Time Period Interrupt Flag"] -pub type CtpfW<'a, REG> = crate::BitWriter<'a, REG, Ctpf>; -impl<'a, REG> CtpfW<'a, REG> +pub type CTPF_W<'a, REG> = crate::BitWriter<'a, REG, CTPF_A>; +impl<'a, REG> CTPF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctpf::Value1) + self.variant(CTPF_A::VALUE1) } #[doc = "Bit TPF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctpf::Value2) + self.variant(CTPF_A::VALUE2) } } impl R { #[doc = "Bit 0 - Time Slice Interrupt Flag"] #[inline(always)] - pub fn tsf(&self) -> TsfR { - TsfR::new((self.bits & 1) != 0) + pub fn tsf(&self) -> TSF_R { + TSF_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - (Extended) Time Frame Interrupt Flag"] #[inline(always)] - pub fn tff(&self) -> TffR { - TffR::new(((self.bits >> 1) & 1) != 0) + pub fn tff(&self) -> TFF_R { + TFF_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Autoscan Time Period Interrupt Flag"] #[inline(always)] - pub fn tpf(&self) -> TpfR { - TpfR::new(((self.bits >> 2) & 1) != 0) + pub fn tpf(&self) -> TPF_R { + TPF_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - TS-Counter Overflow Indication"] #[inline(always)] - pub fn tsctrovf(&self) -> TsctrovfR { - TsctrovfR::new(((self.bits >> 3) & 1) != 0) + pub fn tsctrovf(&self) -> TSCTROVF_R { + TSCTROVF_R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 16 - Clear Time Slice Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctsf(&mut self) -> CtsfW { - CtsfW::new(self, 16) + pub fn ctsf(&mut self) -> CTSF_W { + CTSF_W::new(self, 16) } #[doc = "Bit 17 - Clear (Extended) Time Frame Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctff(&mut self) -> CtffW { - CtffW::new(self, 17) + pub fn ctff(&mut self) -> CTFF_W { + CTFF_W::new(self, 17) } #[doc = "Bit 18 - Clear Autoscan Time Period Interrupt Flag"] #[inline(always)] #[must_use] - pub fn ctpf(&mut self) -> CtpfW { - CtpfW::new(self, 18) + pub fn ctpf(&mut self) -> CTPF_W { + CTPF_W::new(self, 18) } } #[doc = "Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`evfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EvfrSpec; -impl crate::RegisterSpec for EvfrSpec { +pub struct EVFR_SPEC; +impl crate::RegisterSpec for EVFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`evfr::R`](R) reader structure"] -impl crate::Readable for EvfrSpec {} +impl crate::Readable for EVFR_SPEC {} #[doc = "`write(|w| ..)` method takes [`evfr::W`](W) writer structure"] -impl crate::Writable for EvfrSpec { +impl crate::Writable for EVFR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EVFR to value 0"] -impl crate::Resettable for EvfrSpec { +impl crate::Resettable for EVFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/fnctl.rs b/src/ledts0/fnctl.rs index 60726018..51a192de 100644 --- a/src/ledts0/fnctl.rs +++ b/src/ledts0/fnctl.rs @@ -1,52 +1,52 @@ #[doc = "Register `FNCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FNCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Touch-Sense TSIN Pad Turn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Padt { +pub enum PADT_A { #[doc = "0: TSIN0"] - Value1 = 0, + VALUE1 = 0, #[doc = "7: TSIN7"] - Value2 = 7, + VALUE2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Padt) -> Self { + fn from(variant: PADT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Padt { +impl crate::FieldSpec for PADT_A { type Ux = u8; } -impl crate::IsEnum for Padt {} +impl crate::IsEnum for PADT_A {} #[doc = "Field `PADT` reader - Touch-Sense TSIN Pad Turn"] -pub type PadtR = crate::FieldReader; -impl PadtR { +pub type PADT_R = crate::FieldReader; +impl PADT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Padt::Value1), - 7 => Some(Padt::Value2), + 0 => Some(PADT_A::VALUE1), + 7 => Some(PADT_A::VALUE2), _ => None, } } #[doc = "TSIN0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Padt::Value1 + *self == PADT_A::VALUE1 } #[doc = "TSIN7"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Padt::Value2 + *self == PADT_A::VALUE2 } } #[doc = "Field `PADT` writer - Touch-Sense TSIN Pad Turn"] -pub type PadtW<'a, REG> = crate::FieldWriter<'a, REG, 3, Padt>; -impl<'a, REG> PadtW<'a, REG> +pub type PADT_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PADT_A>; +impl<'a, REG> PADT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,108 +54,108 @@ where #[doc = "TSIN0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Padt::Value1) + self.variant(PADT_A::VALUE1) } #[doc = "TSIN7"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Padt::Value2) + self.variant(PADT_A::VALUE2) } } #[doc = "Software Control for Touch-Sense Pad Turn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Padtsw { +pub enum PADTSW_A { #[doc = "0: The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Padtsw) -> Self { + fn from(variant: PADTSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PADTSW` reader - Software Control for Touch-Sense Pad Turn"] -pub type PadtswR = crate::BitReader; -impl PadtswR { +pub type PADTSW_R = crate::BitReader; +impl PADTSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Padtsw { + pub const fn variant(&self) -> PADTSW_A { match self.bits { - false => Padtsw::Value1, - true => Padtsw::Value2, + false => PADTSW_A::VALUE1, + true => PADTSW_A::VALUE2, } } #[doc = "The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Padtsw::Value1 + *self == PADTSW_A::VALUE1 } #[doc = "Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Padtsw::Value2 + *self == PADTSW_A::VALUE2 } } #[doc = "Field `PADTSW` writer - Software Control for Touch-Sense Pad Turn"] -pub type PadtswW<'a, REG> = crate::BitWriter<'a, REG, Padtsw>; -impl<'a, REG> PadtswW<'a, REG> +pub type PADTSW_W<'a, REG> = crate::BitWriter<'a, REG, PADTSW_A>; +impl<'a, REG> PADTSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The hardware automatically enables the touch-sense inputs in sequence round-robin, starting from TSIN0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Padtsw::Value1) + self.variant(PADTSW_A::VALUE1) } #[doc = "Disable hardware control for software control only. The touch-sense input is configured in bit PADT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Padtsw::Value2) + self.variant(PADTSW_A::VALUE2) } } #[doc = "Enable External Pull-up Configuration on Pin COLA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Epull { +pub enum EPULL_A { #[doc = "0: HW over-rule to enable internal pull-up is active on TSIN\\[x\\] for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Epull) -> Self { + fn from(variant: EPULL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EPULL` reader - Enable External Pull-up Configuration on Pin COLA"] -pub type EpullR = crate::BitReader; -impl EpullR { +pub type EPULL_R = crate::BitReader; +impl EPULL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Epull { + pub const fn variant(&self) -> EPULL_A { match self.bits { - false => Epull::Value1, - true => Epull::Value2, + false => EPULL_A::VALUE1, + true => EPULL_A::VALUE2, } } #[doc = "HW over-rule to enable internal pull-up is active on TSIN\\[x\\] for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Epull::Value1 + *self == EPULL_A::VALUE1 } #[doc = "Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Epull::Value2 + *self == EPULL_A::VALUE2 } } #[doc = "Field `EPULL` writer - Enable External Pull-up Configuration on Pin COLA"] -pub type EpullW<'a, REG> = crate::BitWriter<'a, REG, Epull>; -impl<'a, REG> EpullW<'a, REG> +pub type EPULL_W<'a, REG> = crate::BitWriter<'a, REG, EPULL_A>; +impl<'a, REG> EPULL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -163,69 +163,69 @@ where for set duration in touch-sense time slice. With this setting, it is not specified to assign the COLA to any pin."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Epull::Value1) + self.variant(EPULL_A::VALUE1) } #[doc = "Enable external pull-up: Output 1 on pin COLA for whole duration of touch-sense time slice."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Epull::Value2) + self.variant(EPULL_A::VALUE2) } } #[doc = "Field `FNCOL` reader - Previous Active Function/LED Column Status"] -pub type FncolR = crate::FieldReader; +pub type FNCOL_R = crate::FieldReader; #[doc = "Accumulate Count on Touch-Sense Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Acccnt { +pub enum ACCCNT_A { #[doc = "0: 1 time"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 2 times"] - Value2 = 1, + VALUE2 = 1, #[doc = "15: 16 times"] - Value3 = 15, + VALUE3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Acccnt) -> Self { + fn from(variant: ACCCNT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Acccnt { +impl crate::FieldSpec for ACCCNT_A { type Ux = u8; } -impl crate::IsEnum for Acccnt {} +impl crate::IsEnum for ACCCNT_A {} #[doc = "Field `ACCCNT` reader - Accumulate Count on Touch-Sense Input"] -pub type AcccntR = crate::FieldReader; -impl AcccntR { +pub type ACCCNT_R = crate::FieldReader; +impl ACCCNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Acccnt::Value1), - 1 => Some(Acccnt::Value2), - 15 => Some(Acccnt::Value3), + 0 => Some(ACCCNT_A::VALUE1), + 1 => Some(ACCCNT_A::VALUE2), + 15 => Some(ACCCNT_A::VALUE3), _ => None, } } #[doc = "1 time"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Acccnt::Value1 + *self == ACCCNT_A::VALUE1 } #[doc = "2 times"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Acccnt::Value2 + *self == ACCCNT_A::VALUE2 } #[doc = "16 times"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Acccnt::Value3 + *self == ACCCNT_A::VALUE3 } } #[doc = "Field `ACCCNT` writer - Accumulate Count on Touch-Sense Input"] -pub type AcccntW<'a, REG> = crate::FieldWriter<'a, REG, 4, Acccnt>; -impl<'a, REG> AcccntW<'a, REG> +pub type ACCCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 4, ACCCNT_A>; +impl<'a, REG> ACCCNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -233,133 +233,133 @@ where #[doc = "1 time"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Acccnt::Value1) + self.variant(ACCCNT_A::VALUE1) } #[doc = "2 times"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Acccnt::Value2) + self.variant(ACCCNT_A::VALUE2) } #[doc = "16 times"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Acccnt::Value3) + self.variant(ACCCNT_A::VALUE3) } } #[doc = "Common Compare Enable for Touch-Sense\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsccmp { +pub enum TSCCMP_A { #[doc = "0: Disable common compare for touch-sense"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable common compare for touch-sense"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsccmp) -> Self { + fn from(variant: TSCCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSCCMP` reader - Common Compare Enable for Touch-Sense"] -pub type TsccmpR = crate::BitReader; -impl TsccmpR { +pub type TSCCMP_R = crate::BitReader; +impl TSCCMP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsccmp { + pub const fn variant(&self) -> TSCCMP_A { match self.bits { - false => Tsccmp::Value1, - true => Tsccmp::Value2, + false => TSCCMP_A::VALUE1, + true => TSCCMP_A::VALUE2, } } #[doc = "Disable common compare for touch-sense"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsccmp::Value1 + *self == TSCCMP_A::VALUE1 } #[doc = "Enable common compare for touch-sense"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsccmp::Value2 + *self == TSCCMP_A::VALUE2 } } #[doc = "Field `TSCCMP` writer - Common Compare Enable for Touch-Sense"] -pub type TsccmpW<'a, REG> = crate::BitWriter<'a, REG, Tsccmp>; -impl<'a, REG> TsccmpW<'a, REG> +pub type TSCCMP_W<'a, REG> = crate::BitWriter<'a, REG, TSCCMP_A>; +impl<'a, REG> TSCCMP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable common compare for touch-sense"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsccmp::Value1) + self.variant(TSCCMP_A::VALUE1) } #[doc = "Enable common compare for touch-sense"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsccmp::Value2) + self.variant(TSCCMP_A::VALUE2) } } #[doc = "Extension for Touch-Sense Output for Pin-Low-Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tsoext { +pub enum TSOEXT_A { #[doc = "0: Extend by 1 ledts_clk"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Extend by 4 ledts_clk"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Extend by 8 ledts_clk"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Extend by 16 ledts_clk"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tsoext) -> Self { + fn from(variant: TSOEXT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tsoext { +impl crate::FieldSpec for TSOEXT_A { type Ux = u8; } -impl crate::IsEnum for Tsoext {} +impl crate::IsEnum for TSOEXT_A {} #[doc = "Field `TSOEXT` reader - Extension for Touch-Sense Output for Pin-Low-Level"] -pub type TsoextR = crate::FieldReader; -impl TsoextR { +pub type TSOEXT_R = crate::FieldReader; +impl TSOEXT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsoext { + pub const fn variant(&self) -> TSOEXT_A { match self.bits { - 0 => Tsoext::Value1, - 1 => Tsoext::Value2, - 2 => Tsoext::Value3, - 3 => Tsoext::Value4, + 0 => TSOEXT_A::VALUE1, + 1 => TSOEXT_A::VALUE2, + 2 => TSOEXT_A::VALUE3, + 3 => TSOEXT_A::VALUE4, _ => unreachable!(), } } #[doc = "Extend by 1 ledts_clk"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsoext::Value1 + *self == TSOEXT_A::VALUE1 } #[doc = "Extend by 4 ledts_clk"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsoext::Value2 + *self == TSOEXT_A::VALUE2 } #[doc = "Extend by 8 ledts_clk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Tsoext::Value3 + *self == TSOEXT_A::VALUE3 } #[doc = "Extend by 16 ledts_clk"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Tsoext::Value4 + *self == TSOEXT_A::VALUE4 } } #[doc = "Field `TSOEXT` writer - Extension for Touch-Sense Output for Pin-Low-Level"] -pub type TsoextW<'a, REG> = crate::FieldWriter<'a, REG, 2, Tsoext, crate::Safe>; -impl<'a, REG> TsoextW<'a, REG> +pub type TSOEXT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TSOEXT_A, crate::Safe>; +impl<'a, REG> TSOEXT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -367,175 +367,175 @@ where #[doc = "Extend by 1 ledts_clk"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsoext::Value1) + self.variant(TSOEXT_A::VALUE1) } #[doc = "Extend by 4 ledts_clk"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsoext::Value2) + self.variant(TSOEXT_A::VALUE2) } #[doc = "Extend by 8 ledts_clk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Tsoext::Value3) + self.variant(TSOEXT_A::VALUE3) } #[doc = "Extend by 16 ledts_clk"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Tsoext::Value4) + self.variant(TSOEXT_A::VALUE4) } } #[doc = "TS-Counter Auto Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsctrr { +pub enum TSCTRR_A { #[doc = "0: Disable TS-counter automatic reset"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsctrr) -> Self { + fn from(variant: TSCTRR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSCTRR` reader - TS-Counter Auto Reset"] -pub type TsctrrR = crate::BitReader; -impl TsctrrR { +pub type TSCTRR_R = crate::BitReader; +impl TSCTRR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsctrr { + pub const fn variant(&self) -> TSCTRR_A { match self.bits { - false => Tsctrr::Value1, - true => Tsctrr::Value2, + false => TSCTRR_A::VALUE1, + true => TSCTRR_A::VALUE2, } } #[doc = "Disable TS-counter automatic reset"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsctrr::Value1 + *self == TSCTRR_A::VALUE1 } #[doc = "Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsctrr::Value2 + *self == TSCTRR_A::VALUE2 } } #[doc = "Field `TSCTRR` writer - TS-Counter Auto Reset"] -pub type TsctrrW<'a, REG> = crate::BitWriter<'a, REG, Tsctrr>; -impl<'a, REG> TsctrrW<'a, REG> +pub type TSCTRR_W<'a, REG> = crate::BitWriter<'a, REG, TSCTRR_A>; +impl<'a, REG> TSCTRR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable TS-counter automatic reset"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsctrr::Value1) + self.variant(TSCTRR_A::VALUE1) } #[doc = "Enable TS-counter automatic reset to 00H on the first pad turn of a new TSIN\\[x\\]. Triggered on compare match in time slice."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsctrr::Value2) + self.variant(TSCTRR_A::VALUE2) } } #[doc = "Saturation of TS-Counter\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsctrsat { +pub enum TSCTRSAT_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsctrsat) -> Self { + fn from(variant: TSCTRSAT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSCTRSAT` reader - Saturation of TS-Counter"] -pub type TsctrsatR = crate::BitReader; -impl TsctrsatR { +pub type TSCTRSAT_R = crate::BitReader; +impl TSCTRSAT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsctrsat { + pub const fn variant(&self) -> TSCTRSAT_A { match self.bits { - false => Tsctrsat::Value1, - true => Tsctrsat::Value2, + false => TSCTRSAT_A::VALUE1, + true => TSCTRSAT_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsctrsat::Value1 + *self == TSCTRSAT_A::VALUE1 } #[doc = "Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsctrsat::Value2 + *self == TSCTRSAT_A::VALUE2 } } #[doc = "Field `TSCTRSAT` writer - Saturation of TS-Counter"] -pub type TsctrsatW<'a, REG> = crate::BitWriter<'a, REG, Tsctrsat>; -impl<'a, REG> TsctrsatW<'a, REG> +pub type TSCTRSAT_W<'a, REG> = crate::BitWriter<'a, REG, TSCTRSAT_A>; +impl<'a, REG> TSCTRSAT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsctrsat::Value1) + self.variant(TSCTRSAT_A::VALUE1) } #[doc = "Enable. TS-counter stops counting in the touch-sense time slice(s) of the same (extended) frame when it reaches FFH. Counter starts to count again on the first pad turn of a new TSIN\\[x\\], triggered on compare match."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsctrsat::Value2) + self.variant(TSCTRSAT_A::VALUE2) } } #[doc = "Number of Touch-Sense Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NrTsin { +pub enum NR_TSIN_A { #[doc = "0: 1"] - Value1 = 0, + VALUE1 = 0, #[doc = "7: 8"] - Value2 = 7, + VALUE2 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NrTsin) -> Self { + fn from(variant: NR_TSIN_A) -> Self { variant as _ } } -impl crate::FieldSpec for NrTsin { +impl crate::FieldSpec for NR_TSIN_A { type Ux = u8; } -impl crate::IsEnum for NrTsin {} +impl crate::IsEnum for NR_TSIN_A {} #[doc = "Field `NR_TSIN` reader - Number of Touch-Sense Input"] -pub type NrTsinR = crate::FieldReader; -impl NrTsinR { +pub type NR_TSIN_R = crate::FieldReader; +impl NR_TSIN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(NrTsin::Value1), - 7 => Some(NrTsin::Value2), + 0 => Some(NR_TSIN_A::VALUE1), + 7 => Some(NR_TSIN_A::VALUE2), _ => None, } } #[doc = "1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NrTsin::Value1 + *self == NR_TSIN_A::VALUE1 } #[doc = "8"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NrTsin::Value2 + *self == NR_TSIN_A::VALUE2 } } #[doc = "Field `NR_TSIN` writer - Number of Touch-Sense Input"] -pub type NrTsinW<'a, REG> = crate::FieldWriter<'a, REG, 3, NrTsin>; -impl<'a, REG> NrTsinW<'a, REG> +pub type NR_TSIN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, NR_TSIN_A>; +impl<'a, REG> NR_TSIN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -543,160 +543,160 @@ where #[doc = "1"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NrTsin::Value1) + self.variant(NR_TSIN_A::VALUE1) } #[doc = "8"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NrTsin::Value2) + self.variant(NR_TSIN_A::VALUE2) } } #[doc = "Active Level of LED Column\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Collev { +pub enum COLLEV_A { #[doc = "0: Active low"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active high"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Collev) -> Self { + fn from(variant: COLLEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `COLLEV` reader - Active Level of LED Column"] -pub type CollevR = crate::BitReader; -impl CollevR { +pub type COLLEV_R = crate::BitReader; +impl COLLEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Collev { + pub const fn variant(&self) -> COLLEV_A { match self.bits { - false => Collev::Value1, - true => Collev::Value2, + false => COLLEV_A::VALUE1, + true => COLLEV_A::VALUE2, } } #[doc = "Active low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Collev::Value1 + *self == COLLEV_A::VALUE1 } #[doc = "Active high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Collev::Value2 + *self == COLLEV_A::VALUE2 } } #[doc = "Field `COLLEV` writer - Active Level of LED Column"] -pub type CollevW<'a, REG> = crate::BitWriter<'a, REG, Collev>; -impl<'a, REG> CollevW<'a, REG> +pub type COLLEV_W<'a, REG> = crate::BitWriter<'a, REG, COLLEV_A>; +impl<'a, REG> COLLEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Active low"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Collev::Value1) + self.variant(COLLEV_A::VALUE1) } #[doc = "Active high"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Collev::Value2) + self.variant(COLLEV_A::VALUE2) } } #[doc = "Number of LED Columns\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum NrLedcol { +pub enum NR_LEDCOL_A { #[doc = "0: 1 LED column"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 2 LED columns"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 3 LED columns"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 4 LED columns"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: 5 LED columns"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: 6 LED columns"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: 7 LED columns"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: 8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: NrLedcol) -> Self { + fn from(variant: NR_LEDCOL_A) -> Self { variant as _ } } -impl crate::FieldSpec for NrLedcol { +impl crate::FieldSpec for NR_LEDCOL_A { type Ux = u8; } -impl crate::IsEnum for NrLedcol {} +impl crate::IsEnum for NR_LEDCOL_A {} #[doc = "Field `NR_LEDCOL` reader - Number of LED Columns"] -pub type NrLedcolR = crate::FieldReader; -impl NrLedcolR { +pub type NR_LEDCOL_R = crate::FieldReader; +impl NR_LEDCOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NrLedcol { + pub const fn variant(&self) -> NR_LEDCOL_A { match self.bits { - 0 => NrLedcol::Value1, - 1 => NrLedcol::Value2, - 2 => NrLedcol::Value3, - 3 => NrLedcol::Value4, - 4 => NrLedcol::Value5, - 5 => NrLedcol::Value6, - 6 => NrLedcol::Value7, - 7 => NrLedcol::Value8, + 0 => NR_LEDCOL_A::VALUE1, + 1 => NR_LEDCOL_A::VALUE2, + 2 => NR_LEDCOL_A::VALUE3, + 3 => NR_LEDCOL_A::VALUE4, + 4 => NR_LEDCOL_A::VALUE5, + 5 => NR_LEDCOL_A::VALUE6, + 6 => NR_LEDCOL_A::VALUE7, + 7 => NR_LEDCOL_A::VALUE8, _ => unreachable!(), } } #[doc = "1 LED column"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NrLedcol::Value1 + *self == NR_LEDCOL_A::VALUE1 } #[doc = "2 LED columns"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NrLedcol::Value2 + *self == NR_LEDCOL_A::VALUE2 } #[doc = "3 LED columns"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == NrLedcol::Value3 + *self == NR_LEDCOL_A::VALUE3 } #[doc = "4 LED columns"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == NrLedcol::Value4 + *self == NR_LEDCOL_A::VALUE4 } #[doc = "5 LED columns"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == NrLedcol::Value5 + *self == NR_LEDCOL_A::VALUE5 } #[doc = "6 LED columns"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == NrLedcol::Value6 + *self == NR_LEDCOL_A::VALUE6 } #[doc = "7 LED columns"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == NrLedcol::Value7 + *self == NR_LEDCOL_A::VALUE7 } #[doc = "8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == NrLedcol::Value8 + *self == NR_LEDCOL_A::VALUE8 } } #[doc = "Field `NR_LEDCOL` writer - Number of LED Columns"] -pub type NrLedcolW<'a, REG> = crate::FieldWriter<'a, REG, 3, NrLedcol, crate::Safe>; -impl<'a, REG> NrLedcolW<'a, REG> +pub type NR_LEDCOL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, NR_LEDCOL_A, crate::Safe>; +impl<'a, REG> NR_LEDCOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -704,188 +704,188 @@ where #[doc = "1 LED column"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value1) + self.variant(NR_LEDCOL_A::VALUE1) } #[doc = "2 LED columns"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value2) + self.variant(NR_LEDCOL_A::VALUE2) } #[doc = "3 LED columns"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value3) + self.variant(NR_LEDCOL_A::VALUE3) } #[doc = "4 LED columns"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value4) + self.variant(NR_LEDCOL_A::VALUE4) } #[doc = "5 LED columns"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value5) + self.variant(NR_LEDCOL_A::VALUE5) } #[doc = "6 LED columns"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value6) + self.variant(NR_LEDCOL_A::VALUE6) } #[doc = "7 LED columns"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value7) + self.variant(NR_LEDCOL_A::VALUE7) } #[doc = "8 LED columns (max. LED columns = 7 if bit TS_EN = 1)"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(NrLedcol::Value8) + self.variant(NR_LEDCOL_A::VALUE8) } } impl R { #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"] #[inline(always)] - pub fn padt(&self) -> PadtR { - PadtR::new((self.bits & 7) as u8) + pub fn padt(&self) -> PADT_R { + PADT_R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"] #[inline(always)] - pub fn padtsw(&self) -> PadtswR { - PadtswR::new(((self.bits >> 3) & 1) != 0) + pub fn padtsw(&self) -> PADTSW_R { + PADTSW_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"] #[inline(always)] - pub fn epull(&self) -> EpullR { - EpullR::new(((self.bits >> 4) & 1) != 0) + pub fn epull(&self) -> EPULL_R { + EPULL_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Previous Active Function/LED Column Status"] #[inline(always)] - pub fn fncol(&self) -> FncolR { - FncolR::new(((self.bits >> 5) & 7) as u8) + pub fn fncol(&self) -> FNCOL_R { + FNCOL_R::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"] #[inline(always)] - pub fn acccnt(&self) -> AcccntR { - AcccntR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn acccnt(&self) -> ACCCNT_R { + ACCCNT_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"] #[inline(always)] - pub fn tsccmp(&self) -> TsccmpR { - TsccmpR::new(((self.bits >> 20) & 1) != 0) + pub fn tsccmp(&self) -> TSCCMP_R { + TSCCMP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"] #[inline(always)] - pub fn tsoext(&self) -> TsoextR { - TsoextR::new(((self.bits >> 21) & 3) as u8) + pub fn tsoext(&self) -> TSOEXT_R { + TSOEXT_R::new(((self.bits >> 21) & 3) as u8) } #[doc = "Bit 23 - TS-Counter Auto Reset"] #[inline(always)] - pub fn tsctrr(&self) -> TsctrrR { - TsctrrR::new(((self.bits >> 23) & 1) != 0) + pub fn tsctrr(&self) -> TSCTRR_R { + TSCTRR_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Saturation of TS-Counter"] #[inline(always)] - pub fn tsctrsat(&self) -> TsctrsatR { - TsctrsatR::new(((self.bits >> 24) & 1) != 0) + pub fn tsctrsat(&self) -> TSCTRSAT_R { + TSCTRSAT_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:27 - Number of Touch-Sense Input"] #[inline(always)] - pub fn nr_tsin(&self) -> NrTsinR { - NrTsinR::new(((self.bits >> 25) & 7) as u8) + pub fn nr_tsin(&self) -> NR_TSIN_R { + NR_TSIN_R::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bit 28 - Active Level of LED Column"] #[inline(always)] - pub fn collev(&self) -> CollevR { - CollevR::new(((self.bits >> 28) & 1) != 0) + pub fn collev(&self) -> COLLEV_R { + COLLEV_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bits 29:31 - Number of LED Columns"] #[inline(always)] - pub fn nr_ledcol(&self) -> NrLedcolR { - NrLedcolR::new(((self.bits >> 29) & 7) as u8) + pub fn nr_ledcol(&self) -> NR_LEDCOL_R { + NR_LEDCOL_R::new(((self.bits >> 29) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"] #[inline(always)] #[must_use] - pub fn padt(&mut self) -> PadtW { - PadtW::new(self, 0) + pub fn padt(&mut self) -> PADT_W { + PADT_W::new(self, 0) } #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"] #[inline(always)] #[must_use] - pub fn padtsw(&mut self) -> PadtswW { - PadtswW::new(self, 3) + pub fn padtsw(&mut self) -> PADTSW_W { + PADTSW_W::new(self, 3) } #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"] #[inline(always)] #[must_use] - pub fn epull(&mut self) -> EpullW { - EpullW::new(self, 4) + pub fn epull(&mut self) -> EPULL_W { + EPULL_W::new(self, 4) } #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"] #[inline(always)] #[must_use] - pub fn acccnt(&mut self) -> AcccntW { - AcccntW::new(self, 16) + pub fn acccnt(&mut self) -> ACCCNT_W { + ACCCNT_W::new(self, 16) } #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"] #[inline(always)] #[must_use] - pub fn tsccmp(&mut self) -> TsccmpW { - TsccmpW::new(self, 20) + pub fn tsccmp(&mut self) -> TSCCMP_W { + TSCCMP_W::new(self, 20) } #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"] #[inline(always)] #[must_use] - pub fn tsoext(&mut self) -> TsoextW { - TsoextW::new(self, 21) + pub fn tsoext(&mut self) -> TSOEXT_W { + TSOEXT_W::new(self, 21) } #[doc = "Bit 23 - TS-Counter Auto Reset"] #[inline(always)] #[must_use] - pub fn tsctrr(&mut self) -> TsctrrW { - TsctrrW::new(self, 23) + pub fn tsctrr(&mut self) -> TSCTRR_W { + TSCTRR_W::new(self, 23) } #[doc = "Bit 24 - Saturation of TS-Counter"] #[inline(always)] #[must_use] - pub fn tsctrsat(&mut self) -> TsctrsatW { - TsctrsatW::new(self, 24) + pub fn tsctrsat(&mut self) -> TSCTRSAT_W { + TSCTRSAT_W::new(self, 24) } #[doc = "Bits 25:27 - Number of Touch-Sense Input"] #[inline(always)] #[must_use] - pub fn nr_tsin(&mut self) -> NrTsinW { - NrTsinW::new(self, 25) + pub fn nr_tsin(&mut self) -> NR_TSIN_W { + NR_TSIN_W::new(self, 25) } #[doc = "Bit 28 - Active Level of LED Column"] #[inline(always)] #[must_use] - pub fn collev(&mut self) -> CollevW { - CollevW::new(self, 28) + pub fn collev(&mut self) -> COLLEV_W { + COLLEV_W::new(self, 28) } #[doc = "Bits 29:31 - Number of LED Columns"] #[inline(always)] #[must_use] - pub fn nr_ledcol(&mut self) -> NrLedcolW { - NrLedcolW::new(self, 29) + pub fn nr_ledcol(&mut self) -> NR_LEDCOL_W { + NR_LEDCOL_W::new(self, 29) } } #[doc = "Function Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fnctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fnctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FnctlSpec; -impl crate::RegisterSpec for FnctlSpec { +pub struct FNCTL_SPEC; +impl crate::RegisterSpec for FNCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fnctl::R`](R) reader structure"] -impl crate::Readable for FnctlSpec {} +impl crate::Readable for FNCTL_SPEC {} #[doc = "`write(|w| ..)` method takes [`fnctl::W`](W) writer structure"] -impl crate::Writable for FnctlSpec { +impl crate::Writable for FNCTL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FNCTL to value 0"] -impl crate::Resettable for FnctlSpec { +impl crate::Resettable for FNCTL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/globctl.rs b/src/ledts0/globctl.rs index b4aed865..25ba745b 100644 --- a/src/ledts0/globctl.rs +++ b/src/ledts0/globctl.rs @@ -1,227 +1,227 @@ #[doc = "Register `GLOBCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TS_EN` reader - Touch-Sense Function Enable"] -pub type TsEnR = crate::BitReader; +pub type TS_EN_R = crate::BitReader; #[doc = "Field `TS_EN` writer - Touch-Sense Function Enable"] -pub type TsEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TS_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `LD_EN` reader - LED Function Enable"] -pub type LdEnR = crate::BitReader; +pub type LD_EN_R = crate::BitReader; #[doc = "Field `LD_EN` writer - LED Function Enable"] -pub type LdEnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type LD_EN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Clock Master Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cmtr { +pub enum CMTR_A { #[doc = "0: Kernel generates its own clock for LEDTS-counter based on SFR setting"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: LEDTS-counter takes its clock from another master kernel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cmtr) -> Self { + fn from(variant: CMTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CMTR` reader - Clock Master Disable"] -pub type CmtrR = crate::BitReader; -impl CmtrR { +pub type CMTR_R = crate::BitReader; +impl CMTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cmtr { + pub const fn variant(&self) -> CMTR_A { match self.bits { - false => Cmtr::Value1, - true => Cmtr::Value2, + false => CMTR_A::VALUE1, + true => CMTR_A::VALUE2, } } #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmtr::Value1 + *self == CMTR_A::VALUE1 } #[doc = "LEDTS-counter takes its clock from another master kernel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmtr::Value2 + *self == CMTR_A::VALUE2 } } #[doc = "Field `CMTR` writer - Clock Master Disable"] -pub type CmtrW<'a, REG> = crate::BitWriter<'a, REG, Cmtr>; -impl<'a, REG> CmtrW<'a, REG> +pub type CMTR_W<'a, REG> = crate::BitWriter<'a, REG, CMTR_A>; +impl<'a, REG> CMTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Kernel generates its own clock for LEDTS-counter based on SFR setting"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmtr::Value1) + self.variant(CMTR_A::VALUE1) } #[doc = "LEDTS-counter takes its clock from another master kernel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmtr::Value2) + self.variant(CMTR_A::VALUE2) } } #[doc = "Enable Autoscan Time Period Synchronization\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ensync { +pub enum ENSYNC_A { #[doc = "0: No synchronization"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Synchronization enabled on Kernel0 autoscan time period"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ensync) -> Self { + fn from(variant: ENSYNC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSYNC` reader - Enable Autoscan Time Period Synchronization"] -pub type EnsyncR = crate::BitReader; -impl EnsyncR { +pub type ENSYNC_R = crate::BitReader; +impl ENSYNC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ensync { + pub const fn variant(&self) -> ENSYNC_A { match self.bits { - false => Ensync::Value1, - true => Ensync::Value2, + false => ENSYNC_A::VALUE1, + true => ENSYNC_A::VALUE2, } } #[doc = "No synchronization"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ensync::Value1 + *self == ENSYNC_A::VALUE1 } #[doc = "Synchronization enabled on Kernel0 autoscan time period"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ensync::Value2 + *self == ENSYNC_A::VALUE2 } } #[doc = "Field `ENSYNC` writer - Enable Autoscan Time Period Synchronization"] -pub type EnsyncW<'a, REG> = crate::BitWriter<'a, REG, Ensync>; -impl<'a, REG> EnsyncW<'a, REG> +pub type ENSYNC_W<'a, REG> = crate::BitWriter<'a, REG, ENSYNC_A>; +impl<'a, REG> ENSYNC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No synchronization"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ensync::Value1) + self.variant(ENSYNC_A::VALUE1) } #[doc = "Synchronization enabled on Kernel0 autoscan time period"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ensync::Value2) + self.variant(ENSYNC_A::VALUE2) } } #[doc = "Suspend Request Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Suscfg { +pub enum SUSCFG_A { #[doc = "0: Ignore suspend request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable suspend according to request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Suscfg) -> Self { + fn from(variant: SUSCFG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SUSCFG` reader - Suspend Request Configuration"] -pub type SuscfgR = crate::BitReader; -impl SuscfgR { +pub type SUSCFG_R = crate::BitReader; +impl SUSCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Suscfg { + pub const fn variant(&self) -> SUSCFG_A { match self.bits { - false => Suscfg::Value1, - true => Suscfg::Value2, + false => SUSCFG_A::VALUE1, + true => SUSCFG_A::VALUE2, } } #[doc = "Ignore suspend request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Suscfg::Value1 + *self == SUSCFG_A::VALUE1 } #[doc = "Enable suspend according to request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Suscfg::Value2 + *self == SUSCFG_A::VALUE2 } } #[doc = "Field `SUSCFG` writer - Suspend Request Configuration"] -pub type SuscfgW<'a, REG> = crate::BitWriter<'a, REG, Suscfg>; -impl<'a, REG> SuscfgW<'a, REG> +pub type SUSCFG_W<'a, REG> = crate::BitWriter<'a, REG, SUSCFG_A>; +impl<'a, REG> SUSCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore suspend request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Suscfg::Value1) + self.variant(SUSCFG_A::VALUE1) } #[doc = "Enable suspend according to request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Suscfg::Value2) + self.variant(SUSCFG_A::VALUE2) } } #[doc = "Mask Number of LSB Bits for Event Validation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Maskval { +pub enum MASKVAL_A { #[doc = "0: Mask LSB bit"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Mask 2 LSB bits"] - Value2 = 1, + VALUE2 = 1, #[doc = "7: Mask 8 LSB bits"] - Value3 = 7, + VALUE3 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Maskval) -> Self { + fn from(variant: MASKVAL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Maskval { +impl crate::FieldSpec for MASKVAL_A { type Ux = u8; } -impl crate::IsEnum for Maskval {} +impl crate::IsEnum for MASKVAL_A {} #[doc = "Field `MASKVAL` reader - Mask Number of LSB Bits for Event Validation"] -pub type MaskvalR = crate::FieldReader; -impl MaskvalR { +pub type MASKVAL_R = crate::FieldReader; +impl MASKVAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Maskval::Value1), - 1 => Some(Maskval::Value2), - 7 => Some(Maskval::Value3), + 0 => Some(MASKVAL_A::VALUE1), + 1 => Some(MASKVAL_A::VALUE2), + 7 => Some(MASKVAL_A::VALUE3), _ => None, } } #[doc = "Mask LSB bit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Maskval::Value1 + *self == MASKVAL_A::VALUE1 } #[doc = "Mask 2 LSB bits"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Maskval::Value2 + *self == MASKVAL_A::VALUE2 } #[doc = "Mask 8 LSB bits"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Maskval::Value3 + *self == MASKVAL_A::VALUE3 } } #[doc = "Field `MASKVAL` writer - Mask Number of LSB Bits for Event Validation"] -pub type MaskvalW<'a, REG> = crate::FieldWriter<'a, REG, 3, Maskval>; -impl<'a, REG> MaskvalW<'a, REG> +pub type MASKVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MASKVAL_A>; +impl<'a, REG> MASKVAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -229,374 +229,374 @@ where #[doc = "Mask LSB bit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Maskval::Value1) + self.variant(MASKVAL_A::VALUE1) } #[doc = "Mask 2 LSB bits"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Maskval::Value2) + self.variant(MASKVAL_A::VALUE2) } #[doc = "Mask 8 LSB bits"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Maskval::Value3) + self.variant(MASKVAL_A::VALUE3) } } #[doc = "Enable (Extended) Time Frame Validation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fenval { +pub enum FENVAL_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fenval) -> Self { + fn from(variant: FENVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FENVAL` reader - Enable (Extended) Time Frame Validation"] -pub type FenvalR = crate::BitReader; -impl FenvalR { +pub type FENVAL_R = crate::BitReader; +impl FENVAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fenval { + pub const fn variant(&self) -> FENVAL_A { match self.bits { - false => Fenval::Value1, - true => Fenval::Value2, + false => FENVAL_A::VALUE1, + true => FENVAL_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fenval::Value1 + *self == FENVAL_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fenval::Value2 + *self == FENVAL_A::VALUE2 } } #[doc = "Field `FENVAL` writer - Enable (Extended) Time Frame Validation"] -pub type FenvalW<'a, REG> = crate::BitWriter<'a, REG, Fenval>; -impl<'a, REG> FenvalW<'a, REG> +pub type FENVAL_W<'a, REG> = crate::BitWriter<'a, REG, FENVAL_A>; +impl<'a, REG> FENVAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fenval::Value1) + self.variant(FENVAL_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fenval::Value2) + self.variant(FENVAL_A::VALUE2) } } #[doc = "Enable Time Slice Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ItsEn { +pub enum ITS_EN_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ItsEn) -> Self { + fn from(variant: ITS_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ITS_EN` reader - Enable Time Slice Interrupt"] -pub type ItsEnR = crate::BitReader; -impl ItsEnR { +pub type ITS_EN_R = crate::BitReader; +impl ITS_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ItsEn { + pub const fn variant(&self) -> ITS_EN_A { match self.bits { - false => ItsEn::Value1, - true => ItsEn::Value2, + false => ITS_EN_A::VALUE1, + true => ITS_EN_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ItsEn::Value1 + *self == ITS_EN_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ItsEn::Value2 + *self == ITS_EN_A::VALUE2 } } #[doc = "Field `ITS_EN` writer - Enable Time Slice Interrupt"] -pub type ItsEnW<'a, REG> = crate::BitWriter<'a, REG, ItsEn>; -impl<'a, REG> ItsEnW<'a, REG> +pub type ITS_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITS_EN_A>; +impl<'a, REG> ITS_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ItsEn::Value1) + self.variant(ITS_EN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ItsEn::Value2) + self.variant(ITS_EN_A::VALUE2) } } #[doc = "Enable (Extended) Time Frame Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ItfEn { +pub enum ITF_EN_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ItfEn) -> Self { + fn from(variant: ITF_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ITF_EN` reader - Enable (Extended) Time Frame Interrupt"] -pub type ItfEnR = crate::BitReader; -impl ItfEnR { +pub type ITF_EN_R = crate::BitReader; +impl ITF_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ItfEn { + pub const fn variant(&self) -> ITF_EN_A { match self.bits { - false => ItfEn::Value1, - true => ItfEn::Value2, + false => ITF_EN_A::VALUE1, + true => ITF_EN_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ItfEn::Value1 + *self == ITF_EN_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ItfEn::Value2 + *self == ITF_EN_A::VALUE2 } } #[doc = "Field `ITF_EN` writer - Enable (Extended) Time Frame Interrupt"] -pub type ItfEnW<'a, REG> = crate::BitWriter<'a, REG, ItfEn>; -impl<'a, REG> ItfEnW<'a, REG> +pub type ITF_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITF_EN_A>; +impl<'a, REG> ITF_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ItfEn::Value1) + self.variant(ITF_EN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ItfEn::Value2) + self.variant(ITF_EN_A::VALUE2) } } #[doc = "Enable Autoscan Time Period Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ItpEn { +pub enum ITP_EN_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable (valid only for case of hardware-enabled pad turn control)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ItpEn) -> Self { + fn from(variant: ITP_EN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ITP_EN` reader - Enable Autoscan Time Period Interrupt"] -pub type ItpEnR = crate::BitReader; -impl ItpEnR { +pub type ITP_EN_R = crate::BitReader; +impl ITP_EN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ItpEn { + pub const fn variant(&self) -> ITP_EN_A { match self.bits { - false => ItpEn::Value1, - true => ItpEn::Value2, + false => ITP_EN_A::VALUE1, + true => ITP_EN_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ItpEn::Value1 + *self == ITP_EN_A::VALUE1 } #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ItpEn::Value2 + *self == ITP_EN_A::VALUE2 } } #[doc = "Field `ITP_EN` writer - Enable Autoscan Time Period Interrupt"] -pub type ItpEnW<'a, REG> = crate::BitWriter<'a, REG, ItpEn>; -impl<'a, REG> ItpEnW<'a, REG> +pub type ITP_EN_W<'a, REG> = crate::BitWriter<'a, REG, ITP_EN_A>; +impl<'a, REG> ITP_EN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ItpEn::Value1) + self.variant(ITP_EN_A::VALUE1) } #[doc = "Enable (valid only for case of hardware-enabled pad turn control)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ItpEn::Value2) + self.variant(ITP_EN_A::VALUE2) } } #[doc = "Field `CLK_PS` reader - LEDTS-Counter Clock Pre-Scale Factor"] -pub type ClkPsR = crate::FieldReader; +pub type CLK_PS_R = crate::FieldReader; #[doc = "Field `CLK_PS` writer - LEDTS-Counter Clock Pre-Scale Factor"] -pub type ClkPsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type CLK_PS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bit 0 - Touch-Sense Function Enable"] #[inline(always)] - pub fn ts_en(&self) -> TsEnR { - TsEnR::new((self.bits & 1) != 0) + pub fn ts_en(&self) -> TS_EN_R { + TS_EN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - LED Function Enable"] #[inline(always)] - pub fn ld_en(&self) -> LdEnR { - LdEnR::new(((self.bits >> 1) & 1) != 0) + pub fn ld_en(&self) -> LD_EN_R { + LD_EN_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Clock Master Disable"] #[inline(always)] - pub fn cmtr(&self) -> CmtrR { - CmtrR::new(((self.bits >> 2) & 1) != 0) + pub fn cmtr(&self) -> CMTR_R { + CMTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"] #[inline(always)] - pub fn ensync(&self) -> EnsyncR { - EnsyncR::new(((self.bits >> 3) & 1) != 0) + pub fn ensync(&self) -> ENSYNC_R { + ENSYNC_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Suspend Request Configuration"] #[inline(always)] - pub fn suscfg(&self) -> SuscfgR { - SuscfgR::new(((self.bits >> 8) & 1) != 0) + pub fn suscfg(&self) -> SUSCFG_R { + SUSCFG_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"] #[inline(always)] - pub fn maskval(&self) -> MaskvalR { - MaskvalR::new(((self.bits >> 9) & 7) as u8) + pub fn maskval(&self) -> MASKVAL_R { + MASKVAL_R::new(((self.bits >> 9) & 7) as u8) } #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"] #[inline(always)] - pub fn fenval(&self) -> FenvalR { - FenvalR::new(((self.bits >> 12) & 1) != 0) + pub fn fenval(&self) -> FENVAL_R { + FENVAL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enable Time Slice Interrupt"] #[inline(always)] - pub fn its_en(&self) -> ItsEnR { - ItsEnR::new(((self.bits >> 13) & 1) != 0) + pub fn its_en(&self) -> ITS_EN_R { + ITS_EN_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"] #[inline(always)] - pub fn itf_en(&self) -> ItfEnR { - ItfEnR::new(((self.bits >> 14) & 1) != 0) + pub fn itf_en(&self) -> ITF_EN_R { + ITF_EN_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"] #[inline(always)] - pub fn itp_en(&self) -> ItpEnR { - ItpEnR::new(((self.bits >> 15) & 1) != 0) + pub fn itp_en(&self) -> ITP_EN_R { + ITP_EN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"] #[inline(always)] - pub fn clk_ps(&self) -> ClkPsR { - ClkPsR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn clk_ps(&self) -> CLK_PS_R { + CLK_PS_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - Touch-Sense Function Enable"] #[inline(always)] #[must_use] - pub fn ts_en(&mut self) -> TsEnW { - TsEnW::new(self, 0) + pub fn ts_en(&mut self) -> TS_EN_W { + TS_EN_W::new(self, 0) } #[doc = "Bit 1 - LED Function Enable"] #[inline(always)] #[must_use] - pub fn ld_en(&mut self) -> LdEnW { - LdEnW::new(self, 1) + pub fn ld_en(&mut self) -> LD_EN_W { + LD_EN_W::new(self, 1) } #[doc = "Bit 2 - Clock Master Disable"] #[inline(always)] #[must_use] - pub fn cmtr(&mut self) -> CmtrW { - CmtrW::new(self, 2) + pub fn cmtr(&mut self) -> CMTR_W { + CMTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"] #[inline(always)] #[must_use] - pub fn ensync(&mut self) -> EnsyncW { - EnsyncW::new(self, 3) + pub fn ensync(&mut self) -> ENSYNC_W { + ENSYNC_W::new(self, 3) } #[doc = "Bit 8 - Suspend Request Configuration"] #[inline(always)] #[must_use] - pub fn suscfg(&mut self) -> SuscfgW { - SuscfgW::new(self, 8) + pub fn suscfg(&mut self) -> SUSCFG_W { + SUSCFG_W::new(self, 8) } #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"] #[inline(always)] #[must_use] - pub fn maskval(&mut self) -> MaskvalW { - MaskvalW::new(self, 9) + pub fn maskval(&mut self) -> MASKVAL_W { + MASKVAL_W::new(self, 9) } #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"] #[inline(always)] #[must_use] - pub fn fenval(&mut self) -> FenvalW { - FenvalW::new(self, 12) + pub fn fenval(&mut self) -> FENVAL_W { + FENVAL_W::new(self, 12) } #[doc = "Bit 13 - Enable Time Slice Interrupt"] #[inline(always)] #[must_use] - pub fn its_en(&mut self) -> ItsEnW { - ItsEnW::new(self, 13) + pub fn its_en(&mut self) -> ITS_EN_W { + ITS_EN_W::new(self, 13) } #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"] #[inline(always)] #[must_use] - pub fn itf_en(&mut self) -> ItfEnW { - ItfEnW::new(self, 14) + pub fn itf_en(&mut self) -> ITF_EN_W { + ITF_EN_W::new(self, 14) } #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"] #[inline(always)] #[must_use] - pub fn itp_en(&mut self) -> ItpEnW { - ItpEnW::new(self, 15) + pub fn itp_en(&mut self) -> ITP_EN_W { + ITP_EN_W::new(self, 15) } #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"] #[inline(always)] #[must_use] - pub fn clk_ps(&mut self) -> ClkPsW { - ClkPsW::new(self, 16) + pub fn clk_ps(&mut self) -> CLK_PS_W { + CLK_PS_W::new(self, 16) } } #[doc = "Global Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobctlSpec; -impl crate::RegisterSpec for GlobctlSpec { +pub struct GLOBCTL_SPEC; +impl crate::RegisterSpec for GLOBCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globctl::R`](R) reader structure"] -impl crate::Readable for GlobctlSpec {} +impl crate::Readable for GLOBCTL_SPEC {} #[doc = "`write(|w| ..)` method takes [`globctl::W`](W) writer structure"] -impl crate::Writable for GlobctlSpec { +impl crate::Writable for GLOBCTL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBCTL to value 0"] -impl crate::Resettable for GlobctlSpec { +impl crate::Resettable for GLOBCTL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/id.rs b/src/ledts0/id.rs index 73439ce1..4ea1846e 100644 --- a/src/ledts0/id.rs +++ b/src/ledts0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00ab_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00ab_c000; } diff --git a/src/ledts0/ldcmp0.rs b/src/ledts0/ldcmp0.rs index 237fb4dc..85ffa9e5 100644 --- a/src/ledts0/ldcmp0.rs +++ b/src/ledts0/ldcmp0.rs @@ -1,85 +1,85 @@ #[doc = "Register `LDCMP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LDCMP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_LD0` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd0R = crate::FieldReader; +pub type CMP_LD0_R = crate::FieldReader; #[doc = "Field `CMP_LD0` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD1` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd1R = crate::FieldReader; +pub type CMP_LD1_R = crate::FieldReader; #[doc = "Field `CMP_LD1` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD2` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd2R = crate::FieldReader; +pub type CMP_LD2_R = crate::FieldReader; #[doc = "Field `CMP_LD2` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD3` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd3R = crate::FieldReader; +pub type CMP_LD3_R = crate::FieldReader; #[doc = "Field `CMP_LD3` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld0(&self) -> CmpLd0R { - CmpLd0R::new((self.bits & 0xff) as u8) + pub fn cmp_ld0(&self) -> CMP_LD0_R { + CMP_LD0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld1(&self) -> CmpLd1R { - CmpLd1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ld1(&self) -> CMP_LD1_R { + CMP_LD1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld2(&self) -> CmpLd2R { - CmpLd2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ld2(&self) -> CMP_LD2_R { + CMP_LD2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld3(&self) -> CmpLd3R { - CmpLd3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ld3(&self) -> CMP_LD3_R { + CMP_LD3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld0(&mut self) -> CmpLd0W { - CmpLd0W::new(self, 0) + pub fn cmp_ld0(&mut self) -> CMP_LD0_W { + CMP_LD0_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld1(&mut self) -> CmpLd1W { - CmpLd1W::new(self, 8) + pub fn cmp_ld1(&mut self) -> CMP_LD1_W { + CMP_LD1_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld2(&mut self) -> CmpLd2W { - CmpLd2W::new(self, 16) + pub fn cmp_ld2(&mut self) -> CMP_LD2_W { + CMP_LD2_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld3(&mut self) -> CmpLd3W { - CmpLd3W::new(self, 24) + pub fn cmp_ld3(&mut self) -> CMP_LD3_W { + CMP_LD3_W::new(self, 24) } } #[doc = "LED Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Ldcmp0Spec; -impl crate::RegisterSpec for Ldcmp0Spec { +pub struct LDCMP0_SPEC; +impl crate::RegisterSpec for LDCMP0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ldcmp0::R`](R) reader structure"] -impl crate::Readable for Ldcmp0Spec {} +impl crate::Readable for LDCMP0_SPEC {} #[doc = "`write(|w| ..)` method takes [`ldcmp0::W`](W) writer structure"] -impl crate::Writable for Ldcmp0Spec { +impl crate::Writable for LDCMP0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LDCMP0 to value 0"] -impl crate::Resettable for Ldcmp0Spec { +impl crate::Resettable for LDCMP0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/ldcmp1.rs b/src/ledts0/ldcmp1.rs index 1c44fdf9..c6d639b5 100644 --- a/src/ledts0/ldcmp1.rs +++ b/src/ledts0/ldcmp1.rs @@ -1,85 +1,85 @@ #[doc = "Register `LDCMP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LDCMP1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_LD4` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd4R = crate::FieldReader; +pub type CMP_LD4_R = crate::FieldReader; #[doc = "Field `CMP_LD4` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD5` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd5R = crate::FieldReader; +pub type CMP_LD5_R = crate::FieldReader; #[doc = "Field `CMP_LD5` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LD6` reader - Compare Value for LED COL\\[x\\]"] -pub type CmpLd6R = crate::FieldReader; +pub type CMP_LD6_R = crate::FieldReader; #[doc = "Field `CMP_LD6` writer - Compare Value for LED COL\\[x\\]"] -pub type CmpLd6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LD6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_LDA_TSCOM` reader - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] -pub type CmpLdaTscomR = crate::FieldReader; +pub type CMP_LDA_TSCOM_R = crate::FieldReader; #[doc = "Field `CMP_LDA_TSCOM` writer - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] -pub type CmpLdaTscomW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_LDA_TSCOM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld4(&self) -> CmpLd4R { - CmpLd4R::new((self.bits & 0xff) as u8) + pub fn cmp_ld4(&self) -> CMP_LD4_R { + CMP_LD4_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld5(&self) -> CmpLd5R { - CmpLd5R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ld5(&self) -> CMP_LD5_R { + CMP_LD5_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - pub fn cmp_ld6(&self) -> CmpLd6R { - CmpLd6R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ld6(&self) -> CMP_LD6_R { + CMP_LD6_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] #[inline(always)] - pub fn cmp_lda_tscom(&self) -> CmpLdaTscomR { - CmpLdaTscomR::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_lda_tscom(&self) -> CMP_LDA_TSCOM_R { + CMP_LDA_TSCOM_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld4(&mut self) -> CmpLd4W { - CmpLd4W::new(self, 0) + pub fn cmp_ld4(&mut self) -> CMP_LD4_W { + CMP_LD4_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld5(&mut self) -> CmpLd5W { - CmpLd5W::new(self, 8) + pub fn cmp_ld5(&mut self) -> CMP_LD5_W { + CMP_LD5_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ld6(&mut self) -> CmpLd6W { - CmpLd6W::new(self, 16) + pub fn cmp_ld6(&mut self) -> CMP_LD6_W { + CMP_LD6_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] #[inline(always)] #[must_use] - pub fn cmp_lda_tscom(&mut self) -> CmpLdaTscomW { - CmpLdaTscomW::new(self, 24) + pub fn cmp_lda_tscom(&mut self) -> CMP_LDA_TSCOM_W { + CMP_LDA_TSCOM_W::new(self, 24) } } #[doc = "LED Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ldcmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ldcmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Ldcmp1Spec; -impl crate::RegisterSpec for Ldcmp1Spec { +pub struct LDCMP1_SPEC; +impl crate::RegisterSpec for LDCMP1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ldcmp1::R`](R) reader structure"] -impl crate::Readable for Ldcmp1Spec {} +impl crate::Readable for LDCMP1_SPEC {} #[doc = "`write(|w| ..)` method takes [`ldcmp1::W`](W) writer structure"] -impl crate::Writable for Ldcmp1Spec { +impl crate::Writable for LDCMP1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LDCMP1 to value 0"] -impl crate::Resettable for Ldcmp1Spec { +impl crate::Resettable for LDCMP1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/line0.rs b/src/ledts0/line0.rs index 977b22e2..cde04a66 100644 --- a/src/ledts0/line0.rs +++ b/src/ledts0/line0.rs @@ -1,85 +1,85 @@ #[doc = "Register `LINE0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LINE0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LINE_0` reader - Output on LINE\\[x\\]"] -pub type Line0R = crate::FieldReader; +pub type LINE_0_R = crate::FieldReader; #[doc = "Field `LINE_0` writer - Output on LINE\\[x\\]"] -pub type Line0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_1` reader - Output on LINE\\[x\\]"] -pub type Line1R = crate::FieldReader; +pub type LINE_1_R = crate::FieldReader; #[doc = "Field `LINE_1` writer - Output on LINE\\[x\\]"] -pub type Line1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_2` reader - Output on LINE\\[x\\]"] -pub type Line2R = crate::FieldReader; +pub type LINE_2_R = crate::FieldReader; #[doc = "Field `LINE_2` writer - Output on LINE\\[x\\]"] -pub type Line2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_3` reader - Output on LINE\\[x\\]"] -pub type Line3R = crate::FieldReader; +pub type LINE_3_R = crate::FieldReader; #[doc = "Field `LINE_3` writer - Output on LINE\\[x\\]"] -pub type Line3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_0(&self) -> Line0R { - Line0R::new((self.bits & 0xff) as u8) + pub fn line_0(&self) -> LINE_0_R { + LINE_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_1(&self) -> Line1R { - Line1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn line_1(&self) -> LINE_1_R { + LINE_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_2(&self) -> Line2R { - Line2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn line_2(&self) -> LINE_2_R { + LINE_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_3(&self) -> Line3R { - Line3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn line_3(&self) -> LINE_3_R { + LINE_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_0(&mut self) -> Line0W { - Line0W::new(self, 0) + pub fn line_0(&mut self) -> LINE_0_W { + LINE_0_W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_1(&mut self) -> Line1W { - Line1W::new(self, 8) + pub fn line_1(&mut self) -> LINE_1_W { + LINE_1_W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_2(&mut self) -> Line2W { - Line2W::new(self, 16) + pub fn line_2(&mut self) -> LINE_2_W { + LINE_2_W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_3(&mut self) -> Line3W { - Line3W::new(self, 24) + pub fn line_3(&mut self) -> LINE_3_W { + LINE_3_W::new(self, 24) } } #[doc = "Line Pattern Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Line0Spec; -impl crate::RegisterSpec for Line0Spec { +pub struct LINE0_SPEC; +impl crate::RegisterSpec for LINE0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`line0::R`](R) reader structure"] -impl crate::Readable for Line0Spec {} +impl crate::Readable for LINE0_SPEC {} #[doc = "`write(|w| ..)` method takes [`line0::W`](W) writer structure"] -impl crate::Writable for Line0Spec { +impl crate::Writable for LINE0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINE0 to value 0"] -impl crate::Resettable for Line0Spec { +impl crate::Resettable for LINE0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/line1.rs b/src/ledts0/line1.rs index ba4e4cb4..5f456a80 100644 --- a/src/ledts0/line1.rs +++ b/src/ledts0/line1.rs @@ -1,85 +1,85 @@ #[doc = "Register `LINE1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LINE1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LINE_4` reader - Output on LINE\\[x\\]"] -pub type Line4R = crate::FieldReader; +pub type LINE_4_R = crate::FieldReader; #[doc = "Field `LINE_4` writer - Output on LINE\\[x\\]"] -pub type Line4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_5` reader - Output on LINE\\[x\\]"] -pub type Line5R = crate::FieldReader; +pub type LINE_5_R = crate::FieldReader; #[doc = "Field `LINE_5` writer - Output on LINE\\[x\\]"] -pub type Line5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_6` reader - Output on LINE\\[x\\]"] -pub type Line6R = crate::FieldReader; +pub type LINE_6_R = crate::FieldReader; #[doc = "Field `LINE_6` writer - Output on LINE\\[x\\]"] -pub type Line6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `LINE_A` reader - Output on LINE\\[x\\]"] -pub type LineAR = crate::FieldReader; +pub type LINE_A_R = crate::FieldReader; #[doc = "Field `LINE_A` writer - Output on LINE\\[x\\]"] -pub type LineAW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type LINE_A_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_4(&self) -> Line4R { - Line4R::new((self.bits & 0xff) as u8) + pub fn line_4(&self) -> LINE_4_R { + LINE_4_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_5(&self) -> Line5R { - Line5R::new(((self.bits >> 8) & 0xff) as u8) + pub fn line_5(&self) -> LINE_5_R { + LINE_5_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_6(&self) -> Line6R { - Line6R::new(((self.bits >> 16) & 0xff) as u8) + pub fn line_6(&self) -> LINE_6_R { + LINE_6_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - pub fn line_a(&self) -> LineAR { - LineAR::new(((self.bits >> 24) & 0xff) as u8) + pub fn line_a(&self) -> LINE_A_R { + LINE_A_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_4(&mut self) -> Line4W { - Line4W::new(self, 0) + pub fn line_4(&mut self) -> LINE_4_W { + LINE_4_W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_5(&mut self) -> Line5W { - Line5W::new(self, 8) + pub fn line_5(&mut self) -> LINE_5_W { + LINE_5_W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_6(&mut self) -> Line6W { - Line6W::new(self, 16) + pub fn line_6(&mut self) -> LINE_6_W { + LINE_6_W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] #[must_use] - pub fn line_a(&mut self) -> LineAW { - LineAW::new(self, 24) + pub fn line_a(&mut self) -> LINE_A_W { + LINE_A_W::new(self, 24) } } #[doc = "Line Pattern Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`line1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`line1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Line1Spec; -impl crate::RegisterSpec for Line1Spec { +pub struct LINE1_SPEC; +impl crate::RegisterSpec for LINE1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`line1::R`](R) reader structure"] -impl crate::Readable for Line1Spec {} +impl crate::Readable for LINE1_SPEC {} #[doc = "`write(|w| ..)` method takes [`line1::W`](W) writer structure"] -impl crate::Writable for Line1Spec { +impl crate::Writable for LINE1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LINE1 to value 0"] -impl crate::Resettable for Line1Spec { +impl crate::Resettable for LINE1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tscmp0.rs b/src/ledts0/tscmp0.rs index a550889b..76097681 100644 --- a/src/ledts0/tscmp0.rs +++ b/src/ledts0/tscmp0.rs @@ -1,85 +1,85 @@ #[doc = "Register `TSCMP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSCMP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_TS0` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs0R = crate::FieldReader; +pub type CMP_TS0_R = crate::FieldReader; #[doc = "Field `CMP_TS0` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS1` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs1R = crate::FieldReader; +pub type CMP_TS1_R = crate::FieldReader; #[doc = "Field `CMP_TS1` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS2` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs2R = crate::FieldReader; +pub type CMP_TS2_R = crate::FieldReader; #[doc = "Field `CMP_TS2` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS3` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs3R = crate::FieldReader; +pub type CMP_TS3_R = crate::FieldReader; #[doc = "Field `CMP_TS3` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts0(&self) -> CmpTs0R { - CmpTs0R::new((self.bits & 0xff) as u8) + pub fn cmp_ts0(&self) -> CMP_TS0_R { + CMP_TS0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts1(&self) -> CmpTs1R { - CmpTs1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ts1(&self) -> CMP_TS1_R { + CMP_TS1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts2(&self) -> CmpTs2R { - CmpTs2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ts2(&self) -> CMP_TS2_R { + CMP_TS2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts3(&self) -> CmpTs3R { - CmpTs3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ts3(&self) -> CMP_TS3_R { + CMP_TS3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts0(&mut self) -> CmpTs0W { - CmpTs0W::new(self, 0) + pub fn cmp_ts0(&mut self) -> CMP_TS0_W { + CMP_TS0_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts1(&mut self) -> CmpTs1W { - CmpTs1W::new(self, 8) + pub fn cmp_ts1(&mut self) -> CMP_TS1_W { + CMP_TS1_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts2(&mut self) -> CmpTs2W { - CmpTs2W::new(self, 16) + pub fn cmp_ts2(&mut self) -> CMP_TS2_W { + CMP_TS2_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts3(&mut self) -> CmpTs3W { - CmpTs3W::new(self, 24) + pub fn cmp_ts3(&mut self) -> CMP_TS3_W { + CMP_TS3_W::new(self, 24) } } #[doc = "Touch-sense Compare Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Tscmp0Spec; -impl crate::RegisterSpec for Tscmp0Spec { +pub struct TSCMP0_SPEC; +impl crate::RegisterSpec for TSCMP0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tscmp0::R`](R) reader structure"] -impl crate::Readable for Tscmp0Spec {} +impl crate::Readable for TSCMP0_SPEC {} #[doc = "`write(|w| ..)` method takes [`tscmp0::W`](W) writer structure"] -impl crate::Writable for Tscmp0Spec { +impl crate::Writable for TSCMP0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSCMP0 to value 0"] -impl crate::Resettable for Tscmp0Spec { +impl crate::Resettable for TSCMP0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tscmp1.rs b/src/ledts0/tscmp1.rs index 7f0e56b9..01d40ebc 100644 --- a/src/ledts0/tscmp1.rs +++ b/src/ledts0/tscmp1.rs @@ -1,85 +1,85 @@ #[doc = "Register `TSCMP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSCMP1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CMP_TS4` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs4R = crate::FieldReader; +pub type CMP_TS4_R = crate::FieldReader; #[doc = "Field `CMP_TS4` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS5` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs5R = crate::FieldReader; +pub type CMP_TS5_R = crate::FieldReader; #[doc = "Field `CMP_TS5` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS6` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs6R = crate::FieldReader; +pub type CMP_TS6_R = crate::FieldReader; #[doc = "Field `CMP_TS6` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `CMP_TS7` reader - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs7R = crate::FieldReader; +pub type CMP_TS7_R = crate::FieldReader; #[doc = "Field `CMP_TS7` writer - Compare Value for Touch-Sense TSIN\\[x\\]"] -pub type CmpTs7W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type CMP_TS7_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts4(&self) -> CmpTs4R { - CmpTs4R::new((self.bits & 0xff) as u8) + pub fn cmp_ts4(&self) -> CMP_TS4_R { + CMP_TS4_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts5(&self) -> CmpTs5R { - CmpTs5R::new(((self.bits >> 8) & 0xff) as u8) + pub fn cmp_ts5(&self) -> CMP_TS5_R { + CMP_TS5_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts6(&self) -> CmpTs6R { - CmpTs6R::new(((self.bits >> 16) & 0xff) as u8) + pub fn cmp_ts6(&self) -> CMP_TS6_R { + CMP_TS6_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - pub fn cmp_ts7(&self) -> CmpTs7R { - CmpTs7R::new(((self.bits >> 24) & 0xff) as u8) + pub fn cmp_ts7(&self) -> CMP_TS7_R { + CMP_TS7_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts4(&mut self) -> CmpTs4W { - CmpTs4W::new(self, 0) + pub fn cmp_ts4(&mut self) -> CMP_TS4_W { + CMP_TS4_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts5(&mut self) -> CmpTs5W { - CmpTs5W::new(self, 8) + pub fn cmp_ts5(&mut self) -> CMP_TS5_W { + CMP_TS5_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts6(&mut self) -> CmpTs6W { - CmpTs6W::new(self, 16) + pub fn cmp_ts6(&mut self) -> CMP_TS6_W { + CMP_TS6_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] #[must_use] - pub fn cmp_ts7(&mut self) -> CmpTs7W { - CmpTs7W::new(self, 24) + pub fn cmp_ts7(&mut self) -> CMP_TS7_W { + CMP_TS7_W::new(self, 24) } } #[doc = "Touch-sense Compare Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tscmp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tscmp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Tscmp1Spec; -impl crate::RegisterSpec for Tscmp1Spec { +pub struct TSCMP1_SPEC; +impl crate::RegisterSpec for TSCMP1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tscmp1::R`](R) reader structure"] -impl crate::Readable for Tscmp1Spec {} +impl crate::Readable for TSCMP1_SPEC {} #[doc = "`write(|w| ..)` method takes [`tscmp1::W`](W) writer structure"] -impl crate::Writable for Tscmp1Spec { +impl crate::Writable for TSCMP1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSCMP1 to value 0"] -impl crate::Resettable for Tscmp1Spec { +impl crate::Resettable for TSCMP1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ledts0/tsval.rs b/src/ledts0/tsval.rs index 9a9acf7b..3e4c2391 100644 --- a/src/ledts0/tsval.rs +++ b/src/ledts0/tsval.rs @@ -1,47 +1,47 @@ #[doc = "Register `TSVAL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TSVAL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TSCTRVALR` reader - Shadow TS-Counter (Read)"] -pub type TsctrvalrR = crate::FieldReader; +pub type TSCTRVALR_R = crate::FieldReader; #[doc = "Field `TSCTRVAL` reader - TS-Counter Value"] -pub type TsctrvalR = crate::FieldReader; +pub type TSCTRVAL_R = crate::FieldReader; #[doc = "Field `TSCTRVAL` writer - TS-Counter Value"] -pub type TsctrvalW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TSCTRVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow TS-Counter (Read)"] #[inline(always)] - pub fn tsctrvalr(&self) -> TsctrvalrR { - TsctrvalrR::new((self.bits & 0xffff) as u16) + pub fn tsctrvalr(&self) -> TSCTRVALR_R { + TSCTRVALR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - TS-Counter Value"] #[inline(always)] - pub fn tsctrval(&self) -> TsctrvalR { - TsctrvalR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn tsctrval(&self) -> TSCTRVAL_R { + TSCTRVAL_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 16:31 - TS-Counter Value"] #[inline(always)] #[must_use] - pub fn tsctrval(&mut self) -> TsctrvalW { - TsctrvalW::new(self, 16) + pub fn tsctrval(&mut self) -> TSCTRVAL_W { + TSCTRVAL_W::new(self, 16) } } #[doc = "Touch-sense TS-Counter Value\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tsval::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tsval::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TsvalSpec; -impl crate::RegisterSpec for TsvalSpec { +pub struct TSVAL_SPEC; +impl crate::RegisterSpec for TSVAL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tsval::R`](R) reader structure"] -impl crate::Readable for TsvalSpec {} +impl crate::Readable for TSVAL_SPEC {} #[doc = "`write(|w| ..)` method takes [`tsval::W`](W) writer structure"] -impl crate::Writable for TsvalSpec { +impl crate::Writable for TSVAL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TSVAL to value 0"] -impl crate::Resettable for TsvalSpec { +impl crate::Resettable for TSVAL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/lib.rs b/src/lib.rs index 73698785..87b82553 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,5 @@ -#![doc = "Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.33.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.33.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] @@ -344,11 +344,11 @@ unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { } } #[doc = "Cortex-M4 Private Peripheral Block"] -pub struct Ppb { +pub struct PPB { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ppb {} -impl Ppb { +unsafe impl Send for PPB {} +impl PPB { #[doc = r"Pointer to the register block"] pub const PTR: *const ppb::RegisterBlock = 0xe000_e000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -373,26 +373,26 @@ impl Ppb { Self { _marker: PhantomData } } } -impl Deref for Ppb { +impl Deref for PPB { type Target = ppb::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ppb { +impl core::fmt::Debug for PPB { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ppb").finish() + f.debug_struct("PPB").finish() } } #[doc = "Cortex-M4 Private Peripheral Block"] pub mod ppb; #[doc = "DMA Line Router"] -pub struct Dlr { +pub struct DLR { _marker: PhantomData<*const ()>, } -unsafe impl Send for Dlr {} -impl Dlr { +unsafe impl Send for DLR {} +impl DLR { #[doc = r"Pointer to the register block"] pub const PTR: *const dlr::RegisterBlock = 0x5000_4900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -417,26 +417,26 @@ impl Dlr { Self { _marker: PhantomData } } } -impl Deref for Dlr { +impl Deref for DLR { type Target = dlr::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Dlr { +impl core::fmt::Debug for DLR { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Dlr").finish() + f.debug_struct("DLR").finish() } } #[doc = "DMA Line Router"] pub mod dlr; #[doc = "Event Request Unit 0"] -pub struct Eru0 { +pub struct ERU0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Eru0 {} -impl Eru0 { +unsafe impl Send for ERU0 {} +impl ERU0 { #[doc = r"Pointer to the register block"] pub const PTR: *const eru0::RegisterBlock = 0x5000_4800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -461,26 +461,26 @@ impl Eru0 { Self { _marker: PhantomData } } } -impl Deref for Eru0 { +impl Deref for ERU0 { type Target = eru0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Eru0 { +impl core::fmt::Debug for ERU0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Eru0").finish() + f.debug_struct("ERU0").finish() } } #[doc = "Event Request Unit 0"] pub mod eru0; #[doc = "Event Request Unit 1"] -pub struct Eru1 { +pub struct ERU1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Eru1 {} -impl Eru1 { +unsafe impl Send for ERU1 {} +impl ERU1 { #[doc = r"Pointer to the register block"] pub const PTR: *const eru0::RegisterBlock = 0x4004_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -505,26 +505,26 @@ impl Eru1 { Self { _marker: PhantomData } } } -impl Deref for Eru1 { +impl Deref for ERU1 { type Target = eru0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Eru1 { +impl core::fmt::Debug for ERU1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Eru1").finish() + f.debug_struct("ERU1").finish() } } #[doc = "Event Request Unit 1"] pub use self::eru0 as eru1; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0 { +pub struct GPDMA0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0 {} -impl Gpdma0 { +unsafe impl Send for GPDMA0 {} +impl GPDMA0 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0::RegisterBlock = 0x5001_42c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -549,26 +549,26 @@ impl Gpdma0 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0 { +impl Deref for GPDMA0 { type Target = gpdma0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0 { +impl core::fmt::Debug for GPDMA0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0").finish() + f.debug_struct("GPDMA0").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch0 { +pub struct GPDMA0_CH0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch0 {} -impl Gpdma0Ch0 { +unsafe impl Send for GPDMA0_CH0 {} +impl GPDMA0_CH0 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch0::RegisterBlock = 0x5001_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -593,26 +593,26 @@ impl Gpdma0Ch0 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch0 { +impl Deref for GPDMA0_CH0 { type Target = gpdma0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch0 { +impl core::fmt::Debug for GPDMA0_CH0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch0").finish() + f.debug_struct("GPDMA0_CH0").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0_ch0; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch1 { +pub struct GPDMA0_CH1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch1 {} -impl Gpdma0Ch1 { +unsafe impl Send for GPDMA0_CH1 {} +impl GPDMA0_CH1 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch0::RegisterBlock = 0x5001_4058 as *const _; #[doc = r"Return the pointer to the register block"] @@ -637,26 +637,26 @@ impl Gpdma0Ch1 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch1 { +impl Deref for GPDMA0_CH1 { type Target = gpdma0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch1 { +impl core::fmt::Debug for GPDMA0_CH1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch1").finish() + f.debug_struct("GPDMA0_CH1").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch0 as gpdma0_ch1; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch2 { +pub struct GPDMA0_CH2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch2 {} -impl Gpdma0Ch2 { +unsafe impl Send for GPDMA0_CH2 {} +impl GPDMA0_CH2 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_40b0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -681,26 +681,26 @@ impl Gpdma0Ch2 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch2 { +impl Deref for GPDMA0_CH2 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch2 { +impl core::fmt::Debug for GPDMA0_CH2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch2").finish() + f.debug_struct("GPDMA0_CH2").finish() } } #[doc = "General Purpose DMA Unit 0"] pub mod gpdma0_ch2; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch3 { +pub struct GPDMA0_CH3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch3 {} -impl Gpdma0Ch3 { +unsafe impl Send for GPDMA0_CH3 {} +impl GPDMA0_CH3 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4108 as *const _; #[doc = r"Return the pointer to the register block"] @@ -725,26 +725,26 @@ impl Gpdma0Ch3 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch3 { +impl Deref for GPDMA0_CH3 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch3 { +impl core::fmt::Debug for GPDMA0_CH3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch3").finish() + f.debug_struct("GPDMA0_CH3").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch3; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch4 { +pub struct GPDMA0_CH4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch4 {} -impl Gpdma0Ch4 { +unsafe impl Send for GPDMA0_CH4 {} +impl GPDMA0_CH4 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4160 as *const _; #[doc = r"Return the pointer to the register block"] @@ -769,26 +769,26 @@ impl Gpdma0Ch4 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch4 { +impl Deref for GPDMA0_CH4 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch4 { +impl core::fmt::Debug for GPDMA0_CH4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch4").finish() + f.debug_struct("GPDMA0_CH4").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch4; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch5 { +pub struct GPDMA0_CH5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch5 {} -impl Gpdma0Ch5 { +unsafe impl Send for GPDMA0_CH5 {} +impl GPDMA0_CH5 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_41b8 as *const _; #[doc = r"Return the pointer to the register block"] @@ -813,26 +813,26 @@ impl Gpdma0Ch5 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch5 { +impl Deref for GPDMA0_CH5 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch5 { +impl core::fmt::Debug for GPDMA0_CH5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch5").finish() + f.debug_struct("GPDMA0_CH5").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch5; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch6 { +pub struct GPDMA0_CH6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch6 {} -impl Gpdma0Ch6 { +unsafe impl Send for GPDMA0_CH6 {} +impl GPDMA0_CH6 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4210 as *const _; #[doc = r"Return the pointer to the register block"] @@ -857,26 +857,26 @@ impl Gpdma0Ch6 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch6 { +impl Deref for GPDMA0_CH6 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch6 { +impl core::fmt::Debug for GPDMA0_CH6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch6").finish() + f.debug_struct("GPDMA0_CH6").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch6; #[doc = "General Purpose DMA Unit 0"] -pub struct Gpdma0Ch7 { +pub struct GPDMA0_CH7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Gpdma0Ch7 {} -impl Gpdma0Ch7 { +unsafe impl Send for GPDMA0_CH7 {} +impl GPDMA0_CH7 { #[doc = r"Pointer to the register block"] pub const PTR: *const gpdma0_ch2::RegisterBlock = 0x5001_4268 as *const _; #[doc = r"Return the pointer to the register block"] @@ -901,26 +901,26 @@ impl Gpdma0Ch7 { Self { _marker: PhantomData } } } -impl Deref for Gpdma0Ch7 { +impl Deref for GPDMA0_CH7 { type Target = gpdma0_ch2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Gpdma0Ch7 { +impl core::fmt::Debug for GPDMA0_CH7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Gpdma0Ch7").finish() + f.debug_struct("GPDMA0_CH7").finish() } } #[doc = "General Purpose DMA Unit 0"] pub use self::gpdma0_ch2 as gpdma0_ch7; #[doc = "Flexible CRC Engine"] -pub struct Fce { +pub struct FCE { _marker: PhantomData<*const ()>, } -unsafe impl Send for Fce {} -impl Fce { +unsafe impl Send for FCE {} +impl FCE { #[doc = r"Pointer to the register block"] pub const PTR: *const fce::RegisterBlock = 0x5002_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -945,26 +945,26 @@ impl Fce { Self { _marker: PhantomData } } } -impl Deref for Fce { +impl Deref for FCE { type Target = fce::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Fce { +impl core::fmt::Debug for FCE { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Fce").finish() + f.debug_struct("FCE").finish() } } #[doc = "Flexible CRC Engine"] pub mod fce; #[doc = "Flexible CRC Engine"] -pub struct FceKe0 { +pub struct FCE_KE0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FceKe0 {} -impl FceKe0 { +unsafe impl Send for FCE_KE0 {} +impl FCE_KE0 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0020 as *const _; #[doc = r"Return the pointer to the register block"] @@ -989,26 +989,26 @@ impl FceKe0 { Self { _marker: PhantomData } } } -impl Deref for FceKe0 { +impl Deref for FCE_KE0 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FceKe0 { +impl core::fmt::Debug for FCE_KE0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FceKe0").finish() + f.debug_struct("FCE_KE0").finish() } } #[doc = "Flexible CRC Engine"] pub mod fce_ke0; #[doc = "Flexible CRC Engine"] -pub struct FceKe1 { +pub struct FCE_KE1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FceKe1 {} -impl FceKe1 { +unsafe impl Send for FCE_KE1 {} +impl FCE_KE1 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0040 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1033,26 +1033,26 @@ impl FceKe1 { Self { _marker: PhantomData } } } -impl Deref for FceKe1 { +impl Deref for FCE_KE1 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FceKe1 { +impl core::fmt::Debug for FCE_KE1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FceKe1").finish() + f.debug_struct("FCE_KE1").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke1; #[doc = "Flexible CRC Engine"] -pub struct FceKe2 { +pub struct FCE_KE2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FceKe2 {} -impl FceKe2 { +unsafe impl Send for FCE_KE2 {} +impl FCE_KE2 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0060 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1077,26 +1077,26 @@ impl FceKe2 { Self { _marker: PhantomData } } } -impl Deref for FceKe2 { +impl Deref for FCE_KE2 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FceKe2 { +impl core::fmt::Debug for FCE_KE2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FceKe2").finish() + f.debug_struct("FCE_KE2").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke2; #[doc = "Flexible CRC Engine"] -pub struct FceKe3 { +pub struct FCE_KE3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for FceKe3 {} -impl FceKe3 { +unsafe impl Send for FCE_KE3 {} +impl FCE_KE3 { #[doc = r"Pointer to the register block"] pub const PTR: *const fce_ke0::RegisterBlock = 0x5002_0080 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1121,26 +1121,26 @@ impl FceKe3 { Self { _marker: PhantomData } } } -impl Deref for FceKe3 { +impl Deref for FCE_KE3 { type Target = fce_ke0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for FceKe3 { +impl core::fmt::Debug for FCE_KE3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("FceKe3").finish() + f.debug_struct("FCE_KE3").finish() } } #[doc = "Flexible CRC Engine"] pub use self::fce_ke0 as fce_ke3; #[doc = "Peripheral Bridge AHB 0"] -pub struct Pba0 { +pub struct PBA0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Pba0 {} -impl Pba0 { +unsafe impl Send for PBA0 {} +impl PBA0 { #[doc = r"Pointer to the register block"] pub const PTR: *const pba0::RegisterBlock = 0x4000_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1165,26 +1165,26 @@ impl Pba0 { Self { _marker: PhantomData } } } -impl Deref for Pba0 { +impl Deref for PBA0 { type Target = pba0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Pba0 { +impl core::fmt::Debug for PBA0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Pba0").finish() + f.debug_struct("PBA0").finish() } } #[doc = "Peripheral Bridge AHB 0"] pub mod pba0; #[doc = "Peripheral Bridge AHB 1"] -pub struct Pba1 { +pub struct PBA1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Pba1 {} -impl Pba1 { +unsafe impl Send for PBA1 {} +impl PBA1 { #[doc = r"Pointer to the register block"] pub const PTR: *const pba0::RegisterBlock = 0x4800_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1209,26 +1209,26 @@ impl Pba1 { Self { _marker: PhantomData } } } -impl Deref for Pba1 { +impl Deref for PBA1 { type Target = pba0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Pba1 { +impl core::fmt::Debug for PBA1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Pba1").finish() + f.debug_struct("PBA1").finish() } } #[doc = "Peripheral Bridge AHB 1"] pub use self::pba0 as pba1; #[doc = "Flash Memory Controller"] -pub struct Flash0 { +pub struct FLASH0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Flash0 {} -impl Flash0 { +unsafe impl Send for FLASH0 {} +impl FLASH0 { #[doc = r"Pointer to the register block"] pub const PTR: *const flash0::RegisterBlock = 0x5800_1000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1253,26 +1253,26 @@ impl Flash0 { Self { _marker: PhantomData } } } -impl Deref for Flash0 { +impl Deref for FLASH0 { type Target = flash0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Flash0 { +impl core::fmt::Debug for FLASH0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Flash0").finish() + f.debug_struct("FLASH0").finish() } } #[doc = "Flash Memory Controller"] pub mod flash0; #[doc = "Prefetch Unit"] -pub struct Pref { +pub struct PREF { _marker: PhantomData<*const ()>, } -unsafe impl Send for Pref {} -impl Pref { +unsafe impl Send for PREF {} +impl PREF { #[doc = r"Pointer to the register block"] pub const PTR: *const pref::RegisterBlock = 0x5800_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1297,26 +1297,26 @@ impl Pref { Self { _marker: PhantomData } } } -impl Deref for Pref { +impl Deref for PREF { type Target = pref::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Pref { +impl core::fmt::Debug for PREF { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Pref").finish() + f.debug_struct("PREF").finish() } } #[doc = "Prefetch Unit"] pub mod pref; #[doc = "Program Management Unit"] -pub struct Pmu0 { +pub struct PMU0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Pmu0 {} -impl Pmu0 { +unsafe impl Send for PMU0 {} +impl PMU0 { #[doc = r"Pointer to the register block"] pub const PTR: *const pmu0::RegisterBlock = 0x5800_0508 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1341,26 +1341,26 @@ impl Pmu0 { Self { _marker: PhantomData } } } -impl Deref for Pmu0 { +impl Deref for PMU0 { type Target = pmu0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Pmu0 { +impl core::fmt::Debug for PMU0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Pmu0").finish() + f.debug_struct("PMU0").finish() } } #[doc = "Program Management Unit"] pub mod pmu0; #[doc = "Watch Dog Timer"] -pub struct Wdt { +pub struct WDT { _marker: PhantomData<*const ()>, } -unsafe impl Send for Wdt {} -impl Wdt { +unsafe impl Send for WDT {} +impl WDT { #[doc = r"Pointer to the register block"] pub const PTR: *const wdt::RegisterBlock = 0x5000_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1385,26 +1385,26 @@ impl Wdt { Self { _marker: PhantomData } } } -impl Deref for Wdt { +impl Deref for WDT { type Target = wdt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Wdt { +impl core::fmt::Debug for WDT { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Wdt").finish() + f.debug_struct("WDT").finish() } } #[doc = "Watch Dog Timer"] pub mod wdt; #[doc = "Real Time Clock"] -pub struct Rtc { +pub struct RTC { _marker: PhantomData<*const ()>, } -unsafe impl Send for Rtc {} -impl Rtc { +unsafe impl Send for RTC {} +impl RTC { #[doc = r"Pointer to the register block"] pub const PTR: *const rtc::RegisterBlock = 0x5000_4a00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1429,26 +1429,26 @@ impl Rtc { Self { _marker: PhantomData } } } -impl Deref for Rtc { +impl Deref for RTC { type Target = rtc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Rtc { +impl core::fmt::Debug for RTC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Rtc").finish() + f.debug_struct("RTC").finish() } } #[doc = "Real Time Clock"] pub mod rtc; #[doc = "System Control Unit"] -pub struct ScuClk { +pub struct SCU_CLK { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuClk {} -impl ScuClk { +unsafe impl Send for SCU_CLK {} +impl SCU_CLK { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_clk::RegisterBlock = 0x5000_4600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1473,26 +1473,26 @@ impl ScuClk { Self { _marker: PhantomData } } } -impl Deref for ScuClk { +impl Deref for SCU_CLK { type Target = scu_clk::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuClk { +impl core::fmt::Debug for SCU_CLK { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuClk").finish() + f.debug_struct("SCU_CLK").finish() } } #[doc = "System Control Unit"] pub mod scu_clk; #[doc = "System Control Unit"] -pub struct ScuOsc { +pub struct SCU_OSC { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuOsc {} -impl ScuOsc { +unsafe impl Send for SCU_OSC {} +impl SCU_OSC { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_osc::RegisterBlock = 0x5000_4700 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1517,26 +1517,26 @@ impl ScuOsc { Self { _marker: PhantomData } } } -impl Deref for ScuOsc { +impl Deref for SCU_OSC { type Target = scu_osc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuOsc { +impl core::fmt::Debug for SCU_OSC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuOsc").finish() + f.debug_struct("SCU_OSC").finish() } } #[doc = "System Control Unit"] pub mod scu_osc; #[doc = "System Control Unit"] -pub struct ScuPll { +pub struct SCU_PLL { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuPll {} -impl ScuPll { +unsafe impl Send for SCU_PLL {} +impl SCU_PLL { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_pll::RegisterBlock = 0x5000_4710 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1561,26 +1561,26 @@ impl ScuPll { Self { _marker: PhantomData } } } -impl Deref for ScuPll { +impl Deref for SCU_PLL { type Target = scu_pll::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuPll { +impl core::fmt::Debug for SCU_PLL { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuPll").finish() + f.debug_struct("SCU_PLL").finish() } } #[doc = "System Control Unit"] pub mod scu_pll; #[doc = "System Control Unit"] -pub struct ScuGeneral { +pub struct SCU_GENERAL { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuGeneral {} -impl ScuGeneral { +unsafe impl Send for SCU_GENERAL {} +impl SCU_GENERAL { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_general::RegisterBlock = 0x5000_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1605,26 +1605,26 @@ impl ScuGeneral { Self { _marker: PhantomData } } } -impl Deref for ScuGeneral { +impl Deref for SCU_GENERAL { type Target = scu_general::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuGeneral { +impl core::fmt::Debug for SCU_GENERAL { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuGeneral").finish() + f.debug_struct("SCU_GENERAL").finish() } } #[doc = "System Control Unit"] pub mod scu_general; #[doc = "System Control Unit"] -pub struct ScuInterrupt { +pub struct SCU_INTERRUPT { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuInterrupt {} -impl ScuInterrupt { +unsafe impl Send for SCU_INTERRUPT {} +impl SCU_INTERRUPT { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_interrupt::RegisterBlock = 0x5000_4074 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1649,26 +1649,26 @@ impl ScuInterrupt { Self { _marker: PhantomData } } } -impl Deref for ScuInterrupt { +impl Deref for SCU_INTERRUPT { type Target = scu_interrupt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuInterrupt { +impl core::fmt::Debug for SCU_INTERRUPT { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuInterrupt").finish() + f.debug_struct("SCU_INTERRUPT").finish() } } #[doc = "System Control Unit"] pub mod scu_interrupt; #[doc = "System Control Unit"] -pub struct ScuParity { +pub struct SCU_PARITY { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuParity {} -impl ScuParity { +unsafe impl Send for SCU_PARITY {} +impl SCU_PARITY { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_parity::RegisterBlock = 0x5000_413c as *const _; #[doc = r"Return the pointer to the register block"] @@ -1693,26 +1693,26 @@ impl ScuParity { Self { _marker: PhantomData } } } -impl Deref for ScuParity { +impl Deref for SCU_PARITY { type Target = scu_parity::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuParity { +impl core::fmt::Debug for SCU_PARITY { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuParity").finish() + f.debug_struct("SCU_PARITY").finish() } } #[doc = "System Control Unit"] pub mod scu_parity; #[doc = "System Control Unit"] -pub struct ScuTrap { +pub struct SCU_TRAP { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuTrap {} -impl ScuTrap { +unsafe impl Send for SCU_TRAP {} +impl SCU_TRAP { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_trap::RegisterBlock = 0x5000_4160 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1737,26 +1737,26 @@ impl ScuTrap { Self { _marker: PhantomData } } } -impl Deref for ScuTrap { +impl Deref for SCU_TRAP { type Target = scu_trap::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuTrap { +impl core::fmt::Debug for SCU_TRAP { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuTrap").finish() + f.debug_struct("SCU_TRAP").finish() } } #[doc = "System Control Unit"] pub mod scu_trap; #[doc = "System Control Unit"] -pub struct ScuHibernate { +pub struct SCU_HIBERNATE { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuHibernate {} -impl ScuHibernate { +unsafe impl Send for SCU_HIBERNATE {} +impl SCU_HIBERNATE { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_hibernate::RegisterBlock = 0x5000_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1781,26 +1781,26 @@ impl ScuHibernate { Self { _marker: PhantomData } } } -impl Deref for ScuHibernate { +impl Deref for SCU_HIBERNATE { type Target = scu_hibernate::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuHibernate { +impl core::fmt::Debug for SCU_HIBERNATE { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuHibernate").finish() + f.debug_struct("SCU_HIBERNATE").finish() } } #[doc = "System Control Unit"] pub mod scu_hibernate; #[doc = "System Control Unit"] -pub struct ScuPower { +pub struct SCU_POWER { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuPower {} -impl ScuPower { +unsafe impl Send for SCU_POWER {} +impl SCU_POWER { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_power::RegisterBlock = 0x5000_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1825,26 +1825,26 @@ impl ScuPower { Self { _marker: PhantomData } } } -impl Deref for ScuPower { +impl Deref for SCU_POWER { type Target = scu_power::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuPower { +impl core::fmt::Debug for SCU_POWER { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuPower").finish() + f.debug_struct("SCU_POWER").finish() } } #[doc = "System Control Unit"] pub mod scu_power; #[doc = "System Control Unit"] -pub struct ScuReset { +pub struct SCU_RESET { _marker: PhantomData<*const ()>, } -unsafe impl Send for ScuReset {} -impl ScuReset { +unsafe impl Send for SCU_RESET {} +impl SCU_RESET { #[doc = r"Pointer to the register block"] pub const PTR: *const scu_reset::RegisterBlock = 0x5000_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1869,26 +1869,26 @@ impl ScuReset { Self { _marker: PhantomData } } } -impl Deref for ScuReset { +impl Deref for SCU_RESET { type Target = scu_reset::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for ScuReset { +impl core::fmt::Debug for SCU_RESET { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("ScuReset").finish() + f.debug_struct("SCU_RESET").finish() } } #[doc = "System Control Unit"] pub mod scu_reset; #[doc = "LED and Touch Sense Unit 0"] -pub struct Ledts0 { +pub struct LEDTS0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ledts0 {} -impl Ledts0 { +unsafe impl Send for LEDTS0 {} +impl LEDTS0 { #[doc = r"Pointer to the register block"] pub const PTR: *const ledts0::RegisterBlock = 0x4801_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1913,26 +1913,26 @@ impl Ledts0 { Self { _marker: PhantomData } } } -impl Deref for Ledts0 { +impl Deref for LEDTS0 { type Target = ledts0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ledts0 { +impl core::fmt::Debug for LEDTS0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ledts0").finish() + f.debug_struct("LEDTS0").finish() } } #[doc = "LED and Touch Sense Unit 0"] pub mod ledts0; #[doc = "Universal Serial Bus"] -pub struct Usb0 { +pub struct USB0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0 {} -impl Usb0 { +unsafe impl Send for USB0 {} +impl USB0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0::RegisterBlock = 0x5004_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -1957,26 +1957,26 @@ impl Usb0 { Self { _marker: PhantomData } } } -impl Deref for Usb0 { +impl Deref for USB0 { type Target = usb0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0 { +impl core::fmt::Debug for USB0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0").finish() + f.debug_struct("USB0").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep0 { +pub struct USB0_EP0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep0 {} -impl Usb0Ep0 { +unsafe impl Send for USB0_EP0 {} +impl USB0_EP0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep0::RegisterBlock = 0x5004_0900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2001,26 +2001,26 @@ impl Usb0Ep0 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep0 { +impl Deref for USB0_EP0 { type Target = usb0_ep0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep0 { +impl core::fmt::Debug for USB0_EP0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep0").finish() + f.debug_struct("USB0_EP0").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0_ep0; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep1 { +pub struct USB0_EP1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep1 {} -impl Usb0Ep1 { +unsafe impl Send for USB0_EP1 {} +impl USB0_EP1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0920 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2045,26 +2045,26 @@ impl Usb0Ep1 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep1 { +impl Deref for USB0_EP1 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep1 { +impl core::fmt::Debug for USB0_EP1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep1").finish() + f.debug_struct("USB0_EP1").finish() } } #[doc = "Universal Serial Bus"] pub mod usb0_ep1; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep2 { +pub struct USB0_EP2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep2 {} -impl Usb0Ep2 { +unsafe impl Send for USB0_EP2 {} +impl USB0_EP2 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0940 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2089,26 +2089,26 @@ impl Usb0Ep2 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep2 { +impl Deref for USB0_EP2 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep2 { +impl core::fmt::Debug for USB0_EP2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep2").finish() + f.debug_struct("USB0_EP2").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep2; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep3 { +pub struct USB0_EP3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep3 {} -impl Usb0Ep3 { +unsafe impl Send for USB0_EP3 {} +impl USB0_EP3 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0960 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2133,26 +2133,26 @@ impl Usb0Ep3 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep3 { +impl Deref for USB0_EP3 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep3 { +impl core::fmt::Debug for USB0_EP3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep3").finish() + f.debug_struct("USB0_EP3").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep3; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep4 { +pub struct USB0_EP4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep4 {} -impl Usb0Ep4 { +unsafe impl Send for USB0_EP4 {} +impl USB0_EP4 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_0980 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2177,26 +2177,26 @@ impl Usb0Ep4 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep4 { +impl Deref for USB0_EP4 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep4 { +impl core::fmt::Debug for USB0_EP4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep4").finish() + f.debug_struct("USB0_EP4").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep4; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep5 { +pub struct USB0_EP5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep5 {} -impl Usb0Ep5 { +unsafe impl Send for USB0_EP5 {} +impl USB0_EP5 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_09a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2221,26 +2221,26 @@ impl Usb0Ep5 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep5 { +impl Deref for USB0_EP5 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep5 { +impl core::fmt::Debug for USB0_EP5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep5").finish() + f.debug_struct("USB0_EP5").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep5; #[doc = "Universal Serial Bus"] -pub struct Usb0Ep6 { +pub struct USB0_EP6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usb0Ep6 {} -impl Usb0Ep6 { +unsafe impl Send for USB0_EP6 {} +impl USB0_EP6 { #[doc = r"Pointer to the register block"] pub const PTR: *const usb0_ep1::RegisterBlock = 0x5004_09c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2265,26 +2265,26 @@ impl Usb0Ep6 { Self { _marker: PhantomData } } } -impl Deref for Usb0Ep6 { +impl Deref for USB0_EP6 { type Target = usb0_ep1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usb0Ep6 { +impl core::fmt::Debug for USB0_EP6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usb0Ep6").finish() + f.debug_struct("USB0_EP6").finish() } } #[doc = "Universal Serial Bus"] pub use self::usb0_ep1 as usb0_ep6; #[doc = "Universal Serial Interface Controller 0"] -pub struct Usic0 { +pub struct USIC0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic0 {} -impl Usic0 { +unsafe impl Send for USIC0 {} +impl USIC0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0::RegisterBlock = 0x4003_0008 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2309,26 +2309,26 @@ impl Usic0 { Self { _marker: PhantomData } } } -impl Deref for Usic0 { +impl Deref for USIC0 { type Target = usic0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic0 { +impl core::fmt::Debug for USIC0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic0").finish() + f.debug_struct("USIC0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub mod usic0; #[doc = "Universal Serial Interface Controller 1"] -pub struct Usic1 { +pub struct USIC1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic1 {} -impl Usic1 { +unsafe impl Send for USIC1 {} +impl USIC1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0::RegisterBlock = 0x4802_0008 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2353,26 +2353,26 @@ impl Usic1 { Self { _marker: PhantomData } } } -impl Deref for Usic1 { +impl Deref for USIC1 { type Target = usic0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic1 { +impl core::fmt::Debug for USIC1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic1").finish() + f.debug_struct("USIC1").finish() } } #[doc = "Universal Serial Interface Controller 1"] pub use self::usic0 as usic1; #[doc = "Universal Serial Interface Controller 0"] -pub struct Usic0Ch0 { +pub struct USIC0_CH0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic0Ch0 {} -impl Usic0Ch0 { +unsafe impl Send for USIC0_CH0 {} +impl USIC0_CH0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4003_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2397,26 +2397,26 @@ impl Usic0Ch0 { Self { _marker: PhantomData } } } -impl Deref for Usic0Ch0 { +impl Deref for USIC0_CH0 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic0Ch0 { +impl core::fmt::Debug for USIC0_CH0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic0Ch0").finish() + f.debug_struct("USIC0_CH0").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub mod usic0_ch0; #[doc = "Universal Serial Interface Controller 0"] -pub struct Usic0Ch1 { +pub struct USIC0_CH1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic0Ch1 {} -impl Usic0Ch1 { +unsafe impl Send for USIC0_CH1 {} +impl USIC0_CH1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4003_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2441,26 +2441,26 @@ impl Usic0Ch1 { Self { _marker: PhantomData } } } -impl Deref for Usic0Ch1 { +impl Deref for USIC0_CH1 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic0Ch1 { +impl core::fmt::Debug for USIC0_CH1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic0Ch1").finish() + f.debug_struct("USIC0_CH1").finish() } } #[doc = "Universal Serial Interface Controller 0"] pub use self::usic0_ch0 as usic0_ch1; #[doc = "Universal Serial Interface Controller 1"] -pub struct Usic1Ch0 { +pub struct USIC1_CH0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic1Ch0 {} -impl Usic1Ch0 { +unsafe impl Send for USIC1_CH0 {} +impl USIC1_CH0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2485,26 +2485,26 @@ impl Usic1Ch0 { Self { _marker: PhantomData } } } -impl Deref for Usic1Ch0 { +impl Deref for USIC1_CH0 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic1Ch0 { +impl core::fmt::Debug for USIC1_CH0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic1Ch0").finish() + f.debug_struct("USIC1_CH0").finish() } } #[doc = "Universal Serial Interface Controller 1"] pub use self::usic0_ch0 as usic1_ch0; #[doc = "Universal Serial Interface Controller 1"] -pub struct Usic1Ch1 { +pub struct USIC1_CH1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Usic1Ch1 {} -impl Usic1Ch1 { +unsafe impl Send for USIC1_CH1 {} +impl USIC1_CH1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usic0_ch0::RegisterBlock = 0x4802_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2529,26 +2529,26 @@ impl Usic1Ch1 { Self { _marker: PhantomData } } } -impl Deref for Usic1Ch1 { +impl Deref for USIC1_CH1 { type Target = usic0_ch0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Usic1Ch1 { +impl core::fmt::Debug for USIC1_CH1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Usic1Ch1").finish() + f.debug_struct("USIC1_CH1").finish() } } #[doc = "Universal Serial Interface Controller 1"] pub use self::usic0_ch0 as usic1_ch1; #[doc = "Controller Area Networks"] -pub struct Can { +pub struct CAN { _marker: PhantomData<*const ()>, } -unsafe impl Send for Can {} -impl Can { +unsafe impl Send for CAN {} +impl CAN { #[doc = r"Pointer to the register block"] pub const PTR: *const can::RegisterBlock = 0x4801_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2573,26 +2573,26 @@ impl Can { Self { _marker: PhantomData } } } -impl Deref for Can { +impl Deref for CAN { type Target = can::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Can { +impl core::fmt::Debug for CAN { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Can").finish() + f.debug_struct("CAN").finish() } } #[doc = "Controller Area Networks"] pub mod can; #[doc = "Controller Area Networks"] -pub struct CanNode0 { +pub struct CAN_NODE0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanNode0 {} -impl CanNode0 { +unsafe impl Send for CAN_NODE0 {} +impl CAN_NODE0 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2617,26 +2617,26 @@ impl CanNode0 { Self { _marker: PhantomData } } } -impl Deref for CanNode0 { +impl Deref for CAN_NODE0 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanNode0 { +impl core::fmt::Debug for CAN_NODE0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanNode0").finish() + f.debug_struct("CAN_NODE0").finish() } } #[doc = "Controller Area Networks"] pub mod can_node0; #[doc = "Controller Area Networks"] -pub struct CanNode1 { +pub struct CAN_NODE1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanNode1 {} -impl CanNode1 { +unsafe impl Send for CAN_NODE1 {} +impl CAN_NODE1 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_node0::RegisterBlock = 0x4801_4300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2661,26 +2661,26 @@ impl CanNode1 { Self { _marker: PhantomData } } } -impl Deref for CanNode1 { +impl Deref for CAN_NODE1 { type Target = can_node0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanNode1 { +impl core::fmt::Debug for CAN_NODE1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanNode1").finish() + f.debug_struct("CAN_NODE1").finish() } } #[doc = "Controller Area Networks"] pub use self::can_node0 as can_node1; #[doc = "Controller Area Networks"] -pub struct CanMo0 { +pub struct CAN_MO0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo0 {} -impl CanMo0 { +unsafe impl Send for CAN_MO0 {} +impl CAN_MO0 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2705,26 +2705,26 @@ impl CanMo0 { Self { _marker: PhantomData } } } -impl Deref for CanMo0 { +impl Deref for CAN_MO0 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo0 { +impl core::fmt::Debug for CAN_MO0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo0").finish() + f.debug_struct("CAN_MO0").finish() } } #[doc = "Controller Area Networks"] pub mod can_mo0; #[doc = "Controller Area Networks"] -pub struct CanMo1 { +pub struct CAN_MO1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo1 {} -impl CanMo1 { +unsafe impl Send for CAN_MO1 {} +impl CAN_MO1 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5020 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2749,26 +2749,26 @@ impl CanMo1 { Self { _marker: PhantomData } } } -impl Deref for CanMo1 { +impl Deref for CAN_MO1 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo1 { +impl core::fmt::Debug for CAN_MO1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo1").finish() + f.debug_struct("CAN_MO1").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo1; #[doc = "Controller Area Networks"] -pub struct CanMo2 { +pub struct CAN_MO2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo2 {} -impl CanMo2 { +unsafe impl Send for CAN_MO2 {} +impl CAN_MO2 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5040 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2793,26 +2793,26 @@ impl CanMo2 { Self { _marker: PhantomData } } } -impl Deref for CanMo2 { +impl Deref for CAN_MO2 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo2 { +impl core::fmt::Debug for CAN_MO2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo2").finish() + f.debug_struct("CAN_MO2").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo2; #[doc = "Controller Area Networks"] -pub struct CanMo3 { +pub struct CAN_MO3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo3 {} -impl CanMo3 { +unsafe impl Send for CAN_MO3 {} +impl CAN_MO3 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5060 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2837,26 +2837,26 @@ impl CanMo3 { Self { _marker: PhantomData } } } -impl Deref for CanMo3 { +impl Deref for CAN_MO3 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo3 { +impl core::fmt::Debug for CAN_MO3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo3").finish() + f.debug_struct("CAN_MO3").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo3; #[doc = "Controller Area Networks"] -pub struct CanMo4 { +pub struct CAN_MO4 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo4 {} -impl CanMo4 { +unsafe impl Send for CAN_MO4 {} +impl CAN_MO4 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5080 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2881,26 +2881,26 @@ impl CanMo4 { Self { _marker: PhantomData } } } -impl Deref for CanMo4 { +impl Deref for CAN_MO4 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo4 { +impl core::fmt::Debug for CAN_MO4 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo4").finish() + f.debug_struct("CAN_MO4").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo4; #[doc = "Controller Area Networks"] -pub struct CanMo5 { +pub struct CAN_MO5 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo5 {} -impl CanMo5 { +unsafe impl Send for CAN_MO5 {} +impl CAN_MO5 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_50a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2925,26 +2925,26 @@ impl CanMo5 { Self { _marker: PhantomData } } } -impl Deref for CanMo5 { +impl Deref for CAN_MO5 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo5 { +impl core::fmt::Debug for CAN_MO5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo5").finish() + f.debug_struct("CAN_MO5").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo5; #[doc = "Controller Area Networks"] -pub struct CanMo6 { +pub struct CAN_MO6 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo6 {} -impl CanMo6 { +unsafe impl Send for CAN_MO6 {} +impl CAN_MO6 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_50c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -2969,26 +2969,26 @@ impl CanMo6 { Self { _marker: PhantomData } } } -impl Deref for CanMo6 { +impl Deref for CAN_MO6 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo6 { +impl core::fmt::Debug for CAN_MO6 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo6").finish() + f.debug_struct("CAN_MO6").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo6; #[doc = "Controller Area Networks"] -pub struct CanMo7 { +pub struct CAN_MO7 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo7 {} -impl CanMo7 { +unsafe impl Send for CAN_MO7 {} +impl CAN_MO7 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_50e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3013,26 +3013,26 @@ impl CanMo7 { Self { _marker: PhantomData } } } -impl Deref for CanMo7 { +impl Deref for CAN_MO7 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo7 { +impl core::fmt::Debug for CAN_MO7 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo7").finish() + f.debug_struct("CAN_MO7").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo7; #[doc = "Controller Area Networks"] -pub struct CanMo8 { +pub struct CAN_MO8 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo8 {} -impl CanMo8 { +unsafe impl Send for CAN_MO8 {} +impl CAN_MO8 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3057,26 +3057,26 @@ impl CanMo8 { Self { _marker: PhantomData } } } -impl Deref for CanMo8 { +impl Deref for CAN_MO8 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo8 { +impl core::fmt::Debug for CAN_MO8 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo8").finish() + f.debug_struct("CAN_MO8").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo8; #[doc = "Controller Area Networks"] -pub struct CanMo9 { +pub struct CAN_MO9 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo9 {} -impl CanMo9 { +unsafe impl Send for CAN_MO9 {} +impl CAN_MO9 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5120 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3101,26 +3101,26 @@ impl CanMo9 { Self { _marker: PhantomData } } } -impl Deref for CanMo9 { +impl Deref for CAN_MO9 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo9 { +impl core::fmt::Debug for CAN_MO9 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo9").finish() + f.debug_struct("CAN_MO9").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo9; #[doc = "Controller Area Networks"] -pub struct CanMo10 { +pub struct CAN_MO10 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo10 {} -impl CanMo10 { +unsafe impl Send for CAN_MO10 {} +impl CAN_MO10 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5140 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3145,26 +3145,26 @@ impl CanMo10 { Self { _marker: PhantomData } } } -impl Deref for CanMo10 { +impl Deref for CAN_MO10 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo10 { +impl core::fmt::Debug for CAN_MO10 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo10").finish() + f.debug_struct("CAN_MO10").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo10; #[doc = "Controller Area Networks"] -pub struct CanMo11 { +pub struct CAN_MO11 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo11 {} -impl CanMo11 { +unsafe impl Send for CAN_MO11 {} +impl CAN_MO11 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5160 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3189,26 +3189,26 @@ impl CanMo11 { Self { _marker: PhantomData } } } -impl Deref for CanMo11 { +impl Deref for CAN_MO11 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo11 { +impl core::fmt::Debug for CAN_MO11 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo11").finish() + f.debug_struct("CAN_MO11").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo11; #[doc = "Controller Area Networks"] -pub struct CanMo12 { +pub struct CAN_MO12 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo12 {} -impl CanMo12 { +unsafe impl Send for CAN_MO12 {} +impl CAN_MO12 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5180 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3233,26 +3233,26 @@ impl CanMo12 { Self { _marker: PhantomData } } } -impl Deref for CanMo12 { +impl Deref for CAN_MO12 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo12 { +impl core::fmt::Debug for CAN_MO12 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo12").finish() + f.debug_struct("CAN_MO12").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo12; #[doc = "Controller Area Networks"] -pub struct CanMo13 { +pub struct CAN_MO13 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo13 {} -impl CanMo13 { +unsafe impl Send for CAN_MO13 {} +impl CAN_MO13 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_51a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3277,26 +3277,26 @@ impl CanMo13 { Self { _marker: PhantomData } } } -impl Deref for CanMo13 { +impl Deref for CAN_MO13 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo13 { +impl core::fmt::Debug for CAN_MO13 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo13").finish() + f.debug_struct("CAN_MO13").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo13; #[doc = "Controller Area Networks"] -pub struct CanMo14 { +pub struct CAN_MO14 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo14 {} -impl CanMo14 { +unsafe impl Send for CAN_MO14 {} +impl CAN_MO14 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_51c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3321,26 +3321,26 @@ impl CanMo14 { Self { _marker: PhantomData } } } -impl Deref for CanMo14 { +impl Deref for CAN_MO14 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo14 { +impl core::fmt::Debug for CAN_MO14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo14").finish() + f.debug_struct("CAN_MO14").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo14; #[doc = "Controller Area Networks"] -pub struct CanMo15 { +pub struct CAN_MO15 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo15 {} -impl CanMo15 { +unsafe impl Send for CAN_MO15 {} +impl CAN_MO15 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_51e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3365,26 +3365,26 @@ impl CanMo15 { Self { _marker: PhantomData } } } -impl Deref for CanMo15 { +impl Deref for CAN_MO15 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo15 { +impl core::fmt::Debug for CAN_MO15 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo15").finish() + f.debug_struct("CAN_MO15").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo15; #[doc = "Controller Area Networks"] -pub struct CanMo16 { +pub struct CAN_MO16 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo16 {} -impl CanMo16 { +unsafe impl Send for CAN_MO16 {} +impl CAN_MO16 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3409,26 +3409,26 @@ impl CanMo16 { Self { _marker: PhantomData } } } -impl Deref for CanMo16 { +impl Deref for CAN_MO16 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo16 { +impl core::fmt::Debug for CAN_MO16 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo16").finish() + f.debug_struct("CAN_MO16").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo16; #[doc = "Controller Area Networks"] -pub struct CanMo17 { +pub struct CAN_MO17 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo17 {} -impl CanMo17 { +unsafe impl Send for CAN_MO17 {} +impl CAN_MO17 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5220 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3453,26 +3453,26 @@ impl CanMo17 { Self { _marker: PhantomData } } } -impl Deref for CanMo17 { +impl Deref for CAN_MO17 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo17 { +impl core::fmt::Debug for CAN_MO17 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo17").finish() + f.debug_struct("CAN_MO17").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo17; #[doc = "Controller Area Networks"] -pub struct CanMo18 { +pub struct CAN_MO18 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo18 {} -impl CanMo18 { +unsafe impl Send for CAN_MO18 {} +impl CAN_MO18 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5240 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3497,26 +3497,26 @@ impl CanMo18 { Self { _marker: PhantomData } } } -impl Deref for CanMo18 { +impl Deref for CAN_MO18 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo18 { +impl core::fmt::Debug for CAN_MO18 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo18").finish() + f.debug_struct("CAN_MO18").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo18; #[doc = "Controller Area Networks"] -pub struct CanMo19 { +pub struct CAN_MO19 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo19 {} -impl CanMo19 { +unsafe impl Send for CAN_MO19 {} +impl CAN_MO19 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5260 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3541,26 +3541,26 @@ impl CanMo19 { Self { _marker: PhantomData } } } -impl Deref for CanMo19 { +impl Deref for CAN_MO19 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo19 { +impl core::fmt::Debug for CAN_MO19 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo19").finish() + f.debug_struct("CAN_MO19").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo19; #[doc = "Controller Area Networks"] -pub struct CanMo20 { +pub struct CAN_MO20 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo20 {} -impl CanMo20 { +unsafe impl Send for CAN_MO20 {} +impl CAN_MO20 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5280 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3585,26 +3585,26 @@ impl CanMo20 { Self { _marker: PhantomData } } } -impl Deref for CanMo20 { +impl Deref for CAN_MO20 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo20 { +impl core::fmt::Debug for CAN_MO20 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo20").finish() + f.debug_struct("CAN_MO20").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo20; #[doc = "Controller Area Networks"] -pub struct CanMo21 { +pub struct CAN_MO21 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo21 {} -impl CanMo21 { +unsafe impl Send for CAN_MO21 {} +impl CAN_MO21 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_52a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3629,26 +3629,26 @@ impl CanMo21 { Self { _marker: PhantomData } } } -impl Deref for CanMo21 { +impl Deref for CAN_MO21 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo21 { +impl core::fmt::Debug for CAN_MO21 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo21").finish() + f.debug_struct("CAN_MO21").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo21; #[doc = "Controller Area Networks"] -pub struct CanMo22 { +pub struct CAN_MO22 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo22 {} -impl CanMo22 { +unsafe impl Send for CAN_MO22 {} +impl CAN_MO22 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_52c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3673,26 +3673,26 @@ impl CanMo22 { Self { _marker: PhantomData } } } -impl Deref for CanMo22 { +impl Deref for CAN_MO22 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo22 { +impl core::fmt::Debug for CAN_MO22 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo22").finish() + f.debug_struct("CAN_MO22").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo22; #[doc = "Controller Area Networks"] -pub struct CanMo23 { +pub struct CAN_MO23 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo23 {} -impl CanMo23 { +unsafe impl Send for CAN_MO23 {} +impl CAN_MO23 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_52e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3717,26 +3717,26 @@ impl CanMo23 { Self { _marker: PhantomData } } } -impl Deref for CanMo23 { +impl Deref for CAN_MO23 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo23 { +impl core::fmt::Debug for CAN_MO23 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo23").finish() + f.debug_struct("CAN_MO23").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo23; #[doc = "Controller Area Networks"] -pub struct CanMo24 { +pub struct CAN_MO24 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo24 {} -impl CanMo24 { +unsafe impl Send for CAN_MO24 {} +impl CAN_MO24 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3761,26 +3761,26 @@ impl CanMo24 { Self { _marker: PhantomData } } } -impl Deref for CanMo24 { +impl Deref for CAN_MO24 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo24 { +impl core::fmt::Debug for CAN_MO24 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo24").finish() + f.debug_struct("CAN_MO24").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo24; #[doc = "Controller Area Networks"] -pub struct CanMo25 { +pub struct CAN_MO25 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo25 {} -impl CanMo25 { +unsafe impl Send for CAN_MO25 {} +impl CAN_MO25 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5320 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3805,26 +3805,26 @@ impl CanMo25 { Self { _marker: PhantomData } } } -impl Deref for CanMo25 { +impl Deref for CAN_MO25 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo25 { +impl core::fmt::Debug for CAN_MO25 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo25").finish() + f.debug_struct("CAN_MO25").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo25; #[doc = "Controller Area Networks"] -pub struct CanMo26 { +pub struct CAN_MO26 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo26 {} -impl CanMo26 { +unsafe impl Send for CAN_MO26 {} +impl CAN_MO26 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5340 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3849,26 +3849,26 @@ impl CanMo26 { Self { _marker: PhantomData } } } -impl Deref for CanMo26 { +impl Deref for CAN_MO26 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo26 { +impl core::fmt::Debug for CAN_MO26 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo26").finish() + f.debug_struct("CAN_MO26").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo26; #[doc = "Controller Area Networks"] -pub struct CanMo27 { +pub struct CAN_MO27 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo27 {} -impl CanMo27 { +unsafe impl Send for CAN_MO27 {} +impl CAN_MO27 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5360 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3893,26 +3893,26 @@ impl CanMo27 { Self { _marker: PhantomData } } } -impl Deref for CanMo27 { +impl Deref for CAN_MO27 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo27 { +impl core::fmt::Debug for CAN_MO27 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo27").finish() + f.debug_struct("CAN_MO27").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo27; #[doc = "Controller Area Networks"] -pub struct CanMo28 { +pub struct CAN_MO28 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo28 {} -impl CanMo28 { +unsafe impl Send for CAN_MO28 {} +impl CAN_MO28 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5380 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3937,26 +3937,26 @@ impl CanMo28 { Self { _marker: PhantomData } } } -impl Deref for CanMo28 { +impl Deref for CAN_MO28 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo28 { +impl core::fmt::Debug for CAN_MO28 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo28").finish() + f.debug_struct("CAN_MO28").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo28; #[doc = "Controller Area Networks"] -pub struct CanMo29 { +pub struct CAN_MO29 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo29 {} -impl CanMo29 { +unsafe impl Send for CAN_MO29 {} +impl CAN_MO29 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_53a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -3981,26 +3981,26 @@ impl CanMo29 { Self { _marker: PhantomData } } } -impl Deref for CanMo29 { +impl Deref for CAN_MO29 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo29 { +impl core::fmt::Debug for CAN_MO29 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo29").finish() + f.debug_struct("CAN_MO29").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo29; #[doc = "Controller Area Networks"] -pub struct CanMo30 { +pub struct CAN_MO30 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo30 {} -impl CanMo30 { +unsafe impl Send for CAN_MO30 {} +impl CAN_MO30 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_53c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4025,26 +4025,26 @@ impl CanMo30 { Self { _marker: PhantomData } } } -impl Deref for CanMo30 { +impl Deref for CAN_MO30 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo30 { +impl core::fmt::Debug for CAN_MO30 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo30").finish() + f.debug_struct("CAN_MO30").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo30; #[doc = "Controller Area Networks"] -pub struct CanMo31 { +pub struct CAN_MO31 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo31 {} -impl CanMo31 { +unsafe impl Send for CAN_MO31 {} +impl CAN_MO31 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_53e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4069,26 +4069,26 @@ impl CanMo31 { Self { _marker: PhantomData } } } -impl Deref for CanMo31 { +impl Deref for CAN_MO31 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo31 { +impl core::fmt::Debug for CAN_MO31 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo31").finish() + f.debug_struct("CAN_MO31").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo31; #[doc = "Controller Area Networks"] -pub struct CanMo32 { +pub struct CAN_MO32 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo32 {} -impl CanMo32 { +unsafe impl Send for CAN_MO32 {} +impl CAN_MO32 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4113,26 +4113,26 @@ impl CanMo32 { Self { _marker: PhantomData } } } -impl Deref for CanMo32 { +impl Deref for CAN_MO32 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo32 { +impl core::fmt::Debug for CAN_MO32 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo32").finish() + f.debug_struct("CAN_MO32").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo32; #[doc = "Controller Area Networks"] -pub struct CanMo33 { +pub struct CAN_MO33 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo33 {} -impl CanMo33 { +unsafe impl Send for CAN_MO33 {} +impl CAN_MO33 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5420 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4157,26 +4157,26 @@ impl CanMo33 { Self { _marker: PhantomData } } } -impl Deref for CanMo33 { +impl Deref for CAN_MO33 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo33 { +impl core::fmt::Debug for CAN_MO33 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo33").finish() + f.debug_struct("CAN_MO33").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo33; #[doc = "Controller Area Networks"] -pub struct CanMo34 { +pub struct CAN_MO34 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo34 {} -impl CanMo34 { +unsafe impl Send for CAN_MO34 {} +impl CAN_MO34 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5440 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4201,26 +4201,26 @@ impl CanMo34 { Self { _marker: PhantomData } } } -impl Deref for CanMo34 { +impl Deref for CAN_MO34 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo34 { +impl core::fmt::Debug for CAN_MO34 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo34").finish() + f.debug_struct("CAN_MO34").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo34; #[doc = "Controller Area Networks"] -pub struct CanMo35 { +pub struct CAN_MO35 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo35 {} -impl CanMo35 { +unsafe impl Send for CAN_MO35 {} +impl CAN_MO35 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5460 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4245,26 +4245,26 @@ impl CanMo35 { Self { _marker: PhantomData } } } -impl Deref for CanMo35 { +impl Deref for CAN_MO35 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo35 { +impl core::fmt::Debug for CAN_MO35 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo35").finish() + f.debug_struct("CAN_MO35").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo35; #[doc = "Controller Area Networks"] -pub struct CanMo36 { +pub struct CAN_MO36 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo36 {} -impl CanMo36 { +unsafe impl Send for CAN_MO36 {} +impl CAN_MO36 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5480 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4289,26 +4289,26 @@ impl CanMo36 { Self { _marker: PhantomData } } } -impl Deref for CanMo36 { +impl Deref for CAN_MO36 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo36 { +impl core::fmt::Debug for CAN_MO36 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo36").finish() + f.debug_struct("CAN_MO36").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo36; #[doc = "Controller Area Networks"] -pub struct CanMo37 { +pub struct CAN_MO37 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo37 {} -impl CanMo37 { +unsafe impl Send for CAN_MO37 {} +impl CAN_MO37 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_54a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4333,26 +4333,26 @@ impl CanMo37 { Self { _marker: PhantomData } } } -impl Deref for CanMo37 { +impl Deref for CAN_MO37 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo37 { +impl core::fmt::Debug for CAN_MO37 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo37").finish() + f.debug_struct("CAN_MO37").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo37; #[doc = "Controller Area Networks"] -pub struct CanMo38 { +pub struct CAN_MO38 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo38 {} -impl CanMo38 { +unsafe impl Send for CAN_MO38 {} +impl CAN_MO38 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_54c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4377,26 +4377,26 @@ impl CanMo38 { Self { _marker: PhantomData } } } -impl Deref for CanMo38 { +impl Deref for CAN_MO38 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo38 { +impl core::fmt::Debug for CAN_MO38 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo38").finish() + f.debug_struct("CAN_MO38").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo38; #[doc = "Controller Area Networks"] -pub struct CanMo39 { +pub struct CAN_MO39 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo39 {} -impl CanMo39 { +unsafe impl Send for CAN_MO39 {} +impl CAN_MO39 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_54e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4421,26 +4421,26 @@ impl CanMo39 { Self { _marker: PhantomData } } } -impl Deref for CanMo39 { +impl Deref for CAN_MO39 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo39 { +impl core::fmt::Debug for CAN_MO39 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo39").finish() + f.debug_struct("CAN_MO39").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo39; #[doc = "Controller Area Networks"] -pub struct CanMo40 { +pub struct CAN_MO40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo40 {} -impl CanMo40 { +unsafe impl Send for CAN_MO40 {} +impl CAN_MO40 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5500 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4465,26 +4465,26 @@ impl CanMo40 { Self { _marker: PhantomData } } } -impl Deref for CanMo40 { +impl Deref for CAN_MO40 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo40 { +impl core::fmt::Debug for CAN_MO40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo40").finish() + f.debug_struct("CAN_MO40").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo40; #[doc = "Controller Area Networks"] -pub struct CanMo41 { +pub struct CAN_MO41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo41 {} -impl CanMo41 { +unsafe impl Send for CAN_MO41 {} +impl CAN_MO41 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5520 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4509,26 +4509,26 @@ impl CanMo41 { Self { _marker: PhantomData } } } -impl Deref for CanMo41 { +impl Deref for CAN_MO41 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo41 { +impl core::fmt::Debug for CAN_MO41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo41").finish() + f.debug_struct("CAN_MO41").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo41; #[doc = "Controller Area Networks"] -pub struct CanMo42 { +pub struct CAN_MO42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo42 {} -impl CanMo42 { +unsafe impl Send for CAN_MO42 {} +impl CAN_MO42 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5540 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4553,26 +4553,26 @@ impl CanMo42 { Self { _marker: PhantomData } } } -impl Deref for CanMo42 { +impl Deref for CAN_MO42 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo42 { +impl core::fmt::Debug for CAN_MO42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo42").finish() + f.debug_struct("CAN_MO42").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo42; #[doc = "Controller Area Networks"] -pub struct CanMo43 { +pub struct CAN_MO43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo43 {} -impl CanMo43 { +unsafe impl Send for CAN_MO43 {} +impl CAN_MO43 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5560 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4597,26 +4597,26 @@ impl CanMo43 { Self { _marker: PhantomData } } } -impl Deref for CanMo43 { +impl Deref for CAN_MO43 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo43 { +impl core::fmt::Debug for CAN_MO43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo43").finish() + f.debug_struct("CAN_MO43").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo43; #[doc = "Controller Area Networks"] -pub struct CanMo44 { +pub struct CAN_MO44 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo44 {} -impl CanMo44 { +unsafe impl Send for CAN_MO44 {} +impl CAN_MO44 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5580 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4641,26 +4641,26 @@ impl CanMo44 { Self { _marker: PhantomData } } } -impl Deref for CanMo44 { +impl Deref for CAN_MO44 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo44 { +impl core::fmt::Debug for CAN_MO44 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo44").finish() + f.debug_struct("CAN_MO44").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo44; #[doc = "Controller Area Networks"] -pub struct CanMo45 { +pub struct CAN_MO45 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo45 {} -impl CanMo45 { +unsafe impl Send for CAN_MO45 {} +impl CAN_MO45 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_55a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4685,26 +4685,26 @@ impl CanMo45 { Self { _marker: PhantomData } } } -impl Deref for CanMo45 { +impl Deref for CAN_MO45 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo45 { +impl core::fmt::Debug for CAN_MO45 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo45").finish() + f.debug_struct("CAN_MO45").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo45; #[doc = "Controller Area Networks"] -pub struct CanMo46 { +pub struct CAN_MO46 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo46 {} -impl CanMo46 { +unsafe impl Send for CAN_MO46 {} +impl CAN_MO46 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_55c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4729,26 +4729,26 @@ impl CanMo46 { Self { _marker: PhantomData } } } -impl Deref for CanMo46 { +impl Deref for CAN_MO46 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo46 { +impl core::fmt::Debug for CAN_MO46 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo46").finish() + f.debug_struct("CAN_MO46").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo46; #[doc = "Controller Area Networks"] -pub struct CanMo47 { +pub struct CAN_MO47 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo47 {} -impl CanMo47 { +unsafe impl Send for CAN_MO47 {} +impl CAN_MO47 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_55e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4773,26 +4773,26 @@ impl CanMo47 { Self { _marker: PhantomData } } } -impl Deref for CanMo47 { +impl Deref for CAN_MO47 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo47 { +impl core::fmt::Debug for CAN_MO47 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo47").finish() + f.debug_struct("CAN_MO47").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo47; #[doc = "Controller Area Networks"] -pub struct CanMo48 { +pub struct CAN_MO48 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo48 {} -impl CanMo48 { +unsafe impl Send for CAN_MO48 {} +impl CAN_MO48 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4817,26 +4817,26 @@ impl CanMo48 { Self { _marker: PhantomData } } } -impl Deref for CanMo48 { +impl Deref for CAN_MO48 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo48 { +impl core::fmt::Debug for CAN_MO48 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo48").finish() + f.debug_struct("CAN_MO48").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo48; #[doc = "Controller Area Networks"] -pub struct CanMo49 { +pub struct CAN_MO49 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo49 {} -impl CanMo49 { +unsafe impl Send for CAN_MO49 {} +impl CAN_MO49 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5620 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4861,26 +4861,26 @@ impl CanMo49 { Self { _marker: PhantomData } } } -impl Deref for CanMo49 { +impl Deref for CAN_MO49 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo49 { +impl core::fmt::Debug for CAN_MO49 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo49").finish() + f.debug_struct("CAN_MO49").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo49; #[doc = "Controller Area Networks"] -pub struct CanMo50 { +pub struct CAN_MO50 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo50 {} -impl CanMo50 { +unsafe impl Send for CAN_MO50 {} +impl CAN_MO50 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5640 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4905,26 +4905,26 @@ impl CanMo50 { Self { _marker: PhantomData } } } -impl Deref for CanMo50 { +impl Deref for CAN_MO50 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo50 { +impl core::fmt::Debug for CAN_MO50 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo50").finish() + f.debug_struct("CAN_MO50").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo50; #[doc = "Controller Area Networks"] -pub struct CanMo51 { +pub struct CAN_MO51 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo51 {} -impl CanMo51 { +unsafe impl Send for CAN_MO51 {} +impl CAN_MO51 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5660 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4949,26 +4949,26 @@ impl CanMo51 { Self { _marker: PhantomData } } } -impl Deref for CanMo51 { +impl Deref for CAN_MO51 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo51 { +impl core::fmt::Debug for CAN_MO51 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo51").finish() + f.debug_struct("CAN_MO51").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo51; #[doc = "Controller Area Networks"] -pub struct CanMo52 { +pub struct CAN_MO52 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo52 {} -impl CanMo52 { +unsafe impl Send for CAN_MO52 {} +impl CAN_MO52 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5680 as *const _; #[doc = r"Return the pointer to the register block"] @@ -4993,26 +4993,26 @@ impl CanMo52 { Self { _marker: PhantomData } } } -impl Deref for CanMo52 { +impl Deref for CAN_MO52 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo52 { +impl core::fmt::Debug for CAN_MO52 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo52").finish() + f.debug_struct("CAN_MO52").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo52; #[doc = "Controller Area Networks"] -pub struct CanMo53 { +pub struct CAN_MO53 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo53 {} -impl CanMo53 { +unsafe impl Send for CAN_MO53 {} +impl CAN_MO53 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_56a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5037,26 +5037,26 @@ impl CanMo53 { Self { _marker: PhantomData } } } -impl Deref for CanMo53 { +impl Deref for CAN_MO53 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo53 { +impl core::fmt::Debug for CAN_MO53 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo53").finish() + f.debug_struct("CAN_MO53").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo53; #[doc = "Controller Area Networks"] -pub struct CanMo54 { +pub struct CAN_MO54 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo54 {} -impl CanMo54 { +unsafe impl Send for CAN_MO54 {} +impl CAN_MO54 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_56c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5081,26 +5081,26 @@ impl CanMo54 { Self { _marker: PhantomData } } } -impl Deref for CanMo54 { +impl Deref for CAN_MO54 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo54 { +impl core::fmt::Debug for CAN_MO54 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo54").finish() + f.debug_struct("CAN_MO54").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo54; #[doc = "Controller Area Networks"] -pub struct CanMo55 { +pub struct CAN_MO55 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo55 {} -impl CanMo55 { +unsafe impl Send for CAN_MO55 {} +impl CAN_MO55 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_56e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5125,26 +5125,26 @@ impl CanMo55 { Self { _marker: PhantomData } } } -impl Deref for CanMo55 { +impl Deref for CAN_MO55 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo55 { +impl core::fmt::Debug for CAN_MO55 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo55").finish() + f.debug_struct("CAN_MO55").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo55; #[doc = "Controller Area Networks"] -pub struct CanMo56 { +pub struct CAN_MO56 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo56 {} -impl CanMo56 { +unsafe impl Send for CAN_MO56 {} +impl CAN_MO56 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5700 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5169,26 +5169,26 @@ impl CanMo56 { Self { _marker: PhantomData } } } -impl Deref for CanMo56 { +impl Deref for CAN_MO56 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo56 { +impl core::fmt::Debug for CAN_MO56 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo56").finish() + f.debug_struct("CAN_MO56").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo56; #[doc = "Controller Area Networks"] -pub struct CanMo57 { +pub struct CAN_MO57 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo57 {} -impl CanMo57 { +unsafe impl Send for CAN_MO57 {} +impl CAN_MO57 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5720 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5213,26 +5213,26 @@ impl CanMo57 { Self { _marker: PhantomData } } } -impl Deref for CanMo57 { +impl Deref for CAN_MO57 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo57 { +impl core::fmt::Debug for CAN_MO57 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo57").finish() + f.debug_struct("CAN_MO57").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo57; #[doc = "Controller Area Networks"] -pub struct CanMo58 { +pub struct CAN_MO58 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo58 {} -impl CanMo58 { +unsafe impl Send for CAN_MO58 {} +impl CAN_MO58 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5740 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5257,26 +5257,26 @@ impl CanMo58 { Self { _marker: PhantomData } } } -impl Deref for CanMo58 { +impl Deref for CAN_MO58 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo58 { +impl core::fmt::Debug for CAN_MO58 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo58").finish() + f.debug_struct("CAN_MO58").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo58; #[doc = "Controller Area Networks"] -pub struct CanMo59 { +pub struct CAN_MO59 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo59 {} -impl CanMo59 { +unsafe impl Send for CAN_MO59 {} +impl CAN_MO59 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5760 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5301,26 +5301,26 @@ impl CanMo59 { Self { _marker: PhantomData } } } -impl Deref for CanMo59 { +impl Deref for CAN_MO59 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo59 { +impl core::fmt::Debug for CAN_MO59 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo59").finish() + f.debug_struct("CAN_MO59").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo59; #[doc = "Controller Area Networks"] -pub struct CanMo60 { +pub struct CAN_MO60 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo60 {} -impl CanMo60 { +unsafe impl Send for CAN_MO60 {} +impl CAN_MO60 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_5780 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5345,26 +5345,26 @@ impl CanMo60 { Self { _marker: PhantomData } } } -impl Deref for CanMo60 { +impl Deref for CAN_MO60 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo60 { +impl core::fmt::Debug for CAN_MO60 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo60").finish() + f.debug_struct("CAN_MO60").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo60; #[doc = "Controller Area Networks"] -pub struct CanMo61 { +pub struct CAN_MO61 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo61 {} -impl CanMo61 { +unsafe impl Send for CAN_MO61 {} +impl CAN_MO61 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_57a0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5389,26 +5389,26 @@ impl CanMo61 { Self { _marker: PhantomData } } } -impl Deref for CanMo61 { +impl Deref for CAN_MO61 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo61 { +impl core::fmt::Debug for CAN_MO61 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo61").finish() + f.debug_struct("CAN_MO61").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo61; #[doc = "Controller Area Networks"] -pub struct CanMo62 { +pub struct CAN_MO62 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo62 {} -impl CanMo62 { +unsafe impl Send for CAN_MO62 {} +impl CAN_MO62 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_57c0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5433,26 +5433,26 @@ impl CanMo62 { Self { _marker: PhantomData } } } -impl Deref for CanMo62 { +impl Deref for CAN_MO62 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo62 { +impl core::fmt::Debug for CAN_MO62 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo62").finish() + f.debug_struct("CAN_MO62").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo62; #[doc = "Controller Area Networks"] -pub struct CanMo63 { +pub struct CAN_MO63 { _marker: PhantomData<*const ()>, } -unsafe impl Send for CanMo63 {} -impl CanMo63 { +unsafe impl Send for CAN_MO63 {} +impl CAN_MO63 { #[doc = r"Pointer to the register block"] pub const PTR: *const can_mo0::RegisterBlock = 0x4801_57e0 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5477,26 +5477,26 @@ impl CanMo63 { Self { _marker: PhantomData } } } -impl Deref for CanMo63 { +impl Deref for CAN_MO63 { type Target = can_mo0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for CanMo63 { +impl core::fmt::Debug for CAN_MO63 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("CanMo63").finish() + f.debug_struct("CAN_MO63").finish() } } #[doc = "Controller Area Networks"] pub use self::can_mo0 as can_mo63; #[doc = "Analog to Digital Converter"] -pub struct Vadc { +pub struct VADC { _marker: PhantomData<*const ()>, } -unsafe impl Send for Vadc {} -impl Vadc { +unsafe impl Send for VADC {} +impl VADC { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc::RegisterBlock = 0x4000_4000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5521,26 +5521,26 @@ impl Vadc { Self { _marker: PhantomData } } } -impl Deref for Vadc { +impl Deref for VADC { type Target = vadc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Vadc { +impl core::fmt::Debug for VADC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Vadc").finish() + f.debug_struct("VADC").finish() } } #[doc = "Analog to Digital Converter"] pub mod vadc; #[doc = "Analog to Digital Converter"] -pub struct VadcG0 { +pub struct VADC_G0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VadcG0 {} -impl VadcG0 { +unsafe impl Send for VADC_G0 {} +impl VADC_G0 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_4400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5565,26 +5565,26 @@ impl VadcG0 { Self { _marker: PhantomData } } } -impl Deref for VadcG0 { +impl Deref for VADC_G0 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VadcG0 { +impl core::fmt::Debug for VADC_G0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VadcG0").finish() + f.debug_struct("VADC_G0").finish() } } #[doc = "Analog to Digital Converter"] pub mod vadc_g0; #[doc = "Analog to Digital Converter"] -pub struct VadcG1 { +pub struct VADC_G1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for VadcG1 {} -impl VadcG1 { +unsafe impl Send for VADC_G1 {} +impl VADC_G1 { #[doc = r"Pointer to the register block"] pub const PTR: *const vadc_g0::RegisterBlock = 0x4000_4800 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5609,26 +5609,26 @@ impl VadcG1 { Self { _marker: PhantomData } } } -impl Deref for VadcG1 { +impl Deref for VADC_G1 { type Target = vadc_g0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for VadcG1 { +impl core::fmt::Debug for VADC_G1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("VadcG1").finish() + f.debug_struct("VADC_G1").finish() } } #[doc = "Analog to Digital Converter"] pub use self::vadc_g0 as vadc_g1; #[doc = "Digital to Analog Converter"] -pub struct Dac { +pub struct DAC { _marker: PhantomData<*const ()>, } -unsafe impl Send for Dac {} -impl Dac { +unsafe impl Send for DAC {} +impl DAC { #[doc = r"Pointer to the register block"] pub const PTR: *const dac::RegisterBlock = 0x4801_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5653,26 +5653,26 @@ impl Dac { Self { _marker: PhantomData } } } -impl Deref for Dac { +impl Deref for DAC { type Target = dac::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Dac { +impl core::fmt::Debug for DAC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Dac").finish() + f.debug_struct("DAC").finish() } } #[doc = "Digital to Analog Converter"] pub mod dac; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct Ccu40 { +pub struct CCU40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu40 {} -impl Ccu40 { +unsafe impl Send for CCU40 {} +impl CCU40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4000_c000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5697,26 +5697,26 @@ impl Ccu40 { Self { _marker: PhantomData } } } -impl Deref for Ccu40 { +impl Deref for CCU40 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu40 { +impl core::fmt::Debug for CCU40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu40").finish() + f.debug_struct("CCU40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub mod ccu40; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct Ccu41 { +pub struct CCU41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu41 {} -impl Ccu41 { +unsafe impl Send for CCU41 {} +impl CCU41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40::RegisterBlock = 0x4001_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5741,26 +5741,26 @@ impl Ccu41 { Self { _marker: PhantomData } } } -impl Deref for Ccu41 { +impl Deref for CCU41 { type Target = ccu40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu41 { +impl core::fmt::Debug for CCU41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu41").finish() + f.debug_struct("CCU41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40 as ccu41; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct Ccu40Cc40 { +pub struct CCU40_CC40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu40Cc40 {} -impl Ccu40Cc40 { +unsafe impl Send for CCU40_CC40 {} +impl CCU40_CC40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5785,26 +5785,26 @@ impl Ccu40Cc40 { Self { _marker: PhantomData } } } -impl Deref for Ccu40Cc40 { +impl Deref for CCU40_CC40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu40Cc40 { +impl core::fmt::Debug for CCU40_CC40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu40Cc40").finish() + f.debug_struct("CCU40_CC40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub mod ccu40_cc40; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct Ccu40Cc41 { +pub struct CCU40_CC41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu40Cc41 {} -impl Ccu40Cc41 { +unsafe impl Send for CCU40_CC41 {} +impl CCU40_CC41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5829,26 +5829,26 @@ impl Ccu40Cc41 { Self { _marker: PhantomData } } } -impl Deref for Ccu40Cc41 { +impl Deref for CCU40_CC41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu40Cc41 { +impl core::fmt::Debug for CCU40_CC41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu40Cc41").finish() + f.debug_struct("CCU40_CC41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc41; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct Ccu40Cc42 { +pub struct CCU40_CC42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu40Cc42 {} -impl Ccu40Cc42 { +unsafe impl Send for CCU40_CC42 {} +impl CCU40_CC42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5873,26 +5873,26 @@ impl Ccu40Cc42 { Self { _marker: PhantomData } } } -impl Deref for Ccu40Cc42 { +impl Deref for CCU40_CC42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu40Cc42 { +impl core::fmt::Debug for CCU40_CC42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu40Cc42").finish() + f.debug_struct("CCU40_CC42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc42; #[doc = "Capture Compare Unit 4 - Unit 0"] -pub struct Ccu40Cc43 { +pub struct CCU40_CC43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu40Cc43 {} -impl Ccu40Cc43 { +unsafe impl Send for CCU40_CC43 {} +impl CCU40_CC43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4000_c400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5917,26 +5917,26 @@ impl Ccu40Cc43 { Self { _marker: PhantomData } } } -impl Deref for Ccu40Cc43 { +impl Deref for CCU40_CC43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu40Cc43 { +impl core::fmt::Debug for CCU40_CC43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu40Cc43").finish() + f.debug_struct("CCU40_CC43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 0"] pub use self::ccu40_cc40 as ccu40_cc43; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct Ccu41Cc40 { +pub struct CCU41_CC40 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu41Cc40 {} -impl Ccu41Cc40 { +unsafe impl Send for CCU41_CC40 {} +impl CCU41_CC40 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -5961,26 +5961,26 @@ impl Ccu41Cc40 { Self { _marker: PhantomData } } } -impl Deref for Ccu41Cc40 { +impl Deref for CCU41_CC40 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu41Cc40 { +impl core::fmt::Debug for CCU41_CC40 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu41Cc40").finish() + f.debug_struct("CCU41_CC40").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc40; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct Ccu41Cc41 { +pub struct CCU41_CC41 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu41Cc41 {} -impl Ccu41Cc41 { +unsafe impl Send for CCU41_CC41 {} +impl CCU41_CC41 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6005,26 +6005,26 @@ impl Ccu41Cc41 { Self { _marker: PhantomData } } } -impl Deref for Ccu41Cc41 { +impl Deref for CCU41_CC41 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu41Cc41 { +impl core::fmt::Debug for CCU41_CC41 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu41Cc41").finish() + f.debug_struct("CCU41_CC41").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc41; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct Ccu41Cc42 { +pub struct CCU41_CC42 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu41Cc42 {} -impl Ccu41Cc42 { +unsafe impl Send for CCU41_CC42 {} +impl CCU41_CC42 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6049,26 +6049,26 @@ impl Ccu41Cc42 { Self { _marker: PhantomData } } } -impl Deref for Ccu41Cc42 { +impl Deref for CCU41_CC42 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu41Cc42 { +impl core::fmt::Debug for CCU41_CC42 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu41Cc42").finish() + f.debug_struct("CCU41_CC42").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc42; #[doc = "Capture Compare Unit 4 - Unit 1"] -pub struct Ccu41Cc43 { +pub struct CCU41_CC43 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu41Cc43 {} -impl Ccu41Cc43 { +unsafe impl Send for CCU41_CC43 {} +impl CCU41_CC43 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu40_cc40::RegisterBlock = 0x4001_0400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6093,26 +6093,26 @@ impl Ccu41Cc43 { Self { _marker: PhantomData } } } -impl Deref for Ccu41Cc43 { +impl Deref for CCU41_CC43 { type Target = ccu40_cc40::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu41Cc43 { +impl core::fmt::Debug for CCU41_CC43 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu41Cc43").finish() + f.debug_struct("CCU41_CC43").finish() } } #[doc = "Capture Compare Unit 4 - Unit 1"] pub use self::ccu40_cc40 as ccu41_cc43; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct Ccu80 { +pub struct CCU80 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu80 {} -impl Ccu80 { +unsafe impl Send for CCU80 {} +impl CCU80 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80::RegisterBlock = 0x4002_0000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6137,26 +6137,26 @@ impl Ccu80 { Self { _marker: PhantomData } } } -impl Deref for Ccu80 { +impl Deref for CCU80 { type Target = ccu80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu80 { +impl core::fmt::Debug for CCU80 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu80").finish() + f.debug_struct("CCU80").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub mod ccu80; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct Ccu80Cc80 { +pub struct CCU80_CC80 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu80Cc80 {} -impl Ccu80Cc80 { +unsafe impl Send for CCU80_CC80 {} +impl CCU80_CC80 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6181,26 +6181,26 @@ impl Ccu80Cc80 { Self { _marker: PhantomData } } } -impl Deref for Ccu80Cc80 { +impl Deref for CCU80_CC80 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu80Cc80 { +impl core::fmt::Debug for CCU80_CC80 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu80Cc80").finish() + f.debug_struct("CCU80_CC80").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub mod ccu80_cc80; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct Ccu80Cc81 { +pub struct CCU80_CC81 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu80Cc81 {} -impl Ccu80Cc81 { +unsafe impl Send for CCU80_CC81 {} +impl CCU80_CC81 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6225,26 +6225,26 @@ impl Ccu80Cc81 { Self { _marker: PhantomData } } } -impl Deref for Ccu80Cc81 { +impl Deref for CCU80_CC81 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu80Cc81 { +impl core::fmt::Debug for CCU80_CC81 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu80Cc81").finish() + f.debug_struct("CCU80_CC81").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc81; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct Ccu80Cc82 { +pub struct CCU80_CC82 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu80Cc82 {} -impl Ccu80Cc82 { +unsafe impl Send for CCU80_CC82 {} +impl CCU80_CC82 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6269,26 +6269,26 @@ impl Ccu80Cc82 { Self { _marker: PhantomData } } } -impl Deref for Ccu80Cc82 { +impl Deref for CCU80_CC82 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu80Cc82 { +impl core::fmt::Debug for CCU80_CC82 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu80Cc82").finish() + f.debug_struct("CCU80_CC82").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc82; #[doc = "Capture Compare Unit 8 - Unit 0"] -pub struct Ccu80Cc83 { +pub struct CCU80_CC83 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Ccu80Cc83 {} -impl Ccu80Cc83 { +unsafe impl Send for CCU80_CC83 {} +impl CCU80_CC83 { #[doc = r"Pointer to the register block"] pub const PTR: *const ccu80_cc80::RegisterBlock = 0x4002_0400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6313,26 +6313,26 @@ impl Ccu80Cc83 { Self { _marker: PhantomData } } } -impl Deref for Ccu80Cc83 { +impl Deref for CCU80_CC83 { type Target = ccu80_cc80::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Ccu80Cc83 { +impl core::fmt::Debug for CCU80_CC83 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Ccu80Cc83").finish() + f.debug_struct("CCU80_CC83").finish() } } #[doc = "Capture Compare Unit 8 - Unit 0"] pub use self::ccu80_cc80 as ccu80_cc83; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0 { +pub struct HRPWM0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0 {} -impl Hrpwm0 { +unsafe impl Send for HRPWM0 {} +impl HRPWM0 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0::RegisterBlock = 0x4002_0900 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6357,26 +6357,26 @@ impl Hrpwm0 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0 { +impl Deref for HRPWM0 { type Target = hrpwm0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0 { +impl core::fmt::Debug for HRPWM0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0").finish() + f.debug_struct("HRPWM0").finish() } } #[doc = "High Resolution PWM Unit"] pub mod hrpwm0; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Csg0 { +pub struct HRPWM0_CSG0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Csg0 {} -impl Hrpwm0Csg0 { +unsafe impl Send for HRPWM0_CSG0 {} +impl HRPWM0_CSG0 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_csg0::RegisterBlock = 0x4002_0a00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6401,26 +6401,26 @@ impl Hrpwm0Csg0 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Csg0 { +impl Deref for HRPWM0_CSG0 { type Target = hrpwm0_csg0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Csg0 { +impl core::fmt::Debug for HRPWM0_CSG0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Csg0").finish() + f.debug_struct("HRPWM0_CSG0").finish() } } #[doc = "High Resolution PWM Unit"] pub mod hrpwm0_csg0; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Csg1 { +pub struct HRPWM0_CSG1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Csg1 {} -impl Hrpwm0Csg1 { +unsafe impl Send for HRPWM0_CSG1 {} +impl HRPWM0_CSG1 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_csg0::RegisterBlock = 0x4002_0b00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6445,26 +6445,26 @@ impl Hrpwm0Csg1 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Csg1 { +impl Deref for HRPWM0_CSG1 { type Target = hrpwm0_csg0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Csg1 { +impl core::fmt::Debug for HRPWM0_CSG1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Csg1").finish() + f.debug_struct("HRPWM0_CSG1").finish() } } #[doc = "High Resolution PWM Unit"] pub use self::hrpwm0_csg0 as hrpwm0_csg1; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Csg2 { +pub struct HRPWM0_CSG2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Csg2 {} -impl Hrpwm0Csg2 { +unsafe impl Send for HRPWM0_CSG2 {} +impl HRPWM0_CSG2 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_csg0::RegisterBlock = 0x4002_0c00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6489,26 +6489,26 @@ impl Hrpwm0Csg2 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Csg2 { +impl Deref for HRPWM0_CSG2 { type Target = hrpwm0_csg0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Csg2 { +impl core::fmt::Debug for HRPWM0_CSG2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Csg2").finish() + f.debug_struct("HRPWM0_CSG2").finish() } } #[doc = "High Resolution PWM Unit"] pub use self::hrpwm0_csg0 as hrpwm0_csg2; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Hrc0 { +pub struct HRPWM0_HRC0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Hrc0 {} -impl Hrpwm0Hrc0 { +unsafe impl Send for HRPWM0_HRC0 {} +impl HRPWM0_HRC0 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_hrc0::RegisterBlock = 0x4002_1300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6533,26 +6533,26 @@ impl Hrpwm0Hrc0 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Hrc0 { +impl Deref for HRPWM0_HRC0 { type Target = hrpwm0_hrc0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Hrc0 { +impl core::fmt::Debug for HRPWM0_HRC0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Hrc0").finish() + f.debug_struct("HRPWM0_HRC0").finish() } } #[doc = "High Resolution PWM Unit"] pub mod hrpwm0_hrc0; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Hrc1 { +pub struct HRPWM0_HRC1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Hrc1 {} -impl Hrpwm0Hrc1 { +unsafe impl Send for HRPWM0_HRC1 {} +impl HRPWM0_HRC1 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_hrc0::RegisterBlock = 0x4002_1400 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6577,26 +6577,26 @@ impl Hrpwm0Hrc1 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Hrc1 { +impl Deref for HRPWM0_HRC1 { type Target = hrpwm0_hrc0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Hrc1 { +impl core::fmt::Debug for HRPWM0_HRC1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Hrc1").finish() + f.debug_struct("HRPWM0_HRC1").finish() } } #[doc = "High Resolution PWM Unit"] pub use self::hrpwm0_hrc0 as hrpwm0_hrc1; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Hrc2 { +pub struct HRPWM0_HRC2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Hrc2 {} -impl Hrpwm0Hrc2 { +unsafe impl Send for HRPWM0_HRC2 {} +impl HRPWM0_HRC2 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_hrc0::RegisterBlock = 0x4002_1500 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6621,26 +6621,26 @@ impl Hrpwm0Hrc2 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Hrc2 { +impl Deref for HRPWM0_HRC2 { type Target = hrpwm0_hrc0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Hrc2 { +impl core::fmt::Debug for HRPWM0_HRC2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Hrc2").finish() + f.debug_struct("HRPWM0_HRC2").finish() } } #[doc = "High Resolution PWM Unit"] pub use self::hrpwm0_hrc0 as hrpwm0_hrc2; #[doc = "High Resolution PWM Unit"] -pub struct Hrpwm0Hrc3 { +pub struct HRPWM0_HRC3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Hrpwm0Hrc3 {} -impl Hrpwm0Hrc3 { +unsafe impl Send for HRPWM0_HRC3 {} +impl HRPWM0_HRC3 { #[doc = r"Pointer to the register block"] pub const PTR: *const hrpwm0_hrc0::RegisterBlock = 0x4002_1600 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6665,26 +6665,26 @@ impl Hrpwm0Hrc3 { Self { _marker: PhantomData } } } -impl Deref for Hrpwm0Hrc3 { +impl Deref for HRPWM0_HRC3 { type Target = hrpwm0_hrc0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Hrpwm0Hrc3 { +impl core::fmt::Debug for HRPWM0_HRC3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Hrpwm0Hrc3").finish() + f.debug_struct("HRPWM0_HRC3").finish() } } #[doc = "High Resolution PWM Unit"] pub use self::hrpwm0_hrc0 as hrpwm0_hrc3; #[doc = "Position Interface 0"] -pub struct Posif0 { +pub struct POSIF0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Posif0 {} -impl Posif0 { +unsafe impl Send for POSIF0 {} +impl POSIF0 { #[doc = r"Pointer to the register block"] pub const PTR: *const posif0::RegisterBlock = 0x4002_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6709,26 +6709,26 @@ impl Posif0 { Self { _marker: PhantomData } } } -impl Deref for Posif0 { +impl Deref for POSIF0 { type Target = posif0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Posif0 { +impl core::fmt::Debug for POSIF0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Posif0").finish() + f.debug_struct("POSIF0").finish() } } #[doc = "Position Interface 0"] pub mod posif0; #[doc = "Port 0"] -pub struct Port0 { +pub struct PORT0 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Port0 {} -impl Port0 { +unsafe impl Send for PORT0 {} +impl PORT0 { #[doc = r"Pointer to the register block"] pub const PTR: *const port0::RegisterBlock = 0x4802_8000 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6753,26 +6753,26 @@ impl Port0 { Self { _marker: PhantomData } } } -impl Deref for Port0 { +impl Deref for PORT0 { type Target = port0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Port0 { +impl core::fmt::Debug for PORT0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Port0").finish() + f.debug_struct("PORT0").finish() } } #[doc = "Port 0"] pub mod port0; #[doc = "Port 1"] -pub struct Port1 { +pub struct PORT1 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Port1 {} -impl Port1 { +unsafe impl Send for PORT1 {} +impl PORT1 { #[doc = r"Pointer to the register block"] pub const PTR: *const port1::RegisterBlock = 0x4802_8100 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6797,26 +6797,26 @@ impl Port1 { Self { _marker: PhantomData } } } -impl Deref for Port1 { +impl Deref for PORT1 { type Target = port1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Port1 { +impl core::fmt::Debug for PORT1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Port1").finish() + f.debug_struct("PORT1").finish() } } #[doc = "Port 1"] pub mod port1; #[doc = "Port 2"] -pub struct Port2 { +pub struct PORT2 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Port2 {} -impl Port2 { +unsafe impl Send for PORT2 {} +impl PORT2 { #[doc = r"Pointer to the register block"] pub const PTR: *const port2::RegisterBlock = 0x4802_8200 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6841,26 +6841,26 @@ impl Port2 { Self { _marker: PhantomData } } } -impl Deref for Port2 { +impl Deref for PORT2 { type Target = port2::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Port2 { +impl core::fmt::Debug for PORT2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Port2").finish() + f.debug_struct("PORT2").finish() } } #[doc = "Port 2"] pub mod port2; #[doc = "Port 3"] -pub struct Port3 { +pub struct PORT3 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Port3 {} -impl Port3 { +unsafe impl Send for PORT3 {} +impl PORT3 { #[doc = r"Pointer to the register block"] pub const PTR: *const port3::RegisterBlock = 0x4802_8300 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6885,26 +6885,26 @@ impl Port3 { Self { _marker: PhantomData } } } -impl Deref for Port3 { +impl Deref for PORT3 { type Target = port3::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Port3 { +impl core::fmt::Debug for PORT3 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Port3").finish() + f.debug_struct("PORT3").finish() } } #[doc = "Port 3"] pub mod port3; #[doc = "Port 14"] -pub struct Port14 { +pub struct PORT14 { _marker: PhantomData<*const ()>, } -unsafe impl Send for Port14 {} -impl Port14 { +unsafe impl Send for PORT14 {} +impl PORT14 { #[doc = r"Pointer to the register block"] pub const PTR: *const port14::RegisterBlock = 0x4802_8e00 as *const _; #[doc = r"Return the pointer to the register block"] @@ -6929,16 +6929,16 @@ impl Port14 { Self { _marker: PhantomData } } } -impl Deref for Port14 { +impl Deref for PORT14 { type Target = port14::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } -impl core::fmt::Debug for Port14 { +impl core::fmt::Debug for PORT14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct("Port14").finish() + f.debug_struct("PORT14").finish() } } #[doc = "Port 14"] @@ -6949,305 +6949,305 @@ static mut DEVICE_PERIPHERALS: bool = false; #[allow(non_snake_case)] pub struct Peripherals { #[doc = "PPB"] - pub ppb: Ppb, + pub PPB: PPB, #[doc = "DLR"] - pub dlr: Dlr, + pub DLR: DLR, #[doc = "ERU0"] - pub eru0: Eru0, + pub ERU0: ERU0, #[doc = "ERU1"] - pub eru1: Eru1, + pub ERU1: ERU1, #[doc = "GPDMA0"] - pub gpdma0: Gpdma0, + pub GPDMA0: GPDMA0, #[doc = "GPDMA0_CH0"] - pub gpdma0_ch0: Gpdma0Ch0, + pub GPDMA0_CH0: GPDMA0_CH0, #[doc = "GPDMA0_CH1"] - pub gpdma0_ch1: Gpdma0Ch1, + pub GPDMA0_CH1: GPDMA0_CH1, #[doc = "GPDMA0_CH2"] - pub gpdma0_ch2: Gpdma0Ch2, + pub GPDMA0_CH2: GPDMA0_CH2, #[doc = "GPDMA0_CH3"] - pub gpdma0_ch3: Gpdma0Ch3, + pub GPDMA0_CH3: GPDMA0_CH3, #[doc = "GPDMA0_CH4"] - pub gpdma0_ch4: Gpdma0Ch4, + pub GPDMA0_CH4: GPDMA0_CH4, #[doc = "GPDMA0_CH5"] - pub gpdma0_ch5: Gpdma0Ch5, + pub GPDMA0_CH5: GPDMA0_CH5, #[doc = "GPDMA0_CH6"] - pub gpdma0_ch6: Gpdma0Ch6, + pub GPDMA0_CH6: GPDMA0_CH6, #[doc = "GPDMA0_CH7"] - pub gpdma0_ch7: Gpdma0Ch7, + pub GPDMA0_CH7: GPDMA0_CH7, #[doc = "FCE"] - pub fce: Fce, + pub FCE: FCE, #[doc = "FCE_KE0"] - pub fce_ke0: FceKe0, + pub FCE_KE0: FCE_KE0, #[doc = "FCE_KE1"] - pub fce_ke1: FceKe1, + pub FCE_KE1: FCE_KE1, #[doc = "FCE_KE2"] - pub fce_ke2: FceKe2, + pub FCE_KE2: FCE_KE2, #[doc = "FCE_KE3"] - pub fce_ke3: FceKe3, + pub FCE_KE3: FCE_KE3, #[doc = "PBA0"] - pub pba0: Pba0, + pub PBA0: PBA0, #[doc = "PBA1"] - pub pba1: Pba1, + pub PBA1: PBA1, #[doc = "FLASH0"] - pub flash0: Flash0, + pub FLASH0: FLASH0, #[doc = "PREF"] - pub pref: Pref, + pub PREF: PREF, #[doc = "PMU0"] - pub pmu0: Pmu0, + pub PMU0: PMU0, #[doc = "WDT"] - pub wdt: Wdt, + pub WDT: WDT, #[doc = "RTC"] - pub rtc: Rtc, + pub RTC: RTC, #[doc = "SCU_CLK"] - pub scu_clk: ScuClk, + pub SCU_CLK: SCU_CLK, #[doc = "SCU_OSC"] - pub scu_osc: ScuOsc, + pub SCU_OSC: SCU_OSC, #[doc = "SCU_PLL"] - pub scu_pll: ScuPll, + pub SCU_PLL: SCU_PLL, #[doc = "SCU_GENERAL"] - pub scu_general: ScuGeneral, + pub SCU_GENERAL: SCU_GENERAL, #[doc = "SCU_INTERRUPT"] - pub scu_interrupt: ScuInterrupt, + pub SCU_INTERRUPT: SCU_INTERRUPT, #[doc = "SCU_PARITY"] - pub scu_parity: ScuParity, + pub SCU_PARITY: SCU_PARITY, #[doc = "SCU_TRAP"] - pub scu_trap: ScuTrap, + pub SCU_TRAP: SCU_TRAP, #[doc = "SCU_HIBERNATE"] - pub scu_hibernate: ScuHibernate, + pub SCU_HIBERNATE: SCU_HIBERNATE, #[doc = "SCU_POWER"] - pub scu_power: ScuPower, + pub SCU_POWER: SCU_POWER, #[doc = "SCU_RESET"] - pub scu_reset: ScuReset, + pub SCU_RESET: SCU_RESET, #[doc = "LEDTS0"] - pub ledts0: Ledts0, + pub LEDTS0: LEDTS0, #[doc = "USB0"] - pub usb0: Usb0, + pub USB0: USB0, #[doc = "USB0_EP0"] - pub usb0_ep0: Usb0Ep0, + pub USB0_EP0: USB0_EP0, #[doc = "USB0_EP1"] - pub usb0_ep1: Usb0Ep1, + pub USB0_EP1: USB0_EP1, #[doc = "USB0_EP2"] - pub usb0_ep2: Usb0Ep2, + pub USB0_EP2: USB0_EP2, #[doc = "USB0_EP3"] - pub usb0_ep3: Usb0Ep3, + pub USB0_EP3: USB0_EP3, #[doc = "USB0_EP4"] - pub usb0_ep4: Usb0Ep4, + pub USB0_EP4: USB0_EP4, #[doc = "USB0_EP5"] - pub usb0_ep5: Usb0Ep5, + pub USB0_EP5: USB0_EP5, #[doc = "USB0_EP6"] - pub usb0_ep6: Usb0Ep6, + pub USB0_EP6: USB0_EP6, #[doc = "USIC0"] - pub usic0: Usic0, + pub USIC0: USIC0, #[doc = "USIC1"] - pub usic1: Usic1, + pub USIC1: USIC1, #[doc = "USIC0_CH0"] - pub usic0_ch0: Usic0Ch0, + pub USIC0_CH0: USIC0_CH0, #[doc = "USIC0_CH1"] - pub usic0_ch1: Usic0Ch1, + pub USIC0_CH1: USIC0_CH1, #[doc = "USIC1_CH0"] - pub usic1_ch0: Usic1Ch0, + pub USIC1_CH0: USIC1_CH0, #[doc = "USIC1_CH1"] - pub usic1_ch1: Usic1Ch1, + pub USIC1_CH1: USIC1_CH1, #[doc = "CAN"] - pub can: Can, + pub CAN: CAN, #[doc = "CAN_NODE0"] - pub can_node0: CanNode0, + pub CAN_NODE0: CAN_NODE0, #[doc = "CAN_NODE1"] - pub can_node1: CanNode1, + pub CAN_NODE1: CAN_NODE1, #[doc = "CAN_MO0"] - pub can_mo0: CanMo0, + pub CAN_MO0: CAN_MO0, #[doc = "CAN_MO1"] - pub can_mo1: CanMo1, + pub CAN_MO1: CAN_MO1, #[doc = "CAN_MO2"] - pub can_mo2: CanMo2, + pub CAN_MO2: CAN_MO2, #[doc = "CAN_MO3"] - pub can_mo3: CanMo3, + pub CAN_MO3: CAN_MO3, #[doc = "CAN_MO4"] - pub can_mo4: CanMo4, + pub CAN_MO4: CAN_MO4, #[doc = "CAN_MO5"] - pub can_mo5: CanMo5, + pub CAN_MO5: CAN_MO5, #[doc = "CAN_MO6"] - pub can_mo6: CanMo6, + pub CAN_MO6: CAN_MO6, #[doc = "CAN_MO7"] - pub can_mo7: CanMo7, + pub CAN_MO7: CAN_MO7, #[doc = "CAN_MO8"] - pub can_mo8: CanMo8, + pub CAN_MO8: CAN_MO8, #[doc = "CAN_MO9"] - pub can_mo9: CanMo9, + pub CAN_MO9: CAN_MO9, #[doc = "CAN_MO10"] - pub can_mo10: CanMo10, + pub CAN_MO10: CAN_MO10, #[doc = "CAN_MO11"] - pub can_mo11: CanMo11, + pub CAN_MO11: CAN_MO11, #[doc = "CAN_MO12"] - pub can_mo12: CanMo12, + pub CAN_MO12: CAN_MO12, #[doc = "CAN_MO13"] - pub can_mo13: CanMo13, + pub CAN_MO13: CAN_MO13, #[doc = "CAN_MO14"] - pub can_mo14: CanMo14, + pub CAN_MO14: CAN_MO14, #[doc = "CAN_MO15"] - pub can_mo15: CanMo15, + pub CAN_MO15: CAN_MO15, #[doc = "CAN_MO16"] - pub can_mo16: CanMo16, + pub CAN_MO16: CAN_MO16, #[doc = "CAN_MO17"] - pub can_mo17: CanMo17, + pub CAN_MO17: CAN_MO17, #[doc = "CAN_MO18"] - pub can_mo18: CanMo18, + pub CAN_MO18: CAN_MO18, #[doc = "CAN_MO19"] - pub can_mo19: CanMo19, + pub CAN_MO19: CAN_MO19, #[doc = "CAN_MO20"] - pub can_mo20: CanMo20, + pub CAN_MO20: CAN_MO20, #[doc = "CAN_MO21"] - pub can_mo21: CanMo21, + pub CAN_MO21: CAN_MO21, #[doc = "CAN_MO22"] - pub can_mo22: CanMo22, + pub CAN_MO22: CAN_MO22, #[doc = "CAN_MO23"] - pub can_mo23: CanMo23, + pub CAN_MO23: CAN_MO23, #[doc = "CAN_MO24"] - pub can_mo24: CanMo24, + pub CAN_MO24: CAN_MO24, #[doc = "CAN_MO25"] - pub can_mo25: CanMo25, + pub CAN_MO25: CAN_MO25, #[doc = "CAN_MO26"] - pub can_mo26: CanMo26, + pub CAN_MO26: CAN_MO26, #[doc = "CAN_MO27"] - pub can_mo27: CanMo27, + pub CAN_MO27: CAN_MO27, #[doc = "CAN_MO28"] - pub can_mo28: CanMo28, + pub CAN_MO28: CAN_MO28, #[doc = "CAN_MO29"] - pub can_mo29: CanMo29, + pub CAN_MO29: CAN_MO29, #[doc = "CAN_MO30"] - pub can_mo30: CanMo30, + pub CAN_MO30: CAN_MO30, #[doc = "CAN_MO31"] - pub can_mo31: CanMo31, + pub CAN_MO31: CAN_MO31, #[doc = "CAN_MO32"] - pub can_mo32: CanMo32, + pub CAN_MO32: CAN_MO32, #[doc = "CAN_MO33"] - pub can_mo33: CanMo33, + pub CAN_MO33: CAN_MO33, #[doc = "CAN_MO34"] - pub can_mo34: CanMo34, + pub CAN_MO34: CAN_MO34, #[doc = "CAN_MO35"] - pub can_mo35: CanMo35, + pub CAN_MO35: CAN_MO35, #[doc = "CAN_MO36"] - pub can_mo36: CanMo36, + pub CAN_MO36: CAN_MO36, #[doc = "CAN_MO37"] - pub can_mo37: CanMo37, + pub CAN_MO37: CAN_MO37, #[doc = "CAN_MO38"] - pub can_mo38: CanMo38, + pub CAN_MO38: CAN_MO38, #[doc = "CAN_MO39"] - pub can_mo39: CanMo39, + pub CAN_MO39: CAN_MO39, #[doc = "CAN_MO40"] - pub can_mo40: CanMo40, + pub CAN_MO40: CAN_MO40, #[doc = "CAN_MO41"] - pub can_mo41: CanMo41, + pub CAN_MO41: CAN_MO41, #[doc = "CAN_MO42"] - pub can_mo42: CanMo42, + pub CAN_MO42: CAN_MO42, #[doc = "CAN_MO43"] - pub can_mo43: CanMo43, + pub CAN_MO43: CAN_MO43, #[doc = "CAN_MO44"] - pub can_mo44: CanMo44, + pub CAN_MO44: CAN_MO44, #[doc = "CAN_MO45"] - pub can_mo45: CanMo45, + pub CAN_MO45: CAN_MO45, #[doc = "CAN_MO46"] - pub can_mo46: CanMo46, + pub CAN_MO46: CAN_MO46, #[doc = "CAN_MO47"] - pub can_mo47: CanMo47, + pub CAN_MO47: CAN_MO47, #[doc = "CAN_MO48"] - pub can_mo48: CanMo48, + pub CAN_MO48: CAN_MO48, #[doc = "CAN_MO49"] - pub can_mo49: CanMo49, + pub CAN_MO49: CAN_MO49, #[doc = "CAN_MO50"] - pub can_mo50: CanMo50, + pub CAN_MO50: CAN_MO50, #[doc = "CAN_MO51"] - pub can_mo51: CanMo51, + pub CAN_MO51: CAN_MO51, #[doc = "CAN_MO52"] - pub can_mo52: CanMo52, + pub CAN_MO52: CAN_MO52, #[doc = "CAN_MO53"] - pub can_mo53: CanMo53, + pub CAN_MO53: CAN_MO53, #[doc = "CAN_MO54"] - pub can_mo54: CanMo54, + pub CAN_MO54: CAN_MO54, #[doc = "CAN_MO55"] - pub can_mo55: CanMo55, + pub CAN_MO55: CAN_MO55, #[doc = "CAN_MO56"] - pub can_mo56: CanMo56, + pub CAN_MO56: CAN_MO56, #[doc = "CAN_MO57"] - pub can_mo57: CanMo57, + pub CAN_MO57: CAN_MO57, #[doc = "CAN_MO58"] - pub can_mo58: CanMo58, + pub CAN_MO58: CAN_MO58, #[doc = "CAN_MO59"] - pub can_mo59: CanMo59, + pub CAN_MO59: CAN_MO59, #[doc = "CAN_MO60"] - pub can_mo60: CanMo60, + pub CAN_MO60: CAN_MO60, #[doc = "CAN_MO61"] - pub can_mo61: CanMo61, + pub CAN_MO61: CAN_MO61, #[doc = "CAN_MO62"] - pub can_mo62: CanMo62, + pub CAN_MO62: CAN_MO62, #[doc = "CAN_MO63"] - pub can_mo63: CanMo63, + pub CAN_MO63: CAN_MO63, #[doc = "VADC"] - pub vadc: Vadc, + pub VADC: VADC, #[doc = "VADC_G0"] - pub vadc_g0: VadcG0, + pub VADC_G0: VADC_G0, #[doc = "VADC_G1"] - pub vadc_g1: VadcG1, + pub VADC_G1: VADC_G1, #[doc = "DAC"] - pub dac: Dac, + pub DAC: DAC, #[doc = "CCU40"] - pub ccu40: Ccu40, + pub CCU40: CCU40, #[doc = "CCU41"] - pub ccu41: Ccu41, + pub CCU41: CCU41, #[doc = "CCU40_CC40"] - pub ccu40_cc40: Ccu40Cc40, + pub CCU40_CC40: CCU40_CC40, #[doc = "CCU40_CC41"] - pub ccu40_cc41: Ccu40Cc41, + pub CCU40_CC41: CCU40_CC41, #[doc = "CCU40_CC42"] - pub ccu40_cc42: Ccu40Cc42, + pub CCU40_CC42: CCU40_CC42, #[doc = "CCU40_CC43"] - pub ccu40_cc43: Ccu40Cc43, + pub CCU40_CC43: CCU40_CC43, #[doc = "CCU41_CC40"] - pub ccu41_cc40: Ccu41Cc40, + pub CCU41_CC40: CCU41_CC40, #[doc = "CCU41_CC41"] - pub ccu41_cc41: Ccu41Cc41, + pub CCU41_CC41: CCU41_CC41, #[doc = "CCU41_CC42"] - pub ccu41_cc42: Ccu41Cc42, + pub CCU41_CC42: CCU41_CC42, #[doc = "CCU41_CC43"] - pub ccu41_cc43: Ccu41Cc43, + pub CCU41_CC43: CCU41_CC43, #[doc = "CCU80"] - pub ccu80: Ccu80, + pub CCU80: CCU80, #[doc = "CCU80_CC80"] - pub ccu80_cc80: Ccu80Cc80, + pub CCU80_CC80: CCU80_CC80, #[doc = "CCU80_CC81"] - pub ccu80_cc81: Ccu80Cc81, + pub CCU80_CC81: CCU80_CC81, #[doc = "CCU80_CC82"] - pub ccu80_cc82: Ccu80Cc82, + pub CCU80_CC82: CCU80_CC82, #[doc = "CCU80_CC83"] - pub ccu80_cc83: Ccu80Cc83, + pub CCU80_CC83: CCU80_CC83, #[doc = "HRPWM0"] - pub hrpwm0: Hrpwm0, + pub HRPWM0: HRPWM0, #[doc = "HRPWM0_CSG0"] - pub hrpwm0_csg0: Hrpwm0Csg0, + pub HRPWM0_CSG0: HRPWM0_CSG0, #[doc = "HRPWM0_CSG1"] - pub hrpwm0_csg1: Hrpwm0Csg1, + pub HRPWM0_CSG1: HRPWM0_CSG1, #[doc = "HRPWM0_CSG2"] - pub hrpwm0_csg2: Hrpwm0Csg2, + pub HRPWM0_CSG2: HRPWM0_CSG2, #[doc = "HRPWM0_HRC0"] - pub hrpwm0_hrc0: Hrpwm0Hrc0, + pub HRPWM0_HRC0: HRPWM0_HRC0, #[doc = "HRPWM0_HRC1"] - pub hrpwm0_hrc1: Hrpwm0Hrc1, + pub HRPWM0_HRC1: HRPWM0_HRC1, #[doc = "HRPWM0_HRC2"] - pub hrpwm0_hrc2: Hrpwm0Hrc2, + pub HRPWM0_HRC2: HRPWM0_HRC2, #[doc = "HRPWM0_HRC3"] - pub hrpwm0_hrc3: Hrpwm0Hrc3, + pub HRPWM0_HRC3: HRPWM0_HRC3, #[doc = "POSIF0"] - pub posif0: Posif0, + pub POSIF0: POSIF0, #[doc = "PORT0"] - pub port0: Port0, + pub PORT0: PORT0, #[doc = "PORT1"] - pub port1: Port1, + pub PORT1: PORT1, #[doc = "PORT2"] - pub port2: Port2, + pub PORT2: PORT2, #[doc = "PORT3"] - pub port3: Port3, + pub PORT3: PORT3, #[doc = "PORT14"] - pub port14: Port14, + pub PORT14: PORT14, } impl Peripherals { #[doc = r" Returns all the peripherals *once*."] @@ -7270,156 +7270,156 @@ impl Peripherals { pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { - ppb: Ppb { _marker: PhantomData }, - dlr: Dlr { _marker: PhantomData }, - eru0: Eru0 { _marker: PhantomData }, - eru1: Eru1 { _marker: PhantomData }, - gpdma0: Gpdma0 { _marker: PhantomData }, - gpdma0_ch0: Gpdma0Ch0 { _marker: PhantomData }, - gpdma0_ch1: Gpdma0Ch1 { _marker: PhantomData }, - gpdma0_ch2: Gpdma0Ch2 { _marker: PhantomData }, - gpdma0_ch3: Gpdma0Ch3 { _marker: PhantomData }, - gpdma0_ch4: Gpdma0Ch4 { _marker: PhantomData }, - gpdma0_ch5: Gpdma0Ch5 { _marker: PhantomData }, - gpdma0_ch6: Gpdma0Ch6 { _marker: PhantomData }, - gpdma0_ch7: Gpdma0Ch7 { _marker: PhantomData }, - fce: Fce { _marker: PhantomData }, - fce_ke0: FceKe0 { _marker: PhantomData }, - fce_ke1: FceKe1 { _marker: PhantomData }, - fce_ke2: FceKe2 { _marker: PhantomData }, - fce_ke3: FceKe3 { _marker: PhantomData }, - pba0: Pba0 { _marker: PhantomData }, - pba1: Pba1 { _marker: PhantomData }, - flash0: Flash0 { _marker: PhantomData }, - pref: Pref { _marker: PhantomData }, - pmu0: Pmu0 { _marker: PhantomData }, - wdt: Wdt { _marker: PhantomData }, - rtc: Rtc { _marker: PhantomData }, - scu_clk: ScuClk { _marker: PhantomData }, - scu_osc: ScuOsc { _marker: PhantomData }, - scu_pll: ScuPll { _marker: PhantomData }, - scu_general: ScuGeneral { _marker: PhantomData }, - scu_interrupt: ScuInterrupt { _marker: PhantomData }, - scu_parity: ScuParity { _marker: PhantomData }, - scu_trap: ScuTrap { _marker: PhantomData }, - scu_hibernate: ScuHibernate { _marker: PhantomData }, - scu_power: ScuPower { _marker: PhantomData }, - scu_reset: ScuReset { _marker: PhantomData }, - ledts0: Ledts0 { _marker: PhantomData }, - usb0: Usb0 { _marker: PhantomData }, - usb0_ep0: Usb0Ep0 { _marker: PhantomData }, - usb0_ep1: Usb0Ep1 { _marker: PhantomData }, - usb0_ep2: Usb0Ep2 { _marker: PhantomData }, - usb0_ep3: Usb0Ep3 { _marker: PhantomData }, - usb0_ep4: Usb0Ep4 { _marker: PhantomData }, - usb0_ep5: Usb0Ep5 { _marker: PhantomData }, - usb0_ep6: Usb0Ep6 { _marker: PhantomData }, - usic0: Usic0 { _marker: PhantomData }, - usic1: Usic1 { _marker: PhantomData }, - usic0_ch0: Usic0Ch0 { _marker: PhantomData }, - usic0_ch1: Usic0Ch1 { _marker: PhantomData }, - usic1_ch0: Usic1Ch0 { _marker: PhantomData }, - usic1_ch1: Usic1Ch1 { _marker: PhantomData }, - can: Can { _marker: PhantomData }, - can_node0: CanNode0 { _marker: PhantomData }, - can_node1: CanNode1 { _marker: PhantomData }, - can_mo0: CanMo0 { _marker: PhantomData }, - can_mo1: CanMo1 { _marker: PhantomData }, - can_mo2: CanMo2 { _marker: PhantomData }, - can_mo3: CanMo3 { _marker: PhantomData }, - can_mo4: CanMo4 { _marker: PhantomData }, - can_mo5: CanMo5 { _marker: PhantomData }, - can_mo6: CanMo6 { _marker: PhantomData }, - can_mo7: CanMo7 { _marker: PhantomData }, - can_mo8: CanMo8 { _marker: PhantomData }, - can_mo9: CanMo9 { _marker: PhantomData }, - can_mo10: CanMo10 { _marker: PhantomData }, - can_mo11: CanMo11 { _marker: PhantomData }, - can_mo12: CanMo12 { _marker: PhantomData }, - can_mo13: CanMo13 { _marker: PhantomData }, - can_mo14: CanMo14 { _marker: PhantomData }, - can_mo15: CanMo15 { _marker: PhantomData }, - can_mo16: CanMo16 { _marker: PhantomData }, - can_mo17: CanMo17 { _marker: PhantomData }, - can_mo18: CanMo18 { _marker: PhantomData }, - can_mo19: CanMo19 { _marker: PhantomData }, - can_mo20: CanMo20 { _marker: PhantomData }, - can_mo21: CanMo21 { _marker: PhantomData }, - can_mo22: CanMo22 { _marker: PhantomData }, - can_mo23: CanMo23 { _marker: PhantomData }, - can_mo24: CanMo24 { _marker: PhantomData }, - can_mo25: CanMo25 { _marker: PhantomData }, - can_mo26: CanMo26 { _marker: PhantomData }, - can_mo27: CanMo27 { _marker: PhantomData }, - can_mo28: CanMo28 { _marker: PhantomData }, - can_mo29: CanMo29 { _marker: PhantomData }, - can_mo30: CanMo30 { _marker: PhantomData }, - can_mo31: CanMo31 { _marker: PhantomData }, - can_mo32: CanMo32 { _marker: PhantomData }, - can_mo33: CanMo33 { _marker: PhantomData }, - can_mo34: CanMo34 { _marker: PhantomData }, - can_mo35: CanMo35 { _marker: PhantomData }, - can_mo36: CanMo36 { _marker: PhantomData }, - can_mo37: CanMo37 { _marker: PhantomData }, - can_mo38: CanMo38 { _marker: PhantomData }, - can_mo39: CanMo39 { _marker: PhantomData }, - can_mo40: CanMo40 { _marker: PhantomData }, - can_mo41: CanMo41 { _marker: PhantomData }, - can_mo42: CanMo42 { _marker: PhantomData }, - can_mo43: CanMo43 { _marker: PhantomData }, - can_mo44: CanMo44 { _marker: PhantomData }, - can_mo45: CanMo45 { _marker: PhantomData }, - can_mo46: CanMo46 { _marker: PhantomData }, - can_mo47: CanMo47 { _marker: PhantomData }, - can_mo48: CanMo48 { _marker: PhantomData }, - can_mo49: CanMo49 { _marker: PhantomData }, - can_mo50: CanMo50 { _marker: PhantomData }, - can_mo51: CanMo51 { _marker: PhantomData }, - can_mo52: CanMo52 { _marker: PhantomData }, - can_mo53: CanMo53 { _marker: PhantomData }, - can_mo54: CanMo54 { _marker: PhantomData }, - can_mo55: CanMo55 { _marker: PhantomData }, - can_mo56: CanMo56 { _marker: PhantomData }, - can_mo57: CanMo57 { _marker: PhantomData }, - can_mo58: CanMo58 { _marker: PhantomData }, - can_mo59: CanMo59 { _marker: PhantomData }, - can_mo60: CanMo60 { _marker: PhantomData }, - can_mo61: CanMo61 { _marker: PhantomData }, - can_mo62: CanMo62 { _marker: PhantomData }, - can_mo63: CanMo63 { _marker: PhantomData }, - vadc: Vadc { _marker: PhantomData }, - vadc_g0: VadcG0 { _marker: PhantomData }, - vadc_g1: VadcG1 { _marker: PhantomData }, - dac: Dac { _marker: PhantomData }, - ccu40: Ccu40 { _marker: PhantomData }, - ccu41: Ccu41 { _marker: PhantomData }, - ccu40_cc40: Ccu40Cc40 { _marker: PhantomData }, - ccu40_cc41: Ccu40Cc41 { _marker: PhantomData }, - ccu40_cc42: Ccu40Cc42 { _marker: PhantomData }, - ccu40_cc43: Ccu40Cc43 { _marker: PhantomData }, - ccu41_cc40: Ccu41Cc40 { _marker: PhantomData }, - ccu41_cc41: Ccu41Cc41 { _marker: PhantomData }, - ccu41_cc42: Ccu41Cc42 { _marker: PhantomData }, - ccu41_cc43: Ccu41Cc43 { _marker: PhantomData }, - ccu80: Ccu80 { _marker: PhantomData }, - ccu80_cc80: Ccu80Cc80 { _marker: PhantomData }, - ccu80_cc81: Ccu80Cc81 { _marker: PhantomData }, - ccu80_cc82: Ccu80Cc82 { _marker: PhantomData }, - ccu80_cc83: Ccu80Cc83 { _marker: PhantomData }, - hrpwm0: Hrpwm0 { _marker: PhantomData }, - hrpwm0_csg0: Hrpwm0Csg0 { _marker: PhantomData }, - hrpwm0_csg1: Hrpwm0Csg1 { _marker: PhantomData }, - hrpwm0_csg2: Hrpwm0Csg2 { _marker: PhantomData }, - hrpwm0_hrc0: Hrpwm0Hrc0 { _marker: PhantomData }, - hrpwm0_hrc1: Hrpwm0Hrc1 { _marker: PhantomData }, - hrpwm0_hrc2: Hrpwm0Hrc2 { _marker: PhantomData }, - hrpwm0_hrc3: Hrpwm0Hrc3 { _marker: PhantomData }, - posif0: Posif0 { _marker: PhantomData }, - port0: Port0 { _marker: PhantomData }, - port1: Port1 { _marker: PhantomData }, - port2: Port2 { _marker: PhantomData }, - port3: Port3 { _marker: PhantomData }, - port14: Port14 { _marker: PhantomData }, + PPB: PPB { _marker: PhantomData }, + DLR: DLR { _marker: PhantomData }, + ERU0: ERU0 { _marker: PhantomData }, + ERU1: ERU1 { _marker: PhantomData }, + GPDMA0: GPDMA0 { _marker: PhantomData }, + GPDMA0_CH0: GPDMA0_CH0 { _marker: PhantomData }, + GPDMA0_CH1: GPDMA0_CH1 { _marker: PhantomData }, + GPDMA0_CH2: GPDMA0_CH2 { _marker: PhantomData }, + GPDMA0_CH3: GPDMA0_CH3 { _marker: PhantomData }, + GPDMA0_CH4: GPDMA0_CH4 { _marker: PhantomData }, + GPDMA0_CH5: GPDMA0_CH5 { _marker: PhantomData }, + GPDMA0_CH6: GPDMA0_CH6 { _marker: PhantomData }, + GPDMA0_CH7: GPDMA0_CH7 { _marker: PhantomData }, + FCE: FCE { _marker: PhantomData }, + FCE_KE0: FCE_KE0 { _marker: PhantomData }, + FCE_KE1: FCE_KE1 { _marker: PhantomData }, + FCE_KE2: FCE_KE2 { _marker: PhantomData }, + FCE_KE3: FCE_KE3 { _marker: PhantomData }, + PBA0: PBA0 { _marker: PhantomData }, + PBA1: PBA1 { _marker: PhantomData }, + FLASH0: FLASH0 { _marker: PhantomData }, + PREF: PREF { _marker: PhantomData }, + PMU0: PMU0 { _marker: PhantomData }, + WDT: WDT { _marker: PhantomData }, + RTC: RTC { _marker: PhantomData }, + SCU_CLK: SCU_CLK { _marker: PhantomData }, + SCU_OSC: SCU_OSC { _marker: PhantomData }, + SCU_PLL: SCU_PLL { _marker: PhantomData }, + SCU_GENERAL: SCU_GENERAL { _marker: PhantomData }, + SCU_INTERRUPT: SCU_INTERRUPT { _marker: PhantomData }, + SCU_PARITY: SCU_PARITY { _marker: PhantomData }, + SCU_TRAP: SCU_TRAP { _marker: PhantomData }, + SCU_HIBERNATE: SCU_HIBERNATE { _marker: PhantomData }, + SCU_POWER: SCU_POWER { _marker: PhantomData }, + SCU_RESET: SCU_RESET { _marker: PhantomData }, + LEDTS0: LEDTS0 { _marker: PhantomData }, + USB0: USB0 { _marker: PhantomData }, + USB0_EP0: USB0_EP0 { _marker: PhantomData }, + USB0_EP1: USB0_EP1 { _marker: PhantomData }, + USB0_EP2: USB0_EP2 { _marker: PhantomData }, + USB0_EP3: USB0_EP3 { _marker: PhantomData }, + USB0_EP4: USB0_EP4 { _marker: PhantomData }, + USB0_EP5: USB0_EP5 { _marker: PhantomData }, + USB0_EP6: USB0_EP6 { _marker: PhantomData }, + USIC0: USIC0 { _marker: PhantomData }, + USIC1: USIC1 { _marker: PhantomData }, + USIC0_CH0: USIC0_CH0 { _marker: PhantomData }, + USIC0_CH1: USIC0_CH1 { _marker: PhantomData }, + USIC1_CH0: USIC1_CH0 { _marker: PhantomData }, + USIC1_CH1: USIC1_CH1 { _marker: PhantomData }, + CAN: CAN { _marker: PhantomData }, + CAN_NODE0: CAN_NODE0 { _marker: PhantomData }, + CAN_NODE1: CAN_NODE1 { _marker: PhantomData }, + CAN_MO0: CAN_MO0 { _marker: PhantomData }, + CAN_MO1: CAN_MO1 { _marker: PhantomData }, + CAN_MO2: CAN_MO2 { _marker: PhantomData }, + CAN_MO3: CAN_MO3 { _marker: PhantomData }, + CAN_MO4: CAN_MO4 { _marker: PhantomData }, + CAN_MO5: CAN_MO5 { _marker: PhantomData }, + CAN_MO6: CAN_MO6 { _marker: PhantomData }, + CAN_MO7: CAN_MO7 { _marker: PhantomData }, + CAN_MO8: CAN_MO8 { _marker: PhantomData }, + CAN_MO9: CAN_MO9 { _marker: PhantomData }, + CAN_MO10: CAN_MO10 { _marker: PhantomData }, + CAN_MO11: CAN_MO11 { _marker: PhantomData }, + CAN_MO12: CAN_MO12 { _marker: PhantomData }, + CAN_MO13: CAN_MO13 { _marker: PhantomData }, + CAN_MO14: CAN_MO14 { _marker: PhantomData }, + CAN_MO15: CAN_MO15 { _marker: PhantomData }, + CAN_MO16: CAN_MO16 { _marker: PhantomData }, + CAN_MO17: CAN_MO17 { _marker: PhantomData }, + CAN_MO18: CAN_MO18 { _marker: PhantomData }, + CAN_MO19: CAN_MO19 { _marker: PhantomData }, + CAN_MO20: CAN_MO20 { _marker: PhantomData }, + CAN_MO21: CAN_MO21 { _marker: PhantomData }, + CAN_MO22: CAN_MO22 { _marker: PhantomData }, + CAN_MO23: CAN_MO23 { _marker: PhantomData }, + CAN_MO24: CAN_MO24 { _marker: PhantomData }, + CAN_MO25: CAN_MO25 { _marker: PhantomData }, + CAN_MO26: CAN_MO26 { _marker: PhantomData }, + CAN_MO27: CAN_MO27 { _marker: PhantomData }, + CAN_MO28: CAN_MO28 { _marker: PhantomData }, + CAN_MO29: CAN_MO29 { _marker: PhantomData }, + CAN_MO30: CAN_MO30 { _marker: PhantomData }, + CAN_MO31: CAN_MO31 { _marker: PhantomData }, + CAN_MO32: CAN_MO32 { _marker: PhantomData }, + CAN_MO33: CAN_MO33 { _marker: PhantomData }, + CAN_MO34: CAN_MO34 { _marker: PhantomData }, + CAN_MO35: CAN_MO35 { _marker: PhantomData }, + CAN_MO36: CAN_MO36 { _marker: PhantomData }, + CAN_MO37: CAN_MO37 { _marker: PhantomData }, + CAN_MO38: CAN_MO38 { _marker: PhantomData }, + CAN_MO39: CAN_MO39 { _marker: PhantomData }, + CAN_MO40: CAN_MO40 { _marker: PhantomData }, + CAN_MO41: CAN_MO41 { _marker: PhantomData }, + CAN_MO42: CAN_MO42 { _marker: PhantomData }, + CAN_MO43: CAN_MO43 { _marker: PhantomData }, + CAN_MO44: CAN_MO44 { _marker: PhantomData }, + CAN_MO45: CAN_MO45 { _marker: PhantomData }, + CAN_MO46: CAN_MO46 { _marker: PhantomData }, + CAN_MO47: CAN_MO47 { _marker: PhantomData }, + CAN_MO48: CAN_MO48 { _marker: PhantomData }, + CAN_MO49: CAN_MO49 { _marker: PhantomData }, + CAN_MO50: CAN_MO50 { _marker: PhantomData }, + CAN_MO51: CAN_MO51 { _marker: PhantomData }, + CAN_MO52: CAN_MO52 { _marker: PhantomData }, + CAN_MO53: CAN_MO53 { _marker: PhantomData }, + CAN_MO54: CAN_MO54 { _marker: PhantomData }, + CAN_MO55: CAN_MO55 { _marker: PhantomData }, + CAN_MO56: CAN_MO56 { _marker: PhantomData }, + CAN_MO57: CAN_MO57 { _marker: PhantomData }, + CAN_MO58: CAN_MO58 { _marker: PhantomData }, + CAN_MO59: CAN_MO59 { _marker: PhantomData }, + CAN_MO60: CAN_MO60 { _marker: PhantomData }, + CAN_MO61: CAN_MO61 { _marker: PhantomData }, + CAN_MO62: CAN_MO62 { _marker: PhantomData }, + CAN_MO63: CAN_MO63 { _marker: PhantomData }, + VADC: VADC { _marker: PhantomData }, + VADC_G0: VADC_G0 { _marker: PhantomData }, + VADC_G1: VADC_G1 { _marker: PhantomData }, + DAC: DAC { _marker: PhantomData }, + CCU40: CCU40 { _marker: PhantomData }, + CCU41: CCU41 { _marker: PhantomData }, + CCU40_CC40: CCU40_CC40 { _marker: PhantomData }, + CCU40_CC41: CCU40_CC41 { _marker: PhantomData }, + CCU40_CC42: CCU40_CC42 { _marker: PhantomData }, + CCU40_CC43: CCU40_CC43 { _marker: PhantomData }, + CCU41_CC40: CCU41_CC40 { _marker: PhantomData }, + CCU41_CC41: CCU41_CC41 { _marker: PhantomData }, + CCU41_CC42: CCU41_CC42 { _marker: PhantomData }, + CCU41_CC43: CCU41_CC43 { _marker: PhantomData }, + CCU80: CCU80 { _marker: PhantomData }, + CCU80_CC80: CCU80_CC80 { _marker: PhantomData }, + CCU80_CC81: CCU80_CC81 { _marker: PhantomData }, + CCU80_CC82: CCU80_CC82 { _marker: PhantomData }, + CCU80_CC83: CCU80_CC83 { _marker: PhantomData }, + HRPWM0: HRPWM0 { _marker: PhantomData }, + HRPWM0_CSG0: HRPWM0_CSG0 { _marker: PhantomData }, + HRPWM0_CSG1: HRPWM0_CSG1 { _marker: PhantomData }, + HRPWM0_CSG2: HRPWM0_CSG2 { _marker: PhantomData }, + HRPWM0_HRC0: HRPWM0_HRC0 { _marker: PhantomData }, + HRPWM0_HRC1: HRPWM0_HRC1 { _marker: PhantomData }, + HRPWM0_HRC2: HRPWM0_HRC2 { _marker: PhantomData }, + HRPWM0_HRC3: HRPWM0_HRC3 { _marker: PhantomData }, + POSIF0: POSIF0 { _marker: PhantomData }, + PORT0: PORT0 { _marker: PhantomData }, + PORT1: PORT1 { _marker: PhantomData }, + PORT2: PORT2 { _marker: PhantomData }, + PORT3: PORT3 { _marker: PhantomData }, + PORT14: PORT14 { _marker: PhantomData }, } } } diff --git a/src/pba0.rs b/src/pba0.rs index 141f45b0..3a2ce5a7 100644 --- a/src/pba0.rs +++ b/src/pba0.rs @@ -1,30 +1,28 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - sts: Sts, - waddr: Waddr, + sts: STS, + waddr: WADDR, } impl RegisterBlock { #[doc = "0x00 - Peripheral Bridge Status Register"] #[inline(always)] - pub const fn sts(&self) -> &Sts { + pub const fn sts(&self) -> &STS { &self.sts } #[doc = "0x04 - PBA Write Error Address Register"] #[inline(always)] - pub const fn waddr(&self) -> &Waddr { + pub const fn waddr(&self) -> &WADDR { &self.waddr } } #[doc = "STS (rw) register accessor: Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`] module"] -#[doc(alias = "STS")] -pub type Sts = crate::Reg; +pub type STS = crate::Reg; #[doc = "Peripheral Bridge Status Register"] pub mod sts; #[doc = "WADDR (r) register accessor: PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@waddr`] module"] -#[doc(alias = "WADDR")] -pub type Waddr = crate::Reg; +pub type WADDR = crate::Reg; #[doc = "PBA Write Error Address Register"] pub mod waddr; diff --git a/src/pba0/sts.rs b/src/pba0/sts.rs index eb30c1a4..6d67bb1e 100644 --- a/src/pba0/sts.rs +++ b/src/pba0/sts.rs @@ -1,89 +1,89 @@ #[doc = "Register `STS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Bufferable Write Access Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Werr { +pub enum WERR_A { #[doc = "0: no write error occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: write error occurred, interrupt request is pending."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Werr) -> Self { + fn from(variant: WERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WERR` reader - Bufferable Write Access Error"] -pub type WerrR = crate::BitReader; -impl WerrR { +pub type WERR_R = crate::BitReader; +impl WERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Werr { + pub const fn variant(&self) -> WERR_A { match self.bits { - false => Werr::Value1, - true => Werr::Value2, + false => WERR_A::VALUE1, + true => WERR_A::VALUE2, } } #[doc = "no write error occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Werr::Value1 + *self == WERR_A::VALUE1 } #[doc = "write error occurred, interrupt request is pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Werr::Value2 + *self == WERR_A::VALUE2 } } #[doc = "Field `WERR` writer - Bufferable Write Access Error"] -pub type WerrW<'a, REG> = crate::BitWriter<'a, REG, Werr>; -impl<'a, REG> WerrW<'a, REG> +pub type WERR_W<'a, REG> = crate::BitWriter<'a, REG, WERR_A>; +impl<'a, REG> WERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no write error occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Werr::Value1) + self.variant(WERR_A::VALUE1) } #[doc = "write error occurred, interrupt request is pending."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Werr::Value2) + self.variant(WERR_A::VALUE2) } } impl R { #[doc = "Bit 0 - Bufferable Write Access Error"] #[inline(always)] - pub fn werr(&self) -> WerrR { - WerrR::new((self.bits & 1) != 0) + pub fn werr(&self) -> WERR_R { + WERR_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Bufferable Write Access Error"] #[inline(always)] #[must_use] - pub fn werr(&mut self) -> WerrW { - WerrW::new(self, 0) + pub fn werr(&mut self) -> WERR_W { + WERR_W::new(self, 0) } } #[doc = "Peripheral Bridge Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StsSpec; -impl crate::RegisterSpec for StsSpec { +pub struct STS_SPEC; +impl crate::RegisterSpec for STS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sts::R`](R) reader structure"] -impl crate::Readable for StsSpec {} +impl crate::Readable for STS_SPEC {} #[doc = "`write(|w| ..)` method takes [`sts::W`](W) writer structure"] -impl crate::Writable for StsSpec { +impl crate::Writable for STS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STS to value 0"] -impl crate::Resettable for StsSpec { +impl crate::Resettable for STS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/pba0/waddr.rs b/src/pba0/waddr.rs index 10e88e06..58df48e8 100644 --- a/src/pba0/waddr.rs +++ b/src/pba0/waddr.rs @@ -1,22 +1,22 @@ #[doc = "Register `WADDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WADDR` reader - Write Error Address"] -pub type WaddrR = crate::FieldReader; +pub type WADDR_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Write Error Address"] #[inline(always)] - pub fn waddr(&self) -> WaddrR { - WaddrR::new(self.bits) + pub fn waddr(&self) -> WADDR_R { + WADDR_R::new(self.bits) } } #[doc = "PBA Write Error Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`waddr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WaddrSpec; -impl crate::RegisterSpec for WaddrSpec { +pub struct WADDR_SPEC; +impl crate::RegisterSpec for WADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`waddr::R`](R) reader structure"] -impl crate::Readable for WaddrSpec {} +impl crate::Readable for WADDR_SPEC {} #[doc = "`reset()` method sets WADDR to value 0"] -impl crate::Resettable for WaddrSpec { +impl crate::Resettable for WADDR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/pmu0.rs b/src/pmu0.rs index 6b869fab..390f147e 100644 --- a/src/pmu0.rs +++ b/src/pmu0.rs @@ -1,18 +1,17 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, + id: ID, } impl RegisterBlock { #[doc = "0x00 - PMU0 Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } } #[doc = "ID (r) register accessor: PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "PMU0 Identification Register"] pub mod id; diff --git a/src/pmu0/id.rs b/src/pmu0/id.rs index eb138b46..3a0d6e6c 100644 --- a/src/pmu0/id.rs +++ b/src/pmu0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "PMU0 Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x009b_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x009b_c000; } diff --git a/src/port0.rs b/src/port0.rs index b133cc71..560600f0 100644 --- a/src/port0.rs +++ b/src/port0.rs @@ -1,143 +1,132 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - out: Out, - omr: Omr, + out: OUT, + omr: OMR, _reserved2: [u8; 0x08], - iocr0: Iocr0, - iocr4: Iocr4, - iocr8: Iocr8, + iocr0: IOCR0, + iocr4: IOCR4, + iocr8: IOCR8, _reserved5: [u8; 0x08], - in_: In, + in_: IN, _reserved6: [u8; 0x18], - pdr0: Pdr0, - pdr1: Pdr1, + pdr0: PDR0, + pdr1: PDR1, _reserved8: [u8; 0x18], - pdisc: Pdisc, + pdisc: PDISC, _reserved9: [u8; 0x0c], - pps: Pps, - hwsel: Hwsel, + pps: PPS, + hwsel: HWSEL, } impl RegisterBlock { #[doc = "0x00 - Port 0 Output Register"] #[inline(always)] - pub const fn out(&self) -> &Out { + pub const fn out(&self) -> &OUT { &self.out } #[doc = "0x04 - Port 0 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &Omr { + pub const fn omr(&self) -> &OMR { &self.omr } #[doc = "0x10 - Port 0 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &Iocr0 { + pub const fn iocr0(&self) -> &IOCR0 { &self.iocr0 } #[doc = "0x14 - Port 0 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &Iocr4 { + pub const fn iocr4(&self) -> &IOCR4 { &self.iocr4 } #[doc = "0x18 - Port 0 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &Iocr8 { + pub const fn iocr8(&self) -> &IOCR8 { &self.iocr8 } #[doc = "0x24 - Port 0 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &In { + pub const fn in_(&self) -> &IN { &self.in_ } #[doc = "0x40 - Port 0 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &Pdr0 { + pub const fn pdr0(&self) -> &PDR0 { &self.pdr0 } #[doc = "0x44 - Port 0 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &Pdr1 { + pub const fn pdr1(&self) -> &PDR1 { &self.pdr1 } #[doc = "0x60 - Port 0 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &Pdisc { + pub const fn pdisc(&self) -> &PDISC { &self.pdisc } #[doc = "0x70 - Port 0 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &Pps { + pub const fn pps(&self) -> &PPS { &self.pps } #[doc = "0x74 - Port 0 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &Hwsel { + pub const fn hwsel(&self) -> &HWSEL { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -#[doc(alias = "OUT")] -pub type Out = crate::Reg; +pub type OUT = crate::Reg; #[doc = "Port 0 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -#[doc(alias = "OMR")] -pub type Omr = crate::Reg; +pub type OMR = crate::Reg; #[doc = "Port 0 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -#[doc(alias = "IOCR0")] -pub type Iocr0 = crate::Reg; +pub type IOCR0 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -#[doc(alias = "IOCR4")] -pub type Iocr4 = crate::Reg; +pub type IOCR4 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -#[doc(alias = "IOCR8")] -pub type Iocr8 = crate::Reg; +pub type IOCR8 = crate::Reg; #[doc = "Port 0 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IN (r) register accessor: Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Port 0 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -#[doc(alias = "PDR0")] -pub type Pdr0 = crate::Reg; +pub type PDR0 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -#[doc(alias = "PDR1")] -pub type Pdr1 = crate::Reg; +pub type PDR1 = crate::Reg; #[doc = "Port 0 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -#[doc(alias = "PDISC")] -pub type Pdisc = crate::Reg; +pub type PDISC = crate::Reg; #[doc = "Port 0 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -#[doc(alias = "PPS")] -pub type Pps = crate::Reg; +pub type PPS = crate::Reg; #[doc = "Port 0 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -#[doc(alias = "HWSEL")] -pub type Hwsel = crate::Reg; +pub type HWSEL = crate::Reg; #[doc = "Port 0 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port0/hwsel.rs b/src/port0/hwsel.rs index 53630409..f9f61efc 100644 --- a/src/port0/hwsel.rs +++ b/src/port0/hwsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw0 { +pub enum HW0_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw0) -> Self { + fn from(variant: HW0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw0 { +impl crate::FieldSpec for HW0_A { type Ux = u8; } -impl crate::IsEnum for Hw0 {} +impl crate::IsEnum for HW0_A {} #[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type Hw0R = crate::FieldReader; -impl Hw0R { +pub type HW0_R = crate::FieldReader; +impl HW0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw0::Value1), - 1 => Some(Hw0::Value2), - 2 => Some(Hw0::Value3), + 0 => Some(HW0_A::VALUE1), + 1 => Some(HW0_A::VALUE2), + 2 => Some(HW0_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw0::Value1 + *self == HW0_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw0::Value2 + *self == HW0_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw0::Value3 + *self == HW0_A::VALUE3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; -impl<'a, REG> Hw0W<'a, REG> +pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; +impl<'a, REG> HW0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw0::Value1) + self.variant(HW0_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw0::Value2) + self.variant(HW0_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw0::Value3) + self.variant(HW0_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw1 { +pub enum HW1_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw1) -> Self { + fn from(variant: HW1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw1 { +impl crate::FieldSpec for HW1_A { type Ux = u8; } -impl crate::IsEnum for Hw1 {} +impl crate::IsEnum for HW1_A {} #[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type Hw1R = crate::FieldReader; -impl Hw1R { +pub type HW1_R = crate::FieldReader; +impl HW1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw1::Value1), - 1 => Some(Hw1::Value2), - 2 => Some(Hw1::Value3), + 0 => Some(HW1_A::VALUE1), + 1 => Some(HW1_A::VALUE2), + 2 => Some(HW1_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw1::Value1 + *self == HW1_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw1::Value2 + *self == HW1_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw1::Value3 + *self == HW1_A::VALUE3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; -impl<'a, REG> Hw1W<'a, REG> +pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; +impl<'a, REG> HW1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw1::Value1) + self.variant(HW1_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw1::Value2) + self.variant(HW1_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw1::Value3) + self.variant(HW1_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw2 { +pub enum HW2_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw2) -> Self { + fn from(variant: HW2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw2 { +impl crate::FieldSpec for HW2_A { type Ux = u8; } -impl crate::IsEnum for Hw2 {} +impl crate::IsEnum for HW2_A {} #[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type Hw2R = crate::FieldReader; -impl Hw2R { +pub type HW2_R = crate::FieldReader; +impl HW2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw2::Value1), - 1 => Some(Hw2::Value2), - 2 => Some(Hw2::Value3), + 0 => Some(HW2_A::VALUE1), + 1 => Some(HW2_A::VALUE2), + 2 => Some(HW2_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw2::Value1 + *self == HW2_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw2::Value2 + *self == HW2_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw2::Value3 + *self == HW2_A::VALUE3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; -impl<'a, REG> Hw2W<'a, REG> +pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; +impl<'a, REG> HW2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw2::Value1) + self.variant(HW2_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw2::Value2) + self.variant(HW2_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw2::Value3) + self.variant(HW2_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw3 { +pub enum HW3_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw3) -> Self { + fn from(variant: HW3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw3 { +impl crate::FieldSpec for HW3_A { type Ux = u8; } -impl crate::IsEnum for Hw3 {} +impl crate::IsEnum for HW3_A {} #[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type Hw3R = crate::FieldReader; -impl Hw3R { +pub type HW3_R = crate::FieldReader; +impl HW3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw3::Value1), - 1 => Some(Hw3::Value2), - 2 => Some(Hw3::Value3), + 0 => Some(HW3_A::VALUE1), + 1 => Some(HW3_A::VALUE2), + 2 => Some(HW3_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw3::Value1 + *self == HW3_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw3::Value2 + *self == HW3_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw3::Value3 + *self == HW3_A::VALUE3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; -impl<'a, REG> Hw3W<'a, REG> +pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; +impl<'a, REG> HW3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,72 +281,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw3::Value1) + self.variant(HW3_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw3::Value2) + self.variant(HW3_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw3::Value3) + self.variant(HW3_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw4 { +pub enum HW4_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw4) -> Self { + fn from(variant: HW4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw4 { +impl crate::FieldSpec for HW4_A { type Ux = u8; } -impl crate::IsEnum for Hw4 {} +impl crate::IsEnum for HW4_A {} #[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type Hw4R = crate::FieldReader; -impl Hw4R { +pub type HW4_R = crate::FieldReader; +impl HW4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw4::Value1), - 1 => Some(Hw4::Value2), - 2 => Some(Hw4::Value3), + 0 => Some(HW4_A::VALUE1), + 1 => Some(HW4_A::VALUE2), + 2 => Some(HW4_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw4::Value1 + *self == HW4_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw4::Value2 + *self == HW4_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw4::Value3 + *self == HW4_A::VALUE3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; -impl<'a, REG> Hw4W<'a, REG> +pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; +impl<'a, REG> HW4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -354,72 +354,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw4::Value1) + self.variant(HW4_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw4::Value2) + self.variant(HW4_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw4::Value3) + self.variant(HW4_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw5 { +pub enum HW5_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw5) -> Self { + fn from(variant: HW5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw5 { +impl crate::FieldSpec for HW5_A { type Ux = u8; } -impl crate::IsEnum for Hw5 {} +impl crate::IsEnum for HW5_A {} #[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type Hw5R = crate::FieldReader; -impl Hw5R { +pub type HW5_R = crate::FieldReader; +impl HW5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw5::Value1), - 1 => Some(Hw5::Value2), - 2 => Some(Hw5::Value3), + 0 => Some(HW5_A::VALUE1), + 1 => Some(HW5_A::VALUE2), + 2 => Some(HW5_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw5::Value1 + *self == HW5_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw5::Value2 + *self == HW5_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw5::Value3 + *self == HW5_A::VALUE3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; -impl<'a, REG> Hw5W<'a, REG> +pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; +impl<'a, REG> HW5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,72 +427,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw5::Value1) + self.variant(HW5_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw5::Value2) + self.variant(HW5_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw5::Value3) + self.variant(HW5_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw6 { +pub enum HW6_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw6) -> Self { + fn from(variant: HW6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw6 { +impl crate::FieldSpec for HW6_A { type Ux = u8; } -impl crate::IsEnum for Hw6 {} +impl crate::IsEnum for HW6_A {} #[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type Hw6R = crate::FieldReader; -impl Hw6R { +pub type HW6_R = crate::FieldReader; +impl HW6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw6::Value1), - 1 => Some(Hw6::Value2), - 2 => Some(Hw6::Value3), + 0 => Some(HW6_A::VALUE1), + 1 => Some(HW6_A::VALUE2), + 2 => Some(HW6_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw6::Value1 + *self == HW6_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw6::Value2 + *self == HW6_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw6::Value3 + *self == HW6_A::VALUE3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; -impl<'a, REG> Hw6W<'a, REG> +pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; +impl<'a, REG> HW6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw6::Value1) + self.variant(HW6_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw6::Value2) + self.variant(HW6_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw6::Value3) + self.variant(HW6_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw7 { +pub enum HW7_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw7) -> Self { + fn from(variant: HW7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw7 { +impl crate::FieldSpec for HW7_A { type Ux = u8; } -impl crate::IsEnum for Hw7 {} +impl crate::IsEnum for HW7_A {} #[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type Hw7R = crate::FieldReader; -impl Hw7R { +pub type HW7_R = crate::FieldReader; +impl HW7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw7::Value1), - 1 => Some(Hw7::Value2), - 2 => Some(Hw7::Value3), + 0 => Some(HW7_A::VALUE1), + 1 => Some(HW7_A::VALUE2), + 2 => Some(HW7_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw7::Value1 + *self == HW7_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw7::Value2 + *self == HW7_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw7::Value3 + *self == HW7_A::VALUE3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; -impl<'a, REG> Hw7W<'a, REG> +pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; +impl<'a, REG> HW7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,72 +573,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw7::Value1) + self.variant(HW7_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw7::Value2) + self.variant(HW7_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw7::Value3) + self.variant(HW7_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw8 { +pub enum HW8_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw8) -> Self { + fn from(variant: HW8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw8 { +impl crate::FieldSpec for HW8_A { type Ux = u8; } -impl crate::IsEnum for Hw8 {} +impl crate::IsEnum for HW8_A {} #[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type Hw8R = crate::FieldReader; -impl Hw8R { +pub type HW8_R = crate::FieldReader; +impl HW8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw8::Value1), - 1 => Some(Hw8::Value2), - 2 => Some(Hw8::Value3), + 0 => Some(HW8_A::VALUE1), + 1 => Some(HW8_A::VALUE2), + 2 => Some(HW8_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw8::Value1 + *self == HW8_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw8::Value2 + *self == HW8_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw8::Value3 + *self == HW8_A::VALUE3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; -impl<'a, REG> Hw8W<'a, REG> +pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; +impl<'a, REG> HW8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -646,72 +646,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw8::Value1) + self.variant(HW8_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw8::Value2) + self.variant(HW8_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw8::Value3) + self.variant(HW8_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw9 { +pub enum HW9_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw9) -> Self { + fn from(variant: HW9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw9 { +impl crate::FieldSpec for HW9_A { type Ux = u8; } -impl crate::IsEnum for Hw9 {} +impl crate::IsEnum for HW9_A {} #[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type Hw9R = crate::FieldReader; -impl Hw9R { +pub type HW9_R = crate::FieldReader; +impl HW9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw9::Value1), - 1 => Some(Hw9::Value2), - 2 => Some(Hw9::Value3), + 0 => Some(HW9_A::VALUE1), + 1 => Some(HW9_A::VALUE2), + 2 => Some(HW9_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw9::Value1 + *self == HW9_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw9::Value2 + *self == HW9_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw9::Value3 + *self == HW9_A::VALUE3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; -impl<'a, REG> Hw9W<'a, REG> +pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; +impl<'a, REG> HW9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -719,72 +719,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw9::Value1) + self.variant(HW9_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw9::Value2) + self.variant(HW9_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw9::Value3) + self.variant(HW9_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw10 { +pub enum HW10_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw10) -> Self { + fn from(variant: HW10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw10 { +impl crate::FieldSpec for HW10_A { type Ux = u8; } -impl crate::IsEnum for Hw10 {} +impl crate::IsEnum for HW10_A {} #[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type Hw10R = crate::FieldReader; -impl Hw10R { +pub type HW10_R = crate::FieldReader; +impl HW10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw10::Value1), - 1 => Some(Hw10::Value2), - 2 => Some(Hw10::Value3), + 0 => Some(HW10_A::VALUE1), + 1 => Some(HW10_A::VALUE2), + 2 => Some(HW10_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw10::Value1 + *self == HW10_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw10::Value2 + *self == HW10_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw10::Value3 + *self == HW10_A::VALUE3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; -impl<'a, REG> Hw10W<'a, REG> +pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; +impl<'a, REG> HW10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,72 +792,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw10::Value1) + self.variant(HW10_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw10::Value2) + self.variant(HW10_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw10::Value3) + self.variant(HW10_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw11 { +pub enum HW11_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw11) -> Self { + fn from(variant: HW11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw11 { +impl crate::FieldSpec for HW11_A { type Ux = u8; } -impl crate::IsEnum for Hw11 {} +impl crate::IsEnum for HW11_A {} #[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type Hw11R = crate::FieldReader; -impl Hw11R { +pub type HW11_R = crate::FieldReader; +impl HW11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw11::Value1), - 1 => Some(Hw11::Value2), - 2 => Some(Hw11::Value3), + 0 => Some(HW11_A::VALUE1), + 1 => Some(HW11_A::VALUE2), + 2 => Some(HW11_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw11::Value1 + *self == HW11_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw11::Value2 + *self == HW11_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw11::Value3 + *self == HW11_A::VALUE3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; -impl<'a, REG> Hw11W<'a, REG> +pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; +impl<'a, REG> HW11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,72 +865,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw11::Value1) + self.variant(HW11_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw11::Value2) + self.variant(HW11_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw11::Value3) + self.variant(HW11_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw12 { +pub enum HW12_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw12) -> Self { + fn from(variant: HW12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw12 { +impl crate::FieldSpec for HW12_A { type Ux = u8; } -impl crate::IsEnum for Hw12 {} +impl crate::IsEnum for HW12_A {} #[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type Hw12R = crate::FieldReader; -impl Hw12R { +pub type HW12_R = crate::FieldReader; +impl HW12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw12::Value1), - 1 => Some(Hw12::Value2), - 2 => Some(Hw12::Value3), + 0 => Some(HW12_A::VALUE1), + 1 => Some(HW12_A::VALUE2), + 2 => Some(HW12_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw12::Value1 + *self == HW12_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw12::Value2 + *self == HW12_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw12::Value3 + *self == HW12_A::VALUE3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; -impl<'a, REG> Hw12W<'a, REG> +pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; +impl<'a, REG> HW12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -938,72 +938,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw12::Value1) + self.variant(HW12_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw12::Value2) + self.variant(HW12_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw12::Value3) + self.variant(HW12_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw13 { +pub enum HW13_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw13) -> Self { + fn from(variant: HW13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw13 { +impl crate::FieldSpec for HW13_A { type Ux = u8; } -impl crate::IsEnum for Hw13 {} +impl crate::IsEnum for HW13_A {} #[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type Hw13R = crate::FieldReader; -impl Hw13R { +pub type HW13_R = crate::FieldReader; +impl HW13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw13::Value1), - 1 => Some(Hw13::Value2), - 2 => Some(Hw13::Value3), + 0 => Some(HW13_A::VALUE1), + 1 => Some(HW13_A::VALUE2), + 2 => Some(HW13_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw13::Value1 + *self == HW13_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw13::Value2 + *self == HW13_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw13::Value3 + *self == HW13_A::VALUE3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; -impl<'a, REG> Hw13W<'a, REG> +pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; +impl<'a, REG> HW13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1011,72 +1011,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw13::Value1) + self.variant(HW13_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw13::Value2) + self.variant(HW13_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw13::Value3) + self.variant(HW13_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw14 { +pub enum HW14_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw14) -> Self { + fn from(variant: HW14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw14 { +impl crate::FieldSpec for HW14_A { type Ux = u8; } -impl crate::IsEnum for Hw14 {} +impl crate::IsEnum for HW14_A {} #[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type Hw14R = crate::FieldReader; -impl Hw14R { +pub type HW14_R = crate::FieldReader; +impl HW14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw14::Value1), - 1 => Some(Hw14::Value2), - 2 => Some(Hw14::Value3), + 0 => Some(HW14_A::VALUE1), + 1 => Some(HW14_A::VALUE2), + 2 => Some(HW14_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw14::Value1 + *self == HW14_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw14::Value2 + *self == HW14_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw14::Value3 + *self == HW14_A::VALUE3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; -impl<'a, REG> Hw14W<'a, REG> +pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; +impl<'a, REG> HW14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1084,72 +1084,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw14::Value1) + self.variant(HW14_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw14::Value2) + self.variant(HW14_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw14::Value3) + self.variant(HW14_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw15 { +pub enum HW15_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw15) -> Self { + fn from(variant: HW15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw15 { +impl crate::FieldSpec for HW15_A { type Ux = u8; } -impl crate::IsEnum for Hw15 {} +impl crate::IsEnum for HW15_A {} #[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type Hw15R = crate::FieldReader; -impl Hw15R { +pub type HW15_R = crate::FieldReader; +impl HW15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw15::Value1), - 1 => Some(Hw15::Value2), - 2 => Some(Hw15::Value3), + 0 => Some(HW15_A::VALUE1), + 1 => Some(HW15_A::VALUE2), + 2 => Some(HW15_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw15::Value1 + *self == HW15_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw15::Value2 + *self == HW15_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw15::Value3 + *self == HW15_A::VALUE3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; -impl<'a, REG> Hw15W<'a, REG> +pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; +impl<'a, REG> HW15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1157,213 +1157,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw15::Value1) + self.variant(HW15_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw15::Value2) + self.variant(HW15_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw15::Value3) + self.variant(HW15_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> Hw0R { - Hw0R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> HW0_R { + HW0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> Hw1R { - Hw1R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> HW1_R { + HW1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> Hw2R { - Hw2R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> HW2_R { + HW2_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> Hw3R { - Hw3R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> HW3_R { + HW3_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> Hw4R { - Hw4R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> HW4_R { + HW4_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> Hw5R { - Hw5R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> HW5_R { + HW5_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> Hw6R { - Hw6R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> HW6_R { + HW6_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> Hw7R { - Hw7R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> HW7_R { + HW7_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> Hw8R { - Hw8R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> HW8_R { + HW8_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> Hw9R { - Hw9R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> HW9_R { + HW9_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> Hw10R { - Hw10R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> HW10_R { + HW10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> Hw11R { - Hw11R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> HW11_R { + HW11_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> Hw12R { - Hw12R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> HW12_R { + HW12_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> Hw13R { - Hw13R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> HW13_R { + HW13_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> Hw14R { - Hw14R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> HW14_R { + HW14_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> Hw15R { - Hw15R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> HW15_R { + HW15_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> Hw0W { - Hw0W::new(self, 0) + pub fn hw0(&mut self) -> HW0_W { + HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> Hw1W { - Hw1W::new(self, 2) + pub fn hw1(&mut self) -> HW1_W { + HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> Hw2W { - Hw2W::new(self, 4) + pub fn hw2(&mut self) -> HW2_W { + HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> Hw3W { - Hw3W::new(self, 6) + pub fn hw3(&mut self) -> HW3_W { + HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> Hw4W { - Hw4W::new(self, 8) + pub fn hw4(&mut self) -> HW4_W { + HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> Hw5W { - Hw5W::new(self, 10) + pub fn hw5(&mut self) -> HW5_W { + HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> Hw6W { - Hw6W::new(self, 12) + pub fn hw6(&mut self) -> HW6_W { + HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> Hw7W { - Hw7W::new(self, 14) + pub fn hw7(&mut self) -> HW7_W { + HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> Hw8W { - Hw8W::new(self, 16) + pub fn hw8(&mut self) -> HW8_W { + HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> Hw9W { - Hw9W::new(self, 18) + pub fn hw9(&mut self) -> HW9_W { + HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> Hw10W { - Hw10W::new(self, 20) + pub fn hw10(&mut self) -> HW10_W { + HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> Hw11W { - Hw11W::new(self, 22) + pub fn hw11(&mut self) -> HW11_W { + HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> Hw12W { - Hw12W::new(self, 24) + pub fn hw12(&mut self) -> HW12_W { + HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> Hw13W { - Hw13W::new(self, 26) + pub fn hw13(&mut self) -> HW13_W { + HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> Hw14W { - Hw14W::new(self, 28) + pub fn hw14(&mut self) -> HW14_W { + HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> Hw15W { - Hw15W::new(self, 30) + pub fn hw15(&mut self) -> HW15_W { + HW15_W::new(self, 30) } } #[doc = "Port 0 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HwselSpec; -impl crate::RegisterSpec for HwselSpec { +pub struct HWSEL_SPEC; +impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HwselSpec {} +impl crate::Readable for HWSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HwselSpec { +impl crate::Writable for HWSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0x0001_4000"] -impl crate::Resettable for HwselSpec { +impl crate::Resettable for HWSEL_SPEC { const RESET_VALUE: u32 = 0x0001_4000; } diff --git a/src/port0/in_.rs b/src/port0/in_.rs index 090a396f..57f6bb30 100644 --- a/src/port0/in_.rs +++ b/src/port0/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 0 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for InSpec {} +impl crate::Readable for IN_SPEC {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr0.rs b/src/port0/iocr0.rs index 3700476b..e6da7548 100644 --- a/src/port0/iocr0.rs +++ b/src/port0/iocr0.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc0 { +pub enum PC0_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc0) -> Self { + fn from(variant: PC0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc0 { +impl crate::FieldSpec for PC0_A { type Ux = u8; } -impl crate::IsEnum for Pc0 {} +impl crate::IsEnum for PC0_A {} #[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc0R = crate::FieldReader; -impl Pc0R { +pub type PC0_R = crate::FieldReader; +impl PC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc0::Value1), - 1 => Some(Pc0::Value2), - 2 => Some(Pc0::Value3), - 3 => Some(Pc0::Value4), - 4 => Some(Pc0::Value5), - 5 => Some(Pc0::Value6), - 6 => Some(Pc0::Value7), - 7 => Some(Pc0::Value8), - 16 => Some(Pc0::Value9), - 17 => Some(Pc0::Value10), - 18 => Some(Pc0::Value11), - 19 => Some(Pc0::Value12), - 20 => Some(Pc0::Value13), - 24 => Some(Pc0::Value14), - 25 => Some(Pc0::Value15), - 26 => Some(Pc0::Value16), - 27 => Some(Pc0::Value17), - 28 => Some(Pc0::Value18), + 0 => Some(PC0_A::VALUE1), + 1 => Some(PC0_A::VALUE2), + 2 => Some(PC0_A::VALUE3), + 3 => Some(PC0_A::VALUE4), + 4 => Some(PC0_A::VALUE5), + 5 => Some(PC0_A::VALUE6), + 6 => Some(PC0_A::VALUE7), + 7 => Some(PC0_A::VALUE8), + 16 => Some(PC0_A::VALUE9), + 17 => Some(PC0_A::VALUE10), + 18 => Some(PC0_A::VALUE11), + 19 => Some(PC0_A::VALUE12), + 20 => Some(PC0_A::VALUE13), + 24 => Some(PC0_A::VALUE14), + 25 => Some(PC0_A::VALUE15), + 26 => Some(PC0_A::VALUE16), + 27 => Some(PC0_A::VALUE17), + 28 => Some(PC0_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc0::Value1 + *self == PC0_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc0::Value2 + *self == PC0_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc0::Value3 + *self == PC0_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc0::Value4 + *self == PC0_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc0::Value5 + *self == PC0_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc0::Value6 + *self == PC0_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc0::Value7 + *self == PC0_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc0::Value8 + *self == PC0_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc0::Value9 + *self == PC0_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc0::Value10 + *self == PC0_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc0::Value11 + *self == PC0_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc0::Value12 + *self == PC0_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc0::Value13 + *self == PC0_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc0::Value14 + *self == PC0_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc0::Value15 + *self == PC0_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc0::Value16 + *self == PC0_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc0::Value17 + *self == PC0_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc0::Value18 + *self == PC0_A::VALUE18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; -impl<'a, REG> Pc0W<'a, REG> +pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; +impl<'a, REG> PC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc0::Value1) + self.variant(PC0_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc0::Value2) + self.variant(PC0_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc0::Value3) + self.variant(PC0_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc0::Value4) + self.variant(PC0_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc0::Value5) + self.variant(PC0_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc0::Value6) + self.variant(PC0_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc0::Value7) + self.variant(PC0_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc0::Value8) + self.variant(PC0_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc0::Value9) + self.variant(PC0_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc0::Value10) + self.variant(PC0_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc0::Value11) + self.variant(PC0_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc0::Value12) + self.variant(PC0_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc0::Value13) + self.variant(PC0_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc0::Value14) + self.variant(PC0_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc0::Value15) + self.variant(PC0_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc0::Value16) + self.variant(PC0_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc0::Value17) + self.variant(PC0_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc0::Value18) + self.variant(PC0_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc1 { +pub enum PC1_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc1) -> Self { + fn from(variant: PC1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc1 { +impl crate::FieldSpec for PC1_A { type Ux = u8; } -impl crate::IsEnum for Pc1 {} +impl crate::IsEnum for PC1_A {} #[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc1R = crate::FieldReader; -impl Pc1R { +pub type PC1_R = crate::FieldReader; +impl PC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc1::Value1), - 1 => Some(Pc1::Value2), - 2 => Some(Pc1::Value3), - 3 => Some(Pc1::Value4), - 4 => Some(Pc1::Value5), - 5 => Some(Pc1::Value6), - 6 => Some(Pc1::Value7), - 7 => Some(Pc1::Value8), - 16 => Some(Pc1::Value9), - 17 => Some(Pc1::Value10), - 18 => Some(Pc1::Value11), - 19 => Some(Pc1::Value12), - 20 => Some(Pc1::Value13), - 24 => Some(Pc1::Value14), - 25 => Some(Pc1::Value15), - 26 => Some(Pc1::Value16), - 27 => Some(Pc1::Value17), - 28 => Some(Pc1::Value18), + 0 => Some(PC1_A::VALUE1), + 1 => Some(PC1_A::VALUE2), + 2 => Some(PC1_A::VALUE3), + 3 => Some(PC1_A::VALUE4), + 4 => Some(PC1_A::VALUE5), + 5 => Some(PC1_A::VALUE6), + 6 => Some(PC1_A::VALUE7), + 7 => Some(PC1_A::VALUE8), + 16 => Some(PC1_A::VALUE9), + 17 => Some(PC1_A::VALUE10), + 18 => Some(PC1_A::VALUE11), + 19 => Some(PC1_A::VALUE12), + 20 => Some(PC1_A::VALUE13), + 24 => Some(PC1_A::VALUE14), + 25 => Some(PC1_A::VALUE15), + 26 => Some(PC1_A::VALUE16), + 27 => Some(PC1_A::VALUE17), + 28 => Some(PC1_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc1::Value1 + *self == PC1_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc1::Value2 + *self == PC1_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc1::Value3 + *self == PC1_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc1::Value4 + *self == PC1_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc1::Value5 + *self == PC1_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc1::Value6 + *self == PC1_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc1::Value7 + *self == PC1_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc1::Value8 + *self == PC1_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc1::Value9 + *self == PC1_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc1::Value10 + *self == PC1_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc1::Value11 + *self == PC1_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc1::Value12 + *self == PC1_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc1::Value13 + *self == PC1_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc1::Value14 + *self == PC1_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc1::Value15 + *self == PC1_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc1::Value16 + *self == PC1_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc1::Value17 + *self == PC1_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc1::Value18 + *self == PC1_A::VALUE18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; -impl<'a, REG> Pc1W<'a, REG> +pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; +impl<'a, REG> PC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc1::Value1) + self.variant(PC1_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc1::Value2) + self.variant(PC1_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc1::Value3) + self.variant(PC1_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc1::Value4) + self.variant(PC1_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc1::Value5) + self.variant(PC1_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc1::Value6) + self.variant(PC1_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc1::Value7) + self.variant(PC1_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc1::Value8) + self.variant(PC1_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc1::Value9) + self.variant(PC1_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc1::Value10) + self.variant(PC1_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc1::Value11) + self.variant(PC1_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc1::Value12) + self.variant(PC1_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc1::Value13) + self.variant(PC1_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc1::Value14) + self.variant(PC1_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc1::Value15) + self.variant(PC1_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc1::Value16) + self.variant(PC1_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc1::Value17) + self.variant(PC1_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc1::Value18) + self.variant(PC1_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc2 { +pub enum PC2_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc2) -> Self { + fn from(variant: PC2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc2 { +impl crate::FieldSpec for PC2_A { type Ux = u8; } -impl crate::IsEnum for Pc2 {} +impl crate::IsEnum for PC2_A {} #[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc2R = crate::FieldReader; -impl Pc2R { +pub type PC2_R = crate::FieldReader; +impl PC2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc2::Value1), - 1 => Some(Pc2::Value2), - 2 => Some(Pc2::Value3), - 3 => Some(Pc2::Value4), - 4 => Some(Pc2::Value5), - 5 => Some(Pc2::Value6), - 6 => Some(Pc2::Value7), - 7 => Some(Pc2::Value8), - 16 => Some(Pc2::Value9), - 17 => Some(Pc2::Value10), - 18 => Some(Pc2::Value11), - 19 => Some(Pc2::Value12), - 20 => Some(Pc2::Value13), - 24 => Some(Pc2::Value14), - 25 => Some(Pc2::Value15), - 26 => Some(Pc2::Value16), - 27 => Some(Pc2::Value17), - 28 => Some(Pc2::Value18), + 0 => Some(PC2_A::VALUE1), + 1 => Some(PC2_A::VALUE2), + 2 => Some(PC2_A::VALUE3), + 3 => Some(PC2_A::VALUE4), + 4 => Some(PC2_A::VALUE5), + 5 => Some(PC2_A::VALUE6), + 6 => Some(PC2_A::VALUE7), + 7 => Some(PC2_A::VALUE8), + 16 => Some(PC2_A::VALUE9), + 17 => Some(PC2_A::VALUE10), + 18 => Some(PC2_A::VALUE11), + 19 => Some(PC2_A::VALUE12), + 20 => Some(PC2_A::VALUE13), + 24 => Some(PC2_A::VALUE14), + 25 => Some(PC2_A::VALUE15), + 26 => Some(PC2_A::VALUE16), + 27 => Some(PC2_A::VALUE17), + 28 => Some(PC2_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc2::Value1 + *self == PC2_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc2::Value2 + *self == PC2_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc2::Value3 + *self == PC2_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc2::Value4 + *self == PC2_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc2::Value5 + *self == PC2_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc2::Value6 + *self == PC2_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc2::Value7 + *self == PC2_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc2::Value8 + *self == PC2_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc2::Value9 + *self == PC2_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc2::Value10 + *self == PC2_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc2::Value11 + *self == PC2_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc2::Value12 + *self == PC2_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc2::Value13 + *self == PC2_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc2::Value14 + *self == PC2_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc2::Value15 + *self == PC2_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc2::Value16 + *self == PC2_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc2::Value17 + *self == PC2_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc2::Value18 + *self == PC2_A::VALUE18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; -impl<'a, REG> Pc2W<'a, REG> +pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; +impl<'a, REG> PC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc2::Value1) + self.variant(PC2_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc2::Value2) + self.variant(PC2_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc2::Value3) + self.variant(PC2_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc2::Value4) + self.variant(PC2_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc2::Value5) + self.variant(PC2_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc2::Value6) + self.variant(PC2_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc2::Value7) + self.variant(PC2_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc2::Value8) + self.variant(PC2_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc2::Value9) + self.variant(PC2_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc2::Value10) + self.variant(PC2_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc2::Value11) + self.variant(PC2_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc2::Value12) + self.variant(PC2_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc2::Value13) + self.variant(PC2_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc2::Value14) + self.variant(PC2_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc2::Value15) + self.variant(PC2_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc2::Value16) + self.variant(PC2_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc2::Value17) + self.variant(PC2_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc2::Value18) + self.variant(PC2_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc3 { +pub enum PC3_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc3) -> Self { + fn from(variant: PC3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc3 { +impl crate::FieldSpec for PC3_A { type Ux = u8; } -impl crate::IsEnum for Pc3 {} +impl crate::IsEnum for PC3_A {} #[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc3R = crate::FieldReader; -impl Pc3R { +pub type PC3_R = crate::FieldReader; +impl PC3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc3::Value1), - 1 => Some(Pc3::Value2), - 2 => Some(Pc3::Value3), - 3 => Some(Pc3::Value4), - 4 => Some(Pc3::Value5), - 5 => Some(Pc3::Value6), - 6 => Some(Pc3::Value7), - 7 => Some(Pc3::Value8), - 16 => Some(Pc3::Value9), - 17 => Some(Pc3::Value10), - 18 => Some(Pc3::Value11), - 19 => Some(Pc3::Value12), - 20 => Some(Pc3::Value13), - 24 => Some(Pc3::Value14), - 25 => Some(Pc3::Value15), - 26 => Some(Pc3::Value16), - 27 => Some(Pc3::Value17), - 28 => Some(Pc3::Value18), + 0 => Some(PC3_A::VALUE1), + 1 => Some(PC3_A::VALUE2), + 2 => Some(PC3_A::VALUE3), + 3 => Some(PC3_A::VALUE4), + 4 => Some(PC3_A::VALUE5), + 5 => Some(PC3_A::VALUE6), + 6 => Some(PC3_A::VALUE7), + 7 => Some(PC3_A::VALUE8), + 16 => Some(PC3_A::VALUE9), + 17 => Some(PC3_A::VALUE10), + 18 => Some(PC3_A::VALUE11), + 19 => Some(PC3_A::VALUE12), + 20 => Some(PC3_A::VALUE13), + 24 => Some(PC3_A::VALUE14), + 25 => Some(PC3_A::VALUE15), + 26 => Some(PC3_A::VALUE16), + 27 => Some(PC3_A::VALUE17), + 28 => Some(PC3_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc3::Value1 + *self == PC3_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc3::Value2 + *self == PC3_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc3::Value3 + *self == PC3_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc3::Value4 + *self == PC3_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc3::Value5 + *self == PC3_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc3::Value6 + *self == PC3_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc3::Value7 + *self == PC3_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc3::Value8 + *self == PC3_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc3::Value9 + *self == PC3_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc3::Value10 + *self == PC3_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc3::Value11 + *self == PC3_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc3::Value12 + *self == PC3_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc3::Value13 + *self == PC3_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc3::Value14 + *self == PC3_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc3::Value15 + *self == PC3_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc3::Value16 + *self == PC3_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc3::Value17 + *self == PC3_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc3::Value18 + *self == PC3_A::VALUE18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; -impl<'a, REG> Pc3W<'a, REG> +pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; +impl<'a, REG> PC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc3::Value1) + self.variant(PC3_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc3::Value2) + self.variant(PC3_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc3::Value3) + self.variant(PC3_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc3::Value4) + self.variant(PC3_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc3::Value5) + self.variant(PC3_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc3::Value6) + self.variant(PC3_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc3::Value7) + self.variant(PC3_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc3::Value8) + self.variant(PC3_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc3::Value9) + self.variant(PC3_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc3::Value10) + self.variant(PC3_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc3::Value11) + self.variant(PC3_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc3::Value12) + self.variant(PC3_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc3::Value13) + self.variant(PC3_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc3::Value14) + self.variant(PC3_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc3::Value15) + self.variant(PC3_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc3::Value16) + self.variant(PC3_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc3::Value17) + self.variant(PC3_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc3::Value18) + self.variant(PC3_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> Pc0R { - Pc0R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> PC0_R { + PC0_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> Pc1R { - Pc1R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> PC1_R { + PC1_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> Pc2R { - Pc2R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> PC2_R { + PC2_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> Pc3R { - Pc3R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> PC3_R { + PC3_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> Pc0W { - Pc0W::new(self, 3) + pub fn pc0(&mut self) -> PC0_W { + PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> Pc1W { - Pc1W::new(self, 11) + pub fn pc1(&mut self) -> PC1_W { + PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> Pc2W { - Pc2W::new(self, 19) + pub fn pc2(&mut self) -> PC2_W { + PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> Pc3W { - Pc3W::new(self, 27) + pub fn pc3(&mut self) -> PC3_W { + PC3_W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr0Spec; -impl crate::RegisterSpec for Iocr0Spec { +pub struct IOCR0_SPEC; +impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for Iocr0Spec {} +impl crate::Readable for IOCR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for Iocr0Spec { +impl crate::Writable for IOCR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for Iocr0Spec { +impl crate::Resettable for IOCR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr4.rs b/src/port0/iocr4.rs index f7d92f82..4a1127f6 100644 --- a/src/port0/iocr4.rs +++ b/src/port0/iocr4.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc4 { +pub enum PC4_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc4) -> Self { + fn from(variant: PC4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc4 { +impl crate::FieldSpec for PC4_A { type Ux = u8; } -impl crate::IsEnum for Pc4 {} +impl crate::IsEnum for PC4_A {} #[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc4R = crate::FieldReader; -impl Pc4R { +pub type PC4_R = crate::FieldReader; +impl PC4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc4::Value1), - 1 => Some(Pc4::Value2), - 2 => Some(Pc4::Value3), - 3 => Some(Pc4::Value4), - 4 => Some(Pc4::Value5), - 5 => Some(Pc4::Value6), - 6 => Some(Pc4::Value7), - 7 => Some(Pc4::Value8), - 16 => Some(Pc4::Value9), - 17 => Some(Pc4::Value10), - 18 => Some(Pc4::Value11), - 19 => Some(Pc4::Value12), - 20 => Some(Pc4::Value13), - 24 => Some(Pc4::Value14), - 25 => Some(Pc4::Value15), - 26 => Some(Pc4::Value16), - 27 => Some(Pc4::Value17), - 28 => Some(Pc4::Value18), + 0 => Some(PC4_A::VALUE1), + 1 => Some(PC4_A::VALUE2), + 2 => Some(PC4_A::VALUE3), + 3 => Some(PC4_A::VALUE4), + 4 => Some(PC4_A::VALUE5), + 5 => Some(PC4_A::VALUE6), + 6 => Some(PC4_A::VALUE7), + 7 => Some(PC4_A::VALUE8), + 16 => Some(PC4_A::VALUE9), + 17 => Some(PC4_A::VALUE10), + 18 => Some(PC4_A::VALUE11), + 19 => Some(PC4_A::VALUE12), + 20 => Some(PC4_A::VALUE13), + 24 => Some(PC4_A::VALUE14), + 25 => Some(PC4_A::VALUE15), + 26 => Some(PC4_A::VALUE16), + 27 => Some(PC4_A::VALUE17), + 28 => Some(PC4_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc4::Value1 + *self == PC4_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc4::Value2 + *self == PC4_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc4::Value3 + *self == PC4_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc4::Value4 + *self == PC4_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc4::Value5 + *self == PC4_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc4::Value6 + *self == PC4_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc4::Value7 + *self == PC4_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc4::Value8 + *self == PC4_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc4::Value9 + *self == PC4_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc4::Value10 + *self == PC4_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc4::Value11 + *self == PC4_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc4::Value12 + *self == PC4_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc4::Value13 + *self == PC4_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc4::Value14 + *self == PC4_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc4::Value15 + *self == PC4_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc4::Value16 + *self == PC4_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc4::Value17 + *self == PC4_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc4::Value18 + *self == PC4_A::VALUE18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; -impl<'a, REG> Pc4W<'a, REG> +pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; +impl<'a, REG> PC4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc4::Value1) + self.variant(PC4_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc4::Value2) + self.variant(PC4_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc4::Value3) + self.variant(PC4_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc4::Value4) + self.variant(PC4_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc4::Value5) + self.variant(PC4_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc4::Value6) + self.variant(PC4_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc4::Value7) + self.variant(PC4_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc4::Value8) + self.variant(PC4_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc4::Value9) + self.variant(PC4_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc4::Value10) + self.variant(PC4_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc4::Value11) + self.variant(PC4_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc4::Value12) + self.variant(PC4_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc4::Value13) + self.variant(PC4_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc4::Value14) + self.variant(PC4_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc4::Value15) + self.variant(PC4_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc4::Value16) + self.variant(PC4_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc4::Value17) + self.variant(PC4_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc4::Value18) + self.variant(PC4_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc5 { +pub enum PC5_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc5) -> Self { + fn from(variant: PC5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc5 { +impl crate::FieldSpec for PC5_A { type Ux = u8; } -impl crate::IsEnum for Pc5 {} +impl crate::IsEnum for PC5_A {} #[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc5R = crate::FieldReader; -impl Pc5R { +pub type PC5_R = crate::FieldReader; +impl PC5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc5::Value1), - 1 => Some(Pc5::Value2), - 2 => Some(Pc5::Value3), - 3 => Some(Pc5::Value4), - 4 => Some(Pc5::Value5), - 5 => Some(Pc5::Value6), - 6 => Some(Pc5::Value7), - 7 => Some(Pc5::Value8), - 16 => Some(Pc5::Value9), - 17 => Some(Pc5::Value10), - 18 => Some(Pc5::Value11), - 19 => Some(Pc5::Value12), - 20 => Some(Pc5::Value13), - 24 => Some(Pc5::Value14), - 25 => Some(Pc5::Value15), - 26 => Some(Pc5::Value16), - 27 => Some(Pc5::Value17), - 28 => Some(Pc5::Value18), + 0 => Some(PC5_A::VALUE1), + 1 => Some(PC5_A::VALUE2), + 2 => Some(PC5_A::VALUE3), + 3 => Some(PC5_A::VALUE4), + 4 => Some(PC5_A::VALUE5), + 5 => Some(PC5_A::VALUE6), + 6 => Some(PC5_A::VALUE7), + 7 => Some(PC5_A::VALUE8), + 16 => Some(PC5_A::VALUE9), + 17 => Some(PC5_A::VALUE10), + 18 => Some(PC5_A::VALUE11), + 19 => Some(PC5_A::VALUE12), + 20 => Some(PC5_A::VALUE13), + 24 => Some(PC5_A::VALUE14), + 25 => Some(PC5_A::VALUE15), + 26 => Some(PC5_A::VALUE16), + 27 => Some(PC5_A::VALUE17), + 28 => Some(PC5_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc5::Value1 + *self == PC5_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc5::Value2 + *self == PC5_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc5::Value3 + *self == PC5_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc5::Value4 + *self == PC5_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc5::Value5 + *self == PC5_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc5::Value6 + *self == PC5_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc5::Value7 + *self == PC5_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc5::Value8 + *self == PC5_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc5::Value9 + *self == PC5_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc5::Value10 + *self == PC5_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc5::Value11 + *self == PC5_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc5::Value12 + *self == PC5_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc5::Value13 + *self == PC5_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc5::Value14 + *self == PC5_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc5::Value15 + *self == PC5_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc5::Value16 + *self == PC5_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc5::Value17 + *self == PC5_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc5::Value18 + *self == PC5_A::VALUE18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; -impl<'a, REG> Pc5W<'a, REG> +pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; +impl<'a, REG> PC5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc5::Value1) + self.variant(PC5_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc5::Value2) + self.variant(PC5_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc5::Value3) + self.variant(PC5_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc5::Value4) + self.variant(PC5_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc5::Value5) + self.variant(PC5_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc5::Value6) + self.variant(PC5_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc5::Value7) + self.variant(PC5_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc5::Value8) + self.variant(PC5_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc5::Value9) + self.variant(PC5_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc5::Value10) + self.variant(PC5_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc5::Value11) + self.variant(PC5_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc5::Value12) + self.variant(PC5_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc5::Value13) + self.variant(PC5_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc5::Value14) + self.variant(PC5_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc5::Value15) + self.variant(PC5_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc5::Value16) + self.variant(PC5_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc5::Value17) + self.variant(PC5_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc5::Value18) + self.variant(PC5_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc6 { +pub enum PC6_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc6) -> Self { + fn from(variant: PC6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc6 { +impl crate::FieldSpec for PC6_A { type Ux = u8; } -impl crate::IsEnum for Pc6 {} +impl crate::IsEnum for PC6_A {} #[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc6R = crate::FieldReader; -impl Pc6R { +pub type PC6_R = crate::FieldReader; +impl PC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc6::Value1), - 1 => Some(Pc6::Value2), - 2 => Some(Pc6::Value3), - 3 => Some(Pc6::Value4), - 4 => Some(Pc6::Value5), - 5 => Some(Pc6::Value6), - 6 => Some(Pc6::Value7), - 7 => Some(Pc6::Value8), - 16 => Some(Pc6::Value9), - 17 => Some(Pc6::Value10), - 18 => Some(Pc6::Value11), - 19 => Some(Pc6::Value12), - 20 => Some(Pc6::Value13), - 24 => Some(Pc6::Value14), - 25 => Some(Pc6::Value15), - 26 => Some(Pc6::Value16), - 27 => Some(Pc6::Value17), - 28 => Some(Pc6::Value18), + 0 => Some(PC6_A::VALUE1), + 1 => Some(PC6_A::VALUE2), + 2 => Some(PC6_A::VALUE3), + 3 => Some(PC6_A::VALUE4), + 4 => Some(PC6_A::VALUE5), + 5 => Some(PC6_A::VALUE6), + 6 => Some(PC6_A::VALUE7), + 7 => Some(PC6_A::VALUE8), + 16 => Some(PC6_A::VALUE9), + 17 => Some(PC6_A::VALUE10), + 18 => Some(PC6_A::VALUE11), + 19 => Some(PC6_A::VALUE12), + 20 => Some(PC6_A::VALUE13), + 24 => Some(PC6_A::VALUE14), + 25 => Some(PC6_A::VALUE15), + 26 => Some(PC6_A::VALUE16), + 27 => Some(PC6_A::VALUE17), + 28 => Some(PC6_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc6::Value1 + *self == PC6_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc6::Value2 + *self == PC6_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc6::Value3 + *self == PC6_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc6::Value4 + *self == PC6_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc6::Value5 + *self == PC6_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc6::Value6 + *self == PC6_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc6::Value7 + *self == PC6_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc6::Value8 + *self == PC6_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc6::Value9 + *self == PC6_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc6::Value10 + *self == PC6_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc6::Value11 + *self == PC6_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc6::Value12 + *self == PC6_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc6::Value13 + *self == PC6_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc6::Value14 + *self == PC6_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc6::Value15 + *self == PC6_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc6::Value16 + *self == PC6_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc6::Value17 + *self == PC6_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc6::Value18 + *self == PC6_A::VALUE18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; -impl<'a, REG> Pc6W<'a, REG> +pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; +impl<'a, REG> PC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc6::Value1) + self.variant(PC6_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc6::Value2) + self.variant(PC6_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc6::Value3) + self.variant(PC6_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc6::Value4) + self.variant(PC6_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc6::Value5) + self.variant(PC6_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc6::Value6) + self.variant(PC6_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc6::Value7) + self.variant(PC6_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc6::Value8) + self.variant(PC6_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc6::Value9) + self.variant(PC6_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc6::Value10) + self.variant(PC6_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc6::Value11) + self.variant(PC6_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc6::Value12) + self.variant(PC6_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc6::Value13) + self.variant(PC6_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc6::Value14) + self.variant(PC6_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc6::Value15) + self.variant(PC6_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc6::Value16) + self.variant(PC6_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc6::Value17) + self.variant(PC6_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc6::Value18) + self.variant(PC6_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc7 { +pub enum PC7_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc7) -> Self { + fn from(variant: PC7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc7 { +impl crate::FieldSpec for PC7_A { type Ux = u8; } -impl crate::IsEnum for Pc7 {} +impl crate::IsEnum for PC7_A {} #[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc7R = crate::FieldReader; -impl Pc7R { +pub type PC7_R = crate::FieldReader; +impl PC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc7::Value1), - 1 => Some(Pc7::Value2), - 2 => Some(Pc7::Value3), - 3 => Some(Pc7::Value4), - 4 => Some(Pc7::Value5), - 5 => Some(Pc7::Value6), - 6 => Some(Pc7::Value7), - 7 => Some(Pc7::Value8), - 16 => Some(Pc7::Value9), - 17 => Some(Pc7::Value10), - 18 => Some(Pc7::Value11), - 19 => Some(Pc7::Value12), - 20 => Some(Pc7::Value13), - 24 => Some(Pc7::Value14), - 25 => Some(Pc7::Value15), - 26 => Some(Pc7::Value16), - 27 => Some(Pc7::Value17), - 28 => Some(Pc7::Value18), + 0 => Some(PC7_A::VALUE1), + 1 => Some(PC7_A::VALUE2), + 2 => Some(PC7_A::VALUE3), + 3 => Some(PC7_A::VALUE4), + 4 => Some(PC7_A::VALUE5), + 5 => Some(PC7_A::VALUE6), + 6 => Some(PC7_A::VALUE7), + 7 => Some(PC7_A::VALUE8), + 16 => Some(PC7_A::VALUE9), + 17 => Some(PC7_A::VALUE10), + 18 => Some(PC7_A::VALUE11), + 19 => Some(PC7_A::VALUE12), + 20 => Some(PC7_A::VALUE13), + 24 => Some(PC7_A::VALUE14), + 25 => Some(PC7_A::VALUE15), + 26 => Some(PC7_A::VALUE16), + 27 => Some(PC7_A::VALUE17), + 28 => Some(PC7_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc7::Value1 + *self == PC7_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc7::Value2 + *self == PC7_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc7::Value3 + *self == PC7_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc7::Value4 + *self == PC7_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc7::Value5 + *self == PC7_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc7::Value6 + *self == PC7_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc7::Value7 + *self == PC7_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc7::Value8 + *self == PC7_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc7::Value9 + *self == PC7_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc7::Value10 + *self == PC7_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc7::Value11 + *self == PC7_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc7::Value12 + *self == PC7_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc7::Value13 + *self == PC7_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc7::Value14 + *self == PC7_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc7::Value15 + *self == PC7_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc7::Value16 + *self == PC7_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc7::Value17 + *self == PC7_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc7::Value18 + *self == PC7_A::VALUE18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; -impl<'a, REG> Pc7W<'a, REG> +pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; +impl<'a, REG> PC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc7::Value1) + self.variant(PC7_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc7::Value2) + self.variant(PC7_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc7::Value3) + self.variant(PC7_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc7::Value4) + self.variant(PC7_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc7::Value5) + self.variant(PC7_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc7::Value6) + self.variant(PC7_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc7::Value7) + self.variant(PC7_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc7::Value8) + self.variant(PC7_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc7::Value9) + self.variant(PC7_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc7::Value10) + self.variant(PC7_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc7::Value11) + self.variant(PC7_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc7::Value12) + self.variant(PC7_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc7::Value13) + self.variant(PC7_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc7::Value14) + self.variant(PC7_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc7::Value15) + self.variant(PC7_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc7::Value16) + self.variant(PC7_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc7::Value17) + self.variant(PC7_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc7::Value18) + self.variant(PC7_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> Pc4R { - Pc4R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> PC4_R { + PC4_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> Pc5R { - Pc5R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> PC5_R { + PC5_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> Pc6R { - Pc6R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> PC6_R { + PC6_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> Pc7R { - Pc7R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> PC7_R { + PC7_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> Pc4W { - Pc4W::new(self, 3) + pub fn pc4(&mut self) -> PC4_W { + PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> Pc5W { - Pc5W::new(self, 11) + pub fn pc5(&mut self) -> PC5_W { + PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> Pc6W { - Pc6W::new(self, 19) + pub fn pc6(&mut self) -> PC6_W { + PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> Pc7W { - Pc7W::new(self, 27) + pub fn pc7(&mut self) -> PC7_W { + PC7_W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr4Spec; -impl crate::RegisterSpec for Iocr4Spec { +pub struct IOCR4_SPEC; +impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for Iocr4Spec {} +impl crate::Readable for IOCR4_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for Iocr4Spec { +impl crate::Writable for IOCR4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for Iocr4Spec { +impl crate::Resettable for IOCR4_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/iocr8.rs b/src/port0/iocr8.rs index 61a3bd49..a0880880 100644 --- a/src/port0/iocr8.rs +++ b/src/port0/iocr8.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc8 { +pub enum PC8_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc8) -> Self { + fn from(variant: PC8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc8 { +impl crate::FieldSpec for PC8_A { type Ux = u8; } -impl crate::IsEnum for Pc8 {} +impl crate::IsEnum for PC8_A {} #[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc8R = crate::FieldReader; -impl Pc8R { +pub type PC8_R = crate::FieldReader; +impl PC8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc8::Value1), - 1 => Some(Pc8::Value2), - 2 => Some(Pc8::Value3), - 3 => Some(Pc8::Value4), - 4 => Some(Pc8::Value5), - 5 => Some(Pc8::Value6), - 6 => Some(Pc8::Value7), - 7 => Some(Pc8::Value8), - 16 => Some(Pc8::Value9), - 17 => Some(Pc8::Value10), - 18 => Some(Pc8::Value11), - 19 => Some(Pc8::Value12), - 20 => Some(Pc8::Value13), - 24 => Some(Pc8::Value14), - 25 => Some(Pc8::Value15), - 26 => Some(Pc8::Value16), - 27 => Some(Pc8::Value17), - 28 => Some(Pc8::Value18), + 0 => Some(PC8_A::VALUE1), + 1 => Some(PC8_A::VALUE2), + 2 => Some(PC8_A::VALUE3), + 3 => Some(PC8_A::VALUE4), + 4 => Some(PC8_A::VALUE5), + 5 => Some(PC8_A::VALUE6), + 6 => Some(PC8_A::VALUE7), + 7 => Some(PC8_A::VALUE8), + 16 => Some(PC8_A::VALUE9), + 17 => Some(PC8_A::VALUE10), + 18 => Some(PC8_A::VALUE11), + 19 => Some(PC8_A::VALUE12), + 20 => Some(PC8_A::VALUE13), + 24 => Some(PC8_A::VALUE14), + 25 => Some(PC8_A::VALUE15), + 26 => Some(PC8_A::VALUE16), + 27 => Some(PC8_A::VALUE17), + 28 => Some(PC8_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc8::Value1 + *self == PC8_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc8::Value2 + *self == PC8_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc8::Value3 + *self == PC8_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc8::Value4 + *self == PC8_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc8::Value5 + *self == PC8_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc8::Value6 + *self == PC8_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc8::Value7 + *self == PC8_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc8::Value8 + *self == PC8_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc8::Value9 + *self == PC8_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc8::Value10 + *self == PC8_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc8::Value11 + *self == PC8_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc8::Value12 + *self == PC8_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc8::Value13 + *self == PC8_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc8::Value14 + *self == PC8_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc8::Value15 + *self == PC8_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc8::Value16 + *self == PC8_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc8::Value17 + *self == PC8_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc8::Value18 + *self == PC8_A::VALUE18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; -impl<'a, REG> Pc8W<'a, REG> +pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; +impl<'a, REG> PC8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc8::Value1) + self.variant(PC8_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc8::Value2) + self.variant(PC8_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc8::Value3) + self.variant(PC8_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc8::Value4) + self.variant(PC8_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc8::Value5) + self.variant(PC8_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc8::Value6) + self.variant(PC8_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc8::Value7) + self.variant(PC8_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc8::Value8) + self.variant(PC8_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc8::Value9) + self.variant(PC8_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc8::Value10) + self.variant(PC8_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc8::Value11) + self.variant(PC8_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc8::Value12) + self.variant(PC8_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc8::Value13) + self.variant(PC8_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc8::Value14) + self.variant(PC8_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc8::Value15) + self.variant(PC8_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc8::Value16) + self.variant(PC8_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc8::Value17) + self.variant(PC8_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc8::Value18) + self.variant(PC8_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc9 { +pub enum PC9_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc9) -> Self { + fn from(variant: PC9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc9 { +impl crate::FieldSpec for PC9_A { type Ux = u8; } -impl crate::IsEnum for Pc9 {} +impl crate::IsEnum for PC9_A {} #[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc9R = crate::FieldReader; -impl Pc9R { +pub type PC9_R = crate::FieldReader; +impl PC9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc9::Value1), - 1 => Some(Pc9::Value2), - 2 => Some(Pc9::Value3), - 3 => Some(Pc9::Value4), - 4 => Some(Pc9::Value5), - 5 => Some(Pc9::Value6), - 6 => Some(Pc9::Value7), - 7 => Some(Pc9::Value8), - 16 => Some(Pc9::Value9), - 17 => Some(Pc9::Value10), - 18 => Some(Pc9::Value11), - 19 => Some(Pc9::Value12), - 20 => Some(Pc9::Value13), - 24 => Some(Pc9::Value14), - 25 => Some(Pc9::Value15), - 26 => Some(Pc9::Value16), - 27 => Some(Pc9::Value17), - 28 => Some(Pc9::Value18), + 0 => Some(PC9_A::VALUE1), + 1 => Some(PC9_A::VALUE2), + 2 => Some(PC9_A::VALUE3), + 3 => Some(PC9_A::VALUE4), + 4 => Some(PC9_A::VALUE5), + 5 => Some(PC9_A::VALUE6), + 6 => Some(PC9_A::VALUE7), + 7 => Some(PC9_A::VALUE8), + 16 => Some(PC9_A::VALUE9), + 17 => Some(PC9_A::VALUE10), + 18 => Some(PC9_A::VALUE11), + 19 => Some(PC9_A::VALUE12), + 20 => Some(PC9_A::VALUE13), + 24 => Some(PC9_A::VALUE14), + 25 => Some(PC9_A::VALUE15), + 26 => Some(PC9_A::VALUE16), + 27 => Some(PC9_A::VALUE17), + 28 => Some(PC9_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc9::Value1 + *self == PC9_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc9::Value2 + *self == PC9_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc9::Value3 + *self == PC9_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc9::Value4 + *self == PC9_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc9::Value5 + *self == PC9_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc9::Value6 + *self == PC9_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc9::Value7 + *self == PC9_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc9::Value8 + *self == PC9_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc9::Value9 + *self == PC9_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc9::Value10 + *self == PC9_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc9::Value11 + *self == PC9_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc9::Value12 + *self == PC9_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc9::Value13 + *self == PC9_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc9::Value14 + *self == PC9_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc9::Value15 + *self == PC9_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc9::Value16 + *self == PC9_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc9::Value17 + *self == PC9_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc9::Value18 + *self == PC9_A::VALUE18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; -impl<'a, REG> Pc9W<'a, REG> +pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; +impl<'a, REG> PC9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc9::Value1) + self.variant(PC9_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc9::Value2) + self.variant(PC9_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc9::Value3) + self.variant(PC9_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc9::Value4) + self.variant(PC9_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc9::Value5) + self.variant(PC9_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc9::Value6) + self.variant(PC9_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc9::Value7) + self.variant(PC9_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc9::Value8) + self.variant(PC9_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc9::Value9) + self.variant(PC9_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc9::Value10) + self.variant(PC9_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc9::Value11) + self.variant(PC9_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc9::Value12) + self.variant(PC9_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc9::Value13) + self.variant(PC9_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc9::Value14) + self.variant(PC9_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc9::Value15) + self.variant(PC9_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc9::Value16) + self.variant(PC9_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc9::Value17) + self.variant(PC9_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc9::Value18) + self.variant(PC9_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc10 { +pub enum PC10_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc10) -> Self { + fn from(variant: PC10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc10 { +impl crate::FieldSpec for PC10_A { type Ux = u8; } -impl crate::IsEnum for Pc10 {} +impl crate::IsEnum for PC10_A {} #[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc10R = crate::FieldReader; -impl Pc10R { +pub type PC10_R = crate::FieldReader; +impl PC10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc10::Value1), - 1 => Some(Pc10::Value2), - 2 => Some(Pc10::Value3), - 3 => Some(Pc10::Value4), - 4 => Some(Pc10::Value5), - 5 => Some(Pc10::Value6), - 6 => Some(Pc10::Value7), - 7 => Some(Pc10::Value8), - 16 => Some(Pc10::Value9), - 17 => Some(Pc10::Value10), - 18 => Some(Pc10::Value11), - 19 => Some(Pc10::Value12), - 20 => Some(Pc10::Value13), - 24 => Some(Pc10::Value14), - 25 => Some(Pc10::Value15), - 26 => Some(Pc10::Value16), - 27 => Some(Pc10::Value17), - 28 => Some(Pc10::Value18), + 0 => Some(PC10_A::VALUE1), + 1 => Some(PC10_A::VALUE2), + 2 => Some(PC10_A::VALUE3), + 3 => Some(PC10_A::VALUE4), + 4 => Some(PC10_A::VALUE5), + 5 => Some(PC10_A::VALUE6), + 6 => Some(PC10_A::VALUE7), + 7 => Some(PC10_A::VALUE8), + 16 => Some(PC10_A::VALUE9), + 17 => Some(PC10_A::VALUE10), + 18 => Some(PC10_A::VALUE11), + 19 => Some(PC10_A::VALUE12), + 20 => Some(PC10_A::VALUE13), + 24 => Some(PC10_A::VALUE14), + 25 => Some(PC10_A::VALUE15), + 26 => Some(PC10_A::VALUE16), + 27 => Some(PC10_A::VALUE17), + 28 => Some(PC10_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc10::Value1 + *self == PC10_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc10::Value2 + *self == PC10_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc10::Value3 + *self == PC10_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc10::Value4 + *self == PC10_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc10::Value5 + *self == PC10_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc10::Value6 + *self == PC10_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc10::Value7 + *self == PC10_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc10::Value8 + *self == PC10_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc10::Value9 + *self == PC10_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc10::Value10 + *self == PC10_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc10::Value11 + *self == PC10_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc10::Value12 + *self == PC10_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc10::Value13 + *self == PC10_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc10::Value14 + *self == PC10_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc10::Value15 + *self == PC10_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc10::Value16 + *self == PC10_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc10::Value17 + *self == PC10_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc10::Value18 + *self == PC10_A::VALUE18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; -impl<'a, REG> Pc10W<'a, REG> +pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; +impl<'a, REG> PC10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc10::Value1) + self.variant(PC10_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc10::Value2) + self.variant(PC10_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc10::Value3) + self.variant(PC10_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc10::Value4) + self.variant(PC10_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc10::Value5) + self.variant(PC10_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc10::Value6) + self.variant(PC10_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc10::Value7) + self.variant(PC10_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc10::Value8) + self.variant(PC10_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc10::Value9) + self.variant(PC10_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc10::Value10) + self.variant(PC10_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc10::Value11) + self.variant(PC10_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc10::Value12) + self.variant(PC10_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc10::Value13) + self.variant(PC10_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc10::Value14) + self.variant(PC10_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc10::Value15) + self.variant(PC10_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc10::Value16) + self.variant(PC10_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc10::Value17) + self.variant(PC10_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc10::Value18) + self.variant(PC10_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc11 { +pub enum PC11_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc11) -> Self { + fn from(variant: PC11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc11 { +impl crate::FieldSpec for PC11_A { type Ux = u8; } -impl crate::IsEnum for Pc11 {} +impl crate::IsEnum for PC11_A {} #[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc11R = crate::FieldReader; -impl Pc11R { +pub type PC11_R = crate::FieldReader; +impl PC11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc11::Value1), - 1 => Some(Pc11::Value2), - 2 => Some(Pc11::Value3), - 3 => Some(Pc11::Value4), - 4 => Some(Pc11::Value5), - 5 => Some(Pc11::Value6), - 6 => Some(Pc11::Value7), - 7 => Some(Pc11::Value8), - 16 => Some(Pc11::Value9), - 17 => Some(Pc11::Value10), - 18 => Some(Pc11::Value11), - 19 => Some(Pc11::Value12), - 20 => Some(Pc11::Value13), - 24 => Some(Pc11::Value14), - 25 => Some(Pc11::Value15), - 26 => Some(Pc11::Value16), - 27 => Some(Pc11::Value17), - 28 => Some(Pc11::Value18), + 0 => Some(PC11_A::VALUE1), + 1 => Some(PC11_A::VALUE2), + 2 => Some(PC11_A::VALUE3), + 3 => Some(PC11_A::VALUE4), + 4 => Some(PC11_A::VALUE5), + 5 => Some(PC11_A::VALUE6), + 6 => Some(PC11_A::VALUE7), + 7 => Some(PC11_A::VALUE8), + 16 => Some(PC11_A::VALUE9), + 17 => Some(PC11_A::VALUE10), + 18 => Some(PC11_A::VALUE11), + 19 => Some(PC11_A::VALUE12), + 20 => Some(PC11_A::VALUE13), + 24 => Some(PC11_A::VALUE14), + 25 => Some(PC11_A::VALUE15), + 26 => Some(PC11_A::VALUE16), + 27 => Some(PC11_A::VALUE17), + 28 => Some(PC11_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc11::Value1 + *self == PC11_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc11::Value2 + *self == PC11_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc11::Value3 + *self == PC11_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc11::Value4 + *self == PC11_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc11::Value5 + *self == PC11_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc11::Value6 + *self == PC11_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc11::Value7 + *self == PC11_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc11::Value8 + *self == PC11_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc11::Value9 + *self == PC11_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc11::Value10 + *self == PC11_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc11::Value11 + *self == PC11_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc11::Value12 + *self == PC11_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc11::Value13 + *self == PC11_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc11::Value14 + *self == PC11_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc11::Value15 + *self == PC11_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc11::Value16 + *self == PC11_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc11::Value17 + *self == PC11_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc11::Value18 + *self == PC11_A::VALUE18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; -impl<'a, REG> Pc11W<'a, REG> +pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; +impl<'a, REG> PC11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc11::Value1) + self.variant(PC11_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc11::Value2) + self.variant(PC11_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc11::Value3) + self.variant(PC11_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc11::Value4) + self.variant(PC11_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc11::Value5) + self.variant(PC11_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc11::Value6) + self.variant(PC11_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc11::Value7) + self.variant(PC11_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc11::Value8) + self.variant(PC11_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc11::Value9) + self.variant(PC11_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc11::Value10) + self.variant(PC11_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc11::Value11) + self.variant(PC11_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc11::Value12) + self.variant(PC11_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc11::Value13) + self.variant(PC11_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc11::Value14) + self.variant(PC11_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc11::Value15) + self.variant(PC11_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc11::Value16) + self.variant(PC11_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc11::Value17) + self.variant(PC11_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc11::Value18) + self.variant(PC11_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> Pc8R { - Pc8R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> PC8_R { + PC8_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> Pc9R { - Pc9R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> PC9_R { + PC9_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> Pc10R { - Pc10R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> PC10_R { + PC10_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> Pc11R { - Pc11R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> PC11_R { + PC11_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> Pc8W { - Pc8W::new(self, 3) + pub fn pc8(&mut self) -> PC8_W { + PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> Pc9W { - Pc9W::new(self, 11) + pub fn pc9(&mut self) -> PC9_W { + PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> Pc10W { - Pc10W::new(self, 19) + pub fn pc10(&mut self) -> PC10_W { + PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> Pc11W { - Pc11W::new(self, 27) + pub fn pc11(&mut self) -> PC11_W { + PC11_W::new(self, 27) } } #[doc = "Port 0 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr8Spec; -impl crate::RegisterSpec for Iocr8Spec { +pub struct IOCR8_SPEC; +impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for Iocr8Spec {} +impl crate::Readable for IOCR8_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for Iocr8Spec { +impl crate::Writable for IOCR8_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for Iocr8Spec { +impl crate::Resettable for IOCR8_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/omr.rs b/src/port0/omr.rs index 5bb947d6..2ec0c14e 100644 --- a/src/port0/omr.rs +++ b/src/port0/omr.rs @@ -1,275 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> Ps0W { - Ps0W::new(self, 0) + pub fn ps0(&mut self) -> PS0_W { + PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> Ps1W { - Ps1W::new(self, 1) + pub fn ps1(&mut self) -> PS1_W { + PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> Ps2W { - Ps2W::new(self, 2) + pub fn ps2(&mut self) -> PS2_W { + PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> Ps3W { - Ps3W::new(self, 3) + pub fn ps3(&mut self) -> PS3_W { + PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> Ps4W { - Ps4W::new(self, 4) + pub fn ps4(&mut self) -> PS4_W { + PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> Ps5W { - Ps5W::new(self, 5) + pub fn ps5(&mut self) -> PS5_W { + PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> Ps6W { - Ps6W::new(self, 6) + pub fn ps6(&mut self) -> PS6_W { + PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> Ps7W { - Ps7W::new(self, 7) + pub fn ps7(&mut self) -> PS7_W { + PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> Ps8W { - Ps8W::new(self, 8) + pub fn ps8(&mut self) -> PS8_W { + PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> Ps9W { - Ps9W::new(self, 9) + pub fn ps9(&mut self) -> PS9_W { + PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> Ps10W { - Ps10W::new(self, 10) + pub fn ps10(&mut self) -> PS10_W { + PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> Ps11W { - Ps11W::new(self, 11) + pub fn ps11(&mut self) -> PS11_W { + PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> Ps12W { - Ps12W::new(self, 12) + pub fn ps12(&mut self) -> PS12_W { + PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> Ps13W { - Ps13W::new(self, 13) + pub fn ps13(&mut self) -> PS13_W { + PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> Ps14W { - Ps14W::new(self, 14) + pub fn ps14(&mut self) -> PS14_W { + PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> Ps15W { - Ps15W::new(self, 15) + pub fn ps15(&mut self) -> PS15_W { + PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> Pr0W { - Pr0W::new(self, 16) + pub fn pr0(&mut self) -> PR0_W { + PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> Pr1W { - Pr1W::new(self, 17) + pub fn pr1(&mut self) -> PR1_W { + PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> Pr2W { - Pr2W::new(self, 18) + pub fn pr2(&mut self) -> PR2_W { + PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> Pr3W { - Pr3W::new(self, 19) + pub fn pr3(&mut self) -> PR3_W { + PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> Pr4W { - Pr4W::new(self, 20) + pub fn pr4(&mut self) -> PR4_W { + PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> Pr5W { - Pr5W::new(self, 21) + pub fn pr5(&mut self) -> PR5_W { + PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> Pr6W { - Pr6W::new(self, 22) + pub fn pr6(&mut self) -> PR6_W { + PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> Pr7W { - Pr7W::new(self, 23) + pub fn pr7(&mut self) -> PR7_W { + PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> Pr8W { - Pr8W::new(self, 24) + pub fn pr8(&mut self) -> PR8_W { + PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> Pr9W { - Pr9W::new(self, 25) + pub fn pr9(&mut self) -> PR9_W { + PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> Pr10W { - Pr10W::new(self, 26) + pub fn pr10(&mut self) -> PR10_W { + PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> Pr11W { - Pr11W::new(self, 27) + pub fn pr11(&mut self) -> PR11_W { + PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> Pr12W { - Pr12W::new(self, 28) + pub fn pr12(&mut self) -> PR12_W { + PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> Pr13W { - Pr13W::new(self, 29) + pub fn pr13(&mut self) -> PR13_W { + PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> Pr14W { - Pr14W::new(self, 30) + pub fn pr14(&mut self) -> PR14_W { + PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> Pr15W { - Pr15W::new(self, 31) + pub fn pr15(&mut self) -> PR15_W { + PR15_W::new(self, 31) } } #[doc = "Port 0 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OmrSpec; -impl crate::RegisterSpec for OmrSpec { +pub struct OMR_SPEC; +impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OmrSpec { +impl crate::Writable for OMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OmrSpec { +impl crate::Resettable for OMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/out.rs b/src/port0/out.rs index f11fe817..fdd19cef 100644 --- a/src/port0/out.rs +++ b/src/port0/out.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; -impl<'a, REG> P0W<'a, REG> +pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; +impl<'a, REG> P0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0::Value1) + self.variant(P0_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0::Value2) + self.variant(P0_A::VALUE2) } } #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; -impl<'a, REG> P1W<'a, REG> +pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; +impl<'a, REG> P1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1::Value1) + self.variant(P1_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1::Value2) + self.variant(P1_A::VALUE2) } } #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; -impl<'a, REG> P2W<'a, REG> +pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; +impl<'a, REG> P2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2::Value1) + self.variant(P2_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2::Value2) + self.variant(P2_A::VALUE2) } } #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; -impl<'a, REG> P3W<'a, REG> +pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; +impl<'a, REG> P3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3::Value1) + self.variant(P3_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3::Value2) + self.variant(P3_A::VALUE2) } } #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; -impl<'a, REG> P4W<'a, REG> +pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; +impl<'a, REG> P4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4::Value1) + self.variant(P4_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4::Value2) + self.variant(P4_A::VALUE2) } } #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; -impl<'a, REG> P5W<'a, REG> +pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; +impl<'a, REG> P5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5::Value1) + self.variant(P5_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5::Value2) + self.variant(P5_A::VALUE2) } } #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; -impl<'a, REG> P6W<'a, REG> +pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; +impl<'a, REG> P6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6::Value1) + self.variant(P6_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6::Value2) + self.variant(P6_A::VALUE2) } } #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; -impl<'a, REG> P7W<'a, REG> +pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; +impl<'a, REG> P7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7::Value1) + self.variant(P7_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7::Value2) + self.variant(P7_A::VALUE2) } } #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; -impl<'a, REG> P8W<'a, REG> +pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; +impl<'a, REG> P8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8::Value1) + self.variant(P8_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8::Value2) + self.variant(P8_A::VALUE2) } } #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; -impl<'a, REG> P9W<'a, REG> +pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; +impl<'a, REG> P9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9::Value1) + self.variant(P9_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9::Value2) + self.variant(P9_A::VALUE2) } } #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; -impl<'a, REG> P10W<'a, REG> +pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; +impl<'a, REG> P10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10::Value1) + self.variant(P10_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10::Value2) + self.variant(P10_A::VALUE2) } } #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; -impl<'a, REG> P11W<'a, REG> +pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; +impl<'a, REG> P11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11::Value1) + self.variant(P11_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11::Value2) + self.variant(P11_A::VALUE2) } } #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; -impl<'a, REG> P12W<'a, REG> +pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; +impl<'a, REG> P12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12::Value1) + self.variant(P12_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12::Value2) + self.variant(P12_A::VALUE2) } } #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; -impl<'a, REG> P13W<'a, REG> +pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; +impl<'a, REG> P13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13::Value1) + self.variant(P13_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13::Value2) + self.variant(P13_A::VALUE2) } } #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; -impl<'a, REG> P14W<'a, REG> +pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; +impl<'a, REG> P14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14::Value1) + self.variant(P14_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14::Value2) + self.variant(P14_A::VALUE2) } } #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; -impl<'a, REG> P15W<'a, REG> +pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; +impl<'a, REG> P15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15::Value1) + self.variant(P15_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15::Value2) + self.variant(P15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0W { - P0W::new(self, 0) + pub fn p0(&mut self) -> P0_W { + P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1W { - P1W::new(self, 1) + pub fn p1(&mut self) -> P1_W { + P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2W { - P2W::new(self, 2) + pub fn p2(&mut self) -> P2_W { + P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3W { - P3W::new(self, 3) + pub fn p3(&mut self) -> P3_W { + P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4W { - P4W::new(self, 4) + pub fn p4(&mut self) -> P4_W { + P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5W { - P5W::new(self, 5) + pub fn p5(&mut self) -> P5_W { + P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6W { - P6W::new(self, 6) + pub fn p6(&mut self) -> P6_W { + P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7W { - P7W::new(self, 7) + pub fn p7(&mut self) -> P7_W { + P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8W { - P8W::new(self, 8) + pub fn p8(&mut self) -> P8_W { + P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9W { - P9W::new(self, 9) + pub fn p9(&mut self) -> P9_W { + P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10W { - P10W::new(self, 10) + pub fn p10(&mut self) -> P10_W { + P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11W { - P11W::new(self, 11) + pub fn p11(&mut self) -> P11_W { + P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12W { - P12W::new(self, 12) + pub fn p12(&mut self) -> P12_W { + P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13W { - P13W::new(self, 13) + pub fn p13(&mut self) -> P13_W { + P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14W { - P14W::new(self, 14) + pub fn p14(&mut self) -> P14_W { + P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15W { - P15W::new(self, 15) + pub fn p15(&mut self) -> P15_W { + P15_W::new(self, 15) } } #[doc = "Port 0 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutSpec; -impl crate::RegisterSpec for OutSpec { +pub struct OUT_SPEC; +impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OutSpec {} +impl crate::Readable for OUT_SPEC {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OutSpec { +impl crate::Writable for OUT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OutSpec { +impl crate::Resettable for OUT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/pdisc.rs b/src/port0/pdisc.rs index 685cfa82..a3f48399 100644 --- a/src/port0/pdisc.rs +++ b/src/port0/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis0 { +pub enum PDIS0_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis0) -> Self { + fn from(variant: PDIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type Pdis0R = crate::BitReader; -impl Pdis0R { +pub type PDIS0_R = crate::BitReader; +impl PDIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis0 { + pub const fn variant(&self) -> PDIS0_A { match self.bits { - false => Pdis0::Value1, - true => Pdis0::Value2, + false => PDIS0_A::VALUE1, + true => PDIS0_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis0::Value1 + *self == PDIS0_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis0::Value2 + *self == PDIS0_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis1 { +pub enum PDIS1_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis1) -> Self { + fn from(variant: PDIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type Pdis1R = crate::BitReader; -impl Pdis1R { +pub type PDIS1_R = crate::BitReader; +impl PDIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis1 { + pub const fn variant(&self) -> PDIS1_A { match self.bits { - false => Pdis1::Value1, - true => Pdis1::Value2, + false => PDIS1_A::VALUE1, + true => PDIS1_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis1::Value1 + *self == PDIS1_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis1::Value2 + *self == PDIS1_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis2 { +pub enum PDIS2_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis2) -> Self { + fn from(variant: PDIS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type Pdis2R = crate::BitReader; -impl Pdis2R { +pub type PDIS2_R = crate::BitReader; +impl PDIS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis2 { + pub const fn variant(&self) -> PDIS2_A { match self.bits { - false => Pdis2::Value1, - true => Pdis2::Value2, + false => PDIS2_A::VALUE1, + true => PDIS2_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis2::Value1 + *self == PDIS2_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis2::Value2 + *self == PDIS2_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis3 { +pub enum PDIS3_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis3) -> Self { + fn from(variant: PDIS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type Pdis3R = crate::BitReader; -impl Pdis3R { +pub type PDIS3_R = crate::BitReader; +impl PDIS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis3 { + pub const fn variant(&self) -> PDIS3_A { match self.bits { - false => Pdis3::Value1, - true => Pdis3::Value2, + false => PDIS3_A::VALUE1, + true => PDIS3_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis3::Value1 + *self == PDIS3_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis3::Value2 + *self == PDIS3_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis4 { +pub enum PDIS4_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis4) -> Self { + fn from(variant: PDIS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type Pdis4R = crate::BitReader; -impl Pdis4R { +pub type PDIS4_R = crate::BitReader; +impl PDIS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis4 { + pub const fn variant(&self) -> PDIS4_A { match self.bits { - false => Pdis4::Value1, - true => Pdis4::Value2, + false => PDIS4_A::VALUE1, + true => PDIS4_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis4::Value1 + *self == PDIS4_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis4::Value2 + *self == PDIS4_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis5 { +pub enum PDIS5_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis5) -> Self { + fn from(variant: PDIS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type Pdis5R = crate::BitReader; -impl Pdis5R { +pub type PDIS5_R = crate::BitReader; +impl PDIS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis5 { + pub const fn variant(&self) -> PDIS5_A { match self.bits { - false => Pdis5::Value1, - true => Pdis5::Value2, + false => PDIS5_A::VALUE1, + true => PDIS5_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis5::Value1 + *self == PDIS5_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis5::Value2 + *self == PDIS5_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis6 { +pub enum PDIS6_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis6) -> Self { + fn from(variant: PDIS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type Pdis6R = crate::BitReader; -impl Pdis6R { +pub type PDIS6_R = crate::BitReader; +impl PDIS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis6 { + pub const fn variant(&self) -> PDIS6_A { match self.bits { - false => Pdis6::Value1, - true => Pdis6::Value2, + false => PDIS6_A::VALUE1, + true => PDIS6_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis6::Value1 + *self == PDIS6_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis6::Value2 + *self == PDIS6_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis7 { +pub enum PDIS7_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis7) -> Self { + fn from(variant: PDIS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type Pdis7R = crate::BitReader; -impl Pdis7R { +pub type PDIS7_R = crate::BitReader; +impl PDIS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis7 { + pub const fn variant(&self) -> PDIS7_A { match self.bits { - false => Pdis7::Value1, - true => Pdis7::Value2, + false => PDIS7_A::VALUE1, + true => PDIS7_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis7::Value1 + *self == PDIS7_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis7::Value2 + *self == PDIS7_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis8 { +pub enum PDIS8_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis8) -> Self { + fn from(variant: PDIS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type Pdis8R = crate::BitReader; -impl Pdis8R { +pub type PDIS8_R = crate::BitReader; +impl PDIS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis8 { + pub const fn variant(&self) -> PDIS8_A { match self.bits { - false => Pdis8::Value1, - true => Pdis8::Value2, + false => PDIS8_A::VALUE1, + true => PDIS8_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis8::Value1 + *self == PDIS8_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis8::Value2 + *self == PDIS8_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis9 { +pub enum PDIS9_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis9) -> Self { + fn from(variant: PDIS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type Pdis9R = crate::BitReader; -impl Pdis9R { +pub type PDIS9_R = crate::BitReader; +impl PDIS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis9 { + pub const fn variant(&self) -> PDIS9_A { match self.bits { - false => Pdis9::Value1, - true => Pdis9::Value2, + false => PDIS9_A::VALUE1, + true => PDIS9_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis9::Value1 + *self == PDIS9_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis9::Value2 + *self == PDIS9_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis10 { +pub enum PDIS10_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis10) -> Self { + fn from(variant: PDIS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type Pdis10R = crate::BitReader; -impl Pdis10R { +pub type PDIS10_R = crate::BitReader; +impl PDIS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis10 { + pub const fn variant(&self) -> PDIS10_A { match self.bits { - false => Pdis10::Value1, - true => Pdis10::Value2, + false => PDIS10_A::VALUE1, + true => PDIS10_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis10::Value1 + *self == PDIS10_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis10::Value2 + *self == PDIS10_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis11 { +pub enum PDIS11_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis11) -> Self { + fn from(variant: PDIS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type Pdis11R = crate::BitReader; -impl Pdis11R { +pub type PDIS11_R = crate::BitReader; +impl PDIS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis11 { + pub const fn variant(&self) -> PDIS11_A { match self.bits { - false => Pdis11::Value1, - true => Pdis11::Value2, + false => PDIS11_A::VALUE1, + true => PDIS11_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis11::Value1 + *self == PDIS11_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis11::Value2 + *self == PDIS11_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis12 { +pub enum PDIS12_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis12) -> Self { + fn from(variant: PDIS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type Pdis12R = crate::BitReader; -impl Pdis12R { +pub type PDIS12_R = crate::BitReader; +impl PDIS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis12 { + pub const fn variant(&self) -> PDIS12_A { match self.bits { - false => Pdis12::Value1, - true => Pdis12::Value2, + false => PDIS12_A::VALUE1, + true => PDIS12_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis12::Value1 + *self == PDIS12_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis12::Value2 + *self == PDIS12_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis13 { +pub enum PDIS13_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis13) -> Self { + fn from(variant: PDIS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type Pdis13R = crate::BitReader; -impl Pdis13R { +pub type PDIS13_R = crate::BitReader; +impl PDIS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis13 { + pub const fn variant(&self) -> PDIS13_A { match self.bits { - false => Pdis13::Value1, - true => Pdis13::Value2, + false => PDIS13_A::VALUE1, + true => PDIS13_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis13::Value1 + *self == PDIS13_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis13::Value2 + *self == PDIS13_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis14 { +pub enum PDIS14_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis14) -> Self { + fn from(variant: PDIS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type Pdis14R = crate::BitReader; -impl Pdis14R { +pub type PDIS14_R = crate::BitReader; +impl PDIS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis14 { + pub const fn variant(&self) -> PDIS14_A { match self.bits { - false => Pdis14::Value1, - true => Pdis14::Value2, + false => PDIS14_A::VALUE1, + true => PDIS14_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis14::Value1 + *self == PDIS14_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis14::Value2 + *self == PDIS14_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis15 { +pub enum PDIS15_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis15) -> Self { + fn from(variant: PDIS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type Pdis15R = crate::BitReader; -impl Pdis15R { +pub type PDIS15_R = crate::BitReader; +impl PDIS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis15 { + pub const fn variant(&self) -> PDIS15_A { match self.bits { - false => Pdis15::Value1, - true => Pdis15::Value2, + false => PDIS15_A::VALUE1, + true => PDIS15_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis15::Value1 + *self == PDIS15_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis15::Value2 + *self == PDIS15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> Pdis0R { - Pdis0R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> PDIS0_R { + PDIS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> Pdis1R { - Pdis1R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> PDIS1_R { + PDIS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> Pdis2R { - Pdis2R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> PDIS2_R { + PDIS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> Pdis3R { - Pdis3R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> PDIS3_R { + PDIS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> Pdis4R { - Pdis4R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> PDIS4_R { + PDIS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> Pdis5R { - Pdis5R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> PDIS5_R { + PDIS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> Pdis6R { - Pdis6R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> PDIS6_R { + PDIS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> Pdis7R { - Pdis7R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> PDIS7_R { + PDIS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> Pdis8R { - Pdis8R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> PDIS8_R { + PDIS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> Pdis9R { - Pdis9R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> PDIS9_R { + PDIS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> Pdis10R { - Pdis10R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> PDIS10_R { + PDIS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> Pdis11R { - Pdis11R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> PDIS11_R { + PDIS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> Pdis12R { - Pdis12R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> PDIS12_R { + PDIS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> Pdis13R { - Pdis13R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> PDIS13_R { + PDIS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> Pdis14R { - Pdis14R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> PDIS14_R { + PDIS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> Pdis15R { - Pdis15R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> PDIS15_R { + PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 0 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdiscSpec; -impl crate::RegisterSpec for PdiscSpec { +pub struct PDISC_SPEC; +impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PdiscSpec {} +impl crate::Readable for PDISC_SPEC {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PdiscSpec { +impl crate::Resettable for PDISC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port0/pdr0.rs b/src/port0/pdr0.rs index c37188e3..f7362a47 100644 --- a/src/port0/pdr0.rs +++ b/src/port0/pdr0.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type Pd0R = crate::FieldReader; +pub type PD0_R = crate::FieldReader; #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type Pd1R = crate::FieldReader; +pub type PD1_R = crate::FieldReader; #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type Pd2R = crate::FieldReader; +pub type PD2_R = crate::FieldReader; #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type Pd3R = crate::FieldReader; +pub type PD3_R = crate::FieldReader; #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type Pd4R = crate::FieldReader; +pub type PD4_R = crate::FieldReader; #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type Pd5R = crate::FieldReader; +pub type PD5_R = crate::FieldReader; #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type Pd6R = crate::FieldReader; +pub type PD6_R = crate::FieldReader; #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type Pd7R = crate::FieldReader; +pub type PD7_R = crate::FieldReader; #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> Pd0R { - Pd0R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> PD0_R { + PD0_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> Pd1R { - Pd1R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> PD1_R { + PD1_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> Pd2R { - Pd2R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> PD2_R { + PD2_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> Pd3R { - Pd3R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> PD3_R { + PD3_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> Pd4R { - Pd4R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> PD4_R { + PD4_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> Pd5R { - Pd5R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> PD5_R { + PD5_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> Pd6R { - Pd6R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> PD6_R { + PD6_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> Pd7R { - Pd7R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> PD7_R { + PD7_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> Pd0W { - Pd0W::new(self, 0) + pub fn pd0(&mut self) -> PD0_W { + PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> Pd1W { - Pd1W::new(self, 4) + pub fn pd1(&mut self) -> PD1_W { + PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> Pd2W { - Pd2W::new(self, 8) + pub fn pd2(&mut self) -> PD2_W { + PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> Pd3W { - Pd3W::new(self, 12) + pub fn pd3(&mut self) -> PD3_W { + PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> Pd4W { - Pd4W::new(self, 16) + pub fn pd4(&mut self) -> PD4_W { + PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> Pd5W { - Pd5W::new(self, 20) + pub fn pd5(&mut self) -> PD5_W { + PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> Pd6W { - Pd6W::new(self, 24) + pub fn pd6(&mut self) -> PD6_W { + PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> Pd7W { - Pd7W::new(self, 28) + pub fn pd7(&mut self) -> PD7_W { + PD7_W::new(self, 28) } } #[doc = "Port 0 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr0Spec; -impl crate::RegisterSpec for Pdr0Spec { +pub struct PDR0_SPEC; +impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for Pdr0Spec {} +impl crate::Readable for PDR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for Pdr0Spec { +impl crate::Writable for PDR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for Pdr0Spec { +impl crate::Resettable for PDR0_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port0/pdr1.rs b/src/port0/pdr1.rs index 86001796..af072bf2 100644 --- a/src/port0/pdr1.rs +++ b/src/port0/pdr1.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type Pd8R = crate::FieldReader; +pub type PD8_R = crate::FieldReader; #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type Pd9R = crate::FieldReader; +pub type PD9_R = crate::FieldReader; #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type Pd10R = crate::FieldReader; +pub type PD10_R = crate::FieldReader; #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type Pd10W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD10_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type Pd11R = crate::FieldReader; +pub type PD11_R = crate::FieldReader; #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type Pd11W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD11_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type Pd12R = crate::FieldReader; +pub type PD12_R = crate::FieldReader; #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type Pd13R = crate::FieldReader; +pub type PD13_R = crate::FieldReader; #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type Pd14R = crate::FieldReader; +pub type PD14_R = crate::FieldReader; #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type Pd15R = crate::FieldReader; +pub type PD15_R = crate::FieldReader; #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> Pd8R { - Pd8R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> PD8_R { + PD8_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> Pd9R { - Pd9R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> PD9_R { + PD9_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> Pd10R { - Pd10R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> PD10_R { + PD10_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> Pd11R { - Pd11R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> PD11_R { + PD11_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> Pd12R { - Pd12R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> PD12_R { + PD12_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> Pd13R { - Pd13R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> PD13_R { + PD13_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> Pd14R { - Pd14R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> PD14_R { + PD14_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> Pd15R { - Pd15R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> PD15_R { + PD15_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> Pd8W { - Pd8W::new(self, 0) + pub fn pd8(&mut self) -> PD8_W { + PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> Pd9W { - Pd9W::new(self, 4) + pub fn pd9(&mut self) -> PD9_W { + PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> Pd10W { - Pd10W::new(self, 8) + pub fn pd10(&mut self) -> PD10_W { + PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> Pd11W { - Pd11W::new(self, 12) + pub fn pd11(&mut self) -> PD11_W { + PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> Pd12W { - Pd12W::new(self, 16) + pub fn pd12(&mut self) -> PD12_W { + PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> Pd13W { - Pd13W::new(self, 20) + pub fn pd13(&mut self) -> PD13_W { + PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> Pd14W { - Pd14W::new(self, 24) + pub fn pd14(&mut self) -> PD14_W { + PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> Pd15W { - Pd15W::new(self, 28) + pub fn pd15(&mut self) -> PD15_W { + PD15_W::new(self, 28) } } #[doc = "Port 0 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr1Spec; -impl crate::RegisterSpec for Pdr1Spec { +pub struct PDR1_SPEC; +impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for Pdr1Spec {} +impl crate::Readable for PDR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for Pdr1Spec { +impl crate::Writable for PDR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for Pdr1Spec { +impl crate::Resettable for PDR1_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port0/pps.rs b/src/port0/pps.rs index e2d13c7a..0343eeef 100644 --- a/src/port0/pps.rs +++ b/src/port0/pps.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps0 { +pub enum PPS0_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps0) -> Self { + fn from(variant: PPS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type Pps0R = crate::BitReader; -impl Pps0R { +pub type PPS0_R = crate::BitReader; +impl PPS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps0 { + pub const fn variant(&self) -> PPS0_A { match self.bits { - false => Pps0::Value1, - true => Pps0::Value2, + false => PPS0_A::VALUE1, + true => PPS0_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps0::Value1 + *self == PPS0_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps0::Value2 + *self == PPS0_A::VALUE2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; -impl<'a, REG> Pps0W<'a, REG> +pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; +impl<'a, REG> PPS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps0::Value1) + self.variant(PPS0_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps0::Value2) + self.variant(PPS0_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps1 { +pub enum PPS1_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps1) -> Self { + fn from(variant: PPS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type Pps1R = crate::BitReader; -impl Pps1R { +pub type PPS1_R = crate::BitReader; +impl PPS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps1 { + pub const fn variant(&self) -> PPS1_A { match self.bits { - false => Pps1::Value1, - true => Pps1::Value2, + false => PPS1_A::VALUE1, + true => PPS1_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps1::Value1 + *self == PPS1_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps1::Value2 + *self == PPS1_A::VALUE2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; -impl<'a, REG> Pps1W<'a, REG> +pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; +impl<'a, REG> PPS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps1::Value1) + self.variant(PPS1_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps1::Value2) + self.variant(PPS1_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps2 { +pub enum PPS2_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps2) -> Self { + fn from(variant: PPS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type Pps2R = crate::BitReader; -impl Pps2R { +pub type PPS2_R = crate::BitReader; +impl PPS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps2 { + pub const fn variant(&self) -> PPS2_A { match self.bits { - false => Pps2::Value1, - true => Pps2::Value2, + false => PPS2_A::VALUE1, + true => PPS2_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps2::Value1 + *self == PPS2_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps2::Value2 + *self == PPS2_A::VALUE2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; -impl<'a, REG> Pps2W<'a, REG> +pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; +impl<'a, REG> PPS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps2::Value1) + self.variant(PPS2_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps2::Value2) + self.variant(PPS2_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps3 { +pub enum PPS3_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps3) -> Self { + fn from(variant: PPS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type Pps3R = crate::BitReader; -impl Pps3R { +pub type PPS3_R = crate::BitReader; +impl PPS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps3 { + pub const fn variant(&self) -> PPS3_A { match self.bits { - false => Pps3::Value1, - true => Pps3::Value2, + false => PPS3_A::VALUE1, + true => PPS3_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps3::Value1 + *self == PPS3_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps3::Value2 + *self == PPS3_A::VALUE2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; -impl<'a, REG> Pps3W<'a, REG> +pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; +impl<'a, REG> PPS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps3::Value1) + self.variant(PPS3_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps3::Value2) + self.variant(PPS3_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps4 { +pub enum PPS4_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps4) -> Self { + fn from(variant: PPS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type Pps4R = crate::BitReader; -impl Pps4R { +pub type PPS4_R = crate::BitReader; +impl PPS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps4 { + pub const fn variant(&self) -> PPS4_A { match self.bits { - false => Pps4::Value1, - true => Pps4::Value2, + false => PPS4_A::VALUE1, + true => PPS4_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps4::Value1 + *self == PPS4_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps4::Value2 + *self == PPS4_A::VALUE2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; -impl<'a, REG> Pps4W<'a, REG> +pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; +impl<'a, REG> PPS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps4::Value1) + self.variant(PPS4_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps4::Value2) + self.variant(PPS4_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps5 { +pub enum PPS5_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps5) -> Self { + fn from(variant: PPS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type Pps5R = crate::BitReader; -impl Pps5R { +pub type PPS5_R = crate::BitReader; +impl PPS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps5 { + pub const fn variant(&self) -> PPS5_A { match self.bits { - false => Pps5::Value1, - true => Pps5::Value2, + false => PPS5_A::VALUE1, + true => PPS5_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps5::Value1 + *self == PPS5_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps5::Value2 + *self == PPS5_A::VALUE2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; -impl<'a, REG> Pps5W<'a, REG> +pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; +impl<'a, REG> PPS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps5::Value1) + self.variant(PPS5_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps5::Value2) + self.variant(PPS5_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps6 { +pub enum PPS6_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps6) -> Self { + fn from(variant: PPS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type Pps6R = crate::BitReader; -impl Pps6R { +pub type PPS6_R = crate::BitReader; +impl PPS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps6 { + pub const fn variant(&self) -> PPS6_A { match self.bits { - false => Pps6::Value1, - true => Pps6::Value2, + false => PPS6_A::VALUE1, + true => PPS6_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps6::Value1 + *self == PPS6_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps6::Value2 + *self == PPS6_A::VALUE2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; -impl<'a, REG> Pps6W<'a, REG> +pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; +impl<'a, REG> PPS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps6::Value1) + self.variant(PPS6_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps6::Value2) + self.variant(PPS6_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps7 { +pub enum PPS7_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps7) -> Self { + fn from(variant: PPS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type Pps7R = crate::BitReader; -impl Pps7R { +pub type PPS7_R = crate::BitReader; +impl PPS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps7 { + pub const fn variant(&self) -> PPS7_A { match self.bits { - false => Pps7::Value1, - true => Pps7::Value2, + false => PPS7_A::VALUE1, + true => PPS7_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps7::Value1 + *self == PPS7_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps7::Value2 + *self == PPS7_A::VALUE2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; -impl<'a, REG> Pps7W<'a, REG> +pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; +impl<'a, REG> PPS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps7::Value1) + self.variant(PPS7_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps7::Value2) + self.variant(PPS7_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps8 { +pub enum PPS8_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps8) -> Self { + fn from(variant: PPS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type Pps8R = crate::BitReader; -impl Pps8R { +pub type PPS8_R = crate::BitReader; +impl PPS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps8 { + pub const fn variant(&self) -> PPS8_A { match self.bits { - false => Pps8::Value1, - true => Pps8::Value2, + false => PPS8_A::VALUE1, + true => PPS8_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps8::Value1 + *self == PPS8_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps8::Value2 + *self == PPS8_A::VALUE2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; -impl<'a, REG> Pps8W<'a, REG> +pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; +impl<'a, REG> PPS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps8::Value1) + self.variant(PPS8_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps8::Value2) + self.variant(PPS8_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps9 { +pub enum PPS9_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps9) -> Self { + fn from(variant: PPS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type Pps9R = crate::BitReader; -impl Pps9R { +pub type PPS9_R = crate::BitReader; +impl PPS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps9 { + pub const fn variant(&self) -> PPS9_A { match self.bits { - false => Pps9::Value1, - true => Pps9::Value2, + false => PPS9_A::VALUE1, + true => PPS9_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps9::Value1 + *self == PPS9_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps9::Value2 + *self == PPS9_A::VALUE2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; -impl<'a, REG> Pps9W<'a, REG> +pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; +impl<'a, REG> PPS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps9::Value1) + self.variant(PPS9_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps9::Value2) + self.variant(PPS9_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps10 { +pub enum PPS10_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps10) -> Self { + fn from(variant: PPS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type Pps10R = crate::BitReader; -impl Pps10R { +pub type PPS10_R = crate::BitReader; +impl PPS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps10 { + pub const fn variant(&self) -> PPS10_A { match self.bits { - false => Pps10::Value1, - true => Pps10::Value2, + false => PPS10_A::VALUE1, + true => PPS10_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps10::Value1 + *self == PPS10_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps10::Value2 + *self == PPS10_A::VALUE2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; -impl<'a, REG> Pps10W<'a, REG> +pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; +impl<'a, REG> PPS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps10::Value1) + self.variant(PPS10_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps10::Value2) + self.variant(PPS10_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps11 { +pub enum PPS11_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps11) -> Self { + fn from(variant: PPS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type Pps11R = crate::BitReader; -impl Pps11R { +pub type PPS11_R = crate::BitReader; +impl PPS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps11 { + pub const fn variant(&self) -> PPS11_A { match self.bits { - false => Pps11::Value1, - true => Pps11::Value2, + false => PPS11_A::VALUE1, + true => PPS11_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps11::Value1 + *self == PPS11_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps11::Value2 + *self == PPS11_A::VALUE2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; -impl<'a, REG> Pps11W<'a, REG> +pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; +impl<'a, REG> PPS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps11::Value1) + self.variant(PPS11_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps11::Value2) + self.variant(PPS11_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps12 { +pub enum PPS12_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps12) -> Self { + fn from(variant: PPS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type Pps12R = crate::BitReader; -impl Pps12R { +pub type PPS12_R = crate::BitReader; +impl PPS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps12 { + pub const fn variant(&self) -> PPS12_A { match self.bits { - false => Pps12::Value1, - true => Pps12::Value2, + false => PPS12_A::VALUE1, + true => PPS12_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps12::Value1 + *self == PPS12_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps12::Value2 + *self == PPS12_A::VALUE2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; -impl<'a, REG> Pps12W<'a, REG> +pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; +impl<'a, REG> PPS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps12::Value1) + self.variant(PPS12_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps12::Value2) + self.variant(PPS12_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps13 { +pub enum PPS13_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps13) -> Self { + fn from(variant: PPS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type Pps13R = crate::BitReader; -impl Pps13R { +pub type PPS13_R = crate::BitReader; +impl PPS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps13 { + pub const fn variant(&self) -> PPS13_A { match self.bits { - false => Pps13::Value1, - true => Pps13::Value2, + false => PPS13_A::VALUE1, + true => PPS13_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps13::Value1 + *self == PPS13_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps13::Value2 + *self == PPS13_A::VALUE2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; -impl<'a, REG> Pps13W<'a, REG> +pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; +impl<'a, REG> PPS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps13::Value1) + self.variant(PPS13_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps13::Value2) + self.variant(PPS13_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps14 { +pub enum PPS14_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps14) -> Self { + fn from(variant: PPS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type Pps14R = crate::BitReader; -impl Pps14R { +pub type PPS14_R = crate::BitReader; +impl PPS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps14 { + pub const fn variant(&self) -> PPS14_A { match self.bits { - false => Pps14::Value1, - true => Pps14::Value2, + false => PPS14_A::VALUE1, + true => PPS14_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps14::Value1 + *self == PPS14_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps14::Value2 + *self == PPS14_A::VALUE2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; -impl<'a, REG> Pps14W<'a, REG> +pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; +impl<'a, REG> PPS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps14::Value1) + self.variant(PPS14_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps14::Value2) + self.variant(PPS14_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps15 { +pub enum PPS15_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps15) -> Self { + fn from(variant: PPS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type Pps15R = crate::BitReader; -impl Pps15R { +pub type PPS15_R = crate::BitReader; +impl PPS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps15 { + pub const fn variant(&self) -> PPS15_A { match self.bits { - false => Pps15::Value1, - true => Pps15::Value2, + false => PPS15_A::VALUE1, + true => PPS15_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps15::Value1 + *self == PPS15_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps15::Value2 + *self == PPS15_A::VALUE2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; -impl<'a, REG> Pps15W<'a, REG> +pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; +impl<'a, REG> PPS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps15::Value1) + self.variant(PPS15_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps15::Value2) + self.variant(PPS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> Pps0R { - Pps0R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> PPS0_R { + PPS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> Pps1R { - Pps1R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> PPS1_R { + PPS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> Pps2R { - Pps2R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> PPS2_R { + PPS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> Pps3R { - Pps3R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> PPS3_R { + PPS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> Pps4R { - Pps4R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> PPS4_R { + PPS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> Pps5R { - Pps5R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> PPS5_R { + PPS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> Pps6R { - Pps6R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> PPS6_R { + PPS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> Pps7R { - Pps7R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> PPS7_R { + PPS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> Pps8R { - Pps8R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> PPS8_R { + PPS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> Pps9R { - Pps9R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> PPS9_R { + PPS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> Pps10R { - Pps10R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> PPS10_R { + PPS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> Pps11R { - Pps11R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> PPS11_R { + PPS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> Pps12R { - Pps12R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> PPS12_R { + PPS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> Pps13R { - Pps13R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> PPS13_R { + PPS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> Pps14R { - Pps14R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> PPS14_R { + PPS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> Pps15R { - Pps15R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> PPS15_R { + PPS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> Pps0W { - Pps0W::new(self, 0) + pub fn pps0(&mut self) -> PPS0_W { + PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> Pps1W { - Pps1W::new(self, 1) + pub fn pps1(&mut self) -> PPS1_W { + PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> Pps2W { - Pps2W::new(self, 2) + pub fn pps2(&mut self) -> PPS2_W { + PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> Pps3W { - Pps3W::new(self, 3) + pub fn pps3(&mut self) -> PPS3_W { + PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> Pps4W { - Pps4W::new(self, 4) + pub fn pps4(&mut self) -> PPS4_W { + PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> Pps5W { - Pps5W::new(self, 5) + pub fn pps5(&mut self) -> PPS5_W { + PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> Pps6W { - Pps6W::new(self, 6) + pub fn pps6(&mut self) -> PPS6_W { + PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> Pps7W { - Pps7W::new(self, 7) + pub fn pps7(&mut self) -> PPS7_W { + PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> Pps8W { - Pps8W::new(self, 8) + pub fn pps8(&mut self) -> PPS8_W { + PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> Pps9W { - Pps9W::new(self, 9) + pub fn pps9(&mut self) -> PPS9_W { + PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> Pps10W { - Pps10W::new(self, 10) + pub fn pps10(&mut self) -> PPS10_W { + PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> Pps11W { - Pps11W::new(self, 11) + pub fn pps11(&mut self) -> PPS11_W { + PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> Pps12W { - Pps12W::new(self, 12) + pub fn pps12(&mut self) -> PPS12_W { + PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> Pps13W { - Pps13W::new(self, 13) + pub fn pps13(&mut self) -> PPS13_W { + PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> Pps14W { - Pps14W::new(self, 14) + pub fn pps14(&mut self) -> PPS14_W { + PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> Pps15W { - Pps15W::new(self, 15) + pub fn pps15(&mut self) -> PPS15_W { + PPS15_W::new(self, 15) } } #[doc = "Port 0 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PpsSpec; -impl crate::RegisterSpec for PpsSpec { +pub struct PPS_SPEC; +impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PpsSpec {} +impl crate::Readable for PPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PpsSpec { +impl crate::Writable for PPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PpsSpec { +impl crate::Resettable for PPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1.rs b/src/port1.rs index 116a6fe8..fc68f077 100644 --- a/src/port1.rs +++ b/src/port1.rs @@ -1,155 +1,143 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - out: Out, - omr: Omr, + out: OUT, + omr: OMR, _reserved2: [u8; 0x08], - iocr0: Iocr0, - iocr4: Iocr4, - iocr8: Iocr8, - iocr12: Iocr12, + iocr0: IOCR0, + iocr4: IOCR4, + iocr8: IOCR8, + iocr12: IOCR12, _reserved6: [u8; 0x04], - in_: In, + in_: IN, _reserved7: [u8; 0x18], - pdr0: Pdr0, - pdr1: Pdr1, + pdr0: PDR0, + pdr1: PDR1, _reserved9: [u8; 0x18], - pdisc: Pdisc, + pdisc: PDISC, _reserved10: [u8; 0x0c], - pps: Pps, - hwsel: Hwsel, + pps: PPS, + hwsel: HWSEL, } impl RegisterBlock { #[doc = "0x00 - Port 1 Output Register"] #[inline(always)] - pub const fn out(&self) -> &Out { + pub const fn out(&self) -> &OUT { &self.out } #[doc = "0x04 - Port 1 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &Omr { + pub const fn omr(&self) -> &OMR { &self.omr } #[doc = "0x10 - Port 1 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &Iocr0 { + pub const fn iocr0(&self) -> &IOCR0 { &self.iocr0 } #[doc = "0x14 - Port 1 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &Iocr4 { + pub const fn iocr4(&self) -> &IOCR4 { &self.iocr4 } #[doc = "0x18 - Port 1 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &Iocr8 { + pub const fn iocr8(&self) -> &IOCR8 { &self.iocr8 } #[doc = "0x1c - Port 1 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &Iocr12 { + pub const fn iocr12(&self) -> &IOCR12 { &self.iocr12 } #[doc = "0x24 - Port 1 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &In { + pub const fn in_(&self) -> &IN { &self.in_ } #[doc = "0x40 - Port 1 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &Pdr0 { + pub const fn pdr0(&self) -> &PDR0 { &self.pdr0 } #[doc = "0x44 - Port 1 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &Pdr1 { + pub const fn pdr1(&self) -> &PDR1 { &self.pdr1 } #[doc = "0x60 - Port 1 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &Pdisc { + pub const fn pdisc(&self) -> &PDISC { &self.pdisc } #[doc = "0x70 - Port 1 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &Pps { + pub const fn pps(&self) -> &PPS { &self.pps } #[doc = "0x74 - Port 1 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &Hwsel { + pub const fn hwsel(&self) -> &HWSEL { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -#[doc(alias = "OUT")] -pub type Out = crate::Reg; +pub type OUT = crate::Reg; #[doc = "Port 1 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -#[doc(alias = "OMR")] -pub type Omr = crate::Reg; +pub type OMR = crate::Reg; #[doc = "Port 1 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -#[doc(alias = "IOCR0")] -pub type Iocr0 = crate::Reg; +pub type IOCR0 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -#[doc(alias = "IOCR4")] -pub type Iocr4 = crate::Reg; +pub type IOCR4 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -#[doc(alias = "IOCR8")] -pub type Iocr8 = crate::Reg; +pub type IOCR8 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -#[doc(alias = "IOCR12")] -pub type Iocr12 = crate::Reg; +pub type IOCR12 = crate::Reg; #[doc = "Port 1 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Port 1 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -#[doc(alias = "PDR0")] -pub type Pdr0 = crate::Reg; +pub type PDR0 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -#[doc(alias = "PDR1")] -pub type Pdr1 = crate::Reg; +pub type PDR1 = crate::Reg; #[doc = "Port 1 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -#[doc(alias = "PDISC")] -pub type Pdisc = crate::Reg; +pub type PDISC = crate::Reg; #[doc = "Port 1 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -#[doc(alias = "PPS")] -pub type Pps = crate::Reg; +pub type PPS = crate::Reg; #[doc = "Port 1 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -#[doc(alias = "HWSEL")] -pub type Hwsel = crate::Reg; +pub type HWSEL = crate::Reg; #[doc = "Port 1 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port1/hwsel.rs b/src/port1/hwsel.rs index 326118f9..c4fd72e7 100644 --- a/src/port1/hwsel.rs +++ b/src/port1/hwsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw0 { +pub enum HW0_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw0) -> Self { + fn from(variant: HW0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw0 { +impl crate::FieldSpec for HW0_A { type Ux = u8; } -impl crate::IsEnum for Hw0 {} +impl crate::IsEnum for HW0_A {} #[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type Hw0R = crate::FieldReader; -impl Hw0R { +pub type HW0_R = crate::FieldReader; +impl HW0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw0::Value1), - 1 => Some(Hw0::Value2), - 2 => Some(Hw0::Value3), + 0 => Some(HW0_A::VALUE1), + 1 => Some(HW0_A::VALUE2), + 2 => Some(HW0_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw0::Value1 + *self == HW0_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw0::Value2 + *self == HW0_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw0::Value3 + *self == HW0_A::VALUE3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; -impl<'a, REG> Hw0W<'a, REG> +pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; +impl<'a, REG> HW0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw0::Value1) + self.variant(HW0_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw0::Value2) + self.variant(HW0_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw0::Value3) + self.variant(HW0_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw1 { +pub enum HW1_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw1) -> Self { + fn from(variant: HW1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw1 { +impl crate::FieldSpec for HW1_A { type Ux = u8; } -impl crate::IsEnum for Hw1 {} +impl crate::IsEnum for HW1_A {} #[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type Hw1R = crate::FieldReader; -impl Hw1R { +pub type HW1_R = crate::FieldReader; +impl HW1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw1::Value1), - 1 => Some(Hw1::Value2), - 2 => Some(Hw1::Value3), + 0 => Some(HW1_A::VALUE1), + 1 => Some(HW1_A::VALUE2), + 2 => Some(HW1_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw1::Value1 + *self == HW1_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw1::Value2 + *self == HW1_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw1::Value3 + *self == HW1_A::VALUE3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; -impl<'a, REG> Hw1W<'a, REG> +pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; +impl<'a, REG> HW1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw1::Value1) + self.variant(HW1_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw1::Value2) + self.variant(HW1_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw1::Value3) + self.variant(HW1_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw2 { +pub enum HW2_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw2) -> Self { + fn from(variant: HW2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw2 { +impl crate::FieldSpec for HW2_A { type Ux = u8; } -impl crate::IsEnum for Hw2 {} +impl crate::IsEnum for HW2_A {} #[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type Hw2R = crate::FieldReader; -impl Hw2R { +pub type HW2_R = crate::FieldReader; +impl HW2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw2::Value1), - 1 => Some(Hw2::Value2), - 2 => Some(Hw2::Value3), + 0 => Some(HW2_A::VALUE1), + 1 => Some(HW2_A::VALUE2), + 2 => Some(HW2_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw2::Value1 + *self == HW2_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw2::Value2 + *self == HW2_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw2::Value3 + *self == HW2_A::VALUE3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; -impl<'a, REG> Hw2W<'a, REG> +pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; +impl<'a, REG> HW2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw2::Value1) + self.variant(HW2_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw2::Value2) + self.variant(HW2_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw2::Value3) + self.variant(HW2_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw3 { +pub enum HW3_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw3) -> Self { + fn from(variant: HW3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw3 { +impl crate::FieldSpec for HW3_A { type Ux = u8; } -impl crate::IsEnum for Hw3 {} +impl crate::IsEnum for HW3_A {} #[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type Hw3R = crate::FieldReader; -impl Hw3R { +pub type HW3_R = crate::FieldReader; +impl HW3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw3::Value1), - 1 => Some(Hw3::Value2), - 2 => Some(Hw3::Value3), + 0 => Some(HW3_A::VALUE1), + 1 => Some(HW3_A::VALUE2), + 2 => Some(HW3_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw3::Value1 + *self == HW3_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw3::Value2 + *self == HW3_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw3::Value3 + *self == HW3_A::VALUE3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; -impl<'a, REG> Hw3W<'a, REG> +pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; +impl<'a, REG> HW3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,72 +281,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw3::Value1) + self.variant(HW3_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw3::Value2) + self.variant(HW3_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw3::Value3) + self.variant(HW3_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw4 { +pub enum HW4_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw4) -> Self { + fn from(variant: HW4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw4 { +impl crate::FieldSpec for HW4_A { type Ux = u8; } -impl crate::IsEnum for Hw4 {} +impl crate::IsEnum for HW4_A {} #[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type Hw4R = crate::FieldReader; -impl Hw4R { +pub type HW4_R = crate::FieldReader; +impl HW4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw4::Value1), - 1 => Some(Hw4::Value2), - 2 => Some(Hw4::Value3), + 0 => Some(HW4_A::VALUE1), + 1 => Some(HW4_A::VALUE2), + 2 => Some(HW4_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw4::Value1 + *self == HW4_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw4::Value2 + *self == HW4_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw4::Value3 + *self == HW4_A::VALUE3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; -impl<'a, REG> Hw4W<'a, REG> +pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; +impl<'a, REG> HW4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -354,72 +354,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw4::Value1) + self.variant(HW4_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw4::Value2) + self.variant(HW4_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw4::Value3) + self.variant(HW4_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw5 { +pub enum HW5_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw5) -> Self { + fn from(variant: HW5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw5 { +impl crate::FieldSpec for HW5_A { type Ux = u8; } -impl crate::IsEnum for Hw5 {} +impl crate::IsEnum for HW5_A {} #[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type Hw5R = crate::FieldReader; -impl Hw5R { +pub type HW5_R = crate::FieldReader; +impl HW5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw5::Value1), - 1 => Some(Hw5::Value2), - 2 => Some(Hw5::Value3), + 0 => Some(HW5_A::VALUE1), + 1 => Some(HW5_A::VALUE2), + 2 => Some(HW5_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw5::Value1 + *self == HW5_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw5::Value2 + *self == HW5_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw5::Value3 + *self == HW5_A::VALUE3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; -impl<'a, REG> Hw5W<'a, REG> +pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; +impl<'a, REG> HW5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,72 +427,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw5::Value1) + self.variant(HW5_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw5::Value2) + self.variant(HW5_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw5::Value3) + self.variant(HW5_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw6 { +pub enum HW6_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw6) -> Self { + fn from(variant: HW6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw6 { +impl crate::FieldSpec for HW6_A { type Ux = u8; } -impl crate::IsEnum for Hw6 {} +impl crate::IsEnum for HW6_A {} #[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type Hw6R = crate::FieldReader; -impl Hw6R { +pub type HW6_R = crate::FieldReader; +impl HW6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw6::Value1), - 1 => Some(Hw6::Value2), - 2 => Some(Hw6::Value3), + 0 => Some(HW6_A::VALUE1), + 1 => Some(HW6_A::VALUE2), + 2 => Some(HW6_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw6::Value1 + *self == HW6_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw6::Value2 + *self == HW6_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw6::Value3 + *self == HW6_A::VALUE3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; -impl<'a, REG> Hw6W<'a, REG> +pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; +impl<'a, REG> HW6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw6::Value1) + self.variant(HW6_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw6::Value2) + self.variant(HW6_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw6::Value3) + self.variant(HW6_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw7 { +pub enum HW7_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw7) -> Self { + fn from(variant: HW7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw7 { +impl crate::FieldSpec for HW7_A { type Ux = u8; } -impl crate::IsEnum for Hw7 {} +impl crate::IsEnum for HW7_A {} #[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type Hw7R = crate::FieldReader; -impl Hw7R { +pub type HW7_R = crate::FieldReader; +impl HW7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw7::Value1), - 1 => Some(Hw7::Value2), - 2 => Some(Hw7::Value3), + 0 => Some(HW7_A::VALUE1), + 1 => Some(HW7_A::VALUE2), + 2 => Some(HW7_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw7::Value1 + *self == HW7_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw7::Value2 + *self == HW7_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw7::Value3 + *self == HW7_A::VALUE3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; -impl<'a, REG> Hw7W<'a, REG> +pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; +impl<'a, REG> HW7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,72 +573,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw7::Value1) + self.variant(HW7_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw7::Value2) + self.variant(HW7_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw7::Value3) + self.variant(HW7_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw8 { +pub enum HW8_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw8) -> Self { + fn from(variant: HW8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw8 { +impl crate::FieldSpec for HW8_A { type Ux = u8; } -impl crate::IsEnum for Hw8 {} +impl crate::IsEnum for HW8_A {} #[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type Hw8R = crate::FieldReader; -impl Hw8R { +pub type HW8_R = crate::FieldReader; +impl HW8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw8::Value1), - 1 => Some(Hw8::Value2), - 2 => Some(Hw8::Value3), + 0 => Some(HW8_A::VALUE1), + 1 => Some(HW8_A::VALUE2), + 2 => Some(HW8_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw8::Value1 + *self == HW8_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw8::Value2 + *self == HW8_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw8::Value3 + *self == HW8_A::VALUE3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; -impl<'a, REG> Hw8W<'a, REG> +pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; +impl<'a, REG> HW8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -646,72 +646,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw8::Value1) + self.variant(HW8_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw8::Value2) + self.variant(HW8_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw8::Value3) + self.variant(HW8_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw9 { +pub enum HW9_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw9) -> Self { + fn from(variant: HW9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw9 { +impl crate::FieldSpec for HW9_A { type Ux = u8; } -impl crate::IsEnum for Hw9 {} +impl crate::IsEnum for HW9_A {} #[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type Hw9R = crate::FieldReader; -impl Hw9R { +pub type HW9_R = crate::FieldReader; +impl HW9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw9::Value1), - 1 => Some(Hw9::Value2), - 2 => Some(Hw9::Value3), + 0 => Some(HW9_A::VALUE1), + 1 => Some(HW9_A::VALUE2), + 2 => Some(HW9_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw9::Value1 + *self == HW9_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw9::Value2 + *self == HW9_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw9::Value3 + *self == HW9_A::VALUE3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; -impl<'a, REG> Hw9W<'a, REG> +pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; +impl<'a, REG> HW9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -719,72 +719,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw9::Value1) + self.variant(HW9_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw9::Value2) + self.variant(HW9_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw9::Value3) + self.variant(HW9_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw10 { +pub enum HW10_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw10) -> Self { + fn from(variant: HW10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw10 { +impl crate::FieldSpec for HW10_A { type Ux = u8; } -impl crate::IsEnum for Hw10 {} +impl crate::IsEnum for HW10_A {} #[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type Hw10R = crate::FieldReader; -impl Hw10R { +pub type HW10_R = crate::FieldReader; +impl HW10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw10::Value1), - 1 => Some(Hw10::Value2), - 2 => Some(Hw10::Value3), + 0 => Some(HW10_A::VALUE1), + 1 => Some(HW10_A::VALUE2), + 2 => Some(HW10_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw10::Value1 + *self == HW10_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw10::Value2 + *self == HW10_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw10::Value3 + *self == HW10_A::VALUE3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; -impl<'a, REG> Hw10W<'a, REG> +pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; +impl<'a, REG> HW10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,72 +792,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw10::Value1) + self.variant(HW10_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw10::Value2) + self.variant(HW10_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw10::Value3) + self.variant(HW10_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw11 { +pub enum HW11_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw11) -> Self { + fn from(variant: HW11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw11 { +impl crate::FieldSpec for HW11_A { type Ux = u8; } -impl crate::IsEnum for Hw11 {} +impl crate::IsEnum for HW11_A {} #[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type Hw11R = crate::FieldReader; -impl Hw11R { +pub type HW11_R = crate::FieldReader; +impl HW11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw11::Value1), - 1 => Some(Hw11::Value2), - 2 => Some(Hw11::Value3), + 0 => Some(HW11_A::VALUE1), + 1 => Some(HW11_A::VALUE2), + 2 => Some(HW11_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw11::Value1 + *self == HW11_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw11::Value2 + *self == HW11_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw11::Value3 + *self == HW11_A::VALUE3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; -impl<'a, REG> Hw11W<'a, REG> +pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; +impl<'a, REG> HW11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,72 +865,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw11::Value1) + self.variant(HW11_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw11::Value2) + self.variant(HW11_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw11::Value3) + self.variant(HW11_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw12 { +pub enum HW12_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw12) -> Self { + fn from(variant: HW12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw12 { +impl crate::FieldSpec for HW12_A { type Ux = u8; } -impl crate::IsEnum for Hw12 {} +impl crate::IsEnum for HW12_A {} #[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type Hw12R = crate::FieldReader; -impl Hw12R { +pub type HW12_R = crate::FieldReader; +impl HW12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw12::Value1), - 1 => Some(Hw12::Value2), - 2 => Some(Hw12::Value3), + 0 => Some(HW12_A::VALUE1), + 1 => Some(HW12_A::VALUE2), + 2 => Some(HW12_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw12::Value1 + *self == HW12_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw12::Value2 + *self == HW12_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw12::Value3 + *self == HW12_A::VALUE3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; -impl<'a, REG> Hw12W<'a, REG> +pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; +impl<'a, REG> HW12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -938,72 +938,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw12::Value1) + self.variant(HW12_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw12::Value2) + self.variant(HW12_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw12::Value3) + self.variant(HW12_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw13 { +pub enum HW13_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw13) -> Self { + fn from(variant: HW13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw13 { +impl crate::FieldSpec for HW13_A { type Ux = u8; } -impl crate::IsEnum for Hw13 {} +impl crate::IsEnum for HW13_A {} #[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type Hw13R = crate::FieldReader; -impl Hw13R { +pub type HW13_R = crate::FieldReader; +impl HW13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw13::Value1), - 1 => Some(Hw13::Value2), - 2 => Some(Hw13::Value3), + 0 => Some(HW13_A::VALUE1), + 1 => Some(HW13_A::VALUE2), + 2 => Some(HW13_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw13::Value1 + *self == HW13_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw13::Value2 + *self == HW13_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw13::Value3 + *self == HW13_A::VALUE3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; -impl<'a, REG> Hw13W<'a, REG> +pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; +impl<'a, REG> HW13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1011,72 +1011,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw13::Value1) + self.variant(HW13_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw13::Value2) + self.variant(HW13_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw13::Value3) + self.variant(HW13_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw14 { +pub enum HW14_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw14) -> Self { + fn from(variant: HW14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw14 { +impl crate::FieldSpec for HW14_A { type Ux = u8; } -impl crate::IsEnum for Hw14 {} +impl crate::IsEnum for HW14_A {} #[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type Hw14R = crate::FieldReader; -impl Hw14R { +pub type HW14_R = crate::FieldReader; +impl HW14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw14::Value1), - 1 => Some(Hw14::Value2), - 2 => Some(Hw14::Value3), + 0 => Some(HW14_A::VALUE1), + 1 => Some(HW14_A::VALUE2), + 2 => Some(HW14_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw14::Value1 + *self == HW14_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw14::Value2 + *self == HW14_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw14::Value3 + *self == HW14_A::VALUE3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; -impl<'a, REG> Hw14W<'a, REG> +pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; +impl<'a, REG> HW14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1084,72 +1084,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw14::Value1) + self.variant(HW14_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw14::Value2) + self.variant(HW14_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw14::Value3) + self.variant(HW14_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw15 { +pub enum HW15_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw15) -> Self { + fn from(variant: HW15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw15 { +impl crate::FieldSpec for HW15_A { type Ux = u8; } -impl crate::IsEnum for Hw15 {} +impl crate::IsEnum for HW15_A {} #[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type Hw15R = crate::FieldReader; -impl Hw15R { +pub type HW15_R = crate::FieldReader; +impl HW15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw15::Value1), - 1 => Some(Hw15::Value2), - 2 => Some(Hw15::Value3), + 0 => Some(HW15_A::VALUE1), + 1 => Some(HW15_A::VALUE2), + 2 => Some(HW15_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw15::Value1 + *self == HW15_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw15::Value2 + *self == HW15_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw15::Value3 + *self == HW15_A::VALUE3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; -impl<'a, REG> Hw15W<'a, REG> +pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; +impl<'a, REG> HW15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1157,213 +1157,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw15::Value1) + self.variant(HW15_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw15::Value2) + self.variant(HW15_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw15::Value3) + self.variant(HW15_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> Hw0R { - Hw0R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> HW0_R { + HW0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> Hw1R { - Hw1R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> HW1_R { + HW1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> Hw2R { - Hw2R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> HW2_R { + HW2_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> Hw3R { - Hw3R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> HW3_R { + HW3_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> Hw4R { - Hw4R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> HW4_R { + HW4_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> Hw5R { - Hw5R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> HW5_R { + HW5_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> Hw6R { - Hw6R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> HW6_R { + HW6_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> Hw7R { - Hw7R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> HW7_R { + HW7_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> Hw8R { - Hw8R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> HW8_R { + HW8_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> Hw9R { - Hw9R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> HW9_R { + HW9_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> Hw10R { - Hw10R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> HW10_R { + HW10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> Hw11R { - Hw11R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> HW11_R { + HW11_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> Hw12R { - Hw12R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> HW12_R { + HW12_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> Hw13R { - Hw13R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> HW13_R { + HW13_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> Hw14R { - Hw14R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> HW14_R { + HW14_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> Hw15R { - Hw15R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> HW15_R { + HW15_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> Hw0W { - Hw0W::new(self, 0) + pub fn hw0(&mut self) -> HW0_W { + HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> Hw1W { - Hw1W::new(self, 2) + pub fn hw1(&mut self) -> HW1_W { + HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> Hw2W { - Hw2W::new(self, 4) + pub fn hw2(&mut self) -> HW2_W { + HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> Hw3W { - Hw3W::new(self, 6) + pub fn hw3(&mut self) -> HW3_W { + HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> Hw4W { - Hw4W::new(self, 8) + pub fn hw4(&mut self) -> HW4_W { + HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> Hw5W { - Hw5W::new(self, 10) + pub fn hw5(&mut self) -> HW5_W { + HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> Hw6W { - Hw6W::new(self, 12) + pub fn hw6(&mut self) -> HW6_W { + HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> Hw7W { - Hw7W::new(self, 14) + pub fn hw7(&mut self) -> HW7_W { + HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> Hw8W { - Hw8W::new(self, 16) + pub fn hw8(&mut self) -> HW8_W { + HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> Hw9W { - Hw9W::new(self, 18) + pub fn hw9(&mut self) -> HW9_W { + HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> Hw10W { - Hw10W::new(self, 20) + pub fn hw10(&mut self) -> HW10_W { + HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> Hw11W { - Hw11W::new(self, 22) + pub fn hw11(&mut self) -> HW11_W { + HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> Hw12W { - Hw12W::new(self, 24) + pub fn hw12(&mut self) -> HW12_W { + HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> Hw13W { - Hw13W::new(self, 26) + pub fn hw13(&mut self) -> HW13_W { + HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> Hw14W { - Hw14W::new(self, 28) + pub fn hw14(&mut self) -> HW14_W { + HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> Hw15W { - Hw15W::new(self, 30) + pub fn hw15(&mut self) -> HW15_W { + HW15_W::new(self, 30) } } #[doc = "Port 1 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HwselSpec; -impl crate::RegisterSpec for HwselSpec { +pub struct HWSEL_SPEC; +impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HwselSpec {} +impl crate::Readable for HWSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HwselSpec { +impl crate::Writable for HWSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HwselSpec { +impl crate::Resettable for HWSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/in_.rs b/src/port1/in_.rs index ea1dadc5..c41c6035 100644 --- a/src/port1/in_.rs +++ b/src/port1/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 1 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for InSpec {} +impl crate::Readable for IN_SPEC {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr0.rs b/src/port1/iocr0.rs index 3114b910..8e9b19af 100644 --- a/src/port1/iocr0.rs +++ b/src/port1/iocr0.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc0 { +pub enum PC0_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc0) -> Self { + fn from(variant: PC0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc0 { +impl crate::FieldSpec for PC0_A { type Ux = u8; } -impl crate::IsEnum for Pc0 {} +impl crate::IsEnum for PC0_A {} #[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc0R = crate::FieldReader; -impl Pc0R { +pub type PC0_R = crate::FieldReader; +impl PC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc0::Value1), - 1 => Some(Pc0::Value2), - 2 => Some(Pc0::Value3), - 3 => Some(Pc0::Value4), - 4 => Some(Pc0::Value5), - 5 => Some(Pc0::Value6), - 6 => Some(Pc0::Value7), - 7 => Some(Pc0::Value8), - 16 => Some(Pc0::Value9), - 17 => Some(Pc0::Value10), - 18 => Some(Pc0::Value11), - 19 => Some(Pc0::Value12), - 20 => Some(Pc0::Value13), - 24 => Some(Pc0::Value14), - 25 => Some(Pc0::Value15), - 26 => Some(Pc0::Value16), - 27 => Some(Pc0::Value17), - 28 => Some(Pc0::Value18), + 0 => Some(PC0_A::VALUE1), + 1 => Some(PC0_A::VALUE2), + 2 => Some(PC0_A::VALUE3), + 3 => Some(PC0_A::VALUE4), + 4 => Some(PC0_A::VALUE5), + 5 => Some(PC0_A::VALUE6), + 6 => Some(PC0_A::VALUE7), + 7 => Some(PC0_A::VALUE8), + 16 => Some(PC0_A::VALUE9), + 17 => Some(PC0_A::VALUE10), + 18 => Some(PC0_A::VALUE11), + 19 => Some(PC0_A::VALUE12), + 20 => Some(PC0_A::VALUE13), + 24 => Some(PC0_A::VALUE14), + 25 => Some(PC0_A::VALUE15), + 26 => Some(PC0_A::VALUE16), + 27 => Some(PC0_A::VALUE17), + 28 => Some(PC0_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc0::Value1 + *self == PC0_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc0::Value2 + *self == PC0_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc0::Value3 + *self == PC0_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc0::Value4 + *self == PC0_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc0::Value5 + *self == PC0_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc0::Value6 + *self == PC0_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc0::Value7 + *self == PC0_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc0::Value8 + *self == PC0_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc0::Value9 + *self == PC0_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc0::Value10 + *self == PC0_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc0::Value11 + *self == PC0_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc0::Value12 + *self == PC0_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc0::Value13 + *self == PC0_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc0::Value14 + *self == PC0_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc0::Value15 + *self == PC0_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc0::Value16 + *self == PC0_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc0::Value17 + *self == PC0_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc0::Value18 + *self == PC0_A::VALUE18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; -impl<'a, REG> Pc0W<'a, REG> +pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; +impl<'a, REG> PC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc0::Value1) + self.variant(PC0_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc0::Value2) + self.variant(PC0_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc0::Value3) + self.variant(PC0_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc0::Value4) + self.variant(PC0_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc0::Value5) + self.variant(PC0_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc0::Value6) + self.variant(PC0_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc0::Value7) + self.variant(PC0_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc0::Value8) + self.variant(PC0_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc0::Value9) + self.variant(PC0_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc0::Value10) + self.variant(PC0_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc0::Value11) + self.variant(PC0_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc0::Value12) + self.variant(PC0_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc0::Value13) + self.variant(PC0_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc0::Value14) + self.variant(PC0_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc0::Value15) + self.variant(PC0_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc0::Value16) + self.variant(PC0_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc0::Value17) + self.variant(PC0_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc0::Value18) + self.variant(PC0_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc1 { +pub enum PC1_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc1) -> Self { + fn from(variant: PC1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc1 { +impl crate::FieldSpec for PC1_A { type Ux = u8; } -impl crate::IsEnum for Pc1 {} +impl crate::IsEnum for PC1_A {} #[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc1R = crate::FieldReader; -impl Pc1R { +pub type PC1_R = crate::FieldReader; +impl PC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc1::Value1), - 1 => Some(Pc1::Value2), - 2 => Some(Pc1::Value3), - 3 => Some(Pc1::Value4), - 4 => Some(Pc1::Value5), - 5 => Some(Pc1::Value6), - 6 => Some(Pc1::Value7), - 7 => Some(Pc1::Value8), - 16 => Some(Pc1::Value9), - 17 => Some(Pc1::Value10), - 18 => Some(Pc1::Value11), - 19 => Some(Pc1::Value12), - 20 => Some(Pc1::Value13), - 24 => Some(Pc1::Value14), - 25 => Some(Pc1::Value15), - 26 => Some(Pc1::Value16), - 27 => Some(Pc1::Value17), - 28 => Some(Pc1::Value18), + 0 => Some(PC1_A::VALUE1), + 1 => Some(PC1_A::VALUE2), + 2 => Some(PC1_A::VALUE3), + 3 => Some(PC1_A::VALUE4), + 4 => Some(PC1_A::VALUE5), + 5 => Some(PC1_A::VALUE6), + 6 => Some(PC1_A::VALUE7), + 7 => Some(PC1_A::VALUE8), + 16 => Some(PC1_A::VALUE9), + 17 => Some(PC1_A::VALUE10), + 18 => Some(PC1_A::VALUE11), + 19 => Some(PC1_A::VALUE12), + 20 => Some(PC1_A::VALUE13), + 24 => Some(PC1_A::VALUE14), + 25 => Some(PC1_A::VALUE15), + 26 => Some(PC1_A::VALUE16), + 27 => Some(PC1_A::VALUE17), + 28 => Some(PC1_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc1::Value1 + *self == PC1_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc1::Value2 + *self == PC1_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc1::Value3 + *self == PC1_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc1::Value4 + *self == PC1_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc1::Value5 + *self == PC1_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc1::Value6 + *self == PC1_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc1::Value7 + *self == PC1_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc1::Value8 + *self == PC1_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc1::Value9 + *self == PC1_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc1::Value10 + *self == PC1_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc1::Value11 + *self == PC1_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc1::Value12 + *self == PC1_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc1::Value13 + *self == PC1_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc1::Value14 + *self == PC1_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc1::Value15 + *self == PC1_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc1::Value16 + *self == PC1_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc1::Value17 + *self == PC1_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc1::Value18 + *self == PC1_A::VALUE18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; -impl<'a, REG> Pc1W<'a, REG> +pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; +impl<'a, REG> PC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc1::Value1) + self.variant(PC1_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc1::Value2) + self.variant(PC1_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc1::Value3) + self.variant(PC1_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc1::Value4) + self.variant(PC1_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc1::Value5) + self.variant(PC1_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc1::Value6) + self.variant(PC1_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc1::Value7) + self.variant(PC1_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc1::Value8) + self.variant(PC1_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc1::Value9) + self.variant(PC1_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc1::Value10) + self.variant(PC1_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc1::Value11) + self.variant(PC1_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc1::Value12) + self.variant(PC1_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc1::Value13) + self.variant(PC1_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc1::Value14) + self.variant(PC1_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc1::Value15) + self.variant(PC1_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc1::Value16) + self.variant(PC1_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc1::Value17) + self.variant(PC1_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc1::Value18) + self.variant(PC1_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc2 { +pub enum PC2_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc2) -> Self { + fn from(variant: PC2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc2 { +impl crate::FieldSpec for PC2_A { type Ux = u8; } -impl crate::IsEnum for Pc2 {} +impl crate::IsEnum for PC2_A {} #[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc2R = crate::FieldReader; -impl Pc2R { +pub type PC2_R = crate::FieldReader; +impl PC2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc2::Value1), - 1 => Some(Pc2::Value2), - 2 => Some(Pc2::Value3), - 3 => Some(Pc2::Value4), - 4 => Some(Pc2::Value5), - 5 => Some(Pc2::Value6), - 6 => Some(Pc2::Value7), - 7 => Some(Pc2::Value8), - 16 => Some(Pc2::Value9), - 17 => Some(Pc2::Value10), - 18 => Some(Pc2::Value11), - 19 => Some(Pc2::Value12), - 20 => Some(Pc2::Value13), - 24 => Some(Pc2::Value14), - 25 => Some(Pc2::Value15), - 26 => Some(Pc2::Value16), - 27 => Some(Pc2::Value17), - 28 => Some(Pc2::Value18), + 0 => Some(PC2_A::VALUE1), + 1 => Some(PC2_A::VALUE2), + 2 => Some(PC2_A::VALUE3), + 3 => Some(PC2_A::VALUE4), + 4 => Some(PC2_A::VALUE5), + 5 => Some(PC2_A::VALUE6), + 6 => Some(PC2_A::VALUE7), + 7 => Some(PC2_A::VALUE8), + 16 => Some(PC2_A::VALUE9), + 17 => Some(PC2_A::VALUE10), + 18 => Some(PC2_A::VALUE11), + 19 => Some(PC2_A::VALUE12), + 20 => Some(PC2_A::VALUE13), + 24 => Some(PC2_A::VALUE14), + 25 => Some(PC2_A::VALUE15), + 26 => Some(PC2_A::VALUE16), + 27 => Some(PC2_A::VALUE17), + 28 => Some(PC2_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc2::Value1 + *self == PC2_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc2::Value2 + *self == PC2_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc2::Value3 + *self == PC2_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc2::Value4 + *self == PC2_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc2::Value5 + *self == PC2_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc2::Value6 + *self == PC2_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc2::Value7 + *self == PC2_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc2::Value8 + *self == PC2_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc2::Value9 + *self == PC2_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc2::Value10 + *self == PC2_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc2::Value11 + *self == PC2_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc2::Value12 + *self == PC2_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc2::Value13 + *self == PC2_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc2::Value14 + *self == PC2_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc2::Value15 + *self == PC2_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc2::Value16 + *self == PC2_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc2::Value17 + *self == PC2_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc2::Value18 + *self == PC2_A::VALUE18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; -impl<'a, REG> Pc2W<'a, REG> +pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; +impl<'a, REG> PC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc2::Value1) + self.variant(PC2_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc2::Value2) + self.variant(PC2_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc2::Value3) + self.variant(PC2_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc2::Value4) + self.variant(PC2_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc2::Value5) + self.variant(PC2_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc2::Value6) + self.variant(PC2_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc2::Value7) + self.variant(PC2_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc2::Value8) + self.variant(PC2_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc2::Value9) + self.variant(PC2_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc2::Value10) + self.variant(PC2_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc2::Value11) + self.variant(PC2_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc2::Value12) + self.variant(PC2_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc2::Value13) + self.variant(PC2_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc2::Value14) + self.variant(PC2_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc2::Value15) + self.variant(PC2_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc2::Value16) + self.variant(PC2_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc2::Value17) + self.variant(PC2_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc2::Value18) + self.variant(PC2_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc3 { +pub enum PC3_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc3) -> Self { + fn from(variant: PC3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc3 { +impl crate::FieldSpec for PC3_A { type Ux = u8; } -impl crate::IsEnum for Pc3 {} +impl crate::IsEnum for PC3_A {} #[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc3R = crate::FieldReader; -impl Pc3R { +pub type PC3_R = crate::FieldReader; +impl PC3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc3::Value1), - 1 => Some(Pc3::Value2), - 2 => Some(Pc3::Value3), - 3 => Some(Pc3::Value4), - 4 => Some(Pc3::Value5), - 5 => Some(Pc3::Value6), - 6 => Some(Pc3::Value7), - 7 => Some(Pc3::Value8), - 16 => Some(Pc3::Value9), - 17 => Some(Pc3::Value10), - 18 => Some(Pc3::Value11), - 19 => Some(Pc3::Value12), - 20 => Some(Pc3::Value13), - 24 => Some(Pc3::Value14), - 25 => Some(Pc3::Value15), - 26 => Some(Pc3::Value16), - 27 => Some(Pc3::Value17), - 28 => Some(Pc3::Value18), + 0 => Some(PC3_A::VALUE1), + 1 => Some(PC3_A::VALUE2), + 2 => Some(PC3_A::VALUE3), + 3 => Some(PC3_A::VALUE4), + 4 => Some(PC3_A::VALUE5), + 5 => Some(PC3_A::VALUE6), + 6 => Some(PC3_A::VALUE7), + 7 => Some(PC3_A::VALUE8), + 16 => Some(PC3_A::VALUE9), + 17 => Some(PC3_A::VALUE10), + 18 => Some(PC3_A::VALUE11), + 19 => Some(PC3_A::VALUE12), + 20 => Some(PC3_A::VALUE13), + 24 => Some(PC3_A::VALUE14), + 25 => Some(PC3_A::VALUE15), + 26 => Some(PC3_A::VALUE16), + 27 => Some(PC3_A::VALUE17), + 28 => Some(PC3_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc3::Value1 + *self == PC3_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc3::Value2 + *self == PC3_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc3::Value3 + *self == PC3_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc3::Value4 + *self == PC3_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc3::Value5 + *self == PC3_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc3::Value6 + *self == PC3_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc3::Value7 + *self == PC3_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc3::Value8 + *self == PC3_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc3::Value9 + *self == PC3_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc3::Value10 + *self == PC3_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc3::Value11 + *self == PC3_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc3::Value12 + *self == PC3_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc3::Value13 + *self == PC3_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc3::Value14 + *self == PC3_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc3::Value15 + *self == PC3_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc3::Value16 + *self == PC3_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc3::Value17 + *self == PC3_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc3::Value18 + *self == PC3_A::VALUE18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; -impl<'a, REG> Pc3W<'a, REG> +pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; +impl<'a, REG> PC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc3::Value1) + self.variant(PC3_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc3::Value2) + self.variant(PC3_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc3::Value3) + self.variant(PC3_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc3::Value4) + self.variant(PC3_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc3::Value5) + self.variant(PC3_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc3::Value6) + self.variant(PC3_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc3::Value7) + self.variant(PC3_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc3::Value8) + self.variant(PC3_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc3::Value9) + self.variant(PC3_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc3::Value10) + self.variant(PC3_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc3::Value11) + self.variant(PC3_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc3::Value12) + self.variant(PC3_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc3::Value13) + self.variant(PC3_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc3::Value14) + self.variant(PC3_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc3::Value15) + self.variant(PC3_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc3::Value16) + self.variant(PC3_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc3::Value17) + self.variant(PC3_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc3::Value18) + self.variant(PC3_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> Pc0R { - Pc0R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> PC0_R { + PC0_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> Pc1R { - Pc1R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> PC1_R { + PC1_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> Pc2R { - Pc2R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> PC2_R { + PC2_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> Pc3R { - Pc3R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> PC3_R { + PC3_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> Pc0W { - Pc0W::new(self, 3) + pub fn pc0(&mut self) -> PC0_W { + PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> Pc1W { - Pc1W::new(self, 11) + pub fn pc1(&mut self) -> PC1_W { + PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> Pc2W { - Pc2W::new(self, 19) + pub fn pc2(&mut self) -> PC2_W { + PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> Pc3W { - Pc3W::new(self, 27) + pub fn pc3(&mut self) -> PC3_W { + PC3_W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr0Spec; -impl crate::RegisterSpec for Iocr0Spec { +pub struct IOCR0_SPEC; +impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for Iocr0Spec {} +impl crate::Readable for IOCR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for Iocr0Spec { +impl crate::Writable for IOCR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for Iocr0Spec { +impl crate::Resettable for IOCR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr12.rs b/src/port1/iocr12.rs index 4d91d049..d4e55b43 100644 --- a/src/port1/iocr12.rs +++ b/src/port1/iocr12.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc12 { +pub enum PC12_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc12) -> Self { + fn from(variant: PC12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc12 { +impl crate::FieldSpec for PC12_A { type Ux = u8; } -impl crate::IsEnum for Pc12 {} +impl crate::IsEnum for PC12_A {} #[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc12R = crate::FieldReader; -impl Pc12R { +pub type PC12_R = crate::FieldReader; +impl PC12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc12::Value1), - 1 => Some(Pc12::Value2), - 2 => Some(Pc12::Value3), - 3 => Some(Pc12::Value4), - 4 => Some(Pc12::Value5), - 5 => Some(Pc12::Value6), - 6 => Some(Pc12::Value7), - 7 => Some(Pc12::Value8), - 16 => Some(Pc12::Value9), - 17 => Some(Pc12::Value10), - 18 => Some(Pc12::Value11), - 19 => Some(Pc12::Value12), - 20 => Some(Pc12::Value13), - 24 => Some(Pc12::Value14), - 25 => Some(Pc12::Value15), - 26 => Some(Pc12::Value16), - 27 => Some(Pc12::Value17), - 28 => Some(Pc12::Value18), + 0 => Some(PC12_A::VALUE1), + 1 => Some(PC12_A::VALUE2), + 2 => Some(PC12_A::VALUE3), + 3 => Some(PC12_A::VALUE4), + 4 => Some(PC12_A::VALUE5), + 5 => Some(PC12_A::VALUE6), + 6 => Some(PC12_A::VALUE7), + 7 => Some(PC12_A::VALUE8), + 16 => Some(PC12_A::VALUE9), + 17 => Some(PC12_A::VALUE10), + 18 => Some(PC12_A::VALUE11), + 19 => Some(PC12_A::VALUE12), + 20 => Some(PC12_A::VALUE13), + 24 => Some(PC12_A::VALUE14), + 25 => Some(PC12_A::VALUE15), + 26 => Some(PC12_A::VALUE16), + 27 => Some(PC12_A::VALUE17), + 28 => Some(PC12_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc12::Value1 + *self == PC12_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc12::Value2 + *self == PC12_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc12::Value3 + *self == PC12_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc12::Value4 + *self == PC12_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc12::Value5 + *self == PC12_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc12::Value6 + *self == PC12_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc12::Value7 + *self == PC12_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc12::Value8 + *self == PC12_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc12::Value9 + *self == PC12_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc12::Value10 + *self == PC12_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc12::Value11 + *self == PC12_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc12::Value12 + *self == PC12_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc12::Value13 + *self == PC12_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc12::Value14 + *self == PC12_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc12::Value15 + *self == PC12_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc12::Value16 + *self == PC12_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc12::Value17 + *self == PC12_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc12::Value18 + *self == PC12_A::VALUE18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; -impl<'a, REG> Pc12W<'a, REG> +pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; +impl<'a, REG> PC12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc12::Value1) + self.variant(PC12_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc12::Value2) + self.variant(PC12_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc12::Value3) + self.variant(PC12_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc12::Value4) + self.variant(PC12_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc12::Value5) + self.variant(PC12_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc12::Value6) + self.variant(PC12_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc12::Value7) + self.variant(PC12_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc12::Value8) + self.variant(PC12_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc12::Value9) + self.variant(PC12_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc12::Value10) + self.variant(PC12_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc12::Value11) + self.variant(PC12_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc12::Value12) + self.variant(PC12_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc12::Value13) + self.variant(PC12_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc12::Value14) + self.variant(PC12_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc12::Value15) + self.variant(PC12_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc12::Value16) + self.variant(PC12_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc12::Value17) + self.variant(PC12_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc12::Value18) + self.variant(PC12_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc13 { +pub enum PC13_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc13) -> Self { + fn from(variant: PC13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc13 { +impl crate::FieldSpec for PC13_A { type Ux = u8; } -impl crate::IsEnum for Pc13 {} +impl crate::IsEnum for PC13_A {} #[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc13R = crate::FieldReader; -impl Pc13R { +pub type PC13_R = crate::FieldReader; +impl PC13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc13::Value1), - 1 => Some(Pc13::Value2), - 2 => Some(Pc13::Value3), - 3 => Some(Pc13::Value4), - 4 => Some(Pc13::Value5), - 5 => Some(Pc13::Value6), - 6 => Some(Pc13::Value7), - 7 => Some(Pc13::Value8), - 16 => Some(Pc13::Value9), - 17 => Some(Pc13::Value10), - 18 => Some(Pc13::Value11), - 19 => Some(Pc13::Value12), - 20 => Some(Pc13::Value13), - 24 => Some(Pc13::Value14), - 25 => Some(Pc13::Value15), - 26 => Some(Pc13::Value16), - 27 => Some(Pc13::Value17), - 28 => Some(Pc13::Value18), + 0 => Some(PC13_A::VALUE1), + 1 => Some(PC13_A::VALUE2), + 2 => Some(PC13_A::VALUE3), + 3 => Some(PC13_A::VALUE4), + 4 => Some(PC13_A::VALUE5), + 5 => Some(PC13_A::VALUE6), + 6 => Some(PC13_A::VALUE7), + 7 => Some(PC13_A::VALUE8), + 16 => Some(PC13_A::VALUE9), + 17 => Some(PC13_A::VALUE10), + 18 => Some(PC13_A::VALUE11), + 19 => Some(PC13_A::VALUE12), + 20 => Some(PC13_A::VALUE13), + 24 => Some(PC13_A::VALUE14), + 25 => Some(PC13_A::VALUE15), + 26 => Some(PC13_A::VALUE16), + 27 => Some(PC13_A::VALUE17), + 28 => Some(PC13_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc13::Value1 + *self == PC13_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc13::Value2 + *self == PC13_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc13::Value3 + *self == PC13_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc13::Value4 + *self == PC13_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc13::Value5 + *self == PC13_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc13::Value6 + *self == PC13_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc13::Value7 + *self == PC13_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc13::Value8 + *self == PC13_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc13::Value9 + *self == PC13_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc13::Value10 + *self == PC13_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc13::Value11 + *self == PC13_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc13::Value12 + *self == PC13_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc13::Value13 + *self == PC13_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc13::Value14 + *self == PC13_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc13::Value15 + *self == PC13_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc13::Value16 + *self == PC13_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc13::Value17 + *self == PC13_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc13::Value18 + *self == PC13_A::VALUE18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; -impl<'a, REG> Pc13W<'a, REG> +pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; +impl<'a, REG> PC13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc13::Value1) + self.variant(PC13_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc13::Value2) + self.variant(PC13_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc13::Value3) + self.variant(PC13_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc13::Value4) + self.variant(PC13_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc13::Value5) + self.variant(PC13_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc13::Value6) + self.variant(PC13_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc13::Value7) + self.variant(PC13_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc13::Value8) + self.variant(PC13_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc13::Value9) + self.variant(PC13_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc13::Value10) + self.variant(PC13_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc13::Value11) + self.variant(PC13_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc13::Value12) + self.variant(PC13_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc13::Value13) + self.variant(PC13_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc13::Value14) + self.variant(PC13_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc13::Value15) + self.variant(PC13_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc13::Value16) + self.variant(PC13_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc13::Value17) + self.variant(PC13_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc13::Value18) + self.variant(PC13_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc14 { +pub enum PC14_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc14) -> Self { + fn from(variant: PC14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc14 { +impl crate::FieldSpec for PC14_A { type Ux = u8; } -impl crate::IsEnum for Pc14 {} +impl crate::IsEnum for PC14_A {} #[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc14R = crate::FieldReader; -impl Pc14R { +pub type PC14_R = crate::FieldReader; +impl PC14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc14::Value1), - 1 => Some(Pc14::Value2), - 2 => Some(Pc14::Value3), - 3 => Some(Pc14::Value4), - 4 => Some(Pc14::Value5), - 5 => Some(Pc14::Value6), - 6 => Some(Pc14::Value7), - 7 => Some(Pc14::Value8), - 16 => Some(Pc14::Value9), - 17 => Some(Pc14::Value10), - 18 => Some(Pc14::Value11), - 19 => Some(Pc14::Value12), - 20 => Some(Pc14::Value13), - 24 => Some(Pc14::Value14), - 25 => Some(Pc14::Value15), - 26 => Some(Pc14::Value16), - 27 => Some(Pc14::Value17), - 28 => Some(Pc14::Value18), + 0 => Some(PC14_A::VALUE1), + 1 => Some(PC14_A::VALUE2), + 2 => Some(PC14_A::VALUE3), + 3 => Some(PC14_A::VALUE4), + 4 => Some(PC14_A::VALUE5), + 5 => Some(PC14_A::VALUE6), + 6 => Some(PC14_A::VALUE7), + 7 => Some(PC14_A::VALUE8), + 16 => Some(PC14_A::VALUE9), + 17 => Some(PC14_A::VALUE10), + 18 => Some(PC14_A::VALUE11), + 19 => Some(PC14_A::VALUE12), + 20 => Some(PC14_A::VALUE13), + 24 => Some(PC14_A::VALUE14), + 25 => Some(PC14_A::VALUE15), + 26 => Some(PC14_A::VALUE16), + 27 => Some(PC14_A::VALUE17), + 28 => Some(PC14_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc14::Value1 + *self == PC14_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc14::Value2 + *self == PC14_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc14::Value3 + *self == PC14_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc14::Value4 + *self == PC14_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc14::Value5 + *self == PC14_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc14::Value6 + *self == PC14_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc14::Value7 + *self == PC14_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc14::Value8 + *self == PC14_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc14::Value9 + *self == PC14_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc14::Value10 + *self == PC14_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc14::Value11 + *self == PC14_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc14::Value12 + *self == PC14_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc14::Value13 + *self == PC14_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc14::Value14 + *self == PC14_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc14::Value15 + *self == PC14_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc14::Value16 + *self == PC14_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc14::Value17 + *self == PC14_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc14::Value18 + *self == PC14_A::VALUE18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; -impl<'a, REG> Pc14W<'a, REG> +pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; +impl<'a, REG> PC14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc14::Value1) + self.variant(PC14_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc14::Value2) + self.variant(PC14_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc14::Value3) + self.variant(PC14_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc14::Value4) + self.variant(PC14_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc14::Value5) + self.variant(PC14_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc14::Value6) + self.variant(PC14_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc14::Value7) + self.variant(PC14_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc14::Value8) + self.variant(PC14_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc14::Value9) + self.variant(PC14_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc14::Value10) + self.variant(PC14_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc14::Value11) + self.variant(PC14_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc14::Value12) + self.variant(PC14_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc14::Value13) + self.variant(PC14_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc14::Value14) + self.variant(PC14_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc14::Value15) + self.variant(PC14_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc14::Value16) + self.variant(PC14_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc14::Value17) + self.variant(PC14_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc14::Value18) + self.variant(PC14_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc15 { +pub enum PC15_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc15) -> Self { + fn from(variant: PC15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc15 { +impl crate::FieldSpec for PC15_A { type Ux = u8; } -impl crate::IsEnum for Pc15 {} +impl crate::IsEnum for PC15_A {} #[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc15R = crate::FieldReader; -impl Pc15R { +pub type PC15_R = crate::FieldReader; +impl PC15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc15::Value1), - 1 => Some(Pc15::Value2), - 2 => Some(Pc15::Value3), - 3 => Some(Pc15::Value4), - 4 => Some(Pc15::Value5), - 5 => Some(Pc15::Value6), - 6 => Some(Pc15::Value7), - 7 => Some(Pc15::Value8), - 16 => Some(Pc15::Value9), - 17 => Some(Pc15::Value10), - 18 => Some(Pc15::Value11), - 19 => Some(Pc15::Value12), - 20 => Some(Pc15::Value13), - 24 => Some(Pc15::Value14), - 25 => Some(Pc15::Value15), - 26 => Some(Pc15::Value16), - 27 => Some(Pc15::Value17), - 28 => Some(Pc15::Value18), + 0 => Some(PC15_A::VALUE1), + 1 => Some(PC15_A::VALUE2), + 2 => Some(PC15_A::VALUE3), + 3 => Some(PC15_A::VALUE4), + 4 => Some(PC15_A::VALUE5), + 5 => Some(PC15_A::VALUE6), + 6 => Some(PC15_A::VALUE7), + 7 => Some(PC15_A::VALUE8), + 16 => Some(PC15_A::VALUE9), + 17 => Some(PC15_A::VALUE10), + 18 => Some(PC15_A::VALUE11), + 19 => Some(PC15_A::VALUE12), + 20 => Some(PC15_A::VALUE13), + 24 => Some(PC15_A::VALUE14), + 25 => Some(PC15_A::VALUE15), + 26 => Some(PC15_A::VALUE16), + 27 => Some(PC15_A::VALUE17), + 28 => Some(PC15_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc15::Value1 + *self == PC15_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc15::Value2 + *self == PC15_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc15::Value3 + *self == PC15_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc15::Value4 + *self == PC15_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc15::Value5 + *self == PC15_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc15::Value6 + *self == PC15_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc15::Value7 + *self == PC15_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc15::Value8 + *self == PC15_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc15::Value9 + *self == PC15_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc15::Value10 + *self == PC15_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc15::Value11 + *self == PC15_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc15::Value12 + *self == PC15_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc15::Value13 + *self == PC15_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc15::Value14 + *self == PC15_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc15::Value15 + *self == PC15_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc15::Value16 + *self == PC15_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc15::Value17 + *self == PC15_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc15::Value18 + *self == PC15_A::VALUE18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; -impl<'a, REG> Pc15W<'a, REG> +pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; +impl<'a, REG> PC15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc15::Value1) + self.variant(PC15_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc15::Value2) + self.variant(PC15_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc15::Value3) + self.variant(PC15_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc15::Value4) + self.variant(PC15_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc15::Value5) + self.variant(PC15_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc15::Value6) + self.variant(PC15_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc15::Value7) + self.variant(PC15_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc15::Value8) + self.variant(PC15_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc15::Value9) + self.variant(PC15_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc15::Value10) + self.variant(PC15_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc15::Value11) + self.variant(PC15_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc15::Value12) + self.variant(PC15_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc15::Value13) + self.variant(PC15_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc15::Value14) + self.variant(PC15_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc15::Value15) + self.variant(PC15_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc15::Value16) + self.variant(PC15_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc15::Value17) + self.variant(PC15_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc15::Value18) + self.variant(PC15_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> Pc12R { - Pc12R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> PC12_R { + PC12_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> Pc13R { - Pc13R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> PC13_R { + PC13_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> Pc14R { - Pc14R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> PC14_R { + PC14_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> Pc15R { - Pc15R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> PC15_R { + PC15_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> Pc12W { - Pc12W::new(self, 3) + pub fn pc12(&mut self) -> PC12_W { + PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> Pc13W { - Pc13W::new(self, 11) + pub fn pc13(&mut self) -> PC13_W { + PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> Pc14W { - Pc14W::new(self, 19) + pub fn pc14(&mut self) -> PC14_W { + PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> Pc15W { - Pc15W::new(self, 27) + pub fn pc15(&mut self) -> PC15_W { + PC15_W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr12Spec; -impl crate::RegisterSpec for Iocr12Spec { +pub struct IOCR12_SPEC; +impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for Iocr12Spec {} +impl crate::Readable for IOCR12_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for Iocr12Spec { +impl crate::Writable for IOCR12_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for Iocr12Spec { +impl crate::Resettable for IOCR12_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr4.rs b/src/port1/iocr4.rs index a28df82f..098589b3 100644 --- a/src/port1/iocr4.rs +++ b/src/port1/iocr4.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc4 { +pub enum PC4_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc4) -> Self { + fn from(variant: PC4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc4 { +impl crate::FieldSpec for PC4_A { type Ux = u8; } -impl crate::IsEnum for Pc4 {} +impl crate::IsEnum for PC4_A {} #[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc4R = crate::FieldReader; -impl Pc4R { +pub type PC4_R = crate::FieldReader; +impl PC4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc4::Value1), - 1 => Some(Pc4::Value2), - 2 => Some(Pc4::Value3), - 3 => Some(Pc4::Value4), - 4 => Some(Pc4::Value5), - 5 => Some(Pc4::Value6), - 6 => Some(Pc4::Value7), - 7 => Some(Pc4::Value8), - 16 => Some(Pc4::Value9), - 17 => Some(Pc4::Value10), - 18 => Some(Pc4::Value11), - 19 => Some(Pc4::Value12), - 20 => Some(Pc4::Value13), - 24 => Some(Pc4::Value14), - 25 => Some(Pc4::Value15), - 26 => Some(Pc4::Value16), - 27 => Some(Pc4::Value17), - 28 => Some(Pc4::Value18), + 0 => Some(PC4_A::VALUE1), + 1 => Some(PC4_A::VALUE2), + 2 => Some(PC4_A::VALUE3), + 3 => Some(PC4_A::VALUE4), + 4 => Some(PC4_A::VALUE5), + 5 => Some(PC4_A::VALUE6), + 6 => Some(PC4_A::VALUE7), + 7 => Some(PC4_A::VALUE8), + 16 => Some(PC4_A::VALUE9), + 17 => Some(PC4_A::VALUE10), + 18 => Some(PC4_A::VALUE11), + 19 => Some(PC4_A::VALUE12), + 20 => Some(PC4_A::VALUE13), + 24 => Some(PC4_A::VALUE14), + 25 => Some(PC4_A::VALUE15), + 26 => Some(PC4_A::VALUE16), + 27 => Some(PC4_A::VALUE17), + 28 => Some(PC4_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc4::Value1 + *self == PC4_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc4::Value2 + *self == PC4_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc4::Value3 + *self == PC4_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc4::Value4 + *self == PC4_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc4::Value5 + *self == PC4_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc4::Value6 + *self == PC4_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc4::Value7 + *self == PC4_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc4::Value8 + *self == PC4_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc4::Value9 + *self == PC4_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc4::Value10 + *self == PC4_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc4::Value11 + *self == PC4_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc4::Value12 + *self == PC4_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc4::Value13 + *self == PC4_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc4::Value14 + *self == PC4_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc4::Value15 + *self == PC4_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc4::Value16 + *self == PC4_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc4::Value17 + *self == PC4_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc4::Value18 + *self == PC4_A::VALUE18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; -impl<'a, REG> Pc4W<'a, REG> +pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; +impl<'a, REG> PC4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc4::Value1) + self.variant(PC4_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc4::Value2) + self.variant(PC4_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc4::Value3) + self.variant(PC4_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc4::Value4) + self.variant(PC4_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc4::Value5) + self.variant(PC4_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc4::Value6) + self.variant(PC4_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc4::Value7) + self.variant(PC4_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc4::Value8) + self.variant(PC4_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc4::Value9) + self.variant(PC4_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc4::Value10) + self.variant(PC4_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc4::Value11) + self.variant(PC4_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc4::Value12) + self.variant(PC4_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc4::Value13) + self.variant(PC4_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc4::Value14) + self.variant(PC4_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc4::Value15) + self.variant(PC4_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc4::Value16) + self.variant(PC4_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc4::Value17) + self.variant(PC4_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc4::Value18) + self.variant(PC4_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc5 { +pub enum PC5_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc5) -> Self { + fn from(variant: PC5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc5 { +impl crate::FieldSpec for PC5_A { type Ux = u8; } -impl crate::IsEnum for Pc5 {} +impl crate::IsEnum for PC5_A {} #[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc5R = crate::FieldReader; -impl Pc5R { +pub type PC5_R = crate::FieldReader; +impl PC5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc5::Value1), - 1 => Some(Pc5::Value2), - 2 => Some(Pc5::Value3), - 3 => Some(Pc5::Value4), - 4 => Some(Pc5::Value5), - 5 => Some(Pc5::Value6), - 6 => Some(Pc5::Value7), - 7 => Some(Pc5::Value8), - 16 => Some(Pc5::Value9), - 17 => Some(Pc5::Value10), - 18 => Some(Pc5::Value11), - 19 => Some(Pc5::Value12), - 20 => Some(Pc5::Value13), - 24 => Some(Pc5::Value14), - 25 => Some(Pc5::Value15), - 26 => Some(Pc5::Value16), - 27 => Some(Pc5::Value17), - 28 => Some(Pc5::Value18), + 0 => Some(PC5_A::VALUE1), + 1 => Some(PC5_A::VALUE2), + 2 => Some(PC5_A::VALUE3), + 3 => Some(PC5_A::VALUE4), + 4 => Some(PC5_A::VALUE5), + 5 => Some(PC5_A::VALUE6), + 6 => Some(PC5_A::VALUE7), + 7 => Some(PC5_A::VALUE8), + 16 => Some(PC5_A::VALUE9), + 17 => Some(PC5_A::VALUE10), + 18 => Some(PC5_A::VALUE11), + 19 => Some(PC5_A::VALUE12), + 20 => Some(PC5_A::VALUE13), + 24 => Some(PC5_A::VALUE14), + 25 => Some(PC5_A::VALUE15), + 26 => Some(PC5_A::VALUE16), + 27 => Some(PC5_A::VALUE17), + 28 => Some(PC5_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc5::Value1 + *self == PC5_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc5::Value2 + *self == PC5_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc5::Value3 + *self == PC5_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc5::Value4 + *self == PC5_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc5::Value5 + *self == PC5_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc5::Value6 + *self == PC5_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc5::Value7 + *self == PC5_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc5::Value8 + *self == PC5_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc5::Value9 + *self == PC5_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc5::Value10 + *self == PC5_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc5::Value11 + *self == PC5_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc5::Value12 + *self == PC5_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc5::Value13 + *self == PC5_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc5::Value14 + *self == PC5_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc5::Value15 + *self == PC5_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc5::Value16 + *self == PC5_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc5::Value17 + *self == PC5_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc5::Value18 + *self == PC5_A::VALUE18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; -impl<'a, REG> Pc5W<'a, REG> +pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; +impl<'a, REG> PC5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc5::Value1) + self.variant(PC5_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc5::Value2) + self.variant(PC5_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc5::Value3) + self.variant(PC5_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc5::Value4) + self.variant(PC5_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc5::Value5) + self.variant(PC5_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc5::Value6) + self.variant(PC5_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc5::Value7) + self.variant(PC5_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc5::Value8) + self.variant(PC5_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc5::Value9) + self.variant(PC5_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc5::Value10) + self.variant(PC5_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc5::Value11) + self.variant(PC5_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc5::Value12) + self.variant(PC5_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc5::Value13) + self.variant(PC5_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc5::Value14) + self.variant(PC5_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc5::Value15) + self.variant(PC5_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc5::Value16) + self.variant(PC5_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc5::Value17) + self.variant(PC5_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc5::Value18) + self.variant(PC5_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc6 { +pub enum PC6_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc6) -> Self { + fn from(variant: PC6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc6 { +impl crate::FieldSpec for PC6_A { type Ux = u8; } -impl crate::IsEnum for Pc6 {} +impl crate::IsEnum for PC6_A {} #[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc6R = crate::FieldReader; -impl Pc6R { +pub type PC6_R = crate::FieldReader; +impl PC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc6::Value1), - 1 => Some(Pc6::Value2), - 2 => Some(Pc6::Value3), - 3 => Some(Pc6::Value4), - 4 => Some(Pc6::Value5), - 5 => Some(Pc6::Value6), - 6 => Some(Pc6::Value7), - 7 => Some(Pc6::Value8), - 16 => Some(Pc6::Value9), - 17 => Some(Pc6::Value10), - 18 => Some(Pc6::Value11), - 19 => Some(Pc6::Value12), - 20 => Some(Pc6::Value13), - 24 => Some(Pc6::Value14), - 25 => Some(Pc6::Value15), - 26 => Some(Pc6::Value16), - 27 => Some(Pc6::Value17), - 28 => Some(Pc6::Value18), + 0 => Some(PC6_A::VALUE1), + 1 => Some(PC6_A::VALUE2), + 2 => Some(PC6_A::VALUE3), + 3 => Some(PC6_A::VALUE4), + 4 => Some(PC6_A::VALUE5), + 5 => Some(PC6_A::VALUE6), + 6 => Some(PC6_A::VALUE7), + 7 => Some(PC6_A::VALUE8), + 16 => Some(PC6_A::VALUE9), + 17 => Some(PC6_A::VALUE10), + 18 => Some(PC6_A::VALUE11), + 19 => Some(PC6_A::VALUE12), + 20 => Some(PC6_A::VALUE13), + 24 => Some(PC6_A::VALUE14), + 25 => Some(PC6_A::VALUE15), + 26 => Some(PC6_A::VALUE16), + 27 => Some(PC6_A::VALUE17), + 28 => Some(PC6_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc6::Value1 + *self == PC6_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc6::Value2 + *self == PC6_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc6::Value3 + *self == PC6_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc6::Value4 + *self == PC6_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc6::Value5 + *self == PC6_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc6::Value6 + *self == PC6_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc6::Value7 + *self == PC6_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc6::Value8 + *self == PC6_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc6::Value9 + *self == PC6_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc6::Value10 + *self == PC6_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc6::Value11 + *self == PC6_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc6::Value12 + *self == PC6_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc6::Value13 + *self == PC6_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc6::Value14 + *self == PC6_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc6::Value15 + *self == PC6_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc6::Value16 + *self == PC6_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc6::Value17 + *self == PC6_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc6::Value18 + *self == PC6_A::VALUE18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; -impl<'a, REG> Pc6W<'a, REG> +pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; +impl<'a, REG> PC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc6::Value1) + self.variant(PC6_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc6::Value2) + self.variant(PC6_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc6::Value3) + self.variant(PC6_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc6::Value4) + self.variant(PC6_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc6::Value5) + self.variant(PC6_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc6::Value6) + self.variant(PC6_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc6::Value7) + self.variant(PC6_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc6::Value8) + self.variant(PC6_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc6::Value9) + self.variant(PC6_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc6::Value10) + self.variant(PC6_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc6::Value11) + self.variant(PC6_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc6::Value12) + self.variant(PC6_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc6::Value13) + self.variant(PC6_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc6::Value14) + self.variant(PC6_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc6::Value15) + self.variant(PC6_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc6::Value16) + self.variant(PC6_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc6::Value17) + self.variant(PC6_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc6::Value18) + self.variant(PC6_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc7 { +pub enum PC7_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc7) -> Self { + fn from(variant: PC7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc7 { +impl crate::FieldSpec for PC7_A { type Ux = u8; } -impl crate::IsEnum for Pc7 {} +impl crate::IsEnum for PC7_A {} #[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc7R = crate::FieldReader; -impl Pc7R { +pub type PC7_R = crate::FieldReader; +impl PC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc7::Value1), - 1 => Some(Pc7::Value2), - 2 => Some(Pc7::Value3), - 3 => Some(Pc7::Value4), - 4 => Some(Pc7::Value5), - 5 => Some(Pc7::Value6), - 6 => Some(Pc7::Value7), - 7 => Some(Pc7::Value8), - 16 => Some(Pc7::Value9), - 17 => Some(Pc7::Value10), - 18 => Some(Pc7::Value11), - 19 => Some(Pc7::Value12), - 20 => Some(Pc7::Value13), - 24 => Some(Pc7::Value14), - 25 => Some(Pc7::Value15), - 26 => Some(Pc7::Value16), - 27 => Some(Pc7::Value17), - 28 => Some(Pc7::Value18), + 0 => Some(PC7_A::VALUE1), + 1 => Some(PC7_A::VALUE2), + 2 => Some(PC7_A::VALUE3), + 3 => Some(PC7_A::VALUE4), + 4 => Some(PC7_A::VALUE5), + 5 => Some(PC7_A::VALUE6), + 6 => Some(PC7_A::VALUE7), + 7 => Some(PC7_A::VALUE8), + 16 => Some(PC7_A::VALUE9), + 17 => Some(PC7_A::VALUE10), + 18 => Some(PC7_A::VALUE11), + 19 => Some(PC7_A::VALUE12), + 20 => Some(PC7_A::VALUE13), + 24 => Some(PC7_A::VALUE14), + 25 => Some(PC7_A::VALUE15), + 26 => Some(PC7_A::VALUE16), + 27 => Some(PC7_A::VALUE17), + 28 => Some(PC7_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc7::Value1 + *self == PC7_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc7::Value2 + *self == PC7_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc7::Value3 + *self == PC7_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc7::Value4 + *self == PC7_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc7::Value5 + *self == PC7_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc7::Value6 + *self == PC7_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc7::Value7 + *self == PC7_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc7::Value8 + *self == PC7_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc7::Value9 + *self == PC7_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc7::Value10 + *self == PC7_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc7::Value11 + *self == PC7_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc7::Value12 + *self == PC7_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc7::Value13 + *self == PC7_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc7::Value14 + *self == PC7_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc7::Value15 + *self == PC7_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc7::Value16 + *self == PC7_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc7::Value17 + *self == PC7_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc7::Value18 + *self == PC7_A::VALUE18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; -impl<'a, REG> Pc7W<'a, REG> +pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; +impl<'a, REG> PC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc7::Value1) + self.variant(PC7_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc7::Value2) + self.variant(PC7_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc7::Value3) + self.variant(PC7_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc7::Value4) + self.variant(PC7_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc7::Value5) + self.variant(PC7_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc7::Value6) + self.variant(PC7_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc7::Value7) + self.variant(PC7_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc7::Value8) + self.variant(PC7_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc7::Value9) + self.variant(PC7_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc7::Value10) + self.variant(PC7_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc7::Value11) + self.variant(PC7_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc7::Value12) + self.variant(PC7_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc7::Value13) + self.variant(PC7_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc7::Value14) + self.variant(PC7_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc7::Value15) + self.variant(PC7_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc7::Value16) + self.variant(PC7_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc7::Value17) + self.variant(PC7_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc7::Value18) + self.variant(PC7_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> Pc4R { - Pc4R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> PC4_R { + PC4_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> Pc5R { - Pc5R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> PC5_R { + PC5_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> Pc6R { - Pc6R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> PC6_R { + PC6_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> Pc7R { - Pc7R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> PC7_R { + PC7_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> Pc4W { - Pc4W::new(self, 3) + pub fn pc4(&mut self) -> PC4_W { + PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> Pc5W { - Pc5W::new(self, 11) + pub fn pc5(&mut self) -> PC5_W { + PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> Pc6W { - Pc6W::new(self, 19) + pub fn pc6(&mut self) -> PC6_W { + PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> Pc7W { - Pc7W::new(self, 27) + pub fn pc7(&mut self) -> PC7_W { + PC7_W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr4Spec; -impl crate::RegisterSpec for Iocr4Spec { +pub struct IOCR4_SPEC; +impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for Iocr4Spec {} +impl crate::Readable for IOCR4_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for Iocr4Spec { +impl crate::Writable for IOCR4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for Iocr4Spec { +impl crate::Resettable for IOCR4_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/iocr8.rs b/src/port1/iocr8.rs index bb17bce3..aac91600 100644 --- a/src/port1/iocr8.rs +++ b/src/port1/iocr8.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc8 { +pub enum PC8_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc8) -> Self { + fn from(variant: PC8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc8 { +impl crate::FieldSpec for PC8_A { type Ux = u8; } -impl crate::IsEnum for Pc8 {} +impl crate::IsEnum for PC8_A {} #[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc8R = crate::FieldReader; -impl Pc8R { +pub type PC8_R = crate::FieldReader; +impl PC8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc8::Value1), - 1 => Some(Pc8::Value2), - 2 => Some(Pc8::Value3), - 3 => Some(Pc8::Value4), - 4 => Some(Pc8::Value5), - 5 => Some(Pc8::Value6), - 6 => Some(Pc8::Value7), - 7 => Some(Pc8::Value8), - 16 => Some(Pc8::Value9), - 17 => Some(Pc8::Value10), - 18 => Some(Pc8::Value11), - 19 => Some(Pc8::Value12), - 20 => Some(Pc8::Value13), - 24 => Some(Pc8::Value14), - 25 => Some(Pc8::Value15), - 26 => Some(Pc8::Value16), - 27 => Some(Pc8::Value17), - 28 => Some(Pc8::Value18), + 0 => Some(PC8_A::VALUE1), + 1 => Some(PC8_A::VALUE2), + 2 => Some(PC8_A::VALUE3), + 3 => Some(PC8_A::VALUE4), + 4 => Some(PC8_A::VALUE5), + 5 => Some(PC8_A::VALUE6), + 6 => Some(PC8_A::VALUE7), + 7 => Some(PC8_A::VALUE8), + 16 => Some(PC8_A::VALUE9), + 17 => Some(PC8_A::VALUE10), + 18 => Some(PC8_A::VALUE11), + 19 => Some(PC8_A::VALUE12), + 20 => Some(PC8_A::VALUE13), + 24 => Some(PC8_A::VALUE14), + 25 => Some(PC8_A::VALUE15), + 26 => Some(PC8_A::VALUE16), + 27 => Some(PC8_A::VALUE17), + 28 => Some(PC8_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc8::Value1 + *self == PC8_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc8::Value2 + *self == PC8_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc8::Value3 + *self == PC8_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc8::Value4 + *self == PC8_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc8::Value5 + *self == PC8_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc8::Value6 + *self == PC8_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc8::Value7 + *self == PC8_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc8::Value8 + *self == PC8_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc8::Value9 + *self == PC8_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc8::Value10 + *self == PC8_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc8::Value11 + *self == PC8_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc8::Value12 + *self == PC8_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc8::Value13 + *self == PC8_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc8::Value14 + *self == PC8_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc8::Value15 + *self == PC8_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc8::Value16 + *self == PC8_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc8::Value17 + *self == PC8_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc8::Value18 + *self == PC8_A::VALUE18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; -impl<'a, REG> Pc8W<'a, REG> +pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; +impl<'a, REG> PC8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc8::Value1) + self.variant(PC8_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc8::Value2) + self.variant(PC8_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc8::Value3) + self.variant(PC8_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc8::Value4) + self.variant(PC8_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc8::Value5) + self.variant(PC8_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc8::Value6) + self.variant(PC8_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc8::Value7) + self.variant(PC8_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc8::Value8) + self.variant(PC8_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc8::Value9) + self.variant(PC8_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc8::Value10) + self.variant(PC8_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc8::Value11) + self.variant(PC8_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc8::Value12) + self.variant(PC8_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc8::Value13) + self.variant(PC8_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc8::Value14) + self.variant(PC8_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc8::Value15) + self.variant(PC8_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc8::Value16) + self.variant(PC8_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc8::Value17) + self.variant(PC8_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc8::Value18) + self.variant(PC8_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc9 { +pub enum PC9_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc9) -> Self { + fn from(variant: PC9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc9 { +impl crate::FieldSpec for PC9_A { type Ux = u8; } -impl crate::IsEnum for Pc9 {} +impl crate::IsEnum for PC9_A {} #[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc9R = crate::FieldReader; -impl Pc9R { +pub type PC9_R = crate::FieldReader; +impl PC9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc9::Value1), - 1 => Some(Pc9::Value2), - 2 => Some(Pc9::Value3), - 3 => Some(Pc9::Value4), - 4 => Some(Pc9::Value5), - 5 => Some(Pc9::Value6), - 6 => Some(Pc9::Value7), - 7 => Some(Pc9::Value8), - 16 => Some(Pc9::Value9), - 17 => Some(Pc9::Value10), - 18 => Some(Pc9::Value11), - 19 => Some(Pc9::Value12), - 20 => Some(Pc9::Value13), - 24 => Some(Pc9::Value14), - 25 => Some(Pc9::Value15), - 26 => Some(Pc9::Value16), - 27 => Some(Pc9::Value17), - 28 => Some(Pc9::Value18), + 0 => Some(PC9_A::VALUE1), + 1 => Some(PC9_A::VALUE2), + 2 => Some(PC9_A::VALUE3), + 3 => Some(PC9_A::VALUE4), + 4 => Some(PC9_A::VALUE5), + 5 => Some(PC9_A::VALUE6), + 6 => Some(PC9_A::VALUE7), + 7 => Some(PC9_A::VALUE8), + 16 => Some(PC9_A::VALUE9), + 17 => Some(PC9_A::VALUE10), + 18 => Some(PC9_A::VALUE11), + 19 => Some(PC9_A::VALUE12), + 20 => Some(PC9_A::VALUE13), + 24 => Some(PC9_A::VALUE14), + 25 => Some(PC9_A::VALUE15), + 26 => Some(PC9_A::VALUE16), + 27 => Some(PC9_A::VALUE17), + 28 => Some(PC9_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc9::Value1 + *self == PC9_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc9::Value2 + *self == PC9_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc9::Value3 + *self == PC9_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc9::Value4 + *self == PC9_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc9::Value5 + *self == PC9_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc9::Value6 + *self == PC9_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc9::Value7 + *self == PC9_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc9::Value8 + *self == PC9_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc9::Value9 + *self == PC9_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc9::Value10 + *self == PC9_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc9::Value11 + *self == PC9_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc9::Value12 + *self == PC9_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc9::Value13 + *self == PC9_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc9::Value14 + *self == PC9_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc9::Value15 + *self == PC9_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc9::Value16 + *self == PC9_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc9::Value17 + *self == PC9_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc9::Value18 + *self == PC9_A::VALUE18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; -impl<'a, REG> Pc9W<'a, REG> +pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; +impl<'a, REG> PC9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc9::Value1) + self.variant(PC9_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc9::Value2) + self.variant(PC9_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc9::Value3) + self.variant(PC9_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc9::Value4) + self.variant(PC9_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc9::Value5) + self.variant(PC9_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc9::Value6) + self.variant(PC9_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc9::Value7) + self.variant(PC9_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc9::Value8) + self.variant(PC9_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc9::Value9) + self.variant(PC9_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc9::Value10) + self.variant(PC9_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc9::Value11) + self.variant(PC9_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc9::Value12) + self.variant(PC9_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc9::Value13) + self.variant(PC9_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc9::Value14) + self.variant(PC9_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc9::Value15) + self.variant(PC9_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc9::Value16) + self.variant(PC9_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc9::Value17) + self.variant(PC9_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc9::Value18) + self.variant(PC9_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc10 { +pub enum PC10_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc10) -> Self { + fn from(variant: PC10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc10 { +impl crate::FieldSpec for PC10_A { type Ux = u8; } -impl crate::IsEnum for Pc10 {} +impl crate::IsEnum for PC10_A {} #[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc10R = crate::FieldReader; -impl Pc10R { +pub type PC10_R = crate::FieldReader; +impl PC10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc10::Value1), - 1 => Some(Pc10::Value2), - 2 => Some(Pc10::Value3), - 3 => Some(Pc10::Value4), - 4 => Some(Pc10::Value5), - 5 => Some(Pc10::Value6), - 6 => Some(Pc10::Value7), - 7 => Some(Pc10::Value8), - 16 => Some(Pc10::Value9), - 17 => Some(Pc10::Value10), - 18 => Some(Pc10::Value11), - 19 => Some(Pc10::Value12), - 20 => Some(Pc10::Value13), - 24 => Some(Pc10::Value14), - 25 => Some(Pc10::Value15), - 26 => Some(Pc10::Value16), - 27 => Some(Pc10::Value17), - 28 => Some(Pc10::Value18), + 0 => Some(PC10_A::VALUE1), + 1 => Some(PC10_A::VALUE2), + 2 => Some(PC10_A::VALUE3), + 3 => Some(PC10_A::VALUE4), + 4 => Some(PC10_A::VALUE5), + 5 => Some(PC10_A::VALUE6), + 6 => Some(PC10_A::VALUE7), + 7 => Some(PC10_A::VALUE8), + 16 => Some(PC10_A::VALUE9), + 17 => Some(PC10_A::VALUE10), + 18 => Some(PC10_A::VALUE11), + 19 => Some(PC10_A::VALUE12), + 20 => Some(PC10_A::VALUE13), + 24 => Some(PC10_A::VALUE14), + 25 => Some(PC10_A::VALUE15), + 26 => Some(PC10_A::VALUE16), + 27 => Some(PC10_A::VALUE17), + 28 => Some(PC10_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc10::Value1 + *self == PC10_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc10::Value2 + *self == PC10_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc10::Value3 + *self == PC10_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc10::Value4 + *self == PC10_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc10::Value5 + *self == PC10_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc10::Value6 + *self == PC10_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc10::Value7 + *self == PC10_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc10::Value8 + *self == PC10_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc10::Value9 + *self == PC10_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc10::Value10 + *self == PC10_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc10::Value11 + *self == PC10_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc10::Value12 + *self == PC10_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc10::Value13 + *self == PC10_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc10::Value14 + *self == PC10_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc10::Value15 + *self == PC10_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc10::Value16 + *self == PC10_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc10::Value17 + *self == PC10_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc10::Value18 + *self == PC10_A::VALUE18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; -impl<'a, REG> Pc10W<'a, REG> +pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; +impl<'a, REG> PC10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc10::Value1) + self.variant(PC10_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc10::Value2) + self.variant(PC10_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc10::Value3) + self.variant(PC10_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc10::Value4) + self.variant(PC10_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc10::Value5) + self.variant(PC10_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc10::Value6) + self.variant(PC10_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc10::Value7) + self.variant(PC10_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc10::Value8) + self.variant(PC10_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc10::Value9) + self.variant(PC10_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc10::Value10) + self.variant(PC10_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc10::Value11) + self.variant(PC10_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc10::Value12) + self.variant(PC10_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc10::Value13) + self.variant(PC10_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc10::Value14) + self.variant(PC10_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc10::Value15) + self.variant(PC10_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc10::Value16) + self.variant(PC10_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc10::Value17) + self.variant(PC10_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc10::Value18) + self.variant(PC10_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc11 { +pub enum PC11_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc11) -> Self { + fn from(variant: PC11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc11 { +impl crate::FieldSpec for PC11_A { type Ux = u8; } -impl crate::IsEnum for Pc11 {} +impl crate::IsEnum for PC11_A {} #[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc11R = crate::FieldReader; -impl Pc11R { +pub type PC11_R = crate::FieldReader; +impl PC11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc11::Value1), - 1 => Some(Pc11::Value2), - 2 => Some(Pc11::Value3), - 3 => Some(Pc11::Value4), - 4 => Some(Pc11::Value5), - 5 => Some(Pc11::Value6), - 6 => Some(Pc11::Value7), - 7 => Some(Pc11::Value8), - 16 => Some(Pc11::Value9), - 17 => Some(Pc11::Value10), - 18 => Some(Pc11::Value11), - 19 => Some(Pc11::Value12), - 20 => Some(Pc11::Value13), - 24 => Some(Pc11::Value14), - 25 => Some(Pc11::Value15), - 26 => Some(Pc11::Value16), - 27 => Some(Pc11::Value17), - 28 => Some(Pc11::Value18), + 0 => Some(PC11_A::VALUE1), + 1 => Some(PC11_A::VALUE2), + 2 => Some(PC11_A::VALUE3), + 3 => Some(PC11_A::VALUE4), + 4 => Some(PC11_A::VALUE5), + 5 => Some(PC11_A::VALUE6), + 6 => Some(PC11_A::VALUE7), + 7 => Some(PC11_A::VALUE8), + 16 => Some(PC11_A::VALUE9), + 17 => Some(PC11_A::VALUE10), + 18 => Some(PC11_A::VALUE11), + 19 => Some(PC11_A::VALUE12), + 20 => Some(PC11_A::VALUE13), + 24 => Some(PC11_A::VALUE14), + 25 => Some(PC11_A::VALUE15), + 26 => Some(PC11_A::VALUE16), + 27 => Some(PC11_A::VALUE17), + 28 => Some(PC11_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc11::Value1 + *self == PC11_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc11::Value2 + *self == PC11_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc11::Value3 + *self == PC11_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc11::Value4 + *self == PC11_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc11::Value5 + *self == PC11_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc11::Value6 + *self == PC11_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc11::Value7 + *self == PC11_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc11::Value8 + *self == PC11_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc11::Value9 + *self == PC11_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc11::Value10 + *self == PC11_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc11::Value11 + *self == PC11_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc11::Value12 + *self == PC11_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc11::Value13 + *self == PC11_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc11::Value14 + *self == PC11_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc11::Value15 + *self == PC11_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc11::Value16 + *self == PC11_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc11::Value17 + *self == PC11_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc11::Value18 + *self == PC11_A::VALUE18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; -impl<'a, REG> Pc11W<'a, REG> +pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; +impl<'a, REG> PC11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc11::Value1) + self.variant(PC11_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc11::Value2) + self.variant(PC11_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc11::Value3) + self.variant(PC11_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc11::Value4) + self.variant(PC11_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc11::Value5) + self.variant(PC11_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc11::Value6) + self.variant(PC11_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc11::Value7) + self.variant(PC11_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc11::Value8) + self.variant(PC11_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc11::Value9) + self.variant(PC11_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc11::Value10) + self.variant(PC11_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc11::Value11) + self.variant(PC11_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc11::Value12) + self.variant(PC11_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc11::Value13) + self.variant(PC11_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc11::Value14) + self.variant(PC11_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc11::Value15) + self.variant(PC11_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc11::Value16) + self.variant(PC11_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc11::Value17) + self.variant(PC11_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc11::Value18) + self.variant(PC11_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> Pc8R { - Pc8R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> PC8_R { + PC8_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> Pc9R { - Pc9R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> PC9_R { + PC9_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> Pc10R { - Pc10R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> PC10_R { + PC10_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> Pc11R { - Pc11R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> PC11_R { + PC11_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> Pc8W { - Pc8W::new(self, 3) + pub fn pc8(&mut self) -> PC8_W { + PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> Pc9W { - Pc9W::new(self, 11) + pub fn pc9(&mut self) -> PC9_W { + PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> Pc10W { - Pc10W::new(self, 19) + pub fn pc10(&mut self) -> PC10_W { + PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> Pc11W { - Pc11W::new(self, 27) + pub fn pc11(&mut self) -> PC11_W { + PC11_W::new(self, 27) } } #[doc = "Port 1 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr8Spec; -impl crate::RegisterSpec for Iocr8Spec { +pub struct IOCR8_SPEC; +impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for Iocr8Spec {} +impl crate::Readable for IOCR8_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for Iocr8Spec { +impl crate::Writable for IOCR8_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for Iocr8Spec { +impl crate::Resettable for IOCR8_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/omr.rs b/src/port1/omr.rs index 18af5420..0d8cbaf2 100644 --- a/src/port1/omr.rs +++ b/src/port1/omr.rs @@ -1,275 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> Ps0W { - Ps0W::new(self, 0) + pub fn ps0(&mut self) -> PS0_W { + PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> Ps1W { - Ps1W::new(self, 1) + pub fn ps1(&mut self) -> PS1_W { + PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> Ps2W { - Ps2W::new(self, 2) + pub fn ps2(&mut self) -> PS2_W { + PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> Ps3W { - Ps3W::new(self, 3) + pub fn ps3(&mut self) -> PS3_W { + PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> Ps4W { - Ps4W::new(self, 4) + pub fn ps4(&mut self) -> PS4_W { + PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> Ps5W { - Ps5W::new(self, 5) + pub fn ps5(&mut self) -> PS5_W { + PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> Ps6W { - Ps6W::new(self, 6) + pub fn ps6(&mut self) -> PS6_W { + PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> Ps7W { - Ps7W::new(self, 7) + pub fn ps7(&mut self) -> PS7_W { + PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> Ps8W { - Ps8W::new(self, 8) + pub fn ps8(&mut self) -> PS8_W { + PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> Ps9W { - Ps9W::new(self, 9) + pub fn ps9(&mut self) -> PS9_W { + PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> Ps10W { - Ps10W::new(self, 10) + pub fn ps10(&mut self) -> PS10_W { + PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> Ps11W { - Ps11W::new(self, 11) + pub fn ps11(&mut self) -> PS11_W { + PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> Ps12W { - Ps12W::new(self, 12) + pub fn ps12(&mut self) -> PS12_W { + PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> Ps13W { - Ps13W::new(self, 13) + pub fn ps13(&mut self) -> PS13_W { + PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> Ps14W { - Ps14W::new(self, 14) + pub fn ps14(&mut self) -> PS14_W { + PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> Ps15W { - Ps15W::new(self, 15) + pub fn ps15(&mut self) -> PS15_W { + PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> Pr0W { - Pr0W::new(self, 16) + pub fn pr0(&mut self) -> PR0_W { + PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> Pr1W { - Pr1W::new(self, 17) + pub fn pr1(&mut self) -> PR1_W { + PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> Pr2W { - Pr2W::new(self, 18) + pub fn pr2(&mut self) -> PR2_W { + PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> Pr3W { - Pr3W::new(self, 19) + pub fn pr3(&mut self) -> PR3_W { + PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> Pr4W { - Pr4W::new(self, 20) + pub fn pr4(&mut self) -> PR4_W { + PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> Pr5W { - Pr5W::new(self, 21) + pub fn pr5(&mut self) -> PR5_W { + PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> Pr6W { - Pr6W::new(self, 22) + pub fn pr6(&mut self) -> PR6_W { + PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> Pr7W { - Pr7W::new(self, 23) + pub fn pr7(&mut self) -> PR7_W { + PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> Pr8W { - Pr8W::new(self, 24) + pub fn pr8(&mut self) -> PR8_W { + PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> Pr9W { - Pr9W::new(self, 25) + pub fn pr9(&mut self) -> PR9_W { + PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> Pr10W { - Pr10W::new(self, 26) + pub fn pr10(&mut self) -> PR10_W { + PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> Pr11W { - Pr11W::new(self, 27) + pub fn pr11(&mut self) -> PR11_W { + PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> Pr12W { - Pr12W::new(self, 28) + pub fn pr12(&mut self) -> PR12_W { + PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> Pr13W { - Pr13W::new(self, 29) + pub fn pr13(&mut self) -> PR13_W { + PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> Pr14W { - Pr14W::new(self, 30) + pub fn pr14(&mut self) -> PR14_W { + PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> Pr15W { - Pr15W::new(self, 31) + pub fn pr15(&mut self) -> PR15_W { + PR15_W::new(self, 31) } } #[doc = "Port 1 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OmrSpec; -impl crate::RegisterSpec for OmrSpec { +pub struct OMR_SPEC; +impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OmrSpec { +impl crate::Writable for OMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OmrSpec { +impl crate::Resettable for OMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/out.rs b/src/port1/out.rs index 8fd6c1b3..f1b5f9ac 100644 --- a/src/port1/out.rs +++ b/src/port1/out.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; -impl<'a, REG> P0W<'a, REG> +pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; +impl<'a, REG> P0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0::Value1) + self.variant(P0_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0::Value2) + self.variant(P0_A::VALUE2) } } #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; -impl<'a, REG> P1W<'a, REG> +pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; +impl<'a, REG> P1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1::Value1) + self.variant(P1_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1::Value2) + self.variant(P1_A::VALUE2) } } #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; -impl<'a, REG> P2W<'a, REG> +pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; +impl<'a, REG> P2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2::Value1) + self.variant(P2_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2::Value2) + self.variant(P2_A::VALUE2) } } #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; -impl<'a, REG> P3W<'a, REG> +pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; +impl<'a, REG> P3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3::Value1) + self.variant(P3_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3::Value2) + self.variant(P3_A::VALUE2) } } #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; -impl<'a, REG> P4W<'a, REG> +pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; +impl<'a, REG> P4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4::Value1) + self.variant(P4_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4::Value2) + self.variant(P4_A::VALUE2) } } #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; -impl<'a, REG> P5W<'a, REG> +pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; +impl<'a, REG> P5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5::Value1) + self.variant(P5_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5::Value2) + self.variant(P5_A::VALUE2) } } #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; -impl<'a, REG> P6W<'a, REG> +pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; +impl<'a, REG> P6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6::Value1) + self.variant(P6_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6::Value2) + self.variant(P6_A::VALUE2) } } #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; -impl<'a, REG> P7W<'a, REG> +pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; +impl<'a, REG> P7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7::Value1) + self.variant(P7_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7::Value2) + self.variant(P7_A::VALUE2) } } #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; -impl<'a, REG> P8W<'a, REG> +pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; +impl<'a, REG> P8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8::Value1) + self.variant(P8_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8::Value2) + self.variant(P8_A::VALUE2) } } #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; -impl<'a, REG> P9W<'a, REG> +pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; +impl<'a, REG> P9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9::Value1) + self.variant(P9_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9::Value2) + self.variant(P9_A::VALUE2) } } #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; -impl<'a, REG> P10W<'a, REG> +pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; +impl<'a, REG> P10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10::Value1) + self.variant(P10_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10::Value2) + self.variant(P10_A::VALUE2) } } #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; -impl<'a, REG> P11W<'a, REG> +pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; +impl<'a, REG> P11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11::Value1) + self.variant(P11_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11::Value2) + self.variant(P11_A::VALUE2) } } #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; -impl<'a, REG> P12W<'a, REG> +pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; +impl<'a, REG> P12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12::Value1) + self.variant(P12_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12::Value2) + self.variant(P12_A::VALUE2) } } #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; -impl<'a, REG> P13W<'a, REG> +pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; +impl<'a, REG> P13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13::Value1) + self.variant(P13_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13::Value2) + self.variant(P13_A::VALUE2) } } #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; -impl<'a, REG> P14W<'a, REG> +pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; +impl<'a, REG> P14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14::Value1) + self.variant(P14_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14::Value2) + self.variant(P14_A::VALUE2) } } #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; -impl<'a, REG> P15W<'a, REG> +pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; +impl<'a, REG> P15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15::Value1) + self.variant(P15_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15::Value2) + self.variant(P15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0W { - P0W::new(self, 0) + pub fn p0(&mut self) -> P0_W { + P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1W { - P1W::new(self, 1) + pub fn p1(&mut self) -> P1_W { + P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2W { - P2W::new(self, 2) + pub fn p2(&mut self) -> P2_W { + P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3W { - P3W::new(self, 3) + pub fn p3(&mut self) -> P3_W { + P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4W { - P4W::new(self, 4) + pub fn p4(&mut self) -> P4_W { + P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5W { - P5W::new(self, 5) + pub fn p5(&mut self) -> P5_W { + P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6W { - P6W::new(self, 6) + pub fn p6(&mut self) -> P6_W { + P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7W { - P7W::new(self, 7) + pub fn p7(&mut self) -> P7_W { + P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8W { - P8W::new(self, 8) + pub fn p8(&mut self) -> P8_W { + P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9W { - P9W::new(self, 9) + pub fn p9(&mut self) -> P9_W { + P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10W { - P10W::new(self, 10) + pub fn p10(&mut self) -> P10_W { + P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11W { - P11W::new(self, 11) + pub fn p11(&mut self) -> P11_W { + P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12W { - P12W::new(self, 12) + pub fn p12(&mut self) -> P12_W { + P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13W { - P13W::new(self, 13) + pub fn p13(&mut self) -> P13_W { + P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14W { - P14W::new(self, 14) + pub fn p14(&mut self) -> P14_W { + P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15W { - P15W::new(self, 15) + pub fn p15(&mut self) -> P15_W { + P15_W::new(self, 15) } } #[doc = "Port 1 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutSpec; -impl crate::RegisterSpec for OutSpec { +pub struct OUT_SPEC; +impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OutSpec {} +impl crate::Readable for OUT_SPEC {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OutSpec { +impl crate::Writable for OUT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OutSpec { +impl crate::Resettable for OUT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/pdisc.rs b/src/port1/pdisc.rs index 5166640d..438099ed 100644 --- a/src/port1/pdisc.rs +++ b/src/port1/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis0 { +pub enum PDIS0_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis0) -> Self { + fn from(variant: PDIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type Pdis0R = crate::BitReader; -impl Pdis0R { +pub type PDIS0_R = crate::BitReader; +impl PDIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis0 { + pub const fn variant(&self) -> PDIS0_A { match self.bits { - false => Pdis0::Value1, - true => Pdis0::Value2, + false => PDIS0_A::VALUE1, + true => PDIS0_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis0::Value1 + *self == PDIS0_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis0::Value2 + *self == PDIS0_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis1 { +pub enum PDIS1_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis1) -> Self { + fn from(variant: PDIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type Pdis1R = crate::BitReader; -impl Pdis1R { +pub type PDIS1_R = crate::BitReader; +impl PDIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis1 { + pub const fn variant(&self) -> PDIS1_A { match self.bits { - false => Pdis1::Value1, - true => Pdis1::Value2, + false => PDIS1_A::VALUE1, + true => PDIS1_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis1::Value1 + *self == PDIS1_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis1::Value2 + *self == PDIS1_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis2 { +pub enum PDIS2_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis2) -> Self { + fn from(variant: PDIS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type Pdis2R = crate::BitReader; -impl Pdis2R { +pub type PDIS2_R = crate::BitReader; +impl PDIS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis2 { + pub const fn variant(&self) -> PDIS2_A { match self.bits { - false => Pdis2::Value1, - true => Pdis2::Value2, + false => PDIS2_A::VALUE1, + true => PDIS2_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis2::Value1 + *self == PDIS2_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis2::Value2 + *self == PDIS2_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis3 { +pub enum PDIS3_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis3) -> Self { + fn from(variant: PDIS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type Pdis3R = crate::BitReader; -impl Pdis3R { +pub type PDIS3_R = crate::BitReader; +impl PDIS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis3 { + pub const fn variant(&self) -> PDIS3_A { match self.bits { - false => Pdis3::Value1, - true => Pdis3::Value2, + false => PDIS3_A::VALUE1, + true => PDIS3_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis3::Value1 + *self == PDIS3_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis3::Value2 + *self == PDIS3_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis4 { +pub enum PDIS4_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis4) -> Self { + fn from(variant: PDIS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type Pdis4R = crate::BitReader; -impl Pdis4R { +pub type PDIS4_R = crate::BitReader; +impl PDIS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis4 { + pub const fn variant(&self) -> PDIS4_A { match self.bits { - false => Pdis4::Value1, - true => Pdis4::Value2, + false => PDIS4_A::VALUE1, + true => PDIS4_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis4::Value1 + *self == PDIS4_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis4::Value2 + *self == PDIS4_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis5 { +pub enum PDIS5_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis5) -> Self { + fn from(variant: PDIS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type Pdis5R = crate::BitReader; -impl Pdis5R { +pub type PDIS5_R = crate::BitReader; +impl PDIS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis5 { + pub const fn variant(&self) -> PDIS5_A { match self.bits { - false => Pdis5::Value1, - true => Pdis5::Value2, + false => PDIS5_A::VALUE1, + true => PDIS5_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis5::Value1 + *self == PDIS5_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis5::Value2 + *self == PDIS5_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis6 { +pub enum PDIS6_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis6) -> Self { + fn from(variant: PDIS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type Pdis6R = crate::BitReader; -impl Pdis6R { +pub type PDIS6_R = crate::BitReader; +impl PDIS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis6 { + pub const fn variant(&self) -> PDIS6_A { match self.bits { - false => Pdis6::Value1, - true => Pdis6::Value2, + false => PDIS6_A::VALUE1, + true => PDIS6_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis6::Value1 + *self == PDIS6_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis6::Value2 + *self == PDIS6_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis7 { +pub enum PDIS7_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis7) -> Self { + fn from(variant: PDIS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type Pdis7R = crate::BitReader; -impl Pdis7R { +pub type PDIS7_R = crate::BitReader; +impl PDIS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis7 { + pub const fn variant(&self) -> PDIS7_A { match self.bits { - false => Pdis7::Value1, - true => Pdis7::Value2, + false => PDIS7_A::VALUE1, + true => PDIS7_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis7::Value1 + *self == PDIS7_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis7::Value2 + *self == PDIS7_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis8 { +pub enum PDIS8_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis8) -> Self { + fn from(variant: PDIS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type Pdis8R = crate::BitReader; -impl Pdis8R { +pub type PDIS8_R = crate::BitReader; +impl PDIS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis8 { + pub const fn variant(&self) -> PDIS8_A { match self.bits { - false => Pdis8::Value1, - true => Pdis8::Value2, + false => PDIS8_A::VALUE1, + true => PDIS8_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis8::Value1 + *self == PDIS8_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis8::Value2 + *self == PDIS8_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis9 { +pub enum PDIS9_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis9) -> Self { + fn from(variant: PDIS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type Pdis9R = crate::BitReader; -impl Pdis9R { +pub type PDIS9_R = crate::BitReader; +impl PDIS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis9 { + pub const fn variant(&self) -> PDIS9_A { match self.bits { - false => Pdis9::Value1, - true => Pdis9::Value2, + false => PDIS9_A::VALUE1, + true => PDIS9_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis9::Value1 + *self == PDIS9_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis9::Value2 + *self == PDIS9_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis10 { +pub enum PDIS10_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis10) -> Self { + fn from(variant: PDIS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type Pdis10R = crate::BitReader; -impl Pdis10R { +pub type PDIS10_R = crate::BitReader; +impl PDIS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis10 { + pub const fn variant(&self) -> PDIS10_A { match self.bits { - false => Pdis10::Value1, - true => Pdis10::Value2, + false => PDIS10_A::VALUE1, + true => PDIS10_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis10::Value1 + *self == PDIS10_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis10::Value2 + *self == PDIS10_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis11 { +pub enum PDIS11_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis11) -> Self { + fn from(variant: PDIS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type Pdis11R = crate::BitReader; -impl Pdis11R { +pub type PDIS11_R = crate::BitReader; +impl PDIS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis11 { + pub const fn variant(&self) -> PDIS11_A { match self.bits { - false => Pdis11::Value1, - true => Pdis11::Value2, + false => PDIS11_A::VALUE1, + true => PDIS11_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis11::Value1 + *self == PDIS11_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis11::Value2 + *self == PDIS11_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis12 { +pub enum PDIS12_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis12) -> Self { + fn from(variant: PDIS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type Pdis12R = crate::BitReader; -impl Pdis12R { +pub type PDIS12_R = crate::BitReader; +impl PDIS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis12 { + pub const fn variant(&self) -> PDIS12_A { match self.bits { - false => Pdis12::Value1, - true => Pdis12::Value2, + false => PDIS12_A::VALUE1, + true => PDIS12_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis12::Value1 + *self == PDIS12_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis12::Value2 + *self == PDIS12_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis13 { +pub enum PDIS13_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis13) -> Self { + fn from(variant: PDIS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type Pdis13R = crate::BitReader; -impl Pdis13R { +pub type PDIS13_R = crate::BitReader; +impl PDIS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis13 { + pub const fn variant(&self) -> PDIS13_A { match self.bits { - false => Pdis13::Value1, - true => Pdis13::Value2, + false => PDIS13_A::VALUE1, + true => PDIS13_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis13::Value1 + *self == PDIS13_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis13::Value2 + *self == PDIS13_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis14 { +pub enum PDIS14_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis14) -> Self { + fn from(variant: PDIS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type Pdis14R = crate::BitReader; -impl Pdis14R { +pub type PDIS14_R = crate::BitReader; +impl PDIS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis14 { + pub const fn variant(&self) -> PDIS14_A { match self.bits { - false => Pdis14::Value1, - true => Pdis14::Value2, + false => PDIS14_A::VALUE1, + true => PDIS14_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis14::Value1 + *self == PDIS14_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis14::Value2 + *self == PDIS14_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis15 { +pub enum PDIS15_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis15) -> Self { + fn from(variant: PDIS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type Pdis15R = crate::BitReader; -impl Pdis15R { +pub type PDIS15_R = crate::BitReader; +impl PDIS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis15 { + pub const fn variant(&self) -> PDIS15_A { match self.bits { - false => Pdis15::Value1, - true => Pdis15::Value2, + false => PDIS15_A::VALUE1, + true => PDIS15_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis15::Value1 + *self == PDIS15_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis15::Value2 + *self == PDIS15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> Pdis0R { - Pdis0R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> PDIS0_R { + PDIS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> Pdis1R { - Pdis1R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> PDIS1_R { + PDIS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> Pdis2R { - Pdis2R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> PDIS2_R { + PDIS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> Pdis3R { - Pdis3R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> PDIS3_R { + PDIS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> Pdis4R { - Pdis4R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> PDIS4_R { + PDIS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> Pdis5R { - Pdis5R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> PDIS5_R { + PDIS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> Pdis6R { - Pdis6R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> PDIS6_R { + PDIS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> Pdis7R { - Pdis7R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> PDIS7_R { + PDIS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> Pdis8R { - Pdis8R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> PDIS8_R { + PDIS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> Pdis9R { - Pdis9R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> PDIS9_R { + PDIS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> Pdis10R { - Pdis10R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> PDIS10_R { + PDIS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> Pdis11R { - Pdis11R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> PDIS11_R { + PDIS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> Pdis12R { - Pdis12R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> PDIS12_R { + PDIS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> Pdis13R { - Pdis13R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> PDIS13_R { + PDIS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> Pdis14R { - Pdis14R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> PDIS14_R { + PDIS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> Pdis15R { - Pdis15R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> PDIS15_R { + PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 1 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdiscSpec; -impl crate::RegisterSpec for PdiscSpec { +pub struct PDISC_SPEC; +impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PdiscSpec {} +impl crate::Readable for PDISC_SPEC {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PdiscSpec { +impl crate::Resettable for PDISC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port1/pdr0.rs b/src/port1/pdr0.rs index fb442973..1b79bab1 100644 --- a/src/port1/pdr0.rs +++ b/src/port1/pdr0.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type Pd0R = crate::FieldReader; +pub type PD0_R = crate::FieldReader; #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type Pd1R = crate::FieldReader; +pub type PD1_R = crate::FieldReader; #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type Pd2R = crate::FieldReader; +pub type PD2_R = crate::FieldReader; #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type Pd3R = crate::FieldReader; +pub type PD3_R = crate::FieldReader; #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type Pd4R = crate::FieldReader; +pub type PD4_R = crate::FieldReader; #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type Pd5R = crate::FieldReader; +pub type PD5_R = crate::FieldReader; #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type Pd6R = crate::FieldReader; +pub type PD6_R = crate::FieldReader; #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type Pd7R = crate::FieldReader; +pub type PD7_R = crate::FieldReader; #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> Pd0R { - Pd0R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> PD0_R { + PD0_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> Pd1R { - Pd1R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> PD1_R { + PD1_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> Pd2R { - Pd2R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> PD2_R { + PD2_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> Pd3R { - Pd3R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> PD3_R { + PD3_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> Pd4R { - Pd4R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> PD4_R { + PD4_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> Pd5R { - Pd5R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> PD5_R { + PD5_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> Pd6R { - Pd6R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> PD6_R { + PD6_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> Pd7R { - Pd7R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> PD7_R { + PD7_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> Pd0W { - Pd0W::new(self, 0) + pub fn pd0(&mut self) -> PD0_W { + PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> Pd1W { - Pd1W::new(self, 4) + pub fn pd1(&mut self) -> PD1_W { + PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> Pd2W { - Pd2W::new(self, 8) + pub fn pd2(&mut self) -> PD2_W { + PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> Pd3W { - Pd3W::new(self, 12) + pub fn pd3(&mut self) -> PD3_W { + PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> Pd4W { - Pd4W::new(self, 16) + pub fn pd4(&mut self) -> PD4_W { + PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> Pd5W { - Pd5W::new(self, 20) + pub fn pd5(&mut self) -> PD5_W { + PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> Pd6W { - Pd6W::new(self, 24) + pub fn pd6(&mut self) -> PD6_W { + PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> Pd7W { - Pd7W::new(self, 28) + pub fn pd7(&mut self) -> PD7_W { + PD7_W::new(self, 28) } } #[doc = "Port 1 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr0Spec; -impl crate::RegisterSpec for Pdr0Spec { +pub struct PDR0_SPEC; +impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for Pdr0Spec {} +impl crate::Readable for PDR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for Pdr0Spec { +impl crate::Writable for PDR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for Pdr0Spec { +impl crate::Resettable for PDR0_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port1/pdr1.rs b/src/port1/pdr1.rs index dfa84aa9..56e238e2 100644 --- a/src/port1/pdr1.rs +++ b/src/port1/pdr1.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type Pd8R = crate::FieldReader; +pub type PD8_R = crate::FieldReader; #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type Pd9R = crate::FieldReader; +pub type PD9_R = crate::FieldReader; #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type Pd10R = crate::FieldReader; +pub type PD10_R = crate::FieldReader; #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type Pd10W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD10_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type Pd11R = crate::FieldReader; +pub type PD11_R = crate::FieldReader; #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type Pd11W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD11_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type Pd12R = crate::FieldReader; +pub type PD12_R = crate::FieldReader; #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type Pd13R = crate::FieldReader; +pub type PD13_R = crate::FieldReader; #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type Pd14R = crate::FieldReader; +pub type PD14_R = crate::FieldReader; #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type Pd15R = crate::FieldReader; +pub type PD15_R = crate::FieldReader; #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> Pd8R { - Pd8R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> PD8_R { + PD8_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> Pd9R { - Pd9R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> PD9_R { + PD9_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> Pd10R { - Pd10R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> PD10_R { + PD10_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> Pd11R { - Pd11R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> PD11_R { + PD11_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> Pd12R { - Pd12R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> PD12_R { + PD12_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> Pd13R { - Pd13R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> PD13_R { + PD13_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> Pd14R { - Pd14R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> PD14_R { + PD14_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> Pd15R { - Pd15R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> PD15_R { + PD15_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> Pd8W { - Pd8W::new(self, 0) + pub fn pd8(&mut self) -> PD8_W { + PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> Pd9W { - Pd9W::new(self, 4) + pub fn pd9(&mut self) -> PD9_W { + PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> Pd10W { - Pd10W::new(self, 8) + pub fn pd10(&mut self) -> PD10_W { + PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> Pd11W { - Pd11W::new(self, 12) + pub fn pd11(&mut self) -> PD11_W { + PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> Pd12W { - Pd12W::new(self, 16) + pub fn pd12(&mut self) -> PD12_W { + PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> Pd13W { - Pd13W::new(self, 20) + pub fn pd13(&mut self) -> PD13_W { + PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> Pd14W { - Pd14W::new(self, 24) + pub fn pd14(&mut self) -> PD14_W { + PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> Pd15W { - Pd15W::new(self, 28) + pub fn pd15(&mut self) -> PD15_W { + PD15_W::new(self, 28) } } #[doc = "Port 1 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr1Spec; -impl crate::RegisterSpec for Pdr1Spec { +pub struct PDR1_SPEC; +impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for Pdr1Spec {} +impl crate::Readable for PDR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for Pdr1Spec { +impl crate::Writable for PDR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for Pdr1Spec { +impl crate::Resettable for PDR1_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port1/pps.rs b/src/port1/pps.rs index 24cb868c..3356c5f5 100644 --- a/src/port1/pps.rs +++ b/src/port1/pps.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps0 { +pub enum PPS0_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps0) -> Self { + fn from(variant: PPS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type Pps0R = crate::BitReader; -impl Pps0R { +pub type PPS0_R = crate::BitReader; +impl PPS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps0 { + pub const fn variant(&self) -> PPS0_A { match self.bits { - false => Pps0::Value1, - true => Pps0::Value2, + false => PPS0_A::VALUE1, + true => PPS0_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps0::Value1 + *self == PPS0_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps0::Value2 + *self == PPS0_A::VALUE2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; -impl<'a, REG> Pps0W<'a, REG> +pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; +impl<'a, REG> PPS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps0::Value1) + self.variant(PPS0_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps0::Value2) + self.variant(PPS0_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps1 { +pub enum PPS1_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps1) -> Self { + fn from(variant: PPS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type Pps1R = crate::BitReader; -impl Pps1R { +pub type PPS1_R = crate::BitReader; +impl PPS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps1 { + pub const fn variant(&self) -> PPS1_A { match self.bits { - false => Pps1::Value1, - true => Pps1::Value2, + false => PPS1_A::VALUE1, + true => PPS1_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps1::Value1 + *self == PPS1_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps1::Value2 + *self == PPS1_A::VALUE2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; -impl<'a, REG> Pps1W<'a, REG> +pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; +impl<'a, REG> PPS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps1::Value1) + self.variant(PPS1_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps1::Value2) + self.variant(PPS1_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps2 { +pub enum PPS2_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps2) -> Self { + fn from(variant: PPS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type Pps2R = crate::BitReader; -impl Pps2R { +pub type PPS2_R = crate::BitReader; +impl PPS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps2 { + pub const fn variant(&self) -> PPS2_A { match self.bits { - false => Pps2::Value1, - true => Pps2::Value2, + false => PPS2_A::VALUE1, + true => PPS2_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps2::Value1 + *self == PPS2_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps2::Value2 + *self == PPS2_A::VALUE2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; -impl<'a, REG> Pps2W<'a, REG> +pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; +impl<'a, REG> PPS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps2::Value1) + self.variant(PPS2_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps2::Value2) + self.variant(PPS2_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps3 { +pub enum PPS3_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps3) -> Self { + fn from(variant: PPS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type Pps3R = crate::BitReader; -impl Pps3R { +pub type PPS3_R = crate::BitReader; +impl PPS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps3 { + pub const fn variant(&self) -> PPS3_A { match self.bits { - false => Pps3::Value1, - true => Pps3::Value2, + false => PPS3_A::VALUE1, + true => PPS3_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps3::Value1 + *self == PPS3_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps3::Value2 + *self == PPS3_A::VALUE2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; -impl<'a, REG> Pps3W<'a, REG> +pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; +impl<'a, REG> PPS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps3::Value1) + self.variant(PPS3_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps3::Value2) + self.variant(PPS3_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps4 { +pub enum PPS4_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps4) -> Self { + fn from(variant: PPS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type Pps4R = crate::BitReader; -impl Pps4R { +pub type PPS4_R = crate::BitReader; +impl PPS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps4 { + pub const fn variant(&self) -> PPS4_A { match self.bits { - false => Pps4::Value1, - true => Pps4::Value2, + false => PPS4_A::VALUE1, + true => PPS4_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps4::Value1 + *self == PPS4_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps4::Value2 + *self == PPS4_A::VALUE2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; -impl<'a, REG> Pps4W<'a, REG> +pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; +impl<'a, REG> PPS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps4::Value1) + self.variant(PPS4_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps4::Value2) + self.variant(PPS4_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps5 { +pub enum PPS5_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps5) -> Self { + fn from(variant: PPS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type Pps5R = crate::BitReader; -impl Pps5R { +pub type PPS5_R = crate::BitReader; +impl PPS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps5 { + pub const fn variant(&self) -> PPS5_A { match self.bits { - false => Pps5::Value1, - true => Pps5::Value2, + false => PPS5_A::VALUE1, + true => PPS5_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps5::Value1 + *self == PPS5_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps5::Value2 + *self == PPS5_A::VALUE2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; -impl<'a, REG> Pps5W<'a, REG> +pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; +impl<'a, REG> PPS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps5::Value1) + self.variant(PPS5_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps5::Value2) + self.variant(PPS5_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps6 { +pub enum PPS6_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps6) -> Self { + fn from(variant: PPS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type Pps6R = crate::BitReader; -impl Pps6R { +pub type PPS6_R = crate::BitReader; +impl PPS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps6 { + pub const fn variant(&self) -> PPS6_A { match self.bits { - false => Pps6::Value1, - true => Pps6::Value2, + false => PPS6_A::VALUE1, + true => PPS6_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps6::Value1 + *self == PPS6_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps6::Value2 + *self == PPS6_A::VALUE2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; -impl<'a, REG> Pps6W<'a, REG> +pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; +impl<'a, REG> PPS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps6::Value1) + self.variant(PPS6_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps6::Value2) + self.variant(PPS6_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps7 { +pub enum PPS7_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps7) -> Self { + fn from(variant: PPS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type Pps7R = crate::BitReader; -impl Pps7R { +pub type PPS7_R = crate::BitReader; +impl PPS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps7 { + pub const fn variant(&self) -> PPS7_A { match self.bits { - false => Pps7::Value1, - true => Pps7::Value2, + false => PPS7_A::VALUE1, + true => PPS7_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps7::Value1 + *self == PPS7_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps7::Value2 + *self == PPS7_A::VALUE2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; -impl<'a, REG> Pps7W<'a, REG> +pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; +impl<'a, REG> PPS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps7::Value1) + self.variant(PPS7_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps7::Value2) + self.variant(PPS7_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps8 { +pub enum PPS8_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps8) -> Self { + fn from(variant: PPS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type Pps8R = crate::BitReader; -impl Pps8R { +pub type PPS8_R = crate::BitReader; +impl PPS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps8 { + pub const fn variant(&self) -> PPS8_A { match self.bits { - false => Pps8::Value1, - true => Pps8::Value2, + false => PPS8_A::VALUE1, + true => PPS8_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps8::Value1 + *self == PPS8_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps8::Value2 + *self == PPS8_A::VALUE2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; -impl<'a, REG> Pps8W<'a, REG> +pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; +impl<'a, REG> PPS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps8::Value1) + self.variant(PPS8_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps8::Value2) + self.variant(PPS8_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps9 { +pub enum PPS9_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps9) -> Self { + fn from(variant: PPS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type Pps9R = crate::BitReader; -impl Pps9R { +pub type PPS9_R = crate::BitReader; +impl PPS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps9 { + pub const fn variant(&self) -> PPS9_A { match self.bits { - false => Pps9::Value1, - true => Pps9::Value2, + false => PPS9_A::VALUE1, + true => PPS9_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps9::Value1 + *self == PPS9_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps9::Value2 + *self == PPS9_A::VALUE2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; -impl<'a, REG> Pps9W<'a, REG> +pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; +impl<'a, REG> PPS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps9::Value1) + self.variant(PPS9_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps9::Value2) + self.variant(PPS9_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps10 { +pub enum PPS10_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps10) -> Self { + fn from(variant: PPS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type Pps10R = crate::BitReader; -impl Pps10R { +pub type PPS10_R = crate::BitReader; +impl PPS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps10 { + pub const fn variant(&self) -> PPS10_A { match self.bits { - false => Pps10::Value1, - true => Pps10::Value2, + false => PPS10_A::VALUE1, + true => PPS10_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps10::Value1 + *self == PPS10_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps10::Value2 + *self == PPS10_A::VALUE2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; -impl<'a, REG> Pps10W<'a, REG> +pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; +impl<'a, REG> PPS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps10::Value1) + self.variant(PPS10_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps10::Value2) + self.variant(PPS10_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps11 { +pub enum PPS11_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps11) -> Self { + fn from(variant: PPS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type Pps11R = crate::BitReader; -impl Pps11R { +pub type PPS11_R = crate::BitReader; +impl PPS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps11 { + pub const fn variant(&self) -> PPS11_A { match self.bits { - false => Pps11::Value1, - true => Pps11::Value2, + false => PPS11_A::VALUE1, + true => PPS11_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps11::Value1 + *self == PPS11_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps11::Value2 + *self == PPS11_A::VALUE2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; -impl<'a, REG> Pps11W<'a, REG> +pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; +impl<'a, REG> PPS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps11::Value1) + self.variant(PPS11_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps11::Value2) + self.variant(PPS11_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps12 { +pub enum PPS12_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps12) -> Self { + fn from(variant: PPS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type Pps12R = crate::BitReader; -impl Pps12R { +pub type PPS12_R = crate::BitReader; +impl PPS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps12 { + pub const fn variant(&self) -> PPS12_A { match self.bits { - false => Pps12::Value1, - true => Pps12::Value2, + false => PPS12_A::VALUE1, + true => PPS12_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps12::Value1 + *self == PPS12_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps12::Value2 + *self == PPS12_A::VALUE2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; -impl<'a, REG> Pps12W<'a, REG> +pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; +impl<'a, REG> PPS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps12::Value1) + self.variant(PPS12_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps12::Value2) + self.variant(PPS12_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps13 { +pub enum PPS13_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps13) -> Self { + fn from(variant: PPS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type Pps13R = crate::BitReader; -impl Pps13R { +pub type PPS13_R = crate::BitReader; +impl PPS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps13 { + pub const fn variant(&self) -> PPS13_A { match self.bits { - false => Pps13::Value1, - true => Pps13::Value2, + false => PPS13_A::VALUE1, + true => PPS13_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps13::Value1 + *self == PPS13_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps13::Value2 + *self == PPS13_A::VALUE2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; -impl<'a, REG> Pps13W<'a, REG> +pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; +impl<'a, REG> PPS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps13::Value1) + self.variant(PPS13_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps13::Value2) + self.variant(PPS13_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps14 { +pub enum PPS14_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps14) -> Self { + fn from(variant: PPS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type Pps14R = crate::BitReader; -impl Pps14R { +pub type PPS14_R = crate::BitReader; +impl PPS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps14 { + pub const fn variant(&self) -> PPS14_A { match self.bits { - false => Pps14::Value1, - true => Pps14::Value2, + false => PPS14_A::VALUE1, + true => PPS14_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps14::Value1 + *self == PPS14_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps14::Value2 + *self == PPS14_A::VALUE2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; -impl<'a, REG> Pps14W<'a, REG> +pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; +impl<'a, REG> PPS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps14::Value1) + self.variant(PPS14_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps14::Value2) + self.variant(PPS14_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps15 { +pub enum PPS15_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps15) -> Self { + fn from(variant: PPS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type Pps15R = crate::BitReader; -impl Pps15R { +pub type PPS15_R = crate::BitReader; +impl PPS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps15 { + pub const fn variant(&self) -> PPS15_A { match self.bits { - false => Pps15::Value1, - true => Pps15::Value2, + false => PPS15_A::VALUE1, + true => PPS15_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps15::Value1 + *self == PPS15_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps15::Value2 + *self == PPS15_A::VALUE2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; -impl<'a, REG> Pps15W<'a, REG> +pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; +impl<'a, REG> PPS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps15::Value1) + self.variant(PPS15_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps15::Value2) + self.variant(PPS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> Pps0R { - Pps0R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> PPS0_R { + PPS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> Pps1R { - Pps1R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> PPS1_R { + PPS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> Pps2R { - Pps2R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> PPS2_R { + PPS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> Pps3R { - Pps3R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> PPS3_R { + PPS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> Pps4R { - Pps4R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> PPS4_R { + PPS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> Pps5R { - Pps5R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> PPS5_R { + PPS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> Pps6R { - Pps6R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> PPS6_R { + PPS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> Pps7R { - Pps7R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> PPS7_R { + PPS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> Pps8R { - Pps8R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> PPS8_R { + PPS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> Pps9R { - Pps9R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> PPS9_R { + PPS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> Pps10R { - Pps10R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> PPS10_R { + PPS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> Pps11R { - Pps11R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> PPS11_R { + PPS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> Pps12R { - Pps12R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> PPS12_R { + PPS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> Pps13R { - Pps13R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> PPS13_R { + PPS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> Pps14R { - Pps14R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> PPS14_R { + PPS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> Pps15R { - Pps15R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> PPS15_R { + PPS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> Pps0W { - Pps0W::new(self, 0) + pub fn pps0(&mut self) -> PPS0_W { + PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> Pps1W { - Pps1W::new(self, 1) + pub fn pps1(&mut self) -> PPS1_W { + PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> Pps2W { - Pps2W::new(self, 2) + pub fn pps2(&mut self) -> PPS2_W { + PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> Pps3W { - Pps3W::new(self, 3) + pub fn pps3(&mut self) -> PPS3_W { + PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> Pps4W { - Pps4W::new(self, 4) + pub fn pps4(&mut self) -> PPS4_W { + PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> Pps5W { - Pps5W::new(self, 5) + pub fn pps5(&mut self) -> PPS5_W { + PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> Pps6W { - Pps6W::new(self, 6) + pub fn pps6(&mut self) -> PPS6_W { + PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> Pps7W { - Pps7W::new(self, 7) + pub fn pps7(&mut self) -> PPS7_W { + PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> Pps8W { - Pps8W::new(self, 8) + pub fn pps8(&mut self) -> PPS8_W { + PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> Pps9W { - Pps9W::new(self, 9) + pub fn pps9(&mut self) -> PPS9_W { + PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> Pps10W { - Pps10W::new(self, 10) + pub fn pps10(&mut self) -> PPS10_W { + PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> Pps11W { - Pps11W::new(self, 11) + pub fn pps11(&mut self) -> PPS11_W { + PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> Pps12W { - Pps12W::new(self, 12) + pub fn pps12(&mut self) -> PPS12_W { + PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> Pps13W { - Pps13W::new(self, 13) + pub fn pps13(&mut self) -> PPS13_W { + PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> Pps14W { - Pps14W::new(self, 14) + pub fn pps14(&mut self) -> PPS14_W { + PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> Pps15W { - Pps15W::new(self, 15) + pub fn pps15(&mut self) -> PPS15_W { + PPS15_W::new(self, 15) } } #[doc = "Port 1 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PpsSpec; -impl crate::RegisterSpec for PpsSpec { +pub struct PPS_SPEC; +impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PpsSpec {} +impl crate::Readable for PPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PpsSpec { +impl crate::Writable for PPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PpsSpec { +impl crate::Resettable for PPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14.rs b/src/port14.rs index f30c3235..11d83857 100644 --- a/src/port14.rs +++ b/src/port14.rs @@ -1,130 +1,120 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - out: Out, - omr: Omr, + out: OUT, + omr: OMR, _reserved2: [u8; 0x08], - iocr0: Iocr0, - iocr4: Iocr4, - iocr8: Iocr8, - iocr12: Iocr12, + iocr0: IOCR0, + iocr4: IOCR4, + iocr8: IOCR8, + iocr12: IOCR12, _reserved6: [u8; 0x04], - in_: In, + in_: IN, _reserved7: [u8; 0x38], - pdisc: Pdisc, + pdisc: PDISC, _reserved8: [u8; 0x0c], - pps: Pps, - hwsel: Hwsel, + pps: PPS, + hwsel: HWSEL, } impl RegisterBlock { #[doc = "0x00 - Port 14 Output Register"] #[inline(always)] - pub const fn out(&self) -> &Out { + pub const fn out(&self) -> &OUT { &self.out } #[doc = "0x04 - Port 14 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &Omr { + pub const fn omr(&self) -> &OMR { &self.omr } #[doc = "0x10 - Port 14 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &Iocr0 { + pub const fn iocr0(&self) -> &IOCR0 { &self.iocr0 } #[doc = "0x14 - Port 14 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &Iocr4 { + pub const fn iocr4(&self) -> &IOCR4 { &self.iocr4 } #[doc = "0x18 - Port 14 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &Iocr8 { + pub const fn iocr8(&self) -> &IOCR8 { &self.iocr8 } #[doc = "0x1c - Port 14 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &Iocr12 { + pub const fn iocr12(&self) -> &IOCR12 { &self.iocr12 } #[doc = "0x24 - Port 14 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &In { + pub const fn in_(&self) -> &IN { &self.in_ } #[doc = "0x60 - Port 14 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &Pdisc { + pub const fn pdisc(&self) -> &PDISC { &self.pdisc } #[doc = "0x70 - Port 14 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &Pps { + pub const fn pps(&self) -> &PPS { &self.pps } #[doc = "0x74 - Port 14 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &Hwsel { + pub const fn hwsel(&self) -> &HWSEL { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -#[doc(alias = "OUT")] -pub type Out = crate::Reg; +pub type OUT = crate::Reg; #[doc = "Port 14 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -#[doc(alias = "OMR")] -pub type Omr = crate::Reg; +pub type OMR = crate::Reg; #[doc = "Port 14 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -#[doc(alias = "IOCR0")] -pub type Iocr0 = crate::Reg; +pub type IOCR0 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -#[doc(alias = "IOCR4")] -pub type Iocr4 = crate::Reg; +pub type IOCR4 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -#[doc(alias = "IOCR8")] -pub type Iocr8 = crate::Reg; +pub type IOCR8 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -#[doc(alias = "IOCR12")] -pub type Iocr12 = crate::Reg; +pub type IOCR12 = crate::Reg; #[doc = "Port 14 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Port 14 Input Register"] pub mod in_; #[doc = "PDISC (rw) register accessor: Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -#[doc(alias = "PDISC")] -pub type Pdisc = crate::Reg; +pub type PDISC = crate::Reg; #[doc = "Port 14 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -#[doc(alias = "PPS")] -pub type Pps = crate::Reg; +pub type PPS = crate::Reg; #[doc = "Port 14 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -#[doc(alias = "HWSEL")] -pub type Hwsel = crate::Reg; +pub type HWSEL = crate::Reg; #[doc = "Port 14 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port14/hwsel.rs b/src/port14/hwsel.rs index 4c2b9ea3..a9c6c7cd 100644 --- a/src/port14/hwsel.rs +++ b/src/port14/hwsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw0 { +pub enum HW0_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw0) -> Self { + fn from(variant: HW0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw0 { +impl crate::FieldSpec for HW0_A { type Ux = u8; } -impl crate::IsEnum for Hw0 {} +impl crate::IsEnum for HW0_A {} #[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type Hw0R = crate::FieldReader; -impl Hw0R { +pub type HW0_R = crate::FieldReader; +impl HW0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw0::Value1), - 1 => Some(Hw0::Value2), - 2 => Some(Hw0::Value3), + 0 => Some(HW0_A::VALUE1), + 1 => Some(HW0_A::VALUE2), + 2 => Some(HW0_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw0::Value1 + *self == HW0_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw0::Value2 + *self == HW0_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw0::Value3 + *self == HW0_A::VALUE3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; -impl<'a, REG> Hw0W<'a, REG> +pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; +impl<'a, REG> HW0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw0::Value1) + self.variant(HW0_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw0::Value2) + self.variant(HW0_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw0::Value3) + self.variant(HW0_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw1 { +pub enum HW1_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw1) -> Self { + fn from(variant: HW1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw1 { +impl crate::FieldSpec for HW1_A { type Ux = u8; } -impl crate::IsEnum for Hw1 {} +impl crate::IsEnum for HW1_A {} #[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type Hw1R = crate::FieldReader; -impl Hw1R { +pub type HW1_R = crate::FieldReader; +impl HW1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw1::Value1), - 1 => Some(Hw1::Value2), - 2 => Some(Hw1::Value3), + 0 => Some(HW1_A::VALUE1), + 1 => Some(HW1_A::VALUE2), + 2 => Some(HW1_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw1::Value1 + *self == HW1_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw1::Value2 + *self == HW1_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw1::Value3 + *self == HW1_A::VALUE3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; -impl<'a, REG> Hw1W<'a, REG> +pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; +impl<'a, REG> HW1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw1::Value1) + self.variant(HW1_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw1::Value2) + self.variant(HW1_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw1::Value3) + self.variant(HW1_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw2 { +pub enum HW2_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw2) -> Self { + fn from(variant: HW2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw2 { +impl crate::FieldSpec for HW2_A { type Ux = u8; } -impl crate::IsEnum for Hw2 {} +impl crate::IsEnum for HW2_A {} #[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type Hw2R = crate::FieldReader; -impl Hw2R { +pub type HW2_R = crate::FieldReader; +impl HW2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw2::Value1), - 1 => Some(Hw2::Value2), - 2 => Some(Hw2::Value3), + 0 => Some(HW2_A::VALUE1), + 1 => Some(HW2_A::VALUE2), + 2 => Some(HW2_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw2::Value1 + *self == HW2_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw2::Value2 + *self == HW2_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw2::Value3 + *self == HW2_A::VALUE3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; -impl<'a, REG> Hw2W<'a, REG> +pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; +impl<'a, REG> HW2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw2::Value1) + self.variant(HW2_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw2::Value2) + self.variant(HW2_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw2::Value3) + self.variant(HW2_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw3 { +pub enum HW3_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw3) -> Self { + fn from(variant: HW3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw3 { +impl crate::FieldSpec for HW3_A { type Ux = u8; } -impl crate::IsEnum for Hw3 {} +impl crate::IsEnum for HW3_A {} #[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type Hw3R = crate::FieldReader; -impl Hw3R { +pub type HW3_R = crate::FieldReader; +impl HW3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw3::Value1), - 1 => Some(Hw3::Value2), - 2 => Some(Hw3::Value3), + 0 => Some(HW3_A::VALUE1), + 1 => Some(HW3_A::VALUE2), + 2 => Some(HW3_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw3::Value1 + *self == HW3_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw3::Value2 + *self == HW3_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw3::Value3 + *self == HW3_A::VALUE3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; -impl<'a, REG> Hw3W<'a, REG> +pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; +impl<'a, REG> HW3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,72 +281,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw3::Value1) + self.variant(HW3_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw3::Value2) + self.variant(HW3_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw3::Value3) + self.variant(HW3_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw4 { +pub enum HW4_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw4) -> Self { + fn from(variant: HW4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw4 { +impl crate::FieldSpec for HW4_A { type Ux = u8; } -impl crate::IsEnum for Hw4 {} +impl crate::IsEnum for HW4_A {} #[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type Hw4R = crate::FieldReader; -impl Hw4R { +pub type HW4_R = crate::FieldReader; +impl HW4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw4::Value1), - 1 => Some(Hw4::Value2), - 2 => Some(Hw4::Value3), + 0 => Some(HW4_A::VALUE1), + 1 => Some(HW4_A::VALUE2), + 2 => Some(HW4_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw4::Value1 + *self == HW4_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw4::Value2 + *self == HW4_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw4::Value3 + *self == HW4_A::VALUE3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; -impl<'a, REG> Hw4W<'a, REG> +pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; +impl<'a, REG> HW4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -354,72 +354,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw4::Value1) + self.variant(HW4_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw4::Value2) + self.variant(HW4_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw4::Value3) + self.variant(HW4_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw5 { +pub enum HW5_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw5) -> Self { + fn from(variant: HW5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw5 { +impl crate::FieldSpec for HW5_A { type Ux = u8; } -impl crate::IsEnum for Hw5 {} +impl crate::IsEnum for HW5_A {} #[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type Hw5R = crate::FieldReader; -impl Hw5R { +pub type HW5_R = crate::FieldReader; +impl HW5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw5::Value1), - 1 => Some(Hw5::Value2), - 2 => Some(Hw5::Value3), + 0 => Some(HW5_A::VALUE1), + 1 => Some(HW5_A::VALUE2), + 2 => Some(HW5_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw5::Value1 + *self == HW5_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw5::Value2 + *self == HW5_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw5::Value3 + *self == HW5_A::VALUE3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; -impl<'a, REG> Hw5W<'a, REG> +pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; +impl<'a, REG> HW5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,72 +427,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw5::Value1) + self.variant(HW5_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw5::Value2) + self.variant(HW5_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw5::Value3) + self.variant(HW5_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw6 { +pub enum HW6_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw6) -> Self { + fn from(variant: HW6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw6 { +impl crate::FieldSpec for HW6_A { type Ux = u8; } -impl crate::IsEnum for Hw6 {} +impl crate::IsEnum for HW6_A {} #[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type Hw6R = crate::FieldReader; -impl Hw6R { +pub type HW6_R = crate::FieldReader; +impl HW6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw6::Value1), - 1 => Some(Hw6::Value2), - 2 => Some(Hw6::Value3), + 0 => Some(HW6_A::VALUE1), + 1 => Some(HW6_A::VALUE2), + 2 => Some(HW6_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw6::Value1 + *self == HW6_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw6::Value2 + *self == HW6_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw6::Value3 + *self == HW6_A::VALUE3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; -impl<'a, REG> Hw6W<'a, REG> +pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; +impl<'a, REG> HW6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw6::Value1) + self.variant(HW6_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw6::Value2) + self.variant(HW6_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw6::Value3) + self.variant(HW6_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw7 { +pub enum HW7_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw7) -> Self { + fn from(variant: HW7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw7 { +impl crate::FieldSpec for HW7_A { type Ux = u8; } -impl crate::IsEnum for Hw7 {} +impl crate::IsEnum for HW7_A {} #[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type Hw7R = crate::FieldReader; -impl Hw7R { +pub type HW7_R = crate::FieldReader; +impl HW7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw7::Value1), - 1 => Some(Hw7::Value2), - 2 => Some(Hw7::Value3), + 0 => Some(HW7_A::VALUE1), + 1 => Some(HW7_A::VALUE2), + 2 => Some(HW7_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw7::Value1 + *self == HW7_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw7::Value2 + *self == HW7_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw7::Value3 + *self == HW7_A::VALUE3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; -impl<'a, REG> Hw7W<'a, REG> +pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; +impl<'a, REG> HW7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,72 +573,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw7::Value1) + self.variant(HW7_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw7::Value2) + self.variant(HW7_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw7::Value3) + self.variant(HW7_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw8 { +pub enum HW8_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw8) -> Self { + fn from(variant: HW8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw8 { +impl crate::FieldSpec for HW8_A { type Ux = u8; } -impl crate::IsEnum for Hw8 {} +impl crate::IsEnum for HW8_A {} #[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type Hw8R = crate::FieldReader; -impl Hw8R { +pub type HW8_R = crate::FieldReader; +impl HW8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw8::Value1), - 1 => Some(Hw8::Value2), - 2 => Some(Hw8::Value3), + 0 => Some(HW8_A::VALUE1), + 1 => Some(HW8_A::VALUE2), + 2 => Some(HW8_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw8::Value1 + *self == HW8_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw8::Value2 + *self == HW8_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw8::Value3 + *self == HW8_A::VALUE3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; -impl<'a, REG> Hw8W<'a, REG> +pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; +impl<'a, REG> HW8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -646,72 +646,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw8::Value1) + self.variant(HW8_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw8::Value2) + self.variant(HW8_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw8::Value3) + self.variant(HW8_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw9 { +pub enum HW9_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw9) -> Self { + fn from(variant: HW9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw9 { +impl crate::FieldSpec for HW9_A { type Ux = u8; } -impl crate::IsEnum for Hw9 {} +impl crate::IsEnum for HW9_A {} #[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type Hw9R = crate::FieldReader; -impl Hw9R { +pub type HW9_R = crate::FieldReader; +impl HW9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw9::Value1), - 1 => Some(Hw9::Value2), - 2 => Some(Hw9::Value3), + 0 => Some(HW9_A::VALUE1), + 1 => Some(HW9_A::VALUE2), + 2 => Some(HW9_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw9::Value1 + *self == HW9_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw9::Value2 + *self == HW9_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw9::Value3 + *self == HW9_A::VALUE3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; -impl<'a, REG> Hw9W<'a, REG> +pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; +impl<'a, REG> HW9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -719,72 +719,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw9::Value1) + self.variant(HW9_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw9::Value2) + self.variant(HW9_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw9::Value3) + self.variant(HW9_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw10 { +pub enum HW10_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw10) -> Self { + fn from(variant: HW10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw10 { +impl crate::FieldSpec for HW10_A { type Ux = u8; } -impl crate::IsEnum for Hw10 {} +impl crate::IsEnum for HW10_A {} #[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type Hw10R = crate::FieldReader; -impl Hw10R { +pub type HW10_R = crate::FieldReader; +impl HW10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw10::Value1), - 1 => Some(Hw10::Value2), - 2 => Some(Hw10::Value3), + 0 => Some(HW10_A::VALUE1), + 1 => Some(HW10_A::VALUE2), + 2 => Some(HW10_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw10::Value1 + *self == HW10_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw10::Value2 + *self == HW10_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw10::Value3 + *self == HW10_A::VALUE3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; -impl<'a, REG> Hw10W<'a, REG> +pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; +impl<'a, REG> HW10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,72 +792,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw10::Value1) + self.variant(HW10_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw10::Value2) + self.variant(HW10_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw10::Value3) + self.variant(HW10_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw11 { +pub enum HW11_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw11) -> Self { + fn from(variant: HW11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw11 { +impl crate::FieldSpec for HW11_A { type Ux = u8; } -impl crate::IsEnum for Hw11 {} +impl crate::IsEnum for HW11_A {} #[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type Hw11R = crate::FieldReader; -impl Hw11R { +pub type HW11_R = crate::FieldReader; +impl HW11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw11::Value1), - 1 => Some(Hw11::Value2), - 2 => Some(Hw11::Value3), + 0 => Some(HW11_A::VALUE1), + 1 => Some(HW11_A::VALUE2), + 2 => Some(HW11_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw11::Value1 + *self == HW11_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw11::Value2 + *self == HW11_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw11::Value3 + *self == HW11_A::VALUE3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; -impl<'a, REG> Hw11W<'a, REG> +pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; +impl<'a, REG> HW11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,72 +865,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw11::Value1) + self.variant(HW11_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw11::Value2) + self.variant(HW11_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw11::Value3) + self.variant(HW11_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw12 { +pub enum HW12_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw12) -> Self { + fn from(variant: HW12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw12 { +impl crate::FieldSpec for HW12_A { type Ux = u8; } -impl crate::IsEnum for Hw12 {} +impl crate::IsEnum for HW12_A {} #[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type Hw12R = crate::FieldReader; -impl Hw12R { +pub type HW12_R = crate::FieldReader; +impl HW12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw12::Value1), - 1 => Some(Hw12::Value2), - 2 => Some(Hw12::Value3), + 0 => Some(HW12_A::VALUE1), + 1 => Some(HW12_A::VALUE2), + 2 => Some(HW12_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw12::Value1 + *self == HW12_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw12::Value2 + *self == HW12_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw12::Value3 + *self == HW12_A::VALUE3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; -impl<'a, REG> Hw12W<'a, REG> +pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; +impl<'a, REG> HW12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -938,72 +938,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw12::Value1) + self.variant(HW12_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw12::Value2) + self.variant(HW12_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw12::Value3) + self.variant(HW12_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw13 { +pub enum HW13_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw13) -> Self { + fn from(variant: HW13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw13 { +impl crate::FieldSpec for HW13_A { type Ux = u8; } -impl crate::IsEnum for Hw13 {} +impl crate::IsEnum for HW13_A {} #[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type Hw13R = crate::FieldReader; -impl Hw13R { +pub type HW13_R = crate::FieldReader; +impl HW13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw13::Value1), - 1 => Some(Hw13::Value2), - 2 => Some(Hw13::Value3), + 0 => Some(HW13_A::VALUE1), + 1 => Some(HW13_A::VALUE2), + 2 => Some(HW13_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw13::Value1 + *self == HW13_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw13::Value2 + *self == HW13_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw13::Value3 + *self == HW13_A::VALUE3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; -impl<'a, REG> Hw13W<'a, REG> +pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; +impl<'a, REG> HW13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1011,72 +1011,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw13::Value1) + self.variant(HW13_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw13::Value2) + self.variant(HW13_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw13::Value3) + self.variant(HW13_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw14 { +pub enum HW14_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw14) -> Self { + fn from(variant: HW14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw14 { +impl crate::FieldSpec for HW14_A { type Ux = u8; } -impl crate::IsEnum for Hw14 {} +impl crate::IsEnum for HW14_A {} #[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type Hw14R = crate::FieldReader; -impl Hw14R { +pub type HW14_R = crate::FieldReader; +impl HW14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw14::Value1), - 1 => Some(Hw14::Value2), - 2 => Some(Hw14::Value3), + 0 => Some(HW14_A::VALUE1), + 1 => Some(HW14_A::VALUE2), + 2 => Some(HW14_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw14::Value1 + *self == HW14_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw14::Value2 + *self == HW14_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw14::Value3 + *self == HW14_A::VALUE3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; -impl<'a, REG> Hw14W<'a, REG> +pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; +impl<'a, REG> HW14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1084,72 +1084,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw14::Value1) + self.variant(HW14_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw14::Value2) + self.variant(HW14_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw14::Value3) + self.variant(HW14_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw15 { +pub enum HW15_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw15) -> Self { + fn from(variant: HW15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw15 { +impl crate::FieldSpec for HW15_A { type Ux = u8; } -impl crate::IsEnum for Hw15 {} +impl crate::IsEnum for HW15_A {} #[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type Hw15R = crate::FieldReader; -impl Hw15R { +pub type HW15_R = crate::FieldReader; +impl HW15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw15::Value1), - 1 => Some(Hw15::Value2), - 2 => Some(Hw15::Value3), + 0 => Some(HW15_A::VALUE1), + 1 => Some(HW15_A::VALUE2), + 2 => Some(HW15_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw15::Value1 + *self == HW15_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw15::Value2 + *self == HW15_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw15::Value3 + *self == HW15_A::VALUE3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; -impl<'a, REG> Hw15W<'a, REG> +pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; +impl<'a, REG> HW15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1157,213 +1157,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw15::Value1) + self.variant(HW15_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw15::Value2) + self.variant(HW15_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw15::Value3) + self.variant(HW15_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> Hw0R { - Hw0R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> HW0_R { + HW0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> Hw1R { - Hw1R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> HW1_R { + HW1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> Hw2R { - Hw2R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> HW2_R { + HW2_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> Hw3R { - Hw3R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> HW3_R { + HW3_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> Hw4R { - Hw4R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> HW4_R { + HW4_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> Hw5R { - Hw5R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> HW5_R { + HW5_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> Hw6R { - Hw6R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> HW6_R { + HW6_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> Hw7R { - Hw7R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> HW7_R { + HW7_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> Hw8R { - Hw8R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> HW8_R { + HW8_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> Hw9R { - Hw9R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> HW9_R { + HW9_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> Hw10R { - Hw10R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> HW10_R { + HW10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> Hw11R { - Hw11R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> HW11_R { + HW11_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> Hw12R { - Hw12R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> HW12_R { + HW12_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> Hw13R { - Hw13R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> HW13_R { + HW13_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> Hw14R { - Hw14R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> HW14_R { + HW14_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> Hw15R { - Hw15R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> HW15_R { + HW15_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> Hw0W { - Hw0W::new(self, 0) + pub fn hw0(&mut self) -> HW0_W { + HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> Hw1W { - Hw1W::new(self, 2) + pub fn hw1(&mut self) -> HW1_W { + HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> Hw2W { - Hw2W::new(self, 4) + pub fn hw2(&mut self) -> HW2_W { + HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> Hw3W { - Hw3W::new(self, 6) + pub fn hw3(&mut self) -> HW3_W { + HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> Hw4W { - Hw4W::new(self, 8) + pub fn hw4(&mut self) -> HW4_W { + HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> Hw5W { - Hw5W::new(self, 10) + pub fn hw5(&mut self) -> HW5_W { + HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> Hw6W { - Hw6W::new(self, 12) + pub fn hw6(&mut self) -> HW6_W { + HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> Hw7W { - Hw7W::new(self, 14) + pub fn hw7(&mut self) -> HW7_W { + HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> Hw8W { - Hw8W::new(self, 16) + pub fn hw8(&mut self) -> HW8_W { + HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> Hw9W { - Hw9W::new(self, 18) + pub fn hw9(&mut self) -> HW9_W { + HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> Hw10W { - Hw10W::new(self, 20) + pub fn hw10(&mut self) -> HW10_W { + HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> Hw11W { - Hw11W::new(self, 22) + pub fn hw11(&mut self) -> HW11_W { + HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> Hw12W { - Hw12W::new(self, 24) + pub fn hw12(&mut self) -> HW12_W { + HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> Hw13W { - Hw13W::new(self, 26) + pub fn hw13(&mut self) -> HW13_W { + HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> Hw14W { - Hw14W::new(self, 28) + pub fn hw14(&mut self) -> HW14_W { + HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> Hw15W { - Hw15W::new(self, 30) + pub fn hw15(&mut self) -> HW15_W { + HW15_W::new(self, 30) } } #[doc = "Port 14 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HwselSpec; -impl crate::RegisterSpec for HwselSpec { +pub struct HWSEL_SPEC; +impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HwselSpec {} +impl crate::Readable for HWSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HwselSpec { +impl crate::Writable for HWSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HwselSpec { +impl crate::Resettable for HWSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/in_.rs b/src/port14/in_.rs index f2dd9254..eb4f9a66 100644 --- a/src/port14/in_.rs +++ b/src/port14/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 14 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for InSpec {} +impl crate::Readable for IN_SPEC {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr0.rs b/src/port14/iocr0.rs index 4c4fe348..5b2df41f 100644 --- a/src/port14/iocr0.rs +++ b/src/port14/iocr0.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc0 { +pub enum PC0_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc0) -> Self { + fn from(variant: PC0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc0 { +impl crate::FieldSpec for PC0_A { type Ux = u8; } -impl crate::IsEnum for Pc0 {} +impl crate::IsEnum for PC0_A {} #[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc0R = crate::FieldReader; -impl Pc0R { +pub type PC0_R = crate::FieldReader; +impl PC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc0::Value1), - 1 => Some(Pc0::Value2), - 2 => Some(Pc0::Value3), - 3 => Some(Pc0::Value4), - 4 => Some(Pc0::Value5), - 5 => Some(Pc0::Value6), - 6 => Some(Pc0::Value7), - 7 => Some(Pc0::Value8), - 16 => Some(Pc0::Value9), - 17 => Some(Pc0::Value10), - 18 => Some(Pc0::Value11), - 19 => Some(Pc0::Value12), - 20 => Some(Pc0::Value13), - 24 => Some(Pc0::Value14), - 25 => Some(Pc0::Value15), - 26 => Some(Pc0::Value16), - 27 => Some(Pc0::Value17), - 28 => Some(Pc0::Value18), + 0 => Some(PC0_A::VALUE1), + 1 => Some(PC0_A::VALUE2), + 2 => Some(PC0_A::VALUE3), + 3 => Some(PC0_A::VALUE4), + 4 => Some(PC0_A::VALUE5), + 5 => Some(PC0_A::VALUE6), + 6 => Some(PC0_A::VALUE7), + 7 => Some(PC0_A::VALUE8), + 16 => Some(PC0_A::VALUE9), + 17 => Some(PC0_A::VALUE10), + 18 => Some(PC0_A::VALUE11), + 19 => Some(PC0_A::VALUE12), + 20 => Some(PC0_A::VALUE13), + 24 => Some(PC0_A::VALUE14), + 25 => Some(PC0_A::VALUE15), + 26 => Some(PC0_A::VALUE16), + 27 => Some(PC0_A::VALUE17), + 28 => Some(PC0_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc0::Value1 + *self == PC0_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc0::Value2 + *self == PC0_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc0::Value3 + *self == PC0_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc0::Value4 + *self == PC0_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc0::Value5 + *self == PC0_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc0::Value6 + *self == PC0_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc0::Value7 + *self == PC0_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc0::Value8 + *self == PC0_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc0::Value9 + *self == PC0_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc0::Value10 + *self == PC0_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc0::Value11 + *self == PC0_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc0::Value12 + *self == PC0_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc0::Value13 + *self == PC0_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc0::Value14 + *self == PC0_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc0::Value15 + *self == PC0_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc0::Value16 + *self == PC0_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc0::Value17 + *self == PC0_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc0::Value18 + *self == PC0_A::VALUE18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; -impl<'a, REG> Pc0W<'a, REG> +pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; +impl<'a, REG> PC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc0::Value1) + self.variant(PC0_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc0::Value2) + self.variant(PC0_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc0::Value3) + self.variant(PC0_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc0::Value4) + self.variant(PC0_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc0::Value5) + self.variant(PC0_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc0::Value6) + self.variant(PC0_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc0::Value7) + self.variant(PC0_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc0::Value8) + self.variant(PC0_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc0::Value9) + self.variant(PC0_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc0::Value10) + self.variant(PC0_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc0::Value11) + self.variant(PC0_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc0::Value12) + self.variant(PC0_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc0::Value13) + self.variant(PC0_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc0::Value14) + self.variant(PC0_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc0::Value15) + self.variant(PC0_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc0::Value16) + self.variant(PC0_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc0::Value17) + self.variant(PC0_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc0::Value18) + self.variant(PC0_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc1 { +pub enum PC1_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc1) -> Self { + fn from(variant: PC1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc1 { +impl crate::FieldSpec for PC1_A { type Ux = u8; } -impl crate::IsEnum for Pc1 {} +impl crate::IsEnum for PC1_A {} #[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc1R = crate::FieldReader; -impl Pc1R { +pub type PC1_R = crate::FieldReader; +impl PC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc1::Value1), - 1 => Some(Pc1::Value2), - 2 => Some(Pc1::Value3), - 3 => Some(Pc1::Value4), - 4 => Some(Pc1::Value5), - 5 => Some(Pc1::Value6), - 6 => Some(Pc1::Value7), - 7 => Some(Pc1::Value8), - 16 => Some(Pc1::Value9), - 17 => Some(Pc1::Value10), - 18 => Some(Pc1::Value11), - 19 => Some(Pc1::Value12), - 20 => Some(Pc1::Value13), - 24 => Some(Pc1::Value14), - 25 => Some(Pc1::Value15), - 26 => Some(Pc1::Value16), - 27 => Some(Pc1::Value17), - 28 => Some(Pc1::Value18), + 0 => Some(PC1_A::VALUE1), + 1 => Some(PC1_A::VALUE2), + 2 => Some(PC1_A::VALUE3), + 3 => Some(PC1_A::VALUE4), + 4 => Some(PC1_A::VALUE5), + 5 => Some(PC1_A::VALUE6), + 6 => Some(PC1_A::VALUE7), + 7 => Some(PC1_A::VALUE8), + 16 => Some(PC1_A::VALUE9), + 17 => Some(PC1_A::VALUE10), + 18 => Some(PC1_A::VALUE11), + 19 => Some(PC1_A::VALUE12), + 20 => Some(PC1_A::VALUE13), + 24 => Some(PC1_A::VALUE14), + 25 => Some(PC1_A::VALUE15), + 26 => Some(PC1_A::VALUE16), + 27 => Some(PC1_A::VALUE17), + 28 => Some(PC1_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc1::Value1 + *self == PC1_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc1::Value2 + *self == PC1_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc1::Value3 + *self == PC1_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc1::Value4 + *self == PC1_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc1::Value5 + *self == PC1_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc1::Value6 + *self == PC1_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc1::Value7 + *self == PC1_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc1::Value8 + *self == PC1_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc1::Value9 + *self == PC1_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc1::Value10 + *self == PC1_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc1::Value11 + *self == PC1_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc1::Value12 + *self == PC1_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc1::Value13 + *self == PC1_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc1::Value14 + *self == PC1_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc1::Value15 + *self == PC1_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc1::Value16 + *self == PC1_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc1::Value17 + *self == PC1_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc1::Value18 + *self == PC1_A::VALUE18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; -impl<'a, REG> Pc1W<'a, REG> +pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; +impl<'a, REG> PC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc1::Value1) + self.variant(PC1_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc1::Value2) + self.variant(PC1_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc1::Value3) + self.variant(PC1_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc1::Value4) + self.variant(PC1_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc1::Value5) + self.variant(PC1_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc1::Value6) + self.variant(PC1_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc1::Value7) + self.variant(PC1_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc1::Value8) + self.variant(PC1_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc1::Value9) + self.variant(PC1_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc1::Value10) + self.variant(PC1_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc1::Value11) + self.variant(PC1_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc1::Value12) + self.variant(PC1_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc1::Value13) + self.variant(PC1_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc1::Value14) + self.variant(PC1_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc1::Value15) + self.variant(PC1_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc1::Value16) + self.variant(PC1_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc1::Value17) + self.variant(PC1_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc1::Value18) + self.variant(PC1_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc2 { +pub enum PC2_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc2) -> Self { + fn from(variant: PC2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc2 { +impl crate::FieldSpec for PC2_A { type Ux = u8; } -impl crate::IsEnum for Pc2 {} +impl crate::IsEnum for PC2_A {} #[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc2R = crate::FieldReader; -impl Pc2R { +pub type PC2_R = crate::FieldReader; +impl PC2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc2::Value1), - 1 => Some(Pc2::Value2), - 2 => Some(Pc2::Value3), - 3 => Some(Pc2::Value4), - 4 => Some(Pc2::Value5), - 5 => Some(Pc2::Value6), - 6 => Some(Pc2::Value7), - 7 => Some(Pc2::Value8), - 16 => Some(Pc2::Value9), - 17 => Some(Pc2::Value10), - 18 => Some(Pc2::Value11), - 19 => Some(Pc2::Value12), - 20 => Some(Pc2::Value13), - 24 => Some(Pc2::Value14), - 25 => Some(Pc2::Value15), - 26 => Some(Pc2::Value16), - 27 => Some(Pc2::Value17), - 28 => Some(Pc2::Value18), + 0 => Some(PC2_A::VALUE1), + 1 => Some(PC2_A::VALUE2), + 2 => Some(PC2_A::VALUE3), + 3 => Some(PC2_A::VALUE4), + 4 => Some(PC2_A::VALUE5), + 5 => Some(PC2_A::VALUE6), + 6 => Some(PC2_A::VALUE7), + 7 => Some(PC2_A::VALUE8), + 16 => Some(PC2_A::VALUE9), + 17 => Some(PC2_A::VALUE10), + 18 => Some(PC2_A::VALUE11), + 19 => Some(PC2_A::VALUE12), + 20 => Some(PC2_A::VALUE13), + 24 => Some(PC2_A::VALUE14), + 25 => Some(PC2_A::VALUE15), + 26 => Some(PC2_A::VALUE16), + 27 => Some(PC2_A::VALUE17), + 28 => Some(PC2_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc2::Value1 + *self == PC2_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc2::Value2 + *self == PC2_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc2::Value3 + *self == PC2_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc2::Value4 + *self == PC2_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc2::Value5 + *self == PC2_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc2::Value6 + *self == PC2_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc2::Value7 + *self == PC2_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc2::Value8 + *self == PC2_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc2::Value9 + *self == PC2_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc2::Value10 + *self == PC2_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc2::Value11 + *self == PC2_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc2::Value12 + *self == PC2_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc2::Value13 + *self == PC2_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc2::Value14 + *self == PC2_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc2::Value15 + *self == PC2_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc2::Value16 + *self == PC2_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc2::Value17 + *self == PC2_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc2::Value18 + *self == PC2_A::VALUE18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; -impl<'a, REG> Pc2W<'a, REG> +pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; +impl<'a, REG> PC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc2::Value1) + self.variant(PC2_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc2::Value2) + self.variant(PC2_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc2::Value3) + self.variant(PC2_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc2::Value4) + self.variant(PC2_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc2::Value5) + self.variant(PC2_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc2::Value6) + self.variant(PC2_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc2::Value7) + self.variant(PC2_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc2::Value8) + self.variant(PC2_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc2::Value9) + self.variant(PC2_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc2::Value10) + self.variant(PC2_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc2::Value11) + self.variant(PC2_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc2::Value12) + self.variant(PC2_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc2::Value13) + self.variant(PC2_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc2::Value14) + self.variant(PC2_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc2::Value15) + self.variant(PC2_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc2::Value16) + self.variant(PC2_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc2::Value17) + self.variant(PC2_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc2::Value18) + self.variant(PC2_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc3 { +pub enum PC3_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc3) -> Self { + fn from(variant: PC3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc3 { +impl crate::FieldSpec for PC3_A { type Ux = u8; } -impl crate::IsEnum for Pc3 {} +impl crate::IsEnum for PC3_A {} #[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc3R = crate::FieldReader; -impl Pc3R { +pub type PC3_R = crate::FieldReader; +impl PC3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc3::Value1), - 1 => Some(Pc3::Value2), - 2 => Some(Pc3::Value3), - 3 => Some(Pc3::Value4), - 4 => Some(Pc3::Value5), - 5 => Some(Pc3::Value6), - 6 => Some(Pc3::Value7), - 7 => Some(Pc3::Value8), - 16 => Some(Pc3::Value9), - 17 => Some(Pc3::Value10), - 18 => Some(Pc3::Value11), - 19 => Some(Pc3::Value12), - 20 => Some(Pc3::Value13), - 24 => Some(Pc3::Value14), - 25 => Some(Pc3::Value15), - 26 => Some(Pc3::Value16), - 27 => Some(Pc3::Value17), - 28 => Some(Pc3::Value18), + 0 => Some(PC3_A::VALUE1), + 1 => Some(PC3_A::VALUE2), + 2 => Some(PC3_A::VALUE3), + 3 => Some(PC3_A::VALUE4), + 4 => Some(PC3_A::VALUE5), + 5 => Some(PC3_A::VALUE6), + 6 => Some(PC3_A::VALUE7), + 7 => Some(PC3_A::VALUE8), + 16 => Some(PC3_A::VALUE9), + 17 => Some(PC3_A::VALUE10), + 18 => Some(PC3_A::VALUE11), + 19 => Some(PC3_A::VALUE12), + 20 => Some(PC3_A::VALUE13), + 24 => Some(PC3_A::VALUE14), + 25 => Some(PC3_A::VALUE15), + 26 => Some(PC3_A::VALUE16), + 27 => Some(PC3_A::VALUE17), + 28 => Some(PC3_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc3::Value1 + *self == PC3_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc3::Value2 + *self == PC3_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc3::Value3 + *self == PC3_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc3::Value4 + *self == PC3_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc3::Value5 + *self == PC3_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc3::Value6 + *self == PC3_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc3::Value7 + *self == PC3_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc3::Value8 + *self == PC3_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc3::Value9 + *self == PC3_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc3::Value10 + *self == PC3_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc3::Value11 + *self == PC3_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc3::Value12 + *self == PC3_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc3::Value13 + *self == PC3_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc3::Value14 + *self == PC3_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc3::Value15 + *self == PC3_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc3::Value16 + *self == PC3_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc3::Value17 + *self == PC3_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc3::Value18 + *self == PC3_A::VALUE18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; -impl<'a, REG> Pc3W<'a, REG> +pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; +impl<'a, REG> PC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc3::Value1) + self.variant(PC3_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc3::Value2) + self.variant(PC3_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc3::Value3) + self.variant(PC3_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc3::Value4) + self.variant(PC3_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc3::Value5) + self.variant(PC3_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc3::Value6) + self.variant(PC3_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc3::Value7) + self.variant(PC3_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc3::Value8) + self.variant(PC3_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc3::Value9) + self.variant(PC3_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc3::Value10) + self.variant(PC3_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc3::Value11) + self.variant(PC3_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc3::Value12) + self.variant(PC3_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc3::Value13) + self.variant(PC3_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc3::Value14) + self.variant(PC3_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc3::Value15) + self.variant(PC3_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc3::Value16) + self.variant(PC3_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc3::Value17) + self.variant(PC3_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc3::Value18) + self.variant(PC3_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> Pc0R { - Pc0R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> PC0_R { + PC0_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> Pc1R { - Pc1R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> PC1_R { + PC1_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> Pc2R { - Pc2R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> PC2_R { + PC2_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> Pc3R { - Pc3R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> PC3_R { + PC3_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> Pc0W { - Pc0W::new(self, 3) + pub fn pc0(&mut self) -> PC0_W { + PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> Pc1W { - Pc1W::new(self, 11) + pub fn pc1(&mut self) -> PC1_W { + PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> Pc2W { - Pc2W::new(self, 19) + pub fn pc2(&mut self) -> PC2_W { + PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> Pc3W { - Pc3W::new(self, 27) + pub fn pc3(&mut self) -> PC3_W { + PC3_W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr0Spec; -impl crate::RegisterSpec for Iocr0Spec { +pub struct IOCR0_SPEC; +impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for Iocr0Spec {} +impl crate::Readable for IOCR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for Iocr0Spec { +impl crate::Writable for IOCR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for Iocr0Spec { +impl crate::Resettable for IOCR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr12.rs b/src/port14/iocr12.rs index 089ab3fe..c18d67d5 100644 --- a/src/port14/iocr12.rs +++ b/src/port14/iocr12.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc12 { +pub enum PC12_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc12) -> Self { + fn from(variant: PC12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc12 { +impl crate::FieldSpec for PC12_A { type Ux = u8; } -impl crate::IsEnum for Pc12 {} +impl crate::IsEnum for PC12_A {} #[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc12R = crate::FieldReader; -impl Pc12R { +pub type PC12_R = crate::FieldReader; +impl PC12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc12::Value1), - 1 => Some(Pc12::Value2), - 2 => Some(Pc12::Value3), - 3 => Some(Pc12::Value4), - 4 => Some(Pc12::Value5), - 5 => Some(Pc12::Value6), - 6 => Some(Pc12::Value7), - 7 => Some(Pc12::Value8), - 16 => Some(Pc12::Value9), - 17 => Some(Pc12::Value10), - 18 => Some(Pc12::Value11), - 19 => Some(Pc12::Value12), - 20 => Some(Pc12::Value13), - 24 => Some(Pc12::Value14), - 25 => Some(Pc12::Value15), - 26 => Some(Pc12::Value16), - 27 => Some(Pc12::Value17), - 28 => Some(Pc12::Value18), + 0 => Some(PC12_A::VALUE1), + 1 => Some(PC12_A::VALUE2), + 2 => Some(PC12_A::VALUE3), + 3 => Some(PC12_A::VALUE4), + 4 => Some(PC12_A::VALUE5), + 5 => Some(PC12_A::VALUE6), + 6 => Some(PC12_A::VALUE7), + 7 => Some(PC12_A::VALUE8), + 16 => Some(PC12_A::VALUE9), + 17 => Some(PC12_A::VALUE10), + 18 => Some(PC12_A::VALUE11), + 19 => Some(PC12_A::VALUE12), + 20 => Some(PC12_A::VALUE13), + 24 => Some(PC12_A::VALUE14), + 25 => Some(PC12_A::VALUE15), + 26 => Some(PC12_A::VALUE16), + 27 => Some(PC12_A::VALUE17), + 28 => Some(PC12_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc12::Value1 + *self == PC12_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc12::Value2 + *self == PC12_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc12::Value3 + *self == PC12_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc12::Value4 + *self == PC12_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc12::Value5 + *self == PC12_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc12::Value6 + *self == PC12_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc12::Value7 + *self == PC12_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc12::Value8 + *self == PC12_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc12::Value9 + *self == PC12_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc12::Value10 + *self == PC12_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc12::Value11 + *self == PC12_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc12::Value12 + *self == PC12_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc12::Value13 + *self == PC12_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc12::Value14 + *self == PC12_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc12::Value15 + *self == PC12_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc12::Value16 + *self == PC12_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc12::Value17 + *self == PC12_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc12::Value18 + *self == PC12_A::VALUE18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; -impl<'a, REG> Pc12W<'a, REG> +pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; +impl<'a, REG> PC12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc12::Value1) + self.variant(PC12_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc12::Value2) + self.variant(PC12_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc12::Value3) + self.variant(PC12_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc12::Value4) + self.variant(PC12_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc12::Value5) + self.variant(PC12_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc12::Value6) + self.variant(PC12_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc12::Value7) + self.variant(PC12_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc12::Value8) + self.variant(PC12_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc12::Value9) + self.variant(PC12_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc12::Value10) + self.variant(PC12_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc12::Value11) + self.variant(PC12_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc12::Value12) + self.variant(PC12_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc12::Value13) + self.variant(PC12_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc12::Value14) + self.variant(PC12_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc12::Value15) + self.variant(PC12_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc12::Value16) + self.variant(PC12_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc12::Value17) + self.variant(PC12_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc12::Value18) + self.variant(PC12_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc13 { +pub enum PC13_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc13) -> Self { + fn from(variant: PC13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc13 { +impl crate::FieldSpec for PC13_A { type Ux = u8; } -impl crate::IsEnum for Pc13 {} +impl crate::IsEnum for PC13_A {} #[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc13R = crate::FieldReader; -impl Pc13R { +pub type PC13_R = crate::FieldReader; +impl PC13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc13::Value1), - 1 => Some(Pc13::Value2), - 2 => Some(Pc13::Value3), - 3 => Some(Pc13::Value4), - 4 => Some(Pc13::Value5), - 5 => Some(Pc13::Value6), - 6 => Some(Pc13::Value7), - 7 => Some(Pc13::Value8), - 16 => Some(Pc13::Value9), - 17 => Some(Pc13::Value10), - 18 => Some(Pc13::Value11), - 19 => Some(Pc13::Value12), - 20 => Some(Pc13::Value13), - 24 => Some(Pc13::Value14), - 25 => Some(Pc13::Value15), - 26 => Some(Pc13::Value16), - 27 => Some(Pc13::Value17), - 28 => Some(Pc13::Value18), + 0 => Some(PC13_A::VALUE1), + 1 => Some(PC13_A::VALUE2), + 2 => Some(PC13_A::VALUE3), + 3 => Some(PC13_A::VALUE4), + 4 => Some(PC13_A::VALUE5), + 5 => Some(PC13_A::VALUE6), + 6 => Some(PC13_A::VALUE7), + 7 => Some(PC13_A::VALUE8), + 16 => Some(PC13_A::VALUE9), + 17 => Some(PC13_A::VALUE10), + 18 => Some(PC13_A::VALUE11), + 19 => Some(PC13_A::VALUE12), + 20 => Some(PC13_A::VALUE13), + 24 => Some(PC13_A::VALUE14), + 25 => Some(PC13_A::VALUE15), + 26 => Some(PC13_A::VALUE16), + 27 => Some(PC13_A::VALUE17), + 28 => Some(PC13_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc13::Value1 + *self == PC13_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc13::Value2 + *self == PC13_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc13::Value3 + *self == PC13_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc13::Value4 + *self == PC13_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc13::Value5 + *self == PC13_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc13::Value6 + *self == PC13_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc13::Value7 + *self == PC13_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc13::Value8 + *self == PC13_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc13::Value9 + *self == PC13_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc13::Value10 + *self == PC13_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc13::Value11 + *self == PC13_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc13::Value12 + *self == PC13_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc13::Value13 + *self == PC13_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc13::Value14 + *self == PC13_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc13::Value15 + *self == PC13_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc13::Value16 + *self == PC13_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc13::Value17 + *self == PC13_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc13::Value18 + *self == PC13_A::VALUE18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; -impl<'a, REG> Pc13W<'a, REG> +pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; +impl<'a, REG> PC13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc13::Value1) + self.variant(PC13_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc13::Value2) + self.variant(PC13_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc13::Value3) + self.variant(PC13_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc13::Value4) + self.variant(PC13_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc13::Value5) + self.variant(PC13_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc13::Value6) + self.variant(PC13_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc13::Value7) + self.variant(PC13_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc13::Value8) + self.variant(PC13_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc13::Value9) + self.variant(PC13_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc13::Value10) + self.variant(PC13_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc13::Value11) + self.variant(PC13_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc13::Value12) + self.variant(PC13_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc13::Value13) + self.variant(PC13_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc13::Value14) + self.variant(PC13_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc13::Value15) + self.variant(PC13_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc13::Value16) + self.variant(PC13_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc13::Value17) + self.variant(PC13_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc13::Value18) + self.variant(PC13_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc14 { +pub enum PC14_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc14) -> Self { + fn from(variant: PC14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc14 { +impl crate::FieldSpec for PC14_A { type Ux = u8; } -impl crate::IsEnum for Pc14 {} +impl crate::IsEnum for PC14_A {} #[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc14R = crate::FieldReader; -impl Pc14R { +pub type PC14_R = crate::FieldReader; +impl PC14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc14::Value1), - 1 => Some(Pc14::Value2), - 2 => Some(Pc14::Value3), - 3 => Some(Pc14::Value4), - 4 => Some(Pc14::Value5), - 5 => Some(Pc14::Value6), - 6 => Some(Pc14::Value7), - 7 => Some(Pc14::Value8), - 16 => Some(Pc14::Value9), - 17 => Some(Pc14::Value10), - 18 => Some(Pc14::Value11), - 19 => Some(Pc14::Value12), - 20 => Some(Pc14::Value13), - 24 => Some(Pc14::Value14), - 25 => Some(Pc14::Value15), - 26 => Some(Pc14::Value16), - 27 => Some(Pc14::Value17), - 28 => Some(Pc14::Value18), + 0 => Some(PC14_A::VALUE1), + 1 => Some(PC14_A::VALUE2), + 2 => Some(PC14_A::VALUE3), + 3 => Some(PC14_A::VALUE4), + 4 => Some(PC14_A::VALUE5), + 5 => Some(PC14_A::VALUE6), + 6 => Some(PC14_A::VALUE7), + 7 => Some(PC14_A::VALUE8), + 16 => Some(PC14_A::VALUE9), + 17 => Some(PC14_A::VALUE10), + 18 => Some(PC14_A::VALUE11), + 19 => Some(PC14_A::VALUE12), + 20 => Some(PC14_A::VALUE13), + 24 => Some(PC14_A::VALUE14), + 25 => Some(PC14_A::VALUE15), + 26 => Some(PC14_A::VALUE16), + 27 => Some(PC14_A::VALUE17), + 28 => Some(PC14_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc14::Value1 + *self == PC14_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc14::Value2 + *self == PC14_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc14::Value3 + *self == PC14_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc14::Value4 + *self == PC14_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc14::Value5 + *self == PC14_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc14::Value6 + *self == PC14_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc14::Value7 + *self == PC14_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc14::Value8 + *self == PC14_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc14::Value9 + *self == PC14_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc14::Value10 + *self == PC14_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc14::Value11 + *self == PC14_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc14::Value12 + *self == PC14_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc14::Value13 + *self == PC14_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc14::Value14 + *self == PC14_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc14::Value15 + *self == PC14_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc14::Value16 + *self == PC14_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc14::Value17 + *self == PC14_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc14::Value18 + *self == PC14_A::VALUE18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; -impl<'a, REG> Pc14W<'a, REG> +pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; +impl<'a, REG> PC14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc14::Value1) + self.variant(PC14_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc14::Value2) + self.variant(PC14_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc14::Value3) + self.variant(PC14_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc14::Value4) + self.variant(PC14_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc14::Value5) + self.variant(PC14_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc14::Value6) + self.variant(PC14_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc14::Value7) + self.variant(PC14_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc14::Value8) + self.variant(PC14_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc14::Value9) + self.variant(PC14_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc14::Value10) + self.variant(PC14_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc14::Value11) + self.variant(PC14_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc14::Value12) + self.variant(PC14_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc14::Value13) + self.variant(PC14_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc14::Value14) + self.variant(PC14_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc14::Value15) + self.variant(PC14_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc14::Value16) + self.variant(PC14_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc14::Value17) + self.variant(PC14_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc14::Value18) + self.variant(PC14_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc15 { +pub enum PC15_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc15) -> Self { + fn from(variant: PC15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc15 { +impl crate::FieldSpec for PC15_A { type Ux = u8; } -impl crate::IsEnum for Pc15 {} +impl crate::IsEnum for PC15_A {} #[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc15R = crate::FieldReader; -impl Pc15R { +pub type PC15_R = crate::FieldReader; +impl PC15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc15::Value1), - 1 => Some(Pc15::Value2), - 2 => Some(Pc15::Value3), - 3 => Some(Pc15::Value4), - 4 => Some(Pc15::Value5), - 5 => Some(Pc15::Value6), - 6 => Some(Pc15::Value7), - 7 => Some(Pc15::Value8), - 16 => Some(Pc15::Value9), - 17 => Some(Pc15::Value10), - 18 => Some(Pc15::Value11), - 19 => Some(Pc15::Value12), - 20 => Some(Pc15::Value13), - 24 => Some(Pc15::Value14), - 25 => Some(Pc15::Value15), - 26 => Some(Pc15::Value16), - 27 => Some(Pc15::Value17), - 28 => Some(Pc15::Value18), + 0 => Some(PC15_A::VALUE1), + 1 => Some(PC15_A::VALUE2), + 2 => Some(PC15_A::VALUE3), + 3 => Some(PC15_A::VALUE4), + 4 => Some(PC15_A::VALUE5), + 5 => Some(PC15_A::VALUE6), + 6 => Some(PC15_A::VALUE7), + 7 => Some(PC15_A::VALUE8), + 16 => Some(PC15_A::VALUE9), + 17 => Some(PC15_A::VALUE10), + 18 => Some(PC15_A::VALUE11), + 19 => Some(PC15_A::VALUE12), + 20 => Some(PC15_A::VALUE13), + 24 => Some(PC15_A::VALUE14), + 25 => Some(PC15_A::VALUE15), + 26 => Some(PC15_A::VALUE16), + 27 => Some(PC15_A::VALUE17), + 28 => Some(PC15_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc15::Value1 + *self == PC15_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc15::Value2 + *self == PC15_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc15::Value3 + *self == PC15_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc15::Value4 + *self == PC15_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc15::Value5 + *self == PC15_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc15::Value6 + *self == PC15_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc15::Value7 + *self == PC15_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc15::Value8 + *self == PC15_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc15::Value9 + *self == PC15_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc15::Value10 + *self == PC15_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc15::Value11 + *self == PC15_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc15::Value12 + *self == PC15_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc15::Value13 + *self == PC15_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc15::Value14 + *self == PC15_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc15::Value15 + *self == PC15_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc15::Value16 + *self == PC15_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc15::Value17 + *self == PC15_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc15::Value18 + *self == PC15_A::VALUE18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; -impl<'a, REG> Pc15W<'a, REG> +pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; +impl<'a, REG> PC15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc15::Value1) + self.variant(PC15_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc15::Value2) + self.variant(PC15_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc15::Value3) + self.variant(PC15_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc15::Value4) + self.variant(PC15_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc15::Value5) + self.variant(PC15_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc15::Value6) + self.variant(PC15_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc15::Value7) + self.variant(PC15_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc15::Value8) + self.variant(PC15_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc15::Value9) + self.variant(PC15_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc15::Value10) + self.variant(PC15_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc15::Value11) + self.variant(PC15_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc15::Value12) + self.variant(PC15_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc15::Value13) + self.variant(PC15_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc15::Value14) + self.variant(PC15_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc15::Value15) + self.variant(PC15_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc15::Value16) + self.variant(PC15_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc15::Value17) + self.variant(PC15_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc15::Value18) + self.variant(PC15_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> Pc12R { - Pc12R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> PC12_R { + PC12_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> Pc13R { - Pc13R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> PC13_R { + PC13_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> Pc14R { - Pc14R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> PC14_R { + PC14_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> Pc15R { - Pc15R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> PC15_R { + PC15_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> Pc12W { - Pc12W::new(self, 3) + pub fn pc12(&mut self) -> PC12_W { + PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> Pc13W { - Pc13W::new(self, 11) + pub fn pc13(&mut self) -> PC13_W { + PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> Pc14W { - Pc14W::new(self, 19) + pub fn pc14(&mut self) -> PC14_W { + PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> Pc15W { - Pc15W::new(self, 27) + pub fn pc15(&mut self) -> PC15_W { + PC15_W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr12Spec; -impl crate::RegisterSpec for Iocr12Spec { +pub struct IOCR12_SPEC; +impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for Iocr12Spec {} +impl crate::Readable for IOCR12_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for Iocr12Spec { +impl crate::Writable for IOCR12_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for Iocr12Spec { +impl crate::Resettable for IOCR12_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr4.rs b/src/port14/iocr4.rs index 5fed4938..297e0bf9 100644 --- a/src/port14/iocr4.rs +++ b/src/port14/iocr4.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc4 { +pub enum PC4_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc4) -> Self { + fn from(variant: PC4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc4 { +impl crate::FieldSpec for PC4_A { type Ux = u8; } -impl crate::IsEnum for Pc4 {} +impl crate::IsEnum for PC4_A {} #[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc4R = crate::FieldReader; -impl Pc4R { +pub type PC4_R = crate::FieldReader; +impl PC4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc4::Value1), - 1 => Some(Pc4::Value2), - 2 => Some(Pc4::Value3), - 3 => Some(Pc4::Value4), - 4 => Some(Pc4::Value5), - 5 => Some(Pc4::Value6), - 6 => Some(Pc4::Value7), - 7 => Some(Pc4::Value8), - 16 => Some(Pc4::Value9), - 17 => Some(Pc4::Value10), - 18 => Some(Pc4::Value11), - 19 => Some(Pc4::Value12), - 20 => Some(Pc4::Value13), - 24 => Some(Pc4::Value14), - 25 => Some(Pc4::Value15), - 26 => Some(Pc4::Value16), - 27 => Some(Pc4::Value17), - 28 => Some(Pc4::Value18), + 0 => Some(PC4_A::VALUE1), + 1 => Some(PC4_A::VALUE2), + 2 => Some(PC4_A::VALUE3), + 3 => Some(PC4_A::VALUE4), + 4 => Some(PC4_A::VALUE5), + 5 => Some(PC4_A::VALUE6), + 6 => Some(PC4_A::VALUE7), + 7 => Some(PC4_A::VALUE8), + 16 => Some(PC4_A::VALUE9), + 17 => Some(PC4_A::VALUE10), + 18 => Some(PC4_A::VALUE11), + 19 => Some(PC4_A::VALUE12), + 20 => Some(PC4_A::VALUE13), + 24 => Some(PC4_A::VALUE14), + 25 => Some(PC4_A::VALUE15), + 26 => Some(PC4_A::VALUE16), + 27 => Some(PC4_A::VALUE17), + 28 => Some(PC4_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc4::Value1 + *self == PC4_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc4::Value2 + *self == PC4_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc4::Value3 + *self == PC4_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc4::Value4 + *self == PC4_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc4::Value5 + *self == PC4_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc4::Value6 + *self == PC4_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc4::Value7 + *self == PC4_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc4::Value8 + *self == PC4_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc4::Value9 + *self == PC4_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc4::Value10 + *self == PC4_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc4::Value11 + *self == PC4_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc4::Value12 + *self == PC4_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc4::Value13 + *self == PC4_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc4::Value14 + *self == PC4_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc4::Value15 + *self == PC4_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc4::Value16 + *self == PC4_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc4::Value17 + *self == PC4_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc4::Value18 + *self == PC4_A::VALUE18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; -impl<'a, REG> Pc4W<'a, REG> +pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; +impl<'a, REG> PC4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc4::Value1) + self.variant(PC4_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc4::Value2) + self.variant(PC4_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc4::Value3) + self.variant(PC4_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc4::Value4) + self.variant(PC4_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc4::Value5) + self.variant(PC4_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc4::Value6) + self.variant(PC4_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc4::Value7) + self.variant(PC4_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc4::Value8) + self.variant(PC4_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc4::Value9) + self.variant(PC4_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc4::Value10) + self.variant(PC4_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc4::Value11) + self.variant(PC4_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc4::Value12) + self.variant(PC4_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc4::Value13) + self.variant(PC4_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc4::Value14) + self.variant(PC4_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc4::Value15) + self.variant(PC4_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc4::Value16) + self.variant(PC4_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc4::Value17) + self.variant(PC4_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc4::Value18) + self.variant(PC4_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc5 { +pub enum PC5_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc5) -> Self { + fn from(variant: PC5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc5 { +impl crate::FieldSpec for PC5_A { type Ux = u8; } -impl crate::IsEnum for Pc5 {} +impl crate::IsEnum for PC5_A {} #[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc5R = crate::FieldReader; -impl Pc5R { +pub type PC5_R = crate::FieldReader; +impl PC5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc5::Value1), - 1 => Some(Pc5::Value2), - 2 => Some(Pc5::Value3), - 3 => Some(Pc5::Value4), - 4 => Some(Pc5::Value5), - 5 => Some(Pc5::Value6), - 6 => Some(Pc5::Value7), - 7 => Some(Pc5::Value8), - 16 => Some(Pc5::Value9), - 17 => Some(Pc5::Value10), - 18 => Some(Pc5::Value11), - 19 => Some(Pc5::Value12), - 20 => Some(Pc5::Value13), - 24 => Some(Pc5::Value14), - 25 => Some(Pc5::Value15), - 26 => Some(Pc5::Value16), - 27 => Some(Pc5::Value17), - 28 => Some(Pc5::Value18), + 0 => Some(PC5_A::VALUE1), + 1 => Some(PC5_A::VALUE2), + 2 => Some(PC5_A::VALUE3), + 3 => Some(PC5_A::VALUE4), + 4 => Some(PC5_A::VALUE5), + 5 => Some(PC5_A::VALUE6), + 6 => Some(PC5_A::VALUE7), + 7 => Some(PC5_A::VALUE8), + 16 => Some(PC5_A::VALUE9), + 17 => Some(PC5_A::VALUE10), + 18 => Some(PC5_A::VALUE11), + 19 => Some(PC5_A::VALUE12), + 20 => Some(PC5_A::VALUE13), + 24 => Some(PC5_A::VALUE14), + 25 => Some(PC5_A::VALUE15), + 26 => Some(PC5_A::VALUE16), + 27 => Some(PC5_A::VALUE17), + 28 => Some(PC5_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc5::Value1 + *self == PC5_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc5::Value2 + *self == PC5_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc5::Value3 + *self == PC5_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc5::Value4 + *self == PC5_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc5::Value5 + *self == PC5_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc5::Value6 + *self == PC5_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc5::Value7 + *self == PC5_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc5::Value8 + *self == PC5_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc5::Value9 + *self == PC5_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc5::Value10 + *self == PC5_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc5::Value11 + *self == PC5_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc5::Value12 + *self == PC5_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc5::Value13 + *self == PC5_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc5::Value14 + *self == PC5_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc5::Value15 + *self == PC5_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc5::Value16 + *self == PC5_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc5::Value17 + *self == PC5_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc5::Value18 + *self == PC5_A::VALUE18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; -impl<'a, REG> Pc5W<'a, REG> +pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; +impl<'a, REG> PC5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc5::Value1) + self.variant(PC5_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc5::Value2) + self.variant(PC5_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc5::Value3) + self.variant(PC5_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc5::Value4) + self.variant(PC5_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc5::Value5) + self.variant(PC5_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc5::Value6) + self.variant(PC5_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc5::Value7) + self.variant(PC5_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc5::Value8) + self.variant(PC5_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc5::Value9) + self.variant(PC5_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc5::Value10) + self.variant(PC5_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc5::Value11) + self.variant(PC5_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc5::Value12) + self.variant(PC5_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc5::Value13) + self.variant(PC5_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc5::Value14) + self.variant(PC5_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc5::Value15) + self.variant(PC5_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc5::Value16) + self.variant(PC5_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc5::Value17) + self.variant(PC5_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc5::Value18) + self.variant(PC5_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc6 { +pub enum PC6_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc6) -> Self { + fn from(variant: PC6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc6 { +impl crate::FieldSpec for PC6_A { type Ux = u8; } -impl crate::IsEnum for Pc6 {} +impl crate::IsEnum for PC6_A {} #[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc6R = crate::FieldReader; -impl Pc6R { +pub type PC6_R = crate::FieldReader; +impl PC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc6::Value1), - 1 => Some(Pc6::Value2), - 2 => Some(Pc6::Value3), - 3 => Some(Pc6::Value4), - 4 => Some(Pc6::Value5), - 5 => Some(Pc6::Value6), - 6 => Some(Pc6::Value7), - 7 => Some(Pc6::Value8), - 16 => Some(Pc6::Value9), - 17 => Some(Pc6::Value10), - 18 => Some(Pc6::Value11), - 19 => Some(Pc6::Value12), - 20 => Some(Pc6::Value13), - 24 => Some(Pc6::Value14), - 25 => Some(Pc6::Value15), - 26 => Some(Pc6::Value16), - 27 => Some(Pc6::Value17), - 28 => Some(Pc6::Value18), + 0 => Some(PC6_A::VALUE1), + 1 => Some(PC6_A::VALUE2), + 2 => Some(PC6_A::VALUE3), + 3 => Some(PC6_A::VALUE4), + 4 => Some(PC6_A::VALUE5), + 5 => Some(PC6_A::VALUE6), + 6 => Some(PC6_A::VALUE7), + 7 => Some(PC6_A::VALUE8), + 16 => Some(PC6_A::VALUE9), + 17 => Some(PC6_A::VALUE10), + 18 => Some(PC6_A::VALUE11), + 19 => Some(PC6_A::VALUE12), + 20 => Some(PC6_A::VALUE13), + 24 => Some(PC6_A::VALUE14), + 25 => Some(PC6_A::VALUE15), + 26 => Some(PC6_A::VALUE16), + 27 => Some(PC6_A::VALUE17), + 28 => Some(PC6_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc6::Value1 + *self == PC6_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc6::Value2 + *self == PC6_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc6::Value3 + *self == PC6_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc6::Value4 + *self == PC6_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc6::Value5 + *self == PC6_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc6::Value6 + *self == PC6_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc6::Value7 + *self == PC6_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc6::Value8 + *self == PC6_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc6::Value9 + *self == PC6_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc6::Value10 + *self == PC6_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc6::Value11 + *self == PC6_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc6::Value12 + *self == PC6_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc6::Value13 + *self == PC6_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc6::Value14 + *self == PC6_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc6::Value15 + *self == PC6_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc6::Value16 + *self == PC6_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc6::Value17 + *self == PC6_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc6::Value18 + *self == PC6_A::VALUE18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; -impl<'a, REG> Pc6W<'a, REG> +pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; +impl<'a, REG> PC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc6::Value1) + self.variant(PC6_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc6::Value2) + self.variant(PC6_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc6::Value3) + self.variant(PC6_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc6::Value4) + self.variant(PC6_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc6::Value5) + self.variant(PC6_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc6::Value6) + self.variant(PC6_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc6::Value7) + self.variant(PC6_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc6::Value8) + self.variant(PC6_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc6::Value9) + self.variant(PC6_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc6::Value10) + self.variant(PC6_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc6::Value11) + self.variant(PC6_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc6::Value12) + self.variant(PC6_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc6::Value13) + self.variant(PC6_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc6::Value14) + self.variant(PC6_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc6::Value15) + self.variant(PC6_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc6::Value16) + self.variant(PC6_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc6::Value17) + self.variant(PC6_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc6::Value18) + self.variant(PC6_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc7 { +pub enum PC7_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc7) -> Self { + fn from(variant: PC7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc7 { +impl crate::FieldSpec for PC7_A { type Ux = u8; } -impl crate::IsEnum for Pc7 {} +impl crate::IsEnum for PC7_A {} #[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc7R = crate::FieldReader; -impl Pc7R { +pub type PC7_R = crate::FieldReader; +impl PC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc7::Value1), - 1 => Some(Pc7::Value2), - 2 => Some(Pc7::Value3), - 3 => Some(Pc7::Value4), - 4 => Some(Pc7::Value5), - 5 => Some(Pc7::Value6), - 6 => Some(Pc7::Value7), - 7 => Some(Pc7::Value8), - 16 => Some(Pc7::Value9), - 17 => Some(Pc7::Value10), - 18 => Some(Pc7::Value11), - 19 => Some(Pc7::Value12), - 20 => Some(Pc7::Value13), - 24 => Some(Pc7::Value14), - 25 => Some(Pc7::Value15), - 26 => Some(Pc7::Value16), - 27 => Some(Pc7::Value17), - 28 => Some(Pc7::Value18), + 0 => Some(PC7_A::VALUE1), + 1 => Some(PC7_A::VALUE2), + 2 => Some(PC7_A::VALUE3), + 3 => Some(PC7_A::VALUE4), + 4 => Some(PC7_A::VALUE5), + 5 => Some(PC7_A::VALUE6), + 6 => Some(PC7_A::VALUE7), + 7 => Some(PC7_A::VALUE8), + 16 => Some(PC7_A::VALUE9), + 17 => Some(PC7_A::VALUE10), + 18 => Some(PC7_A::VALUE11), + 19 => Some(PC7_A::VALUE12), + 20 => Some(PC7_A::VALUE13), + 24 => Some(PC7_A::VALUE14), + 25 => Some(PC7_A::VALUE15), + 26 => Some(PC7_A::VALUE16), + 27 => Some(PC7_A::VALUE17), + 28 => Some(PC7_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc7::Value1 + *self == PC7_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc7::Value2 + *self == PC7_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc7::Value3 + *self == PC7_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc7::Value4 + *self == PC7_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc7::Value5 + *self == PC7_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc7::Value6 + *self == PC7_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc7::Value7 + *self == PC7_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc7::Value8 + *self == PC7_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc7::Value9 + *self == PC7_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc7::Value10 + *self == PC7_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc7::Value11 + *self == PC7_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc7::Value12 + *self == PC7_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc7::Value13 + *self == PC7_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc7::Value14 + *self == PC7_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc7::Value15 + *self == PC7_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc7::Value16 + *self == PC7_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc7::Value17 + *self == PC7_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc7::Value18 + *self == PC7_A::VALUE18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; -impl<'a, REG> Pc7W<'a, REG> +pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; +impl<'a, REG> PC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc7::Value1) + self.variant(PC7_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc7::Value2) + self.variant(PC7_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc7::Value3) + self.variant(PC7_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc7::Value4) + self.variant(PC7_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc7::Value5) + self.variant(PC7_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc7::Value6) + self.variant(PC7_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc7::Value7) + self.variant(PC7_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc7::Value8) + self.variant(PC7_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc7::Value9) + self.variant(PC7_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc7::Value10) + self.variant(PC7_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc7::Value11) + self.variant(PC7_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc7::Value12) + self.variant(PC7_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc7::Value13) + self.variant(PC7_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc7::Value14) + self.variant(PC7_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc7::Value15) + self.variant(PC7_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc7::Value16) + self.variant(PC7_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc7::Value17) + self.variant(PC7_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc7::Value18) + self.variant(PC7_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> Pc4R { - Pc4R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> PC4_R { + PC4_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> Pc5R { - Pc5R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> PC5_R { + PC5_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> Pc6R { - Pc6R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> PC6_R { + PC6_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> Pc7R { - Pc7R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> PC7_R { + PC7_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> Pc4W { - Pc4W::new(self, 3) + pub fn pc4(&mut self) -> PC4_W { + PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> Pc5W { - Pc5W::new(self, 11) + pub fn pc5(&mut self) -> PC5_W { + PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> Pc6W { - Pc6W::new(self, 19) + pub fn pc6(&mut self) -> PC6_W { + PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> Pc7W { - Pc7W::new(self, 27) + pub fn pc7(&mut self) -> PC7_W { + PC7_W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr4Spec; -impl crate::RegisterSpec for Iocr4Spec { +pub struct IOCR4_SPEC; +impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for Iocr4Spec {} +impl crate::Readable for IOCR4_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for Iocr4Spec { +impl crate::Writable for IOCR4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for Iocr4Spec { +impl crate::Resettable for IOCR4_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/iocr8.rs b/src/port14/iocr8.rs index 6ffc04a9..d7dc8b59 100644 --- a/src/port14/iocr8.rs +++ b/src/port14/iocr8.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc8 { +pub enum PC8_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc8) -> Self { + fn from(variant: PC8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc8 { +impl crate::FieldSpec for PC8_A { type Ux = u8; } -impl crate::IsEnum for Pc8 {} +impl crate::IsEnum for PC8_A {} #[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc8R = crate::FieldReader; -impl Pc8R { +pub type PC8_R = crate::FieldReader; +impl PC8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc8::Value1), - 1 => Some(Pc8::Value2), - 2 => Some(Pc8::Value3), - 3 => Some(Pc8::Value4), - 4 => Some(Pc8::Value5), - 5 => Some(Pc8::Value6), - 6 => Some(Pc8::Value7), - 7 => Some(Pc8::Value8), - 16 => Some(Pc8::Value9), - 17 => Some(Pc8::Value10), - 18 => Some(Pc8::Value11), - 19 => Some(Pc8::Value12), - 20 => Some(Pc8::Value13), - 24 => Some(Pc8::Value14), - 25 => Some(Pc8::Value15), - 26 => Some(Pc8::Value16), - 27 => Some(Pc8::Value17), - 28 => Some(Pc8::Value18), + 0 => Some(PC8_A::VALUE1), + 1 => Some(PC8_A::VALUE2), + 2 => Some(PC8_A::VALUE3), + 3 => Some(PC8_A::VALUE4), + 4 => Some(PC8_A::VALUE5), + 5 => Some(PC8_A::VALUE6), + 6 => Some(PC8_A::VALUE7), + 7 => Some(PC8_A::VALUE8), + 16 => Some(PC8_A::VALUE9), + 17 => Some(PC8_A::VALUE10), + 18 => Some(PC8_A::VALUE11), + 19 => Some(PC8_A::VALUE12), + 20 => Some(PC8_A::VALUE13), + 24 => Some(PC8_A::VALUE14), + 25 => Some(PC8_A::VALUE15), + 26 => Some(PC8_A::VALUE16), + 27 => Some(PC8_A::VALUE17), + 28 => Some(PC8_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc8::Value1 + *self == PC8_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc8::Value2 + *self == PC8_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc8::Value3 + *self == PC8_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc8::Value4 + *self == PC8_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc8::Value5 + *self == PC8_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc8::Value6 + *self == PC8_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc8::Value7 + *self == PC8_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc8::Value8 + *self == PC8_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc8::Value9 + *self == PC8_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc8::Value10 + *self == PC8_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc8::Value11 + *self == PC8_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc8::Value12 + *self == PC8_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc8::Value13 + *self == PC8_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc8::Value14 + *self == PC8_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc8::Value15 + *self == PC8_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc8::Value16 + *self == PC8_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc8::Value17 + *self == PC8_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc8::Value18 + *self == PC8_A::VALUE18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; -impl<'a, REG> Pc8W<'a, REG> +pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; +impl<'a, REG> PC8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc8::Value1) + self.variant(PC8_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc8::Value2) + self.variant(PC8_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc8::Value3) + self.variant(PC8_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc8::Value4) + self.variant(PC8_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc8::Value5) + self.variant(PC8_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc8::Value6) + self.variant(PC8_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc8::Value7) + self.variant(PC8_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc8::Value8) + self.variant(PC8_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc8::Value9) + self.variant(PC8_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc8::Value10) + self.variant(PC8_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc8::Value11) + self.variant(PC8_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc8::Value12) + self.variant(PC8_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc8::Value13) + self.variant(PC8_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc8::Value14) + self.variant(PC8_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc8::Value15) + self.variant(PC8_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc8::Value16) + self.variant(PC8_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc8::Value17) + self.variant(PC8_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc8::Value18) + self.variant(PC8_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc9 { +pub enum PC9_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc9) -> Self { + fn from(variant: PC9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc9 { +impl crate::FieldSpec for PC9_A { type Ux = u8; } -impl crate::IsEnum for Pc9 {} +impl crate::IsEnum for PC9_A {} #[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc9R = crate::FieldReader; -impl Pc9R { +pub type PC9_R = crate::FieldReader; +impl PC9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc9::Value1), - 1 => Some(Pc9::Value2), - 2 => Some(Pc9::Value3), - 3 => Some(Pc9::Value4), - 4 => Some(Pc9::Value5), - 5 => Some(Pc9::Value6), - 6 => Some(Pc9::Value7), - 7 => Some(Pc9::Value8), - 16 => Some(Pc9::Value9), - 17 => Some(Pc9::Value10), - 18 => Some(Pc9::Value11), - 19 => Some(Pc9::Value12), - 20 => Some(Pc9::Value13), - 24 => Some(Pc9::Value14), - 25 => Some(Pc9::Value15), - 26 => Some(Pc9::Value16), - 27 => Some(Pc9::Value17), - 28 => Some(Pc9::Value18), + 0 => Some(PC9_A::VALUE1), + 1 => Some(PC9_A::VALUE2), + 2 => Some(PC9_A::VALUE3), + 3 => Some(PC9_A::VALUE4), + 4 => Some(PC9_A::VALUE5), + 5 => Some(PC9_A::VALUE6), + 6 => Some(PC9_A::VALUE7), + 7 => Some(PC9_A::VALUE8), + 16 => Some(PC9_A::VALUE9), + 17 => Some(PC9_A::VALUE10), + 18 => Some(PC9_A::VALUE11), + 19 => Some(PC9_A::VALUE12), + 20 => Some(PC9_A::VALUE13), + 24 => Some(PC9_A::VALUE14), + 25 => Some(PC9_A::VALUE15), + 26 => Some(PC9_A::VALUE16), + 27 => Some(PC9_A::VALUE17), + 28 => Some(PC9_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc9::Value1 + *self == PC9_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc9::Value2 + *self == PC9_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc9::Value3 + *self == PC9_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc9::Value4 + *self == PC9_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc9::Value5 + *self == PC9_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc9::Value6 + *self == PC9_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc9::Value7 + *self == PC9_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc9::Value8 + *self == PC9_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc9::Value9 + *self == PC9_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc9::Value10 + *self == PC9_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc9::Value11 + *self == PC9_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc9::Value12 + *self == PC9_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc9::Value13 + *self == PC9_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc9::Value14 + *self == PC9_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc9::Value15 + *self == PC9_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc9::Value16 + *self == PC9_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc9::Value17 + *self == PC9_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc9::Value18 + *self == PC9_A::VALUE18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; -impl<'a, REG> Pc9W<'a, REG> +pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; +impl<'a, REG> PC9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc9::Value1) + self.variant(PC9_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc9::Value2) + self.variant(PC9_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc9::Value3) + self.variant(PC9_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc9::Value4) + self.variant(PC9_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc9::Value5) + self.variant(PC9_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc9::Value6) + self.variant(PC9_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc9::Value7) + self.variant(PC9_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc9::Value8) + self.variant(PC9_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc9::Value9) + self.variant(PC9_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc9::Value10) + self.variant(PC9_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc9::Value11) + self.variant(PC9_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc9::Value12) + self.variant(PC9_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc9::Value13) + self.variant(PC9_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc9::Value14) + self.variant(PC9_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc9::Value15) + self.variant(PC9_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc9::Value16) + self.variant(PC9_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc9::Value17) + self.variant(PC9_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc9::Value18) + self.variant(PC9_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc10 { +pub enum PC10_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc10) -> Self { + fn from(variant: PC10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc10 { +impl crate::FieldSpec for PC10_A { type Ux = u8; } -impl crate::IsEnum for Pc10 {} +impl crate::IsEnum for PC10_A {} #[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc10R = crate::FieldReader; -impl Pc10R { +pub type PC10_R = crate::FieldReader; +impl PC10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc10::Value1), - 1 => Some(Pc10::Value2), - 2 => Some(Pc10::Value3), - 3 => Some(Pc10::Value4), - 4 => Some(Pc10::Value5), - 5 => Some(Pc10::Value6), - 6 => Some(Pc10::Value7), - 7 => Some(Pc10::Value8), - 16 => Some(Pc10::Value9), - 17 => Some(Pc10::Value10), - 18 => Some(Pc10::Value11), - 19 => Some(Pc10::Value12), - 20 => Some(Pc10::Value13), - 24 => Some(Pc10::Value14), - 25 => Some(Pc10::Value15), - 26 => Some(Pc10::Value16), - 27 => Some(Pc10::Value17), - 28 => Some(Pc10::Value18), + 0 => Some(PC10_A::VALUE1), + 1 => Some(PC10_A::VALUE2), + 2 => Some(PC10_A::VALUE3), + 3 => Some(PC10_A::VALUE4), + 4 => Some(PC10_A::VALUE5), + 5 => Some(PC10_A::VALUE6), + 6 => Some(PC10_A::VALUE7), + 7 => Some(PC10_A::VALUE8), + 16 => Some(PC10_A::VALUE9), + 17 => Some(PC10_A::VALUE10), + 18 => Some(PC10_A::VALUE11), + 19 => Some(PC10_A::VALUE12), + 20 => Some(PC10_A::VALUE13), + 24 => Some(PC10_A::VALUE14), + 25 => Some(PC10_A::VALUE15), + 26 => Some(PC10_A::VALUE16), + 27 => Some(PC10_A::VALUE17), + 28 => Some(PC10_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc10::Value1 + *self == PC10_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc10::Value2 + *self == PC10_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc10::Value3 + *self == PC10_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc10::Value4 + *self == PC10_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc10::Value5 + *self == PC10_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc10::Value6 + *self == PC10_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc10::Value7 + *self == PC10_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc10::Value8 + *self == PC10_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc10::Value9 + *self == PC10_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc10::Value10 + *self == PC10_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc10::Value11 + *self == PC10_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc10::Value12 + *self == PC10_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc10::Value13 + *self == PC10_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc10::Value14 + *self == PC10_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc10::Value15 + *self == PC10_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc10::Value16 + *self == PC10_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc10::Value17 + *self == PC10_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc10::Value18 + *self == PC10_A::VALUE18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; -impl<'a, REG> Pc10W<'a, REG> +pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; +impl<'a, REG> PC10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc10::Value1) + self.variant(PC10_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc10::Value2) + self.variant(PC10_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc10::Value3) + self.variant(PC10_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc10::Value4) + self.variant(PC10_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc10::Value5) + self.variant(PC10_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc10::Value6) + self.variant(PC10_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc10::Value7) + self.variant(PC10_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc10::Value8) + self.variant(PC10_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc10::Value9) + self.variant(PC10_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc10::Value10) + self.variant(PC10_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc10::Value11) + self.variant(PC10_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc10::Value12) + self.variant(PC10_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc10::Value13) + self.variant(PC10_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc10::Value14) + self.variant(PC10_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc10::Value15) + self.variant(PC10_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc10::Value16) + self.variant(PC10_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc10::Value17) + self.variant(PC10_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc10::Value18) + self.variant(PC10_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc11 { +pub enum PC11_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc11) -> Self { + fn from(variant: PC11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc11 { +impl crate::FieldSpec for PC11_A { type Ux = u8; } -impl crate::IsEnum for Pc11 {} +impl crate::IsEnum for PC11_A {} #[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc11R = crate::FieldReader; -impl Pc11R { +pub type PC11_R = crate::FieldReader; +impl PC11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc11::Value1), - 1 => Some(Pc11::Value2), - 2 => Some(Pc11::Value3), - 3 => Some(Pc11::Value4), - 4 => Some(Pc11::Value5), - 5 => Some(Pc11::Value6), - 6 => Some(Pc11::Value7), - 7 => Some(Pc11::Value8), - 16 => Some(Pc11::Value9), - 17 => Some(Pc11::Value10), - 18 => Some(Pc11::Value11), - 19 => Some(Pc11::Value12), - 20 => Some(Pc11::Value13), - 24 => Some(Pc11::Value14), - 25 => Some(Pc11::Value15), - 26 => Some(Pc11::Value16), - 27 => Some(Pc11::Value17), - 28 => Some(Pc11::Value18), + 0 => Some(PC11_A::VALUE1), + 1 => Some(PC11_A::VALUE2), + 2 => Some(PC11_A::VALUE3), + 3 => Some(PC11_A::VALUE4), + 4 => Some(PC11_A::VALUE5), + 5 => Some(PC11_A::VALUE6), + 6 => Some(PC11_A::VALUE7), + 7 => Some(PC11_A::VALUE8), + 16 => Some(PC11_A::VALUE9), + 17 => Some(PC11_A::VALUE10), + 18 => Some(PC11_A::VALUE11), + 19 => Some(PC11_A::VALUE12), + 20 => Some(PC11_A::VALUE13), + 24 => Some(PC11_A::VALUE14), + 25 => Some(PC11_A::VALUE15), + 26 => Some(PC11_A::VALUE16), + 27 => Some(PC11_A::VALUE17), + 28 => Some(PC11_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc11::Value1 + *self == PC11_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc11::Value2 + *self == PC11_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc11::Value3 + *self == PC11_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc11::Value4 + *self == PC11_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc11::Value5 + *self == PC11_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc11::Value6 + *self == PC11_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc11::Value7 + *self == PC11_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc11::Value8 + *self == PC11_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc11::Value9 + *self == PC11_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc11::Value10 + *self == PC11_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc11::Value11 + *self == PC11_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc11::Value12 + *self == PC11_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc11::Value13 + *self == PC11_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc11::Value14 + *self == PC11_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc11::Value15 + *self == PC11_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc11::Value16 + *self == PC11_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc11::Value17 + *self == PC11_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc11::Value18 + *self == PC11_A::VALUE18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; -impl<'a, REG> Pc11W<'a, REG> +pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; +impl<'a, REG> PC11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc11::Value1) + self.variant(PC11_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc11::Value2) + self.variant(PC11_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc11::Value3) + self.variant(PC11_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc11::Value4) + self.variant(PC11_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc11::Value5) + self.variant(PC11_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc11::Value6) + self.variant(PC11_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc11::Value7) + self.variant(PC11_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc11::Value8) + self.variant(PC11_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc11::Value9) + self.variant(PC11_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc11::Value10) + self.variant(PC11_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc11::Value11) + self.variant(PC11_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc11::Value12) + self.variant(PC11_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc11::Value13) + self.variant(PC11_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc11::Value14) + self.variant(PC11_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc11::Value15) + self.variant(PC11_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc11::Value16) + self.variant(PC11_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc11::Value17) + self.variant(PC11_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc11::Value18) + self.variant(PC11_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> Pc8R { - Pc8R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> PC8_R { + PC8_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> Pc9R { - Pc9R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> PC9_R { + PC9_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> Pc10R { - Pc10R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> PC10_R { + PC10_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> Pc11R { - Pc11R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> PC11_R { + PC11_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> Pc8W { - Pc8W::new(self, 3) + pub fn pc8(&mut self) -> PC8_W { + PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> Pc9W { - Pc9W::new(self, 11) + pub fn pc9(&mut self) -> PC9_W { + PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> Pc10W { - Pc10W::new(self, 19) + pub fn pc10(&mut self) -> PC10_W { + PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> Pc11W { - Pc11W::new(self, 27) + pub fn pc11(&mut self) -> PC11_W { + PC11_W::new(self, 27) } } #[doc = "Port 14 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr8Spec; -impl crate::RegisterSpec for Iocr8Spec { +pub struct IOCR8_SPEC; +impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for Iocr8Spec {} +impl crate::Readable for IOCR8_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for Iocr8Spec { +impl crate::Writable for IOCR8_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for Iocr8Spec { +impl crate::Resettable for IOCR8_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/omr.rs b/src/port14/omr.rs index 926bbcc6..e15bc62b 100644 --- a/src/port14/omr.rs +++ b/src/port14/omr.rs @@ -1,275 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> Ps0W { - Ps0W::new(self, 0) + pub fn ps0(&mut self) -> PS0_W { + PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> Ps1W { - Ps1W::new(self, 1) + pub fn ps1(&mut self) -> PS1_W { + PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> Ps2W { - Ps2W::new(self, 2) + pub fn ps2(&mut self) -> PS2_W { + PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> Ps3W { - Ps3W::new(self, 3) + pub fn ps3(&mut self) -> PS3_W { + PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> Ps4W { - Ps4W::new(self, 4) + pub fn ps4(&mut self) -> PS4_W { + PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> Ps5W { - Ps5W::new(self, 5) + pub fn ps5(&mut self) -> PS5_W { + PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> Ps6W { - Ps6W::new(self, 6) + pub fn ps6(&mut self) -> PS6_W { + PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> Ps7W { - Ps7W::new(self, 7) + pub fn ps7(&mut self) -> PS7_W { + PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> Ps8W { - Ps8W::new(self, 8) + pub fn ps8(&mut self) -> PS8_W { + PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> Ps9W { - Ps9W::new(self, 9) + pub fn ps9(&mut self) -> PS9_W { + PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> Ps10W { - Ps10W::new(self, 10) + pub fn ps10(&mut self) -> PS10_W { + PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> Ps11W { - Ps11W::new(self, 11) + pub fn ps11(&mut self) -> PS11_W { + PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> Ps12W { - Ps12W::new(self, 12) + pub fn ps12(&mut self) -> PS12_W { + PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> Ps13W { - Ps13W::new(self, 13) + pub fn ps13(&mut self) -> PS13_W { + PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> Ps14W { - Ps14W::new(self, 14) + pub fn ps14(&mut self) -> PS14_W { + PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> Ps15W { - Ps15W::new(self, 15) + pub fn ps15(&mut self) -> PS15_W { + PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> Pr0W { - Pr0W::new(self, 16) + pub fn pr0(&mut self) -> PR0_W { + PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> Pr1W { - Pr1W::new(self, 17) + pub fn pr1(&mut self) -> PR1_W { + PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> Pr2W { - Pr2W::new(self, 18) + pub fn pr2(&mut self) -> PR2_W { + PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> Pr3W { - Pr3W::new(self, 19) + pub fn pr3(&mut self) -> PR3_W { + PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> Pr4W { - Pr4W::new(self, 20) + pub fn pr4(&mut self) -> PR4_W { + PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> Pr5W { - Pr5W::new(self, 21) + pub fn pr5(&mut self) -> PR5_W { + PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> Pr6W { - Pr6W::new(self, 22) + pub fn pr6(&mut self) -> PR6_W { + PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> Pr7W { - Pr7W::new(self, 23) + pub fn pr7(&mut self) -> PR7_W { + PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> Pr8W { - Pr8W::new(self, 24) + pub fn pr8(&mut self) -> PR8_W { + PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> Pr9W { - Pr9W::new(self, 25) + pub fn pr9(&mut self) -> PR9_W { + PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> Pr10W { - Pr10W::new(self, 26) + pub fn pr10(&mut self) -> PR10_W { + PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> Pr11W { - Pr11W::new(self, 27) + pub fn pr11(&mut self) -> PR11_W { + PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> Pr12W { - Pr12W::new(self, 28) + pub fn pr12(&mut self) -> PR12_W { + PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> Pr13W { - Pr13W::new(self, 29) + pub fn pr13(&mut self) -> PR13_W { + PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> Pr14W { - Pr14W::new(self, 30) + pub fn pr14(&mut self) -> PR14_W { + PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> Pr15W { - Pr15W::new(self, 31) + pub fn pr15(&mut self) -> PR15_W { + PR15_W::new(self, 31) } } #[doc = "Port 14 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OmrSpec; -impl crate::RegisterSpec for OmrSpec { +pub struct OMR_SPEC; +impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OmrSpec { +impl crate::Writable for OMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OmrSpec { +impl crate::Resettable for OMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/out.rs b/src/port14/out.rs index 425169f3..694985fd 100644 --- a/src/port14/out.rs +++ b/src/port14/out.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; -impl<'a, REG> P0W<'a, REG> +pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; +impl<'a, REG> P0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0::Value1) + self.variant(P0_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0::Value2) + self.variant(P0_A::VALUE2) } } #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; -impl<'a, REG> P1W<'a, REG> +pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; +impl<'a, REG> P1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1::Value1) + self.variant(P1_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1::Value2) + self.variant(P1_A::VALUE2) } } #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; -impl<'a, REG> P2W<'a, REG> +pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; +impl<'a, REG> P2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2::Value1) + self.variant(P2_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2::Value2) + self.variant(P2_A::VALUE2) } } #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; -impl<'a, REG> P3W<'a, REG> +pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; +impl<'a, REG> P3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3::Value1) + self.variant(P3_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3::Value2) + self.variant(P3_A::VALUE2) } } #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; -impl<'a, REG> P4W<'a, REG> +pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; +impl<'a, REG> P4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4::Value1) + self.variant(P4_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4::Value2) + self.variant(P4_A::VALUE2) } } #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; -impl<'a, REG> P5W<'a, REG> +pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; +impl<'a, REG> P5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5::Value1) + self.variant(P5_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5::Value2) + self.variant(P5_A::VALUE2) } } #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; -impl<'a, REG> P6W<'a, REG> +pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; +impl<'a, REG> P6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6::Value1) + self.variant(P6_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6::Value2) + self.variant(P6_A::VALUE2) } } #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; -impl<'a, REG> P7W<'a, REG> +pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; +impl<'a, REG> P7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7::Value1) + self.variant(P7_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7::Value2) + self.variant(P7_A::VALUE2) } } #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; -impl<'a, REG> P8W<'a, REG> +pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; +impl<'a, REG> P8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8::Value1) + self.variant(P8_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8::Value2) + self.variant(P8_A::VALUE2) } } #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; -impl<'a, REG> P9W<'a, REG> +pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; +impl<'a, REG> P9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9::Value1) + self.variant(P9_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9::Value2) + self.variant(P9_A::VALUE2) } } #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; -impl<'a, REG> P10W<'a, REG> +pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; +impl<'a, REG> P10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10::Value1) + self.variant(P10_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10::Value2) + self.variant(P10_A::VALUE2) } } #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; -impl<'a, REG> P11W<'a, REG> +pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; +impl<'a, REG> P11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11::Value1) + self.variant(P11_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11::Value2) + self.variant(P11_A::VALUE2) } } #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; -impl<'a, REG> P12W<'a, REG> +pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; +impl<'a, REG> P12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12::Value1) + self.variant(P12_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12::Value2) + self.variant(P12_A::VALUE2) } } #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; -impl<'a, REG> P13W<'a, REG> +pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; +impl<'a, REG> P13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13::Value1) + self.variant(P13_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13::Value2) + self.variant(P13_A::VALUE2) } } #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; -impl<'a, REG> P14W<'a, REG> +pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; +impl<'a, REG> P14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14::Value1) + self.variant(P14_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14::Value2) + self.variant(P14_A::VALUE2) } } #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; -impl<'a, REG> P15W<'a, REG> +pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; +impl<'a, REG> P15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15::Value1) + self.variant(P15_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15::Value2) + self.variant(P15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0W { - P0W::new(self, 0) + pub fn p0(&mut self) -> P0_W { + P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1W { - P1W::new(self, 1) + pub fn p1(&mut self) -> P1_W { + P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2W { - P2W::new(self, 2) + pub fn p2(&mut self) -> P2_W { + P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3W { - P3W::new(self, 3) + pub fn p3(&mut self) -> P3_W { + P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4W { - P4W::new(self, 4) + pub fn p4(&mut self) -> P4_W { + P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5W { - P5W::new(self, 5) + pub fn p5(&mut self) -> P5_W { + P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6W { - P6W::new(self, 6) + pub fn p6(&mut self) -> P6_W { + P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7W { - P7W::new(self, 7) + pub fn p7(&mut self) -> P7_W { + P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8W { - P8W::new(self, 8) + pub fn p8(&mut self) -> P8_W { + P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9W { - P9W::new(self, 9) + pub fn p9(&mut self) -> P9_W { + P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10W { - P10W::new(self, 10) + pub fn p10(&mut self) -> P10_W { + P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11W { - P11W::new(self, 11) + pub fn p11(&mut self) -> P11_W { + P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12W { - P12W::new(self, 12) + pub fn p12(&mut self) -> P12_W { + P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13W { - P13W::new(self, 13) + pub fn p13(&mut self) -> P13_W { + P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14W { - P14W::new(self, 14) + pub fn p14(&mut self) -> P14_W { + P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15W { - P15W::new(self, 15) + pub fn p15(&mut self) -> P15_W { + P15_W::new(self, 15) } } #[doc = "Port 14 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutSpec; -impl crate::RegisterSpec for OutSpec { +pub struct OUT_SPEC; +impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OutSpec {} +impl crate::Readable for OUT_SPEC {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OutSpec { +impl crate::Writable for OUT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OutSpec { +impl crate::Resettable for OUT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/pdisc.rs b/src/port14/pdisc.rs index fc0de12f..09ccb15f 100644 --- a/src/port14/pdisc.rs +++ b/src/port14/pdisc.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDISC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis0 { +pub enum PDIS0_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis0) -> Self { + fn from(variant: PDIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type Pdis0R = crate::BitReader; -impl Pdis0R { +pub type PDIS0_R = crate::BitReader; +impl PDIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis0 { + pub const fn variant(&self) -> PDIS0_A { match self.bits { - false => Pdis0::Value1, - true => Pdis0::Value2, + false => PDIS0_A::VALUE1, + true => PDIS0_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis0::Value1 + *self == PDIS0_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis0::Value2 + *self == PDIS0_A::VALUE2 } } #[doc = "Field `PDIS0` writer - Pad Disable for Port n Pin 0"] -pub type Pdis0W<'a, REG> = crate::BitWriter<'a, REG, Pdis0>; -impl<'a, REG> Pdis0W<'a, REG> +pub type PDIS0_W<'a, REG> = crate::BitWriter<'a, REG, PDIS0_A>; +impl<'a, REG> PDIS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis0::Value1) + self.variant(PDIS0_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis0::Value2) + self.variant(PDIS0_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis1 { +pub enum PDIS1_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis1) -> Self { + fn from(variant: PDIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type Pdis1R = crate::BitReader; -impl Pdis1R { +pub type PDIS1_R = crate::BitReader; +impl PDIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis1 { + pub const fn variant(&self) -> PDIS1_A { match self.bits { - false => Pdis1::Value1, - true => Pdis1::Value2, + false => PDIS1_A::VALUE1, + true => PDIS1_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis1::Value1 + *self == PDIS1_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis1::Value2 + *self == PDIS1_A::VALUE2 } } #[doc = "Field `PDIS1` writer - Pad Disable for Port n Pin 1"] -pub type Pdis1W<'a, REG> = crate::BitWriter<'a, REG, Pdis1>; -impl<'a, REG> Pdis1W<'a, REG> +pub type PDIS1_W<'a, REG> = crate::BitWriter<'a, REG, PDIS1_A>; +impl<'a, REG> PDIS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis1::Value1) + self.variant(PDIS1_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis1::Value2) + self.variant(PDIS1_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis2 { +pub enum PDIS2_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis2) -> Self { + fn from(variant: PDIS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type Pdis2R = crate::BitReader; -impl Pdis2R { +pub type PDIS2_R = crate::BitReader; +impl PDIS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis2 { + pub const fn variant(&self) -> PDIS2_A { match self.bits { - false => Pdis2::Value1, - true => Pdis2::Value2, + false => PDIS2_A::VALUE1, + true => PDIS2_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis2::Value1 + *self == PDIS2_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis2::Value2 + *self == PDIS2_A::VALUE2 } } #[doc = "Field `PDIS2` writer - Pad Disable for Port n Pin 2"] -pub type Pdis2W<'a, REG> = crate::BitWriter<'a, REG, Pdis2>; -impl<'a, REG> Pdis2W<'a, REG> +pub type PDIS2_W<'a, REG> = crate::BitWriter<'a, REG, PDIS2_A>; +impl<'a, REG> PDIS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis2::Value1) + self.variant(PDIS2_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis2::Value2) + self.variant(PDIS2_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis3 { +pub enum PDIS3_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis3) -> Self { + fn from(variant: PDIS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type Pdis3R = crate::BitReader; -impl Pdis3R { +pub type PDIS3_R = crate::BitReader; +impl PDIS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis3 { + pub const fn variant(&self) -> PDIS3_A { match self.bits { - false => Pdis3::Value1, - true => Pdis3::Value2, + false => PDIS3_A::VALUE1, + true => PDIS3_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis3::Value1 + *self == PDIS3_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis3::Value2 + *self == PDIS3_A::VALUE2 } } #[doc = "Field `PDIS3` writer - Pad Disable for Port n Pin 3"] -pub type Pdis3W<'a, REG> = crate::BitWriter<'a, REG, Pdis3>; -impl<'a, REG> Pdis3W<'a, REG> +pub type PDIS3_W<'a, REG> = crate::BitWriter<'a, REG, PDIS3_A>; +impl<'a, REG> PDIS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis3::Value1) + self.variant(PDIS3_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis3::Value2) + self.variant(PDIS3_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis4 { +pub enum PDIS4_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis4) -> Self { + fn from(variant: PDIS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type Pdis4R = crate::BitReader; -impl Pdis4R { +pub type PDIS4_R = crate::BitReader; +impl PDIS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis4 { + pub const fn variant(&self) -> PDIS4_A { match self.bits { - false => Pdis4::Value1, - true => Pdis4::Value2, + false => PDIS4_A::VALUE1, + true => PDIS4_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis4::Value1 + *self == PDIS4_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis4::Value2 + *self == PDIS4_A::VALUE2 } } #[doc = "Field `PDIS4` writer - Pad Disable for Port n Pin 4"] -pub type Pdis4W<'a, REG> = crate::BitWriter<'a, REG, Pdis4>; -impl<'a, REG> Pdis4W<'a, REG> +pub type PDIS4_W<'a, REG> = crate::BitWriter<'a, REG, PDIS4_A>; +impl<'a, REG> PDIS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis4::Value1) + self.variant(PDIS4_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis4::Value2) + self.variant(PDIS4_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis5 { +pub enum PDIS5_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis5) -> Self { + fn from(variant: PDIS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type Pdis5R = crate::BitReader; -impl Pdis5R { +pub type PDIS5_R = crate::BitReader; +impl PDIS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis5 { + pub const fn variant(&self) -> PDIS5_A { match self.bits { - false => Pdis5::Value1, - true => Pdis5::Value2, + false => PDIS5_A::VALUE1, + true => PDIS5_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis5::Value1 + *self == PDIS5_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis5::Value2 + *self == PDIS5_A::VALUE2 } } #[doc = "Field `PDIS5` writer - Pad Disable for Port n Pin 5"] -pub type Pdis5W<'a, REG> = crate::BitWriter<'a, REG, Pdis5>; -impl<'a, REG> Pdis5W<'a, REG> +pub type PDIS5_W<'a, REG> = crate::BitWriter<'a, REG, PDIS5_A>; +impl<'a, REG> PDIS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis5::Value1) + self.variant(PDIS5_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis5::Value2) + self.variant(PDIS5_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis6 { +pub enum PDIS6_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis6) -> Self { + fn from(variant: PDIS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type Pdis6R = crate::BitReader; -impl Pdis6R { +pub type PDIS6_R = crate::BitReader; +impl PDIS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis6 { + pub const fn variant(&self) -> PDIS6_A { match self.bits { - false => Pdis6::Value1, - true => Pdis6::Value2, + false => PDIS6_A::VALUE1, + true => PDIS6_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis6::Value1 + *self == PDIS6_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis6::Value2 + *self == PDIS6_A::VALUE2 } } #[doc = "Field `PDIS6` writer - Pad Disable for Port n Pin 6"] -pub type Pdis6W<'a, REG> = crate::BitWriter<'a, REG, Pdis6>; -impl<'a, REG> Pdis6W<'a, REG> +pub type PDIS6_W<'a, REG> = crate::BitWriter<'a, REG, PDIS6_A>; +impl<'a, REG> PDIS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis6::Value1) + self.variant(PDIS6_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis6::Value2) + self.variant(PDIS6_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis7 { +pub enum PDIS7_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis7) -> Self { + fn from(variant: PDIS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type Pdis7R = crate::BitReader; -impl Pdis7R { +pub type PDIS7_R = crate::BitReader; +impl PDIS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis7 { + pub const fn variant(&self) -> PDIS7_A { match self.bits { - false => Pdis7::Value1, - true => Pdis7::Value2, + false => PDIS7_A::VALUE1, + true => PDIS7_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis7::Value1 + *self == PDIS7_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis7::Value2 + *self == PDIS7_A::VALUE2 } } #[doc = "Field `PDIS7` writer - Pad Disable for Port n Pin 7"] -pub type Pdis7W<'a, REG> = crate::BitWriter<'a, REG, Pdis7>; -impl<'a, REG> Pdis7W<'a, REG> +pub type PDIS7_W<'a, REG> = crate::BitWriter<'a, REG, PDIS7_A>; +impl<'a, REG> PDIS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis7::Value1) + self.variant(PDIS7_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis7::Value2) + self.variant(PDIS7_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis8 { +pub enum PDIS8_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis8) -> Self { + fn from(variant: PDIS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type Pdis8R = crate::BitReader; -impl Pdis8R { +pub type PDIS8_R = crate::BitReader; +impl PDIS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis8 { + pub const fn variant(&self) -> PDIS8_A { match self.bits { - false => Pdis8::Value1, - true => Pdis8::Value2, + false => PDIS8_A::VALUE1, + true => PDIS8_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis8::Value1 + *self == PDIS8_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis8::Value2 + *self == PDIS8_A::VALUE2 } } #[doc = "Field `PDIS8` writer - Pad Disable for Port n Pin 8"] -pub type Pdis8W<'a, REG> = crate::BitWriter<'a, REG, Pdis8>; -impl<'a, REG> Pdis8W<'a, REG> +pub type PDIS8_W<'a, REG> = crate::BitWriter<'a, REG, PDIS8_A>; +impl<'a, REG> PDIS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis8::Value1) + self.variant(PDIS8_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis8::Value2) + self.variant(PDIS8_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis9 { +pub enum PDIS9_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis9) -> Self { + fn from(variant: PDIS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type Pdis9R = crate::BitReader; -impl Pdis9R { +pub type PDIS9_R = crate::BitReader; +impl PDIS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis9 { + pub const fn variant(&self) -> PDIS9_A { match self.bits { - false => Pdis9::Value1, - true => Pdis9::Value2, + false => PDIS9_A::VALUE1, + true => PDIS9_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis9::Value1 + *self == PDIS9_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis9::Value2 + *self == PDIS9_A::VALUE2 } } #[doc = "Field `PDIS9` writer - Pad Disable for Port n Pin 9"] -pub type Pdis9W<'a, REG> = crate::BitWriter<'a, REG, Pdis9>; -impl<'a, REG> Pdis9W<'a, REG> +pub type PDIS9_W<'a, REG> = crate::BitWriter<'a, REG, PDIS9_A>; +impl<'a, REG> PDIS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis9::Value1) + self.variant(PDIS9_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis9::Value2) + self.variant(PDIS9_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis10 { +pub enum PDIS10_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis10) -> Self { + fn from(variant: PDIS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type Pdis10R = crate::BitReader; -impl Pdis10R { +pub type PDIS10_R = crate::BitReader; +impl PDIS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis10 { + pub const fn variant(&self) -> PDIS10_A { match self.bits { - false => Pdis10::Value1, - true => Pdis10::Value2, + false => PDIS10_A::VALUE1, + true => PDIS10_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis10::Value1 + *self == PDIS10_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis10::Value2 + *self == PDIS10_A::VALUE2 } } #[doc = "Field `PDIS10` writer - Pad Disable for Port n Pin 10"] -pub type Pdis10W<'a, REG> = crate::BitWriter<'a, REG, Pdis10>; -impl<'a, REG> Pdis10W<'a, REG> +pub type PDIS10_W<'a, REG> = crate::BitWriter<'a, REG, PDIS10_A>; +impl<'a, REG> PDIS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis10::Value1) + self.variant(PDIS10_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis10::Value2) + self.variant(PDIS10_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis11 { +pub enum PDIS11_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis11) -> Self { + fn from(variant: PDIS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type Pdis11R = crate::BitReader; -impl Pdis11R { +pub type PDIS11_R = crate::BitReader; +impl PDIS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis11 { + pub const fn variant(&self) -> PDIS11_A { match self.bits { - false => Pdis11::Value1, - true => Pdis11::Value2, + false => PDIS11_A::VALUE1, + true => PDIS11_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis11::Value1 + *self == PDIS11_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis11::Value2 + *self == PDIS11_A::VALUE2 } } #[doc = "Field `PDIS11` writer - Pad Disable for Port n Pin 11"] -pub type Pdis11W<'a, REG> = crate::BitWriter<'a, REG, Pdis11>; -impl<'a, REG> Pdis11W<'a, REG> +pub type PDIS11_W<'a, REG> = crate::BitWriter<'a, REG, PDIS11_A>; +impl<'a, REG> PDIS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis11::Value1) + self.variant(PDIS11_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis11::Value2) + self.variant(PDIS11_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis12 { +pub enum PDIS12_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis12) -> Self { + fn from(variant: PDIS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type Pdis12R = crate::BitReader; -impl Pdis12R { +pub type PDIS12_R = crate::BitReader; +impl PDIS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis12 { + pub const fn variant(&self) -> PDIS12_A { match self.bits { - false => Pdis12::Value1, - true => Pdis12::Value2, + false => PDIS12_A::VALUE1, + true => PDIS12_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis12::Value1 + *self == PDIS12_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis12::Value2 + *self == PDIS12_A::VALUE2 } } #[doc = "Field `PDIS12` writer - Pad Disable for Port n Pin 12"] -pub type Pdis12W<'a, REG> = crate::BitWriter<'a, REG, Pdis12>; -impl<'a, REG> Pdis12W<'a, REG> +pub type PDIS12_W<'a, REG> = crate::BitWriter<'a, REG, PDIS12_A>; +impl<'a, REG> PDIS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis12::Value1) + self.variant(PDIS12_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis12::Value2) + self.variant(PDIS12_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis13 { +pub enum PDIS13_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis13) -> Self { + fn from(variant: PDIS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type Pdis13R = crate::BitReader; -impl Pdis13R { +pub type PDIS13_R = crate::BitReader; +impl PDIS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis13 { + pub const fn variant(&self) -> PDIS13_A { match self.bits { - false => Pdis13::Value1, - true => Pdis13::Value2, + false => PDIS13_A::VALUE1, + true => PDIS13_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis13::Value1 + *self == PDIS13_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis13::Value2 + *self == PDIS13_A::VALUE2 } } #[doc = "Field `PDIS13` writer - Pad Disable for Port n Pin 13"] -pub type Pdis13W<'a, REG> = crate::BitWriter<'a, REG, Pdis13>; -impl<'a, REG> Pdis13W<'a, REG> +pub type PDIS13_W<'a, REG> = crate::BitWriter<'a, REG, PDIS13_A>; +impl<'a, REG> PDIS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis13::Value1) + self.variant(PDIS13_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis13::Value2) + self.variant(PDIS13_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis14 { +pub enum PDIS14_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis14) -> Self { + fn from(variant: PDIS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type Pdis14R = crate::BitReader; -impl Pdis14R { +pub type PDIS14_R = crate::BitReader; +impl PDIS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis14 { + pub const fn variant(&self) -> PDIS14_A { match self.bits { - false => Pdis14::Value1, - true => Pdis14::Value2, + false => PDIS14_A::VALUE1, + true => PDIS14_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis14::Value1 + *self == PDIS14_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis14::Value2 + *self == PDIS14_A::VALUE2 } } #[doc = "Field `PDIS14` writer - Pad Disable for Port n Pin 14"] -pub type Pdis14W<'a, REG> = crate::BitWriter<'a, REG, Pdis14>; -impl<'a, REG> Pdis14W<'a, REG> +pub type PDIS14_W<'a, REG> = crate::BitWriter<'a, REG, PDIS14_A>; +impl<'a, REG> PDIS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis14::Value1) + self.variant(PDIS14_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis14::Value2) + self.variant(PDIS14_A::VALUE2) } } #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis15 { +pub enum PDIS15_A { #[doc = "0: Digital Pad input is enabled. Analog and digital input path active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Digital Pad input is disabled. Analog input path active. (default)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis15) -> Self { + fn from(variant: PDIS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type Pdis15R = crate::BitReader; -impl Pdis15R { +pub type PDIS15_R = crate::BitReader; +impl PDIS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis15 { + pub const fn variant(&self) -> PDIS15_A { match self.bits { - false => Pdis15::Value1, - true => Pdis15::Value2, + false => PDIS15_A::VALUE1, + true => PDIS15_A::VALUE2, } } #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis15::Value1 + *self == PDIS15_A::VALUE1 } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis15::Value2 + *self == PDIS15_A::VALUE2 } } #[doc = "Field `PDIS15` writer - Pad Disable for Port n Pin 15"] -pub type Pdis15W<'a, REG> = crate::BitWriter<'a, REG, Pdis15>; -impl<'a, REG> Pdis15W<'a, REG> +pub type PDIS15_W<'a, REG> = crate::BitWriter<'a, REG, PDIS15_A>; +impl<'a, REG> PDIS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital Pad input is enabled. Analog and digital input path active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdis15::Value1) + self.variant(PDIS15_A::VALUE1) } #[doc = "Digital Pad input is disabled. Analog input path active. (default)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdis15::Value2) + self.variant(PDIS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> Pdis0R { - Pdis0R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> PDIS0_R { + PDIS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> Pdis1R { - Pdis1R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> PDIS1_R { + PDIS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> Pdis2R { - Pdis2R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> PDIS2_R { + PDIS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> Pdis3R { - Pdis3R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> PDIS3_R { + PDIS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> Pdis4R { - Pdis4R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> PDIS4_R { + PDIS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> Pdis5R { - Pdis5R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> PDIS5_R { + PDIS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> Pdis6R { - Pdis6R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> PDIS6_R { + PDIS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> Pdis7R { - Pdis7R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> PDIS7_R { + PDIS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> Pdis8R { - Pdis8R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> PDIS8_R { + PDIS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> Pdis9R { - Pdis9R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> PDIS9_R { + PDIS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> Pdis10R { - Pdis10R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> PDIS10_R { + PDIS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> Pdis11R { - Pdis11R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> PDIS11_R { + PDIS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> Pdis12R { - Pdis12R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> PDIS12_R { + PDIS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> Pdis13R { - Pdis13R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> PDIS13_R { + PDIS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> Pdis14R { - Pdis14R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> PDIS14_R { + PDIS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> Pdis15R { - Pdis15R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> PDIS15_R { + PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] #[must_use] - pub fn pdis0(&mut self) -> Pdis0W { - Pdis0W::new(self, 0) + pub fn pdis0(&mut self) -> PDIS0_W { + PDIS0_W::new(self, 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] #[must_use] - pub fn pdis1(&mut self) -> Pdis1W { - Pdis1W::new(self, 1) + pub fn pdis1(&mut self) -> PDIS1_W { + PDIS1_W::new(self, 1) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] #[must_use] - pub fn pdis2(&mut self) -> Pdis2W { - Pdis2W::new(self, 2) + pub fn pdis2(&mut self) -> PDIS2_W { + PDIS2_W::new(self, 2) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] #[must_use] - pub fn pdis3(&mut self) -> Pdis3W { - Pdis3W::new(self, 3) + pub fn pdis3(&mut self) -> PDIS3_W { + PDIS3_W::new(self, 3) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] #[must_use] - pub fn pdis4(&mut self) -> Pdis4W { - Pdis4W::new(self, 4) + pub fn pdis4(&mut self) -> PDIS4_W { + PDIS4_W::new(self, 4) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] #[must_use] - pub fn pdis5(&mut self) -> Pdis5W { - Pdis5W::new(self, 5) + pub fn pdis5(&mut self) -> PDIS5_W { + PDIS5_W::new(self, 5) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] #[must_use] - pub fn pdis6(&mut self) -> Pdis6W { - Pdis6W::new(self, 6) + pub fn pdis6(&mut self) -> PDIS6_W { + PDIS6_W::new(self, 6) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] #[must_use] - pub fn pdis7(&mut self) -> Pdis7W { - Pdis7W::new(self, 7) + pub fn pdis7(&mut self) -> PDIS7_W { + PDIS7_W::new(self, 7) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] #[must_use] - pub fn pdis8(&mut self) -> Pdis8W { - Pdis8W::new(self, 8) + pub fn pdis8(&mut self) -> PDIS8_W { + PDIS8_W::new(self, 8) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] #[must_use] - pub fn pdis9(&mut self) -> Pdis9W { - Pdis9W::new(self, 9) + pub fn pdis9(&mut self) -> PDIS9_W { + PDIS9_W::new(self, 9) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] #[must_use] - pub fn pdis10(&mut self) -> Pdis10W { - Pdis10W::new(self, 10) + pub fn pdis10(&mut self) -> PDIS10_W { + PDIS10_W::new(self, 10) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] #[must_use] - pub fn pdis11(&mut self) -> Pdis11W { - Pdis11W::new(self, 11) + pub fn pdis11(&mut self) -> PDIS11_W { + PDIS11_W::new(self, 11) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] #[must_use] - pub fn pdis12(&mut self) -> Pdis12W { - Pdis12W::new(self, 12) + pub fn pdis12(&mut self) -> PDIS12_W { + PDIS12_W::new(self, 12) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] #[must_use] - pub fn pdis13(&mut self) -> Pdis13W { - Pdis13W::new(self, 13) + pub fn pdis13(&mut self) -> PDIS13_W { + PDIS13_W::new(self, 13) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] #[must_use] - pub fn pdis14(&mut self) -> Pdis14W { - Pdis14W::new(self, 14) + pub fn pdis14(&mut self) -> PDIS14_W { + PDIS14_W::new(self, 14) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] #[must_use] - pub fn pdis15(&mut self) -> Pdis15W { - Pdis15W::new(self, 15) + pub fn pdis15(&mut self) -> PDIS15_W { + PDIS15_W::new(self, 15) } } #[doc = "Port 14 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdisc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdiscSpec; -impl crate::RegisterSpec for PdiscSpec { +pub struct PDISC_SPEC; +impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PdiscSpec {} +impl crate::Readable for PDISC_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdisc::W`](W) writer structure"] -impl crate::Writable for PdiscSpec { +impl crate::Writable for PDISC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PdiscSpec { +impl crate::Resettable for PDISC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port14/pps.rs b/src/port14/pps.rs index 191bfda0..1aeb33db 100644 --- a/src/port14/pps.rs +++ b/src/port14/pps.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps0 { +pub enum PPS0_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps0) -> Self { + fn from(variant: PPS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type Pps0R = crate::BitReader; -impl Pps0R { +pub type PPS0_R = crate::BitReader; +impl PPS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps0 { + pub const fn variant(&self) -> PPS0_A { match self.bits { - false => Pps0::Value1, - true => Pps0::Value2, + false => PPS0_A::VALUE1, + true => PPS0_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps0::Value1 + *self == PPS0_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps0::Value2 + *self == PPS0_A::VALUE2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; -impl<'a, REG> Pps0W<'a, REG> +pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; +impl<'a, REG> PPS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps0::Value1) + self.variant(PPS0_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps0::Value2) + self.variant(PPS0_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps1 { +pub enum PPS1_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps1) -> Self { + fn from(variant: PPS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type Pps1R = crate::BitReader; -impl Pps1R { +pub type PPS1_R = crate::BitReader; +impl PPS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps1 { + pub const fn variant(&self) -> PPS1_A { match self.bits { - false => Pps1::Value1, - true => Pps1::Value2, + false => PPS1_A::VALUE1, + true => PPS1_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps1::Value1 + *self == PPS1_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps1::Value2 + *self == PPS1_A::VALUE2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; -impl<'a, REG> Pps1W<'a, REG> +pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; +impl<'a, REG> PPS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps1::Value1) + self.variant(PPS1_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps1::Value2) + self.variant(PPS1_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps2 { +pub enum PPS2_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps2) -> Self { + fn from(variant: PPS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type Pps2R = crate::BitReader; -impl Pps2R { +pub type PPS2_R = crate::BitReader; +impl PPS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps2 { + pub const fn variant(&self) -> PPS2_A { match self.bits { - false => Pps2::Value1, - true => Pps2::Value2, + false => PPS2_A::VALUE1, + true => PPS2_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps2::Value1 + *self == PPS2_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps2::Value2 + *self == PPS2_A::VALUE2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; -impl<'a, REG> Pps2W<'a, REG> +pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; +impl<'a, REG> PPS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps2::Value1) + self.variant(PPS2_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps2::Value2) + self.variant(PPS2_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps3 { +pub enum PPS3_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps3) -> Self { + fn from(variant: PPS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type Pps3R = crate::BitReader; -impl Pps3R { +pub type PPS3_R = crate::BitReader; +impl PPS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps3 { + pub const fn variant(&self) -> PPS3_A { match self.bits { - false => Pps3::Value1, - true => Pps3::Value2, + false => PPS3_A::VALUE1, + true => PPS3_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps3::Value1 + *self == PPS3_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps3::Value2 + *self == PPS3_A::VALUE2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; -impl<'a, REG> Pps3W<'a, REG> +pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; +impl<'a, REG> PPS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps3::Value1) + self.variant(PPS3_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps3::Value2) + self.variant(PPS3_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps4 { +pub enum PPS4_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps4) -> Self { + fn from(variant: PPS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type Pps4R = crate::BitReader; -impl Pps4R { +pub type PPS4_R = crate::BitReader; +impl PPS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps4 { + pub const fn variant(&self) -> PPS4_A { match self.bits { - false => Pps4::Value1, - true => Pps4::Value2, + false => PPS4_A::VALUE1, + true => PPS4_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps4::Value1 + *self == PPS4_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps4::Value2 + *self == PPS4_A::VALUE2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; -impl<'a, REG> Pps4W<'a, REG> +pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; +impl<'a, REG> PPS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps4::Value1) + self.variant(PPS4_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps4::Value2) + self.variant(PPS4_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps5 { +pub enum PPS5_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps5) -> Self { + fn from(variant: PPS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type Pps5R = crate::BitReader; -impl Pps5R { +pub type PPS5_R = crate::BitReader; +impl PPS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps5 { + pub const fn variant(&self) -> PPS5_A { match self.bits { - false => Pps5::Value1, - true => Pps5::Value2, + false => PPS5_A::VALUE1, + true => PPS5_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps5::Value1 + *self == PPS5_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps5::Value2 + *self == PPS5_A::VALUE2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; -impl<'a, REG> Pps5W<'a, REG> +pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; +impl<'a, REG> PPS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps5::Value1) + self.variant(PPS5_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps5::Value2) + self.variant(PPS5_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps6 { +pub enum PPS6_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps6) -> Self { + fn from(variant: PPS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type Pps6R = crate::BitReader; -impl Pps6R { +pub type PPS6_R = crate::BitReader; +impl PPS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps6 { + pub const fn variant(&self) -> PPS6_A { match self.bits { - false => Pps6::Value1, - true => Pps6::Value2, + false => PPS6_A::VALUE1, + true => PPS6_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps6::Value1 + *self == PPS6_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps6::Value2 + *self == PPS6_A::VALUE2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; -impl<'a, REG> Pps6W<'a, REG> +pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; +impl<'a, REG> PPS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps6::Value1) + self.variant(PPS6_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps6::Value2) + self.variant(PPS6_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps7 { +pub enum PPS7_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps7) -> Self { + fn from(variant: PPS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type Pps7R = crate::BitReader; -impl Pps7R { +pub type PPS7_R = crate::BitReader; +impl PPS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps7 { + pub const fn variant(&self) -> PPS7_A { match self.bits { - false => Pps7::Value1, - true => Pps7::Value2, + false => PPS7_A::VALUE1, + true => PPS7_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps7::Value1 + *self == PPS7_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps7::Value2 + *self == PPS7_A::VALUE2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; -impl<'a, REG> Pps7W<'a, REG> +pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; +impl<'a, REG> PPS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps7::Value1) + self.variant(PPS7_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps7::Value2) + self.variant(PPS7_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps8 { +pub enum PPS8_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps8) -> Self { + fn from(variant: PPS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type Pps8R = crate::BitReader; -impl Pps8R { +pub type PPS8_R = crate::BitReader; +impl PPS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps8 { + pub const fn variant(&self) -> PPS8_A { match self.bits { - false => Pps8::Value1, - true => Pps8::Value2, + false => PPS8_A::VALUE1, + true => PPS8_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps8::Value1 + *self == PPS8_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps8::Value2 + *self == PPS8_A::VALUE2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; -impl<'a, REG> Pps8W<'a, REG> +pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; +impl<'a, REG> PPS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps8::Value1) + self.variant(PPS8_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps8::Value2) + self.variant(PPS8_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps9 { +pub enum PPS9_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps9) -> Self { + fn from(variant: PPS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type Pps9R = crate::BitReader; -impl Pps9R { +pub type PPS9_R = crate::BitReader; +impl PPS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps9 { + pub const fn variant(&self) -> PPS9_A { match self.bits { - false => Pps9::Value1, - true => Pps9::Value2, + false => PPS9_A::VALUE1, + true => PPS9_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps9::Value1 + *self == PPS9_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps9::Value2 + *self == PPS9_A::VALUE2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; -impl<'a, REG> Pps9W<'a, REG> +pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; +impl<'a, REG> PPS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps9::Value1) + self.variant(PPS9_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps9::Value2) + self.variant(PPS9_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps10 { +pub enum PPS10_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps10) -> Self { + fn from(variant: PPS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type Pps10R = crate::BitReader; -impl Pps10R { +pub type PPS10_R = crate::BitReader; +impl PPS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps10 { + pub const fn variant(&self) -> PPS10_A { match self.bits { - false => Pps10::Value1, - true => Pps10::Value2, + false => PPS10_A::VALUE1, + true => PPS10_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps10::Value1 + *self == PPS10_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps10::Value2 + *self == PPS10_A::VALUE2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; -impl<'a, REG> Pps10W<'a, REG> +pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; +impl<'a, REG> PPS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps10::Value1) + self.variant(PPS10_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps10::Value2) + self.variant(PPS10_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps11 { +pub enum PPS11_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps11) -> Self { + fn from(variant: PPS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type Pps11R = crate::BitReader; -impl Pps11R { +pub type PPS11_R = crate::BitReader; +impl PPS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps11 { + pub const fn variant(&self) -> PPS11_A { match self.bits { - false => Pps11::Value1, - true => Pps11::Value2, + false => PPS11_A::VALUE1, + true => PPS11_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps11::Value1 + *self == PPS11_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps11::Value2 + *self == PPS11_A::VALUE2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; -impl<'a, REG> Pps11W<'a, REG> +pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; +impl<'a, REG> PPS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps11::Value1) + self.variant(PPS11_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps11::Value2) + self.variant(PPS11_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps12 { +pub enum PPS12_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps12) -> Self { + fn from(variant: PPS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type Pps12R = crate::BitReader; -impl Pps12R { +pub type PPS12_R = crate::BitReader; +impl PPS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps12 { + pub const fn variant(&self) -> PPS12_A { match self.bits { - false => Pps12::Value1, - true => Pps12::Value2, + false => PPS12_A::VALUE1, + true => PPS12_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps12::Value1 + *self == PPS12_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps12::Value2 + *self == PPS12_A::VALUE2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; -impl<'a, REG> Pps12W<'a, REG> +pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; +impl<'a, REG> PPS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps12::Value1) + self.variant(PPS12_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps12::Value2) + self.variant(PPS12_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps13 { +pub enum PPS13_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps13) -> Self { + fn from(variant: PPS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type Pps13R = crate::BitReader; -impl Pps13R { +pub type PPS13_R = crate::BitReader; +impl PPS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps13 { + pub const fn variant(&self) -> PPS13_A { match self.bits { - false => Pps13::Value1, - true => Pps13::Value2, + false => PPS13_A::VALUE1, + true => PPS13_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps13::Value1 + *self == PPS13_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps13::Value2 + *self == PPS13_A::VALUE2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; -impl<'a, REG> Pps13W<'a, REG> +pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; +impl<'a, REG> PPS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps13::Value1) + self.variant(PPS13_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps13::Value2) + self.variant(PPS13_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps14 { +pub enum PPS14_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps14) -> Self { + fn from(variant: PPS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type Pps14R = crate::BitReader; -impl Pps14R { +pub type PPS14_R = crate::BitReader; +impl PPS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps14 { + pub const fn variant(&self) -> PPS14_A { match self.bits { - false => Pps14::Value1, - true => Pps14::Value2, + false => PPS14_A::VALUE1, + true => PPS14_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps14::Value1 + *self == PPS14_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps14::Value2 + *self == PPS14_A::VALUE2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; -impl<'a, REG> Pps14W<'a, REG> +pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; +impl<'a, REG> PPS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps14::Value1) + self.variant(PPS14_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps14::Value2) + self.variant(PPS14_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps15 { +pub enum PPS15_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps15) -> Self { + fn from(variant: PPS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type Pps15R = crate::BitReader; -impl Pps15R { +pub type PPS15_R = crate::BitReader; +impl PPS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps15 { + pub const fn variant(&self) -> PPS15_A { match self.bits { - false => Pps15::Value1, - true => Pps15::Value2, + false => PPS15_A::VALUE1, + true => PPS15_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps15::Value1 + *self == PPS15_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps15::Value2 + *self == PPS15_A::VALUE2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; -impl<'a, REG> Pps15W<'a, REG> +pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; +impl<'a, REG> PPS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps15::Value1) + self.variant(PPS15_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps15::Value2) + self.variant(PPS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> Pps0R { - Pps0R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> PPS0_R { + PPS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> Pps1R { - Pps1R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> PPS1_R { + PPS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> Pps2R { - Pps2R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> PPS2_R { + PPS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> Pps3R { - Pps3R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> PPS3_R { + PPS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> Pps4R { - Pps4R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> PPS4_R { + PPS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> Pps5R { - Pps5R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> PPS5_R { + PPS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> Pps6R { - Pps6R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> PPS6_R { + PPS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> Pps7R { - Pps7R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> PPS7_R { + PPS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> Pps8R { - Pps8R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> PPS8_R { + PPS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> Pps9R { - Pps9R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> PPS9_R { + PPS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> Pps10R { - Pps10R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> PPS10_R { + PPS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> Pps11R { - Pps11R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> PPS11_R { + PPS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> Pps12R { - Pps12R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> PPS12_R { + PPS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> Pps13R { - Pps13R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> PPS13_R { + PPS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> Pps14R { - Pps14R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> PPS14_R { + PPS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> Pps15R { - Pps15R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> PPS15_R { + PPS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> Pps0W { - Pps0W::new(self, 0) + pub fn pps0(&mut self) -> PPS0_W { + PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> Pps1W { - Pps1W::new(self, 1) + pub fn pps1(&mut self) -> PPS1_W { + PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> Pps2W { - Pps2W::new(self, 2) + pub fn pps2(&mut self) -> PPS2_W { + PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> Pps3W { - Pps3W::new(self, 3) + pub fn pps3(&mut self) -> PPS3_W { + PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> Pps4W { - Pps4W::new(self, 4) + pub fn pps4(&mut self) -> PPS4_W { + PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> Pps5W { - Pps5W::new(self, 5) + pub fn pps5(&mut self) -> PPS5_W { + PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> Pps6W { - Pps6W::new(self, 6) + pub fn pps6(&mut self) -> PPS6_W { + PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> Pps7W { - Pps7W::new(self, 7) + pub fn pps7(&mut self) -> PPS7_W { + PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> Pps8W { - Pps8W::new(self, 8) + pub fn pps8(&mut self) -> PPS8_W { + PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> Pps9W { - Pps9W::new(self, 9) + pub fn pps9(&mut self) -> PPS9_W { + PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> Pps10W { - Pps10W::new(self, 10) + pub fn pps10(&mut self) -> PPS10_W { + PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> Pps11W { - Pps11W::new(self, 11) + pub fn pps11(&mut self) -> PPS11_W { + PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> Pps12W { - Pps12W::new(self, 12) + pub fn pps12(&mut self) -> PPS12_W { + PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> Pps13W { - Pps13W::new(self, 13) + pub fn pps13(&mut self) -> PPS13_W { + PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> Pps14W { - Pps14W::new(self, 14) + pub fn pps14(&mut self) -> PPS14_W { + PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> Pps15W { - Pps15W::new(self, 15) + pub fn pps15(&mut self) -> PPS15_W { + PPS15_W::new(self, 15) } } #[doc = "Port 14 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PpsSpec; -impl crate::RegisterSpec for PpsSpec { +pub struct PPS_SPEC; +impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PpsSpec {} +impl crate::Readable for PPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PpsSpec { +impl crate::Writable for PPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PpsSpec { +impl crate::Resettable for PPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2.rs b/src/port2.rs index 752a56ca..4f856c7e 100644 --- a/src/port2.rs +++ b/src/port2.rs @@ -1,155 +1,143 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - out: Out, - omr: Omr, + out: OUT, + omr: OMR, _reserved2: [u8; 0x08], - iocr0: Iocr0, - iocr4: Iocr4, - iocr8: Iocr8, - iocr12: Iocr12, + iocr0: IOCR0, + iocr4: IOCR4, + iocr8: IOCR8, + iocr12: IOCR12, _reserved6: [u8; 0x04], - in_: In, + in_: IN, _reserved7: [u8; 0x18], - pdr0: Pdr0, - pdr1: Pdr1, + pdr0: PDR0, + pdr1: PDR1, _reserved9: [u8; 0x18], - pdisc: Pdisc, + pdisc: PDISC, _reserved10: [u8; 0x0c], - pps: Pps, - hwsel: Hwsel, + pps: PPS, + hwsel: HWSEL, } impl RegisterBlock { #[doc = "0x00 - Port 2 Output Register"] #[inline(always)] - pub const fn out(&self) -> &Out { + pub const fn out(&self) -> &OUT { &self.out } #[doc = "0x04 - Port 2 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &Omr { + pub const fn omr(&self) -> &OMR { &self.omr } #[doc = "0x10 - Port 2 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &Iocr0 { + pub const fn iocr0(&self) -> &IOCR0 { &self.iocr0 } #[doc = "0x14 - Port 2 Input/Output Control Register 4"] #[inline(always)] - pub const fn iocr4(&self) -> &Iocr4 { + pub const fn iocr4(&self) -> &IOCR4 { &self.iocr4 } #[doc = "0x18 - Port 2 Input/Output Control Register 8"] #[inline(always)] - pub const fn iocr8(&self) -> &Iocr8 { + pub const fn iocr8(&self) -> &IOCR8 { &self.iocr8 } #[doc = "0x1c - Port 2 Input/Output Control Register 12"] #[inline(always)] - pub const fn iocr12(&self) -> &Iocr12 { + pub const fn iocr12(&self) -> &IOCR12 { &self.iocr12 } #[doc = "0x24 - Port 2 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &In { + pub const fn in_(&self) -> &IN { &self.in_ } #[doc = "0x40 - Port 2 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &Pdr0 { + pub const fn pdr0(&self) -> &PDR0 { &self.pdr0 } #[doc = "0x44 - Port 2 Pad Driver Mode 1 Register"] #[inline(always)] - pub const fn pdr1(&self) -> &Pdr1 { + pub const fn pdr1(&self) -> &PDR1 { &self.pdr1 } #[doc = "0x60 - Port 2 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &Pdisc { + pub const fn pdisc(&self) -> &PDISC { &self.pdisc } #[doc = "0x70 - Port 2 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &Pps { + pub const fn pps(&self) -> &PPS { &self.pps } #[doc = "0x74 - Port 2 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &Hwsel { + pub const fn hwsel(&self) -> &HWSEL { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -#[doc(alias = "OUT")] -pub type Out = crate::Reg; +pub type OUT = crate::Reg; #[doc = "Port 2 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -#[doc(alias = "OMR")] -pub type Omr = crate::Reg; +pub type OMR = crate::Reg; #[doc = "Port 2 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -#[doc(alias = "IOCR0")] -pub type Iocr0 = crate::Reg; +pub type IOCR0 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IOCR4 (rw) register accessor: Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr4`] module"] -#[doc(alias = "IOCR4")] -pub type Iocr4 = crate::Reg; +pub type IOCR4 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 4"] pub mod iocr4; #[doc = "IOCR8 (rw) register accessor: Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr8`] module"] -#[doc(alias = "IOCR8")] -pub type Iocr8 = crate::Reg; +pub type IOCR8 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 8"] pub mod iocr8; #[doc = "IOCR12 (rw) register accessor: Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr12`] module"] -#[doc(alias = "IOCR12")] -pub type Iocr12 = crate::Reg; +pub type IOCR12 = crate::Reg; #[doc = "Port 2 Input/Output Control Register 12"] pub mod iocr12; #[doc = "IN (r) register accessor: Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Port 2 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -#[doc(alias = "PDR0")] -pub type Pdr0 = crate::Reg; +pub type PDR0 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDR1 (rw) register accessor: Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr1`] module"] -#[doc(alias = "PDR1")] -pub type Pdr1 = crate::Reg; +pub type PDR1 = crate::Reg; #[doc = "Port 2 Pad Driver Mode 1 Register"] pub mod pdr1; #[doc = "PDISC (r) register accessor: Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -#[doc(alias = "PDISC")] -pub type Pdisc = crate::Reg; +pub type PDISC = crate::Reg; #[doc = "Port 2 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -#[doc(alias = "PPS")] -pub type Pps = crate::Reg; +pub type PPS = crate::Reg; #[doc = "Port 2 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -#[doc(alias = "HWSEL")] -pub type Hwsel = crate::Reg; +pub type HWSEL = crate::Reg; #[doc = "Port 2 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port2/hwsel.rs b/src/port2/hwsel.rs index 54d4c48a..955f98a6 100644 --- a/src/port2/hwsel.rs +++ b/src/port2/hwsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw0 { +pub enum HW0_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw0) -> Self { + fn from(variant: HW0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw0 { +impl crate::FieldSpec for HW0_A { type Ux = u8; } -impl crate::IsEnum for Hw0 {} +impl crate::IsEnum for HW0_A {} #[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type Hw0R = crate::FieldReader; -impl Hw0R { +pub type HW0_R = crate::FieldReader; +impl HW0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw0::Value1), - 1 => Some(Hw0::Value2), - 2 => Some(Hw0::Value3), + 0 => Some(HW0_A::VALUE1), + 1 => Some(HW0_A::VALUE2), + 2 => Some(HW0_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw0::Value1 + *self == HW0_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw0::Value2 + *self == HW0_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw0::Value3 + *self == HW0_A::VALUE3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; -impl<'a, REG> Hw0W<'a, REG> +pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; +impl<'a, REG> HW0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw0::Value1) + self.variant(HW0_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw0::Value2) + self.variant(HW0_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw0::Value3) + self.variant(HW0_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw1 { +pub enum HW1_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw1) -> Self { + fn from(variant: HW1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw1 { +impl crate::FieldSpec for HW1_A { type Ux = u8; } -impl crate::IsEnum for Hw1 {} +impl crate::IsEnum for HW1_A {} #[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type Hw1R = crate::FieldReader; -impl Hw1R { +pub type HW1_R = crate::FieldReader; +impl HW1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw1::Value1), - 1 => Some(Hw1::Value2), - 2 => Some(Hw1::Value3), + 0 => Some(HW1_A::VALUE1), + 1 => Some(HW1_A::VALUE2), + 2 => Some(HW1_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw1::Value1 + *self == HW1_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw1::Value2 + *self == HW1_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw1::Value3 + *self == HW1_A::VALUE3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; -impl<'a, REG> Hw1W<'a, REG> +pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; +impl<'a, REG> HW1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw1::Value1) + self.variant(HW1_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw1::Value2) + self.variant(HW1_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw1::Value3) + self.variant(HW1_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw2 { +pub enum HW2_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw2) -> Self { + fn from(variant: HW2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw2 { +impl crate::FieldSpec for HW2_A { type Ux = u8; } -impl crate::IsEnum for Hw2 {} +impl crate::IsEnum for HW2_A {} #[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type Hw2R = crate::FieldReader; -impl Hw2R { +pub type HW2_R = crate::FieldReader; +impl HW2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw2::Value1), - 1 => Some(Hw2::Value2), - 2 => Some(Hw2::Value3), + 0 => Some(HW2_A::VALUE1), + 1 => Some(HW2_A::VALUE2), + 2 => Some(HW2_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw2::Value1 + *self == HW2_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw2::Value2 + *self == HW2_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw2::Value3 + *self == HW2_A::VALUE3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; -impl<'a, REG> Hw2W<'a, REG> +pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; +impl<'a, REG> HW2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw2::Value1) + self.variant(HW2_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw2::Value2) + self.variant(HW2_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw2::Value3) + self.variant(HW2_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw3 { +pub enum HW3_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw3) -> Self { + fn from(variant: HW3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw3 { +impl crate::FieldSpec for HW3_A { type Ux = u8; } -impl crate::IsEnum for Hw3 {} +impl crate::IsEnum for HW3_A {} #[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type Hw3R = crate::FieldReader; -impl Hw3R { +pub type HW3_R = crate::FieldReader; +impl HW3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw3::Value1), - 1 => Some(Hw3::Value2), - 2 => Some(Hw3::Value3), + 0 => Some(HW3_A::VALUE1), + 1 => Some(HW3_A::VALUE2), + 2 => Some(HW3_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw3::Value1 + *self == HW3_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw3::Value2 + *self == HW3_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw3::Value3 + *self == HW3_A::VALUE3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; -impl<'a, REG> Hw3W<'a, REG> +pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; +impl<'a, REG> HW3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,72 +281,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw3::Value1) + self.variant(HW3_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw3::Value2) + self.variant(HW3_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw3::Value3) + self.variant(HW3_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw4 { +pub enum HW4_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw4) -> Self { + fn from(variant: HW4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw4 { +impl crate::FieldSpec for HW4_A { type Ux = u8; } -impl crate::IsEnum for Hw4 {} +impl crate::IsEnum for HW4_A {} #[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type Hw4R = crate::FieldReader; -impl Hw4R { +pub type HW4_R = crate::FieldReader; +impl HW4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw4::Value1), - 1 => Some(Hw4::Value2), - 2 => Some(Hw4::Value3), + 0 => Some(HW4_A::VALUE1), + 1 => Some(HW4_A::VALUE2), + 2 => Some(HW4_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw4::Value1 + *self == HW4_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw4::Value2 + *self == HW4_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw4::Value3 + *self == HW4_A::VALUE3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; -impl<'a, REG> Hw4W<'a, REG> +pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; +impl<'a, REG> HW4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -354,72 +354,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw4::Value1) + self.variant(HW4_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw4::Value2) + self.variant(HW4_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw4::Value3) + self.variant(HW4_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw5 { +pub enum HW5_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw5) -> Self { + fn from(variant: HW5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw5 { +impl crate::FieldSpec for HW5_A { type Ux = u8; } -impl crate::IsEnum for Hw5 {} +impl crate::IsEnum for HW5_A {} #[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type Hw5R = crate::FieldReader; -impl Hw5R { +pub type HW5_R = crate::FieldReader; +impl HW5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw5::Value1), - 1 => Some(Hw5::Value2), - 2 => Some(Hw5::Value3), + 0 => Some(HW5_A::VALUE1), + 1 => Some(HW5_A::VALUE2), + 2 => Some(HW5_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw5::Value1 + *self == HW5_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw5::Value2 + *self == HW5_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw5::Value3 + *self == HW5_A::VALUE3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; -impl<'a, REG> Hw5W<'a, REG> +pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; +impl<'a, REG> HW5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,72 +427,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw5::Value1) + self.variant(HW5_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw5::Value2) + self.variant(HW5_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw5::Value3) + self.variant(HW5_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw6 { +pub enum HW6_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw6) -> Self { + fn from(variant: HW6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw6 { +impl crate::FieldSpec for HW6_A { type Ux = u8; } -impl crate::IsEnum for Hw6 {} +impl crate::IsEnum for HW6_A {} #[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type Hw6R = crate::FieldReader; -impl Hw6R { +pub type HW6_R = crate::FieldReader; +impl HW6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw6::Value1), - 1 => Some(Hw6::Value2), - 2 => Some(Hw6::Value3), + 0 => Some(HW6_A::VALUE1), + 1 => Some(HW6_A::VALUE2), + 2 => Some(HW6_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw6::Value1 + *self == HW6_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw6::Value2 + *self == HW6_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw6::Value3 + *self == HW6_A::VALUE3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; -impl<'a, REG> Hw6W<'a, REG> +pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; +impl<'a, REG> HW6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw6::Value1) + self.variant(HW6_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw6::Value2) + self.variant(HW6_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw6::Value3) + self.variant(HW6_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw7 { +pub enum HW7_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw7) -> Self { + fn from(variant: HW7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw7 { +impl crate::FieldSpec for HW7_A { type Ux = u8; } -impl crate::IsEnum for Hw7 {} +impl crate::IsEnum for HW7_A {} #[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type Hw7R = crate::FieldReader; -impl Hw7R { +pub type HW7_R = crate::FieldReader; +impl HW7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw7::Value1), - 1 => Some(Hw7::Value2), - 2 => Some(Hw7::Value3), + 0 => Some(HW7_A::VALUE1), + 1 => Some(HW7_A::VALUE2), + 2 => Some(HW7_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw7::Value1 + *self == HW7_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw7::Value2 + *self == HW7_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw7::Value3 + *self == HW7_A::VALUE3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; -impl<'a, REG> Hw7W<'a, REG> +pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; +impl<'a, REG> HW7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,72 +573,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw7::Value1) + self.variant(HW7_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw7::Value2) + self.variant(HW7_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw7::Value3) + self.variant(HW7_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw8 { +pub enum HW8_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw8) -> Self { + fn from(variant: HW8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw8 { +impl crate::FieldSpec for HW8_A { type Ux = u8; } -impl crate::IsEnum for Hw8 {} +impl crate::IsEnum for HW8_A {} #[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type Hw8R = crate::FieldReader; -impl Hw8R { +pub type HW8_R = crate::FieldReader; +impl HW8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw8::Value1), - 1 => Some(Hw8::Value2), - 2 => Some(Hw8::Value3), + 0 => Some(HW8_A::VALUE1), + 1 => Some(HW8_A::VALUE2), + 2 => Some(HW8_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw8::Value1 + *self == HW8_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw8::Value2 + *self == HW8_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw8::Value3 + *self == HW8_A::VALUE3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; -impl<'a, REG> Hw8W<'a, REG> +pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; +impl<'a, REG> HW8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -646,72 +646,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw8::Value1) + self.variant(HW8_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw8::Value2) + self.variant(HW8_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw8::Value3) + self.variant(HW8_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw9 { +pub enum HW9_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw9) -> Self { + fn from(variant: HW9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw9 { +impl crate::FieldSpec for HW9_A { type Ux = u8; } -impl crate::IsEnum for Hw9 {} +impl crate::IsEnum for HW9_A {} #[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type Hw9R = crate::FieldReader; -impl Hw9R { +pub type HW9_R = crate::FieldReader; +impl HW9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw9::Value1), - 1 => Some(Hw9::Value2), - 2 => Some(Hw9::Value3), + 0 => Some(HW9_A::VALUE1), + 1 => Some(HW9_A::VALUE2), + 2 => Some(HW9_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw9::Value1 + *self == HW9_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw9::Value2 + *self == HW9_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw9::Value3 + *self == HW9_A::VALUE3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; -impl<'a, REG> Hw9W<'a, REG> +pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; +impl<'a, REG> HW9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -719,72 +719,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw9::Value1) + self.variant(HW9_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw9::Value2) + self.variant(HW9_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw9::Value3) + self.variant(HW9_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw10 { +pub enum HW10_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw10) -> Self { + fn from(variant: HW10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw10 { +impl crate::FieldSpec for HW10_A { type Ux = u8; } -impl crate::IsEnum for Hw10 {} +impl crate::IsEnum for HW10_A {} #[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type Hw10R = crate::FieldReader; -impl Hw10R { +pub type HW10_R = crate::FieldReader; +impl HW10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw10::Value1), - 1 => Some(Hw10::Value2), - 2 => Some(Hw10::Value3), + 0 => Some(HW10_A::VALUE1), + 1 => Some(HW10_A::VALUE2), + 2 => Some(HW10_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw10::Value1 + *self == HW10_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw10::Value2 + *self == HW10_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw10::Value3 + *self == HW10_A::VALUE3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; -impl<'a, REG> Hw10W<'a, REG> +pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; +impl<'a, REG> HW10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,72 +792,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw10::Value1) + self.variant(HW10_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw10::Value2) + self.variant(HW10_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw10::Value3) + self.variant(HW10_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw11 { +pub enum HW11_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw11) -> Self { + fn from(variant: HW11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw11 { +impl crate::FieldSpec for HW11_A { type Ux = u8; } -impl crate::IsEnum for Hw11 {} +impl crate::IsEnum for HW11_A {} #[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type Hw11R = crate::FieldReader; -impl Hw11R { +pub type HW11_R = crate::FieldReader; +impl HW11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw11::Value1), - 1 => Some(Hw11::Value2), - 2 => Some(Hw11::Value3), + 0 => Some(HW11_A::VALUE1), + 1 => Some(HW11_A::VALUE2), + 2 => Some(HW11_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw11::Value1 + *self == HW11_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw11::Value2 + *self == HW11_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw11::Value3 + *self == HW11_A::VALUE3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; -impl<'a, REG> Hw11W<'a, REG> +pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; +impl<'a, REG> HW11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,72 +865,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw11::Value1) + self.variant(HW11_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw11::Value2) + self.variant(HW11_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw11::Value3) + self.variant(HW11_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw12 { +pub enum HW12_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw12) -> Self { + fn from(variant: HW12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw12 { +impl crate::FieldSpec for HW12_A { type Ux = u8; } -impl crate::IsEnum for Hw12 {} +impl crate::IsEnum for HW12_A {} #[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type Hw12R = crate::FieldReader; -impl Hw12R { +pub type HW12_R = crate::FieldReader; +impl HW12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw12::Value1), - 1 => Some(Hw12::Value2), - 2 => Some(Hw12::Value3), + 0 => Some(HW12_A::VALUE1), + 1 => Some(HW12_A::VALUE2), + 2 => Some(HW12_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw12::Value1 + *self == HW12_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw12::Value2 + *self == HW12_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw12::Value3 + *self == HW12_A::VALUE3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; -impl<'a, REG> Hw12W<'a, REG> +pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; +impl<'a, REG> HW12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -938,72 +938,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw12::Value1) + self.variant(HW12_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw12::Value2) + self.variant(HW12_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw12::Value3) + self.variant(HW12_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw13 { +pub enum HW13_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw13) -> Self { + fn from(variant: HW13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw13 { +impl crate::FieldSpec for HW13_A { type Ux = u8; } -impl crate::IsEnum for Hw13 {} +impl crate::IsEnum for HW13_A {} #[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type Hw13R = crate::FieldReader; -impl Hw13R { +pub type HW13_R = crate::FieldReader; +impl HW13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw13::Value1), - 1 => Some(Hw13::Value2), - 2 => Some(Hw13::Value3), + 0 => Some(HW13_A::VALUE1), + 1 => Some(HW13_A::VALUE2), + 2 => Some(HW13_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw13::Value1 + *self == HW13_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw13::Value2 + *self == HW13_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw13::Value3 + *self == HW13_A::VALUE3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; -impl<'a, REG> Hw13W<'a, REG> +pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; +impl<'a, REG> HW13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1011,72 +1011,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw13::Value1) + self.variant(HW13_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw13::Value2) + self.variant(HW13_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw13::Value3) + self.variant(HW13_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw14 { +pub enum HW14_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw14) -> Self { + fn from(variant: HW14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw14 { +impl crate::FieldSpec for HW14_A { type Ux = u8; } -impl crate::IsEnum for Hw14 {} +impl crate::IsEnum for HW14_A {} #[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type Hw14R = crate::FieldReader; -impl Hw14R { +pub type HW14_R = crate::FieldReader; +impl HW14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw14::Value1), - 1 => Some(Hw14::Value2), - 2 => Some(Hw14::Value3), + 0 => Some(HW14_A::VALUE1), + 1 => Some(HW14_A::VALUE2), + 2 => Some(HW14_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw14::Value1 + *self == HW14_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw14::Value2 + *self == HW14_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw14::Value3 + *self == HW14_A::VALUE3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; -impl<'a, REG> Hw14W<'a, REG> +pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; +impl<'a, REG> HW14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1084,72 +1084,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw14::Value1) + self.variant(HW14_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw14::Value2) + self.variant(HW14_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw14::Value3) + self.variant(HW14_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw15 { +pub enum HW15_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw15) -> Self { + fn from(variant: HW15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw15 { +impl crate::FieldSpec for HW15_A { type Ux = u8; } -impl crate::IsEnum for Hw15 {} +impl crate::IsEnum for HW15_A {} #[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type Hw15R = crate::FieldReader; -impl Hw15R { +pub type HW15_R = crate::FieldReader; +impl HW15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw15::Value1), - 1 => Some(Hw15::Value2), - 2 => Some(Hw15::Value3), + 0 => Some(HW15_A::VALUE1), + 1 => Some(HW15_A::VALUE2), + 2 => Some(HW15_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw15::Value1 + *self == HW15_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw15::Value2 + *self == HW15_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw15::Value3 + *self == HW15_A::VALUE3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; -impl<'a, REG> Hw15W<'a, REG> +pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; +impl<'a, REG> HW15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1157,213 +1157,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw15::Value1) + self.variant(HW15_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw15::Value2) + self.variant(HW15_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw15::Value3) + self.variant(HW15_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> Hw0R { - Hw0R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> HW0_R { + HW0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> Hw1R { - Hw1R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> HW1_R { + HW1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> Hw2R { - Hw2R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> HW2_R { + HW2_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> Hw3R { - Hw3R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> HW3_R { + HW3_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> Hw4R { - Hw4R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> HW4_R { + HW4_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> Hw5R { - Hw5R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> HW5_R { + HW5_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> Hw6R { - Hw6R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> HW6_R { + HW6_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> Hw7R { - Hw7R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> HW7_R { + HW7_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> Hw8R { - Hw8R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> HW8_R { + HW8_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> Hw9R { - Hw9R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> HW9_R { + HW9_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> Hw10R { - Hw10R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> HW10_R { + HW10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> Hw11R { - Hw11R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> HW11_R { + HW11_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> Hw12R { - Hw12R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> HW12_R { + HW12_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> Hw13R { - Hw13R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> HW13_R { + HW13_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> Hw14R { - Hw14R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> HW14_R { + HW14_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> Hw15R { - Hw15R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> HW15_R { + HW15_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> Hw0W { - Hw0W::new(self, 0) + pub fn hw0(&mut self) -> HW0_W { + HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> Hw1W { - Hw1W::new(self, 2) + pub fn hw1(&mut self) -> HW1_W { + HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> Hw2W { - Hw2W::new(self, 4) + pub fn hw2(&mut self) -> HW2_W { + HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> Hw3W { - Hw3W::new(self, 6) + pub fn hw3(&mut self) -> HW3_W { + HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> Hw4W { - Hw4W::new(self, 8) + pub fn hw4(&mut self) -> HW4_W { + HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> Hw5W { - Hw5W::new(self, 10) + pub fn hw5(&mut self) -> HW5_W { + HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> Hw6W { - Hw6W::new(self, 12) + pub fn hw6(&mut self) -> HW6_W { + HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> Hw7W { - Hw7W::new(self, 14) + pub fn hw7(&mut self) -> HW7_W { + HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> Hw8W { - Hw8W::new(self, 16) + pub fn hw8(&mut self) -> HW8_W { + HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> Hw9W { - Hw9W::new(self, 18) + pub fn hw9(&mut self) -> HW9_W { + HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> Hw10W { - Hw10W::new(self, 20) + pub fn hw10(&mut self) -> HW10_W { + HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> Hw11W { - Hw11W::new(self, 22) + pub fn hw11(&mut self) -> HW11_W { + HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> Hw12W { - Hw12W::new(self, 24) + pub fn hw12(&mut self) -> HW12_W { + HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> Hw13W { - Hw13W::new(self, 26) + pub fn hw13(&mut self) -> HW13_W { + HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> Hw14W { - Hw14W::new(self, 28) + pub fn hw14(&mut self) -> HW14_W { + HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> Hw15W { - Hw15W::new(self, 30) + pub fn hw15(&mut self) -> HW15_W { + HW15_W::new(self, 30) } } #[doc = "Port 2 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HwselSpec; -impl crate::RegisterSpec for HwselSpec { +pub struct HWSEL_SPEC; +impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HwselSpec {} +impl crate::Readable for HWSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HwselSpec { +impl crate::Writable for HWSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0x04"] -impl crate::Resettable for HwselSpec { +impl crate::Resettable for HWSEL_SPEC { const RESET_VALUE: u32 = 0x04; } diff --git a/src/port2/in_.rs b/src/port2/in_.rs index 59550897..6b449942 100644 --- a/src/port2/in_.rs +++ b/src/port2/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 2 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for InSpec {} +impl crate::Readable for IN_SPEC {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr0.rs b/src/port2/iocr0.rs index 7b6ef539..1d2f1f27 100644 --- a/src/port2/iocr0.rs +++ b/src/port2/iocr0.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc0 { +pub enum PC0_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc0) -> Self { + fn from(variant: PC0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc0 { +impl crate::FieldSpec for PC0_A { type Ux = u8; } -impl crate::IsEnum for Pc0 {} +impl crate::IsEnum for PC0_A {} #[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc0R = crate::FieldReader; -impl Pc0R { +pub type PC0_R = crate::FieldReader; +impl PC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc0::Value1), - 1 => Some(Pc0::Value2), - 2 => Some(Pc0::Value3), - 3 => Some(Pc0::Value4), - 4 => Some(Pc0::Value5), - 5 => Some(Pc0::Value6), - 6 => Some(Pc0::Value7), - 7 => Some(Pc0::Value8), - 16 => Some(Pc0::Value9), - 17 => Some(Pc0::Value10), - 18 => Some(Pc0::Value11), - 19 => Some(Pc0::Value12), - 20 => Some(Pc0::Value13), - 24 => Some(Pc0::Value14), - 25 => Some(Pc0::Value15), - 26 => Some(Pc0::Value16), - 27 => Some(Pc0::Value17), - 28 => Some(Pc0::Value18), + 0 => Some(PC0_A::VALUE1), + 1 => Some(PC0_A::VALUE2), + 2 => Some(PC0_A::VALUE3), + 3 => Some(PC0_A::VALUE4), + 4 => Some(PC0_A::VALUE5), + 5 => Some(PC0_A::VALUE6), + 6 => Some(PC0_A::VALUE7), + 7 => Some(PC0_A::VALUE8), + 16 => Some(PC0_A::VALUE9), + 17 => Some(PC0_A::VALUE10), + 18 => Some(PC0_A::VALUE11), + 19 => Some(PC0_A::VALUE12), + 20 => Some(PC0_A::VALUE13), + 24 => Some(PC0_A::VALUE14), + 25 => Some(PC0_A::VALUE15), + 26 => Some(PC0_A::VALUE16), + 27 => Some(PC0_A::VALUE17), + 28 => Some(PC0_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc0::Value1 + *self == PC0_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc0::Value2 + *self == PC0_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc0::Value3 + *self == PC0_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc0::Value4 + *self == PC0_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc0::Value5 + *self == PC0_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc0::Value6 + *self == PC0_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc0::Value7 + *self == PC0_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc0::Value8 + *self == PC0_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc0::Value9 + *self == PC0_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc0::Value10 + *self == PC0_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc0::Value11 + *self == PC0_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc0::Value12 + *self == PC0_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc0::Value13 + *self == PC0_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc0::Value14 + *self == PC0_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc0::Value15 + *self == PC0_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc0::Value16 + *self == PC0_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc0::Value17 + *self == PC0_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc0::Value18 + *self == PC0_A::VALUE18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; -impl<'a, REG> Pc0W<'a, REG> +pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; +impl<'a, REG> PC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc0::Value1) + self.variant(PC0_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc0::Value2) + self.variant(PC0_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc0::Value3) + self.variant(PC0_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc0::Value4) + self.variant(PC0_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc0::Value5) + self.variant(PC0_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc0::Value6) + self.variant(PC0_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc0::Value7) + self.variant(PC0_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc0::Value8) + self.variant(PC0_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc0::Value9) + self.variant(PC0_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc0::Value10) + self.variant(PC0_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc0::Value11) + self.variant(PC0_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc0::Value12) + self.variant(PC0_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc0::Value13) + self.variant(PC0_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc0::Value14) + self.variant(PC0_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc0::Value15) + self.variant(PC0_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc0::Value16) + self.variant(PC0_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc0::Value17) + self.variant(PC0_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc0::Value18) + self.variant(PC0_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc1 { +pub enum PC1_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc1) -> Self { + fn from(variant: PC1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc1 { +impl crate::FieldSpec for PC1_A { type Ux = u8; } -impl crate::IsEnum for Pc1 {} +impl crate::IsEnum for PC1_A {} #[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc1R = crate::FieldReader; -impl Pc1R { +pub type PC1_R = crate::FieldReader; +impl PC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc1::Value1), - 1 => Some(Pc1::Value2), - 2 => Some(Pc1::Value3), - 3 => Some(Pc1::Value4), - 4 => Some(Pc1::Value5), - 5 => Some(Pc1::Value6), - 6 => Some(Pc1::Value7), - 7 => Some(Pc1::Value8), - 16 => Some(Pc1::Value9), - 17 => Some(Pc1::Value10), - 18 => Some(Pc1::Value11), - 19 => Some(Pc1::Value12), - 20 => Some(Pc1::Value13), - 24 => Some(Pc1::Value14), - 25 => Some(Pc1::Value15), - 26 => Some(Pc1::Value16), - 27 => Some(Pc1::Value17), - 28 => Some(Pc1::Value18), + 0 => Some(PC1_A::VALUE1), + 1 => Some(PC1_A::VALUE2), + 2 => Some(PC1_A::VALUE3), + 3 => Some(PC1_A::VALUE4), + 4 => Some(PC1_A::VALUE5), + 5 => Some(PC1_A::VALUE6), + 6 => Some(PC1_A::VALUE7), + 7 => Some(PC1_A::VALUE8), + 16 => Some(PC1_A::VALUE9), + 17 => Some(PC1_A::VALUE10), + 18 => Some(PC1_A::VALUE11), + 19 => Some(PC1_A::VALUE12), + 20 => Some(PC1_A::VALUE13), + 24 => Some(PC1_A::VALUE14), + 25 => Some(PC1_A::VALUE15), + 26 => Some(PC1_A::VALUE16), + 27 => Some(PC1_A::VALUE17), + 28 => Some(PC1_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc1::Value1 + *self == PC1_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc1::Value2 + *self == PC1_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc1::Value3 + *self == PC1_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc1::Value4 + *self == PC1_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc1::Value5 + *self == PC1_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc1::Value6 + *self == PC1_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc1::Value7 + *self == PC1_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc1::Value8 + *self == PC1_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc1::Value9 + *self == PC1_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc1::Value10 + *self == PC1_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc1::Value11 + *self == PC1_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc1::Value12 + *self == PC1_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc1::Value13 + *self == PC1_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc1::Value14 + *self == PC1_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc1::Value15 + *self == PC1_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc1::Value16 + *self == PC1_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc1::Value17 + *self == PC1_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc1::Value18 + *self == PC1_A::VALUE18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; -impl<'a, REG> Pc1W<'a, REG> +pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; +impl<'a, REG> PC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc1::Value1) + self.variant(PC1_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc1::Value2) + self.variant(PC1_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc1::Value3) + self.variant(PC1_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc1::Value4) + self.variant(PC1_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc1::Value5) + self.variant(PC1_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc1::Value6) + self.variant(PC1_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc1::Value7) + self.variant(PC1_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc1::Value8) + self.variant(PC1_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc1::Value9) + self.variant(PC1_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc1::Value10) + self.variant(PC1_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc1::Value11) + self.variant(PC1_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc1::Value12) + self.variant(PC1_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc1::Value13) + self.variant(PC1_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc1::Value14) + self.variant(PC1_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc1::Value15) + self.variant(PC1_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc1::Value16) + self.variant(PC1_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc1::Value17) + self.variant(PC1_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc1::Value18) + self.variant(PC1_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc2 { +pub enum PC2_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc2) -> Self { + fn from(variant: PC2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc2 { +impl crate::FieldSpec for PC2_A { type Ux = u8; } -impl crate::IsEnum for Pc2 {} +impl crate::IsEnum for PC2_A {} #[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc2R = crate::FieldReader; -impl Pc2R { +pub type PC2_R = crate::FieldReader; +impl PC2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc2::Value1), - 1 => Some(Pc2::Value2), - 2 => Some(Pc2::Value3), - 3 => Some(Pc2::Value4), - 4 => Some(Pc2::Value5), - 5 => Some(Pc2::Value6), - 6 => Some(Pc2::Value7), - 7 => Some(Pc2::Value8), - 16 => Some(Pc2::Value9), - 17 => Some(Pc2::Value10), - 18 => Some(Pc2::Value11), - 19 => Some(Pc2::Value12), - 20 => Some(Pc2::Value13), - 24 => Some(Pc2::Value14), - 25 => Some(Pc2::Value15), - 26 => Some(Pc2::Value16), - 27 => Some(Pc2::Value17), - 28 => Some(Pc2::Value18), + 0 => Some(PC2_A::VALUE1), + 1 => Some(PC2_A::VALUE2), + 2 => Some(PC2_A::VALUE3), + 3 => Some(PC2_A::VALUE4), + 4 => Some(PC2_A::VALUE5), + 5 => Some(PC2_A::VALUE6), + 6 => Some(PC2_A::VALUE7), + 7 => Some(PC2_A::VALUE8), + 16 => Some(PC2_A::VALUE9), + 17 => Some(PC2_A::VALUE10), + 18 => Some(PC2_A::VALUE11), + 19 => Some(PC2_A::VALUE12), + 20 => Some(PC2_A::VALUE13), + 24 => Some(PC2_A::VALUE14), + 25 => Some(PC2_A::VALUE15), + 26 => Some(PC2_A::VALUE16), + 27 => Some(PC2_A::VALUE17), + 28 => Some(PC2_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc2::Value1 + *self == PC2_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc2::Value2 + *self == PC2_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc2::Value3 + *self == PC2_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc2::Value4 + *self == PC2_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc2::Value5 + *self == PC2_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc2::Value6 + *self == PC2_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc2::Value7 + *self == PC2_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc2::Value8 + *self == PC2_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc2::Value9 + *self == PC2_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc2::Value10 + *self == PC2_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc2::Value11 + *self == PC2_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc2::Value12 + *self == PC2_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc2::Value13 + *self == PC2_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc2::Value14 + *self == PC2_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc2::Value15 + *self == PC2_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc2::Value16 + *self == PC2_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc2::Value17 + *self == PC2_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc2::Value18 + *self == PC2_A::VALUE18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; -impl<'a, REG> Pc2W<'a, REG> +pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; +impl<'a, REG> PC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc2::Value1) + self.variant(PC2_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc2::Value2) + self.variant(PC2_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc2::Value3) + self.variant(PC2_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc2::Value4) + self.variant(PC2_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc2::Value5) + self.variant(PC2_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc2::Value6) + self.variant(PC2_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc2::Value7) + self.variant(PC2_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc2::Value8) + self.variant(PC2_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc2::Value9) + self.variant(PC2_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc2::Value10) + self.variant(PC2_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc2::Value11) + self.variant(PC2_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc2::Value12) + self.variant(PC2_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc2::Value13) + self.variant(PC2_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc2::Value14) + self.variant(PC2_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc2::Value15) + self.variant(PC2_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc2::Value16) + self.variant(PC2_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc2::Value17) + self.variant(PC2_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc2::Value18) + self.variant(PC2_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc3 { +pub enum PC3_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc3) -> Self { + fn from(variant: PC3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc3 { +impl crate::FieldSpec for PC3_A { type Ux = u8; } -impl crate::IsEnum for Pc3 {} +impl crate::IsEnum for PC3_A {} #[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc3R = crate::FieldReader; -impl Pc3R { +pub type PC3_R = crate::FieldReader; +impl PC3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc3::Value1), - 1 => Some(Pc3::Value2), - 2 => Some(Pc3::Value3), - 3 => Some(Pc3::Value4), - 4 => Some(Pc3::Value5), - 5 => Some(Pc3::Value6), - 6 => Some(Pc3::Value7), - 7 => Some(Pc3::Value8), - 16 => Some(Pc3::Value9), - 17 => Some(Pc3::Value10), - 18 => Some(Pc3::Value11), - 19 => Some(Pc3::Value12), - 20 => Some(Pc3::Value13), - 24 => Some(Pc3::Value14), - 25 => Some(Pc3::Value15), - 26 => Some(Pc3::Value16), - 27 => Some(Pc3::Value17), - 28 => Some(Pc3::Value18), + 0 => Some(PC3_A::VALUE1), + 1 => Some(PC3_A::VALUE2), + 2 => Some(PC3_A::VALUE3), + 3 => Some(PC3_A::VALUE4), + 4 => Some(PC3_A::VALUE5), + 5 => Some(PC3_A::VALUE6), + 6 => Some(PC3_A::VALUE7), + 7 => Some(PC3_A::VALUE8), + 16 => Some(PC3_A::VALUE9), + 17 => Some(PC3_A::VALUE10), + 18 => Some(PC3_A::VALUE11), + 19 => Some(PC3_A::VALUE12), + 20 => Some(PC3_A::VALUE13), + 24 => Some(PC3_A::VALUE14), + 25 => Some(PC3_A::VALUE15), + 26 => Some(PC3_A::VALUE16), + 27 => Some(PC3_A::VALUE17), + 28 => Some(PC3_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc3::Value1 + *self == PC3_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc3::Value2 + *self == PC3_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc3::Value3 + *self == PC3_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc3::Value4 + *self == PC3_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc3::Value5 + *self == PC3_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc3::Value6 + *self == PC3_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc3::Value7 + *self == PC3_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc3::Value8 + *self == PC3_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc3::Value9 + *self == PC3_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc3::Value10 + *self == PC3_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc3::Value11 + *self == PC3_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc3::Value12 + *self == PC3_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc3::Value13 + *self == PC3_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc3::Value14 + *self == PC3_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc3::Value15 + *self == PC3_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc3::Value16 + *self == PC3_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc3::Value17 + *self == PC3_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc3::Value18 + *self == PC3_A::VALUE18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; -impl<'a, REG> Pc3W<'a, REG> +pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; +impl<'a, REG> PC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc3::Value1) + self.variant(PC3_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc3::Value2) + self.variant(PC3_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc3::Value3) + self.variant(PC3_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc3::Value4) + self.variant(PC3_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc3::Value5) + self.variant(PC3_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc3::Value6) + self.variant(PC3_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc3::Value7) + self.variant(PC3_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc3::Value8) + self.variant(PC3_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc3::Value9) + self.variant(PC3_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc3::Value10) + self.variant(PC3_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc3::Value11) + self.variant(PC3_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc3::Value12) + self.variant(PC3_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc3::Value13) + self.variant(PC3_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc3::Value14) + self.variant(PC3_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc3::Value15) + self.variant(PC3_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc3::Value16) + self.variant(PC3_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc3::Value17) + self.variant(PC3_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc3::Value18) + self.variant(PC3_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> Pc0R { - Pc0R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> PC0_R { + PC0_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> Pc1R { - Pc1R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> PC1_R { + PC1_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> Pc2R { - Pc2R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> PC2_R { + PC2_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> Pc3R { - Pc3R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> PC3_R { + PC3_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> Pc0W { - Pc0W::new(self, 3) + pub fn pc0(&mut self) -> PC0_W { + PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> Pc1W { - Pc1W::new(self, 11) + pub fn pc1(&mut self) -> PC1_W { + PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> Pc2W { - Pc2W::new(self, 19) + pub fn pc2(&mut self) -> PC2_W { + PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> Pc3W { - Pc3W::new(self, 27) + pub fn pc3(&mut self) -> PC3_W { + PC3_W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr0Spec; -impl crate::RegisterSpec for Iocr0Spec { +pub struct IOCR0_SPEC; +impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for Iocr0Spec {} +impl crate::Readable for IOCR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for Iocr0Spec { +impl crate::Writable for IOCR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for Iocr0Spec { +impl crate::Resettable for IOCR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr12.rs b/src/port2/iocr12.rs index 9c41fbd0..ae74f572 100644 --- a/src/port2/iocr12.rs +++ b/src/port2/iocr12.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR12` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc12 { +pub enum PC12_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc12) -> Self { + fn from(variant: PC12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc12 { +impl crate::FieldSpec for PC12_A { type Ux = u8; } -impl crate::IsEnum for Pc12 {} +impl crate::IsEnum for PC12_A {} #[doc = "Field `PC12` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc12R = crate::FieldReader; -impl Pc12R { +pub type PC12_R = crate::FieldReader; +impl PC12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc12::Value1), - 1 => Some(Pc12::Value2), - 2 => Some(Pc12::Value3), - 3 => Some(Pc12::Value4), - 4 => Some(Pc12::Value5), - 5 => Some(Pc12::Value6), - 6 => Some(Pc12::Value7), - 7 => Some(Pc12::Value8), - 16 => Some(Pc12::Value9), - 17 => Some(Pc12::Value10), - 18 => Some(Pc12::Value11), - 19 => Some(Pc12::Value12), - 20 => Some(Pc12::Value13), - 24 => Some(Pc12::Value14), - 25 => Some(Pc12::Value15), - 26 => Some(Pc12::Value16), - 27 => Some(Pc12::Value17), - 28 => Some(Pc12::Value18), + 0 => Some(PC12_A::VALUE1), + 1 => Some(PC12_A::VALUE2), + 2 => Some(PC12_A::VALUE3), + 3 => Some(PC12_A::VALUE4), + 4 => Some(PC12_A::VALUE5), + 5 => Some(PC12_A::VALUE6), + 6 => Some(PC12_A::VALUE7), + 7 => Some(PC12_A::VALUE8), + 16 => Some(PC12_A::VALUE9), + 17 => Some(PC12_A::VALUE10), + 18 => Some(PC12_A::VALUE11), + 19 => Some(PC12_A::VALUE12), + 20 => Some(PC12_A::VALUE13), + 24 => Some(PC12_A::VALUE14), + 25 => Some(PC12_A::VALUE15), + 26 => Some(PC12_A::VALUE16), + 27 => Some(PC12_A::VALUE17), + 28 => Some(PC12_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc12::Value1 + *self == PC12_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc12::Value2 + *self == PC12_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc12::Value3 + *self == PC12_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc12::Value4 + *self == PC12_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc12::Value5 + *self == PC12_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc12::Value6 + *self == PC12_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc12::Value7 + *self == PC12_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc12::Value8 + *self == PC12_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc12::Value9 + *self == PC12_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc12::Value10 + *self == PC12_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc12::Value11 + *self == PC12_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc12::Value12 + *self == PC12_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc12::Value13 + *self == PC12_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc12::Value14 + *self == PC12_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc12::Value15 + *self == PC12_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc12::Value16 + *self == PC12_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc12::Value17 + *self == PC12_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc12::Value18 + *self == PC12_A::VALUE18 } } #[doc = "Field `PC12` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc12W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc12>; -impl<'a, REG> Pc12W<'a, REG> +pub type PC12_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC12_A>; +impl<'a, REG> PC12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc12::Value1) + self.variant(PC12_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc12::Value2) + self.variant(PC12_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc12::Value3) + self.variant(PC12_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc12::Value4) + self.variant(PC12_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc12::Value5) + self.variant(PC12_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc12::Value6) + self.variant(PC12_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc12::Value7) + self.variant(PC12_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc12::Value8) + self.variant(PC12_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc12::Value9) + self.variant(PC12_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc12::Value10) + self.variant(PC12_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc12::Value11) + self.variant(PC12_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc12::Value12) + self.variant(PC12_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc12::Value13) + self.variant(PC12_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc12::Value14) + self.variant(PC12_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc12::Value15) + self.variant(PC12_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc12::Value16) + self.variant(PC12_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc12::Value17) + self.variant(PC12_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc12::Value18) + self.variant(PC12_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc13 { +pub enum PC13_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc13) -> Self { + fn from(variant: PC13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc13 { +impl crate::FieldSpec for PC13_A { type Ux = u8; } -impl crate::IsEnum for Pc13 {} +impl crate::IsEnum for PC13_A {} #[doc = "Field `PC13` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc13R = crate::FieldReader; -impl Pc13R { +pub type PC13_R = crate::FieldReader; +impl PC13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc13::Value1), - 1 => Some(Pc13::Value2), - 2 => Some(Pc13::Value3), - 3 => Some(Pc13::Value4), - 4 => Some(Pc13::Value5), - 5 => Some(Pc13::Value6), - 6 => Some(Pc13::Value7), - 7 => Some(Pc13::Value8), - 16 => Some(Pc13::Value9), - 17 => Some(Pc13::Value10), - 18 => Some(Pc13::Value11), - 19 => Some(Pc13::Value12), - 20 => Some(Pc13::Value13), - 24 => Some(Pc13::Value14), - 25 => Some(Pc13::Value15), - 26 => Some(Pc13::Value16), - 27 => Some(Pc13::Value17), - 28 => Some(Pc13::Value18), + 0 => Some(PC13_A::VALUE1), + 1 => Some(PC13_A::VALUE2), + 2 => Some(PC13_A::VALUE3), + 3 => Some(PC13_A::VALUE4), + 4 => Some(PC13_A::VALUE5), + 5 => Some(PC13_A::VALUE6), + 6 => Some(PC13_A::VALUE7), + 7 => Some(PC13_A::VALUE8), + 16 => Some(PC13_A::VALUE9), + 17 => Some(PC13_A::VALUE10), + 18 => Some(PC13_A::VALUE11), + 19 => Some(PC13_A::VALUE12), + 20 => Some(PC13_A::VALUE13), + 24 => Some(PC13_A::VALUE14), + 25 => Some(PC13_A::VALUE15), + 26 => Some(PC13_A::VALUE16), + 27 => Some(PC13_A::VALUE17), + 28 => Some(PC13_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc13::Value1 + *self == PC13_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc13::Value2 + *self == PC13_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc13::Value3 + *self == PC13_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc13::Value4 + *self == PC13_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc13::Value5 + *self == PC13_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc13::Value6 + *self == PC13_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc13::Value7 + *self == PC13_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc13::Value8 + *self == PC13_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc13::Value9 + *self == PC13_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc13::Value10 + *self == PC13_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc13::Value11 + *self == PC13_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc13::Value12 + *self == PC13_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc13::Value13 + *self == PC13_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc13::Value14 + *self == PC13_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc13::Value15 + *self == PC13_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc13::Value16 + *self == PC13_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc13::Value17 + *self == PC13_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc13::Value18 + *self == PC13_A::VALUE18 } } #[doc = "Field `PC13` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc13W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc13>; -impl<'a, REG> Pc13W<'a, REG> +pub type PC13_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC13_A>; +impl<'a, REG> PC13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc13::Value1) + self.variant(PC13_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc13::Value2) + self.variant(PC13_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc13::Value3) + self.variant(PC13_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc13::Value4) + self.variant(PC13_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc13::Value5) + self.variant(PC13_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc13::Value6) + self.variant(PC13_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc13::Value7) + self.variant(PC13_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc13::Value8) + self.variant(PC13_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc13::Value9) + self.variant(PC13_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc13::Value10) + self.variant(PC13_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc13::Value11) + self.variant(PC13_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc13::Value12) + self.variant(PC13_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc13::Value13) + self.variant(PC13_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc13::Value14) + self.variant(PC13_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc13::Value15) + self.variant(PC13_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc13::Value16) + self.variant(PC13_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc13::Value17) + self.variant(PC13_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc13::Value18) + self.variant(PC13_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc14 { +pub enum PC14_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc14) -> Self { + fn from(variant: PC14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc14 { +impl crate::FieldSpec for PC14_A { type Ux = u8; } -impl crate::IsEnum for Pc14 {} +impl crate::IsEnum for PC14_A {} #[doc = "Field `PC14` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc14R = crate::FieldReader; -impl Pc14R { +pub type PC14_R = crate::FieldReader; +impl PC14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc14::Value1), - 1 => Some(Pc14::Value2), - 2 => Some(Pc14::Value3), - 3 => Some(Pc14::Value4), - 4 => Some(Pc14::Value5), - 5 => Some(Pc14::Value6), - 6 => Some(Pc14::Value7), - 7 => Some(Pc14::Value8), - 16 => Some(Pc14::Value9), - 17 => Some(Pc14::Value10), - 18 => Some(Pc14::Value11), - 19 => Some(Pc14::Value12), - 20 => Some(Pc14::Value13), - 24 => Some(Pc14::Value14), - 25 => Some(Pc14::Value15), - 26 => Some(Pc14::Value16), - 27 => Some(Pc14::Value17), - 28 => Some(Pc14::Value18), + 0 => Some(PC14_A::VALUE1), + 1 => Some(PC14_A::VALUE2), + 2 => Some(PC14_A::VALUE3), + 3 => Some(PC14_A::VALUE4), + 4 => Some(PC14_A::VALUE5), + 5 => Some(PC14_A::VALUE6), + 6 => Some(PC14_A::VALUE7), + 7 => Some(PC14_A::VALUE8), + 16 => Some(PC14_A::VALUE9), + 17 => Some(PC14_A::VALUE10), + 18 => Some(PC14_A::VALUE11), + 19 => Some(PC14_A::VALUE12), + 20 => Some(PC14_A::VALUE13), + 24 => Some(PC14_A::VALUE14), + 25 => Some(PC14_A::VALUE15), + 26 => Some(PC14_A::VALUE16), + 27 => Some(PC14_A::VALUE17), + 28 => Some(PC14_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc14::Value1 + *self == PC14_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc14::Value2 + *self == PC14_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc14::Value3 + *self == PC14_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc14::Value4 + *self == PC14_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc14::Value5 + *self == PC14_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc14::Value6 + *self == PC14_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc14::Value7 + *self == PC14_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc14::Value8 + *self == PC14_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc14::Value9 + *self == PC14_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc14::Value10 + *self == PC14_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc14::Value11 + *self == PC14_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc14::Value12 + *self == PC14_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc14::Value13 + *self == PC14_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc14::Value14 + *self == PC14_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc14::Value15 + *self == PC14_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc14::Value16 + *self == PC14_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc14::Value17 + *self == PC14_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc14::Value18 + *self == PC14_A::VALUE18 } } #[doc = "Field `PC14` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc14W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc14>; -impl<'a, REG> Pc14W<'a, REG> +pub type PC14_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC14_A>; +impl<'a, REG> PC14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc14::Value1) + self.variant(PC14_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc14::Value2) + self.variant(PC14_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc14::Value3) + self.variant(PC14_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc14::Value4) + self.variant(PC14_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc14::Value5) + self.variant(PC14_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc14::Value6) + self.variant(PC14_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc14::Value7) + self.variant(PC14_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc14::Value8) + self.variant(PC14_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc14::Value9) + self.variant(PC14_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc14::Value10) + self.variant(PC14_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc14::Value11) + self.variant(PC14_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc14::Value12) + self.variant(PC14_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc14::Value13) + self.variant(PC14_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc14::Value14) + self.variant(PC14_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc14::Value15) + self.variant(PC14_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc14::Value16) + self.variant(PC14_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc14::Value17) + self.variant(PC14_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc14::Value18) + self.variant(PC14_A::VALUE18) } } #[doc = "Port Control for Port n Pin 12 to 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc15 { +pub enum PC15_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc15) -> Self { + fn from(variant: PC15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc15 { +impl crate::FieldSpec for PC15_A { type Ux = u8; } -impl crate::IsEnum for Pc15 {} +impl crate::IsEnum for PC15_A {} #[doc = "Field `PC15` reader - Port Control for Port n Pin 12 to 15"] -pub type Pc15R = crate::FieldReader; -impl Pc15R { +pub type PC15_R = crate::FieldReader; +impl PC15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc15::Value1), - 1 => Some(Pc15::Value2), - 2 => Some(Pc15::Value3), - 3 => Some(Pc15::Value4), - 4 => Some(Pc15::Value5), - 5 => Some(Pc15::Value6), - 6 => Some(Pc15::Value7), - 7 => Some(Pc15::Value8), - 16 => Some(Pc15::Value9), - 17 => Some(Pc15::Value10), - 18 => Some(Pc15::Value11), - 19 => Some(Pc15::Value12), - 20 => Some(Pc15::Value13), - 24 => Some(Pc15::Value14), - 25 => Some(Pc15::Value15), - 26 => Some(Pc15::Value16), - 27 => Some(Pc15::Value17), - 28 => Some(Pc15::Value18), + 0 => Some(PC15_A::VALUE1), + 1 => Some(PC15_A::VALUE2), + 2 => Some(PC15_A::VALUE3), + 3 => Some(PC15_A::VALUE4), + 4 => Some(PC15_A::VALUE5), + 5 => Some(PC15_A::VALUE6), + 6 => Some(PC15_A::VALUE7), + 7 => Some(PC15_A::VALUE8), + 16 => Some(PC15_A::VALUE9), + 17 => Some(PC15_A::VALUE10), + 18 => Some(PC15_A::VALUE11), + 19 => Some(PC15_A::VALUE12), + 20 => Some(PC15_A::VALUE13), + 24 => Some(PC15_A::VALUE14), + 25 => Some(PC15_A::VALUE15), + 26 => Some(PC15_A::VALUE16), + 27 => Some(PC15_A::VALUE17), + 28 => Some(PC15_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc15::Value1 + *self == PC15_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc15::Value2 + *self == PC15_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc15::Value3 + *self == PC15_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc15::Value4 + *self == PC15_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc15::Value5 + *self == PC15_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc15::Value6 + *self == PC15_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc15::Value7 + *self == PC15_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc15::Value8 + *self == PC15_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc15::Value9 + *self == PC15_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc15::Value10 + *self == PC15_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc15::Value11 + *self == PC15_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc15::Value12 + *self == PC15_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc15::Value13 + *self == PC15_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc15::Value14 + *self == PC15_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc15::Value15 + *self == PC15_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc15::Value16 + *self == PC15_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc15::Value17 + *self == PC15_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc15::Value18 + *self == PC15_A::VALUE18 } } #[doc = "Field `PC15` writer - Port Control for Port n Pin 12 to 15"] -pub type Pc15W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc15>; -impl<'a, REG> Pc15W<'a, REG> +pub type PC15_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC15_A>; +impl<'a, REG> PC15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc15::Value1) + self.variant(PC15_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc15::Value2) + self.variant(PC15_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc15::Value3) + self.variant(PC15_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc15::Value4) + self.variant(PC15_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc15::Value5) + self.variant(PC15_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc15::Value6) + self.variant(PC15_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc15::Value7) + self.variant(PC15_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc15::Value8) + self.variant(PC15_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc15::Value9) + self.variant(PC15_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc15::Value10) + self.variant(PC15_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc15::Value11) + self.variant(PC15_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc15::Value12) + self.variant(PC15_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc15::Value13) + self.variant(PC15_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc15::Value14) + self.variant(PC15_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc15::Value15) + self.variant(PC15_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc15::Value16) + self.variant(PC15_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc15::Value17) + self.variant(PC15_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc15::Value18) + self.variant(PC15_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc12(&self) -> Pc12R { - Pc12R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc12(&self) -> PC12_R { + PC12_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc13(&self) -> Pc13R { - Pc13R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc13(&self) -> PC13_R { + PC13_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc14(&self) -> Pc14R { - Pc14R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc14(&self) -> PC14_R { + PC14_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - pub fn pc15(&self) -> Pc15R { - Pc15R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc15(&self) -> PC15_R { + PC15_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc12(&mut self) -> Pc12W { - Pc12W::new(self, 3) + pub fn pc12(&mut self) -> PC12_W { + PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc13(&mut self) -> Pc13W { - Pc13W::new(self, 11) + pub fn pc13(&mut self) -> PC13_W { + PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc14(&mut self) -> Pc14W { - Pc14W::new(self, 19) + pub fn pc14(&mut self) -> PC14_W { + PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] #[must_use] - pub fn pc15(&mut self) -> Pc15W { - Pc15W::new(self, 27) + pub fn pc15(&mut self) -> PC15_W { + PC15_W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr12Spec; -impl crate::RegisterSpec for Iocr12Spec { +pub struct IOCR12_SPEC; +impl crate::RegisterSpec for IOCR12_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr12::R`](R) reader structure"] -impl crate::Readable for Iocr12Spec {} +impl crate::Readable for IOCR12_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr12::W`](W) writer structure"] -impl crate::Writable for Iocr12Spec { +impl crate::Writable for IOCR12_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR12 to value 0"] -impl crate::Resettable for Iocr12Spec { +impl crate::Resettable for IOCR12_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr4.rs b/src/port2/iocr4.rs index f44865ce..f2b24aa0 100644 --- a/src/port2/iocr4.rs +++ b/src/port2/iocr4.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc4 { +pub enum PC4_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc4) -> Self { + fn from(variant: PC4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc4 { +impl crate::FieldSpec for PC4_A { type Ux = u8; } -impl crate::IsEnum for Pc4 {} +impl crate::IsEnum for PC4_A {} #[doc = "Field `PC4` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc4R = crate::FieldReader; -impl Pc4R { +pub type PC4_R = crate::FieldReader; +impl PC4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc4::Value1), - 1 => Some(Pc4::Value2), - 2 => Some(Pc4::Value3), - 3 => Some(Pc4::Value4), - 4 => Some(Pc4::Value5), - 5 => Some(Pc4::Value6), - 6 => Some(Pc4::Value7), - 7 => Some(Pc4::Value8), - 16 => Some(Pc4::Value9), - 17 => Some(Pc4::Value10), - 18 => Some(Pc4::Value11), - 19 => Some(Pc4::Value12), - 20 => Some(Pc4::Value13), - 24 => Some(Pc4::Value14), - 25 => Some(Pc4::Value15), - 26 => Some(Pc4::Value16), - 27 => Some(Pc4::Value17), - 28 => Some(Pc4::Value18), + 0 => Some(PC4_A::VALUE1), + 1 => Some(PC4_A::VALUE2), + 2 => Some(PC4_A::VALUE3), + 3 => Some(PC4_A::VALUE4), + 4 => Some(PC4_A::VALUE5), + 5 => Some(PC4_A::VALUE6), + 6 => Some(PC4_A::VALUE7), + 7 => Some(PC4_A::VALUE8), + 16 => Some(PC4_A::VALUE9), + 17 => Some(PC4_A::VALUE10), + 18 => Some(PC4_A::VALUE11), + 19 => Some(PC4_A::VALUE12), + 20 => Some(PC4_A::VALUE13), + 24 => Some(PC4_A::VALUE14), + 25 => Some(PC4_A::VALUE15), + 26 => Some(PC4_A::VALUE16), + 27 => Some(PC4_A::VALUE17), + 28 => Some(PC4_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc4::Value1 + *self == PC4_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc4::Value2 + *self == PC4_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc4::Value3 + *self == PC4_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc4::Value4 + *self == PC4_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc4::Value5 + *self == PC4_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc4::Value6 + *self == PC4_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc4::Value7 + *self == PC4_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc4::Value8 + *self == PC4_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc4::Value9 + *self == PC4_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc4::Value10 + *self == PC4_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc4::Value11 + *self == PC4_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc4::Value12 + *self == PC4_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc4::Value13 + *self == PC4_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc4::Value14 + *self == PC4_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc4::Value15 + *self == PC4_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc4::Value16 + *self == PC4_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc4::Value17 + *self == PC4_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc4::Value18 + *self == PC4_A::VALUE18 } } #[doc = "Field `PC4` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc4W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc4>; -impl<'a, REG> Pc4W<'a, REG> +pub type PC4_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC4_A>; +impl<'a, REG> PC4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc4::Value1) + self.variant(PC4_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc4::Value2) + self.variant(PC4_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc4::Value3) + self.variant(PC4_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc4::Value4) + self.variant(PC4_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc4::Value5) + self.variant(PC4_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc4::Value6) + self.variant(PC4_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc4::Value7) + self.variant(PC4_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc4::Value8) + self.variant(PC4_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc4::Value9) + self.variant(PC4_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc4::Value10) + self.variant(PC4_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc4::Value11) + self.variant(PC4_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc4::Value12) + self.variant(PC4_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc4::Value13) + self.variant(PC4_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc4::Value14) + self.variant(PC4_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc4::Value15) + self.variant(PC4_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc4::Value16) + self.variant(PC4_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc4::Value17) + self.variant(PC4_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc4::Value18) + self.variant(PC4_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc5 { +pub enum PC5_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc5) -> Self { + fn from(variant: PC5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc5 { +impl crate::FieldSpec for PC5_A { type Ux = u8; } -impl crate::IsEnum for Pc5 {} +impl crate::IsEnum for PC5_A {} #[doc = "Field `PC5` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc5R = crate::FieldReader; -impl Pc5R { +pub type PC5_R = crate::FieldReader; +impl PC5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc5::Value1), - 1 => Some(Pc5::Value2), - 2 => Some(Pc5::Value3), - 3 => Some(Pc5::Value4), - 4 => Some(Pc5::Value5), - 5 => Some(Pc5::Value6), - 6 => Some(Pc5::Value7), - 7 => Some(Pc5::Value8), - 16 => Some(Pc5::Value9), - 17 => Some(Pc5::Value10), - 18 => Some(Pc5::Value11), - 19 => Some(Pc5::Value12), - 20 => Some(Pc5::Value13), - 24 => Some(Pc5::Value14), - 25 => Some(Pc5::Value15), - 26 => Some(Pc5::Value16), - 27 => Some(Pc5::Value17), - 28 => Some(Pc5::Value18), + 0 => Some(PC5_A::VALUE1), + 1 => Some(PC5_A::VALUE2), + 2 => Some(PC5_A::VALUE3), + 3 => Some(PC5_A::VALUE4), + 4 => Some(PC5_A::VALUE5), + 5 => Some(PC5_A::VALUE6), + 6 => Some(PC5_A::VALUE7), + 7 => Some(PC5_A::VALUE8), + 16 => Some(PC5_A::VALUE9), + 17 => Some(PC5_A::VALUE10), + 18 => Some(PC5_A::VALUE11), + 19 => Some(PC5_A::VALUE12), + 20 => Some(PC5_A::VALUE13), + 24 => Some(PC5_A::VALUE14), + 25 => Some(PC5_A::VALUE15), + 26 => Some(PC5_A::VALUE16), + 27 => Some(PC5_A::VALUE17), + 28 => Some(PC5_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc5::Value1 + *self == PC5_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc5::Value2 + *self == PC5_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc5::Value3 + *self == PC5_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc5::Value4 + *self == PC5_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc5::Value5 + *self == PC5_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc5::Value6 + *self == PC5_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc5::Value7 + *self == PC5_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc5::Value8 + *self == PC5_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc5::Value9 + *self == PC5_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc5::Value10 + *self == PC5_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc5::Value11 + *self == PC5_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc5::Value12 + *self == PC5_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc5::Value13 + *self == PC5_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc5::Value14 + *self == PC5_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc5::Value15 + *self == PC5_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc5::Value16 + *self == PC5_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc5::Value17 + *self == PC5_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc5::Value18 + *self == PC5_A::VALUE18 } } #[doc = "Field `PC5` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc5W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc5>; -impl<'a, REG> Pc5W<'a, REG> +pub type PC5_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC5_A>; +impl<'a, REG> PC5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc5::Value1) + self.variant(PC5_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc5::Value2) + self.variant(PC5_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc5::Value3) + self.variant(PC5_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc5::Value4) + self.variant(PC5_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc5::Value5) + self.variant(PC5_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc5::Value6) + self.variant(PC5_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc5::Value7) + self.variant(PC5_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc5::Value8) + self.variant(PC5_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc5::Value9) + self.variant(PC5_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc5::Value10) + self.variant(PC5_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc5::Value11) + self.variant(PC5_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc5::Value12) + self.variant(PC5_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc5::Value13) + self.variant(PC5_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc5::Value14) + self.variant(PC5_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc5::Value15) + self.variant(PC5_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc5::Value16) + self.variant(PC5_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc5::Value17) + self.variant(PC5_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc5::Value18) + self.variant(PC5_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc6 { +pub enum PC6_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc6) -> Self { + fn from(variant: PC6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc6 { +impl crate::FieldSpec for PC6_A { type Ux = u8; } -impl crate::IsEnum for Pc6 {} +impl crate::IsEnum for PC6_A {} #[doc = "Field `PC6` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc6R = crate::FieldReader; -impl Pc6R { +pub type PC6_R = crate::FieldReader; +impl PC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc6::Value1), - 1 => Some(Pc6::Value2), - 2 => Some(Pc6::Value3), - 3 => Some(Pc6::Value4), - 4 => Some(Pc6::Value5), - 5 => Some(Pc6::Value6), - 6 => Some(Pc6::Value7), - 7 => Some(Pc6::Value8), - 16 => Some(Pc6::Value9), - 17 => Some(Pc6::Value10), - 18 => Some(Pc6::Value11), - 19 => Some(Pc6::Value12), - 20 => Some(Pc6::Value13), - 24 => Some(Pc6::Value14), - 25 => Some(Pc6::Value15), - 26 => Some(Pc6::Value16), - 27 => Some(Pc6::Value17), - 28 => Some(Pc6::Value18), + 0 => Some(PC6_A::VALUE1), + 1 => Some(PC6_A::VALUE2), + 2 => Some(PC6_A::VALUE3), + 3 => Some(PC6_A::VALUE4), + 4 => Some(PC6_A::VALUE5), + 5 => Some(PC6_A::VALUE6), + 6 => Some(PC6_A::VALUE7), + 7 => Some(PC6_A::VALUE8), + 16 => Some(PC6_A::VALUE9), + 17 => Some(PC6_A::VALUE10), + 18 => Some(PC6_A::VALUE11), + 19 => Some(PC6_A::VALUE12), + 20 => Some(PC6_A::VALUE13), + 24 => Some(PC6_A::VALUE14), + 25 => Some(PC6_A::VALUE15), + 26 => Some(PC6_A::VALUE16), + 27 => Some(PC6_A::VALUE17), + 28 => Some(PC6_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc6::Value1 + *self == PC6_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc6::Value2 + *self == PC6_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc6::Value3 + *self == PC6_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc6::Value4 + *self == PC6_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc6::Value5 + *self == PC6_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc6::Value6 + *self == PC6_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc6::Value7 + *self == PC6_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc6::Value8 + *self == PC6_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc6::Value9 + *self == PC6_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc6::Value10 + *self == PC6_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc6::Value11 + *self == PC6_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc6::Value12 + *self == PC6_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc6::Value13 + *self == PC6_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc6::Value14 + *self == PC6_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc6::Value15 + *self == PC6_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc6::Value16 + *self == PC6_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc6::Value17 + *self == PC6_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc6::Value18 + *self == PC6_A::VALUE18 } } #[doc = "Field `PC6` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc6W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc6>; -impl<'a, REG> Pc6W<'a, REG> +pub type PC6_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC6_A>; +impl<'a, REG> PC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc6::Value1) + self.variant(PC6_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc6::Value2) + self.variant(PC6_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc6::Value3) + self.variant(PC6_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc6::Value4) + self.variant(PC6_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc6::Value5) + self.variant(PC6_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc6::Value6) + self.variant(PC6_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc6::Value7) + self.variant(PC6_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc6::Value8) + self.variant(PC6_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc6::Value9) + self.variant(PC6_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc6::Value10) + self.variant(PC6_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc6::Value11) + self.variant(PC6_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc6::Value12) + self.variant(PC6_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc6::Value13) + self.variant(PC6_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc6::Value14) + self.variant(PC6_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc6::Value15) + self.variant(PC6_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc6::Value16) + self.variant(PC6_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc6::Value17) + self.variant(PC6_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc6::Value18) + self.variant(PC6_A::VALUE18) } } #[doc = "Port Control for Port n Pin 4 to 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc7 { +pub enum PC7_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc7) -> Self { + fn from(variant: PC7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc7 { +impl crate::FieldSpec for PC7_A { type Ux = u8; } -impl crate::IsEnum for Pc7 {} +impl crate::IsEnum for PC7_A {} #[doc = "Field `PC7` reader - Port Control for Port n Pin 4 to 7"] -pub type Pc7R = crate::FieldReader; -impl Pc7R { +pub type PC7_R = crate::FieldReader; +impl PC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc7::Value1), - 1 => Some(Pc7::Value2), - 2 => Some(Pc7::Value3), - 3 => Some(Pc7::Value4), - 4 => Some(Pc7::Value5), - 5 => Some(Pc7::Value6), - 6 => Some(Pc7::Value7), - 7 => Some(Pc7::Value8), - 16 => Some(Pc7::Value9), - 17 => Some(Pc7::Value10), - 18 => Some(Pc7::Value11), - 19 => Some(Pc7::Value12), - 20 => Some(Pc7::Value13), - 24 => Some(Pc7::Value14), - 25 => Some(Pc7::Value15), - 26 => Some(Pc7::Value16), - 27 => Some(Pc7::Value17), - 28 => Some(Pc7::Value18), + 0 => Some(PC7_A::VALUE1), + 1 => Some(PC7_A::VALUE2), + 2 => Some(PC7_A::VALUE3), + 3 => Some(PC7_A::VALUE4), + 4 => Some(PC7_A::VALUE5), + 5 => Some(PC7_A::VALUE6), + 6 => Some(PC7_A::VALUE7), + 7 => Some(PC7_A::VALUE8), + 16 => Some(PC7_A::VALUE9), + 17 => Some(PC7_A::VALUE10), + 18 => Some(PC7_A::VALUE11), + 19 => Some(PC7_A::VALUE12), + 20 => Some(PC7_A::VALUE13), + 24 => Some(PC7_A::VALUE14), + 25 => Some(PC7_A::VALUE15), + 26 => Some(PC7_A::VALUE16), + 27 => Some(PC7_A::VALUE17), + 28 => Some(PC7_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc7::Value1 + *self == PC7_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc7::Value2 + *self == PC7_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc7::Value3 + *self == PC7_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc7::Value4 + *self == PC7_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc7::Value5 + *self == PC7_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc7::Value6 + *self == PC7_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc7::Value7 + *self == PC7_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc7::Value8 + *self == PC7_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc7::Value9 + *self == PC7_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc7::Value10 + *self == PC7_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc7::Value11 + *self == PC7_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc7::Value12 + *self == PC7_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc7::Value13 + *self == PC7_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc7::Value14 + *self == PC7_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc7::Value15 + *self == PC7_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc7::Value16 + *self == PC7_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc7::Value17 + *self == PC7_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc7::Value18 + *self == PC7_A::VALUE18 } } #[doc = "Field `PC7` writer - Port Control for Port n Pin 4 to 7"] -pub type Pc7W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc7>; -impl<'a, REG> Pc7W<'a, REG> +pub type PC7_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC7_A>; +impl<'a, REG> PC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc7::Value1) + self.variant(PC7_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc7::Value2) + self.variant(PC7_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc7::Value3) + self.variant(PC7_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc7::Value4) + self.variant(PC7_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc7::Value5) + self.variant(PC7_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc7::Value6) + self.variant(PC7_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc7::Value7) + self.variant(PC7_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc7::Value8) + self.variant(PC7_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc7::Value9) + self.variant(PC7_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc7::Value10) + self.variant(PC7_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc7::Value11) + self.variant(PC7_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc7::Value12) + self.variant(PC7_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc7::Value13) + self.variant(PC7_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc7::Value14) + self.variant(PC7_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc7::Value15) + self.variant(PC7_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc7::Value16) + self.variant(PC7_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc7::Value17) + self.variant(PC7_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc7::Value18) + self.variant(PC7_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc4(&self) -> Pc4R { - Pc4R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc4(&self) -> PC4_R { + PC4_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc5(&self) -> Pc5R { - Pc5R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc5(&self) -> PC5_R { + PC5_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc6(&self) -> Pc6R { - Pc6R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc6(&self) -> PC6_R { + PC6_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - pub fn pc7(&self) -> Pc7R { - Pc7R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc7(&self) -> PC7_R { + PC7_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc4(&mut self) -> Pc4W { - Pc4W::new(self, 3) + pub fn pc4(&mut self) -> PC4_W { + PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc5(&mut self) -> Pc5W { - Pc5W::new(self, 11) + pub fn pc5(&mut self) -> PC5_W { + PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc6(&mut self) -> Pc6W { - Pc6W::new(self, 19) + pub fn pc6(&mut self) -> PC6_W { + PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] #[must_use] - pub fn pc7(&mut self) -> Pc7W { - Pc7W::new(self, 27) + pub fn pc7(&mut self) -> PC7_W { + PC7_W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr4Spec; -impl crate::RegisterSpec for Iocr4Spec { +pub struct IOCR4_SPEC; +impl crate::RegisterSpec for IOCR4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr4::R`](R) reader structure"] -impl crate::Readable for Iocr4Spec {} +impl crate::Readable for IOCR4_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr4::W`](W) writer structure"] -impl crate::Writable for Iocr4Spec { +impl crate::Writable for IOCR4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR4 to value 0"] -impl crate::Resettable for Iocr4Spec { +impl crate::Resettable for IOCR4_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/iocr8.rs b/src/port2/iocr8.rs index a86f24d8..5c7e10cd 100644 --- a/src/port2/iocr8.rs +++ b/src/port2/iocr8.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc8 { +pub enum PC8_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc8) -> Self { + fn from(variant: PC8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc8 { +impl crate::FieldSpec for PC8_A { type Ux = u8; } -impl crate::IsEnum for Pc8 {} +impl crate::IsEnum for PC8_A {} #[doc = "Field `PC8` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc8R = crate::FieldReader; -impl Pc8R { +pub type PC8_R = crate::FieldReader; +impl PC8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc8::Value1), - 1 => Some(Pc8::Value2), - 2 => Some(Pc8::Value3), - 3 => Some(Pc8::Value4), - 4 => Some(Pc8::Value5), - 5 => Some(Pc8::Value6), - 6 => Some(Pc8::Value7), - 7 => Some(Pc8::Value8), - 16 => Some(Pc8::Value9), - 17 => Some(Pc8::Value10), - 18 => Some(Pc8::Value11), - 19 => Some(Pc8::Value12), - 20 => Some(Pc8::Value13), - 24 => Some(Pc8::Value14), - 25 => Some(Pc8::Value15), - 26 => Some(Pc8::Value16), - 27 => Some(Pc8::Value17), - 28 => Some(Pc8::Value18), + 0 => Some(PC8_A::VALUE1), + 1 => Some(PC8_A::VALUE2), + 2 => Some(PC8_A::VALUE3), + 3 => Some(PC8_A::VALUE4), + 4 => Some(PC8_A::VALUE5), + 5 => Some(PC8_A::VALUE6), + 6 => Some(PC8_A::VALUE7), + 7 => Some(PC8_A::VALUE8), + 16 => Some(PC8_A::VALUE9), + 17 => Some(PC8_A::VALUE10), + 18 => Some(PC8_A::VALUE11), + 19 => Some(PC8_A::VALUE12), + 20 => Some(PC8_A::VALUE13), + 24 => Some(PC8_A::VALUE14), + 25 => Some(PC8_A::VALUE15), + 26 => Some(PC8_A::VALUE16), + 27 => Some(PC8_A::VALUE17), + 28 => Some(PC8_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc8::Value1 + *self == PC8_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc8::Value2 + *self == PC8_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc8::Value3 + *self == PC8_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc8::Value4 + *self == PC8_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc8::Value5 + *self == PC8_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc8::Value6 + *self == PC8_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc8::Value7 + *self == PC8_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc8::Value8 + *self == PC8_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc8::Value9 + *self == PC8_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc8::Value10 + *self == PC8_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc8::Value11 + *self == PC8_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc8::Value12 + *self == PC8_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc8::Value13 + *self == PC8_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc8::Value14 + *self == PC8_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc8::Value15 + *self == PC8_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc8::Value16 + *self == PC8_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc8::Value17 + *self == PC8_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc8::Value18 + *self == PC8_A::VALUE18 } } #[doc = "Field `PC8` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc8W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc8>; -impl<'a, REG> Pc8W<'a, REG> +pub type PC8_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC8_A>; +impl<'a, REG> PC8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc8::Value1) + self.variant(PC8_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc8::Value2) + self.variant(PC8_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc8::Value3) + self.variant(PC8_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc8::Value4) + self.variant(PC8_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc8::Value5) + self.variant(PC8_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc8::Value6) + self.variant(PC8_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc8::Value7) + self.variant(PC8_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc8::Value8) + self.variant(PC8_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc8::Value9) + self.variant(PC8_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc8::Value10) + self.variant(PC8_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc8::Value11) + self.variant(PC8_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc8::Value12) + self.variant(PC8_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc8::Value13) + self.variant(PC8_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc8::Value14) + self.variant(PC8_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc8::Value15) + self.variant(PC8_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc8::Value16) + self.variant(PC8_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc8::Value17) + self.variant(PC8_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc8::Value18) + self.variant(PC8_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc9 { +pub enum PC9_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc9) -> Self { + fn from(variant: PC9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc9 { +impl crate::FieldSpec for PC9_A { type Ux = u8; } -impl crate::IsEnum for Pc9 {} +impl crate::IsEnum for PC9_A {} #[doc = "Field `PC9` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc9R = crate::FieldReader; -impl Pc9R { +pub type PC9_R = crate::FieldReader; +impl PC9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc9::Value1), - 1 => Some(Pc9::Value2), - 2 => Some(Pc9::Value3), - 3 => Some(Pc9::Value4), - 4 => Some(Pc9::Value5), - 5 => Some(Pc9::Value6), - 6 => Some(Pc9::Value7), - 7 => Some(Pc9::Value8), - 16 => Some(Pc9::Value9), - 17 => Some(Pc9::Value10), - 18 => Some(Pc9::Value11), - 19 => Some(Pc9::Value12), - 20 => Some(Pc9::Value13), - 24 => Some(Pc9::Value14), - 25 => Some(Pc9::Value15), - 26 => Some(Pc9::Value16), - 27 => Some(Pc9::Value17), - 28 => Some(Pc9::Value18), + 0 => Some(PC9_A::VALUE1), + 1 => Some(PC9_A::VALUE2), + 2 => Some(PC9_A::VALUE3), + 3 => Some(PC9_A::VALUE4), + 4 => Some(PC9_A::VALUE5), + 5 => Some(PC9_A::VALUE6), + 6 => Some(PC9_A::VALUE7), + 7 => Some(PC9_A::VALUE8), + 16 => Some(PC9_A::VALUE9), + 17 => Some(PC9_A::VALUE10), + 18 => Some(PC9_A::VALUE11), + 19 => Some(PC9_A::VALUE12), + 20 => Some(PC9_A::VALUE13), + 24 => Some(PC9_A::VALUE14), + 25 => Some(PC9_A::VALUE15), + 26 => Some(PC9_A::VALUE16), + 27 => Some(PC9_A::VALUE17), + 28 => Some(PC9_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc9::Value1 + *self == PC9_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc9::Value2 + *self == PC9_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc9::Value3 + *self == PC9_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc9::Value4 + *self == PC9_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc9::Value5 + *self == PC9_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc9::Value6 + *self == PC9_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc9::Value7 + *self == PC9_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc9::Value8 + *self == PC9_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc9::Value9 + *self == PC9_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc9::Value10 + *self == PC9_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc9::Value11 + *self == PC9_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc9::Value12 + *self == PC9_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc9::Value13 + *self == PC9_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc9::Value14 + *self == PC9_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc9::Value15 + *self == PC9_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc9::Value16 + *self == PC9_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc9::Value17 + *self == PC9_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc9::Value18 + *self == PC9_A::VALUE18 } } #[doc = "Field `PC9` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc9W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc9>; -impl<'a, REG> Pc9W<'a, REG> +pub type PC9_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC9_A>; +impl<'a, REG> PC9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc9::Value1) + self.variant(PC9_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc9::Value2) + self.variant(PC9_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc9::Value3) + self.variant(PC9_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc9::Value4) + self.variant(PC9_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc9::Value5) + self.variant(PC9_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc9::Value6) + self.variant(PC9_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc9::Value7) + self.variant(PC9_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc9::Value8) + self.variant(PC9_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc9::Value9) + self.variant(PC9_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc9::Value10) + self.variant(PC9_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc9::Value11) + self.variant(PC9_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc9::Value12) + self.variant(PC9_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc9::Value13) + self.variant(PC9_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc9::Value14) + self.variant(PC9_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc9::Value15) + self.variant(PC9_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc9::Value16) + self.variant(PC9_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc9::Value17) + self.variant(PC9_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc9::Value18) + self.variant(PC9_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc10 { +pub enum PC10_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc10) -> Self { + fn from(variant: PC10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc10 { +impl crate::FieldSpec for PC10_A { type Ux = u8; } -impl crate::IsEnum for Pc10 {} +impl crate::IsEnum for PC10_A {} #[doc = "Field `PC10` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc10R = crate::FieldReader; -impl Pc10R { +pub type PC10_R = crate::FieldReader; +impl PC10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc10::Value1), - 1 => Some(Pc10::Value2), - 2 => Some(Pc10::Value3), - 3 => Some(Pc10::Value4), - 4 => Some(Pc10::Value5), - 5 => Some(Pc10::Value6), - 6 => Some(Pc10::Value7), - 7 => Some(Pc10::Value8), - 16 => Some(Pc10::Value9), - 17 => Some(Pc10::Value10), - 18 => Some(Pc10::Value11), - 19 => Some(Pc10::Value12), - 20 => Some(Pc10::Value13), - 24 => Some(Pc10::Value14), - 25 => Some(Pc10::Value15), - 26 => Some(Pc10::Value16), - 27 => Some(Pc10::Value17), - 28 => Some(Pc10::Value18), + 0 => Some(PC10_A::VALUE1), + 1 => Some(PC10_A::VALUE2), + 2 => Some(PC10_A::VALUE3), + 3 => Some(PC10_A::VALUE4), + 4 => Some(PC10_A::VALUE5), + 5 => Some(PC10_A::VALUE6), + 6 => Some(PC10_A::VALUE7), + 7 => Some(PC10_A::VALUE8), + 16 => Some(PC10_A::VALUE9), + 17 => Some(PC10_A::VALUE10), + 18 => Some(PC10_A::VALUE11), + 19 => Some(PC10_A::VALUE12), + 20 => Some(PC10_A::VALUE13), + 24 => Some(PC10_A::VALUE14), + 25 => Some(PC10_A::VALUE15), + 26 => Some(PC10_A::VALUE16), + 27 => Some(PC10_A::VALUE17), + 28 => Some(PC10_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc10::Value1 + *self == PC10_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc10::Value2 + *self == PC10_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc10::Value3 + *self == PC10_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc10::Value4 + *self == PC10_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc10::Value5 + *self == PC10_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc10::Value6 + *self == PC10_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc10::Value7 + *self == PC10_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc10::Value8 + *self == PC10_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc10::Value9 + *self == PC10_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc10::Value10 + *self == PC10_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc10::Value11 + *self == PC10_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc10::Value12 + *self == PC10_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc10::Value13 + *self == PC10_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc10::Value14 + *self == PC10_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc10::Value15 + *self == PC10_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc10::Value16 + *self == PC10_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc10::Value17 + *self == PC10_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc10::Value18 + *self == PC10_A::VALUE18 } } #[doc = "Field `PC10` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc10W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc10>; -impl<'a, REG> Pc10W<'a, REG> +pub type PC10_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC10_A>; +impl<'a, REG> PC10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc10::Value1) + self.variant(PC10_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc10::Value2) + self.variant(PC10_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc10::Value3) + self.variant(PC10_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc10::Value4) + self.variant(PC10_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc10::Value5) + self.variant(PC10_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc10::Value6) + self.variant(PC10_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc10::Value7) + self.variant(PC10_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc10::Value8) + self.variant(PC10_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc10::Value9) + self.variant(PC10_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc10::Value10) + self.variant(PC10_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc10::Value11) + self.variant(PC10_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc10::Value12) + self.variant(PC10_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc10::Value13) + self.variant(PC10_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc10::Value14) + self.variant(PC10_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc10::Value15) + self.variant(PC10_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc10::Value16) + self.variant(PC10_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc10::Value17) + self.variant(PC10_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc10::Value18) + self.variant(PC10_A::VALUE18) } } #[doc = "Port Control for Port n Pin 8 to 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc11 { +pub enum PC11_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc11) -> Self { + fn from(variant: PC11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc11 { +impl crate::FieldSpec for PC11_A { type Ux = u8; } -impl crate::IsEnum for Pc11 {} +impl crate::IsEnum for PC11_A {} #[doc = "Field `PC11` reader - Port Control for Port n Pin 8 to 11"] -pub type Pc11R = crate::FieldReader; -impl Pc11R { +pub type PC11_R = crate::FieldReader; +impl PC11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc11::Value1), - 1 => Some(Pc11::Value2), - 2 => Some(Pc11::Value3), - 3 => Some(Pc11::Value4), - 4 => Some(Pc11::Value5), - 5 => Some(Pc11::Value6), - 6 => Some(Pc11::Value7), - 7 => Some(Pc11::Value8), - 16 => Some(Pc11::Value9), - 17 => Some(Pc11::Value10), - 18 => Some(Pc11::Value11), - 19 => Some(Pc11::Value12), - 20 => Some(Pc11::Value13), - 24 => Some(Pc11::Value14), - 25 => Some(Pc11::Value15), - 26 => Some(Pc11::Value16), - 27 => Some(Pc11::Value17), - 28 => Some(Pc11::Value18), + 0 => Some(PC11_A::VALUE1), + 1 => Some(PC11_A::VALUE2), + 2 => Some(PC11_A::VALUE3), + 3 => Some(PC11_A::VALUE4), + 4 => Some(PC11_A::VALUE5), + 5 => Some(PC11_A::VALUE6), + 6 => Some(PC11_A::VALUE7), + 7 => Some(PC11_A::VALUE8), + 16 => Some(PC11_A::VALUE9), + 17 => Some(PC11_A::VALUE10), + 18 => Some(PC11_A::VALUE11), + 19 => Some(PC11_A::VALUE12), + 20 => Some(PC11_A::VALUE13), + 24 => Some(PC11_A::VALUE14), + 25 => Some(PC11_A::VALUE15), + 26 => Some(PC11_A::VALUE16), + 27 => Some(PC11_A::VALUE17), + 28 => Some(PC11_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc11::Value1 + *self == PC11_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc11::Value2 + *self == PC11_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc11::Value3 + *self == PC11_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc11::Value4 + *self == PC11_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc11::Value5 + *self == PC11_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc11::Value6 + *self == PC11_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc11::Value7 + *self == PC11_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc11::Value8 + *self == PC11_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc11::Value9 + *self == PC11_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc11::Value10 + *self == PC11_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc11::Value11 + *self == PC11_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc11::Value12 + *self == PC11_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc11::Value13 + *self == PC11_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc11::Value14 + *self == PC11_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc11::Value15 + *self == PC11_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc11::Value16 + *self == PC11_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc11::Value17 + *self == PC11_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc11::Value18 + *self == PC11_A::VALUE18 } } #[doc = "Field `PC11` writer - Port Control for Port n Pin 8 to 11"] -pub type Pc11W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc11>; -impl<'a, REG> Pc11W<'a, REG> +pub type PC11_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC11_A>; +impl<'a, REG> PC11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc11::Value1) + self.variant(PC11_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc11::Value2) + self.variant(PC11_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc11::Value3) + self.variant(PC11_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc11::Value4) + self.variant(PC11_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc11::Value5) + self.variant(PC11_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc11::Value6) + self.variant(PC11_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc11::Value7) + self.variant(PC11_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc11::Value8) + self.variant(PC11_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc11::Value9) + self.variant(PC11_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc11::Value10) + self.variant(PC11_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc11::Value11) + self.variant(PC11_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc11::Value12) + self.variant(PC11_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc11::Value13) + self.variant(PC11_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc11::Value14) + self.variant(PC11_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc11::Value15) + self.variant(PC11_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc11::Value16) + self.variant(PC11_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc11::Value17) + self.variant(PC11_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc11::Value18) + self.variant(PC11_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc8(&self) -> Pc8R { - Pc8R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc8(&self) -> PC8_R { + PC8_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc9(&self) -> Pc9R { - Pc9R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc9(&self) -> PC9_R { + PC9_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc10(&self) -> Pc10R { - Pc10R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc10(&self) -> PC10_R { + PC10_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - pub fn pc11(&self) -> Pc11R { - Pc11R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc11(&self) -> PC11_R { + PC11_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc8(&mut self) -> Pc8W { - Pc8W::new(self, 3) + pub fn pc8(&mut self) -> PC8_W { + PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc9(&mut self) -> Pc9W { - Pc9W::new(self, 11) + pub fn pc9(&mut self) -> PC9_W { + PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc10(&mut self) -> Pc10W { - Pc10W::new(self, 19) + pub fn pc10(&mut self) -> PC10_W { + PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] #[must_use] - pub fn pc11(&mut self) -> Pc11W { - Pc11W::new(self, 27) + pub fn pc11(&mut self) -> PC11_W { + PC11_W::new(self, 27) } } #[doc = "Port 2 Input/Output Control Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr8Spec; -impl crate::RegisterSpec for Iocr8Spec { +pub struct IOCR8_SPEC; +impl crate::RegisterSpec for IOCR8_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr8::R`](R) reader structure"] -impl crate::Readable for Iocr8Spec {} +impl crate::Readable for IOCR8_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr8::W`](W) writer structure"] -impl crate::Writable for Iocr8Spec { +impl crate::Writable for IOCR8_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR8 to value 0"] -impl crate::Resettable for Iocr8Spec { +impl crate::Resettable for IOCR8_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/omr.rs b/src/port2/omr.rs index ad1c5bdc..4d71e108 100644 --- a/src/port2/omr.rs +++ b/src/port2/omr.rs @@ -1,275 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> Ps0W { - Ps0W::new(self, 0) + pub fn ps0(&mut self) -> PS0_W { + PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> Ps1W { - Ps1W::new(self, 1) + pub fn ps1(&mut self) -> PS1_W { + PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> Ps2W { - Ps2W::new(self, 2) + pub fn ps2(&mut self) -> PS2_W { + PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> Ps3W { - Ps3W::new(self, 3) + pub fn ps3(&mut self) -> PS3_W { + PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> Ps4W { - Ps4W::new(self, 4) + pub fn ps4(&mut self) -> PS4_W { + PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> Ps5W { - Ps5W::new(self, 5) + pub fn ps5(&mut self) -> PS5_W { + PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> Ps6W { - Ps6W::new(self, 6) + pub fn ps6(&mut self) -> PS6_W { + PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> Ps7W { - Ps7W::new(self, 7) + pub fn ps7(&mut self) -> PS7_W { + PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> Ps8W { - Ps8W::new(self, 8) + pub fn ps8(&mut self) -> PS8_W { + PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> Ps9W { - Ps9W::new(self, 9) + pub fn ps9(&mut self) -> PS9_W { + PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> Ps10W { - Ps10W::new(self, 10) + pub fn ps10(&mut self) -> PS10_W { + PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> Ps11W { - Ps11W::new(self, 11) + pub fn ps11(&mut self) -> PS11_W { + PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> Ps12W { - Ps12W::new(self, 12) + pub fn ps12(&mut self) -> PS12_W { + PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> Ps13W { - Ps13W::new(self, 13) + pub fn ps13(&mut self) -> PS13_W { + PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> Ps14W { - Ps14W::new(self, 14) + pub fn ps14(&mut self) -> PS14_W { + PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> Ps15W { - Ps15W::new(self, 15) + pub fn ps15(&mut self) -> PS15_W { + PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> Pr0W { - Pr0W::new(self, 16) + pub fn pr0(&mut self) -> PR0_W { + PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> Pr1W { - Pr1W::new(self, 17) + pub fn pr1(&mut self) -> PR1_W { + PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> Pr2W { - Pr2W::new(self, 18) + pub fn pr2(&mut self) -> PR2_W { + PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> Pr3W { - Pr3W::new(self, 19) + pub fn pr3(&mut self) -> PR3_W { + PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> Pr4W { - Pr4W::new(self, 20) + pub fn pr4(&mut self) -> PR4_W { + PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> Pr5W { - Pr5W::new(self, 21) + pub fn pr5(&mut self) -> PR5_W { + PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> Pr6W { - Pr6W::new(self, 22) + pub fn pr6(&mut self) -> PR6_W { + PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> Pr7W { - Pr7W::new(self, 23) + pub fn pr7(&mut self) -> PR7_W { + PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> Pr8W { - Pr8W::new(self, 24) + pub fn pr8(&mut self) -> PR8_W { + PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> Pr9W { - Pr9W::new(self, 25) + pub fn pr9(&mut self) -> PR9_W { + PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> Pr10W { - Pr10W::new(self, 26) + pub fn pr10(&mut self) -> PR10_W { + PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> Pr11W { - Pr11W::new(self, 27) + pub fn pr11(&mut self) -> PR11_W { + PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> Pr12W { - Pr12W::new(self, 28) + pub fn pr12(&mut self) -> PR12_W { + PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> Pr13W { - Pr13W::new(self, 29) + pub fn pr13(&mut self) -> PR13_W { + PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> Pr14W { - Pr14W::new(self, 30) + pub fn pr14(&mut self) -> PR14_W { + PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> Pr15W { - Pr15W::new(self, 31) + pub fn pr15(&mut self) -> PR15_W { + PR15_W::new(self, 31) } } #[doc = "Port 2 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OmrSpec; -impl crate::RegisterSpec for OmrSpec { +pub struct OMR_SPEC; +impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OmrSpec { +impl crate::Writable for OMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OmrSpec { +impl crate::Resettable for OMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/out.rs b/src/port2/out.rs index 13276beb..09001f5f 100644 --- a/src/port2/out.rs +++ b/src/port2/out.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; -impl<'a, REG> P0W<'a, REG> +pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; +impl<'a, REG> P0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0::Value1) + self.variant(P0_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0::Value2) + self.variant(P0_A::VALUE2) } } #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; -impl<'a, REG> P1W<'a, REG> +pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; +impl<'a, REG> P1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1::Value1) + self.variant(P1_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1::Value2) + self.variant(P1_A::VALUE2) } } #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; -impl<'a, REG> P2W<'a, REG> +pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; +impl<'a, REG> P2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2::Value1) + self.variant(P2_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2::Value2) + self.variant(P2_A::VALUE2) } } #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; -impl<'a, REG> P3W<'a, REG> +pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; +impl<'a, REG> P3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3::Value1) + self.variant(P3_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3::Value2) + self.variant(P3_A::VALUE2) } } #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; -impl<'a, REG> P4W<'a, REG> +pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; +impl<'a, REG> P4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4::Value1) + self.variant(P4_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4::Value2) + self.variant(P4_A::VALUE2) } } #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; -impl<'a, REG> P5W<'a, REG> +pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; +impl<'a, REG> P5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5::Value1) + self.variant(P5_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5::Value2) + self.variant(P5_A::VALUE2) } } #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; -impl<'a, REG> P6W<'a, REG> +pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; +impl<'a, REG> P6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6::Value1) + self.variant(P6_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6::Value2) + self.variant(P6_A::VALUE2) } } #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; -impl<'a, REG> P7W<'a, REG> +pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; +impl<'a, REG> P7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7::Value1) + self.variant(P7_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7::Value2) + self.variant(P7_A::VALUE2) } } #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; -impl<'a, REG> P8W<'a, REG> +pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; +impl<'a, REG> P8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8::Value1) + self.variant(P8_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8::Value2) + self.variant(P8_A::VALUE2) } } #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; -impl<'a, REG> P9W<'a, REG> +pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; +impl<'a, REG> P9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9::Value1) + self.variant(P9_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9::Value2) + self.variant(P9_A::VALUE2) } } #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; -impl<'a, REG> P10W<'a, REG> +pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; +impl<'a, REG> P10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10::Value1) + self.variant(P10_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10::Value2) + self.variant(P10_A::VALUE2) } } #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; -impl<'a, REG> P11W<'a, REG> +pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; +impl<'a, REG> P11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11::Value1) + self.variant(P11_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11::Value2) + self.variant(P11_A::VALUE2) } } #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; -impl<'a, REG> P12W<'a, REG> +pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; +impl<'a, REG> P12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12::Value1) + self.variant(P12_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12::Value2) + self.variant(P12_A::VALUE2) } } #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; -impl<'a, REG> P13W<'a, REG> +pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; +impl<'a, REG> P13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13::Value1) + self.variant(P13_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13::Value2) + self.variant(P13_A::VALUE2) } } #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; -impl<'a, REG> P14W<'a, REG> +pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; +impl<'a, REG> P14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14::Value1) + self.variant(P14_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14::Value2) + self.variant(P14_A::VALUE2) } } #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; -impl<'a, REG> P15W<'a, REG> +pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; +impl<'a, REG> P15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15::Value1) + self.variant(P15_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15::Value2) + self.variant(P15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0W { - P0W::new(self, 0) + pub fn p0(&mut self) -> P0_W { + P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1W { - P1W::new(self, 1) + pub fn p1(&mut self) -> P1_W { + P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2W { - P2W::new(self, 2) + pub fn p2(&mut self) -> P2_W { + P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3W { - P3W::new(self, 3) + pub fn p3(&mut self) -> P3_W { + P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4W { - P4W::new(self, 4) + pub fn p4(&mut self) -> P4_W { + P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5W { - P5W::new(self, 5) + pub fn p5(&mut self) -> P5_W { + P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6W { - P6W::new(self, 6) + pub fn p6(&mut self) -> P6_W { + P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7W { - P7W::new(self, 7) + pub fn p7(&mut self) -> P7_W { + P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8W { - P8W::new(self, 8) + pub fn p8(&mut self) -> P8_W { + P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9W { - P9W::new(self, 9) + pub fn p9(&mut self) -> P9_W { + P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10W { - P10W::new(self, 10) + pub fn p10(&mut self) -> P10_W { + P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11W { - P11W::new(self, 11) + pub fn p11(&mut self) -> P11_W { + P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12W { - P12W::new(self, 12) + pub fn p12(&mut self) -> P12_W { + P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13W { - P13W::new(self, 13) + pub fn p13(&mut self) -> P13_W { + P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14W { - P14W::new(self, 14) + pub fn p14(&mut self) -> P14_W { + P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15W { - P15W::new(self, 15) + pub fn p15(&mut self) -> P15_W { + P15_W::new(self, 15) } } #[doc = "Port 2 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutSpec; -impl crate::RegisterSpec for OutSpec { +pub struct OUT_SPEC; +impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OutSpec {} +impl crate::Readable for OUT_SPEC {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OutSpec { +impl crate::Writable for OUT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OutSpec { +impl crate::Resettable for OUT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/pdisc.rs b/src/port2/pdisc.rs index 7f09428f..cf718444 100644 --- a/src/port2/pdisc.rs +++ b/src/port2/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis0 { +pub enum PDIS0_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis0) -> Self { + fn from(variant: PDIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type Pdis0R = crate::BitReader; -impl Pdis0R { +pub type PDIS0_R = crate::BitReader; +impl PDIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis0 { + pub const fn variant(&self) -> PDIS0_A { match self.bits { - false => Pdis0::Value1, - true => Pdis0::Value2, + false => PDIS0_A::VALUE1, + true => PDIS0_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis0::Value1 + *self == PDIS0_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis0::Value2 + *self == PDIS0_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis1 { +pub enum PDIS1_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis1) -> Self { + fn from(variant: PDIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type Pdis1R = crate::BitReader; -impl Pdis1R { +pub type PDIS1_R = crate::BitReader; +impl PDIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis1 { + pub const fn variant(&self) -> PDIS1_A { match self.bits { - false => Pdis1::Value1, - true => Pdis1::Value2, + false => PDIS1_A::VALUE1, + true => PDIS1_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis1::Value1 + *self == PDIS1_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis1::Value2 + *self == PDIS1_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis2 { +pub enum PDIS2_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis2) -> Self { + fn from(variant: PDIS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type Pdis2R = crate::BitReader; -impl Pdis2R { +pub type PDIS2_R = crate::BitReader; +impl PDIS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis2 { + pub const fn variant(&self) -> PDIS2_A { match self.bits { - false => Pdis2::Value1, - true => Pdis2::Value2, + false => PDIS2_A::VALUE1, + true => PDIS2_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis2::Value1 + *self == PDIS2_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis2::Value2 + *self == PDIS2_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis3 { +pub enum PDIS3_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis3) -> Self { + fn from(variant: PDIS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type Pdis3R = crate::BitReader; -impl Pdis3R { +pub type PDIS3_R = crate::BitReader; +impl PDIS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis3 { + pub const fn variant(&self) -> PDIS3_A { match self.bits { - false => Pdis3::Value1, - true => Pdis3::Value2, + false => PDIS3_A::VALUE1, + true => PDIS3_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis3::Value1 + *self == PDIS3_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis3::Value2 + *self == PDIS3_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis4 { +pub enum PDIS4_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis4) -> Self { + fn from(variant: PDIS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type Pdis4R = crate::BitReader; -impl Pdis4R { +pub type PDIS4_R = crate::BitReader; +impl PDIS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis4 { + pub const fn variant(&self) -> PDIS4_A { match self.bits { - false => Pdis4::Value1, - true => Pdis4::Value2, + false => PDIS4_A::VALUE1, + true => PDIS4_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis4::Value1 + *self == PDIS4_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis4::Value2 + *self == PDIS4_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis5 { +pub enum PDIS5_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis5) -> Self { + fn from(variant: PDIS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type Pdis5R = crate::BitReader; -impl Pdis5R { +pub type PDIS5_R = crate::BitReader; +impl PDIS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis5 { + pub const fn variant(&self) -> PDIS5_A { match self.bits { - false => Pdis5::Value1, - true => Pdis5::Value2, + false => PDIS5_A::VALUE1, + true => PDIS5_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis5::Value1 + *self == PDIS5_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis5::Value2 + *self == PDIS5_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis6 { +pub enum PDIS6_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis6) -> Self { + fn from(variant: PDIS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type Pdis6R = crate::BitReader; -impl Pdis6R { +pub type PDIS6_R = crate::BitReader; +impl PDIS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis6 { + pub const fn variant(&self) -> PDIS6_A { match self.bits { - false => Pdis6::Value1, - true => Pdis6::Value2, + false => PDIS6_A::VALUE1, + true => PDIS6_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis6::Value1 + *self == PDIS6_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis6::Value2 + *self == PDIS6_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis7 { +pub enum PDIS7_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis7) -> Self { + fn from(variant: PDIS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type Pdis7R = crate::BitReader; -impl Pdis7R { +pub type PDIS7_R = crate::BitReader; +impl PDIS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis7 { + pub const fn variant(&self) -> PDIS7_A { match self.bits { - false => Pdis7::Value1, - true => Pdis7::Value2, + false => PDIS7_A::VALUE1, + true => PDIS7_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis7::Value1 + *self == PDIS7_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis7::Value2 + *self == PDIS7_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis8 { +pub enum PDIS8_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis8) -> Self { + fn from(variant: PDIS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type Pdis8R = crate::BitReader; -impl Pdis8R { +pub type PDIS8_R = crate::BitReader; +impl PDIS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis8 { + pub const fn variant(&self) -> PDIS8_A { match self.bits { - false => Pdis8::Value1, - true => Pdis8::Value2, + false => PDIS8_A::VALUE1, + true => PDIS8_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis8::Value1 + *self == PDIS8_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis8::Value2 + *self == PDIS8_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis9 { +pub enum PDIS9_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis9) -> Self { + fn from(variant: PDIS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type Pdis9R = crate::BitReader; -impl Pdis9R { +pub type PDIS9_R = crate::BitReader; +impl PDIS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis9 { + pub const fn variant(&self) -> PDIS9_A { match self.bits { - false => Pdis9::Value1, - true => Pdis9::Value2, + false => PDIS9_A::VALUE1, + true => PDIS9_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis9::Value1 + *self == PDIS9_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis9::Value2 + *self == PDIS9_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis10 { +pub enum PDIS10_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis10) -> Self { + fn from(variant: PDIS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type Pdis10R = crate::BitReader; -impl Pdis10R { +pub type PDIS10_R = crate::BitReader; +impl PDIS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis10 { + pub const fn variant(&self) -> PDIS10_A { match self.bits { - false => Pdis10::Value1, - true => Pdis10::Value2, + false => PDIS10_A::VALUE1, + true => PDIS10_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis10::Value1 + *self == PDIS10_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis10::Value2 + *self == PDIS10_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis11 { +pub enum PDIS11_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis11) -> Self { + fn from(variant: PDIS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type Pdis11R = crate::BitReader; -impl Pdis11R { +pub type PDIS11_R = crate::BitReader; +impl PDIS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis11 { + pub const fn variant(&self) -> PDIS11_A { match self.bits { - false => Pdis11::Value1, - true => Pdis11::Value2, + false => PDIS11_A::VALUE1, + true => PDIS11_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis11::Value1 + *self == PDIS11_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis11::Value2 + *self == PDIS11_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis12 { +pub enum PDIS12_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis12) -> Self { + fn from(variant: PDIS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type Pdis12R = crate::BitReader; -impl Pdis12R { +pub type PDIS12_R = crate::BitReader; +impl PDIS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis12 { + pub const fn variant(&self) -> PDIS12_A { match self.bits { - false => Pdis12::Value1, - true => Pdis12::Value2, + false => PDIS12_A::VALUE1, + true => PDIS12_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis12::Value1 + *self == PDIS12_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis12::Value2 + *self == PDIS12_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis13 { +pub enum PDIS13_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis13) -> Self { + fn from(variant: PDIS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type Pdis13R = crate::BitReader; -impl Pdis13R { +pub type PDIS13_R = crate::BitReader; +impl PDIS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis13 { + pub const fn variant(&self) -> PDIS13_A { match self.bits { - false => Pdis13::Value1, - true => Pdis13::Value2, + false => PDIS13_A::VALUE1, + true => PDIS13_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis13::Value1 + *self == PDIS13_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis13::Value2 + *self == PDIS13_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis14 { +pub enum PDIS14_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis14) -> Self { + fn from(variant: PDIS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type Pdis14R = crate::BitReader; -impl Pdis14R { +pub type PDIS14_R = crate::BitReader; +impl PDIS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis14 { + pub const fn variant(&self) -> PDIS14_A { match self.bits { - false => Pdis14::Value1, - true => Pdis14::Value2, + false => PDIS14_A::VALUE1, + true => PDIS14_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis14::Value1 + *self == PDIS14_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis14::Value2 + *self == PDIS14_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis15 { +pub enum PDIS15_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis15) -> Self { + fn from(variant: PDIS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type Pdis15R = crate::BitReader; -impl Pdis15R { +pub type PDIS15_R = crate::BitReader; +impl PDIS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis15 { + pub const fn variant(&self) -> PDIS15_A { match self.bits { - false => Pdis15::Value1, - true => Pdis15::Value2, + false => PDIS15_A::VALUE1, + true => PDIS15_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis15::Value1 + *self == PDIS15_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis15::Value2 + *self == PDIS15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> Pdis0R { - Pdis0R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> PDIS0_R { + PDIS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> Pdis1R { - Pdis1R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> PDIS1_R { + PDIS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> Pdis2R { - Pdis2R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> PDIS2_R { + PDIS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> Pdis3R { - Pdis3R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> PDIS3_R { + PDIS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> Pdis4R { - Pdis4R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> PDIS4_R { + PDIS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> Pdis5R { - Pdis5R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> PDIS5_R { + PDIS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> Pdis6R { - Pdis6R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> PDIS6_R { + PDIS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> Pdis7R { - Pdis7R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> PDIS7_R { + PDIS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> Pdis8R { - Pdis8R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> PDIS8_R { + PDIS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> Pdis9R { - Pdis9R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> PDIS9_R { + PDIS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> Pdis10R { - Pdis10R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> PDIS10_R { + PDIS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> Pdis11R { - Pdis11R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> PDIS11_R { + PDIS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> Pdis12R { - Pdis12R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> PDIS12_R { + PDIS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> Pdis13R { - Pdis13R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> PDIS13_R { + PDIS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> Pdis14R { - Pdis14R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> PDIS14_R { + PDIS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> Pdis15R { - Pdis15R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> PDIS15_R { + PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 2 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdiscSpec; -impl crate::RegisterSpec for PdiscSpec { +pub struct PDISC_SPEC; +impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PdiscSpec {} +impl crate::Readable for PDISC_SPEC {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PdiscSpec { +impl crate::Resettable for PDISC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port2/pdr0.rs b/src/port2/pdr0.rs index 20046b4b..49988bed 100644 --- a/src/port2/pdr0.rs +++ b/src/port2/pdr0.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type Pd0R = crate::FieldReader; +pub type PD0_R = crate::FieldReader; #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type Pd1R = crate::FieldReader; +pub type PD1_R = crate::FieldReader; #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type Pd2R = crate::FieldReader; +pub type PD2_R = crate::FieldReader; #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type Pd3R = crate::FieldReader; +pub type PD3_R = crate::FieldReader; #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type Pd4R = crate::FieldReader; +pub type PD4_R = crate::FieldReader; #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type Pd5R = crate::FieldReader; +pub type PD5_R = crate::FieldReader; #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type Pd6R = crate::FieldReader; +pub type PD6_R = crate::FieldReader; #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type Pd7R = crate::FieldReader; +pub type PD7_R = crate::FieldReader; #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> Pd0R { - Pd0R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> PD0_R { + PD0_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> Pd1R { - Pd1R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> PD1_R { + PD1_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> Pd2R { - Pd2R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> PD2_R { + PD2_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> Pd3R { - Pd3R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> PD3_R { + PD3_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> Pd4R { - Pd4R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> PD4_R { + PD4_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> Pd5R { - Pd5R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> PD5_R { + PD5_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> Pd6R { - Pd6R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> PD6_R { + PD6_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> Pd7R { - Pd7R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> PD7_R { + PD7_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> Pd0W { - Pd0W::new(self, 0) + pub fn pd0(&mut self) -> PD0_W { + PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> Pd1W { - Pd1W::new(self, 4) + pub fn pd1(&mut self) -> PD1_W { + PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> Pd2W { - Pd2W::new(self, 8) + pub fn pd2(&mut self) -> PD2_W { + PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> Pd3W { - Pd3W::new(self, 12) + pub fn pd3(&mut self) -> PD3_W { + PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> Pd4W { - Pd4W::new(self, 16) + pub fn pd4(&mut self) -> PD4_W { + PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> Pd5W { - Pd5W::new(self, 20) + pub fn pd5(&mut self) -> PD5_W { + PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> Pd6W { - Pd6W::new(self, 24) + pub fn pd6(&mut self) -> PD6_W { + PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> Pd7W { - Pd7W::new(self, 28) + pub fn pd7(&mut self) -> PD7_W { + PD7_W::new(self, 28) } } #[doc = "Port 2 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr0Spec; -impl crate::RegisterSpec for Pdr0Spec { +pub struct PDR0_SPEC; +impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for Pdr0Spec {} +impl crate::Readable for PDR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for Pdr0Spec { +impl crate::Writable for PDR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for Pdr0Spec { +impl crate::Resettable for PDR0_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port2/pdr1.rs b/src/port2/pdr1.rs index 086ec903..fac65620 100644 --- a/src/port2/pdr1.rs +++ b/src/port2/pdr1.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD8` reader - Pad Driver Mode for Pn.8"] -pub type Pd8R = crate::FieldReader; +pub type PD8_R = crate::FieldReader; #[doc = "Field `PD8` writer - Pad Driver Mode for Pn.8"] -pub type Pd8W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD8_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD9` reader - Pad Driver Mode for Pn.9"] -pub type Pd9R = crate::FieldReader; +pub type PD9_R = crate::FieldReader; #[doc = "Field `PD9` writer - Pad Driver Mode for Pn.9"] -pub type Pd9W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD9_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD10` reader - Pad Driver Mode for Pn.10"] -pub type Pd10R = crate::FieldReader; +pub type PD10_R = crate::FieldReader; #[doc = "Field `PD10` writer - Pad Driver Mode for Pn.10"] -pub type Pd10W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD10_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD11` reader - Pad Driver Mode for Pn.11"] -pub type Pd11R = crate::FieldReader; +pub type PD11_R = crate::FieldReader; #[doc = "Field `PD11` writer - Pad Driver Mode for Pn.11"] -pub type Pd11W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD11_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD12` reader - Pad Driver Mode for Pn.12"] -pub type Pd12R = crate::FieldReader; +pub type PD12_R = crate::FieldReader; #[doc = "Field `PD12` writer - Pad Driver Mode for Pn.12"] -pub type Pd12W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD12_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD13` reader - Pad Driver Mode for Pn.13"] -pub type Pd13R = crate::FieldReader; +pub type PD13_R = crate::FieldReader; #[doc = "Field `PD13` writer - Pad Driver Mode for Pn.13"] -pub type Pd13W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD13_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD14` reader - Pad Driver Mode for Pn.14"] -pub type Pd14R = crate::FieldReader; +pub type PD14_R = crate::FieldReader; #[doc = "Field `PD14` writer - Pad Driver Mode for Pn.14"] -pub type Pd14W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD14_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD15` reader - Pad Driver Mode for Pn.15"] -pub type Pd15R = crate::FieldReader; +pub type PD15_R = crate::FieldReader; #[doc = "Field `PD15` writer - Pad Driver Mode for Pn.15"] -pub type Pd15W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD15_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - pub fn pd8(&self) -> Pd8R { - Pd8R::new((self.bits & 7) as u8) + pub fn pd8(&self) -> PD8_R { + PD8_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - pub fn pd9(&self) -> Pd9R { - Pd9R::new(((self.bits >> 4) & 7) as u8) + pub fn pd9(&self) -> PD9_R { + PD9_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - pub fn pd10(&self) -> Pd10R { - Pd10R::new(((self.bits >> 8) & 7) as u8) + pub fn pd10(&self) -> PD10_R { + PD10_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - pub fn pd11(&self) -> Pd11R { - Pd11R::new(((self.bits >> 12) & 7) as u8) + pub fn pd11(&self) -> PD11_R { + PD11_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - pub fn pd12(&self) -> Pd12R { - Pd12R::new(((self.bits >> 16) & 7) as u8) + pub fn pd12(&self) -> PD12_R { + PD12_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - pub fn pd13(&self) -> Pd13R { - Pd13R::new(((self.bits >> 20) & 7) as u8) + pub fn pd13(&self) -> PD13_R { + PD13_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - pub fn pd14(&self) -> Pd14R { - Pd14R::new(((self.bits >> 24) & 7) as u8) + pub fn pd14(&self) -> PD14_R { + PD14_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - pub fn pd15(&self) -> Pd15R { - Pd15R::new(((self.bits >> 28) & 7) as u8) + pub fn pd15(&self) -> PD15_R { + PD15_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] #[must_use] - pub fn pd8(&mut self) -> Pd8W { - Pd8W::new(self, 0) + pub fn pd8(&mut self) -> PD8_W { + PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] #[must_use] - pub fn pd9(&mut self) -> Pd9W { - Pd9W::new(self, 4) + pub fn pd9(&mut self) -> PD9_W { + PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] #[must_use] - pub fn pd10(&mut self) -> Pd10W { - Pd10W::new(self, 8) + pub fn pd10(&mut self) -> PD10_W { + PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] #[must_use] - pub fn pd11(&mut self) -> Pd11W { - Pd11W::new(self, 12) + pub fn pd11(&mut self) -> PD11_W { + PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] #[must_use] - pub fn pd12(&mut self) -> Pd12W { - Pd12W::new(self, 16) + pub fn pd12(&mut self) -> PD12_W { + PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] #[must_use] - pub fn pd13(&mut self) -> Pd13W { - Pd13W::new(self, 20) + pub fn pd13(&mut self) -> PD13_W { + PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] #[must_use] - pub fn pd14(&mut self) -> Pd14W { - Pd14W::new(self, 24) + pub fn pd14(&mut self) -> PD14_W { + PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] #[must_use] - pub fn pd15(&mut self) -> Pd15W { - Pd15W::new(self, 28) + pub fn pd15(&mut self) -> PD15_W { + PD15_W::new(self, 28) } } #[doc = "Port 2 Pad Driver Mode 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr1Spec; -impl crate::RegisterSpec for Pdr1Spec { +pub struct PDR1_SPEC; +impl crate::RegisterSpec for PDR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr1::R`](R) reader structure"] -impl crate::Readable for Pdr1Spec {} +impl crate::Readable for PDR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr1::W`](W) writer structure"] -impl crate::Writable for Pdr1Spec { +impl crate::Writable for PDR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR1 to value 0x2222_2222"] -impl crate::Resettable for Pdr1Spec { +impl crate::Resettable for PDR1_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port2/pps.rs b/src/port2/pps.rs index 0afbdc5d..290f4901 100644 --- a/src/port2/pps.rs +++ b/src/port2/pps.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps0 { +pub enum PPS0_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps0) -> Self { + fn from(variant: PPS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type Pps0R = crate::BitReader; -impl Pps0R { +pub type PPS0_R = crate::BitReader; +impl PPS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps0 { + pub const fn variant(&self) -> PPS0_A { match self.bits { - false => Pps0::Value1, - true => Pps0::Value2, + false => PPS0_A::VALUE1, + true => PPS0_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps0::Value1 + *self == PPS0_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps0::Value2 + *self == PPS0_A::VALUE2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; -impl<'a, REG> Pps0W<'a, REG> +pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; +impl<'a, REG> PPS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps0::Value1) + self.variant(PPS0_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps0::Value2) + self.variant(PPS0_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps1 { +pub enum PPS1_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps1) -> Self { + fn from(variant: PPS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type Pps1R = crate::BitReader; -impl Pps1R { +pub type PPS1_R = crate::BitReader; +impl PPS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps1 { + pub const fn variant(&self) -> PPS1_A { match self.bits { - false => Pps1::Value1, - true => Pps1::Value2, + false => PPS1_A::VALUE1, + true => PPS1_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps1::Value1 + *self == PPS1_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps1::Value2 + *self == PPS1_A::VALUE2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; -impl<'a, REG> Pps1W<'a, REG> +pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; +impl<'a, REG> PPS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps1::Value1) + self.variant(PPS1_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps1::Value2) + self.variant(PPS1_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps2 { +pub enum PPS2_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps2) -> Self { + fn from(variant: PPS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type Pps2R = crate::BitReader; -impl Pps2R { +pub type PPS2_R = crate::BitReader; +impl PPS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps2 { + pub const fn variant(&self) -> PPS2_A { match self.bits { - false => Pps2::Value1, - true => Pps2::Value2, + false => PPS2_A::VALUE1, + true => PPS2_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps2::Value1 + *self == PPS2_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps2::Value2 + *self == PPS2_A::VALUE2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; -impl<'a, REG> Pps2W<'a, REG> +pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; +impl<'a, REG> PPS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps2::Value1) + self.variant(PPS2_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps2::Value2) + self.variant(PPS2_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps3 { +pub enum PPS3_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps3) -> Self { + fn from(variant: PPS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type Pps3R = crate::BitReader; -impl Pps3R { +pub type PPS3_R = crate::BitReader; +impl PPS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps3 { + pub const fn variant(&self) -> PPS3_A { match self.bits { - false => Pps3::Value1, - true => Pps3::Value2, + false => PPS3_A::VALUE1, + true => PPS3_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps3::Value1 + *self == PPS3_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps3::Value2 + *self == PPS3_A::VALUE2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; -impl<'a, REG> Pps3W<'a, REG> +pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; +impl<'a, REG> PPS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps3::Value1) + self.variant(PPS3_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps3::Value2) + self.variant(PPS3_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps4 { +pub enum PPS4_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps4) -> Self { + fn from(variant: PPS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type Pps4R = crate::BitReader; -impl Pps4R { +pub type PPS4_R = crate::BitReader; +impl PPS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps4 { + pub const fn variant(&self) -> PPS4_A { match self.bits { - false => Pps4::Value1, - true => Pps4::Value2, + false => PPS4_A::VALUE1, + true => PPS4_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps4::Value1 + *self == PPS4_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps4::Value2 + *self == PPS4_A::VALUE2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; -impl<'a, REG> Pps4W<'a, REG> +pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; +impl<'a, REG> PPS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps4::Value1) + self.variant(PPS4_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps4::Value2) + self.variant(PPS4_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps5 { +pub enum PPS5_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps5) -> Self { + fn from(variant: PPS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type Pps5R = crate::BitReader; -impl Pps5R { +pub type PPS5_R = crate::BitReader; +impl PPS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps5 { + pub const fn variant(&self) -> PPS5_A { match self.bits { - false => Pps5::Value1, - true => Pps5::Value2, + false => PPS5_A::VALUE1, + true => PPS5_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps5::Value1 + *self == PPS5_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps5::Value2 + *self == PPS5_A::VALUE2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; -impl<'a, REG> Pps5W<'a, REG> +pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; +impl<'a, REG> PPS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps5::Value1) + self.variant(PPS5_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps5::Value2) + self.variant(PPS5_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps6 { +pub enum PPS6_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps6) -> Self { + fn from(variant: PPS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type Pps6R = crate::BitReader; -impl Pps6R { +pub type PPS6_R = crate::BitReader; +impl PPS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps6 { + pub const fn variant(&self) -> PPS6_A { match self.bits { - false => Pps6::Value1, - true => Pps6::Value2, + false => PPS6_A::VALUE1, + true => PPS6_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps6::Value1 + *self == PPS6_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps6::Value2 + *self == PPS6_A::VALUE2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; -impl<'a, REG> Pps6W<'a, REG> +pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; +impl<'a, REG> PPS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps6::Value1) + self.variant(PPS6_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps6::Value2) + self.variant(PPS6_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps7 { +pub enum PPS7_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps7) -> Self { + fn from(variant: PPS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type Pps7R = crate::BitReader; -impl Pps7R { +pub type PPS7_R = crate::BitReader; +impl PPS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps7 { + pub const fn variant(&self) -> PPS7_A { match self.bits { - false => Pps7::Value1, - true => Pps7::Value2, + false => PPS7_A::VALUE1, + true => PPS7_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps7::Value1 + *self == PPS7_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps7::Value2 + *self == PPS7_A::VALUE2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; -impl<'a, REG> Pps7W<'a, REG> +pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; +impl<'a, REG> PPS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps7::Value1) + self.variant(PPS7_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps7::Value2) + self.variant(PPS7_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps8 { +pub enum PPS8_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps8) -> Self { + fn from(variant: PPS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type Pps8R = crate::BitReader; -impl Pps8R { +pub type PPS8_R = crate::BitReader; +impl PPS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps8 { + pub const fn variant(&self) -> PPS8_A { match self.bits { - false => Pps8::Value1, - true => Pps8::Value2, + false => PPS8_A::VALUE1, + true => PPS8_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps8::Value1 + *self == PPS8_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps8::Value2 + *self == PPS8_A::VALUE2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; -impl<'a, REG> Pps8W<'a, REG> +pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; +impl<'a, REG> PPS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps8::Value1) + self.variant(PPS8_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps8::Value2) + self.variant(PPS8_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps9 { +pub enum PPS9_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps9) -> Self { + fn from(variant: PPS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type Pps9R = crate::BitReader; -impl Pps9R { +pub type PPS9_R = crate::BitReader; +impl PPS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps9 { + pub const fn variant(&self) -> PPS9_A { match self.bits { - false => Pps9::Value1, - true => Pps9::Value2, + false => PPS9_A::VALUE1, + true => PPS9_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps9::Value1 + *self == PPS9_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps9::Value2 + *self == PPS9_A::VALUE2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; -impl<'a, REG> Pps9W<'a, REG> +pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; +impl<'a, REG> PPS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps9::Value1) + self.variant(PPS9_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps9::Value2) + self.variant(PPS9_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps10 { +pub enum PPS10_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps10) -> Self { + fn from(variant: PPS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type Pps10R = crate::BitReader; -impl Pps10R { +pub type PPS10_R = crate::BitReader; +impl PPS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps10 { + pub const fn variant(&self) -> PPS10_A { match self.bits { - false => Pps10::Value1, - true => Pps10::Value2, + false => PPS10_A::VALUE1, + true => PPS10_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps10::Value1 + *self == PPS10_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps10::Value2 + *self == PPS10_A::VALUE2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; -impl<'a, REG> Pps10W<'a, REG> +pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; +impl<'a, REG> PPS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps10::Value1) + self.variant(PPS10_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps10::Value2) + self.variant(PPS10_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps11 { +pub enum PPS11_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps11) -> Self { + fn from(variant: PPS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type Pps11R = crate::BitReader; -impl Pps11R { +pub type PPS11_R = crate::BitReader; +impl PPS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps11 { + pub const fn variant(&self) -> PPS11_A { match self.bits { - false => Pps11::Value1, - true => Pps11::Value2, + false => PPS11_A::VALUE1, + true => PPS11_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps11::Value1 + *self == PPS11_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps11::Value2 + *self == PPS11_A::VALUE2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; -impl<'a, REG> Pps11W<'a, REG> +pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; +impl<'a, REG> PPS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps11::Value1) + self.variant(PPS11_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps11::Value2) + self.variant(PPS11_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps12 { +pub enum PPS12_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps12) -> Self { + fn from(variant: PPS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type Pps12R = crate::BitReader; -impl Pps12R { +pub type PPS12_R = crate::BitReader; +impl PPS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps12 { + pub const fn variant(&self) -> PPS12_A { match self.bits { - false => Pps12::Value1, - true => Pps12::Value2, + false => PPS12_A::VALUE1, + true => PPS12_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps12::Value1 + *self == PPS12_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps12::Value2 + *self == PPS12_A::VALUE2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; -impl<'a, REG> Pps12W<'a, REG> +pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; +impl<'a, REG> PPS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps12::Value1) + self.variant(PPS12_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps12::Value2) + self.variant(PPS12_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps13 { +pub enum PPS13_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps13) -> Self { + fn from(variant: PPS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type Pps13R = crate::BitReader; -impl Pps13R { +pub type PPS13_R = crate::BitReader; +impl PPS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps13 { + pub const fn variant(&self) -> PPS13_A { match self.bits { - false => Pps13::Value1, - true => Pps13::Value2, + false => PPS13_A::VALUE1, + true => PPS13_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps13::Value1 + *self == PPS13_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps13::Value2 + *self == PPS13_A::VALUE2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; -impl<'a, REG> Pps13W<'a, REG> +pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; +impl<'a, REG> PPS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps13::Value1) + self.variant(PPS13_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps13::Value2) + self.variant(PPS13_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps14 { +pub enum PPS14_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps14) -> Self { + fn from(variant: PPS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type Pps14R = crate::BitReader; -impl Pps14R { +pub type PPS14_R = crate::BitReader; +impl PPS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps14 { + pub const fn variant(&self) -> PPS14_A { match self.bits { - false => Pps14::Value1, - true => Pps14::Value2, + false => PPS14_A::VALUE1, + true => PPS14_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps14::Value1 + *self == PPS14_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps14::Value2 + *self == PPS14_A::VALUE2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; -impl<'a, REG> Pps14W<'a, REG> +pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; +impl<'a, REG> PPS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps14::Value1) + self.variant(PPS14_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps14::Value2) + self.variant(PPS14_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps15 { +pub enum PPS15_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps15) -> Self { + fn from(variant: PPS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type Pps15R = crate::BitReader; -impl Pps15R { +pub type PPS15_R = crate::BitReader; +impl PPS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps15 { + pub const fn variant(&self) -> PPS15_A { match self.bits { - false => Pps15::Value1, - true => Pps15::Value2, + false => PPS15_A::VALUE1, + true => PPS15_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps15::Value1 + *self == PPS15_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps15::Value2 + *self == PPS15_A::VALUE2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; -impl<'a, REG> Pps15W<'a, REG> +pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; +impl<'a, REG> PPS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps15::Value1) + self.variant(PPS15_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps15::Value2) + self.variant(PPS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> Pps0R { - Pps0R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> PPS0_R { + PPS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> Pps1R { - Pps1R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> PPS1_R { + PPS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> Pps2R { - Pps2R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> PPS2_R { + PPS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> Pps3R { - Pps3R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> PPS3_R { + PPS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> Pps4R { - Pps4R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> PPS4_R { + PPS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> Pps5R { - Pps5R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> PPS5_R { + PPS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> Pps6R { - Pps6R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> PPS6_R { + PPS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> Pps7R { - Pps7R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> PPS7_R { + PPS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> Pps8R { - Pps8R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> PPS8_R { + PPS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> Pps9R { - Pps9R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> PPS9_R { + PPS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> Pps10R { - Pps10R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> PPS10_R { + PPS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> Pps11R { - Pps11R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> PPS11_R { + PPS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> Pps12R { - Pps12R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> PPS12_R { + PPS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> Pps13R { - Pps13R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> PPS13_R { + PPS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> Pps14R { - Pps14R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> PPS14_R { + PPS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> Pps15R { - Pps15R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> PPS15_R { + PPS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> Pps0W { - Pps0W::new(self, 0) + pub fn pps0(&mut self) -> PPS0_W { + PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> Pps1W { - Pps1W::new(self, 1) + pub fn pps1(&mut self) -> PPS1_W { + PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> Pps2W { - Pps2W::new(self, 2) + pub fn pps2(&mut self) -> PPS2_W { + PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> Pps3W { - Pps3W::new(self, 3) + pub fn pps3(&mut self) -> PPS3_W { + PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> Pps4W { - Pps4W::new(self, 4) + pub fn pps4(&mut self) -> PPS4_W { + PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> Pps5W { - Pps5W::new(self, 5) + pub fn pps5(&mut self) -> PPS5_W { + PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> Pps6W { - Pps6W::new(self, 6) + pub fn pps6(&mut self) -> PPS6_W { + PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> Pps7W { - Pps7W::new(self, 7) + pub fn pps7(&mut self) -> PPS7_W { + PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> Pps8W { - Pps8W::new(self, 8) + pub fn pps8(&mut self) -> PPS8_W { + PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> Pps9W { - Pps9W::new(self, 9) + pub fn pps9(&mut self) -> PPS9_W { + PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> Pps10W { - Pps10W::new(self, 10) + pub fn pps10(&mut self) -> PPS10_W { + PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> Pps11W { - Pps11W::new(self, 11) + pub fn pps11(&mut self) -> PPS11_W { + PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> Pps12W { - Pps12W::new(self, 12) + pub fn pps12(&mut self) -> PPS12_W { + PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> Pps13W { - Pps13W::new(self, 13) + pub fn pps13(&mut self) -> PPS13_W { + PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> Pps14W { - Pps14W::new(self, 14) + pub fn pps14(&mut self) -> PPS14_W { + PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> Pps15W { - Pps15W::new(self, 15) + pub fn pps15(&mut self) -> PPS15_W { + PPS15_W::new(self, 15) } } #[doc = "Port 2 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PpsSpec; -impl crate::RegisterSpec for PpsSpec { +pub struct PPS_SPEC; +impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PpsSpec {} +impl crate::Readable for PPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PpsSpec { +impl crate::Writable for PPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PpsSpec { +impl crate::Resettable for PPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3.rs b/src/port3.rs index f4c9d6dd..06833ecf 100644 --- a/src/port3.rs +++ b/src/port3.rs @@ -1,107 +1,99 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - out: Out, - omr: Omr, + out: OUT, + omr: OMR, _reserved2: [u8; 0x08], - iocr0: Iocr0, + iocr0: IOCR0, _reserved3: [u8; 0x10], - in_: In, + in_: IN, _reserved4: [u8; 0x18], - pdr0: Pdr0, + pdr0: PDR0, _reserved5: [u8; 0x1c], - pdisc: Pdisc, + pdisc: PDISC, _reserved6: [u8; 0x0c], - pps: Pps, - hwsel: Hwsel, + pps: PPS, + hwsel: HWSEL, } impl RegisterBlock { #[doc = "0x00 - Port 3 Output Register"] #[inline(always)] - pub const fn out(&self) -> &Out { + pub const fn out(&self) -> &OUT { &self.out } #[doc = "0x04 - Port 3 Output Modification Register"] #[inline(always)] - pub const fn omr(&self) -> &Omr { + pub const fn omr(&self) -> &OMR { &self.omr } #[doc = "0x10 - Port 3 Input/Output Control Register 0"] #[inline(always)] - pub const fn iocr0(&self) -> &Iocr0 { + pub const fn iocr0(&self) -> &IOCR0 { &self.iocr0 } #[doc = "0x24 - Port 3 Input Register"] #[inline(always)] - pub const fn in_(&self) -> &In { + pub const fn in_(&self) -> &IN { &self.in_ } #[doc = "0x40 - Port 3 Pad Driver Mode 0 Register"] #[inline(always)] - pub const fn pdr0(&self) -> &Pdr0 { + pub const fn pdr0(&self) -> &PDR0 { &self.pdr0 } #[doc = "0x60 - Port 3 Pin Function Decision Control Register"] #[inline(always)] - pub const fn pdisc(&self) -> &Pdisc { + pub const fn pdisc(&self) -> &PDISC { &self.pdisc } #[doc = "0x70 - Port 3 Pin Power Save Register"] #[inline(always)] - pub const fn pps(&self) -> &Pps { + pub const fn pps(&self) -> &PPS { &self.pps } #[doc = "0x74 - Port 3 Pin Hardware Select Register"] #[inline(always)] - pub const fn hwsel(&self) -> &Hwsel { + pub const fn hwsel(&self) -> &HWSEL { &self.hwsel } } #[doc = "OUT (rw) register accessor: Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`] module"] -#[doc(alias = "OUT")] -pub type Out = crate::Reg; +pub type OUT = crate::Reg; #[doc = "Port 3 Output Register"] pub mod out; #[doc = "OMR (w) register accessor: Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@omr`] module"] -#[doc(alias = "OMR")] -pub type Omr = crate::Reg; +pub type OMR = crate::Reg; #[doc = "Port 3 Output Modification Register"] pub mod omr; #[doc = "IOCR0 (rw) register accessor: Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iocr0`] module"] -#[doc(alias = "IOCR0")] -pub type Iocr0 = crate::Reg; +pub type IOCR0 = crate::Reg; #[doc = "Port 3 Input/Output Control Register 0"] pub mod iocr0; #[doc = "IN (r) register accessor: Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Port 3 Input Register"] pub mod in_; #[doc = "PDR0 (rw) register accessor: Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdr0`] module"] -#[doc(alias = "PDR0")] -pub type Pdr0 = crate::Reg; +pub type PDR0 = crate::Reg; #[doc = "Port 3 Pad Driver Mode 0 Register"] pub mod pdr0; #[doc = "PDISC (r) register accessor: Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdisc`] module"] -#[doc(alias = "PDISC")] -pub type Pdisc = crate::Reg; +pub type PDISC = crate::Reg; #[doc = "Port 3 Pin Function Decision Control Register"] pub mod pdisc; #[doc = "PPS (rw) register accessor: Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pps`] module"] -#[doc(alias = "PPS")] -pub type Pps = crate::Reg; +pub type PPS = crate::Reg; #[doc = "Port 3 Pin Power Save Register"] pub mod pps; #[doc = "HWSEL (rw) register accessor: Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hwsel`] module"] -#[doc(alias = "HWSEL")] -pub type Hwsel = crate::Reg; +pub type HWSEL = crate::Reg; #[doc = "Port 3 Pin Hardware Select Register"] pub mod hwsel; diff --git a/src/port3/hwsel.rs b/src/port3/hwsel.rs index 1515efda..0360b926 100644 --- a/src/port3/hwsel.rs +++ b/src/port3/hwsel.rs @@ -1,60 +1,60 @@ #[doc = "Register `HWSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HWSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Hardware Select Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw0 { +pub enum HW0_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw0) -> Self { + fn from(variant: HW0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw0 { +impl crate::FieldSpec for HW0_A { type Ux = u8; } -impl crate::IsEnum for Hw0 {} +impl crate::IsEnum for HW0_A {} #[doc = "Field `HW0` reader - Port n Pin Hardware Select Bit 0"] -pub type Hw0R = crate::FieldReader; -impl Hw0R { +pub type HW0_R = crate::FieldReader; +impl HW0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw0::Value1), - 1 => Some(Hw0::Value2), - 2 => Some(Hw0::Value3), + 0 => Some(HW0_A::VALUE1), + 1 => Some(HW0_A::VALUE2), + 2 => Some(HW0_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw0::Value1 + *self == HW0_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw0::Value2 + *self == HW0_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw0::Value3 + *self == HW0_A::VALUE3 } } #[doc = "Field `HW0` writer - Port n Pin Hardware Select Bit 0"] -pub type Hw0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw0>; -impl<'a, REG> Hw0W<'a, REG> +pub type HW0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW0_A>; +impl<'a, REG> HW0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw0::Value1) + self.variant(HW0_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw0::Value2) + self.variant(HW0_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw0::Value3) + self.variant(HW0_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw1 { +pub enum HW1_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw1) -> Self { + fn from(variant: HW1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw1 { +impl crate::FieldSpec for HW1_A { type Ux = u8; } -impl crate::IsEnum for Hw1 {} +impl crate::IsEnum for HW1_A {} #[doc = "Field `HW1` reader - Port n Pin Hardware Select Bit 1"] -pub type Hw1R = crate::FieldReader; -impl Hw1R { +pub type HW1_R = crate::FieldReader; +impl HW1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw1::Value1), - 1 => Some(Hw1::Value2), - 2 => Some(Hw1::Value3), + 0 => Some(HW1_A::VALUE1), + 1 => Some(HW1_A::VALUE2), + 2 => Some(HW1_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw1::Value1 + *self == HW1_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw1::Value2 + *self == HW1_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw1::Value3 + *self == HW1_A::VALUE3 } } #[doc = "Field `HW1` writer - Port n Pin Hardware Select Bit 1"] -pub type Hw1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw1>; -impl<'a, REG> Hw1W<'a, REG> +pub type HW1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW1_A>; +impl<'a, REG> HW1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,72 +135,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw1::Value1) + self.variant(HW1_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw1::Value2) + self.variant(HW1_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw1::Value3) + self.variant(HW1_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw2 { +pub enum HW2_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw2) -> Self { + fn from(variant: HW2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw2 { +impl crate::FieldSpec for HW2_A { type Ux = u8; } -impl crate::IsEnum for Hw2 {} +impl crate::IsEnum for HW2_A {} #[doc = "Field `HW2` reader - Port n Pin Hardware Select Bit 2"] -pub type Hw2R = crate::FieldReader; -impl Hw2R { +pub type HW2_R = crate::FieldReader; +impl HW2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw2::Value1), - 1 => Some(Hw2::Value2), - 2 => Some(Hw2::Value3), + 0 => Some(HW2_A::VALUE1), + 1 => Some(HW2_A::VALUE2), + 2 => Some(HW2_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw2::Value1 + *self == HW2_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw2::Value2 + *self == HW2_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw2::Value3 + *self == HW2_A::VALUE3 } } #[doc = "Field `HW2` writer - Port n Pin Hardware Select Bit 2"] -pub type Hw2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw2>; -impl<'a, REG> Hw2W<'a, REG> +pub type HW2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW2_A>; +impl<'a, REG> HW2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -208,72 +208,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw2::Value1) + self.variant(HW2_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw2::Value2) + self.variant(HW2_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw2::Value3) + self.variant(HW2_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw3 { +pub enum HW3_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw3) -> Self { + fn from(variant: HW3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw3 { +impl crate::FieldSpec for HW3_A { type Ux = u8; } -impl crate::IsEnum for Hw3 {} +impl crate::IsEnum for HW3_A {} #[doc = "Field `HW3` reader - Port n Pin Hardware Select Bit 3"] -pub type Hw3R = crate::FieldReader; -impl Hw3R { +pub type HW3_R = crate::FieldReader; +impl HW3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw3::Value1), - 1 => Some(Hw3::Value2), - 2 => Some(Hw3::Value3), + 0 => Some(HW3_A::VALUE1), + 1 => Some(HW3_A::VALUE2), + 2 => Some(HW3_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw3::Value1 + *self == HW3_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw3::Value2 + *self == HW3_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw3::Value3 + *self == HW3_A::VALUE3 } } #[doc = "Field `HW3` writer - Port n Pin Hardware Select Bit 3"] -pub type Hw3W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw3>; -impl<'a, REG> Hw3W<'a, REG> +pub type HW3_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW3_A>; +impl<'a, REG> HW3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -281,72 +281,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw3::Value1) + self.variant(HW3_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw3::Value2) + self.variant(HW3_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw3::Value3) + self.variant(HW3_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw4 { +pub enum HW4_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw4) -> Self { + fn from(variant: HW4_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw4 { +impl crate::FieldSpec for HW4_A { type Ux = u8; } -impl crate::IsEnum for Hw4 {} +impl crate::IsEnum for HW4_A {} #[doc = "Field `HW4` reader - Port n Pin Hardware Select Bit 4"] -pub type Hw4R = crate::FieldReader; -impl Hw4R { +pub type HW4_R = crate::FieldReader; +impl HW4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw4::Value1), - 1 => Some(Hw4::Value2), - 2 => Some(Hw4::Value3), + 0 => Some(HW4_A::VALUE1), + 1 => Some(HW4_A::VALUE2), + 2 => Some(HW4_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw4::Value1 + *self == HW4_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw4::Value2 + *self == HW4_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw4::Value3 + *self == HW4_A::VALUE3 } } #[doc = "Field `HW4` writer - Port n Pin Hardware Select Bit 4"] -pub type Hw4W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw4>; -impl<'a, REG> Hw4W<'a, REG> +pub type HW4_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW4_A>; +impl<'a, REG> HW4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -354,72 +354,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw4::Value1) + self.variant(HW4_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw4::Value2) + self.variant(HW4_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw4::Value3) + self.variant(HW4_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw5 { +pub enum HW5_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw5) -> Self { + fn from(variant: HW5_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw5 { +impl crate::FieldSpec for HW5_A { type Ux = u8; } -impl crate::IsEnum for Hw5 {} +impl crate::IsEnum for HW5_A {} #[doc = "Field `HW5` reader - Port n Pin Hardware Select Bit 5"] -pub type Hw5R = crate::FieldReader; -impl Hw5R { +pub type HW5_R = crate::FieldReader; +impl HW5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw5::Value1), - 1 => Some(Hw5::Value2), - 2 => Some(Hw5::Value3), + 0 => Some(HW5_A::VALUE1), + 1 => Some(HW5_A::VALUE2), + 2 => Some(HW5_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw5::Value1 + *self == HW5_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw5::Value2 + *self == HW5_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw5::Value3 + *self == HW5_A::VALUE3 } } #[doc = "Field `HW5` writer - Port n Pin Hardware Select Bit 5"] -pub type Hw5W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw5>; -impl<'a, REG> Hw5W<'a, REG> +pub type HW5_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW5_A>; +impl<'a, REG> HW5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -427,72 +427,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw5::Value1) + self.variant(HW5_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw5::Value2) + self.variant(HW5_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw5::Value3) + self.variant(HW5_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw6 { +pub enum HW6_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw6) -> Self { + fn from(variant: HW6_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw6 { +impl crate::FieldSpec for HW6_A { type Ux = u8; } -impl crate::IsEnum for Hw6 {} +impl crate::IsEnum for HW6_A {} #[doc = "Field `HW6` reader - Port n Pin Hardware Select Bit 6"] -pub type Hw6R = crate::FieldReader; -impl Hw6R { +pub type HW6_R = crate::FieldReader; +impl HW6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw6::Value1), - 1 => Some(Hw6::Value2), - 2 => Some(Hw6::Value3), + 0 => Some(HW6_A::VALUE1), + 1 => Some(HW6_A::VALUE2), + 2 => Some(HW6_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw6::Value1 + *self == HW6_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw6::Value2 + *self == HW6_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw6::Value3 + *self == HW6_A::VALUE3 } } #[doc = "Field `HW6` writer - Port n Pin Hardware Select Bit 6"] -pub type Hw6W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw6>; -impl<'a, REG> Hw6W<'a, REG> +pub type HW6_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW6_A>; +impl<'a, REG> HW6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,72 +500,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw6::Value1) + self.variant(HW6_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw6::Value2) + self.variant(HW6_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw6::Value3) + self.variant(HW6_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw7 { +pub enum HW7_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw7) -> Self { + fn from(variant: HW7_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw7 { +impl crate::FieldSpec for HW7_A { type Ux = u8; } -impl crate::IsEnum for Hw7 {} +impl crate::IsEnum for HW7_A {} #[doc = "Field `HW7` reader - Port n Pin Hardware Select Bit 7"] -pub type Hw7R = crate::FieldReader; -impl Hw7R { +pub type HW7_R = crate::FieldReader; +impl HW7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw7::Value1), - 1 => Some(Hw7::Value2), - 2 => Some(Hw7::Value3), + 0 => Some(HW7_A::VALUE1), + 1 => Some(HW7_A::VALUE2), + 2 => Some(HW7_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw7::Value1 + *self == HW7_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw7::Value2 + *self == HW7_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw7::Value3 + *self == HW7_A::VALUE3 } } #[doc = "Field `HW7` writer - Port n Pin Hardware Select Bit 7"] -pub type Hw7W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw7>; -impl<'a, REG> Hw7W<'a, REG> +pub type HW7_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW7_A>; +impl<'a, REG> HW7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -573,72 +573,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw7::Value1) + self.variant(HW7_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw7::Value2) + self.variant(HW7_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw7::Value3) + self.variant(HW7_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw8 { +pub enum HW8_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw8) -> Self { + fn from(variant: HW8_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw8 { +impl crate::FieldSpec for HW8_A { type Ux = u8; } -impl crate::IsEnum for Hw8 {} +impl crate::IsEnum for HW8_A {} #[doc = "Field `HW8` reader - Port n Pin Hardware Select Bit 8"] -pub type Hw8R = crate::FieldReader; -impl Hw8R { +pub type HW8_R = crate::FieldReader; +impl HW8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw8::Value1), - 1 => Some(Hw8::Value2), - 2 => Some(Hw8::Value3), + 0 => Some(HW8_A::VALUE1), + 1 => Some(HW8_A::VALUE2), + 2 => Some(HW8_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw8::Value1 + *self == HW8_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw8::Value2 + *self == HW8_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw8::Value3 + *self == HW8_A::VALUE3 } } #[doc = "Field `HW8` writer - Port n Pin Hardware Select Bit 8"] -pub type Hw8W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw8>; -impl<'a, REG> Hw8W<'a, REG> +pub type HW8_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW8_A>; +impl<'a, REG> HW8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -646,72 +646,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw8::Value1) + self.variant(HW8_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw8::Value2) + self.variant(HW8_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw8::Value3) + self.variant(HW8_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw9 { +pub enum HW9_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw9) -> Self { + fn from(variant: HW9_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw9 { +impl crate::FieldSpec for HW9_A { type Ux = u8; } -impl crate::IsEnum for Hw9 {} +impl crate::IsEnum for HW9_A {} #[doc = "Field `HW9` reader - Port n Pin Hardware Select Bit 9"] -pub type Hw9R = crate::FieldReader; -impl Hw9R { +pub type HW9_R = crate::FieldReader; +impl HW9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw9::Value1), - 1 => Some(Hw9::Value2), - 2 => Some(Hw9::Value3), + 0 => Some(HW9_A::VALUE1), + 1 => Some(HW9_A::VALUE2), + 2 => Some(HW9_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw9::Value1 + *self == HW9_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw9::Value2 + *self == HW9_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw9::Value3 + *self == HW9_A::VALUE3 } } #[doc = "Field `HW9` writer - Port n Pin Hardware Select Bit 9"] -pub type Hw9W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw9>; -impl<'a, REG> Hw9W<'a, REG> +pub type HW9_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW9_A>; +impl<'a, REG> HW9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -719,72 +719,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw9::Value1) + self.variant(HW9_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw9::Value2) + self.variant(HW9_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw9::Value3) + self.variant(HW9_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw10 { +pub enum HW10_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw10) -> Self { + fn from(variant: HW10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw10 { +impl crate::FieldSpec for HW10_A { type Ux = u8; } -impl crate::IsEnum for Hw10 {} +impl crate::IsEnum for HW10_A {} #[doc = "Field `HW10` reader - Port n Pin Hardware Select Bit 10"] -pub type Hw10R = crate::FieldReader; -impl Hw10R { +pub type HW10_R = crate::FieldReader; +impl HW10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw10::Value1), - 1 => Some(Hw10::Value2), - 2 => Some(Hw10::Value3), + 0 => Some(HW10_A::VALUE1), + 1 => Some(HW10_A::VALUE2), + 2 => Some(HW10_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw10::Value1 + *self == HW10_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw10::Value2 + *self == HW10_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw10::Value3 + *self == HW10_A::VALUE3 } } #[doc = "Field `HW10` writer - Port n Pin Hardware Select Bit 10"] -pub type Hw10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw10>; -impl<'a, REG> Hw10W<'a, REG> +pub type HW10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW10_A>; +impl<'a, REG> HW10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -792,72 +792,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw10::Value1) + self.variant(HW10_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw10::Value2) + self.variant(HW10_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw10::Value3) + self.variant(HW10_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw11 { +pub enum HW11_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw11) -> Self { + fn from(variant: HW11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw11 { +impl crate::FieldSpec for HW11_A { type Ux = u8; } -impl crate::IsEnum for Hw11 {} +impl crate::IsEnum for HW11_A {} #[doc = "Field `HW11` reader - Port n Pin Hardware Select Bit 11"] -pub type Hw11R = crate::FieldReader; -impl Hw11R { +pub type HW11_R = crate::FieldReader; +impl HW11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw11::Value1), - 1 => Some(Hw11::Value2), - 2 => Some(Hw11::Value3), + 0 => Some(HW11_A::VALUE1), + 1 => Some(HW11_A::VALUE2), + 2 => Some(HW11_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw11::Value1 + *self == HW11_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw11::Value2 + *self == HW11_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw11::Value3 + *self == HW11_A::VALUE3 } } #[doc = "Field `HW11` writer - Port n Pin Hardware Select Bit 11"] -pub type Hw11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw11>; -impl<'a, REG> Hw11W<'a, REG> +pub type HW11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW11_A>; +impl<'a, REG> HW11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -865,72 +865,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw11::Value1) + self.variant(HW11_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw11::Value2) + self.variant(HW11_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw11::Value3) + self.variant(HW11_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw12 { +pub enum HW12_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw12) -> Self { + fn from(variant: HW12_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw12 { +impl crate::FieldSpec for HW12_A { type Ux = u8; } -impl crate::IsEnum for Hw12 {} +impl crate::IsEnum for HW12_A {} #[doc = "Field `HW12` reader - Port n Pin Hardware Select Bit 12"] -pub type Hw12R = crate::FieldReader; -impl Hw12R { +pub type HW12_R = crate::FieldReader; +impl HW12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw12::Value1), - 1 => Some(Hw12::Value2), - 2 => Some(Hw12::Value3), + 0 => Some(HW12_A::VALUE1), + 1 => Some(HW12_A::VALUE2), + 2 => Some(HW12_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw12::Value1 + *self == HW12_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw12::Value2 + *self == HW12_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw12::Value3 + *self == HW12_A::VALUE3 } } #[doc = "Field `HW12` writer - Port n Pin Hardware Select Bit 12"] -pub type Hw12W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw12>; -impl<'a, REG> Hw12W<'a, REG> +pub type HW12_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW12_A>; +impl<'a, REG> HW12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -938,72 +938,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw12::Value1) + self.variant(HW12_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw12::Value2) + self.variant(HW12_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw12::Value3) + self.variant(HW12_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw13 { +pub enum HW13_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw13) -> Self { + fn from(variant: HW13_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw13 { +impl crate::FieldSpec for HW13_A { type Ux = u8; } -impl crate::IsEnum for Hw13 {} +impl crate::IsEnum for HW13_A {} #[doc = "Field `HW13` reader - Port n Pin Hardware Select Bit 13"] -pub type Hw13R = crate::FieldReader; -impl Hw13R { +pub type HW13_R = crate::FieldReader; +impl HW13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw13::Value1), - 1 => Some(Hw13::Value2), - 2 => Some(Hw13::Value3), + 0 => Some(HW13_A::VALUE1), + 1 => Some(HW13_A::VALUE2), + 2 => Some(HW13_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw13::Value1 + *self == HW13_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw13::Value2 + *self == HW13_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw13::Value3 + *self == HW13_A::VALUE3 } } #[doc = "Field `HW13` writer - Port n Pin Hardware Select Bit 13"] -pub type Hw13W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw13>; -impl<'a, REG> Hw13W<'a, REG> +pub type HW13_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW13_A>; +impl<'a, REG> HW13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1011,72 +1011,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw13::Value1) + self.variant(HW13_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw13::Value2) + self.variant(HW13_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw13::Value3) + self.variant(HW13_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw14 { +pub enum HW14_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw14) -> Self { + fn from(variant: HW14_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw14 { +impl crate::FieldSpec for HW14_A { type Ux = u8; } -impl crate::IsEnum for Hw14 {} +impl crate::IsEnum for HW14_A {} #[doc = "Field `HW14` reader - Port n Pin Hardware Select Bit 14"] -pub type Hw14R = crate::FieldReader; -impl Hw14R { +pub type HW14_R = crate::FieldReader; +impl HW14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw14::Value1), - 1 => Some(Hw14::Value2), - 2 => Some(Hw14::Value3), + 0 => Some(HW14_A::VALUE1), + 1 => Some(HW14_A::VALUE2), + 2 => Some(HW14_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw14::Value1 + *self == HW14_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw14::Value2 + *self == HW14_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw14::Value3 + *self == HW14_A::VALUE3 } } #[doc = "Field `HW14` writer - Port n Pin Hardware Select Bit 14"] -pub type Hw14W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw14>; -impl<'a, REG> Hw14W<'a, REG> +pub type HW14_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW14_A>; +impl<'a, REG> HW14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1084,72 +1084,72 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw14::Value1) + self.variant(HW14_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw14::Value2) + self.variant(HW14_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw14::Value3) + self.variant(HW14_A::VALUE3) } } #[doc = "Port n Pin Hardware Select Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hw15 { +pub enum HW15_A { #[doc = "0: Software control only."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HW0 control path can override the software configuration."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: HW1 control path can override the software configuration."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hw15) -> Self { + fn from(variant: HW15_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hw15 { +impl crate::FieldSpec for HW15_A { type Ux = u8; } -impl crate::IsEnum for Hw15 {} +impl crate::IsEnum for HW15_A {} #[doc = "Field `HW15` reader - Port n Pin Hardware Select Bit 15"] -pub type Hw15R = crate::FieldReader; -impl Hw15R { +pub type HW15_R = crate::FieldReader; +impl HW15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hw15::Value1), - 1 => Some(Hw15::Value2), - 2 => Some(Hw15::Value3), + 0 => Some(HW15_A::VALUE1), + 1 => Some(HW15_A::VALUE2), + 2 => Some(HW15_A::VALUE3), _ => None, } } #[doc = "Software control only."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hw15::Value1 + *self == HW15_A::VALUE1 } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hw15::Value2 + *self == HW15_A::VALUE2 } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hw15::Value3 + *self == HW15_A::VALUE3 } } #[doc = "Field `HW15` writer - Port n Pin Hardware Select Bit 15"] -pub type Hw15W<'a, REG> = crate::FieldWriter<'a, REG, 2, Hw15>; -impl<'a, REG> Hw15W<'a, REG> +pub type HW15_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HW15_A>; +impl<'a, REG> HW15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1157,213 +1157,213 @@ where #[doc = "Software control only."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hw15::Value1) + self.variant(HW15_A::VALUE1) } #[doc = "HW0 control path can override the software configuration."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hw15::Value2) + self.variant(HW15_A::VALUE2) } #[doc = "HW1 control path can override the software configuration."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hw15::Value3) + self.variant(HW15_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - pub fn hw0(&self) -> Hw0R { - Hw0R::new((self.bits & 3) as u8) + pub fn hw0(&self) -> HW0_R { + HW0_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - pub fn hw1(&self) -> Hw1R { - Hw1R::new(((self.bits >> 2) & 3) as u8) + pub fn hw1(&self) -> HW1_R { + HW1_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - pub fn hw2(&self) -> Hw2R { - Hw2R::new(((self.bits >> 4) & 3) as u8) + pub fn hw2(&self) -> HW2_R { + HW2_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - pub fn hw3(&self) -> Hw3R { - Hw3R::new(((self.bits >> 6) & 3) as u8) + pub fn hw3(&self) -> HW3_R { + HW3_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - pub fn hw4(&self) -> Hw4R { - Hw4R::new(((self.bits >> 8) & 3) as u8) + pub fn hw4(&self) -> HW4_R { + HW4_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - pub fn hw5(&self) -> Hw5R { - Hw5R::new(((self.bits >> 10) & 3) as u8) + pub fn hw5(&self) -> HW5_R { + HW5_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - pub fn hw6(&self) -> Hw6R { - Hw6R::new(((self.bits >> 12) & 3) as u8) + pub fn hw6(&self) -> HW6_R { + HW6_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - pub fn hw7(&self) -> Hw7R { - Hw7R::new(((self.bits >> 14) & 3) as u8) + pub fn hw7(&self) -> HW7_R { + HW7_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - pub fn hw8(&self) -> Hw8R { - Hw8R::new(((self.bits >> 16) & 3) as u8) + pub fn hw8(&self) -> HW8_R { + HW8_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - pub fn hw9(&self) -> Hw9R { - Hw9R::new(((self.bits >> 18) & 3) as u8) + pub fn hw9(&self) -> HW9_R { + HW9_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - pub fn hw10(&self) -> Hw10R { - Hw10R::new(((self.bits >> 20) & 3) as u8) + pub fn hw10(&self) -> HW10_R { + HW10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - pub fn hw11(&self) -> Hw11R { - Hw11R::new(((self.bits >> 22) & 3) as u8) + pub fn hw11(&self) -> HW11_R { + HW11_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - pub fn hw12(&self) -> Hw12R { - Hw12R::new(((self.bits >> 24) & 3) as u8) + pub fn hw12(&self) -> HW12_R { + HW12_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - pub fn hw13(&self) -> Hw13R { - Hw13R::new(((self.bits >> 26) & 3) as u8) + pub fn hw13(&self) -> HW13_R { + HW13_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - pub fn hw14(&self) -> Hw14R { - Hw14R::new(((self.bits >> 28) & 3) as u8) + pub fn hw14(&self) -> HW14_R { + HW14_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - pub fn hw15(&self) -> Hw15R { - Hw15R::new(((self.bits >> 30) & 3) as u8) + pub fn hw15(&self) -> HW15_R { + HW15_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] #[must_use] - pub fn hw0(&mut self) -> Hw0W { - Hw0W::new(self, 0) + pub fn hw0(&mut self) -> HW0_W { + HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] #[must_use] - pub fn hw1(&mut self) -> Hw1W { - Hw1W::new(self, 2) + pub fn hw1(&mut self) -> HW1_W { + HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] #[must_use] - pub fn hw2(&mut self) -> Hw2W { - Hw2W::new(self, 4) + pub fn hw2(&mut self) -> HW2_W { + HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] #[must_use] - pub fn hw3(&mut self) -> Hw3W { - Hw3W::new(self, 6) + pub fn hw3(&mut self) -> HW3_W { + HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] #[must_use] - pub fn hw4(&mut self) -> Hw4W { - Hw4W::new(self, 8) + pub fn hw4(&mut self) -> HW4_W { + HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] #[must_use] - pub fn hw5(&mut self) -> Hw5W { - Hw5W::new(self, 10) + pub fn hw5(&mut self) -> HW5_W { + HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] #[must_use] - pub fn hw6(&mut self) -> Hw6W { - Hw6W::new(self, 12) + pub fn hw6(&mut self) -> HW6_W { + HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] #[must_use] - pub fn hw7(&mut self) -> Hw7W { - Hw7W::new(self, 14) + pub fn hw7(&mut self) -> HW7_W { + HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] #[must_use] - pub fn hw8(&mut self) -> Hw8W { - Hw8W::new(self, 16) + pub fn hw8(&mut self) -> HW8_W { + HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] #[must_use] - pub fn hw9(&mut self) -> Hw9W { - Hw9W::new(self, 18) + pub fn hw9(&mut self) -> HW9_W { + HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] #[must_use] - pub fn hw10(&mut self) -> Hw10W { - Hw10W::new(self, 20) + pub fn hw10(&mut self) -> HW10_W { + HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] #[must_use] - pub fn hw11(&mut self) -> Hw11W { - Hw11W::new(self, 22) + pub fn hw11(&mut self) -> HW11_W { + HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] #[must_use] - pub fn hw12(&mut self) -> Hw12W { - Hw12W::new(self, 24) + pub fn hw12(&mut self) -> HW12_W { + HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] #[must_use] - pub fn hw13(&mut self) -> Hw13W { - Hw13W::new(self, 26) + pub fn hw13(&mut self) -> HW13_W { + HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] #[must_use] - pub fn hw14(&mut self) -> Hw14W { - Hw14W::new(self, 28) + pub fn hw14(&mut self) -> HW14_W { + HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] #[must_use] - pub fn hw15(&mut self) -> Hw15W { - Hw15W::new(self, 30) + pub fn hw15(&mut self) -> HW15_W { + HW15_W::new(self, 30) } } #[doc = "Port 3 Pin Hardware Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hwsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hwsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HwselSpec; -impl crate::RegisterSpec for HwselSpec { +pub struct HWSEL_SPEC; +impl crate::RegisterSpec for HWSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hwsel::R`](R) reader structure"] -impl crate::Readable for HwselSpec {} +impl crate::Readable for HWSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`hwsel::W`](W) writer structure"] -impl crate::Writable for HwselSpec { +impl crate::Writable for HWSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HWSEL to value 0"] -impl crate::Resettable for HwselSpec { +impl crate::Resettable for HWSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/in_.rs b/src/port3/in_.rs index 5fd8a237..9618e8f6 100644 --- a/src/port3/in_.rs +++ b/src/port3/in_.rs @@ -1,671 +1,671 @@ #[doc = "Register `IN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Port n Input Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Input Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Port n Input Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Input Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Port n Input Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Input Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Port n Input Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Input Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Port n Input Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Input Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Port n Input Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Input Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Port n Input Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Input Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Port n Input Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Input Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Port n Input Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Input Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Port n Input Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Input Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Port n Input Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Input Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Port n Input Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Input Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Port n Input Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Input Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Port n Input Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Input Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Port n Input Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Input Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Port n Input Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The input level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Input Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The input level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The input level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Port n Input Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Input Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Input Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Input Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Input Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Input Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Input Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Input Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Input Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Input Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Input Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Input Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Input Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Input Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Input Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Input Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 3 Input Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`in_::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`in_::R`](R) reader structure"] -impl crate::Readable for InSpec {} +impl crate::Readable for IN_SPEC {} #[doc = "`reset()` method sets IN to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/iocr0.rs b/src/port3/iocr0.rs index c2392b5d..614a4a11 100644 --- a/src/port3/iocr0.rs +++ b/src/port3/iocr0.rs @@ -1,180 +1,180 @@ #[doc = "Register `IOCR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `IOCR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc0 { +pub enum PC0_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc0) -> Self { + fn from(variant: PC0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc0 { +impl crate::FieldSpec for PC0_A { type Ux = u8; } -impl crate::IsEnum for Pc0 {} +impl crate::IsEnum for PC0_A {} #[doc = "Field `PC0` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc0R = crate::FieldReader; -impl Pc0R { +pub type PC0_R = crate::FieldReader; +impl PC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc0::Value1), - 1 => Some(Pc0::Value2), - 2 => Some(Pc0::Value3), - 3 => Some(Pc0::Value4), - 4 => Some(Pc0::Value5), - 5 => Some(Pc0::Value6), - 6 => Some(Pc0::Value7), - 7 => Some(Pc0::Value8), - 16 => Some(Pc0::Value9), - 17 => Some(Pc0::Value10), - 18 => Some(Pc0::Value11), - 19 => Some(Pc0::Value12), - 20 => Some(Pc0::Value13), - 24 => Some(Pc0::Value14), - 25 => Some(Pc0::Value15), - 26 => Some(Pc0::Value16), - 27 => Some(Pc0::Value17), - 28 => Some(Pc0::Value18), + 0 => Some(PC0_A::VALUE1), + 1 => Some(PC0_A::VALUE2), + 2 => Some(PC0_A::VALUE3), + 3 => Some(PC0_A::VALUE4), + 4 => Some(PC0_A::VALUE5), + 5 => Some(PC0_A::VALUE6), + 6 => Some(PC0_A::VALUE7), + 7 => Some(PC0_A::VALUE8), + 16 => Some(PC0_A::VALUE9), + 17 => Some(PC0_A::VALUE10), + 18 => Some(PC0_A::VALUE11), + 19 => Some(PC0_A::VALUE12), + 20 => Some(PC0_A::VALUE13), + 24 => Some(PC0_A::VALUE14), + 25 => Some(PC0_A::VALUE15), + 26 => Some(PC0_A::VALUE16), + 27 => Some(PC0_A::VALUE17), + 28 => Some(PC0_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc0::Value1 + *self == PC0_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc0::Value2 + *self == PC0_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc0::Value3 + *self == PC0_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc0::Value4 + *self == PC0_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc0::Value5 + *self == PC0_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc0::Value6 + *self == PC0_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc0::Value7 + *self == PC0_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc0::Value8 + *self == PC0_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc0::Value9 + *self == PC0_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc0::Value10 + *self == PC0_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc0::Value11 + *self == PC0_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc0::Value12 + *self == PC0_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc0::Value13 + *self == PC0_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc0::Value14 + *self == PC0_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc0::Value15 + *self == PC0_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc0::Value16 + *self == PC0_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc0::Value17 + *self == PC0_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc0::Value18 + *self == PC0_A::VALUE18 } } #[doc = "Field `PC0` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc0W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc0>; -impl<'a, REG> Pc0W<'a, REG> +pub type PC0_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC0_A>; +impl<'a, REG> PC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -182,267 +182,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc0::Value1) + self.variant(PC0_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc0::Value2) + self.variant(PC0_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc0::Value3) + self.variant(PC0_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc0::Value4) + self.variant(PC0_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc0::Value5) + self.variant(PC0_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc0::Value6) + self.variant(PC0_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc0::Value7) + self.variant(PC0_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc0::Value8) + self.variant(PC0_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc0::Value9) + self.variant(PC0_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc0::Value10) + self.variant(PC0_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc0::Value11) + self.variant(PC0_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc0::Value12) + self.variant(PC0_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc0::Value13) + self.variant(PC0_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc0::Value14) + self.variant(PC0_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc0::Value15) + self.variant(PC0_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc0::Value16) + self.variant(PC0_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc0::Value17) + self.variant(PC0_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc0::Value18) + self.variant(PC0_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc1 { +pub enum PC1_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc1) -> Self { + fn from(variant: PC1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc1 { +impl crate::FieldSpec for PC1_A { type Ux = u8; } -impl crate::IsEnum for Pc1 {} +impl crate::IsEnum for PC1_A {} #[doc = "Field `PC1` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc1R = crate::FieldReader; -impl Pc1R { +pub type PC1_R = crate::FieldReader; +impl PC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc1::Value1), - 1 => Some(Pc1::Value2), - 2 => Some(Pc1::Value3), - 3 => Some(Pc1::Value4), - 4 => Some(Pc1::Value5), - 5 => Some(Pc1::Value6), - 6 => Some(Pc1::Value7), - 7 => Some(Pc1::Value8), - 16 => Some(Pc1::Value9), - 17 => Some(Pc1::Value10), - 18 => Some(Pc1::Value11), - 19 => Some(Pc1::Value12), - 20 => Some(Pc1::Value13), - 24 => Some(Pc1::Value14), - 25 => Some(Pc1::Value15), - 26 => Some(Pc1::Value16), - 27 => Some(Pc1::Value17), - 28 => Some(Pc1::Value18), + 0 => Some(PC1_A::VALUE1), + 1 => Some(PC1_A::VALUE2), + 2 => Some(PC1_A::VALUE3), + 3 => Some(PC1_A::VALUE4), + 4 => Some(PC1_A::VALUE5), + 5 => Some(PC1_A::VALUE6), + 6 => Some(PC1_A::VALUE7), + 7 => Some(PC1_A::VALUE8), + 16 => Some(PC1_A::VALUE9), + 17 => Some(PC1_A::VALUE10), + 18 => Some(PC1_A::VALUE11), + 19 => Some(PC1_A::VALUE12), + 20 => Some(PC1_A::VALUE13), + 24 => Some(PC1_A::VALUE14), + 25 => Some(PC1_A::VALUE15), + 26 => Some(PC1_A::VALUE16), + 27 => Some(PC1_A::VALUE17), + 28 => Some(PC1_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc1::Value1 + *self == PC1_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc1::Value2 + *self == PC1_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc1::Value3 + *self == PC1_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc1::Value4 + *self == PC1_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc1::Value5 + *self == PC1_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc1::Value6 + *self == PC1_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc1::Value7 + *self == PC1_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc1::Value8 + *self == PC1_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc1::Value9 + *self == PC1_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc1::Value10 + *self == PC1_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc1::Value11 + *self == PC1_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc1::Value12 + *self == PC1_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc1::Value13 + *self == PC1_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc1::Value14 + *self == PC1_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc1::Value15 + *self == PC1_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc1::Value16 + *self == PC1_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc1::Value17 + *self == PC1_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc1::Value18 + *self == PC1_A::VALUE18 } } #[doc = "Field `PC1` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc1W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc1>; -impl<'a, REG> Pc1W<'a, REG> +pub type PC1_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC1_A>; +impl<'a, REG> PC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -450,267 +450,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc1::Value1) + self.variant(PC1_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc1::Value2) + self.variant(PC1_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc1::Value3) + self.variant(PC1_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc1::Value4) + self.variant(PC1_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc1::Value5) + self.variant(PC1_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc1::Value6) + self.variant(PC1_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc1::Value7) + self.variant(PC1_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc1::Value8) + self.variant(PC1_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc1::Value9) + self.variant(PC1_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc1::Value10) + self.variant(PC1_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc1::Value11) + self.variant(PC1_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc1::Value12) + self.variant(PC1_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc1::Value13) + self.variant(PC1_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc1::Value14) + self.variant(PC1_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc1::Value15) + self.variant(PC1_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc1::Value16) + self.variant(PC1_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc1::Value17) + self.variant(PC1_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc1::Value18) + self.variant(PC1_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc2 { +pub enum PC2_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc2) -> Self { + fn from(variant: PC2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc2 { +impl crate::FieldSpec for PC2_A { type Ux = u8; } -impl crate::IsEnum for Pc2 {} +impl crate::IsEnum for PC2_A {} #[doc = "Field `PC2` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc2R = crate::FieldReader; -impl Pc2R { +pub type PC2_R = crate::FieldReader; +impl PC2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc2::Value1), - 1 => Some(Pc2::Value2), - 2 => Some(Pc2::Value3), - 3 => Some(Pc2::Value4), - 4 => Some(Pc2::Value5), - 5 => Some(Pc2::Value6), - 6 => Some(Pc2::Value7), - 7 => Some(Pc2::Value8), - 16 => Some(Pc2::Value9), - 17 => Some(Pc2::Value10), - 18 => Some(Pc2::Value11), - 19 => Some(Pc2::Value12), - 20 => Some(Pc2::Value13), - 24 => Some(Pc2::Value14), - 25 => Some(Pc2::Value15), - 26 => Some(Pc2::Value16), - 27 => Some(Pc2::Value17), - 28 => Some(Pc2::Value18), + 0 => Some(PC2_A::VALUE1), + 1 => Some(PC2_A::VALUE2), + 2 => Some(PC2_A::VALUE3), + 3 => Some(PC2_A::VALUE4), + 4 => Some(PC2_A::VALUE5), + 5 => Some(PC2_A::VALUE6), + 6 => Some(PC2_A::VALUE7), + 7 => Some(PC2_A::VALUE8), + 16 => Some(PC2_A::VALUE9), + 17 => Some(PC2_A::VALUE10), + 18 => Some(PC2_A::VALUE11), + 19 => Some(PC2_A::VALUE12), + 20 => Some(PC2_A::VALUE13), + 24 => Some(PC2_A::VALUE14), + 25 => Some(PC2_A::VALUE15), + 26 => Some(PC2_A::VALUE16), + 27 => Some(PC2_A::VALUE17), + 28 => Some(PC2_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc2::Value1 + *self == PC2_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc2::Value2 + *self == PC2_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc2::Value3 + *self == PC2_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc2::Value4 + *self == PC2_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc2::Value5 + *self == PC2_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc2::Value6 + *self == PC2_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc2::Value7 + *self == PC2_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc2::Value8 + *self == PC2_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc2::Value9 + *self == PC2_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc2::Value10 + *self == PC2_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc2::Value11 + *self == PC2_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc2::Value12 + *self == PC2_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc2::Value13 + *self == PC2_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc2::Value14 + *self == PC2_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc2::Value15 + *self == PC2_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc2::Value16 + *self == PC2_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc2::Value17 + *self == PC2_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc2::Value18 + *self == PC2_A::VALUE18 } } #[doc = "Field `PC2` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc2W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc2>; -impl<'a, REG> Pc2W<'a, REG> +pub type PC2_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC2_A>; +impl<'a, REG> PC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -718,267 +718,267 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc2::Value1) + self.variant(PC2_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc2::Value2) + self.variant(PC2_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc2::Value3) + self.variant(PC2_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc2::Value4) + self.variant(PC2_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc2::Value5) + self.variant(PC2_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc2::Value6) + self.variant(PC2_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc2::Value7) + self.variant(PC2_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc2::Value8) + self.variant(PC2_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc2::Value9) + self.variant(PC2_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc2::Value10) + self.variant(PC2_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc2::Value11) + self.variant(PC2_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc2::Value12) + self.variant(PC2_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc2::Value13) + self.variant(PC2_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc2::Value14) + self.variant(PC2_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc2::Value15) + self.variant(PC2_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc2::Value16) + self.variant(PC2_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc2::Value17) + self.variant(PC2_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc2::Value18) + self.variant(PC2_A::VALUE18) } } #[doc = "Port Control for Port n Pin 0 to 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pc3 { +pub enum PC3_A { #[doc = "0: Input - No internal pull device active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input - Internal pull-down device active"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Input - Internal pull-up device active"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Input - No internal pull device, Pn_OUTx = input value"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Input inverted - No internal pull device active"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Input inverted - Internal pull-down device active"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Input inverted - Internal pull-up device active"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Input inverted - No internal pull device, Pn_OUTx = input value"] - Value8 = 7, + VALUE8 = 7, #[doc = "16: Output Push-Pull - General-purpose output"] - Value9 = 16, + VALUE9 = 16, #[doc = "17: Output Push-Pull - Alternate output function 1"] - Value10 = 17, + VALUE10 = 17, #[doc = "18: Output Push-Pull - Alternate output function 2"] - Value11 = 18, + VALUE11 = 18, #[doc = "19: Output Push-Pull - Alternate output function 3"] - Value12 = 19, + VALUE12 = 19, #[doc = "20: Output Push-Pull - Alternate output function 4"] - Value13 = 20, + VALUE13 = 20, #[doc = "24: Output Open Drain - General-purpose output"] - Value14 = 24, + VALUE14 = 24, #[doc = "25: Output Open Drain - Alternate output function 1"] - Value15 = 25, + VALUE15 = 25, #[doc = "26: Output Open Drain - Alternate output function 2"] - Value16 = 26, + VALUE16 = 26, #[doc = "27: Output Open Drain - Alternate output function 3"] - Value17 = 27, + VALUE17 = 27, #[doc = "28: Output Open Drain - Alternate output function 4"] - Value18 = 28, + VALUE18 = 28, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pc3) -> Self { + fn from(variant: PC3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pc3 { +impl crate::FieldSpec for PC3_A { type Ux = u8; } -impl crate::IsEnum for Pc3 {} +impl crate::IsEnum for PC3_A {} #[doc = "Field `PC3` reader - Port Control for Port n Pin 0 to 3"] -pub type Pc3R = crate::FieldReader; -impl Pc3R { +pub type PC3_R = crate::FieldReader; +impl PC3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pc3::Value1), - 1 => Some(Pc3::Value2), - 2 => Some(Pc3::Value3), - 3 => Some(Pc3::Value4), - 4 => Some(Pc3::Value5), - 5 => Some(Pc3::Value6), - 6 => Some(Pc3::Value7), - 7 => Some(Pc3::Value8), - 16 => Some(Pc3::Value9), - 17 => Some(Pc3::Value10), - 18 => Some(Pc3::Value11), - 19 => Some(Pc3::Value12), - 20 => Some(Pc3::Value13), - 24 => Some(Pc3::Value14), - 25 => Some(Pc3::Value15), - 26 => Some(Pc3::Value16), - 27 => Some(Pc3::Value17), - 28 => Some(Pc3::Value18), + 0 => Some(PC3_A::VALUE1), + 1 => Some(PC3_A::VALUE2), + 2 => Some(PC3_A::VALUE3), + 3 => Some(PC3_A::VALUE4), + 4 => Some(PC3_A::VALUE5), + 5 => Some(PC3_A::VALUE6), + 6 => Some(PC3_A::VALUE7), + 7 => Some(PC3_A::VALUE8), + 16 => Some(PC3_A::VALUE9), + 17 => Some(PC3_A::VALUE10), + 18 => Some(PC3_A::VALUE11), + 19 => Some(PC3_A::VALUE12), + 20 => Some(PC3_A::VALUE13), + 24 => Some(PC3_A::VALUE14), + 25 => Some(PC3_A::VALUE15), + 26 => Some(PC3_A::VALUE16), + 27 => Some(PC3_A::VALUE17), + 28 => Some(PC3_A::VALUE18), _ => None, } } #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pc3::Value1 + *self == PC3_A::VALUE1 } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pc3::Value2 + *self == PC3_A::VALUE2 } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pc3::Value3 + *self == PC3_A::VALUE3 } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pc3::Value4 + *self == PC3_A::VALUE4 } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Pc3::Value5 + *self == PC3_A::VALUE5 } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Pc3::Value6 + *self == PC3_A::VALUE6 } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Pc3::Value7 + *self == PC3_A::VALUE7 } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Pc3::Value8 + *self == PC3_A::VALUE8 } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Pc3::Value9 + *self == PC3_A::VALUE9 } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Pc3::Value10 + *self == PC3_A::VALUE10 } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn is_value11(&self) -> bool { - *self == Pc3::Value11 + *self == PC3_A::VALUE11 } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn is_value12(&self) -> bool { - *self == Pc3::Value12 + *self == PC3_A::VALUE12 } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn is_value13(&self) -> bool { - *self == Pc3::Value13 + *self == PC3_A::VALUE13 } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn is_value14(&self) -> bool { - *self == Pc3::Value14 + *self == PC3_A::VALUE14 } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn is_value15(&self) -> bool { - *self == Pc3::Value15 + *self == PC3_A::VALUE15 } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn is_value16(&self) -> bool { - *self == Pc3::Value16 + *self == PC3_A::VALUE16 } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn is_value17(&self) -> bool { - *self == Pc3::Value17 + *self == PC3_A::VALUE17 } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn is_value18(&self) -> bool { - *self == Pc3::Value18 + *self == PC3_A::VALUE18 } } #[doc = "Field `PC3` writer - Port Control for Port n Pin 0 to 3"] -pub type Pc3W<'a, REG> = crate::FieldWriter<'a, REG, 5, Pc3>; -impl<'a, REG> Pc3W<'a, REG> +pub type PC3_W<'a, REG> = crate::FieldWriter<'a, REG, 5, PC3_A>; +impl<'a, REG> PC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -986,156 +986,156 @@ where #[doc = "Input - No internal pull device active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pc3::Value1) + self.variant(PC3_A::VALUE1) } #[doc = "Input - Internal pull-down device active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pc3::Value2) + self.variant(PC3_A::VALUE2) } #[doc = "Input - Internal pull-up device active"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pc3::Value3) + self.variant(PC3_A::VALUE3) } #[doc = "Input - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pc3::Value4) + self.variant(PC3_A::VALUE4) } #[doc = "Input inverted - No internal pull device active"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Pc3::Value5) + self.variant(PC3_A::VALUE5) } #[doc = "Input inverted - Internal pull-down device active"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Pc3::Value6) + self.variant(PC3_A::VALUE6) } #[doc = "Input inverted - Internal pull-up device active"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Pc3::Value7) + self.variant(PC3_A::VALUE7) } #[doc = "Input inverted - No internal pull device, Pn_OUTx = input value"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Pc3::Value8) + self.variant(PC3_A::VALUE8) } #[doc = "Output Push-Pull - General-purpose output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Pc3::Value9) + self.variant(PC3_A::VALUE9) } #[doc = "Output Push-Pull - Alternate output function 1"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Pc3::Value10) + self.variant(PC3_A::VALUE10) } #[doc = "Output Push-Pull - Alternate output function 2"] #[inline(always)] pub fn value11(self) -> &'a mut crate::W { - self.variant(Pc3::Value11) + self.variant(PC3_A::VALUE11) } #[doc = "Output Push-Pull - Alternate output function 3"] #[inline(always)] pub fn value12(self) -> &'a mut crate::W { - self.variant(Pc3::Value12) + self.variant(PC3_A::VALUE12) } #[doc = "Output Push-Pull - Alternate output function 4"] #[inline(always)] pub fn value13(self) -> &'a mut crate::W { - self.variant(Pc3::Value13) + self.variant(PC3_A::VALUE13) } #[doc = "Output Open Drain - General-purpose output"] #[inline(always)] pub fn value14(self) -> &'a mut crate::W { - self.variant(Pc3::Value14) + self.variant(PC3_A::VALUE14) } #[doc = "Output Open Drain - Alternate output function 1"] #[inline(always)] pub fn value15(self) -> &'a mut crate::W { - self.variant(Pc3::Value15) + self.variant(PC3_A::VALUE15) } #[doc = "Output Open Drain - Alternate output function 2"] #[inline(always)] pub fn value16(self) -> &'a mut crate::W { - self.variant(Pc3::Value16) + self.variant(PC3_A::VALUE16) } #[doc = "Output Open Drain - Alternate output function 3"] #[inline(always)] pub fn value17(self) -> &'a mut crate::W { - self.variant(Pc3::Value17) + self.variant(PC3_A::VALUE17) } #[doc = "Output Open Drain - Alternate output function 4"] #[inline(always)] pub fn value18(self) -> &'a mut crate::W { - self.variant(Pc3::Value18) + self.variant(PC3_A::VALUE18) } } impl R { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc0(&self) -> Pc0R { - Pc0R::new(((self.bits >> 3) & 0x1f) as u8) + pub fn pc0(&self) -> PC0_R { + PC0_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc1(&self) -> Pc1R { - Pc1R::new(((self.bits >> 11) & 0x1f) as u8) + pub fn pc1(&self) -> PC1_R { + PC1_R::new(((self.bits >> 11) & 0x1f) as u8) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc2(&self) -> Pc2R { - Pc2R::new(((self.bits >> 19) & 0x1f) as u8) + pub fn pc2(&self) -> PC2_R { + PC2_R::new(((self.bits >> 19) & 0x1f) as u8) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - pub fn pc3(&self) -> Pc3R { - Pc3R::new(((self.bits >> 27) & 0x1f) as u8) + pub fn pc3(&self) -> PC3_R { + PC3_R::new(((self.bits >> 27) & 0x1f) as u8) } } impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc0(&mut self) -> Pc0W { - Pc0W::new(self, 3) + pub fn pc0(&mut self) -> PC0_W { + PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc1(&mut self) -> Pc1W { - Pc1W::new(self, 11) + pub fn pc1(&mut self) -> PC1_W { + PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc2(&mut self) -> Pc2W { - Pc2W::new(self, 19) + pub fn pc2(&mut self) -> PC2_W { + PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] #[must_use] - pub fn pc3(&mut self) -> Pc3W { - Pc3W::new(self, 27) + pub fn pc3(&mut self) -> PC3_W { + PC3_W::new(self, 27) } } #[doc = "Port 3 Input/Output Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iocr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iocr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Iocr0Spec; -impl crate::RegisterSpec for Iocr0Spec { +pub struct IOCR0_SPEC; +impl crate::RegisterSpec for IOCR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iocr0::R`](R) reader structure"] -impl crate::Readable for Iocr0Spec {} +impl crate::Readable for IOCR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`iocr0::W`](W) writer structure"] -impl crate::Writable for Iocr0Spec { +impl crate::Writable for IOCR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IOCR0 to value 0"] -impl crate::Resettable for Iocr0Spec { +impl crate::Resettable for IOCR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/omr.rs b/src/port3/omr.rs index cd3dce1b..0852829e 100644 --- a/src/port3/omr.rs +++ b/src/port3/omr.rs @@ -1,275 +1,275 @@ #[doc = "Register `OMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PS0` writer - Port n Set Bit 0"] -pub type Ps0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS1` writer - Port n Set Bit 1"] -pub type Ps1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS2` writer - Port n Set Bit 2"] -pub type Ps2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS3` writer - Port n Set Bit 3"] -pub type Ps3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS4` writer - Port n Set Bit 4"] -pub type Ps4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS5` writer - Port n Set Bit 5"] -pub type Ps5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS6` writer - Port n Set Bit 6"] -pub type Ps6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS7` writer - Port n Set Bit 7"] -pub type Ps7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS8` writer - Port n Set Bit 8"] -pub type Ps8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS9` writer - Port n Set Bit 9"] -pub type Ps9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS10` writer - Port n Set Bit 10"] -pub type Ps10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS11` writer - Port n Set Bit 11"] -pub type Ps11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS12` writer - Port n Set Bit 12"] -pub type Ps12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS13` writer - Port n Set Bit 13"] -pub type Ps13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS14` writer - Port n Set Bit 14"] -pub type Ps14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PS15` writer - Port n Set Bit 15"] -pub type Ps15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PS15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR0` writer - Port n Reset Bit 0"] -pub type Pr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR1` writer - Port n Reset Bit 1"] -pub type Pr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR2` writer - Port n Reset Bit 2"] -pub type Pr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR3` writer - Port n Reset Bit 3"] -pub type Pr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR4` writer - Port n Reset Bit 4"] -pub type Pr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR5` writer - Port n Reset Bit 5"] -pub type Pr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR6` writer - Port n Reset Bit 6"] -pub type Pr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR7` writer - Port n Reset Bit 7"] -pub type Pr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR8` writer - Port n Reset Bit 8"] -pub type Pr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR9` writer - Port n Reset Bit 9"] -pub type Pr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR10` writer - Port n Reset Bit 10"] -pub type Pr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR11` writer - Port n Reset Bit 11"] -pub type Pr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR12` writer - Port n Reset Bit 12"] -pub type Pr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR13` writer - Port n Reset Bit 13"] -pub type Pr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR14` writer - Port n Reset Bit 14"] -pub type Pr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PR15` writer - Port n Reset Bit 15"] -pub type Pr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] #[must_use] - pub fn ps0(&mut self) -> Ps0W { - Ps0W::new(self, 0) + pub fn ps0(&mut self) -> PS0_W { + PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] #[must_use] - pub fn ps1(&mut self) -> Ps1W { - Ps1W::new(self, 1) + pub fn ps1(&mut self) -> PS1_W { + PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] #[must_use] - pub fn ps2(&mut self) -> Ps2W { - Ps2W::new(self, 2) + pub fn ps2(&mut self) -> PS2_W { + PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] #[must_use] - pub fn ps3(&mut self) -> Ps3W { - Ps3W::new(self, 3) + pub fn ps3(&mut self) -> PS3_W { + PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] #[must_use] - pub fn ps4(&mut self) -> Ps4W { - Ps4W::new(self, 4) + pub fn ps4(&mut self) -> PS4_W { + PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] #[must_use] - pub fn ps5(&mut self) -> Ps5W { - Ps5W::new(self, 5) + pub fn ps5(&mut self) -> PS5_W { + PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] #[must_use] - pub fn ps6(&mut self) -> Ps6W { - Ps6W::new(self, 6) + pub fn ps6(&mut self) -> PS6_W { + PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] #[must_use] - pub fn ps7(&mut self) -> Ps7W { - Ps7W::new(self, 7) + pub fn ps7(&mut self) -> PS7_W { + PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] #[must_use] - pub fn ps8(&mut self) -> Ps8W { - Ps8W::new(self, 8) + pub fn ps8(&mut self) -> PS8_W { + PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] #[must_use] - pub fn ps9(&mut self) -> Ps9W { - Ps9W::new(self, 9) + pub fn ps9(&mut self) -> PS9_W { + PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] #[must_use] - pub fn ps10(&mut self) -> Ps10W { - Ps10W::new(self, 10) + pub fn ps10(&mut self) -> PS10_W { + PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] #[must_use] - pub fn ps11(&mut self) -> Ps11W { - Ps11W::new(self, 11) + pub fn ps11(&mut self) -> PS11_W { + PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] #[must_use] - pub fn ps12(&mut self) -> Ps12W { - Ps12W::new(self, 12) + pub fn ps12(&mut self) -> PS12_W { + PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] #[must_use] - pub fn ps13(&mut self) -> Ps13W { - Ps13W::new(self, 13) + pub fn ps13(&mut self) -> PS13_W { + PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] #[must_use] - pub fn ps14(&mut self) -> Ps14W { - Ps14W::new(self, 14) + pub fn ps14(&mut self) -> PS14_W { + PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] #[must_use] - pub fn ps15(&mut self) -> Ps15W { - Ps15W::new(self, 15) + pub fn ps15(&mut self) -> PS15_W { + PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] #[must_use] - pub fn pr0(&mut self) -> Pr0W { - Pr0W::new(self, 16) + pub fn pr0(&mut self) -> PR0_W { + PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] #[must_use] - pub fn pr1(&mut self) -> Pr1W { - Pr1W::new(self, 17) + pub fn pr1(&mut self) -> PR1_W { + PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] #[must_use] - pub fn pr2(&mut self) -> Pr2W { - Pr2W::new(self, 18) + pub fn pr2(&mut self) -> PR2_W { + PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] #[must_use] - pub fn pr3(&mut self) -> Pr3W { - Pr3W::new(self, 19) + pub fn pr3(&mut self) -> PR3_W { + PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] #[must_use] - pub fn pr4(&mut self) -> Pr4W { - Pr4W::new(self, 20) + pub fn pr4(&mut self) -> PR4_W { + PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] #[must_use] - pub fn pr5(&mut self) -> Pr5W { - Pr5W::new(self, 21) + pub fn pr5(&mut self) -> PR5_W { + PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] #[must_use] - pub fn pr6(&mut self) -> Pr6W { - Pr6W::new(self, 22) + pub fn pr6(&mut self) -> PR6_W { + PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] #[must_use] - pub fn pr7(&mut self) -> Pr7W { - Pr7W::new(self, 23) + pub fn pr7(&mut self) -> PR7_W { + PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] #[must_use] - pub fn pr8(&mut self) -> Pr8W { - Pr8W::new(self, 24) + pub fn pr8(&mut self) -> PR8_W { + PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] #[must_use] - pub fn pr9(&mut self) -> Pr9W { - Pr9W::new(self, 25) + pub fn pr9(&mut self) -> PR9_W { + PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] #[must_use] - pub fn pr10(&mut self) -> Pr10W { - Pr10W::new(self, 26) + pub fn pr10(&mut self) -> PR10_W { + PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] #[must_use] - pub fn pr11(&mut self) -> Pr11W { - Pr11W::new(self, 27) + pub fn pr11(&mut self) -> PR11_W { + PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] #[must_use] - pub fn pr12(&mut self) -> Pr12W { - Pr12W::new(self, 28) + pub fn pr12(&mut self) -> PR12_W { + PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] #[must_use] - pub fn pr13(&mut self) -> Pr13W { - Pr13W::new(self, 29) + pub fn pr13(&mut self) -> PR13_W { + PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] #[must_use] - pub fn pr14(&mut self) -> Pr14W { - Pr14W::new(self, 30) + pub fn pr14(&mut self) -> PR14_W { + PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] #[must_use] - pub fn pr15(&mut self) -> Pr15W { - Pr15W::new(self, 31) + pub fn pr15(&mut self) -> PR15_W { + PR15_W::new(self, 31) } } #[doc = "Port 3 Output Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`omr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OmrSpec; -impl crate::RegisterSpec for OmrSpec { +pub struct OMR_SPEC; +impl crate::RegisterSpec for OMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`omr::W`](W) writer structure"] -impl crate::Writable for OmrSpec { +impl crate::Writable for OMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OMR to value 0"] -impl crate::Resettable for OmrSpec { +impl crate::Resettable for OMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/out.rs b/src/port3/out.rs index e7a887aa..603fd9ca 100644 --- a/src/port3/out.rs +++ b/src/port3/out.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `OUT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OUT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Output Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P0 { +pub enum P0_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P0) -> Self { + fn from(variant: P0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P0` reader - Port n Output Bit 0"] -pub type P0R = crate::BitReader; -impl P0R { +pub type P0_R = crate::BitReader; +impl P0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P0 { + pub const fn variant(&self) -> P0_A { match self.bits { - false => P0::Value1, - true => P0::Value2, + false => P0_A::VALUE1, + true => P0_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P0::Value1 + *self == P0_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P0::Value2 + *self == P0_A::VALUE2 } } #[doc = "Field `P0` writer - Port n Output Bit 0"] -pub type P0W<'a, REG> = crate::BitWriter<'a, REG, P0>; -impl<'a, REG> P0W<'a, REG> +pub type P0_W<'a, REG> = crate::BitWriter<'a, REG, P0_A>; +impl<'a, REG> P0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P0::Value1) + self.variant(P0_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P0::Value2) + self.variant(P0_A::VALUE2) } } #[doc = "Port n Output Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P1 { +pub enum P1_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P1) -> Self { + fn from(variant: P1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P1` reader - Port n Output Bit 1"] -pub type P1R = crate::BitReader; -impl P1R { +pub type P1_R = crate::BitReader; +impl P1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P1 { + pub const fn variant(&self) -> P1_A { match self.bits { - false => P1::Value1, - true => P1::Value2, + false => P1_A::VALUE1, + true => P1_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P1::Value1 + *self == P1_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P1::Value2 + *self == P1_A::VALUE2 } } #[doc = "Field `P1` writer - Port n Output Bit 1"] -pub type P1W<'a, REG> = crate::BitWriter<'a, REG, P1>; -impl<'a, REG> P1W<'a, REG> +pub type P1_W<'a, REG> = crate::BitWriter<'a, REG, P1_A>; +impl<'a, REG> P1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P1::Value1) + self.variant(P1_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P1::Value2) + self.variant(P1_A::VALUE2) } } #[doc = "Port n Output Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P2 { +pub enum P2_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P2) -> Self { + fn from(variant: P2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P2` reader - Port n Output Bit 2"] -pub type P2R = crate::BitReader; -impl P2R { +pub type P2_R = crate::BitReader; +impl P2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P2 { + pub const fn variant(&self) -> P2_A { match self.bits { - false => P2::Value1, - true => P2::Value2, + false => P2_A::VALUE1, + true => P2_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P2::Value1 + *self == P2_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P2::Value2 + *self == P2_A::VALUE2 } } #[doc = "Field `P2` writer - Port n Output Bit 2"] -pub type P2W<'a, REG> = crate::BitWriter<'a, REG, P2>; -impl<'a, REG> P2W<'a, REG> +pub type P2_W<'a, REG> = crate::BitWriter<'a, REG, P2_A>; +impl<'a, REG> P2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P2::Value1) + self.variant(P2_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P2::Value2) + self.variant(P2_A::VALUE2) } } #[doc = "Port n Output Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P3 { +pub enum P3_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P3) -> Self { + fn from(variant: P3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P3` reader - Port n Output Bit 3"] -pub type P3R = crate::BitReader; -impl P3R { +pub type P3_R = crate::BitReader; +impl P3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P3 { + pub const fn variant(&self) -> P3_A { match self.bits { - false => P3::Value1, - true => P3::Value2, + false => P3_A::VALUE1, + true => P3_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P3::Value1 + *self == P3_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P3::Value2 + *self == P3_A::VALUE2 } } #[doc = "Field `P3` writer - Port n Output Bit 3"] -pub type P3W<'a, REG> = crate::BitWriter<'a, REG, P3>; -impl<'a, REG> P3W<'a, REG> +pub type P3_W<'a, REG> = crate::BitWriter<'a, REG, P3_A>; +impl<'a, REG> P3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P3::Value1) + self.variant(P3_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P3::Value2) + self.variant(P3_A::VALUE2) } } #[doc = "Port n Output Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P4 { +pub enum P4_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P4) -> Self { + fn from(variant: P4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P4` reader - Port n Output Bit 4"] -pub type P4R = crate::BitReader; -impl P4R { +pub type P4_R = crate::BitReader; +impl P4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P4 { + pub const fn variant(&self) -> P4_A { match self.bits { - false => P4::Value1, - true => P4::Value2, + false => P4_A::VALUE1, + true => P4_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P4::Value1 + *self == P4_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P4::Value2 + *self == P4_A::VALUE2 } } #[doc = "Field `P4` writer - Port n Output Bit 4"] -pub type P4W<'a, REG> = crate::BitWriter<'a, REG, P4>; -impl<'a, REG> P4W<'a, REG> +pub type P4_W<'a, REG> = crate::BitWriter<'a, REG, P4_A>; +impl<'a, REG> P4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P4::Value1) + self.variant(P4_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P4::Value2) + self.variant(P4_A::VALUE2) } } #[doc = "Port n Output Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P5 { +pub enum P5_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P5) -> Self { + fn from(variant: P5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P5` reader - Port n Output Bit 5"] -pub type P5R = crate::BitReader; -impl P5R { +pub type P5_R = crate::BitReader; +impl P5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P5 { + pub const fn variant(&self) -> P5_A { match self.bits { - false => P5::Value1, - true => P5::Value2, + false => P5_A::VALUE1, + true => P5_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P5::Value1 + *self == P5_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P5::Value2 + *self == P5_A::VALUE2 } } #[doc = "Field `P5` writer - Port n Output Bit 5"] -pub type P5W<'a, REG> = crate::BitWriter<'a, REG, P5>; -impl<'a, REG> P5W<'a, REG> +pub type P5_W<'a, REG> = crate::BitWriter<'a, REG, P5_A>; +impl<'a, REG> P5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P5::Value1) + self.variant(P5_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P5::Value2) + self.variant(P5_A::VALUE2) } } #[doc = "Port n Output Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P6 { +pub enum P6_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P6) -> Self { + fn from(variant: P6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P6` reader - Port n Output Bit 6"] -pub type P6R = crate::BitReader; -impl P6R { +pub type P6_R = crate::BitReader; +impl P6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P6 { + pub const fn variant(&self) -> P6_A { match self.bits { - false => P6::Value1, - true => P6::Value2, + false => P6_A::VALUE1, + true => P6_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P6::Value1 + *self == P6_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P6::Value2 + *self == P6_A::VALUE2 } } #[doc = "Field `P6` writer - Port n Output Bit 6"] -pub type P6W<'a, REG> = crate::BitWriter<'a, REG, P6>; -impl<'a, REG> P6W<'a, REG> +pub type P6_W<'a, REG> = crate::BitWriter<'a, REG, P6_A>; +impl<'a, REG> P6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P6::Value1) + self.variant(P6_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P6::Value2) + self.variant(P6_A::VALUE2) } } #[doc = "Port n Output Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P7 { +pub enum P7_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P7) -> Self { + fn from(variant: P7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P7` reader - Port n Output Bit 7"] -pub type P7R = crate::BitReader; -impl P7R { +pub type P7_R = crate::BitReader; +impl P7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P7 { + pub const fn variant(&self) -> P7_A { match self.bits { - false => P7::Value1, - true => P7::Value2, + false => P7_A::VALUE1, + true => P7_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P7::Value1 + *self == P7_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P7::Value2 + *self == P7_A::VALUE2 } } #[doc = "Field `P7` writer - Port n Output Bit 7"] -pub type P7W<'a, REG> = crate::BitWriter<'a, REG, P7>; -impl<'a, REG> P7W<'a, REG> +pub type P7_W<'a, REG> = crate::BitWriter<'a, REG, P7_A>; +impl<'a, REG> P7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P7::Value1) + self.variant(P7_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P7::Value2) + self.variant(P7_A::VALUE2) } } #[doc = "Port n Output Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P8 { +pub enum P8_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P8) -> Self { + fn from(variant: P8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P8` reader - Port n Output Bit 8"] -pub type P8R = crate::BitReader; -impl P8R { +pub type P8_R = crate::BitReader; +impl P8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P8 { + pub const fn variant(&self) -> P8_A { match self.bits { - false => P8::Value1, - true => P8::Value2, + false => P8_A::VALUE1, + true => P8_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P8::Value1 + *self == P8_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P8::Value2 + *self == P8_A::VALUE2 } } #[doc = "Field `P8` writer - Port n Output Bit 8"] -pub type P8W<'a, REG> = crate::BitWriter<'a, REG, P8>; -impl<'a, REG> P8W<'a, REG> +pub type P8_W<'a, REG> = crate::BitWriter<'a, REG, P8_A>; +impl<'a, REG> P8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P8::Value1) + self.variant(P8_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P8::Value2) + self.variant(P8_A::VALUE2) } } #[doc = "Port n Output Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P9 { +pub enum P9_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P9) -> Self { + fn from(variant: P9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P9` reader - Port n Output Bit 9"] -pub type P9R = crate::BitReader; -impl P9R { +pub type P9_R = crate::BitReader; +impl P9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P9 { + pub const fn variant(&self) -> P9_A { match self.bits { - false => P9::Value1, - true => P9::Value2, + false => P9_A::VALUE1, + true => P9_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P9::Value1 + *self == P9_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P9::Value2 + *self == P9_A::VALUE2 } } #[doc = "Field `P9` writer - Port n Output Bit 9"] -pub type P9W<'a, REG> = crate::BitWriter<'a, REG, P9>; -impl<'a, REG> P9W<'a, REG> +pub type P9_W<'a, REG> = crate::BitWriter<'a, REG, P9_A>; +impl<'a, REG> P9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P9::Value1) + self.variant(P9_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P9::Value2) + self.variant(P9_A::VALUE2) } } #[doc = "Port n Output Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P10 { +pub enum P10_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P10) -> Self { + fn from(variant: P10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P10` reader - Port n Output Bit 10"] -pub type P10R = crate::BitReader; -impl P10R { +pub type P10_R = crate::BitReader; +impl P10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P10 { + pub const fn variant(&self) -> P10_A { match self.bits { - false => P10::Value1, - true => P10::Value2, + false => P10_A::VALUE1, + true => P10_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P10::Value1 + *self == P10_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P10::Value2 + *self == P10_A::VALUE2 } } #[doc = "Field `P10` writer - Port n Output Bit 10"] -pub type P10W<'a, REG> = crate::BitWriter<'a, REG, P10>; -impl<'a, REG> P10W<'a, REG> +pub type P10_W<'a, REG> = crate::BitWriter<'a, REG, P10_A>; +impl<'a, REG> P10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P10::Value1) + self.variant(P10_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P10::Value2) + self.variant(P10_A::VALUE2) } } #[doc = "Port n Output Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P11 { +pub enum P11_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P11) -> Self { + fn from(variant: P11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P11` reader - Port n Output Bit 11"] -pub type P11R = crate::BitReader; -impl P11R { +pub type P11_R = crate::BitReader; +impl P11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P11 { + pub const fn variant(&self) -> P11_A { match self.bits { - false => P11::Value1, - true => P11::Value2, + false => P11_A::VALUE1, + true => P11_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P11::Value1 + *self == P11_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P11::Value2 + *self == P11_A::VALUE2 } } #[doc = "Field `P11` writer - Port n Output Bit 11"] -pub type P11W<'a, REG> = crate::BitWriter<'a, REG, P11>; -impl<'a, REG> P11W<'a, REG> +pub type P11_W<'a, REG> = crate::BitWriter<'a, REG, P11_A>; +impl<'a, REG> P11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P11::Value1) + self.variant(P11_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P11::Value2) + self.variant(P11_A::VALUE2) } } #[doc = "Port n Output Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P12 { +pub enum P12_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P12) -> Self { + fn from(variant: P12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P12` reader - Port n Output Bit 12"] -pub type P12R = crate::BitReader; -impl P12R { +pub type P12_R = crate::BitReader; +impl P12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P12 { + pub const fn variant(&self) -> P12_A { match self.bits { - false => P12::Value1, - true => P12::Value2, + false => P12_A::VALUE1, + true => P12_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P12::Value1 + *self == P12_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P12::Value2 + *self == P12_A::VALUE2 } } #[doc = "Field `P12` writer - Port n Output Bit 12"] -pub type P12W<'a, REG> = crate::BitWriter<'a, REG, P12>; -impl<'a, REG> P12W<'a, REG> +pub type P12_W<'a, REG> = crate::BitWriter<'a, REG, P12_A>; +impl<'a, REG> P12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P12::Value1) + self.variant(P12_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P12::Value2) + self.variant(P12_A::VALUE2) } } #[doc = "Port n Output Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P13 { +pub enum P13_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P13) -> Self { + fn from(variant: P13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P13` reader - Port n Output Bit 13"] -pub type P13R = crate::BitReader; -impl P13R { +pub type P13_R = crate::BitReader; +impl P13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P13 { + pub const fn variant(&self) -> P13_A { match self.bits { - false => P13::Value1, - true => P13::Value2, + false => P13_A::VALUE1, + true => P13_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P13::Value1 + *self == P13_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P13::Value2 + *self == P13_A::VALUE2 } } #[doc = "Field `P13` writer - Port n Output Bit 13"] -pub type P13W<'a, REG> = crate::BitWriter<'a, REG, P13>; -impl<'a, REG> P13W<'a, REG> +pub type P13_W<'a, REG> = crate::BitWriter<'a, REG, P13_A>; +impl<'a, REG> P13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P13::Value1) + self.variant(P13_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P13::Value2) + self.variant(P13_A::VALUE2) } } #[doc = "Port n Output Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P14 { +pub enum P14_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P14) -> Self { + fn from(variant: P14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P14` reader - Port n Output Bit 14"] -pub type P14R = crate::BitReader; -impl P14R { +pub type P14_R = crate::BitReader; +impl P14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P14 { + pub const fn variant(&self) -> P14_A { match self.bits { - false => P14::Value1, - true => P14::Value2, + false => P14_A::VALUE1, + true => P14_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P14::Value1 + *self == P14_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P14::Value2 + *self == P14_A::VALUE2 } } #[doc = "Field `P14` writer - Port n Output Bit 14"] -pub type P14W<'a, REG> = crate::BitWriter<'a, REG, P14>; -impl<'a, REG> P14W<'a, REG> +pub type P14_W<'a, REG> = crate::BitWriter<'a, REG, P14_A>; +impl<'a, REG> P14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P14::Value1) + self.variant(P14_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P14::Value2) + self.variant(P14_A::VALUE2) } } #[doc = "Port n Output Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum P15 { +pub enum P15_A { #[doc = "0: The output level of Pn.x is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The output level of Pn.x is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: P15) -> Self { + fn from(variant: P15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `P15` reader - Port n Output Bit 15"] -pub type P15R = crate::BitReader; -impl P15R { +pub type P15_R = crate::BitReader; +impl P15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> P15 { + pub const fn variant(&self) -> P15_A { match self.bits { - false => P15::Value1, - true => P15::Value2, + false => P15_A::VALUE1, + true => P15_A::VALUE2, } } #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == P15::Value1 + *self == P15_A::VALUE1 } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == P15::Value2 + *self == P15_A::VALUE2 } } #[doc = "Field `P15` writer - Port n Output Bit 15"] -pub type P15W<'a, REG> = crate::BitWriter<'a, REG, P15>; -impl<'a, REG> P15W<'a, REG> +pub type P15_W<'a, REG> = crate::BitWriter<'a, REG, P15_A>; +impl<'a, REG> P15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The output level of Pn.x is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(P15::Value1) + self.variant(P15_A::VALUE1) } #[doc = "The output level of Pn.x is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(P15::Value2) + self.variant(P15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - pub fn p0(&self) -> P0R { - P0R::new((self.bits & 1) != 0) + pub fn p0(&self) -> P0_R { + P0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - pub fn p1(&self) -> P1R { - P1R::new(((self.bits >> 1) & 1) != 0) + pub fn p1(&self) -> P1_R { + P1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - pub fn p2(&self) -> P2R { - P2R::new(((self.bits >> 2) & 1) != 0) + pub fn p2(&self) -> P2_R { + P2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - pub fn p3(&self) -> P3R { - P3R::new(((self.bits >> 3) & 1) != 0) + pub fn p3(&self) -> P3_R { + P3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - pub fn p4(&self) -> P4R { - P4R::new(((self.bits >> 4) & 1) != 0) + pub fn p4(&self) -> P4_R { + P4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - pub fn p5(&self) -> P5R { - P5R::new(((self.bits >> 5) & 1) != 0) + pub fn p5(&self) -> P5_R { + P5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - pub fn p6(&self) -> P6R { - P6R::new(((self.bits >> 6) & 1) != 0) + pub fn p6(&self) -> P6_R { + P6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - pub fn p7(&self) -> P7R { - P7R::new(((self.bits >> 7) & 1) != 0) + pub fn p7(&self) -> P7_R { + P7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - pub fn p8(&self) -> P8R { - P8R::new(((self.bits >> 8) & 1) != 0) + pub fn p8(&self) -> P8_R { + P8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - pub fn p9(&self) -> P9R { - P9R::new(((self.bits >> 9) & 1) != 0) + pub fn p9(&self) -> P9_R { + P9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - pub fn p10(&self) -> P10R { - P10R::new(((self.bits >> 10) & 1) != 0) + pub fn p10(&self) -> P10_R { + P10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - pub fn p11(&self) -> P11R { - P11R::new(((self.bits >> 11) & 1) != 0) + pub fn p11(&self) -> P11_R { + P11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - pub fn p12(&self) -> P12R { - P12R::new(((self.bits >> 12) & 1) != 0) + pub fn p12(&self) -> P12_R { + P12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - pub fn p13(&self) -> P13R { - P13R::new(((self.bits >> 13) & 1) != 0) + pub fn p13(&self) -> P13_R { + P13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - pub fn p14(&self) -> P14R { - P14R::new(((self.bits >> 14) & 1) != 0) + pub fn p14(&self) -> P14_R { + P14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - pub fn p15(&self) -> P15R { - P15R::new(((self.bits >> 15) & 1) != 0) + pub fn p15(&self) -> P15_R { + P15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] #[must_use] - pub fn p0(&mut self) -> P0W { - P0W::new(self, 0) + pub fn p0(&mut self) -> P0_W { + P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] #[must_use] - pub fn p1(&mut self) -> P1W { - P1W::new(self, 1) + pub fn p1(&mut self) -> P1_W { + P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] #[must_use] - pub fn p2(&mut self) -> P2W { - P2W::new(self, 2) + pub fn p2(&mut self) -> P2_W { + P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] #[must_use] - pub fn p3(&mut self) -> P3W { - P3W::new(self, 3) + pub fn p3(&mut self) -> P3_W { + P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] #[must_use] - pub fn p4(&mut self) -> P4W { - P4W::new(self, 4) + pub fn p4(&mut self) -> P4_W { + P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] #[must_use] - pub fn p5(&mut self) -> P5W { - P5W::new(self, 5) + pub fn p5(&mut self) -> P5_W { + P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] #[must_use] - pub fn p6(&mut self) -> P6W { - P6W::new(self, 6) + pub fn p6(&mut self) -> P6_W { + P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] #[must_use] - pub fn p7(&mut self) -> P7W { - P7W::new(self, 7) + pub fn p7(&mut self) -> P7_W { + P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] #[must_use] - pub fn p8(&mut self) -> P8W { - P8W::new(self, 8) + pub fn p8(&mut self) -> P8_W { + P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] #[must_use] - pub fn p9(&mut self) -> P9W { - P9W::new(self, 9) + pub fn p9(&mut self) -> P9_W { + P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] #[must_use] - pub fn p10(&mut self) -> P10W { - P10W::new(self, 10) + pub fn p10(&mut self) -> P10_W { + P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] #[must_use] - pub fn p11(&mut self) -> P11W { - P11W::new(self, 11) + pub fn p11(&mut self) -> P11_W { + P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] #[must_use] - pub fn p12(&mut self) -> P12W { - P12W::new(self, 12) + pub fn p12(&mut self) -> P12_W { + P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] #[must_use] - pub fn p13(&mut self) -> P13W { - P13W::new(self, 13) + pub fn p13(&mut self) -> P13_W { + P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] #[must_use] - pub fn p14(&mut self) -> P14W { - P14W::new(self, 14) + pub fn p14(&mut self) -> P14_W { + P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] #[must_use] - pub fn p15(&mut self) -> P15W { - P15W::new(self, 15) + pub fn p15(&mut self) -> P15_W { + P15_W::new(self, 15) } } #[doc = "Port 3 Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutSpec; -impl crate::RegisterSpec for OutSpec { +pub struct OUT_SPEC; +impl crate::RegisterSpec for OUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`out::R`](R) reader structure"] -impl crate::Readable for OutSpec {} +impl crate::Readable for OUT_SPEC {} #[doc = "`write(|w| ..)` method takes [`out::W`](W) writer structure"] -impl crate::Writable for OutSpec { +impl crate::Writable for OUT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OUT to value 0"] -impl crate::Resettable for OutSpec { +impl crate::Resettable for OUT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/pdisc.rs b/src/port3/pdisc.rs index 9a3fb51b..80289698 100644 --- a/src/port3/pdisc.rs +++ b/src/port3/pdisc.rs @@ -1,671 +1,671 @@ #[doc = "Register `PDISC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Pad Disable for Port n Pin 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis0 { +pub enum PDIS0_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis0) -> Self { + fn from(variant: PDIS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS0` reader - Pad Disable for Port n Pin 0"] -pub type Pdis0R = crate::BitReader; -impl Pdis0R { +pub type PDIS0_R = crate::BitReader; +impl PDIS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis0 { + pub const fn variant(&self) -> PDIS0_A { match self.bits { - false => Pdis0::Value1, - true => Pdis0::Value2, + false => PDIS0_A::VALUE1, + true => PDIS0_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis0::Value1 + *self == PDIS0_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis0::Value2 + *self == PDIS0_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis1 { +pub enum PDIS1_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis1) -> Self { + fn from(variant: PDIS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS1` reader - Pad Disable for Port n Pin 1"] -pub type Pdis1R = crate::BitReader; -impl Pdis1R { +pub type PDIS1_R = crate::BitReader; +impl PDIS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis1 { + pub const fn variant(&self) -> PDIS1_A { match self.bits { - false => Pdis1::Value1, - true => Pdis1::Value2, + false => PDIS1_A::VALUE1, + true => PDIS1_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis1::Value1 + *self == PDIS1_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis1::Value2 + *self == PDIS1_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis2 { +pub enum PDIS2_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis2) -> Self { + fn from(variant: PDIS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS2` reader - Pad Disable for Port n Pin 2"] -pub type Pdis2R = crate::BitReader; -impl Pdis2R { +pub type PDIS2_R = crate::BitReader; +impl PDIS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis2 { + pub const fn variant(&self) -> PDIS2_A { match self.bits { - false => Pdis2::Value1, - true => Pdis2::Value2, + false => PDIS2_A::VALUE1, + true => PDIS2_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis2::Value1 + *self == PDIS2_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis2::Value2 + *self == PDIS2_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis3 { +pub enum PDIS3_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis3) -> Self { + fn from(variant: PDIS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS3` reader - Pad Disable for Port n Pin 3"] -pub type Pdis3R = crate::BitReader; -impl Pdis3R { +pub type PDIS3_R = crate::BitReader; +impl PDIS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis3 { + pub const fn variant(&self) -> PDIS3_A { match self.bits { - false => Pdis3::Value1, - true => Pdis3::Value2, + false => PDIS3_A::VALUE1, + true => PDIS3_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis3::Value1 + *self == PDIS3_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis3::Value2 + *self == PDIS3_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis4 { +pub enum PDIS4_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis4) -> Self { + fn from(variant: PDIS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS4` reader - Pad Disable for Port n Pin 4"] -pub type Pdis4R = crate::BitReader; -impl Pdis4R { +pub type PDIS4_R = crate::BitReader; +impl PDIS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis4 { + pub const fn variant(&self) -> PDIS4_A { match self.bits { - false => Pdis4::Value1, - true => Pdis4::Value2, + false => PDIS4_A::VALUE1, + true => PDIS4_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis4::Value1 + *self == PDIS4_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis4::Value2 + *self == PDIS4_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis5 { +pub enum PDIS5_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis5) -> Self { + fn from(variant: PDIS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS5` reader - Pad Disable for Port n Pin 5"] -pub type Pdis5R = crate::BitReader; -impl Pdis5R { +pub type PDIS5_R = crate::BitReader; +impl PDIS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis5 { + pub const fn variant(&self) -> PDIS5_A { match self.bits { - false => Pdis5::Value1, - true => Pdis5::Value2, + false => PDIS5_A::VALUE1, + true => PDIS5_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis5::Value1 + *self == PDIS5_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis5::Value2 + *self == PDIS5_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis6 { +pub enum PDIS6_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis6) -> Self { + fn from(variant: PDIS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS6` reader - Pad Disable for Port n Pin 6"] -pub type Pdis6R = crate::BitReader; -impl Pdis6R { +pub type PDIS6_R = crate::BitReader; +impl PDIS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis6 { + pub const fn variant(&self) -> PDIS6_A { match self.bits { - false => Pdis6::Value1, - true => Pdis6::Value2, + false => PDIS6_A::VALUE1, + true => PDIS6_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis6::Value1 + *self == PDIS6_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis6::Value2 + *self == PDIS6_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis7 { +pub enum PDIS7_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis7) -> Self { + fn from(variant: PDIS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS7` reader - Pad Disable for Port n Pin 7"] -pub type Pdis7R = crate::BitReader; -impl Pdis7R { +pub type PDIS7_R = crate::BitReader; +impl PDIS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis7 { + pub const fn variant(&self) -> PDIS7_A { match self.bits { - false => Pdis7::Value1, - true => Pdis7::Value2, + false => PDIS7_A::VALUE1, + true => PDIS7_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis7::Value1 + *self == PDIS7_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis7::Value2 + *self == PDIS7_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis8 { +pub enum PDIS8_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis8) -> Self { + fn from(variant: PDIS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS8` reader - Pad Disable for Port n Pin 8"] -pub type Pdis8R = crate::BitReader; -impl Pdis8R { +pub type PDIS8_R = crate::BitReader; +impl PDIS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis8 { + pub const fn variant(&self) -> PDIS8_A { match self.bits { - false => Pdis8::Value1, - true => Pdis8::Value2, + false => PDIS8_A::VALUE1, + true => PDIS8_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis8::Value1 + *self == PDIS8_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis8::Value2 + *self == PDIS8_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis9 { +pub enum PDIS9_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis9) -> Self { + fn from(variant: PDIS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS9` reader - Pad Disable for Port n Pin 9"] -pub type Pdis9R = crate::BitReader; -impl Pdis9R { +pub type PDIS9_R = crate::BitReader; +impl PDIS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis9 { + pub const fn variant(&self) -> PDIS9_A { match self.bits { - false => Pdis9::Value1, - true => Pdis9::Value2, + false => PDIS9_A::VALUE1, + true => PDIS9_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis9::Value1 + *self == PDIS9_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis9::Value2 + *self == PDIS9_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis10 { +pub enum PDIS10_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis10) -> Self { + fn from(variant: PDIS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS10` reader - Pad Disable for Port n Pin 10"] -pub type Pdis10R = crate::BitReader; -impl Pdis10R { +pub type PDIS10_R = crate::BitReader; +impl PDIS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis10 { + pub const fn variant(&self) -> PDIS10_A { match self.bits { - false => Pdis10::Value1, - true => Pdis10::Value2, + false => PDIS10_A::VALUE1, + true => PDIS10_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis10::Value1 + *self == PDIS10_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis10::Value2 + *self == PDIS10_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis11 { +pub enum PDIS11_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis11) -> Self { + fn from(variant: PDIS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS11` reader - Pad Disable for Port n Pin 11"] -pub type Pdis11R = crate::BitReader; -impl Pdis11R { +pub type PDIS11_R = crate::BitReader; +impl PDIS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis11 { + pub const fn variant(&self) -> PDIS11_A { match self.bits { - false => Pdis11::Value1, - true => Pdis11::Value2, + false => PDIS11_A::VALUE1, + true => PDIS11_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis11::Value1 + *self == PDIS11_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis11::Value2 + *self == PDIS11_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis12 { +pub enum PDIS12_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis12) -> Self { + fn from(variant: PDIS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS12` reader - Pad Disable for Port n Pin 12"] -pub type Pdis12R = crate::BitReader; -impl Pdis12R { +pub type PDIS12_R = crate::BitReader; +impl PDIS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis12 { + pub const fn variant(&self) -> PDIS12_A { match self.bits { - false => Pdis12::Value1, - true => Pdis12::Value2, + false => PDIS12_A::VALUE1, + true => PDIS12_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis12::Value1 + *self == PDIS12_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis12::Value2 + *self == PDIS12_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis13 { +pub enum PDIS13_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis13) -> Self { + fn from(variant: PDIS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS13` reader - Pad Disable for Port n Pin 13"] -pub type Pdis13R = crate::BitReader; -impl Pdis13R { +pub type PDIS13_R = crate::BitReader; +impl PDIS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis13 { + pub const fn variant(&self) -> PDIS13_A { match self.bits { - false => Pdis13::Value1, - true => Pdis13::Value2, + false => PDIS13_A::VALUE1, + true => PDIS13_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis13::Value1 + *self == PDIS13_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis13::Value2 + *self == PDIS13_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis14 { +pub enum PDIS14_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis14) -> Self { + fn from(variant: PDIS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS14` reader - Pad Disable for Port n Pin 14"] -pub type Pdis14R = crate::BitReader; -impl Pdis14R { +pub type PDIS14_R = crate::BitReader; +impl PDIS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis14 { + pub const fn variant(&self) -> PDIS14_A { match self.bits { - false => Pdis14::Value1, - true => Pdis14::Value2, + false => PDIS14_A::VALUE1, + true => PDIS14_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis14::Value1 + *self == PDIS14_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis14::Value2 + *self == PDIS14_A::VALUE2 } } #[doc = "Pad Disable for Port n Pin 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdis15 { +pub enum PDIS15_A { #[doc = "0: Pad Pn.x is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pad Pn.x is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdis15) -> Self { + fn from(variant: PDIS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDIS15` reader - Pad Disable for Port n Pin 15"] -pub type Pdis15R = crate::BitReader; -impl Pdis15R { +pub type PDIS15_R = crate::BitReader; +impl PDIS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdis15 { + pub const fn variant(&self) -> PDIS15_A { match self.bits { - false => Pdis15::Value1, - true => Pdis15::Value2, + false => PDIS15_A::VALUE1, + true => PDIS15_A::VALUE2, } } #[doc = "Pad Pn.x is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdis15::Value1 + *self == PDIS15_A::VALUE1 } #[doc = "Pad Pn.x is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdis15::Value2 + *self == PDIS15_A::VALUE2 } } impl R { #[doc = "Bit 0 - Pad Disable for Port n Pin 0"] #[inline(always)] - pub fn pdis0(&self) -> Pdis0R { - Pdis0R::new((self.bits & 1) != 0) + pub fn pdis0(&self) -> PDIS0_R { + PDIS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pad Disable for Port n Pin 1"] #[inline(always)] - pub fn pdis1(&self) -> Pdis1R { - Pdis1R::new(((self.bits >> 1) & 1) != 0) + pub fn pdis1(&self) -> PDIS1_R { + PDIS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Pad Disable for Port n Pin 2"] #[inline(always)] - pub fn pdis2(&self) -> Pdis2R { - Pdis2R::new(((self.bits >> 2) & 1) != 0) + pub fn pdis2(&self) -> PDIS2_R { + PDIS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Pad Disable for Port n Pin 3"] #[inline(always)] - pub fn pdis3(&self) -> Pdis3R { - Pdis3R::new(((self.bits >> 3) & 1) != 0) + pub fn pdis3(&self) -> PDIS3_R { + PDIS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Pad Disable for Port n Pin 4"] #[inline(always)] - pub fn pdis4(&self) -> Pdis4R { - Pdis4R::new(((self.bits >> 4) & 1) != 0) + pub fn pdis4(&self) -> PDIS4_R { + PDIS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Pad Disable for Port n Pin 5"] #[inline(always)] - pub fn pdis5(&self) -> Pdis5R { - Pdis5R::new(((self.bits >> 5) & 1) != 0) + pub fn pdis5(&self) -> PDIS5_R { + PDIS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Pad Disable for Port n Pin 6"] #[inline(always)] - pub fn pdis6(&self) -> Pdis6R { - Pdis6R::new(((self.bits >> 6) & 1) != 0) + pub fn pdis6(&self) -> PDIS6_R { + PDIS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Pad Disable for Port n Pin 7"] #[inline(always)] - pub fn pdis7(&self) -> Pdis7R { - Pdis7R::new(((self.bits >> 7) & 1) != 0) + pub fn pdis7(&self) -> PDIS7_R { + PDIS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Pad Disable for Port n Pin 8"] #[inline(always)] - pub fn pdis8(&self) -> Pdis8R { - Pdis8R::new(((self.bits >> 8) & 1) != 0) + pub fn pdis8(&self) -> PDIS8_R { + PDIS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Pad Disable for Port n Pin 9"] #[inline(always)] - pub fn pdis9(&self) -> Pdis9R { - Pdis9R::new(((self.bits >> 9) & 1) != 0) + pub fn pdis9(&self) -> PDIS9_R { + PDIS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Pad Disable for Port n Pin 10"] #[inline(always)] - pub fn pdis10(&self) -> Pdis10R { - Pdis10R::new(((self.bits >> 10) & 1) != 0) + pub fn pdis10(&self) -> PDIS10_R { + PDIS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Pad Disable for Port n Pin 11"] #[inline(always)] - pub fn pdis11(&self) -> Pdis11R { - Pdis11R::new(((self.bits >> 11) & 1) != 0) + pub fn pdis11(&self) -> PDIS11_R { + PDIS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Pad Disable for Port n Pin 12"] #[inline(always)] - pub fn pdis12(&self) -> Pdis12R { - Pdis12R::new(((self.bits >> 12) & 1) != 0) + pub fn pdis12(&self) -> PDIS12_R { + PDIS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Pad Disable for Port n Pin 13"] #[inline(always)] - pub fn pdis13(&self) -> Pdis13R { - Pdis13R::new(((self.bits >> 13) & 1) != 0) + pub fn pdis13(&self) -> PDIS13_R { + PDIS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Pad Disable for Port n Pin 14"] #[inline(always)] - pub fn pdis14(&self) -> Pdis14R { - Pdis14R::new(((self.bits >> 14) & 1) != 0) + pub fn pdis14(&self) -> PDIS14_R { + PDIS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Pad Disable for Port n Pin 15"] #[inline(always)] - pub fn pdis15(&self) -> Pdis15R { - Pdis15R::new(((self.bits >> 15) & 1) != 0) + pub fn pdis15(&self) -> PDIS15_R { + PDIS15_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Port 3 Pin Function Decision Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdisc::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdiscSpec; -impl crate::RegisterSpec for PdiscSpec { +pub struct PDISC_SPEC; +impl crate::RegisterSpec for PDISC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdisc::R`](R) reader structure"] -impl crate::Readable for PdiscSpec {} +impl crate::Readable for PDISC_SPEC {} #[doc = "`reset()` method sets PDISC to value 0"] -impl crate::Resettable for PdiscSpec { +impl crate::Resettable for PDISC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/port3/pdr0.rs b/src/port3/pdr0.rs index a1e249e0..52964a7a 100644 --- a/src/port3/pdr0.rs +++ b/src/port3/pdr0.rs @@ -1,145 +1,145 @@ #[doc = "Register `PDR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PDR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PD0` reader - Pad Driver Mode for Pn.0"] -pub type Pd0R = crate::FieldReader; +pub type PD0_R = crate::FieldReader; #[doc = "Field `PD0` writer - Pad Driver Mode for Pn.0"] -pub type Pd0W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD0_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD1` reader - Pad Driver Mode for Pn.1"] -pub type Pd1R = crate::FieldReader; +pub type PD1_R = crate::FieldReader; #[doc = "Field `PD1` writer - Pad Driver Mode for Pn.1"] -pub type Pd1W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD1_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD2` reader - Pad Driver Mode for Pn.2"] -pub type Pd2R = crate::FieldReader; +pub type PD2_R = crate::FieldReader; #[doc = "Field `PD2` writer - Pad Driver Mode for Pn.2"] -pub type Pd2W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD2_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD3` reader - Pad Driver Mode for Pn.3"] -pub type Pd3R = crate::FieldReader; +pub type PD3_R = crate::FieldReader; #[doc = "Field `PD3` writer - Pad Driver Mode for Pn.3"] -pub type Pd3W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD3_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD4` reader - Pad Driver Mode for Pn.4"] -pub type Pd4R = crate::FieldReader; +pub type PD4_R = crate::FieldReader; #[doc = "Field `PD4` writer - Pad Driver Mode for Pn.4"] -pub type Pd4W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD4_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD5` reader - Pad Driver Mode for Pn.5"] -pub type Pd5R = crate::FieldReader; +pub type PD5_R = crate::FieldReader; #[doc = "Field `PD5` writer - Pad Driver Mode for Pn.5"] -pub type Pd5W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD5_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD6` reader - Pad Driver Mode for Pn.6"] -pub type Pd6R = crate::FieldReader; +pub type PD6_R = crate::FieldReader; #[doc = "Field `PD6` writer - Pad Driver Mode for Pn.6"] -pub type Pd6W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD6_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PD7` reader - Pad Driver Mode for Pn.7"] -pub type Pd7R = crate::FieldReader; +pub type PD7_R = crate::FieldReader; #[doc = "Field `PD7` writer - Pad Driver Mode for Pn.7"] -pub type Pd7W<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PD7_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - pub fn pd0(&self) -> Pd0R { - Pd0R::new((self.bits & 7) as u8) + pub fn pd0(&self) -> PD0_R { + PD0_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - pub fn pd1(&self) -> Pd1R { - Pd1R::new(((self.bits >> 4) & 7) as u8) + pub fn pd1(&self) -> PD1_R { + PD1_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - pub fn pd2(&self) -> Pd2R { - Pd2R::new(((self.bits >> 8) & 7) as u8) + pub fn pd2(&self) -> PD2_R { + PD2_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - pub fn pd3(&self) -> Pd3R { - Pd3R::new(((self.bits >> 12) & 7) as u8) + pub fn pd3(&self) -> PD3_R { + PD3_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - pub fn pd4(&self) -> Pd4R { - Pd4R::new(((self.bits >> 16) & 7) as u8) + pub fn pd4(&self) -> PD4_R { + PD4_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - pub fn pd5(&self) -> Pd5R { - Pd5R::new(((self.bits >> 20) & 7) as u8) + pub fn pd5(&self) -> PD5_R { + PD5_R::new(((self.bits >> 20) & 7) as u8) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - pub fn pd6(&self) -> Pd6R { - Pd6R::new(((self.bits >> 24) & 7) as u8) + pub fn pd6(&self) -> PD6_R { + PD6_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - pub fn pd7(&self) -> Pd7R { - Pd7R::new(((self.bits >> 28) & 7) as u8) + pub fn pd7(&self) -> PD7_R { + PD7_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] #[must_use] - pub fn pd0(&mut self) -> Pd0W { - Pd0W::new(self, 0) + pub fn pd0(&mut self) -> PD0_W { + PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] #[must_use] - pub fn pd1(&mut self) -> Pd1W { - Pd1W::new(self, 4) + pub fn pd1(&mut self) -> PD1_W { + PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] #[must_use] - pub fn pd2(&mut self) -> Pd2W { - Pd2W::new(self, 8) + pub fn pd2(&mut self) -> PD2_W { + PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] #[must_use] - pub fn pd3(&mut self) -> Pd3W { - Pd3W::new(self, 12) + pub fn pd3(&mut self) -> PD3_W { + PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] #[must_use] - pub fn pd4(&mut self) -> Pd4W { - Pd4W::new(self, 16) + pub fn pd4(&mut self) -> PD4_W { + PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] #[must_use] - pub fn pd5(&mut self) -> Pd5W { - Pd5W::new(self, 20) + pub fn pd5(&mut self) -> PD5_W { + PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] #[must_use] - pub fn pd6(&mut self) -> Pd6W { - Pd6W::new(self, 24) + pub fn pd6(&mut self) -> PD6_W { + PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] #[must_use] - pub fn pd7(&mut self) -> Pd7W { - Pd7W::new(self, 28) + pub fn pd7(&mut self) -> PD7_W { + PD7_W::new(self, 28) } } #[doc = "Port 3 Pad Driver Mode 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pdr0Spec; -impl crate::RegisterSpec for Pdr0Spec { +pub struct PDR0_SPEC; +impl crate::RegisterSpec for PDR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdr0::R`](R) reader structure"] -impl crate::Readable for Pdr0Spec {} +impl crate::Readable for PDR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`pdr0::W`](W) writer structure"] -impl crate::Writable for Pdr0Spec { +impl crate::Writable for PDR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PDR0 to value 0x2222_2222"] -impl crate::Resettable for Pdr0Spec { +impl crate::Resettable for PDR0_SPEC { const RESET_VALUE: u32 = 0x2222_2222; } diff --git a/src/port3/pps.rs b/src/port3/pps.rs index 7ca37963..cafcfa28 100644 --- a/src/port3/pps.rs +++ b/src/port3/pps.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `PPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Port n Pin Power Save Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps0 { +pub enum PPS0_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps0) -> Self { + fn from(variant: PPS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS0` reader - Port n Pin Power Save Bit 0"] -pub type Pps0R = crate::BitReader; -impl Pps0R { +pub type PPS0_R = crate::BitReader; +impl PPS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps0 { + pub const fn variant(&self) -> PPS0_A { match self.bits { - false => Pps0::Value1, - true => Pps0::Value2, + false => PPS0_A::VALUE1, + true => PPS0_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps0::Value1 + *self == PPS0_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps0::Value2 + *self == PPS0_A::VALUE2 } } #[doc = "Field `PPS0` writer - Port n Pin Power Save Bit 0"] -pub type Pps0W<'a, REG> = crate::BitWriter<'a, REG, Pps0>; -impl<'a, REG> Pps0W<'a, REG> +pub type PPS0_W<'a, REG> = crate::BitWriter<'a, REG, PPS0_A>; +impl<'a, REG> PPS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps0::Value1) + self.variant(PPS0_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps0::Value2) + self.variant(PPS0_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps1 { +pub enum PPS1_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps1) -> Self { + fn from(variant: PPS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS1` reader - Port n Pin Power Save Bit 1"] -pub type Pps1R = crate::BitReader; -impl Pps1R { +pub type PPS1_R = crate::BitReader; +impl PPS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps1 { + pub const fn variant(&self) -> PPS1_A { match self.bits { - false => Pps1::Value1, - true => Pps1::Value2, + false => PPS1_A::VALUE1, + true => PPS1_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps1::Value1 + *self == PPS1_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps1::Value2 + *self == PPS1_A::VALUE2 } } #[doc = "Field `PPS1` writer - Port n Pin Power Save Bit 1"] -pub type Pps1W<'a, REG> = crate::BitWriter<'a, REG, Pps1>; -impl<'a, REG> Pps1W<'a, REG> +pub type PPS1_W<'a, REG> = crate::BitWriter<'a, REG, PPS1_A>; +impl<'a, REG> PPS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps1::Value1) + self.variant(PPS1_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps1::Value2) + self.variant(PPS1_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps2 { +pub enum PPS2_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps2) -> Self { + fn from(variant: PPS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS2` reader - Port n Pin Power Save Bit 2"] -pub type Pps2R = crate::BitReader; -impl Pps2R { +pub type PPS2_R = crate::BitReader; +impl PPS2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps2 { + pub const fn variant(&self) -> PPS2_A { match self.bits { - false => Pps2::Value1, - true => Pps2::Value2, + false => PPS2_A::VALUE1, + true => PPS2_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps2::Value1 + *self == PPS2_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps2::Value2 + *self == PPS2_A::VALUE2 } } #[doc = "Field `PPS2` writer - Port n Pin Power Save Bit 2"] -pub type Pps2W<'a, REG> = crate::BitWriter<'a, REG, Pps2>; -impl<'a, REG> Pps2W<'a, REG> +pub type PPS2_W<'a, REG> = crate::BitWriter<'a, REG, PPS2_A>; +impl<'a, REG> PPS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps2::Value1) + self.variant(PPS2_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps2::Value2) + self.variant(PPS2_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps3 { +pub enum PPS3_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps3) -> Self { + fn from(variant: PPS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS3` reader - Port n Pin Power Save Bit 3"] -pub type Pps3R = crate::BitReader; -impl Pps3R { +pub type PPS3_R = crate::BitReader; +impl PPS3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps3 { + pub const fn variant(&self) -> PPS3_A { match self.bits { - false => Pps3::Value1, - true => Pps3::Value2, + false => PPS3_A::VALUE1, + true => PPS3_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps3::Value1 + *self == PPS3_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps3::Value2 + *self == PPS3_A::VALUE2 } } #[doc = "Field `PPS3` writer - Port n Pin Power Save Bit 3"] -pub type Pps3W<'a, REG> = crate::BitWriter<'a, REG, Pps3>; -impl<'a, REG> Pps3W<'a, REG> +pub type PPS3_W<'a, REG> = crate::BitWriter<'a, REG, PPS3_A>; +impl<'a, REG> PPS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps3::Value1) + self.variant(PPS3_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps3::Value2) + self.variant(PPS3_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps4 { +pub enum PPS4_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps4) -> Self { + fn from(variant: PPS4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS4` reader - Port n Pin Power Save Bit 4"] -pub type Pps4R = crate::BitReader; -impl Pps4R { +pub type PPS4_R = crate::BitReader; +impl PPS4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps4 { + pub const fn variant(&self) -> PPS4_A { match self.bits { - false => Pps4::Value1, - true => Pps4::Value2, + false => PPS4_A::VALUE1, + true => PPS4_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps4::Value1 + *self == PPS4_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps4::Value2 + *self == PPS4_A::VALUE2 } } #[doc = "Field `PPS4` writer - Port n Pin Power Save Bit 4"] -pub type Pps4W<'a, REG> = crate::BitWriter<'a, REG, Pps4>; -impl<'a, REG> Pps4W<'a, REG> +pub type PPS4_W<'a, REG> = crate::BitWriter<'a, REG, PPS4_A>; +impl<'a, REG> PPS4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps4::Value1) + self.variant(PPS4_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps4::Value2) + self.variant(PPS4_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps5 { +pub enum PPS5_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps5) -> Self { + fn from(variant: PPS5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS5` reader - Port n Pin Power Save Bit 5"] -pub type Pps5R = crate::BitReader; -impl Pps5R { +pub type PPS5_R = crate::BitReader; +impl PPS5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps5 { + pub const fn variant(&self) -> PPS5_A { match self.bits { - false => Pps5::Value1, - true => Pps5::Value2, + false => PPS5_A::VALUE1, + true => PPS5_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps5::Value1 + *self == PPS5_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps5::Value2 + *self == PPS5_A::VALUE2 } } #[doc = "Field `PPS5` writer - Port n Pin Power Save Bit 5"] -pub type Pps5W<'a, REG> = crate::BitWriter<'a, REG, Pps5>; -impl<'a, REG> Pps5W<'a, REG> +pub type PPS5_W<'a, REG> = crate::BitWriter<'a, REG, PPS5_A>; +impl<'a, REG> PPS5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps5::Value1) + self.variant(PPS5_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps5::Value2) + self.variant(PPS5_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps6 { +pub enum PPS6_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps6) -> Self { + fn from(variant: PPS6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS6` reader - Port n Pin Power Save Bit 6"] -pub type Pps6R = crate::BitReader; -impl Pps6R { +pub type PPS6_R = crate::BitReader; +impl PPS6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps6 { + pub const fn variant(&self) -> PPS6_A { match self.bits { - false => Pps6::Value1, - true => Pps6::Value2, + false => PPS6_A::VALUE1, + true => PPS6_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps6::Value1 + *self == PPS6_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps6::Value2 + *self == PPS6_A::VALUE2 } } #[doc = "Field `PPS6` writer - Port n Pin Power Save Bit 6"] -pub type Pps6W<'a, REG> = crate::BitWriter<'a, REG, Pps6>; -impl<'a, REG> Pps6W<'a, REG> +pub type PPS6_W<'a, REG> = crate::BitWriter<'a, REG, PPS6_A>; +impl<'a, REG> PPS6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps6::Value1) + self.variant(PPS6_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps6::Value2) + self.variant(PPS6_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps7 { +pub enum PPS7_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps7) -> Self { + fn from(variant: PPS7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS7` reader - Port n Pin Power Save Bit 7"] -pub type Pps7R = crate::BitReader; -impl Pps7R { +pub type PPS7_R = crate::BitReader; +impl PPS7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps7 { + pub const fn variant(&self) -> PPS7_A { match self.bits { - false => Pps7::Value1, - true => Pps7::Value2, + false => PPS7_A::VALUE1, + true => PPS7_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps7::Value1 + *self == PPS7_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps7::Value2 + *self == PPS7_A::VALUE2 } } #[doc = "Field `PPS7` writer - Port n Pin Power Save Bit 7"] -pub type Pps7W<'a, REG> = crate::BitWriter<'a, REG, Pps7>; -impl<'a, REG> Pps7W<'a, REG> +pub type PPS7_W<'a, REG> = crate::BitWriter<'a, REG, PPS7_A>; +impl<'a, REG> PPS7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps7::Value1) + self.variant(PPS7_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps7::Value2) + self.variant(PPS7_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps8 { +pub enum PPS8_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps8) -> Self { + fn from(variant: PPS8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS8` reader - Port n Pin Power Save Bit 8"] -pub type Pps8R = crate::BitReader; -impl Pps8R { +pub type PPS8_R = crate::BitReader; +impl PPS8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps8 { + pub const fn variant(&self) -> PPS8_A { match self.bits { - false => Pps8::Value1, - true => Pps8::Value2, + false => PPS8_A::VALUE1, + true => PPS8_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps8::Value1 + *self == PPS8_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps8::Value2 + *self == PPS8_A::VALUE2 } } #[doc = "Field `PPS8` writer - Port n Pin Power Save Bit 8"] -pub type Pps8W<'a, REG> = crate::BitWriter<'a, REG, Pps8>; -impl<'a, REG> Pps8W<'a, REG> +pub type PPS8_W<'a, REG> = crate::BitWriter<'a, REG, PPS8_A>; +impl<'a, REG> PPS8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps8::Value1) + self.variant(PPS8_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps8::Value2) + self.variant(PPS8_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps9 { +pub enum PPS9_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps9) -> Self { + fn from(variant: PPS9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS9` reader - Port n Pin Power Save Bit 9"] -pub type Pps9R = crate::BitReader; -impl Pps9R { +pub type PPS9_R = crate::BitReader; +impl PPS9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps9 { + pub const fn variant(&self) -> PPS9_A { match self.bits { - false => Pps9::Value1, - true => Pps9::Value2, + false => PPS9_A::VALUE1, + true => PPS9_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps9::Value1 + *self == PPS9_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps9::Value2 + *self == PPS9_A::VALUE2 } } #[doc = "Field `PPS9` writer - Port n Pin Power Save Bit 9"] -pub type Pps9W<'a, REG> = crate::BitWriter<'a, REG, Pps9>; -impl<'a, REG> Pps9W<'a, REG> +pub type PPS9_W<'a, REG> = crate::BitWriter<'a, REG, PPS9_A>; +impl<'a, REG> PPS9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps9::Value1) + self.variant(PPS9_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps9::Value2) + self.variant(PPS9_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps10 { +pub enum PPS10_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps10) -> Self { + fn from(variant: PPS10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS10` reader - Port n Pin Power Save Bit 10"] -pub type Pps10R = crate::BitReader; -impl Pps10R { +pub type PPS10_R = crate::BitReader; +impl PPS10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps10 { + pub const fn variant(&self) -> PPS10_A { match self.bits { - false => Pps10::Value1, - true => Pps10::Value2, + false => PPS10_A::VALUE1, + true => PPS10_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps10::Value1 + *self == PPS10_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps10::Value2 + *self == PPS10_A::VALUE2 } } #[doc = "Field `PPS10` writer - Port n Pin Power Save Bit 10"] -pub type Pps10W<'a, REG> = crate::BitWriter<'a, REG, Pps10>; -impl<'a, REG> Pps10W<'a, REG> +pub type PPS10_W<'a, REG> = crate::BitWriter<'a, REG, PPS10_A>; +impl<'a, REG> PPS10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps10::Value1) + self.variant(PPS10_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps10::Value2) + self.variant(PPS10_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps11 { +pub enum PPS11_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps11) -> Self { + fn from(variant: PPS11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS11` reader - Port n Pin Power Save Bit 11"] -pub type Pps11R = crate::BitReader; -impl Pps11R { +pub type PPS11_R = crate::BitReader; +impl PPS11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps11 { + pub const fn variant(&self) -> PPS11_A { match self.bits { - false => Pps11::Value1, - true => Pps11::Value2, + false => PPS11_A::VALUE1, + true => PPS11_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps11::Value1 + *self == PPS11_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps11::Value2 + *self == PPS11_A::VALUE2 } } #[doc = "Field `PPS11` writer - Port n Pin Power Save Bit 11"] -pub type Pps11W<'a, REG> = crate::BitWriter<'a, REG, Pps11>; -impl<'a, REG> Pps11W<'a, REG> +pub type PPS11_W<'a, REG> = crate::BitWriter<'a, REG, PPS11_A>; +impl<'a, REG> PPS11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps11::Value1) + self.variant(PPS11_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps11::Value2) + self.variant(PPS11_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps12 { +pub enum PPS12_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps12) -> Self { + fn from(variant: PPS12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS12` reader - Port n Pin Power Save Bit 12"] -pub type Pps12R = crate::BitReader; -impl Pps12R { +pub type PPS12_R = crate::BitReader; +impl PPS12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps12 { + pub const fn variant(&self) -> PPS12_A { match self.bits { - false => Pps12::Value1, - true => Pps12::Value2, + false => PPS12_A::VALUE1, + true => PPS12_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps12::Value1 + *self == PPS12_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps12::Value2 + *self == PPS12_A::VALUE2 } } #[doc = "Field `PPS12` writer - Port n Pin Power Save Bit 12"] -pub type Pps12W<'a, REG> = crate::BitWriter<'a, REG, Pps12>; -impl<'a, REG> Pps12W<'a, REG> +pub type PPS12_W<'a, REG> = crate::BitWriter<'a, REG, PPS12_A>; +impl<'a, REG> PPS12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps12::Value1) + self.variant(PPS12_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps12::Value2) + self.variant(PPS12_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps13 { +pub enum PPS13_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps13) -> Self { + fn from(variant: PPS13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS13` reader - Port n Pin Power Save Bit 13"] -pub type Pps13R = crate::BitReader; -impl Pps13R { +pub type PPS13_R = crate::BitReader; +impl PPS13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps13 { + pub const fn variant(&self) -> PPS13_A { match self.bits { - false => Pps13::Value1, - true => Pps13::Value2, + false => PPS13_A::VALUE1, + true => PPS13_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps13::Value1 + *self == PPS13_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps13::Value2 + *self == PPS13_A::VALUE2 } } #[doc = "Field `PPS13` writer - Port n Pin Power Save Bit 13"] -pub type Pps13W<'a, REG> = crate::BitWriter<'a, REG, Pps13>; -impl<'a, REG> Pps13W<'a, REG> +pub type PPS13_W<'a, REG> = crate::BitWriter<'a, REG, PPS13_A>; +impl<'a, REG> PPS13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps13::Value1) + self.variant(PPS13_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps13::Value2) + self.variant(PPS13_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps14 { +pub enum PPS14_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps14) -> Self { + fn from(variant: PPS14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS14` reader - Port n Pin Power Save Bit 14"] -pub type Pps14R = crate::BitReader; -impl Pps14R { +pub type PPS14_R = crate::BitReader; +impl PPS14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps14 { + pub const fn variant(&self) -> PPS14_A { match self.bits { - false => Pps14::Value1, - true => Pps14::Value2, + false => PPS14_A::VALUE1, + true => PPS14_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps14::Value1 + *self == PPS14_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps14::Value2 + *self == PPS14_A::VALUE2 } } #[doc = "Field `PPS14` writer - Port n Pin Power Save Bit 14"] -pub type Pps14W<'a, REG> = crate::BitWriter<'a, REG, Pps14>; -impl<'a, REG> Pps14W<'a, REG> +pub type PPS14_W<'a, REG> = crate::BitWriter<'a, REG, PPS14_A>; +impl<'a, REG> PPS14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps14::Value1) + self.variant(PPS14_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps14::Value2) + self.variant(PPS14_A::VALUE2) } } #[doc = "Port n Pin Power Save Bit 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pps15 { +pub enum PPS15_A { #[doc = "0: Pin Power Save of Pn.x is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pin Power Save of Pn.x is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pps15) -> Self { + fn from(variant: PPS15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPS15` reader - Port n Pin Power Save Bit 15"] -pub type Pps15R = crate::BitReader; -impl Pps15R { +pub type PPS15_R = crate::BitReader; +impl PPS15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pps15 { + pub const fn variant(&self) -> PPS15_A { match self.bits { - false => Pps15::Value1, - true => Pps15::Value2, + false => PPS15_A::VALUE1, + true => PPS15_A::VALUE2, } } #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pps15::Value1 + *self == PPS15_A::VALUE1 } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pps15::Value2 + *self == PPS15_A::VALUE2 } } #[doc = "Field `PPS15` writer - Port n Pin Power Save Bit 15"] -pub type Pps15W<'a, REG> = crate::BitWriter<'a, REG, Pps15>; -impl<'a, REG> Pps15W<'a, REG> +pub type PPS15_W<'a, REG> = crate::BitWriter<'a, REG, PPS15_A>; +impl<'a, REG> PPS15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Pin Power Save of Pn.x is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pps15::Value1) + self.variant(PPS15_A::VALUE1) } #[doc = "Pin Power Save of Pn.x is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pps15::Value2) + self.variant(PPS15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - pub fn pps0(&self) -> Pps0R { - Pps0R::new((self.bits & 1) != 0) + pub fn pps0(&self) -> PPS0_R { + PPS0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - pub fn pps1(&self) -> Pps1R { - Pps1R::new(((self.bits >> 1) & 1) != 0) + pub fn pps1(&self) -> PPS1_R { + PPS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - pub fn pps2(&self) -> Pps2R { - Pps2R::new(((self.bits >> 2) & 1) != 0) + pub fn pps2(&self) -> PPS2_R { + PPS2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - pub fn pps3(&self) -> Pps3R { - Pps3R::new(((self.bits >> 3) & 1) != 0) + pub fn pps3(&self) -> PPS3_R { + PPS3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - pub fn pps4(&self) -> Pps4R { - Pps4R::new(((self.bits >> 4) & 1) != 0) + pub fn pps4(&self) -> PPS4_R { + PPS4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - pub fn pps5(&self) -> Pps5R { - Pps5R::new(((self.bits >> 5) & 1) != 0) + pub fn pps5(&self) -> PPS5_R { + PPS5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - pub fn pps6(&self) -> Pps6R { - Pps6R::new(((self.bits >> 6) & 1) != 0) + pub fn pps6(&self) -> PPS6_R { + PPS6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - pub fn pps7(&self) -> Pps7R { - Pps7R::new(((self.bits >> 7) & 1) != 0) + pub fn pps7(&self) -> PPS7_R { + PPS7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - pub fn pps8(&self) -> Pps8R { - Pps8R::new(((self.bits >> 8) & 1) != 0) + pub fn pps8(&self) -> PPS8_R { + PPS8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - pub fn pps9(&self) -> Pps9R { - Pps9R::new(((self.bits >> 9) & 1) != 0) + pub fn pps9(&self) -> PPS9_R { + PPS9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - pub fn pps10(&self) -> Pps10R { - Pps10R::new(((self.bits >> 10) & 1) != 0) + pub fn pps10(&self) -> PPS10_R { + PPS10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - pub fn pps11(&self) -> Pps11R { - Pps11R::new(((self.bits >> 11) & 1) != 0) + pub fn pps11(&self) -> PPS11_R { + PPS11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - pub fn pps12(&self) -> Pps12R { - Pps12R::new(((self.bits >> 12) & 1) != 0) + pub fn pps12(&self) -> PPS12_R { + PPS12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - pub fn pps13(&self) -> Pps13R { - Pps13R::new(((self.bits >> 13) & 1) != 0) + pub fn pps13(&self) -> PPS13_R { + PPS13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - pub fn pps14(&self) -> Pps14R { - Pps14R::new(((self.bits >> 14) & 1) != 0) + pub fn pps14(&self) -> PPS14_R { + PPS14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - pub fn pps15(&self) -> Pps15R { - Pps15R::new(((self.bits >> 15) & 1) != 0) + pub fn pps15(&self) -> PPS15_R { + PPS15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] #[must_use] - pub fn pps0(&mut self) -> Pps0W { - Pps0W::new(self, 0) + pub fn pps0(&mut self) -> PPS0_W { + PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] #[must_use] - pub fn pps1(&mut self) -> Pps1W { - Pps1W::new(self, 1) + pub fn pps1(&mut self) -> PPS1_W { + PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] #[must_use] - pub fn pps2(&mut self) -> Pps2W { - Pps2W::new(self, 2) + pub fn pps2(&mut self) -> PPS2_W { + PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] #[must_use] - pub fn pps3(&mut self) -> Pps3W { - Pps3W::new(self, 3) + pub fn pps3(&mut self) -> PPS3_W { + PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] #[must_use] - pub fn pps4(&mut self) -> Pps4W { - Pps4W::new(self, 4) + pub fn pps4(&mut self) -> PPS4_W { + PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] #[must_use] - pub fn pps5(&mut self) -> Pps5W { - Pps5W::new(self, 5) + pub fn pps5(&mut self) -> PPS5_W { + PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] #[must_use] - pub fn pps6(&mut self) -> Pps6W { - Pps6W::new(self, 6) + pub fn pps6(&mut self) -> PPS6_W { + PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] #[must_use] - pub fn pps7(&mut self) -> Pps7W { - Pps7W::new(self, 7) + pub fn pps7(&mut self) -> PPS7_W { + PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] #[must_use] - pub fn pps8(&mut self) -> Pps8W { - Pps8W::new(self, 8) + pub fn pps8(&mut self) -> PPS8_W { + PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] #[must_use] - pub fn pps9(&mut self) -> Pps9W { - Pps9W::new(self, 9) + pub fn pps9(&mut self) -> PPS9_W { + PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] #[must_use] - pub fn pps10(&mut self) -> Pps10W { - Pps10W::new(self, 10) + pub fn pps10(&mut self) -> PPS10_W { + PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] #[must_use] - pub fn pps11(&mut self) -> Pps11W { - Pps11W::new(self, 11) + pub fn pps11(&mut self) -> PPS11_W { + PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] #[must_use] - pub fn pps12(&mut self) -> Pps12W { - Pps12W::new(self, 12) + pub fn pps12(&mut self) -> PPS12_W { + PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] #[must_use] - pub fn pps13(&mut self) -> Pps13W { - Pps13W::new(self, 13) + pub fn pps13(&mut self) -> PPS13_W { + PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] #[must_use] - pub fn pps14(&mut self) -> Pps14W { - Pps14W::new(self, 14) + pub fn pps14(&mut self) -> PPS14_W { + PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] #[must_use] - pub fn pps15(&mut self) -> Pps15W { - Pps15W::new(self, 15) + pub fn pps15(&mut self) -> PPS15_W { + PPS15_W::new(self, 15) } } #[doc = "Port 3 Pin Power Save Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PpsSpec; -impl crate::RegisterSpec for PpsSpec { +pub struct PPS_SPEC; +impl crate::RegisterSpec for PPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pps::R`](R) reader structure"] -impl crate::Readable for PpsSpec {} +impl crate::Readable for PPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`pps::W`](W) writer structure"] -impl crate::Writable for PpsSpec { +impl crate::Writable for PPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PPS to value 0"] -impl crate::Resettable for PpsSpec { +impl crate::Resettable for PPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0.rs b/src/posif0.rs index 1416fba2..12ca524d 100644 --- a/src/posif0.rs +++ b/src/posif0.rs @@ -1,240 +1,221 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - pconf: Pconf, - psus: Psus, - pruns: Pruns, - prunc: Prunc, - prun: Prun, + pconf: PCONF, + psus: PSUS, + pruns: PRUNS, + prunc: PRUNC, + prun: PRUN, _reserved5: [u8; 0x0c], - midr: Midr, + midr: MIDR, _reserved6: [u8; 0x0c], - halp: Halp, - halps: Halps, + halp: HALP, + halps: HALPS, _reserved8: [u8; 0x08], - mcm: Mcm, - mcsm: Mcsm, - mcms: Mcms, - mcmc: Mcmc, - mcmf: Mcmf, + mcm: MCM, + mcsm: MCSM, + mcms: MCMS, + mcmc: MCMC, + mcmf: MCMF, _reserved13: [u8; 0x0c], - qdc: Qdc, + qdc: QDC, _reserved14: [u8; 0x0c], - pflg: Pflg, - pflge: Pflge, - spflg: Spflg, - rpflg: Rpflg, + pflg: PFLG, + pflge: PFLGE, + spflg: SPFLG, + rpflg: RPFLG, _reserved18: [u8; 0x80], - pdbg: Pdbg, + pdbg: PDBG, } impl RegisterBlock { #[doc = "0x00 - Service Request Processing configuration"] #[inline(always)] - pub const fn pconf(&self) -> &Pconf { + pub const fn pconf(&self) -> &PCONF { &self.pconf } #[doc = "0x04 - Service Request Processing Suspend Config"] #[inline(always)] - pub const fn psus(&self) -> &Psus { + pub const fn psus(&self) -> &PSUS { &self.psus } #[doc = "0x08 - Service Request Processing Run Bit Set"] #[inline(always)] - pub const fn pruns(&self) -> &Pruns { + pub const fn pruns(&self) -> &PRUNS { &self.pruns } #[doc = "0x0c - Service Request Processing Run Bit Clear"] #[inline(always)] - pub const fn prunc(&self) -> &Prunc { + pub const fn prunc(&self) -> &PRUNC { &self.prunc } #[doc = "0x10 - Service Request Processing Run Bit Status"] #[inline(always)] - pub const fn prun(&self) -> &Prun { + pub const fn prun(&self) -> &PRUN { &self.prun } #[doc = "0x20 - Module Identification register"] #[inline(always)] - pub const fn midr(&self) -> &Midr { + pub const fn midr(&self) -> &MIDR { &self.midr } #[doc = "0x30 - Hall Sensor Patterns"] #[inline(always)] - pub const fn halp(&self) -> &Halp { + pub const fn halp(&self) -> &HALP { &self.halp } #[doc = "0x34 - Hall Sensor Shadow Patterns"] #[inline(always)] - pub const fn halps(&self) -> &Halps { + pub const fn halps(&self) -> &HALPS { &self.halps } #[doc = "0x40 - Multi-Channel Pattern"] #[inline(always)] - pub const fn mcm(&self) -> &Mcm { + pub const fn mcm(&self) -> &MCM { &self.mcm } #[doc = "0x44 - Multi-Channel Shadow Pattern"] #[inline(always)] - pub const fn mcsm(&self) -> &Mcsm { + pub const fn mcsm(&self) -> &MCSM { &self.mcsm } #[doc = "0x48 - Multi-Channel Pattern Control set"] #[inline(always)] - pub const fn mcms(&self) -> &Mcms { + pub const fn mcms(&self) -> &MCMS { &self.mcms } #[doc = "0x4c - Multi-Channel Pattern Control clear"] #[inline(always)] - pub const fn mcmc(&self) -> &Mcmc { + pub const fn mcmc(&self) -> &MCMC { &self.mcmc } #[doc = "0x50 - Multi-Channel Pattern Control flag"] #[inline(always)] - pub const fn mcmf(&self) -> &Mcmf { + pub const fn mcmf(&self) -> &MCMF { &self.mcmf } #[doc = "0x60 - Quadrature Decoder Control"] #[inline(always)] - pub const fn qdc(&self) -> &Qdc { + pub const fn qdc(&self) -> &QDC { &self.qdc } #[doc = "0x70 - Service Request Processing Interrupt Flags"] #[inline(always)] - pub const fn pflg(&self) -> &Pflg { + pub const fn pflg(&self) -> &PFLG { &self.pflg } #[doc = "0x74 - Service Request Processing Interrupt Enable"] #[inline(always)] - pub const fn pflge(&self) -> &Pflge { + pub const fn pflge(&self) -> &PFLGE { &self.pflge } #[doc = "0x78 - Service Request Processing Interrupt Set"] #[inline(always)] - pub const fn spflg(&self) -> &Spflg { + pub const fn spflg(&self) -> &SPFLG { &self.spflg } #[doc = "0x7c - Service Request Processing Interrupt Clear"] #[inline(always)] - pub const fn rpflg(&self) -> &Rpflg { + pub const fn rpflg(&self) -> &RPFLG { &self.rpflg } #[doc = "0x100 - POSIF Debug register"] #[inline(always)] - pub const fn pdbg(&self) -> &Pdbg { + pub const fn pdbg(&self) -> &PDBG { &self.pdbg } } #[doc = "PCONF (rw) register accessor: Service Request Processing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pconf`] module"] -#[doc(alias = "PCONF")] -pub type Pconf = crate::Reg; +pub type PCONF = crate::Reg; #[doc = "Service Request Processing configuration"] pub mod pconf; #[doc = "PSUS (rw) register accessor: Service Request Processing Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psus`] module"] -#[doc(alias = "PSUS")] -pub type Psus = crate::Reg; +pub type PSUS = crate::Reg; #[doc = "Service Request Processing Suspend Config"] pub mod psus; #[doc = "PRUNS (w) register accessor: Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pruns`] module"] -#[doc(alias = "PRUNS")] -pub type Pruns = crate::Reg; +pub type PRUNS = crate::Reg; #[doc = "Service Request Processing Run Bit Set"] pub mod pruns; #[doc = "PRUNC (w) register accessor: Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prunc`] module"] -#[doc(alias = "PRUNC")] -pub type Prunc = crate::Reg; +pub type PRUNC = crate::Reg; #[doc = "Service Request Processing Run Bit Clear"] pub mod prunc; #[doc = "PRUN (r) register accessor: Service Request Processing Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prun`] module"] -#[doc(alias = "PRUN")] -pub type Prun = crate::Reg; +pub type PRUN = crate::Reg; #[doc = "Service Request Processing Run Bit Status"] pub mod prun; #[doc = "MIDR (r) register accessor: Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@midr`] module"] -#[doc(alias = "MIDR")] -pub type Midr = crate::Reg; +pub type MIDR = crate::Reg; #[doc = "Module Identification register"] pub mod midr; #[doc = "HALP (r) register accessor: Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halp`] module"] -#[doc(alias = "HALP")] -pub type Halp = crate::Reg; +pub type HALP = crate::Reg; #[doc = "Hall Sensor Patterns"] pub mod halp; #[doc = "HALPS (rw) register accessor: Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@halps`] module"] -#[doc(alias = "HALPS")] -pub type Halps = crate::Reg; +pub type HALPS = crate::Reg; #[doc = "Hall Sensor Shadow Patterns"] pub mod halps; #[doc = "MCM (r) register accessor: Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcm`] module"] -#[doc(alias = "MCM")] -pub type Mcm = crate::Reg; +pub type MCM = crate::Reg; #[doc = "Multi-Channel Pattern"] pub mod mcm; #[doc = "MCSM (rw) register accessor: Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcsm`] module"] -#[doc(alias = "MCSM")] -pub type Mcsm = crate::Reg; +pub type MCSM = crate::Reg; #[doc = "Multi-Channel Shadow Pattern"] pub mod mcsm; #[doc = "MCMS (w) register accessor: Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcms`] module"] -#[doc(alias = "MCMS")] -pub type Mcms = crate::Reg; +pub type MCMS = crate::Reg; #[doc = "Multi-Channel Pattern Control set"] pub mod mcms; #[doc = "MCMC (w) register accessor: Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmc`] module"] -#[doc(alias = "MCMC")] -pub type Mcmc = crate::Reg; +pub type MCMC = crate::Reg; #[doc = "Multi-Channel Pattern Control clear"] pub mod mcmc; #[doc = "MCMF (r) register accessor: Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mcmf`] module"] -#[doc(alias = "MCMF")] -pub type Mcmf = crate::Reg; +pub type MCMF = crate::Reg; #[doc = "Multi-Channel Pattern Control flag"] pub mod mcmf; #[doc = "QDC (rw) register accessor: Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qdc`] module"] -#[doc(alias = "QDC")] -pub type Qdc = crate::Reg; +pub type QDC = crate::Reg; #[doc = "Quadrature Decoder Control"] pub mod qdc; #[doc = "PFLG (r) register accessor: Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflg`] module"] -#[doc(alias = "PFLG")] -pub type Pflg = crate::Reg; +pub type PFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Flags"] pub mod pflg; #[doc = "PFLGE (rw) register accessor: Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pflge`] module"] -#[doc(alias = "PFLGE")] -pub type Pflge = crate::Reg; +pub type PFLGE = crate::Reg; #[doc = "Service Request Processing Interrupt Enable"] pub mod pflge; #[doc = "SPFLG (w) register accessor: Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spflg`] module"] -#[doc(alias = "SPFLG")] -pub type Spflg = crate::Reg; +pub type SPFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Set"] pub mod spflg; #[doc = "RPFLG (w) register accessor: Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rpflg`] module"] -#[doc(alias = "RPFLG")] -pub type Rpflg = crate::Reg; +pub type RPFLG = crate::Reg; #[doc = "Service Request Processing Interrupt Clear"] pub mod rpflg; #[doc = "PDBG (r) register accessor: POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdbg`] module"] -#[doc(alias = "PDBG")] -pub type Pdbg = crate::Reg; +pub type PDBG = crate::Reg; #[doc = "POSIF Debug register"] pub mod pdbg; diff --git a/src/posif0/halp.rs b/src/posif0/halp.rs index ce970a8a..4cb95afd 100644 --- a/src/posif0/halp.rs +++ b/src/posif0/halp.rs @@ -1,29 +1,29 @@ #[doc = "Register `HALP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `HCP` reader - Hall Current Pattern"] -pub type HcpR = crate::FieldReader; +pub type HCP_R = crate::FieldReader; #[doc = "Field `HEP` reader - Hall Expected Pattern"] -pub type HepR = crate::FieldReader; +pub type HEP_R = crate::FieldReader; impl R { #[doc = "Bits 0:2 - Hall Current Pattern"] #[inline(always)] - pub fn hcp(&self) -> HcpR { - HcpR::new((self.bits & 7) as u8) + pub fn hcp(&self) -> HCP_R { + HCP_R::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Hall Expected Pattern"] #[inline(always)] - pub fn hep(&self) -> HepR { - HepR::new(((self.bits >> 3) & 7) as u8) + pub fn hep(&self) -> HEP_R { + HEP_R::new(((self.bits >> 3) & 7) as u8) } } #[doc = "Hall Sensor Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halp::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HalpSpec; -impl crate::RegisterSpec for HalpSpec { +pub struct HALP_SPEC; +impl crate::RegisterSpec for HALP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`halp::R`](R) reader structure"] -impl crate::Readable for HalpSpec {} +impl crate::Readable for HALP_SPEC {} #[doc = "`reset()` method sets HALP to value 0"] -impl crate::Resettable for HalpSpec { +impl crate::Resettable for HALP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/halps.rs b/src/posif0/halps.rs index ad09cfb0..b754bb83 100644 --- a/src/posif0/halps.rs +++ b/src/posif0/halps.rs @@ -1,55 +1,55 @@ #[doc = "Register `HALPS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HALPS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `HCPS` reader - Shadow Hall Current Pattern"] -pub type HcpsR = crate::FieldReader; +pub type HCPS_R = crate::FieldReader; #[doc = "Field `HCPS` writer - Shadow Hall Current Pattern"] -pub type HcpsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type HCPS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `HEPS` reader - Shadow Hall expected Pattern"] -pub type HepsR = crate::FieldReader; +pub type HEPS_R = crate::FieldReader; #[doc = "Field `HEPS` writer - Shadow Hall expected Pattern"] -pub type HepsW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type HEPS_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Shadow Hall Current Pattern"] #[inline(always)] - pub fn hcps(&self) -> HcpsR { - HcpsR::new((self.bits & 7) as u8) + pub fn hcps(&self) -> HCPS_R { + HCPS_R::new((self.bits & 7) as u8) } #[doc = "Bits 3:5 - Shadow Hall expected Pattern"] #[inline(always)] - pub fn heps(&self) -> HepsR { - HepsR::new(((self.bits >> 3) & 7) as u8) + pub fn heps(&self) -> HEPS_R { + HEPS_R::new(((self.bits >> 3) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Shadow Hall Current Pattern"] #[inline(always)] #[must_use] - pub fn hcps(&mut self) -> HcpsW { - HcpsW::new(self, 0) + pub fn hcps(&mut self) -> HCPS_W { + HCPS_W::new(self, 0) } #[doc = "Bits 3:5 - Shadow Hall expected Pattern"] #[inline(always)] #[must_use] - pub fn heps(&mut self) -> HepsW { - HepsW::new(self, 3) + pub fn heps(&mut self) -> HEPS_W { + HEPS_W::new(self, 3) } } #[doc = "Hall Sensor Shadow Patterns\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`halps::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`halps::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HalpsSpec; -impl crate::RegisterSpec for HalpsSpec { +pub struct HALPS_SPEC; +impl crate::RegisterSpec for HALPS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`halps::R`](R) reader structure"] -impl crate::Readable for HalpsSpec {} +impl crate::Readable for HALPS_SPEC {} #[doc = "`write(|w| ..)` method takes [`halps::W`](W) writer structure"] -impl crate::Writable for HalpsSpec { +impl crate::Writable for HALPS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HALPS to value 0"] -impl crate::Resettable for HalpsSpec { +impl crate::Resettable for HALPS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcm.rs b/src/posif0/mcm.rs index 67736a6d..5c7adf9c 100644 --- a/src/posif0/mcm.rs +++ b/src/posif0/mcm.rs @@ -1,22 +1,22 @@ #[doc = "Register `MCM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MCMP` reader - Multi-Channel Pattern"] -pub type McmpR = crate::FieldReader; +pub type MCMP_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Multi-Channel Pattern"] #[inline(always)] - pub fn mcmp(&self) -> McmpR { - McmpR::new((self.bits & 0xffff) as u16) + pub fn mcmp(&self) -> MCMP_R { + MCMP_R::new((self.bits & 0xffff) as u16) } } #[doc = "Multi-Channel Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McmSpec; -impl crate::RegisterSpec for McmSpec { +pub struct MCM_SPEC; +impl crate::RegisterSpec for MCM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mcm::R`](R) reader structure"] -impl crate::Readable for McmSpec {} +impl crate::Readable for MCM_SPEC {} #[doc = "`reset()` method sets MCM to value 0"] -impl crate::Resettable for McmSpec { +impl crate::Resettable for MCM_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcmc.rs b/src/posif0/mcmc.rs index 06ee10cf..2c596dec 100644 --- a/src/posif0/mcmc.rs +++ b/src/posif0/mcmc.rs @@ -1,35 +1,35 @@ #[doc = "Register `MCMC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MNPC` writer - Multi-Channel Pattern Update Enable Clear"] -pub type MnpcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MNPC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPC` writer - Multi-Channel Pattern clear"] -pub type MpcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Clear"] #[inline(always)] #[must_use] - pub fn mnpc(&mut self) -> MnpcW { - MnpcW::new(self, 0) + pub fn mnpc(&mut self) -> MNPC_W { + MNPC_W::new(self, 0) } #[doc = "Bit 1 - Multi-Channel Pattern clear"] #[inline(always)] #[must_use] - pub fn mpc(&mut self) -> MpcW { - MpcW::new(self, 1) + pub fn mpc(&mut self) -> MPC_W { + MPC_W::new(self, 1) } } #[doc = "Multi-Channel Pattern Control clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcmc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McmcSpec; -impl crate::RegisterSpec for McmcSpec { +pub struct MCMC_SPEC; +impl crate::RegisterSpec for MCMC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mcmc::W`](W) writer structure"] -impl crate::Writable for McmcSpec { +impl crate::Writable for MCMC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCMC to value 0"] -impl crate::Resettable for McmcSpec { +impl crate::Resettable for MCMC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcmf.rs b/src/posif0/mcmf.rs index 69641d7d..d12f18d6 100644 --- a/src/posif0/mcmf.rs +++ b/src/posif0/mcmf.rs @@ -1,56 +1,56 @@ #[doc = "Register `MCMF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Multi-Channel Pattern update status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mss { +pub enum MSS_A { #[doc = "0: Update of the Multi-Channel pattern is set"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update of the Multi-Channel pattern is not set"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mss) -> Self { + fn from(variant: MSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSS` reader - Multi-Channel Pattern update status"] -pub type MssR = crate::BitReader; -impl MssR { +pub type MSS_R = crate::BitReader; +impl MSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mss { + pub const fn variant(&self) -> MSS_A { match self.bits { - false => Mss::Value1, - true => Mss::Value2, + false => MSS_A::VALUE1, + true => MSS_A::VALUE2, } } #[doc = "Update of the Multi-Channel pattern is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mss::Value1 + *self == MSS_A::VALUE1 } #[doc = "Update of the Multi-Channel pattern is not set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mss::Value2 + *self == MSS_A::VALUE2 } } impl R { #[doc = "Bit 0 - Multi-Channel Pattern update status"] #[inline(always)] - pub fn mss(&self) -> MssR { - MssR::new((self.bits & 1) != 0) + pub fn mss(&self) -> MSS_R { + MSS_R::new((self.bits & 1) != 0) } } #[doc = "Multi-Channel Pattern Control flag\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcmf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McmfSpec; -impl crate::RegisterSpec for McmfSpec { +pub struct MCMF_SPEC; +impl crate::RegisterSpec for MCMF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mcmf::R`](R) reader structure"] -impl crate::Readable for McmfSpec {} +impl crate::Readable for MCMF_SPEC {} #[doc = "`reset()` method sets MCMF to value 0"] -impl crate::Resettable for McmfSpec { +impl crate::Resettable for MCMF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcms.rs b/src/posif0/mcms.rs index d28f446e..13894973 100644 --- a/src/posif0/mcms.rs +++ b/src/posif0/mcms.rs @@ -1,43 +1,43 @@ #[doc = "Register `MCMS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MNPS` writer - Multi-Channel Pattern Update Enable Set"] -pub type MnpsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MNPS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STHR` writer - Hall Pattern Shadow Transfer Request"] -pub type SthrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STHR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `STMR` writer - Multi-Channel Shadow Transfer Request"] -pub type StmrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STMR_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Set"] #[inline(always)] #[must_use] - pub fn mnps(&mut self) -> MnpsW { - MnpsW::new(self, 0) + pub fn mnps(&mut self) -> MNPS_W { + MNPS_W::new(self, 0) } #[doc = "Bit 1 - Hall Pattern Shadow Transfer Request"] #[inline(always)] #[must_use] - pub fn sthr(&mut self) -> SthrW { - SthrW::new(self, 1) + pub fn sthr(&mut self) -> STHR_W { + STHR_W::new(self, 1) } #[doc = "Bit 2 - Multi-Channel Shadow Transfer Request"] #[inline(always)] #[must_use] - pub fn stmr(&mut self) -> StmrW { - StmrW::new(self, 2) + pub fn stmr(&mut self) -> STMR_W { + STMR_W::new(self, 2) } } #[doc = "Multi-Channel Pattern Control set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcms::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McmsSpec; -impl crate::RegisterSpec for McmsSpec { +pub struct MCMS_SPEC; +impl crate::RegisterSpec for MCMS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mcms::W`](W) writer structure"] -impl crate::Writable for McmsSpec { +impl crate::Writable for MCMS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCMS to value 0"] -impl crate::Resettable for McmsSpec { +impl crate::Resettable for MCMS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/mcsm.rs b/src/posif0/mcsm.rs index 14eab5e5..a7b22c26 100644 --- a/src/posif0/mcsm.rs +++ b/src/posif0/mcsm.rs @@ -1,40 +1,40 @@ #[doc = "Register `MCSM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCSM` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MCMPS` reader - Shadow Multi-Channel Pattern"] -pub type McmpsR = crate::FieldReader; +pub type MCMPS_R = crate::FieldReader; #[doc = "Field `MCMPS` writer - Shadow Multi-Channel Pattern"] -pub type McmpsW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type MCMPS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"] #[inline(always)] - pub fn mcmps(&self) -> McmpsR { - McmpsR::new((self.bits & 0xffff) as u16) + pub fn mcmps(&self) -> MCMPS_R { + MCMPS_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"] #[inline(always)] #[must_use] - pub fn mcmps(&mut self) -> McmpsW { - McmpsW::new(self, 0) + pub fn mcmps(&mut self) -> MCMPS_W { + MCMPS_W::new(self, 0) } } #[doc = "Multi-Channel Shadow Pattern\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mcsm::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mcsm::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct McsmSpec; -impl crate::RegisterSpec for McsmSpec { +pub struct MCSM_SPEC; +impl crate::RegisterSpec for MCSM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mcsm::R`](R) reader structure"] -impl crate::Readable for McsmSpec {} +impl crate::Readable for MCSM_SPEC {} #[doc = "`write(|w| ..)` method takes [`mcsm::W`](W) writer structure"] -impl crate::Writable for McsmSpec { +impl crate::Writable for MCSM_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCSM to value 0"] -impl crate::Resettable for McsmSpec { +impl crate::Resettable for MCSM_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/midr.rs b/src/posif0/midr.rs index 09d08128..d2428440 100644 --- a/src/posif0/midr.rs +++ b/src/posif0/midr.rs @@ -1,36 +1,36 @@ #[doc = "Register `MIDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MODR` reader - Module Revision"] -pub type ModrR = crate::FieldReader; +pub type MODR_R = crate::FieldReader; #[doc = "Field `MODT` reader - Module Type"] -pub type ModtR = crate::FieldReader; +pub type MODT_R = crate::FieldReader; #[doc = "Field `MODN` reader - Module Number"] -pub type ModnR = crate::FieldReader; +pub type MODN_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn modr(&self) -> ModrR { - ModrR::new((self.bits & 0xff) as u8) + pub fn modr(&self) -> MODR_R { + MODR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn modt(&self) -> ModtR { - ModtR::new(((self.bits >> 8) & 0xff) as u8) + pub fn modt(&self) -> MODT_R { + MODT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn modn(&self) -> ModnR { - ModnR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn modn(&self) -> MODN_R { + MODN_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`midr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MidrSpec; -impl crate::RegisterSpec for MidrSpec { +pub struct MIDR_SPEC; +impl crate::RegisterSpec for MIDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`midr::R`](R) reader structure"] -impl crate::Readable for MidrSpec {} +impl crate::Readable for MIDR_SPEC {} #[doc = "`reset()` method sets MIDR to value 0x00a8_c000"] -impl crate::Resettable for MidrSpec { +impl crate::Resettable for MIDR_SPEC { const RESET_VALUE: u32 = 0x00a8_c000; } diff --git a/src/posif0/pconf.rs b/src/posif0/pconf.rs index f642c15a..1d40d9df 100644 --- a/src/posif0/pconf.rs +++ b/src/posif0/pconf.rs @@ -1,68 +1,68 @@ #[doc = "Register `PCONF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCONF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Function Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Fsel { +pub enum FSEL_A { #[doc = "0: Hall Sensor Mode enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Decoder Mode enabled"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: stand-alone Multi-Channel Mode enabled"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Fsel) -> Self { + fn from(variant: FSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Fsel { +impl crate::FieldSpec for FSEL_A { type Ux = u8; } -impl crate::IsEnum for Fsel {} +impl crate::IsEnum for FSEL_A {} #[doc = "Field `FSEL` reader - Function Selector"] -pub type FselR = crate::FieldReader; -impl FselR { +pub type FSEL_R = crate::FieldReader; +impl FSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fsel { + pub const fn variant(&self) -> FSEL_A { match self.bits { - 0 => Fsel::Value1, - 1 => Fsel::Value2, - 2 => Fsel::Value3, - 3 => Fsel::Value4, + 0 => FSEL_A::VALUE1, + 1 => FSEL_A::VALUE2, + 2 => FSEL_A::VALUE3, + 3 => FSEL_A::VALUE4, _ => unreachable!(), } } #[doc = "Hall Sensor Mode enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fsel::Value1 + *self == FSEL_A::VALUE1 } #[doc = "Quadrature Decoder Mode enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fsel::Value2 + *self == FSEL_A::VALUE2 } #[doc = "stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Fsel::Value3 + *self == FSEL_A::VALUE3 } #[doc = "Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Fsel::Value4 + *self == FSEL_A::VALUE4 } } #[doc = "Field `FSEL` writer - Function Selector"] -pub type FselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Fsel, crate::Safe>; -impl<'a, REG> FselW<'a, REG> +pub type FSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FSEL_A, crate::Safe>; +impl<'a, REG> FSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,195 +70,195 @@ where #[doc = "Hall Sensor Mode enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fsel::Value1) + self.variant(FSEL_A::VALUE1) } #[doc = "Quadrature Decoder Mode enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fsel::Value2) + self.variant(FSEL_A::VALUE2) } #[doc = "stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Fsel::Value3) + self.variant(FSEL_A::VALUE3) } #[doc = "Quadrature Decoder and stand-alone Multi-Channel Mode enabled"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Fsel::Value4) + self.variant(FSEL_A::VALUE4) } } #[doc = "Position Decoder Mode selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Qdcm { +pub enum QDCM_A { #[doc = "0: Position encoder is in Quadrature Mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Position encoder is in Direction Count Mode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Qdcm) -> Self { + fn from(variant: QDCM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `QDCM` reader - Position Decoder Mode selection"] -pub type QdcmR = crate::BitReader; -impl QdcmR { +pub type QDCM_R = crate::BitReader; +impl QDCM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Qdcm { + pub const fn variant(&self) -> QDCM_A { match self.bits { - false => Qdcm::Value1, - true => Qdcm::Value2, + false => QDCM_A::VALUE1, + true => QDCM_A::VALUE2, } } #[doc = "Position encoder is in Quadrature Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Qdcm::Value1 + *self == QDCM_A::VALUE1 } #[doc = "Position encoder is in Direction Count Mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Qdcm::Value2 + *self == QDCM_A::VALUE2 } } #[doc = "Field `QDCM` writer - Position Decoder Mode selection"] -pub type QdcmW<'a, REG> = crate::BitWriter<'a, REG, Qdcm>; -impl<'a, REG> QdcmW<'a, REG> +pub type QDCM_W<'a, REG> = crate::BitWriter<'a, REG, QDCM_A>; +impl<'a, REG> QDCM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Position encoder is in Quadrature Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Qdcm::Value1) + self.variant(QDCM_A::VALUE1) } #[doc = "Position encoder is in Direction Count Mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Qdcm::Value2) + self.variant(QDCM_A::VALUE2) } } #[doc = "Field `HIDG` reader - Idle generation enable"] -pub type HidgR = crate::BitReader; +pub type HIDG_R = crate::BitReader; #[doc = "Field `HIDG` writer - Idle generation enable"] -pub type HidgW<'a, REG> = crate::BitWriter<'a, REG>; +pub type HIDG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Multi-Channel Pattern SW update enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcue { +pub enum MCUE_A { #[doc = "0: Multi-Channel pattern update is controlled via HW"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Multi-Channel pattern update is controlled via SW"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcue) -> Self { + fn from(variant: MCUE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCUE` reader - Multi-Channel Pattern SW update enable"] -pub type McueR = crate::BitReader; -impl McueR { +pub type MCUE_R = crate::BitReader; +impl MCUE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcue { + pub const fn variant(&self) -> MCUE_A { match self.bits { - false => Mcue::Value1, - true => Mcue::Value2, + false => MCUE_A::VALUE1, + true => MCUE_A::VALUE2, } } #[doc = "Multi-Channel pattern update is controlled via HW"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcue::Value1 + *self == MCUE_A::VALUE1 } #[doc = "Multi-Channel pattern update is controlled via SW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcue::Value2 + *self == MCUE_A::VALUE2 } } #[doc = "Field `MCUE` writer - Multi-Channel Pattern SW update enable"] -pub type McueW<'a, REG> = crate::BitWriter<'a, REG, Mcue>; -impl<'a, REG> McueW<'a, REG> +pub type MCUE_W<'a, REG> = crate::BitWriter<'a, REG, MCUE_A>; +impl<'a, REG> MCUE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi-Channel pattern update is controlled via HW"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcue::Value1) + self.variant(MCUE_A::VALUE1) } #[doc = "Multi-Channel pattern update is controlled via SW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcue::Value2) + self.variant(MCUE_A::VALUE2) } } #[doc = "PhaseA/Hal input 1 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Insel0 { +pub enum INSEL0_A { #[doc = "0: POSIFx.IN0A"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.IN0B"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.IN0C"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.IN0D"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Insel0) -> Self { + fn from(variant: INSEL0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Insel0 { +impl crate::FieldSpec for INSEL0_A { type Ux = u8; } -impl crate::IsEnum for Insel0 {} +impl crate::IsEnum for INSEL0_A {} #[doc = "Field `INSEL0` reader - PhaseA/Hal input 1 selector"] -pub type Insel0R = crate::FieldReader; -impl Insel0R { +pub type INSEL0_R = crate::FieldReader; +impl INSEL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insel0 { + pub const fn variant(&self) -> INSEL0_A { match self.bits { - 0 => Insel0::Value1, - 1 => Insel0::Value2, - 2 => Insel0::Value3, - 3 => Insel0::Value4, + 0 => INSEL0_A::VALUE1, + 1 => INSEL0_A::VALUE2, + 2 => INSEL0_A::VALUE3, + 3 => INSEL0_A::VALUE4, _ => unreachable!(), } } #[doc = "POSIFx.IN0A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insel0::Value1 + *self == INSEL0_A::VALUE1 } #[doc = "POSIFx.IN0B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insel0::Value2 + *self == INSEL0_A::VALUE2 } #[doc = "POSIFx.IN0C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Insel0::Value3 + *self == INSEL0_A::VALUE3 } #[doc = "POSIFx.IN0D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Insel0::Value4 + *self == INSEL0_A::VALUE4 } } #[doc = "Field `INSEL0` writer - PhaseA/Hal input 1 selector"] -pub type Insel0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel0, crate::Safe>; -impl<'a, REG> Insel0W<'a, REG> +pub type INSEL0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, INSEL0_A, crate::Safe>; +impl<'a, REG> INSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -266,85 +266,85 @@ where #[doc = "POSIFx.IN0A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insel0::Value1) + self.variant(INSEL0_A::VALUE1) } #[doc = "POSIFx.IN0B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insel0::Value2) + self.variant(INSEL0_A::VALUE2) } #[doc = "POSIFx.IN0C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Insel0::Value3) + self.variant(INSEL0_A::VALUE3) } #[doc = "POSIFx.IN0D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Insel0::Value4) + self.variant(INSEL0_A::VALUE4) } } #[doc = "PhaseB/Hall input 2 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Insel1 { +pub enum INSEL1_A { #[doc = "0: POSIFx.IN1A"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.IN1B"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.IN1C"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.IN1D"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Insel1) -> Self { + fn from(variant: INSEL1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Insel1 { +impl crate::FieldSpec for INSEL1_A { type Ux = u8; } -impl crate::IsEnum for Insel1 {} +impl crate::IsEnum for INSEL1_A {} #[doc = "Field `INSEL1` reader - PhaseB/Hall input 2 selector"] -pub type Insel1R = crate::FieldReader; -impl Insel1R { +pub type INSEL1_R = crate::FieldReader; +impl INSEL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insel1 { + pub const fn variant(&self) -> INSEL1_A { match self.bits { - 0 => Insel1::Value1, - 1 => Insel1::Value2, - 2 => Insel1::Value3, - 3 => Insel1::Value4, + 0 => INSEL1_A::VALUE1, + 1 => INSEL1_A::VALUE2, + 2 => INSEL1_A::VALUE3, + 3 => INSEL1_A::VALUE4, _ => unreachable!(), } } #[doc = "POSIFx.IN1A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insel1::Value1 + *self == INSEL1_A::VALUE1 } #[doc = "POSIFx.IN1B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insel1::Value2 + *self == INSEL1_A::VALUE2 } #[doc = "POSIFx.IN1C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Insel1::Value3 + *self == INSEL1_A::VALUE3 } #[doc = "POSIFx.IN1D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Insel1::Value4 + *self == INSEL1_A::VALUE4 } } #[doc = "Field `INSEL1` writer - PhaseB/Hall input 2 selector"] -pub type Insel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel1, crate::Safe>; -impl<'a, REG> Insel1W<'a, REG> +pub type INSEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, INSEL1_A, crate::Safe>; +impl<'a, REG> INSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -352,85 +352,85 @@ where #[doc = "POSIFx.IN1A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insel1::Value1) + self.variant(INSEL1_A::VALUE1) } #[doc = "POSIFx.IN1B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insel1::Value2) + self.variant(INSEL1_A::VALUE2) } #[doc = "POSIFx.IN1C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Insel1::Value3) + self.variant(INSEL1_A::VALUE3) } #[doc = "POSIFx.IN1D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Insel1::Value4) + self.variant(INSEL1_A::VALUE4) } } #[doc = "Index/Hall input 3 selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Insel2 { +pub enum INSEL2_A { #[doc = "0: POSIFx.IN2A"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.IN2B"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.IN2C"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.IN2D"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Insel2) -> Self { + fn from(variant: INSEL2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Insel2 { +impl crate::FieldSpec for INSEL2_A { type Ux = u8; } -impl crate::IsEnum for Insel2 {} +impl crate::IsEnum for INSEL2_A {} #[doc = "Field `INSEL2` reader - Index/Hall input 3 selector"] -pub type Insel2R = crate::FieldReader; -impl Insel2R { +pub type INSEL2_R = crate::FieldReader; +impl INSEL2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insel2 { + pub const fn variant(&self) -> INSEL2_A { match self.bits { - 0 => Insel2::Value1, - 1 => Insel2::Value2, - 2 => Insel2::Value3, - 3 => Insel2::Value4, + 0 => INSEL2_A::VALUE1, + 1 => INSEL2_A::VALUE2, + 2 => INSEL2_A::VALUE3, + 3 => INSEL2_A::VALUE4, _ => unreachable!(), } } #[doc = "POSIFx.IN2A"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insel2::Value1 + *self == INSEL2_A::VALUE1 } #[doc = "POSIFx.IN2B"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insel2::Value2 + *self == INSEL2_A::VALUE2 } #[doc = "POSIFx.IN2C"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Insel2::Value3 + *self == INSEL2_A::VALUE3 } #[doc = "POSIFx.IN2D"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Insel2::Value4 + *self == INSEL2_A::VALUE4 } } #[doc = "Field `INSEL2` writer - Index/Hall input 3 selector"] -pub type Insel2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Insel2, crate::Safe>; -impl<'a, REG> Insel2W<'a, REG> +pub type INSEL2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, INSEL2_A, crate::Safe>; +impl<'a, REG> INSEL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -438,223 +438,223 @@ where #[doc = "POSIFx.IN2A"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insel2::Value1) + self.variant(INSEL2_A::VALUE1) } #[doc = "POSIFx.IN2B"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insel2::Value2) + self.variant(INSEL2_A::VALUE2) } #[doc = "POSIFx.IN2C"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Insel2::Value3) + self.variant(INSEL2_A::VALUE3) } #[doc = "POSIFx.IN2D"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Insel2::Value4) + self.variant(INSEL2_A::VALUE4) } } #[doc = "Delay Pin selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: POSIFx.HSDA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.HSDB"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEL` reader - Delay Pin selector"] -pub type DselR = crate::BitReader; -impl DselR { +pub type DSEL_R = crate::BitReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - false => Dsel::Value1, - true => Dsel::Value2, + false => DSEL_A::VALUE1, + true => DSEL_A::VALUE2, } } #[doc = "POSIFx.HSDA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "POSIFx.HSDB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } } #[doc = "Field `DSEL` writer - Delay Pin selector"] -pub type DselW<'a, REG> = crate::BitWriter<'a, REG, Dsel>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::BitWriter<'a, REG, DSEL_A>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "POSIFx.HSDA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "POSIFx.HSDB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } } #[doc = "Edge selector for the sampling trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Spes { +pub enum SPES_A { #[doc = "0: Rising edge"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Falling edge"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Spes) -> Self { + fn from(variant: SPES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SPES` reader - Edge selector for the sampling trigger"] -pub type SpesR = crate::BitReader; -impl SpesR { +pub type SPES_R = crate::BitReader; +impl SPES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Spes { + pub const fn variant(&self) -> SPES_A { match self.bits { - false => Spes::Value1, - true => Spes::Value2, + false => SPES_A::VALUE1, + true => SPES_A::VALUE2, } } #[doc = "Rising edge"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Spes::Value1 + *self == SPES_A::VALUE1 } #[doc = "Falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Spes::Value2 + *self == SPES_A::VALUE2 } } #[doc = "Field `SPES` writer - Edge selector for the sampling trigger"] -pub type SpesW<'a, REG> = crate::BitWriter<'a, REG, Spes>; -impl<'a, REG> SpesW<'a, REG> +pub type SPES_W<'a, REG> = crate::BitWriter<'a, REG, SPES_A>; +impl<'a, REG> SPES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Rising edge"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Spes::Value1) + self.variant(SPES_A::VALUE1) } #[doc = "Falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Spes::Value2) + self.variant(SPES_A::VALUE2) } } #[doc = "Pattern update signal select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Msets { +pub enum MSETS_A { #[doc = "0: POSIFx.MSETA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.MSETB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.MSETC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.MSETD"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: POSIFx.MSETE"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: POSIFx.MSETF"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: POSIFx.MSETG"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: POSIFx.MSETH"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Msets) -> Self { + fn from(variant: MSETS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Msets { +impl crate::FieldSpec for MSETS_A { type Ux = u8; } -impl crate::IsEnum for Msets {} +impl crate::IsEnum for MSETS_A {} #[doc = "Field `MSETS` reader - Pattern update signal select"] -pub type MsetsR = crate::FieldReader; -impl MsetsR { +pub type MSETS_R = crate::FieldReader; +impl MSETS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msets { + pub const fn variant(&self) -> MSETS_A { match self.bits { - 0 => Msets::Value1, - 1 => Msets::Value2, - 2 => Msets::Value3, - 3 => Msets::Value4, - 4 => Msets::Value5, - 5 => Msets::Value6, - 6 => Msets::Value7, - 7 => Msets::Value8, + 0 => MSETS_A::VALUE1, + 1 => MSETS_A::VALUE2, + 2 => MSETS_A::VALUE3, + 3 => MSETS_A::VALUE4, + 4 => MSETS_A::VALUE5, + 5 => MSETS_A::VALUE6, + 6 => MSETS_A::VALUE7, + 7 => MSETS_A::VALUE8, _ => unreachable!(), } } #[doc = "POSIFx.MSETA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msets::Value1 + *self == MSETS_A::VALUE1 } #[doc = "POSIFx.MSETB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msets::Value2 + *self == MSETS_A::VALUE2 } #[doc = "POSIFx.MSETC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Msets::Value3 + *self == MSETS_A::VALUE3 } #[doc = "POSIFx.MSETD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Msets::Value4 + *self == MSETS_A::VALUE4 } #[doc = "POSIFx.MSETE"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Msets::Value5 + *self == MSETS_A::VALUE5 } #[doc = "POSIFx.MSETF"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Msets::Value6 + *self == MSETS_A::VALUE6 } #[doc = "POSIFx.MSETG"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Msets::Value7 + *self == MSETS_A::VALUE7 } #[doc = "POSIFx.MSETH"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Msets::Value8 + *self == MSETS_A::VALUE8 } } #[doc = "Field `MSETS` writer - Pattern update signal select"] -pub type MsetsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Msets, crate::Safe>; -impl<'a, REG> MsetsW<'a, REG> +pub type MSETS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, MSETS_A, crate::Safe>; +impl<'a, REG> MSETS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -662,158 +662,158 @@ where #[doc = "POSIFx.MSETA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msets::Value1) + self.variant(MSETS_A::VALUE1) } #[doc = "POSIFx.MSETB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msets::Value2) + self.variant(MSETS_A::VALUE2) } #[doc = "POSIFx.MSETC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Msets::Value3) + self.variant(MSETS_A::VALUE3) } #[doc = "POSIFx.MSETD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Msets::Value4) + self.variant(MSETS_A::VALUE4) } #[doc = "POSIFx.MSETE"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Msets::Value5) + self.variant(MSETS_A::VALUE5) } #[doc = "POSIFx.MSETF"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Msets::Value6) + self.variant(MSETS_A::VALUE6) } #[doc = "POSIFx.MSETG"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Msets::Value7) + self.variant(MSETS_A::VALUE7) } #[doc = "POSIFx.MSETH"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Msets::Value8) + self.variant(MSETS_A::VALUE8) } } #[doc = "Multi-Channel pattern update trigger edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mses { +pub enum MSES_A { #[doc = "0: The signal used to enable a pattern update is active on the rising edge"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The signal used to enable a pattern update is active on the falling edge"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mses) -> Self { + fn from(variant: MSES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSES` reader - Multi-Channel pattern update trigger edge"] -pub type MsesR = crate::BitReader; -impl MsesR { +pub type MSES_R = crate::BitReader; +impl MSES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mses { + pub const fn variant(&self) -> MSES_A { match self.bits { - false => Mses::Value1, - true => Mses::Value2, + false => MSES_A::VALUE1, + true => MSES_A::VALUE2, } } #[doc = "The signal used to enable a pattern update is active on the rising edge"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mses::Value1 + *self == MSES_A::VALUE1 } #[doc = "The signal used to enable a pattern update is active on the falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mses::Value2 + *self == MSES_A::VALUE2 } } #[doc = "Field `MSES` writer - Multi-Channel pattern update trigger edge"] -pub type MsesW<'a, REG> = crate::BitWriter<'a, REG, Mses>; -impl<'a, REG> MsesW<'a, REG> +pub type MSES_W<'a, REG> = crate::BitWriter<'a, REG, MSES_A>; +impl<'a, REG> MSES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The signal used to enable a pattern update is active on the rising edge"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mses::Value1) + self.variant(MSES_A::VALUE1) } #[doc = "The signal used to enable a pattern update is active on the falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mses::Value2) + self.variant(MSES_A::VALUE2) } } #[doc = "PWM synchronization signal selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Msyns { +pub enum MSYNS_A { #[doc = "0: POSIFx.MSYNCA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.MSYNCB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.MSYNCC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.MSYNCD"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Msyns) -> Self { + fn from(variant: MSYNS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Msyns { +impl crate::FieldSpec for MSYNS_A { type Ux = u8; } -impl crate::IsEnum for Msyns {} +impl crate::IsEnum for MSYNS_A {} #[doc = "Field `MSYNS` reader - PWM synchronization signal selector"] -pub type MsynsR = crate::FieldReader; -impl MsynsR { +pub type MSYNS_R = crate::FieldReader; +impl MSYNS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msyns { + pub const fn variant(&self) -> MSYNS_A { match self.bits { - 0 => Msyns::Value1, - 1 => Msyns::Value2, - 2 => Msyns::Value3, - 3 => Msyns::Value4, + 0 => MSYNS_A::VALUE1, + 1 => MSYNS_A::VALUE2, + 2 => MSYNS_A::VALUE3, + 3 => MSYNS_A::VALUE4, _ => unreachable!(), } } #[doc = "POSIFx.MSYNCA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msyns::Value1 + *self == MSYNS_A::VALUE1 } #[doc = "POSIFx.MSYNCB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msyns::Value2 + *self == MSYNS_A::VALUE2 } #[doc = "POSIFx.MSYNCC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Msyns::Value3 + *self == MSYNS_A::VALUE3 } #[doc = "POSIFx.MSYNCD"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Msyns::Value4 + *self == MSYNS_A::VALUE4 } } #[doc = "Field `MSYNS` writer - PWM synchronization signal selector"] -pub type MsynsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msyns, crate::Safe>; -impl<'a, REG> MsynsW<'a, REG> +pub type MSYNS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSYNS_A, crate::Safe>; +impl<'a, REG> MSYNS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -821,85 +821,85 @@ where #[doc = "POSIFx.MSYNCA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msyns::Value1) + self.variant(MSYNS_A::VALUE1) } #[doc = "POSIFx.MSYNCB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msyns::Value2) + self.variant(MSYNS_A::VALUE2) } #[doc = "POSIFx.MSYNCC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Msyns::Value3) + self.variant(MSYNS_A::VALUE3) } #[doc = "POSIFx.MSYNCD"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Msyns::Value4) + self.variant(MSYNS_A::VALUE4) } } #[doc = "Wrong Hall Event selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ewis { +pub enum EWIS_A { #[doc = "0: POSIFx.EWHEA"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.EWHEB"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: POSIFx.EWHEC"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: POSIFx.EWHED"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ewis) -> Self { + fn from(variant: EWIS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ewis { +impl crate::FieldSpec for EWIS_A { type Ux = u8; } -impl crate::IsEnum for Ewis {} +impl crate::IsEnum for EWIS_A {} #[doc = "Field `EWIS` reader - Wrong Hall Event selection"] -pub type EwisR = crate::FieldReader; -impl EwisR { +pub type EWIS_R = crate::FieldReader; +impl EWIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ewis { + pub const fn variant(&self) -> EWIS_A { match self.bits { - 0 => Ewis::Value1, - 1 => Ewis::Value2, - 2 => Ewis::Value3, - 3 => Ewis::Value4, + 0 => EWIS_A::VALUE1, + 1 => EWIS_A::VALUE2, + 2 => EWIS_A::VALUE3, + 3 => EWIS_A::VALUE4, _ => unreachable!(), } } #[doc = "POSIFx.EWHEA"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ewis::Value1 + *self == EWIS_A::VALUE1 } #[doc = "POSIFx.EWHEB"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ewis::Value2 + *self == EWIS_A::VALUE2 } #[doc = "POSIFx.EWHEC"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ewis::Value3 + *self == EWIS_A::VALUE3 } #[doc = "POSIFx.EWHED"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ewis::Value4 + *self == EWIS_A::VALUE4 } } #[doc = "Field `EWIS` writer - Wrong Hall Event selection"] -pub type EwisW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ewis, crate::Safe>; -impl<'a, REG> EwisW<'a, REG> +pub type EWIS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EWIS_A, crate::Safe>; +impl<'a, REG> EWIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -907,120 +907,120 @@ where #[doc = "POSIFx.EWHEA"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ewis::Value1) + self.variant(EWIS_A::VALUE1) } #[doc = "POSIFx.EWHEB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ewis::Value2) + self.variant(EWIS_A::VALUE2) } #[doc = "POSIFx.EWHEC"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ewis::Value3) + self.variant(EWIS_A::VALUE3) } #[doc = "POSIFx.EWHED"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ewis::Value4) + self.variant(EWIS_A::VALUE4) } } #[doc = "External Wrong Hall Event enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ewie { +pub enum EWIE_A { #[doc = "0: External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ewie) -> Self { + fn from(variant: EWIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EWIE` reader - External Wrong Hall Event enable"] -pub type EwieR = crate::BitReader; -impl EwieR { +pub type EWIE_R = crate::BitReader; +impl EWIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ewie { + pub const fn variant(&self) -> EWIE_A { match self.bits { - false => Ewie::Value1, - true => Ewie::Value2, + false => EWIE_A::VALUE1, + true => EWIE_A::VALUE2, } } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ewie::Value1 + *self == EWIE_A::VALUE1 } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ewie::Value2 + *self == EWIE_A::VALUE2 } } #[doc = "Field `EWIE` writer - External Wrong Hall Event enable"] -pub type EwieW<'a, REG> = crate::BitWriter<'a, REG, Ewie>; -impl<'a, REG> EwieW<'a, REG> +pub type EWIE_W<'a, REG> = crate::BitWriter<'a, REG, EWIE_A>; +impl<'a, REG> EWIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ewie::Value1) + self.variant(EWIE_A::VALUE1) } #[doc = "External wrong hall event emulation signal, POSIFx.EWHE\\[D...A\\], is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ewie::Value2) + self.variant(EWIE_A::VALUE2) } } #[doc = "External Wrong Hall Event active level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ewil { +pub enum EWIL_A { #[doc = "0: POSIFx.EWHE\\[D...A\\] signal is active HIGH"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: POSIFx.EWHE\\[D...A\\] signal is active LOW"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ewil) -> Self { + fn from(variant: EWIL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EWIL` reader - External Wrong Hall Event active level"] -pub type EwilR = crate::BitReader; -impl EwilR { +pub type EWIL_R = crate::BitReader; +impl EWIL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ewil { + pub const fn variant(&self) -> EWIL_A { match self.bits { - false => Ewil::Value1, - true => Ewil::Value2, + false => EWIL_A::VALUE1, + true => EWIL_A::VALUE2, } } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ewil::Value1 + *self == EWIL_A::VALUE1 } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ewil::Value2 + *self == EWIL_A::VALUE2 } } #[doc = "Field `EWIL` writer - External Wrong Hall Event active level"] -pub type EwilW<'a, REG> = crate::BitWriter<'a, REG, Ewil>; -impl<'a, REG> EwilW<'a, REG> +pub type EWIL_W<'a, REG> = crate::BitWriter<'a, REG, EWIL_A>; +impl<'a, REG> EWIL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -1028,108 +1028,108 @@ where signal is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ewil::Value1) + self.variant(EWIL_A::VALUE1) } #[doc = "POSIFx.EWHE\\[D...A\\] signal is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ewil::Value2) + self.variant(EWIL_A::VALUE2) } } #[doc = "Low Pass Filters Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Lpc { +pub enum LPC_A { #[doc = "0: Low pass filter disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Low pass of 1 clock cycle"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Low pass of 2 clock cycles"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Low pass of 4 clock cycles"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Low pass of 8 clock cycles"] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Low pass of 16 clock cycles"] - Value6 = 5, + VALUE6 = 5, #[doc = "6: Low pass of 32 clock cycles"] - Value7 = 6, + VALUE7 = 6, #[doc = "7: Low pass of 64 clock cycles"] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Lpc) -> Self { + fn from(variant: LPC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Lpc { +impl crate::FieldSpec for LPC_A { type Ux = u8; } -impl crate::IsEnum for Lpc {} +impl crate::IsEnum for LPC_A {} #[doc = "Field `LPC` reader - Low Pass Filters Configuration"] -pub type LpcR = crate::FieldReader; -impl LpcR { +pub type LPC_R = crate::FieldReader; +impl LPC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpc { + pub const fn variant(&self) -> LPC_A { match self.bits { - 0 => Lpc::Value1, - 1 => Lpc::Value2, - 2 => Lpc::Value3, - 3 => Lpc::Value4, - 4 => Lpc::Value5, - 5 => Lpc::Value6, - 6 => Lpc::Value7, - 7 => Lpc::Value8, + 0 => LPC_A::VALUE1, + 1 => LPC_A::VALUE2, + 2 => LPC_A::VALUE3, + 3 => LPC_A::VALUE4, + 4 => LPC_A::VALUE5, + 5 => LPC_A::VALUE6, + 6 => LPC_A::VALUE7, + 7 => LPC_A::VALUE8, _ => unreachable!(), } } #[doc = "Low pass filter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpc::Value1 + *self == LPC_A::VALUE1 } #[doc = "Low pass of 1 clock cycle"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpc::Value2 + *self == LPC_A::VALUE2 } #[doc = "Low pass of 2 clock cycles"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Lpc::Value3 + *self == LPC_A::VALUE3 } #[doc = "Low pass of 4 clock cycles"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Lpc::Value4 + *self == LPC_A::VALUE4 } #[doc = "Low pass of 8 clock cycles"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Lpc::Value5 + *self == LPC_A::VALUE5 } #[doc = "Low pass of 16 clock cycles"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Lpc::Value6 + *self == LPC_A::VALUE6 } #[doc = "Low pass of 32 clock cycles"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Lpc::Value7 + *self == LPC_A::VALUE7 } #[doc = "Low pass of 64 clock cycles"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Lpc::Value8 + *self == LPC_A::VALUE8 } } #[doc = "Field `LPC` writer - Low Pass Filters Configuration"] -pub type LpcW<'a, REG> = crate::FieldWriter<'a, REG, 3, Lpc, crate::Safe>; -impl<'a, REG> LpcW<'a, REG> +pub type LPC_W<'a, REG> = crate::FieldWriter<'a, REG, 3, LPC_A, crate::Safe>; +impl<'a, REG> LPC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -1137,238 +1137,238 @@ where #[doc = "Low pass filter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpc::Value1) + self.variant(LPC_A::VALUE1) } #[doc = "Low pass of 1 clock cycle"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpc::Value2) + self.variant(LPC_A::VALUE2) } #[doc = "Low pass of 2 clock cycles"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Lpc::Value3) + self.variant(LPC_A::VALUE3) } #[doc = "Low pass of 4 clock cycles"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Lpc::Value4) + self.variant(LPC_A::VALUE4) } #[doc = "Low pass of 8 clock cycles"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Lpc::Value5) + self.variant(LPC_A::VALUE5) } #[doc = "Low pass of 16 clock cycles"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Lpc::Value6) + self.variant(LPC_A::VALUE6) } #[doc = "Low pass of 32 clock cycles"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Lpc::Value7) + self.variant(LPC_A::VALUE7) } #[doc = "Low pass of 64 clock cycles"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Lpc::Value8) + self.variant(LPC_A::VALUE8) } } impl R { #[doc = "Bits 0:1 - Function Selector"] #[inline(always)] - pub fn fsel(&self) -> FselR { - FselR::new((self.bits & 3) as u8) + pub fn fsel(&self) -> FSEL_R { + FSEL_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Position Decoder Mode selection"] #[inline(always)] - pub fn qdcm(&self) -> QdcmR { - QdcmR::new(((self.bits >> 2) & 1) != 0) + pub fn qdcm(&self) -> QDCM_R { + QDCM_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Idle generation enable"] #[inline(always)] - pub fn hidg(&self) -> HidgR { - HidgR::new(((self.bits >> 4) & 1) != 0) + pub fn hidg(&self) -> HIDG_R { + HIDG_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"] #[inline(always)] - pub fn mcue(&self) -> McueR { - McueR::new(((self.bits >> 5) & 1) != 0) + pub fn mcue(&self) -> MCUE_R { + MCUE_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"] #[inline(always)] - pub fn insel0(&self) -> Insel0R { - Insel0R::new(((self.bits >> 8) & 3) as u8) + pub fn insel0(&self) -> INSEL0_R { + INSEL0_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"] #[inline(always)] - pub fn insel1(&self) -> Insel1R { - Insel1R::new(((self.bits >> 10) & 3) as u8) + pub fn insel1(&self) -> INSEL1_R { + INSEL1_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bits 12:13 - Index/Hall input 3 selector"] #[inline(always)] - pub fn insel2(&self) -> Insel2R { - Insel2R::new(((self.bits >> 12) & 3) as u8) + pub fn insel2(&self) -> INSEL2_R { + INSEL2_R::new(((self.bits >> 12) & 3) as u8) } #[doc = "Bit 16 - Delay Pin selector"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new(((self.bits >> 16) & 1) != 0) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Edge selector for the sampling trigger"] #[inline(always)] - pub fn spes(&self) -> SpesR { - SpesR::new(((self.bits >> 17) & 1) != 0) + pub fn spes(&self) -> SPES_R { + SPES_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:20 - Pattern update signal select"] #[inline(always)] - pub fn msets(&self) -> MsetsR { - MsetsR::new(((self.bits >> 18) & 7) as u8) + pub fn msets(&self) -> MSETS_R { + MSETS_R::new(((self.bits >> 18) & 7) as u8) } #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"] #[inline(always)] - pub fn mses(&self) -> MsesR { - MsesR::new(((self.bits >> 21) & 1) != 0) + pub fn mses(&self) -> MSES_R { + MSES_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:23 - PWM synchronization signal selector"] #[inline(always)] - pub fn msyns(&self) -> MsynsR { - MsynsR::new(((self.bits >> 22) & 3) as u8) + pub fn msyns(&self) -> MSYNS_R { + MSYNS_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:25 - Wrong Hall Event selection"] #[inline(always)] - pub fn ewis(&self) -> EwisR { - EwisR::new(((self.bits >> 24) & 3) as u8) + pub fn ewis(&self) -> EWIS_R { + EWIS_R::new(((self.bits >> 24) & 3) as u8) } #[doc = "Bit 26 - External Wrong Hall Event enable"] #[inline(always)] - pub fn ewie(&self) -> EwieR { - EwieR::new(((self.bits >> 26) & 1) != 0) + pub fn ewie(&self) -> EWIE_R { + EWIE_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - External Wrong Hall Event active level"] #[inline(always)] - pub fn ewil(&self) -> EwilR { - EwilR::new(((self.bits >> 27) & 1) != 0) + pub fn ewil(&self) -> EWIL_R { + EWIL_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bits 28:30 - Low Pass Filters Configuration"] #[inline(always)] - pub fn lpc(&self) -> LpcR { - LpcR::new(((self.bits >> 28) & 7) as u8) + pub fn lpc(&self) -> LPC_R { + LPC_R::new(((self.bits >> 28) & 7) as u8) } } impl W { #[doc = "Bits 0:1 - Function Selector"] #[inline(always)] #[must_use] - pub fn fsel(&mut self) -> FselW { - FselW::new(self, 0) + pub fn fsel(&mut self) -> FSEL_W { + FSEL_W::new(self, 0) } #[doc = "Bit 2 - Position Decoder Mode selection"] #[inline(always)] #[must_use] - pub fn qdcm(&mut self) -> QdcmW { - QdcmW::new(self, 2) + pub fn qdcm(&mut self) -> QDCM_W { + QDCM_W::new(self, 2) } #[doc = "Bit 4 - Idle generation enable"] #[inline(always)] #[must_use] - pub fn hidg(&mut self) -> HidgW { - HidgW::new(self, 4) + pub fn hidg(&mut self) -> HIDG_W { + HIDG_W::new(self, 4) } #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"] #[inline(always)] #[must_use] - pub fn mcue(&mut self) -> McueW { - McueW::new(self, 5) + pub fn mcue(&mut self) -> MCUE_W { + MCUE_W::new(self, 5) } #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"] #[inline(always)] #[must_use] - pub fn insel0(&mut self) -> Insel0W { - Insel0W::new(self, 8) + pub fn insel0(&mut self) -> INSEL0_W { + INSEL0_W::new(self, 8) } #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"] #[inline(always)] #[must_use] - pub fn insel1(&mut self) -> Insel1W { - Insel1W::new(self, 10) + pub fn insel1(&mut self) -> INSEL1_W { + INSEL1_W::new(self, 10) } #[doc = "Bits 12:13 - Index/Hall input 3 selector"] #[inline(always)] #[must_use] - pub fn insel2(&mut self) -> Insel2W { - Insel2W::new(self, 12) + pub fn insel2(&mut self) -> INSEL2_W { + INSEL2_W::new(self, 12) } #[doc = "Bit 16 - Delay Pin selector"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 16) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 16) } #[doc = "Bit 17 - Edge selector for the sampling trigger"] #[inline(always)] #[must_use] - pub fn spes(&mut self) -> SpesW { - SpesW::new(self, 17) + pub fn spes(&mut self) -> SPES_W { + SPES_W::new(self, 17) } #[doc = "Bits 18:20 - Pattern update signal select"] #[inline(always)] #[must_use] - pub fn msets(&mut self) -> MsetsW { - MsetsW::new(self, 18) + pub fn msets(&mut self) -> MSETS_W { + MSETS_W::new(self, 18) } #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"] #[inline(always)] #[must_use] - pub fn mses(&mut self) -> MsesW { - MsesW::new(self, 21) + pub fn mses(&mut self) -> MSES_W { + MSES_W::new(self, 21) } #[doc = "Bits 22:23 - PWM synchronization signal selector"] #[inline(always)] #[must_use] - pub fn msyns(&mut self) -> MsynsW { - MsynsW::new(self, 22) + pub fn msyns(&mut self) -> MSYNS_W { + MSYNS_W::new(self, 22) } #[doc = "Bits 24:25 - Wrong Hall Event selection"] #[inline(always)] #[must_use] - pub fn ewis(&mut self) -> EwisW { - EwisW::new(self, 24) + pub fn ewis(&mut self) -> EWIS_W { + EWIS_W::new(self, 24) } #[doc = "Bit 26 - External Wrong Hall Event enable"] #[inline(always)] #[must_use] - pub fn ewie(&mut self) -> EwieW { - EwieW::new(self, 26) + pub fn ewie(&mut self) -> EWIE_W { + EWIE_W::new(self, 26) } #[doc = "Bit 27 - External Wrong Hall Event active level"] #[inline(always)] #[must_use] - pub fn ewil(&mut self) -> EwilW { - EwilW::new(self, 27) + pub fn ewil(&mut self) -> EWIL_W { + EWIL_W::new(self, 27) } #[doc = "Bits 28:30 - Low Pass Filters Configuration"] #[inline(always)] #[must_use] - pub fn lpc(&mut self) -> LpcW { - LpcW::new(self, 28) + pub fn lpc(&mut self) -> LPC_W { + LPC_W::new(self, 28) } } #[doc = "Service Request Processing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pconf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pconf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PconfSpec; -impl crate::RegisterSpec for PconfSpec { +pub struct PCONF_SPEC; +impl crate::RegisterSpec for PCONF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pconf::R`](R) reader structure"] -impl crate::Readable for PconfSpec {} +impl crate::Readable for PCONF_SPEC {} #[doc = "`write(|w| ..)` method takes [`pconf::W`](W) writer structure"] -impl crate::Writable for PconfSpec { +impl crate::Writable for PCONF_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCONF to value 0"] -impl crate::Resettable for PconfSpec { +impl crate::Resettable for PCONF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pdbg.rs b/src/posif0/pdbg.rs index b9863ba9..bd25b8a1 100644 --- a/src/posif0/pdbg.rs +++ b/src/posif0/pdbg.rs @@ -1,64 +1,64 @@ #[doc = "Register `PDBG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `QCSV` reader - Quadrature Decoder Current state"] -pub type QcsvR = crate::FieldReader; +pub type QCSV_R = crate::FieldReader; #[doc = "Field `QPSV` reader - Quadrature Decoder Previous state"] -pub type QpsvR = crate::FieldReader; +pub type QPSV_R = crate::FieldReader; #[doc = "Field `IVAL` reader - Current Index Value"] -pub type IvalR = crate::BitReader; +pub type IVAL_R = crate::BitReader; #[doc = "Field `HSP` reader - Hall Current Sampled Pattern"] -pub type HspR = crate::FieldReader; +pub type HSP_R = crate::FieldReader; #[doc = "Field `LPP0` reader - Actual count of the Low Pass Filter for POSI0"] -pub type Lpp0R = crate::FieldReader; +pub type LPP0_R = crate::FieldReader; #[doc = "Field `LPP1` reader - Actual count of the Low Pass Filter for POSI1"] -pub type Lpp1R = crate::FieldReader; +pub type LPP1_R = crate::FieldReader; #[doc = "Field `LPP2` reader - Actual count of the Low Pass Filter for POSI2"] -pub type Lpp2R = crate::FieldReader; +pub type LPP2_R = crate::FieldReader; impl R { #[doc = "Bits 0:1 - Quadrature Decoder Current state"] #[inline(always)] - pub fn qcsv(&self) -> QcsvR { - QcsvR::new((self.bits & 3) as u8) + pub fn qcsv(&self) -> QCSV_R { + QCSV_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Quadrature Decoder Previous state"] #[inline(always)] - pub fn qpsv(&self) -> QpsvR { - QpsvR::new(((self.bits >> 2) & 3) as u8) + pub fn qpsv(&self) -> QPSV_R { + QPSV_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Current Index Value"] #[inline(always)] - pub fn ival(&self) -> IvalR { - IvalR::new(((self.bits >> 4) & 1) != 0) + pub fn ival(&self) -> IVAL_R { + IVAL_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 5:7 - Hall Current Sampled Pattern"] #[inline(always)] - pub fn hsp(&self) -> HspR { - HspR::new(((self.bits >> 5) & 7) as u8) + pub fn hsp(&self) -> HSP_R { + HSP_R::new(((self.bits >> 5) & 7) as u8) } #[doc = "Bits 8:13 - Actual count of the Low Pass Filter for POSI0"] #[inline(always)] - pub fn lpp0(&self) -> Lpp0R { - Lpp0R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn lpp0(&self) -> LPP0_R { + LPP0_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:21 - Actual count of the Low Pass Filter for POSI1"] #[inline(always)] - pub fn lpp1(&self) -> Lpp1R { - Lpp1R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn lpp1(&self) -> LPP1_R { + LPP1_R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 22:27 - Actual count of the Low Pass Filter for POSI2"] #[inline(always)] - pub fn lpp2(&self) -> Lpp2R { - Lpp2R::new(((self.bits >> 22) & 0x3f) as u8) + pub fn lpp2(&self) -> LPP2_R { + LPP2_R::new(((self.bits >> 22) & 0x3f) as u8) } } #[doc = "POSIF Debug register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdbg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PdbgSpec; -impl crate::RegisterSpec for PdbgSpec { +pub struct PDBG_SPEC; +impl crate::RegisterSpec for PDBG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pdbg::R`](R) reader structure"] -impl crate::Readable for PdbgSpec {} +impl crate::Readable for PDBG_SPEC {} #[doc = "`reset()` method sets PDBG to value 0"] -impl crate::Resettable for PdbgSpec { +impl crate::Resettable for PDBG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pflg.rs b/src/posif0/pflg.rs index d7a29500..d15fd359 100644 --- a/src/posif0/pflg.rs +++ b/src/posif0/pflg.rs @@ -1,384 +1,384 @@ #[doc = "Register `PFLG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Correct Hall Event Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ches { +pub enum CHES_A { #[doc = "0: Correct Hall Event not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Correct Hall Event detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ches) -> Self { + fn from(variant: CHES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHES` reader - Correct Hall Event Status"] -pub type ChesR = crate::BitReader; -impl ChesR { +pub type CHES_R = crate::BitReader; +impl CHES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ches { + pub const fn variant(&self) -> CHES_A { match self.bits { - false => Ches::Value1, - true => Ches::Value2, + false => CHES_A::VALUE1, + true => CHES_A::VALUE2, } } #[doc = "Correct Hall Event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ches::Value1 + *self == CHES_A::VALUE1 } #[doc = "Correct Hall Event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ches::Value2 + *self == CHES_A::VALUE2 } } #[doc = "Wrong Hall Event Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Whes { +pub enum WHES_A { #[doc = "0: Wrong Hall Event not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wrong Hall Event detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Whes) -> Self { + fn from(variant: WHES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WHES` reader - Wrong Hall Event Status"] -pub type WhesR = crate::BitReader; -impl WhesR { +pub type WHES_R = crate::BitReader; +impl WHES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Whes { + pub const fn variant(&self) -> WHES_A { match self.bits { - false => Whes::Value1, - true => Whes::Value2, + false => WHES_A::VALUE1, + true => WHES_A::VALUE2, } } #[doc = "Wrong Hall Event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Whes::Value1 + *self == WHES_A::VALUE1 } #[doc = "Wrong Hall Event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Whes::Value2 + *self == WHES_A::VALUE2 } } #[doc = "Hall Inputs Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hies { +pub enum HIES_A { #[doc = "0: Transition on the Hall Inputs not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transition on the Hall Inputs detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hies) -> Self { + fn from(variant: HIES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIES` reader - Hall Inputs Update Status"] -pub type HiesR = crate::BitReader; -impl HiesR { +pub type HIES_R = crate::BitReader; +impl HIES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hies { + pub const fn variant(&self) -> HIES_A { match self.bits { - false => Hies::Value1, - true => Hies::Value2, + false => HIES_A::VALUE1, + true => HIES_A::VALUE2, } } #[doc = "Transition on the Hall Inputs not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hies::Value1 + *self == HIES_A::VALUE1 } #[doc = "Transition on the Hall Inputs detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hies::Value2 + *self == HIES_A::VALUE2 } } #[doc = "Multi-Channel pattern shadow transfer status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Msts { +pub enum MSTS_A { #[doc = "0: Shadow transfer not done"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer done"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Msts) -> Self { + fn from(variant: MSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSTS` reader - Multi-Channel pattern shadow transfer status"] -pub type MstsR = crate::BitReader; -impl MstsR { +pub type MSTS_R = crate::BitReader; +impl MSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msts { + pub const fn variant(&self) -> MSTS_A { match self.bits { - false => Msts::Value1, - true => Msts::Value2, + false => MSTS_A::VALUE1, + true => MSTS_A::VALUE2, } } #[doc = "Shadow transfer not done"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msts::Value1 + *self == MSTS_A::VALUE1 } #[doc = "Shadow transfer done"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msts::Value2 + *self == MSTS_A::VALUE2 } } #[doc = "Quadrature Index Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Indxs { +pub enum INDXS_A { #[doc = "0: Index event not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Index event detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Indxs) -> Self { + fn from(variant: INDXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INDXS` reader - Quadrature Index Status"] -pub type IndxsR = crate::BitReader; -impl IndxsR { +pub type INDXS_R = crate::BitReader; +impl INDXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Indxs { + pub const fn variant(&self) -> INDXS_A { match self.bits { - false => Indxs::Value1, - true => Indxs::Value2, + false => INDXS_A::VALUE1, + true => INDXS_A::VALUE2, } } #[doc = "Index event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Indxs::Value1 + *self == INDXS_A::VALUE1 } #[doc = "Index event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Indxs::Value2 + *self == INDXS_A::VALUE2 } } #[doc = "Quadrature Phase Error Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Errs { +pub enum ERRS_A { #[doc = "0: Phase Error event not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Phase Error event detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Errs) -> Self { + fn from(variant: ERRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERRS` reader - Quadrature Phase Error Status"] -pub type ErrsR = crate::BitReader; -impl ErrsR { +pub type ERRS_R = crate::BitReader; +impl ERRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Errs { + pub const fn variant(&self) -> ERRS_A { match self.bits { - false => Errs::Value1, - true => Errs::Value2, + false => ERRS_A::VALUE1, + true => ERRS_A::VALUE2, } } #[doc = "Phase Error event not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Errs::Value1 + *self == ERRS_A::VALUE1 } #[doc = "Phase Error event detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Errs::Value2 + *self == ERRS_A::VALUE2 } } #[doc = "Quadrature CLK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cnts { +pub enum CNTS_A { #[doc = "0: Quadrature clock not generated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature clock generated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cnts) -> Self { + fn from(variant: CNTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CNTS` reader - Quadrature CLK Status"] -pub type CntsR = crate::BitReader; -impl CntsR { +pub type CNTS_R = crate::BitReader; +impl CNTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cnts { + pub const fn variant(&self) -> CNTS_A { match self.bits { - false => Cnts::Value1, - true => Cnts::Value2, + false => CNTS_A::VALUE1, + true => CNTS_A::VALUE2, } } #[doc = "Quadrature clock not generated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cnts::Value1 + *self == CNTS_A::VALUE1 } #[doc = "Quadrature clock generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cnts::Value2 + *self == CNTS_A::VALUE2 } } #[doc = "Quadrature Direction Change\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dirs { +pub enum DIRS_A { #[doc = "0: Change on direction not detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Change on direction detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dirs) -> Self { + fn from(variant: DIRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIRS` reader - Quadrature Direction Change"] -pub type DirsR = crate::BitReader; -impl DirsR { +pub type DIRS_R = crate::BitReader; +impl DIRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dirs { + pub const fn variant(&self) -> DIRS_A { match self.bits { - false => Dirs::Value1, - true => Dirs::Value2, + false => DIRS_A::VALUE1, + true => DIRS_A::VALUE2, } } #[doc = "Change on direction not detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dirs::Value1 + *self == DIRS_A::VALUE1 } #[doc = "Change on direction detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dirs::Value2 + *self == DIRS_A::VALUE2 } } #[doc = "Quadrature Period Clk Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pclks { +pub enum PCLKS_A { #[doc = "0: Period clock not generated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Period clock generated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pclks) -> Self { + fn from(variant: PCLKS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCLKS` reader - Quadrature Period Clk Status"] -pub type PclksR = crate::BitReader; -impl PclksR { +pub type PCLKS_R = crate::BitReader; +impl PCLKS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pclks { + pub const fn variant(&self) -> PCLKS_A { match self.bits { - false => Pclks::Value1, - true => Pclks::Value2, + false => PCLKS_A::VALUE1, + true => PCLKS_A::VALUE2, } } #[doc = "Period clock not generated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pclks::Value1 + *self == PCLKS_A::VALUE1 } #[doc = "Period clock generated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pclks::Value2 + *self == PCLKS_A::VALUE2 } } impl R { #[doc = "Bit 0 - Correct Hall Event Status"] #[inline(always)] - pub fn ches(&self) -> ChesR { - ChesR::new((self.bits & 1) != 0) + pub fn ches(&self) -> CHES_R { + CHES_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong Hall Event Status"] #[inline(always)] - pub fn whes(&self) -> WhesR { - WhesR::new(((self.bits >> 1) & 1) != 0) + pub fn whes(&self) -> WHES_R { + WHES_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Hall Inputs Update Status"] #[inline(always)] - pub fn hies(&self) -> HiesR { - HiesR::new(((self.bits >> 2) & 1) != 0) + pub fn hies(&self) -> HIES_R { + HIES_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer status"] #[inline(always)] - pub fn msts(&self) -> MstsR { - MstsR::new(((self.bits >> 4) & 1) != 0) + pub fn msts(&self) -> MSTS_R { + MSTS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Quadrature Index Status"] #[inline(always)] - pub fn indxs(&self) -> IndxsR { - IndxsR::new(((self.bits >> 8) & 1) != 0) + pub fn indxs(&self) -> INDXS_R { + INDXS_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Quadrature Phase Error Status"] #[inline(always)] - pub fn errs(&self) -> ErrsR { - ErrsR::new(((self.bits >> 9) & 1) != 0) + pub fn errs(&self) -> ERRS_R { + ERRS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Quadrature CLK Status"] #[inline(always)] - pub fn cnts(&self) -> CntsR { - CntsR::new(((self.bits >> 10) & 1) != 0) + pub fn cnts(&self) -> CNTS_R { + CNTS_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Quadrature Direction Change"] #[inline(always)] - pub fn dirs(&self) -> DirsR { - DirsR::new(((self.bits >> 11) & 1) != 0) + pub fn dirs(&self) -> DIRS_R { + DIRS_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Quadrature Period Clk Status"] #[inline(always)] - pub fn pclks(&self) -> PclksR { - PclksR::new(((self.bits >> 12) & 1) != 0) + pub fn pclks(&self) -> PCLKS_R { + PCLKS_R::new(((self.bits >> 12) & 1) != 0) } } #[doc = "Service Request Processing Interrupt Flags\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PflgSpec; -impl crate::RegisterSpec for PflgSpec { +pub struct PFLG_SPEC; +impl crate::RegisterSpec for PFLG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pflg::R`](R) reader structure"] -impl crate::Readable for PflgSpec {} +impl crate::Readable for PFLG_SPEC {} #[doc = "`reset()` method sets PFLG to value 0"] -impl crate::Resettable for PflgSpec { +impl crate::Resettable for PFLG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pflge.rs b/src/posif0/pflge.rs index 7b7b28f1..13395527 100644 --- a/src/posif0/pflge.rs +++ b/src/posif0/pflge.rs @@ -1,1177 +1,1177 @@ #[doc = "Register `PFLGE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PFLGE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Correct Hall Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eche { +pub enum ECHE_A { #[doc = "0: Correct Hall Event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Correct Hall Event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eche) -> Self { + fn from(variant: ECHE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ECHE` reader - Correct Hall Event Enable"] -pub type EcheR = crate::BitReader; -impl EcheR { +pub type ECHE_R = crate::BitReader; +impl ECHE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eche { + pub const fn variant(&self) -> ECHE_A { match self.bits { - false => Eche::Value1, - true => Eche::Value2, + false => ECHE_A::VALUE1, + true => ECHE_A::VALUE2, } } #[doc = "Correct Hall Event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eche::Value1 + *self == ECHE_A::VALUE1 } #[doc = "Correct Hall Event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eche::Value2 + *self == ECHE_A::VALUE2 } } #[doc = "Field `ECHE` writer - Correct Hall Event Enable"] -pub type EcheW<'a, REG> = crate::BitWriter<'a, REG, Eche>; -impl<'a, REG> EcheW<'a, REG> +pub type ECHE_W<'a, REG> = crate::BitWriter<'a, REG, ECHE_A>; +impl<'a, REG> ECHE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Correct Hall Event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eche::Value1) + self.variant(ECHE_A::VALUE1) } #[doc = "Correct Hall Event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eche::Value2) + self.variant(ECHE_A::VALUE2) } } #[doc = "Wrong Hall Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ewhe { +pub enum EWHE_A { #[doc = "0: Wrong Hall Event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wrong Hall Event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ewhe) -> Self { + fn from(variant: EWHE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EWHE` reader - Wrong Hall Event Enable"] -pub type EwheR = crate::BitReader; -impl EwheR { +pub type EWHE_R = crate::BitReader; +impl EWHE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ewhe { + pub const fn variant(&self) -> EWHE_A { match self.bits { - false => Ewhe::Value1, - true => Ewhe::Value2, + false => EWHE_A::VALUE1, + true => EWHE_A::VALUE2, } } #[doc = "Wrong Hall Event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ewhe::Value1 + *self == EWHE_A::VALUE1 } #[doc = "Wrong Hall Event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ewhe::Value2 + *self == EWHE_A::VALUE2 } } #[doc = "Field `EWHE` writer - Wrong Hall Event Enable"] -pub type EwheW<'a, REG> = crate::BitWriter<'a, REG, Ewhe>; -impl<'a, REG> EwheW<'a, REG> +pub type EWHE_W<'a, REG> = crate::BitWriter<'a, REG, EWHE_A>; +impl<'a, REG> EWHE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wrong Hall Event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ewhe::Value1) + self.variant(EWHE_A::VALUE1) } #[doc = "Wrong Hall Event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ewhe::Value2) + self.variant(EWHE_A::VALUE2) } } #[doc = "Hall Input Update Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ehie { +pub enum EHIE_A { #[doc = "0: Update of the Hall Inputs interrupt is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update of the Hall Inputs interrupt is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ehie) -> Self { + fn from(variant: EHIE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EHIE` reader - Hall Input Update Enable"] -pub type EhieR = crate::BitReader; -impl EhieR { +pub type EHIE_R = crate::BitReader; +impl EHIE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ehie { + pub const fn variant(&self) -> EHIE_A { match self.bits { - false => Ehie::Value1, - true => Ehie::Value2, + false => EHIE_A::VALUE1, + true => EHIE_A::VALUE2, } } #[doc = "Update of the Hall Inputs interrupt is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ehie::Value1 + *self == EHIE_A::VALUE1 } #[doc = "Update of the Hall Inputs interrupt is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ehie::Value2 + *self == EHIE_A::VALUE2 } } #[doc = "Field `EHIE` writer - Hall Input Update Enable"] -pub type EhieW<'a, REG> = crate::BitWriter<'a, REG, Ehie>; -impl<'a, REG> EhieW<'a, REG> +pub type EHIE_W<'a, REG> = crate::BitWriter<'a, REG, EHIE_A>; +impl<'a, REG> EHIE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Update of the Hall Inputs interrupt is disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ehie::Value1) + self.variant(EHIE_A::VALUE1) } #[doc = "Update of the Hall Inputs interrupt is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ehie::Value2) + self.variant(EHIE_A::VALUE2) } } #[doc = "Multi-Channel pattern shadow transfer enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emst { +pub enum EMST_A { #[doc = "0: Shadow transfer event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shadow transfer event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emst) -> Self { + fn from(variant: EMST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMST` reader - Multi-Channel pattern shadow transfer enable"] -pub type EmstR = crate::BitReader; -impl EmstR { +pub type EMST_R = crate::BitReader; +impl EMST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emst { + pub const fn variant(&self) -> EMST_A { match self.bits { - false => Emst::Value1, - true => Emst::Value2, + false => EMST_A::VALUE1, + true => EMST_A::VALUE2, } } #[doc = "Shadow transfer event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emst::Value1 + *self == EMST_A::VALUE1 } #[doc = "Shadow transfer event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emst::Value2 + *self == EMST_A::VALUE2 } } #[doc = "Field `EMST` writer - Multi-Channel pattern shadow transfer enable"] -pub type EmstW<'a, REG> = crate::BitWriter<'a, REG, Emst>; -impl<'a, REG> EmstW<'a, REG> +pub type EMST_W<'a, REG> = crate::BitWriter<'a, REG, EMST_A>; +impl<'a, REG> EMST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shadow transfer event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emst::Value1) + self.variant(EMST_A::VALUE1) } #[doc = "Shadow transfer event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emst::Value2) + self.variant(EMST_A::VALUE2) } } #[doc = "Quadrature Index Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eindx { +pub enum EINDX_A { #[doc = "0: Index event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Index event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eindx) -> Self { + fn from(variant: EINDX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EINDX` reader - Quadrature Index Event Enable"] -pub type EindxR = crate::BitReader; -impl EindxR { +pub type EINDX_R = crate::BitReader; +impl EINDX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eindx { + pub const fn variant(&self) -> EINDX_A { match self.bits { - false => Eindx::Value1, - true => Eindx::Value2, + false => EINDX_A::VALUE1, + true => EINDX_A::VALUE2, } } #[doc = "Index event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eindx::Value1 + *self == EINDX_A::VALUE1 } #[doc = "Index event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eindx::Value2 + *self == EINDX_A::VALUE2 } } #[doc = "Field `EINDX` writer - Quadrature Index Event Enable"] -pub type EindxW<'a, REG> = crate::BitWriter<'a, REG, Eindx>; -impl<'a, REG> EindxW<'a, REG> +pub type EINDX_W<'a, REG> = crate::BitWriter<'a, REG, EINDX_A>; +impl<'a, REG> EINDX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Index event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eindx::Value1) + self.variant(EINDX_A::VALUE1) } #[doc = "Index event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eindx::Value2) + self.variant(EINDX_A::VALUE2) } } #[doc = "Quadrature Phase Error Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eerr { +pub enum EERR_A { #[doc = "0: Phase error event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Phase error event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eerr) -> Self { + fn from(variant: EERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EERR` reader - Quadrature Phase Error Enable"] -pub type EerrR = crate::BitReader; -impl EerrR { +pub type EERR_R = crate::BitReader; +impl EERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eerr { + pub const fn variant(&self) -> EERR_A { match self.bits { - false => Eerr::Value1, - true => Eerr::Value2, + false => EERR_A::VALUE1, + true => EERR_A::VALUE2, } } #[doc = "Phase error event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eerr::Value1 + *self == EERR_A::VALUE1 } #[doc = "Phase error event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eerr::Value2 + *self == EERR_A::VALUE2 } } #[doc = "Field `EERR` writer - Quadrature Phase Error Enable"] -pub type EerrW<'a, REG> = crate::BitWriter<'a, REG, Eerr>; -impl<'a, REG> EerrW<'a, REG> +pub type EERR_W<'a, REG> = crate::BitWriter<'a, REG, EERR_A>; +impl<'a, REG> EERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase error event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eerr::Value1) + self.variant(EERR_A::VALUE1) } #[doc = "Phase error event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eerr::Value2) + self.variant(EERR_A::VALUE2) } } #[doc = "Quadrature CLK interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ecnt { +pub enum ECNT_A { #[doc = "0: Quadrature CLK event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature CLK event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ecnt) -> Self { + fn from(variant: ECNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ECNT` reader - Quadrature CLK interrupt Enable"] -pub type EcntR = crate::BitReader; -impl EcntR { +pub type ECNT_R = crate::BitReader; +impl ECNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ecnt { + pub const fn variant(&self) -> ECNT_A { match self.bits { - false => Ecnt::Value1, - true => Ecnt::Value2, + false => ECNT_A::VALUE1, + true => ECNT_A::VALUE2, } } #[doc = "Quadrature CLK event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ecnt::Value1 + *self == ECNT_A::VALUE1 } #[doc = "Quadrature CLK event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ecnt::Value2 + *self == ECNT_A::VALUE2 } } #[doc = "Field `ECNT` writer - Quadrature CLK interrupt Enable"] -pub type EcntW<'a, REG> = crate::BitWriter<'a, REG, Ecnt>; -impl<'a, REG> EcntW<'a, REG> +pub type ECNT_W<'a, REG> = crate::BitWriter<'a, REG, ECNT_A>; +impl<'a, REG> ECNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature CLK event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ecnt::Value1) + self.variant(ECNT_A::VALUE1) } #[doc = "Quadrature CLK event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ecnt::Value2) + self.variant(ECNT_A::VALUE2) } } #[doc = "Quadrature direction change interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Edir { +pub enum EDIR_A { #[doc = "0: Direction change event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Direction change event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Edir) -> Self { + fn from(variant: EDIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EDIR` reader - Quadrature direction change interrupt Enable"] -pub type EdirR = crate::BitReader; -impl EdirR { +pub type EDIR_R = crate::BitReader; +impl EDIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Edir { + pub const fn variant(&self) -> EDIR_A { match self.bits { - false => Edir::Value1, - true => Edir::Value2, + false => EDIR_A::VALUE1, + true => EDIR_A::VALUE2, } } #[doc = "Direction change event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Edir::Value1 + *self == EDIR_A::VALUE1 } #[doc = "Direction change event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Edir::Value2 + *self == EDIR_A::VALUE2 } } #[doc = "Field `EDIR` writer - Quadrature direction change interrupt Enable"] -pub type EdirW<'a, REG> = crate::BitWriter<'a, REG, Edir>; -impl<'a, REG> EdirW<'a, REG> +pub type EDIR_W<'a, REG> = crate::BitWriter<'a, REG, EDIR_A>; +impl<'a, REG> EDIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Direction change event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Edir::Value1) + self.variant(EDIR_A::VALUE1) } #[doc = "Direction change event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Edir::Value2) + self.variant(EDIR_A::VALUE2) } } #[doc = "Quadrature Period CLK interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Epclk { +pub enum EPCLK_A { #[doc = "0: Quadrature Period CLK event interrupt disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Period CLK event interrupt enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Epclk) -> Self { + fn from(variant: EPCLK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EPCLK` reader - Quadrature Period CLK interrupt Enable"] -pub type EpclkR = crate::BitReader; -impl EpclkR { +pub type EPCLK_R = crate::BitReader; +impl EPCLK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Epclk { + pub const fn variant(&self) -> EPCLK_A { match self.bits { - false => Epclk::Value1, - true => Epclk::Value2, + false => EPCLK_A::VALUE1, + true => EPCLK_A::VALUE2, } } #[doc = "Quadrature Period CLK event interrupt disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Epclk::Value1 + *self == EPCLK_A::VALUE1 } #[doc = "Quadrature Period CLK event interrupt enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Epclk::Value2 + *self == EPCLK_A::VALUE2 } } #[doc = "Field `EPCLK` writer - Quadrature Period CLK interrupt Enable"] -pub type EpclkW<'a, REG> = crate::BitWriter<'a, REG, Epclk>; -impl<'a, REG> EpclkW<'a, REG> +pub type EPCLK_W<'a, REG> = crate::BitWriter<'a, REG, EPCLK_A>; +impl<'a, REG> EPCLK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Period CLK event interrupt disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Epclk::Value1) + self.variant(EPCLK_A::VALUE1) } #[doc = "Quadrature Period CLK event interrupt enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Epclk::Value2) + self.variant(EPCLK_A::VALUE2) } } #[doc = "Correct Hall Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chesel { +pub enum CHESEL_A { #[doc = "0: Correct Hall Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Correct Hall Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chesel) -> Self { + fn from(variant: CHESEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHESEL` reader - Correct Hall Event Service Request Selector"] -pub type CheselR = crate::BitReader; -impl CheselR { +pub type CHESEL_R = crate::BitReader; +impl CHESEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chesel { + pub const fn variant(&self) -> CHESEL_A { match self.bits { - false => Chesel::Value1, - true => Chesel::Value2, + false => CHESEL_A::VALUE1, + true => CHESEL_A::VALUE2, } } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chesel::Value1 + *self == CHESEL_A::VALUE1 } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chesel::Value2 + *self == CHESEL_A::VALUE2 } } #[doc = "Field `CHESEL` writer - Correct Hall Event Service Request Selector"] -pub type CheselW<'a, REG> = crate::BitWriter<'a, REG, Chesel>; -impl<'a, REG> CheselW<'a, REG> +pub type CHESEL_W<'a, REG> = crate::BitWriter<'a, REG, CHESEL_A>; +impl<'a, REG> CHESEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Correct Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chesel::Value1) + self.variant(CHESEL_A::VALUE1) } #[doc = "Correct Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chesel::Value2) + self.variant(CHESEL_A::VALUE2) } } #[doc = "Wrong Hall Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Whesel { +pub enum WHESEL_A { #[doc = "0: Wrong Hall Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wrong Hall Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Whesel) -> Self { + fn from(variant: WHESEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WHESEL` reader - Wrong Hall Event Service Request Selector"] -pub type WheselR = crate::BitReader; -impl WheselR { +pub type WHESEL_R = crate::BitReader; +impl WHESEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Whesel { + pub const fn variant(&self) -> WHESEL_A { match self.bits { - false => Whesel::Value1, - true => Whesel::Value2, + false => WHESEL_A::VALUE1, + true => WHESEL_A::VALUE2, } } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Whesel::Value1 + *self == WHESEL_A::VALUE1 } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Whesel::Value2 + *self == WHESEL_A::VALUE2 } } #[doc = "Field `WHESEL` writer - Wrong Hall Event Service Request Selector"] -pub type WheselW<'a, REG> = crate::BitWriter<'a, REG, Whesel>; -impl<'a, REG> WheselW<'a, REG> +pub type WHESEL_W<'a, REG> = crate::BitWriter<'a, REG, WHESEL_A>; +impl<'a, REG> WHESEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Whesel::Value1) + self.variant(WHESEL_A::VALUE1) } #[doc = "Wrong Hall Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Whesel::Value2) + self.variant(WHESEL_A::VALUE2) } } #[doc = "Hall Inputs Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hiesel { +pub enum HIESEL_A { #[doc = "0: Hall Inputs Update Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hall Inputs Update Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hiesel) -> Self { + fn from(variant: HIESEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIESEL` reader - Hall Inputs Update Event Service Request Selector"] -pub type HieselR = crate::BitReader; -impl HieselR { +pub type HIESEL_R = crate::BitReader; +impl HIESEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hiesel { + pub const fn variant(&self) -> HIESEL_A { match self.bits { - false => Hiesel::Value1, - true => Hiesel::Value2, + false => HIESEL_A::VALUE1, + true => HIESEL_A::VALUE2, } } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hiesel::Value1 + *self == HIESEL_A::VALUE1 } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hiesel::Value2 + *self == HIESEL_A::VALUE2 } } #[doc = "Field `HIESEL` writer - Hall Inputs Update Event Service Request Selector"] -pub type HieselW<'a, REG> = crate::BitWriter<'a, REG, Hiesel>; -impl<'a, REG> HieselW<'a, REG> +pub type HIESEL_W<'a, REG> = crate::BitWriter<'a, REG, HIESEL_A>; +impl<'a, REG> HIESEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hiesel::Value1) + self.variant(HIESEL_A::VALUE1) } #[doc = "Hall Inputs Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hiesel::Value2) + self.variant(HIESEL_A::VALUE2) } } #[doc = "Multi-Channel pattern Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mstsel { +pub enum MSTSEL_A { #[doc = "0: Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mstsel) -> Self { + fn from(variant: MSTSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSTSEL` reader - Multi-Channel pattern Update Event Service Request Selector"] -pub type MstselR = crate::BitReader; -impl MstselR { +pub type MSTSEL_R = crate::BitReader; +impl MSTSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mstsel { + pub const fn variant(&self) -> MSTSEL_A { match self.bits { - false => Mstsel::Value1, - true => Mstsel::Value2, + false => MSTSEL_A::VALUE1, + true => MSTSEL_A::VALUE2, } } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mstsel::Value1 + *self == MSTSEL_A::VALUE1 } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mstsel::Value2 + *self == MSTSEL_A::VALUE2 } } #[doc = "Field `MSTSEL` writer - Multi-Channel pattern Update Event Service Request Selector"] -pub type MstselW<'a, REG> = crate::BitWriter<'a, REG, Mstsel>; -impl<'a, REG> MstselW<'a, REG> +pub type MSTSEL_W<'a, REG> = crate::BitWriter<'a, REG, MSTSEL_A>; +impl<'a, REG> MSTSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mstsel::Value1) + self.variant(MSTSEL_A::VALUE1) } #[doc = "Multi-Channel pattern Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mstsel::Value2) + self.variant(MSTSEL_A::VALUE2) } } #[doc = "Quadrature Index Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Indsel { +pub enum INDSEL_A { #[doc = "0: Quadrature Index Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Index Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Indsel) -> Self { + fn from(variant: INDSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INDSEL` reader - Quadrature Index Event Service Request Selector"] -pub type IndselR = crate::BitReader; -impl IndselR { +pub type INDSEL_R = crate::BitReader; +impl INDSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Indsel { + pub const fn variant(&self) -> INDSEL_A { match self.bits { - false => Indsel::Value1, - true => Indsel::Value2, + false => INDSEL_A::VALUE1, + true => INDSEL_A::VALUE2, } } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Indsel::Value1 + *self == INDSEL_A::VALUE1 } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Indsel::Value2 + *self == INDSEL_A::VALUE2 } } #[doc = "Field `INDSEL` writer - Quadrature Index Event Service Request Selector"] -pub type IndselW<'a, REG> = crate::BitWriter<'a, REG, Indsel>; -impl<'a, REG> IndselW<'a, REG> +pub type INDSEL_W<'a, REG> = crate::BitWriter<'a, REG, INDSEL_A>; +impl<'a, REG> INDSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Indsel::Value1) + self.variant(INDSEL_A::VALUE1) } #[doc = "Quadrature Index Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Indsel::Value2) + self.variant(INDSEL_A::VALUE2) } } #[doc = "Quadrature Phase Error Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Errsel { +pub enum ERRSEL_A { #[doc = "0: Quadrature Phase error Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Phase error Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Errsel) -> Self { + fn from(variant: ERRSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERRSEL` reader - Quadrature Phase Error Event Service Request Selector"] -pub type ErrselR = crate::BitReader; -impl ErrselR { +pub type ERRSEL_R = crate::BitReader; +impl ERRSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Errsel { + pub const fn variant(&self) -> ERRSEL_A { match self.bits { - false => Errsel::Value1, - true => Errsel::Value2, + false => ERRSEL_A::VALUE1, + true => ERRSEL_A::VALUE2, } } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Errsel::Value1 + *self == ERRSEL_A::VALUE1 } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Errsel::Value2 + *self == ERRSEL_A::VALUE2 } } #[doc = "Field `ERRSEL` writer - Quadrature Phase Error Event Service Request Selector"] -pub type ErrselW<'a, REG> = crate::BitWriter<'a, REG, Errsel>; -impl<'a, REG> ErrselW<'a, REG> +pub type ERRSEL_W<'a, REG> = crate::BitWriter<'a, REG, ERRSEL_A>; +impl<'a, REG> ERRSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Errsel::Value1) + self.variant(ERRSEL_A::VALUE1) } #[doc = "Quadrature Phase error Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Errsel::Value2) + self.variant(ERRSEL_A::VALUE2) } } #[doc = "Quadrature Clock Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cntsel { +pub enum CNTSEL_A { #[doc = "0: Quadrature Clock Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Clock Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cntsel) -> Self { + fn from(variant: CNTSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CNTSEL` reader - Quadrature Clock Event Service Request Selector"] -pub type CntselR = crate::BitReader; -impl CntselR { +pub type CNTSEL_R = crate::BitReader; +impl CNTSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cntsel { + pub const fn variant(&self) -> CNTSEL_A { match self.bits { - false => Cntsel::Value1, - true => Cntsel::Value2, + false => CNTSEL_A::VALUE1, + true => CNTSEL_A::VALUE2, } } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cntsel::Value1 + *self == CNTSEL_A::VALUE1 } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cntsel::Value2 + *self == CNTSEL_A::VALUE2 } } #[doc = "Field `CNTSEL` writer - Quadrature Clock Event Service Request Selector"] -pub type CntselW<'a, REG> = crate::BitWriter<'a, REG, Cntsel>; -impl<'a, REG> CntselW<'a, REG> +pub type CNTSEL_W<'a, REG> = crate::BitWriter<'a, REG, CNTSEL_A>; +impl<'a, REG> CNTSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cntsel::Value1) + self.variant(CNTSEL_A::VALUE1) } #[doc = "Quadrature Clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cntsel::Value2) + self.variant(CNTSEL_A::VALUE2) } } #[doc = "Quadrature Direction Update Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dirsel { +pub enum DIRSEL_A { #[doc = "0: Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dirsel) -> Self { + fn from(variant: DIRSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIRSEL` reader - Quadrature Direction Update Event Service Request Selector"] -pub type DirselR = crate::BitReader; -impl DirselR { +pub type DIRSEL_R = crate::BitReader; +impl DIRSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dirsel { + pub const fn variant(&self) -> DIRSEL_A { match self.bits { - false => Dirsel::Value1, - true => Dirsel::Value2, + false => DIRSEL_A::VALUE1, + true => DIRSEL_A::VALUE2, } } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dirsel::Value1 + *self == DIRSEL_A::VALUE1 } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dirsel::Value2 + *self == DIRSEL_A::VALUE2 } } #[doc = "Field `DIRSEL` writer - Quadrature Direction Update Event Service Request Selector"] -pub type DirselW<'a, REG> = crate::BitWriter<'a, REG, Dirsel>; -impl<'a, REG> DirselW<'a, REG> +pub type DIRSEL_W<'a, REG> = crate::BitWriter<'a, REG, DIRSEL_A>; +impl<'a, REG> DIRSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dirsel::Value1) + self.variant(DIRSEL_A::VALUE1) } #[doc = "Quadrature Direction Update Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dirsel::Value2) + self.variant(DIRSEL_A::VALUE2) } } #[doc = "Quadrature Period clock Event Service Request Selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pclsel { +pub enum PCLSEL_A { #[doc = "0: Quadrature Period clock Event interrupt forward to POSIFx.SR0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Quadrature Period clock Event interrupt forward to POSIFx.SR1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pclsel) -> Self { + fn from(variant: PCLSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCLSEL` reader - Quadrature Period clock Event Service Request Selector"] -pub type PclselR = crate::BitReader; -impl PclselR { +pub type PCLSEL_R = crate::BitReader; +impl PCLSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pclsel { + pub const fn variant(&self) -> PCLSEL_A { match self.bits { - false => Pclsel::Value1, - true => Pclsel::Value2, + false => PCLSEL_A::VALUE1, + true => PCLSEL_A::VALUE2, } } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pclsel::Value1 + *self == PCLSEL_A::VALUE1 } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pclsel::Value2 + *self == PCLSEL_A::VALUE2 } } #[doc = "Field `PCLSEL` writer - Quadrature Period clock Event Service Request Selector"] -pub type PclselW<'a, REG> = crate::BitWriter<'a, REG, Pclsel>; -impl<'a, REG> PclselW<'a, REG> +pub type PCLSEL_W<'a, REG> = crate::BitWriter<'a, REG, PCLSEL_A>; +impl<'a, REG> PCLSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pclsel::Value1) + self.variant(PCLSEL_A::VALUE1) } #[doc = "Quadrature Period clock Event interrupt forward to POSIFx.SR1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pclsel::Value2) + self.variant(PCLSEL_A::VALUE2) } } impl R { #[doc = "Bit 0 - Correct Hall Event Enable"] #[inline(always)] - pub fn eche(&self) -> EcheR { - EcheR::new((self.bits & 1) != 0) + pub fn eche(&self) -> ECHE_R { + ECHE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong Hall Event Enable"] #[inline(always)] - pub fn ewhe(&self) -> EwheR { - EwheR::new(((self.bits >> 1) & 1) != 0) + pub fn ewhe(&self) -> EWHE_R { + EWHE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Hall Input Update Enable"] #[inline(always)] - pub fn ehie(&self) -> EhieR { - EhieR::new(((self.bits >> 2) & 1) != 0) + pub fn ehie(&self) -> EHIE_R { + EHIE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"] #[inline(always)] - pub fn emst(&self) -> EmstR { - EmstR::new(((self.bits >> 4) & 1) != 0) + pub fn emst(&self) -> EMST_R { + EMST_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Quadrature Index Event Enable"] #[inline(always)] - pub fn eindx(&self) -> EindxR { - EindxR::new(((self.bits >> 8) & 1) != 0) + pub fn eindx(&self) -> EINDX_R { + EINDX_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Quadrature Phase Error Enable"] #[inline(always)] - pub fn eerr(&self) -> EerrR { - EerrR::new(((self.bits >> 9) & 1) != 0) + pub fn eerr(&self) -> EERR_R { + EERR_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Quadrature CLK interrupt Enable"] #[inline(always)] - pub fn ecnt(&self) -> EcntR { - EcntR::new(((self.bits >> 10) & 1) != 0) + pub fn ecnt(&self) -> ECNT_R { + ECNT_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Quadrature direction change interrupt Enable"] #[inline(always)] - pub fn edir(&self) -> EdirR { - EdirR::new(((self.bits >> 11) & 1) != 0) + pub fn edir(&self) -> EDIR_R { + EDIR_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"] #[inline(always)] - pub fn epclk(&self) -> EpclkR { - EpclkR::new(((self.bits >> 12) & 1) != 0) + pub fn epclk(&self) -> EPCLK_R { + EPCLK_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 16 - Correct Hall Event Service Request Selector"] #[inline(always)] - pub fn chesel(&self) -> CheselR { - CheselR::new(((self.bits >> 16) & 1) != 0) + pub fn chesel(&self) -> CHESEL_R { + CHESEL_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"] #[inline(always)] - pub fn whesel(&self) -> WheselR { - WheselR::new(((self.bits >> 17) & 1) != 0) + pub fn whesel(&self) -> WHESEL_R { + WHESEL_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"] #[inline(always)] - pub fn hiesel(&self) -> HieselR { - HieselR::new(((self.bits >> 18) & 1) != 0) + pub fn hiesel(&self) -> HIESEL_R { + HIESEL_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"] #[inline(always)] - pub fn mstsel(&self) -> MstselR { - MstselR::new(((self.bits >> 20) & 1) != 0) + pub fn mstsel(&self) -> MSTSEL_R { + MSTSEL_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"] #[inline(always)] - pub fn indsel(&self) -> IndselR { - IndselR::new(((self.bits >> 24) & 1) != 0) + pub fn indsel(&self) -> INDSEL_R { + INDSEL_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"] #[inline(always)] - pub fn errsel(&self) -> ErrselR { - ErrselR::new(((self.bits >> 25) & 1) != 0) + pub fn errsel(&self) -> ERRSEL_R { + ERRSEL_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"] #[inline(always)] - pub fn cntsel(&self) -> CntselR { - CntselR::new(((self.bits >> 26) & 1) != 0) + pub fn cntsel(&self) -> CNTSEL_R { + CNTSEL_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"] #[inline(always)] - pub fn dirsel(&self) -> DirselR { - DirselR::new(((self.bits >> 27) & 1) != 0) + pub fn dirsel(&self) -> DIRSEL_R { + DIRSEL_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"] #[inline(always)] - pub fn pclsel(&self) -> PclselR { - PclselR::new(((self.bits >> 28) & 1) != 0) + pub fn pclsel(&self) -> PCLSEL_R { + PCLSEL_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Correct Hall Event Enable"] #[inline(always)] #[must_use] - pub fn eche(&mut self) -> EcheW { - EcheW::new(self, 0) + pub fn eche(&mut self) -> ECHE_W { + ECHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event Enable"] #[inline(always)] #[must_use] - pub fn ewhe(&mut self) -> EwheW { - EwheW::new(self, 1) + pub fn ewhe(&mut self) -> EWHE_W { + EWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Input Update Enable"] #[inline(always)] #[must_use] - pub fn ehie(&mut self) -> EhieW { - EhieW::new(self, 2) + pub fn ehie(&mut self) -> EHIE_W { + EHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"] #[inline(always)] #[must_use] - pub fn emst(&mut self) -> EmstW { - EmstW::new(self, 4) + pub fn emst(&mut self) -> EMST_W { + EMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index Event Enable"] #[inline(always)] #[must_use] - pub fn eindx(&mut self) -> EindxW { - EindxW::new(self, 8) + pub fn eindx(&mut self) -> EINDX_W { + EINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error Enable"] #[inline(always)] #[must_use] - pub fn eerr(&mut self) -> EerrW { - EerrW::new(self, 9) + pub fn eerr(&mut self) -> EERR_W { + EERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK interrupt Enable"] #[inline(always)] #[must_use] - pub fn ecnt(&mut self) -> EcntW { - EcntW::new(self, 10) + pub fn ecnt(&mut self) -> ECNT_W { + ECNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature direction change interrupt Enable"] #[inline(always)] #[must_use] - pub fn edir(&mut self) -> EdirW { - EdirW::new(self, 11) + pub fn edir(&mut self) -> EDIR_W { + EDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"] #[inline(always)] #[must_use] - pub fn epclk(&mut self) -> EpclkW { - EpclkW::new(self, 12) + pub fn epclk(&mut self) -> EPCLK_W { + EPCLK_W::new(self, 12) } #[doc = "Bit 16 - Correct Hall Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn chesel(&mut self) -> CheselW { - CheselW::new(self, 16) + pub fn chesel(&mut self) -> CHESEL_W { + CHESEL_W::new(self, 16) } #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn whesel(&mut self) -> WheselW { - WheselW::new(self, 17) + pub fn whesel(&mut self) -> WHESEL_W { + WHESEL_W::new(self, 17) } #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn hiesel(&mut self) -> HieselW { - HieselW::new(self, 18) + pub fn hiesel(&mut self) -> HIESEL_W { + HIESEL_W::new(self, 18) } #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn mstsel(&mut self) -> MstselW { - MstselW::new(self, 20) + pub fn mstsel(&mut self) -> MSTSEL_W { + MSTSEL_W::new(self, 20) } #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn indsel(&mut self) -> IndselW { - IndselW::new(self, 24) + pub fn indsel(&mut self) -> INDSEL_W { + INDSEL_W::new(self, 24) } #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn errsel(&mut self) -> ErrselW { - ErrselW::new(self, 25) + pub fn errsel(&mut self) -> ERRSEL_W { + ERRSEL_W::new(self, 25) } #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn cntsel(&mut self) -> CntselW { - CntselW::new(self, 26) + pub fn cntsel(&mut self) -> CNTSEL_W { + CNTSEL_W::new(self, 26) } #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn dirsel(&mut self) -> DirselW { - DirselW::new(self, 27) + pub fn dirsel(&mut self) -> DIRSEL_W { + DIRSEL_W::new(self, 27) } #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"] #[inline(always)] #[must_use] - pub fn pclsel(&mut self) -> PclselW { - PclselW::new(self, 28) + pub fn pclsel(&mut self) -> PCLSEL_W { + PCLSEL_W::new(self, 28) } } #[doc = "Service Request Processing Interrupt Enable\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pflge::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pflge::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PflgeSpec; -impl crate::RegisterSpec for PflgeSpec { +pub struct PFLGE_SPEC; +impl crate::RegisterSpec for PFLGE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pflge::R`](R) reader structure"] -impl crate::Readable for PflgeSpec {} +impl crate::Readable for PFLGE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pflge::W`](W) writer structure"] -impl crate::Writable for PflgeSpec { +impl crate::Writable for PFLGE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PFLGE to value 0"] -impl crate::Resettable for PflgeSpec { +impl crate::Resettable for PFLGE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/prun.rs b/src/posif0/prun.rs index f437a674..25512c24 100644 --- a/src/posif0/prun.rs +++ b/src/posif0/prun.rs @@ -1,56 +1,56 @@ #[doc = "Register `PRUN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Run Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rb { +pub enum RB_A { #[doc = "0: IDLE"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Running"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rb) -> Self { + fn from(variant: RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RB` reader - Run Bit"] -pub type RbR = crate::BitReader; -impl RbR { +pub type RB_R = crate::BitReader; +impl RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rb { + pub const fn variant(&self) -> RB_A { match self.bits { - false => Rb::Value1, - true => Rb::Value2, + false => RB_A::VALUE1, + true => RB_A::VALUE2, } } #[doc = "IDLE"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rb::Value1 + *self == RB_A::VALUE1 } #[doc = "Running"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rb::Value2 + *self == RB_A::VALUE2 } } impl R { #[doc = "Bit 0 - Run Bit"] #[inline(always)] - pub fn rb(&self) -> RbR { - RbR::new((self.bits & 1) != 0) + pub fn rb(&self) -> RB_R { + RB_R::new((self.bits & 1) != 0) } } #[doc = "Service Request Processing Run Bit Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prun::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrunSpec; -impl crate::RegisterSpec for PrunSpec { +pub struct PRUN_SPEC; +impl crate::RegisterSpec for PRUN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prun::R`](R) reader structure"] -impl crate::Readable for PrunSpec {} +impl crate::Readable for PRUN_SPEC {} #[doc = "`reset()` method sets PRUN to value 0"] -impl crate::Resettable for PrunSpec { +impl crate::Resettable for PRUN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/prunc.rs b/src/posif0/prunc.rs index 28210ae0..1aaeed99 100644 --- a/src/posif0/prunc.rs +++ b/src/posif0/prunc.rs @@ -1,35 +1,35 @@ #[doc = "Register `PRUNC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CRB` writer - Clear Run bit"] -pub type CrbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CRB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CSM` writer - Clear Current internal status"] -pub type CsmW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSM_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Run bit"] #[inline(always)] #[must_use] - pub fn crb(&mut self) -> CrbW { - CrbW::new(self, 0) + pub fn crb(&mut self) -> CRB_W { + CRB_W::new(self, 0) } #[doc = "Bit 1 - Clear Current internal status"] #[inline(always)] #[must_use] - pub fn csm(&mut self) -> CsmW { - CsmW::new(self, 1) + pub fn csm(&mut self) -> CSM_W { + CSM_W::new(self, 1) } } #[doc = "Service Request Processing Run Bit Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prunc::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PruncSpec; -impl crate::RegisterSpec for PruncSpec { +pub struct PRUNC_SPEC; +impl crate::RegisterSpec for PRUNC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prunc::W`](W) writer structure"] -impl crate::Writable for PruncSpec { +impl crate::Writable for PRUNC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRUNC to value 0"] -impl crate::Resettable for PruncSpec { +impl crate::Resettable for PRUNC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/pruns.rs b/src/posif0/pruns.rs index b9c630f7..71658dca 100644 --- a/src/posif0/pruns.rs +++ b/src/posif0/pruns.rs @@ -1,27 +1,27 @@ #[doc = "Register `PRUNS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SRB` writer - Set Run bit"] -pub type SrbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SRB_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Set Run bit"] #[inline(always)] #[must_use] - pub fn srb(&mut self) -> SrbW { - SrbW::new(self, 0) + pub fn srb(&mut self) -> SRB_W { + SRB_W::new(self, 0) } } #[doc = "Service Request Processing Run Bit Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pruns::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PrunsSpec; -impl crate::RegisterSpec for PrunsSpec { +pub struct PRUNS_SPEC; +impl crate::RegisterSpec for PRUNS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pruns::W`](W) writer structure"] -impl crate::Writable for PrunsSpec { +impl crate::Writable for PRUNS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRUNS to value 0"] -impl crate::Resettable for PrunsSpec { +impl crate::Resettable for PRUNS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/psus.rs b/src/posif0/psus.rs index 0e6730f9..647c11ef 100644 --- a/src/posif0/psus.rs +++ b/src/posif0/psus.rs @@ -1,68 +1,68 @@ #[doc = "Register `PSUS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSUS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Quadrature Mode Suspend Config\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Qsus { +pub enum QSUS_A { #[doc = "0: Suspend request ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stop immediately"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Suspend in the next index occurrence"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Suspend in the next phase (PhaseA or PhaseB) occurrence"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Qsus) -> Self { + fn from(variant: QSUS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Qsus { +impl crate::FieldSpec for QSUS_A { type Ux = u8; } -impl crate::IsEnum for Qsus {} +impl crate::IsEnum for QSUS_A {} #[doc = "Field `QSUS` reader - Quadrature Mode Suspend Config"] -pub type QsusR = crate::FieldReader; -impl QsusR { +pub type QSUS_R = crate::FieldReader; +impl QSUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Qsus { + pub const fn variant(&self) -> QSUS_A { match self.bits { - 0 => Qsus::Value1, - 1 => Qsus::Value2, - 2 => Qsus::Value3, - 3 => Qsus::Value4, + 0 => QSUS_A::VALUE1, + 1 => QSUS_A::VALUE2, + 2 => QSUS_A::VALUE3, + 3 => QSUS_A::VALUE4, _ => unreachable!(), } } #[doc = "Suspend request ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Qsus::Value1 + *self == QSUS_A::VALUE1 } #[doc = "Stop immediately"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Qsus::Value2 + *self == QSUS_A::VALUE2 } #[doc = "Suspend in the next index occurrence"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Qsus::Value3 + *self == QSUS_A::VALUE3 } #[doc = "Suspend in the next phase (PhaseA or PhaseB) occurrence"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Qsus::Value4 + *self == QSUS_A::VALUE4 } } #[doc = "Field `QSUS` writer - Quadrature Mode Suspend Config"] -pub type QsusW<'a, REG> = crate::FieldWriter<'a, REG, 2, Qsus, crate::Safe>; -impl<'a, REG> QsusW<'a, REG> +pub type QSUS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, QSUS_A, crate::Safe>; +impl<'a, REG> QSUS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Suspend request ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Qsus::Value1) + self.variant(QSUS_A::VALUE1) } #[doc = "Stop immediately"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Qsus::Value2) + self.variant(QSUS_A::VALUE2) } #[doc = "Suspend in the next index occurrence"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Qsus::Value3) + self.variant(QSUS_A::VALUE3) } #[doc = "Suspend in the next phase (PhaseA or PhaseB) occurrence"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Qsus::Value4) + self.variant(QSUS_A::VALUE4) } } #[doc = "Multi-Channel Mode Suspend Config\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Msus { +pub enum MSUS_A { #[doc = "0: Suspend request ignored"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Stop immediately. Multi-Channel pattern is not set to the reset value."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Stop immediately. Multi-Channel pattern is set to the reset value."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Msus) -> Self { + fn from(variant: MSUS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Msus { +impl crate::FieldSpec for MSUS_A { type Ux = u8; } -impl crate::IsEnum for Msus {} +impl crate::IsEnum for MSUS_A {} #[doc = "Field `MSUS` reader - Multi-Channel Mode Suspend Config"] -pub type MsusR = crate::FieldReader; -impl MsusR { +pub type MSUS_R = crate::FieldReader; +impl MSUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msus { + pub const fn variant(&self) -> MSUS_A { match self.bits { - 0 => Msus::Value1, - 1 => Msus::Value2, - 2 => Msus::Value3, - 3 => Msus::Value4, + 0 => MSUS_A::VALUE1, + 1 => MSUS_A::VALUE2, + 2 => MSUS_A::VALUE3, + 3 => MSUS_A::VALUE4, _ => unreachable!(), } } #[doc = "Suspend request ignored"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msus::Value1 + *self == MSUS_A::VALUE1 } #[doc = "Stop immediately. Multi-Channel pattern is not set to the reset value."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msus::Value2 + *self == MSUS_A::VALUE2 } #[doc = "Stop immediately. Multi-Channel pattern is set to the reset value."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Msus::Value3 + *self == MSUS_A::VALUE3 } #[doc = "Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Msus::Value4 + *self == MSUS_A::VALUE4 } } #[doc = "Field `MSUS` writer - Multi-Channel Mode Suspend Config"] -pub type MsusW<'a, REG> = crate::FieldWriter<'a, REG, 2, Msus, crate::Safe>; -impl<'a, REG> MsusW<'a, REG> +pub type MSUS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MSUS_A, crate::Safe>; +impl<'a, REG> MSUS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,64 +156,64 @@ where #[doc = "Suspend request ignored"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msus::Value1) + self.variant(MSUS_A::VALUE1) } #[doc = "Stop immediately. Multi-Channel pattern is not set to the reset value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msus::Value2) + self.variant(MSUS_A::VALUE2) } #[doc = "Stop immediately. Multi-Channel pattern is set to the reset value."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Msus::Value3) + self.variant(MSUS_A::VALUE3) } #[doc = "Suspend with the synchronization of the PWM signal. Multi-Channel pattern is set to the reset value at the same time of the synchronization."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Msus::Value4) + self.variant(MSUS_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"] #[inline(always)] - pub fn qsus(&self) -> QsusR { - QsusR::new((self.bits & 3) as u8) + pub fn qsus(&self) -> QSUS_R { + QSUS_R::new((self.bits & 3) as u8) } #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"] #[inline(always)] - pub fn msus(&self) -> MsusR { - MsusR::new(((self.bits >> 2) & 3) as u8) + pub fn msus(&self) -> MSUS_R { + MSUS_R::new(((self.bits >> 2) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"] #[inline(always)] #[must_use] - pub fn qsus(&mut self) -> QsusW { - QsusW::new(self, 0) + pub fn qsus(&mut self) -> QSUS_W { + QSUS_W::new(self, 0) } #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"] #[inline(always)] #[must_use] - pub fn msus(&mut self) -> MsusW { - MsusW::new(self, 2) + pub fn msus(&mut self) -> MSUS_W { + MSUS_W::new(self, 2) } } #[doc = "Service Request Processing Suspend Config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psus::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psus::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsusSpec; -impl crate::RegisterSpec for PsusSpec { +pub struct PSUS_SPEC; +impl crate::RegisterSpec for PSUS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psus::R`](R) reader structure"] -impl crate::Readable for PsusSpec {} +impl crate::Readable for PSUS_SPEC {} #[doc = "`write(|w| ..)` method takes [`psus::W`](W) writer structure"] -impl crate::Writable for PsusSpec { +impl crate::Writable for PSUS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSUS to value 0"] -impl crate::Resettable for PsusSpec { +impl crate::Resettable for PSUS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/qdc.rs b/src/posif0/qdc.rs index fb2e06bc..790ee5b0 100644 --- a/src/posif0/qdc.rs +++ b/src/posif0/qdc.rs @@ -1,219 +1,219 @@ #[doc = "Register `QDC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QDC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Phase A Level selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pals { +pub enum PALS_A { #[doc = "0: Phase A is active HIGH"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Phase A is active LOW"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pals) -> Self { + fn from(variant: PALS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PALS` reader - Phase A Level selector"] -pub type PalsR = crate::BitReader; -impl PalsR { +pub type PALS_R = crate::BitReader; +impl PALS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pals { + pub const fn variant(&self) -> PALS_A { match self.bits { - false => Pals::Value1, - true => Pals::Value2, + false => PALS_A::VALUE1, + true => PALS_A::VALUE2, } } #[doc = "Phase A is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pals::Value1 + *self == PALS_A::VALUE1 } #[doc = "Phase A is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pals::Value2 + *self == PALS_A::VALUE2 } } #[doc = "Field `PALS` writer - Phase A Level selector"] -pub type PalsW<'a, REG> = crate::BitWriter<'a, REG, Pals>; -impl<'a, REG> PalsW<'a, REG> +pub type PALS_W<'a, REG> = crate::BitWriter<'a, REG, PALS_A>; +impl<'a, REG> PALS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase A is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pals::Value1) + self.variant(PALS_A::VALUE1) } #[doc = "Phase A is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pals::Value2) + self.variant(PALS_A::VALUE2) } } #[doc = "Phase B Level selector\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pbls { +pub enum PBLS_A { #[doc = "0: Phase B is active HIGH"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Phase B is active LOW"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pbls) -> Self { + fn from(variant: PBLS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PBLS` reader - Phase B Level selector"] -pub type PblsR = crate::BitReader; -impl PblsR { +pub type PBLS_R = crate::BitReader; +impl PBLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pbls { + pub const fn variant(&self) -> PBLS_A { match self.bits { - false => Pbls::Value1, - true => Pbls::Value2, + false => PBLS_A::VALUE1, + true => PBLS_A::VALUE2, } } #[doc = "Phase B is active HIGH"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pbls::Value1 + *self == PBLS_A::VALUE1 } #[doc = "Phase B is active LOW"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pbls::Value2 + *self == PBLS_A::VALUE2 } } #[doc = "Field `PBLS` writer - Phase B Level selector"] -pub type PblsW<'a, REG> = crate::BitWriter<'a, REG, Pbls>; -impl<'a, REG> PblsW<'a, REG> +pub type PBLS_W<'a, REG> = crate::BitWriter<'a, REG, PBLS_A>; +impl<'a, REG> PBLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase B is active HIGH"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pbls::Value1) + self.variant(PBLS_A::VALUE1) } #[doc = "Phase B is active LOW"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pbls::Value2) + self.variant(PBLS_A::VALUE2) } } #[doc = "Phase signals swap\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Phs { +pub enum PHS_A { #[doc = "0: Phase A is the leading signal for clockwise rotation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Phase B is the leading signal for clockwise rotation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Phs) -> Self { + fn from(variant: PHS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PHS` reader - Phase signals swap"] -pub type PhsR = crate::BitReader; -impl PhsR { +pub type PHS_R = crate::BitReader; +impl PHS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Phs { + pub const fn variant(&self) -> PHS_A { match self.bits { - false => Phs::Value1, - true => Phs::Value2, + false => PHS_A::VALUE1, + true => PHS_A::VALUE2, } } #[doc = "Phase A is the leading signal for clockwise rotation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Phs::Value1 + *self == PHS_A::VALUE1 } #[doc = "Phase B is the leading signal for clockwise rotation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Phs::Value2 + *self == PHS_A::VALUE2 } } #[doc = "Field `PHS` writer - Phase signals swap"] -pub type PhsW<'a, REG> = crate::BitWriter<'a, REG, Phs>; -impl<'a, REG> PhsW<'a, REG> +pub type PHS_W<'a, REG> = crate::BitWriter<'a, REG, PHS_A>; +impl<'a, REG> PHS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Phase A is the leading signal for clockwise rotation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Phs::Value1) + self.variant(PHS_A::VALUE1) } #[doc = "Phase B is the leading signal for clockwise rotation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Phs::Value2) + self.variant(PHS_A::VALUE2) } } #[doc = "Index Marker generations control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Icm { +pub enum ICM_A { #[doc = "0: No index marker generation on POSIFx.OUT3"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Only first index occurrence generated on POSIFx.OUT3"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: All index occurrences generated on POSIFx.OUT3"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Icm) -> Self { + fn from(variant: ICM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Icm { +impl crate::FieldSpec for ICM_A { type Ux = u8; } -impl crate::IsEnum for Icm {} +impl crate::IsEnum for ICM_A {} #[doc = "Field `ICM` reader - Index Marker generations control"] -pub type IcmR = crate::FieldReader; -impl IcmR { +pub type ICM_R = crate::FieldReader; +impl ICM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Icm::Value1), - 1 => Some(Icm::Value2), - 2 => Some(Icm::Value3), + 0 => Some(ICM_A::VALUE1), + 1 => Some(ICM_A::VALUE2), + 2 => Some(ICM_A::VALUE3), _ => None, } } #[doc = "No index marker generation on POSIFx.OUT3"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Icm::Value1 + *self == ICM_A::VALUE1 } #[doc = "Only first index occurrence generated on POSIFx.OUT3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Icm::Value2 + *self == ICM_A::VALUE2 } #[doc = "All index occurrences generated on POSIFx.OUT3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Icm::Value3 + *self == ICM_A::VALUE3 } } #[doc = "Field `ICM` writer - Index Marker generations control"] -pub type IcmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Icm>; -impl<'a, REG> IcmW<'a, REG> +pub type ICM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ICM_A>; +impl<'a, REG> ICM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -221,122 +221,122 @@ where #[doc = "No index marker generation on POSIFx.OUT3"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Icm::Value1) + self.variant(ICM_A::VALUE1) } #[doc = "Only first index occurrence generated on POSIFx.OUT3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Icm::Value2) + self.variant(ICM_A::VALUE2) } #[doc = "All index occurrences generated on POSIFx.OUT3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Icm::Value3) + self.variant(ICM_A::VALUE3) } } #[doc = "Current rotation direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dval { +pub enum DVAL_A { #[doc = "0: Counterclockwise rotation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clockwise rotation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dval) -> Self { + fn from(variant: DVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DVAL` reader - Current rotation direction"] -pub type DvalR = crate::BitReader; -impl DvalR { +pub type DVAL_R = crate::BitReader; +impl DVAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dval { + pub const fn variant(&self) -> DVAL_A { match self.bits { - false => Dval::Value1, - true => Dval::Value2, + false => DVAL_A::VALUE1, + true => DVAL_A::VALUE2, } } #[doc = "Counterclockwise rotation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dval::Value1 + *self == DVAL_A::VALUE1 } #[doc = "Clockwise rotation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dval::Value2 + *self == DVAL_A::VALUE2 } } impl R { #[doc = "Bit 0 - Phase A Level selector"] #[inline(always)] - pub fn pals(&self) -> PalsR { - PalsR::new((self.bits & 1) != 0) + pub fn pals(&self) -> PALS_R { + PALS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Phase B Level selector"] #[inline(always)] - pub fn pbls(&self) -> PblsR { - PblsR::new(((self.bits >> 1) & 1) != 0) + pub fn pbls(&self) -> PBLS_R { + PBLS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Phase signals swap"] #[inline(always)] - pub fn phs(&self) -> PhsR { - PhsR::new(((self.bits >> 2) & 1) != 0) + pub fn phs(&self) -> PHS_R { + PHS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:5 - Index Marker generations control"] #[inline(always)] - pub fn icm(&self) -> IcmR { - IcmR::new(((self.bits >> 4) & 3) as u8) + pub fn icm(&self) -> ICM_R { + ICM_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 8 - Current rotation direction"] #[inline(always)] - pub fn dval(&self) -> DvalR { - DvalR::new(((self.bits >> 8) & 1) != 0) + pub fn dval(&self) -> DVAL_R { + DVAL_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Phase A Level selector"] #[inline(always)] #[must_use] - pub fn pals(&mut self) -> PalsW { - PalsW::new(self, 0) + pub fn pals(&mut self) -> PALS_W { + PALS_W::new(self, 0) } #[doc = "Bit 1 - Phase B Level selector"] #[inline(always)] #[must_use] - pub fn pbls(&mut self) -> PblsW { - PblsW::new(self, 1) + pub fn pbls(&mut self) -> PBLS_W { + PBLS_W::new(self, 1) } #[doc = "Bit 2 - Phase signals swap"] #[inline(always)] #[must_use] - pub fn phs(&mut self) -> PhsW { - PhsW::new(self, 2) + pub fn phs(&mut self) -> PHS_W { + PHS_W::new(self, 2) } #[doc = "Bits 4:5 - Index Marker generations control"] #[inline(always)] #[must_use] - pub fn icm(&mut self) -> IcmW { - IcmW::new(self, 4) + pub fn icm(&mut self) -> ICM_W { + ICM_W::new(self, 4) } } #[doc = "Quadrature Decoder Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qdc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qdc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct QdcSpec; -impl crate::RegisterSpec for QdcSpec { +pub struct QDC_SPEC; +impl crate::RegisterSpec for QDC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`qdc::R`](R) reader structure"] -impl crate::Readable for QdcSpec {} +impl crate::Readable for QDC_SPEC {} #[doc = "`write(|w| ..)` method takes [`qdc::W`](W) writer structure"] -impl crate::Writable for QdcSpec { +impl crate::Writable for QDC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QDC to value 0"] -impl crate::Resettable for QdcSpec { +impl crate::Resettable for QDC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/rpflg.rs b/src/posif0/rpflg.rs index 06e6462a..a96d2f25 100644 --- a/src/posif0/rpflg.rs +++ b/src/posif0/rpflg.rs @@ -1,91 +1,91 @@ #[doc = "Register `RPFLG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RCHE` writer - Correct Hall Event flag clear"] -pub type RcheW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCHE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RWHE` writer - Wrong Hall Event flag clear"] -pub type RwheW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RWHE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RHIE` writer - Hall Inputs Update Event flag clear"] -pub type RhieW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RHIE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RMST` writer - Multi-Channel Pattern shadow transfer flag clear"] -pub type RmstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RMST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RINDX` writer - Quadrature Index flag clear"] -pub type RindxW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RINDX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RERR` writer - Quadrature Phase Error flag clear"] -pub type RerrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RCNT` writer - Quadrature CLK flag clear"] -pub type RcntW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RCNT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RDIR` writer - Quadrature Direction flag clear"] -pub type RdirW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPCLK` writer - Quadrature period clock flag clear"] -pub type RpclkW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag clear"] #[inline(always)] #[must_use] - pub fn rche(&mut self) -> RcheW { - RcheW::new(self, 0) + pub fn rche(&mut self) -> RCHE_W { + RCHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag clear"] #[inline(always)] #[must_use] - pub fn rwhe(&mut self) -> RwheW { - RwheW::new(self, 1) + pub fn rwhe(&mut self) -> RWHE_W { + RWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag clear"] #[inline(always)] #[must_use] - pub fn rhie(&mut self) -> RhieW { - RhieW::new(self, 2) + pub fn rhie(&mut self) -> RHIE_W { + RHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag clear"] #[inline(always)] #[must_use] - pub fn rmst(&mut self) -> RmstW { - RmstW::new(self, 4) + pub fn rmst(&mut self) -> RMST_W { + RMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag clear"] #[inline(always)] #[must_use] - pub fn rindx(&mut self) -> RindxW { - RindxW::new(self, 8) + pub fn rindx(&mut self) -> RINDX_W { + RINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag clear"] #[inline(always)] #[must_use] - pub fn rerr(&mut self) -> RerrW { - RerrW::new(self, 9) + pub fn rerr(&mut self) -> RERR_W { + RERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag clear"] #[inline(always)] #[must_use] - pub fn rcnt(&mut self) -> RcntW { - RcntW::new(self, 10) + pub fn rcnt(&mut self) -> RCNT_W { + RCNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag clear"] #[inline(always)] #[must_use] - pub fn rdir(&mut self) -> RdirW { - RdirW::new(self, 11) + pub fn rdir(&mut self) -> RDIR_W { + RDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag clear"] #[inline(always)] #[must_use] - pub fn rpclk(&mut self) -> RpclkW { - RpclkW::new(self, 12) + pub fn rpclk(&mut self) -> RPCLK_W { + RPCLK_W::new(self, 12) } } #[doc = "Service Request Processing Interrupt Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rpflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RpflgSpec; -impl crate::RegisterSpec for RpflgSpec { +pub struct RPFLG_SPEC; +impl crate::RegisterSpec for RPFLG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rpflg::W`](W) writer structure"] -impl crate::Writable for RpflgSpec { +impl crate::Writable for RPFLG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RPFLG to value 0"] -impl crate::Resettable for RpflgSpec { +impl crate::Resettable for RPFLG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/posif0/spflg.rs b/src/posif0/spflg.rs index 1de986c7..d4313e69 100644 --- a/src/posif0/spflg.rs +++ b/src/posif0/spflg.rs @@ -1,91 +1,91 @@ #[doc = "Register `SPFLG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SCHE` writer - Correct Hall Event flag set"] -pub type ScheW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCHE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SWHE` writer - Wrong Hall Event flag set"] -pub type SwheW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SWHE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SHIE` writer - Hall Inputs Update Event flag set"] -pub type ShieW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SHIE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SMST` writer - Multi-Channel Pattern shadow transfer flag set"] -pub type SmstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SMST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SINDX` writer - Quadrature Index flag set"] -pub type SindxW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SINDX_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SERR` writer - Quadrature Phase Error flag set"] -pub type SerrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SCNT` writer - Quadrature CLK flag set"] -pub type ScntW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SCNT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SDIR` writer - Quadrature Direction flag set"] -pub type SdirW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SDIR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPCLK` writer - Quadrature period clock flag set"] -pub type SpclkW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag set"] #[inline(always)] #[must_use] - pub fn sche(&mut self) -> ScheW { - ScheW::new(self, 0) + pub fn sche(&mut self) -> SCHE_W { + SCHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag set"] #[inline(always)] #[must_use] - pub fn swhe(&mut self) -> SwheW { - SwheW::new(self, 1) + pub fn swhe(&mut self) -> SWHE_W { + SWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag set"] #[inline(always)] #[must_use] - pub fn shie(&mut self) -> ShieW { - ShieW::new(self, 2) + pub fn shie(&mut self) -> SHIE_W { + SHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag set"] #[inline(always)] #[must_use] - pub fn smst(&mut self) -> SmstW { - SmstW::new(self, 4) + pub fn smst(&mut self) -> SMST_W { + SMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag set"] #[inline(always)] #[must_use] - pub fn sindx(&mut self) -> SindxW { - SindxW::new(self, 8) + pub fn sindx(&mut self) -> SINDX_W { + SINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag set"] #[inline(always)] #[must_use] - pub fn serr(&mut self) -> SerrW { - SerrW::new(self, 9) + pub fn serr(&mut self) -> SERR_W { + SERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag set"] #[inline(always)] #[must_use] - pub fn scnt(&mut self) -> ScntW { - ScntW::new(self, 10) + pub fn scnt(&mut self) -> SCNT_W { + SCNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag set"] #[inline(always)] #[must_use] - pub fn sdir(&mut self) -> SdirW { - SdirW::new(self, 11) + pub fn sdir(&mut self) -> SDIR_W { + SDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag set"] #[inline(always)] #[must_use] - pub fn spclk(&mut self) -> SpclkW { - SpclkW::new(self, 12) + pub fn spclk(&mut self) -> SPCLK_W { + SPCLK_W::new(self, 12) } } #[doc = "Service Request Processing Interrupt Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`spflg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SpflgSpec; -impl crate::RegisterSpec for SpflgSpec { +pub struct SPFLG_SPEC; +impl crate::RegisterSpec for SPFLG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`spflg::W`](W) writer structure"] -impl crate::Writable for SpflgSpec { +impl crate::Writable for SPFLG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SPFLG to value 0"] -impl crate::Resettable for SpflgSpec { +impl crate::Resettable for SPFLG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb.rs b/src/ppb.rs index cac6babd..a16ff7a7 100644 --- a/src/ppb.rs +++ b/src/ppb.rs @@ -2,1027 +2,943 @@ #[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x08], - actlr: Actlr, + actlr: ACTLR, _reserved1: [u8; 0x04], - syst_csr: SystCsr, - syst_rvr: SystRvr, - syst_cvr: SystCvr, - syst_calib: SystCalib, + syst_csr: SYST_CSR, + syst_rvr: SYST_RVR, + syst_cvr: SYST_CVR, + syst_calib: SYST_CALIB, _reserved5: [u8; 0xe0], - nvic_iser0: NvicIser0, - nvic_iser1: NvicIser1, - nvic_iser2: NvicIser2, - nvic_iser3: NvicIser3, + nvic_iser0: NVIC_ISER0, + nvic_iser1: NVIC_ISER1, + nvic_iser2: NVIC_ISER2, + nvic_iser3: NVIC_ISER3, _reserved9: [u8; 0x70], - nvic_icer0: NvicIcer0, - nvic_icer1: NvicIcer1, - nvic_icer2: NvicIcer2, - nvic_icer3: NvicIcer3, + nvic_icer0: NVIC_ICER0, + nvic_icer1: NVIC_ICER1, + nvic_icer2: NVIC_ICER2, + nvic_icer3: NVIC_ICER3, _reserved13: [u8; 0x70], - nvic_ispr0: NvicIspr0, - nvic_ispr1: NvicIspr1, - nvic_ispr2: NvicIspr2, - nvic_ispr3: NvicIspr3, + nvic_ispr0: NVIC_ISPR0, + nvic_ispr1: NVIC_ISPR1, + nvic_ispr2: NVIC_ISPR2, + nvic_ispr3: NVIC_ISPR3, _reserved17: [u8; 0x70], - nvic_icpr0: NvicIcpr0, - nvic_icpr1: NvicIcpr1, - nvic_icpr2: NvicIcpr2, - nvic_icpr3: NvicIcpr3, + nvic_icpr0: NVIC_ICPR0, + nvic_icpr1: NVIC_ICPR1, + nvic_icpr2: NVIC_ICPR2, + nvic_icpr3: NVIC_ICPR3, _reserved21: [u8; 0x70], - nvic_iabr0: NvicIabr0, - nvic_iabr1: NvicIabr1, - nvic_iabr2: NvicIabr2, - nvic_iabr3: NvicIabr3, + nvic_iabr0: NVIC_IABR0, + nvic_iabr1: NVIC_IABR1, + nvic_iabr2: NVIC_IABR2, + nvic_iabr3: NVIC_IABR3, _reserved25: [u8; 0xf0], - nvic_ipr0: NvicIpr0, - nvic_ipr1: NvicIpr1, - nvic_ipr2: NvicIpr2, - nvic_ipr3: NvicIpr3, - nvic_ipr4: NvicIpr4, - nvic_ipr5: NvicIpr5, - nvic_ipr6: NvicIpr6, - nvic_ipr7: NvicIpr7, - nvic_ipr8: NvicIpr8, - nvic_ipr9: NvicIpr9, - nvic_ipr10: NvicIpr10, - nvic_ipr11: NvicIpr11, - nvic_ipr12: NvicIpr12, - nvic_ipr13: NvicIpr13, - nvic_ipr14: NvicIpr14, - nvic_ipr15: NvicIpr15, - nvic_ipr16: NvicIpr16, - nvic_ipr17: NvicIpr17, - nvic_ipr18: NvicIpr18, - nvic_ipr19: NvicIpr19, - nvic_ipr20: NvicIpr20, - nvic_ipr21: NvicIpr21, - nvic_ipr22: NvicIpr22, - nvic_ipr23: NvicIpr23, - nvic_ipr24: NvicIpr24, - nvic_ipr25: NvicIpr25, - nvic_ipr26: NvicIpr26, - nvic_ipr27: NvicIpr27, + nvic_ipr0: NVIC_IPR0, + nvic_ipr1: NVIC_IPR1, + nvic_ipr2: NVIC_IPR2, + nvic_ipr3: NVIC_IPR3, + nvic_ipr4: NVIC_IPR4, + nvic_ipr5: NVIC_IPR5, + nvic_ipr6: NVIC_IPR6, + nvic_ipr7: NVIC_IPR7, + nvic_ipr8: NVIC_IPR8, + nvic_ipr9: NVIC_IPR9, + nvic_ipr10: NVIC_IPR10, + nvic_ipr11: NVIC_IPR11, + nvic_ipr12: NVIC_IPR12, + nvic_ipr13: NVIC_IPR13, + nvic_ipr14: NVIC_IPR14, + nvic_ipr15: NVIC_IPR15, + nvic_ipr16: NVIC_IPR16, + nvic_ipr17: NVIC_IPR17, + nvic_ipr18: NVIC_IPR18, + nvic_ipr19: NVIC_IPR19, + nvic_ipr20: NVIC_IPR20, + nvic_ipr21: NVIC_IPR21, + nvic_ipr22: NVIC_IPR22, + nvic_ipr23: NVIC_IPR23, + nvic_ipr24: NVIC_IPR24, + nvic_ipr25: NVIC_IPR25, + nvic_ipr26: NVIC_IPR26, + nvic_ipr27: NVIC_IPR27, _reserved53: [u8; 0x0890], - cpuid: Cpuid, - icsr: Icsr, - vtor: Vtor, - aircr: Aircr, - scr: Scr, - ccr: Ccr, - shpr1: Shpr1, - shpr2: Shpr2, - shpr3: Shpr3, - shcsr: Shcsr, - cfsr: Cfsr, - hfsr: Hfsr, + cpuid: CPUID, + icsr: ICSR, + vtor: VTOR, + aircr: AIRCR, + scr: SCR, + ccr: CCR, + shpr1: SHPR1, + shpr2: SHPR2, + shpr3: SHPR3, + shcsr: SHCSR, + cfsr: CFSR, + hfsr: HFSR, _reserved65: [u8; 0x04], - mmfar: Mmfar, - bfar: Bfar, - afsr: Afsr, + mmfar: MMFAR, + bfar: BFAR, + afsr: AFSR, _reserved68: [u8; 0x48], - cpacr: Cpacr, + cpacr: CPACR, _reserved69: [u8; 0x04], - mpu_type: MpuType, - mpu_ctrl: MpuCtrl, - mpu_rnr: MpuRnr, - mpu_rbar: MpuRbar, - mpu_rasr: MpuRasr, - mpu_rbar_a1: MpuRbarA1, - mpu_rasr_a1: MpuRasrA1, - mpu_rbar_a2: MpuRbarA2, - mpu_rasr_a2: MpuRasrA2, - mpu_rbar_a3: MpuRbarA3, - mpu_rasr_a3: MpuRasrA3, + mpu_type: MPU_TYPE, + mpu_ctrl: MPU_CTRL, + mpu_rnr: MPU_RNR, + mpu_rbar: MPU_RBAR, + mpu_rasr: MPU_RASR, + mpu_rbar_a1: MPU_RBAR_A1, + mpu_rasr_a1: MPU_RASR_A1, + mpu_rbar_a2: MPU_RBAR_A2, + mpu_rasr_a2: MPU_RASR_A2, + mpu_rbar_a3: MPU_RBAR_A3, + mpu_rasr_a3: MPU_RASR_A3, _reserved80: [u8; 0x0144], - stir: Stir, + stir: STIR, _reserved81: [u8; 0x30], - fpccr: Fpccr, - fpcar: Fpcar, - fpdscr: Fpdscr, + fpccr: FPCCR, + fpcar: FPCAR, + fpdscr: FPDSCR, } impl RegisterBlock { #[doc = "0x08 - Auxiliary Control Register"] #[inline(always)] - pub const fn actlr(&self) -> &Actlr { + pub const fn actlr(&self) -> &ACTLR { &self.actlr } #[doc = "0x10 - SysTick Control and Status Register"] #[inline(always)] - pub const fn syst_csr(&self) -> &SystCsr { + pub const fn syst_csr(&self) -> &SYST_CSR { &self.syst_csr } #[doc = "0x14 - SysTick Reload Value Register"] #[inline(always)] - pub const fn syst_rvr(&self) -> &SystRvr { + pub const fn syst_rvr(&self) -> &SYST_RVR { &self.syst_rvr } #[doc = "0x18 - SysTick Current Value Register"] #[inline(always)] - pub const fn syst_cvr(&self) -> &SystCvr { + pub const fn syst_cvr(&self) -> &SYST_CVR { &self.syst_cvr } #[doc = "0x1c - SysTick Calibration Value Register r"] #[inline(always)] - pub const fn syst_calib(&self) -> &SystCalib { + pub const fn syst_calib(&self) -> &SYST_CALIB { &self.syst_calib } #[doc = "0x100 - Interrupt Set-enable Register 0"] #[inline(always)] - pub const fn nvic_iser0(&self) -> &NvicIser0 { + pub const fn nvic_iser0(&self) -> &NVIC_ISER0 { &self.nvic_iser0 } #[doc = "0x104 - Interrupt Set-enable Register 1"] #[inline(always)] - pub const fn nvic_iser1(&self) -> &NvicIser1 { + pub const fn nvic_iser1(&self) -> &NVIC_ISER1 { &self.nvic_iser1 } #[doc = "0x108 - Interrupt Set-enable Register 2"] #[inline(always)] - pub const fn nvic_iser2(&self) -> &NvicIser2 { + pub const fn nvic_iser2(&self) -> &NVIC_ISER2 { &self.nvic_iser2 } #[doc = "0x10c - Interrupt Set-enable Register 3"] #[inline(always)] - pub const fn nvic_iser3(&self) -> &NvicIser3 { + pub const fn nvic_iser3(&self) -> &NVIC_ISER3 { &self.nvic_iser3 } #[doc = "0x180 - Interrupt Clear-enable Register 0"] #[inline(always)] - pub const fn nvic_icer0(&self) -> &NvicIcer0 { + pub const fn nvic_icer0(&self) -> &NVIC_ICER0 { &self.nvic_icer0 } #[doc = "0x184 - Interrupt Clear-enable Register 1"] #[inline(always)] - pub const fn nvic_icer1(&self) -> &NvicIcer1 { + pub const fn nvic_icer1(&self) -> &NVIC_ICER1 { &self.nvic_icer1 } #[doc = "0x188 - Interrupt Clear-enable Register 2"] #[inline(always)] - pub const fn nvic_icer2(&self) -> &NvicIcer2 { + pub const fn nvic_icer2(&self) -> &NVIC_ICER2 { &self.nvic_icer2 } #[doc = "0x18c - Interrupt Clear-enable Register 3"] #[inline(always)] - pub const fn nvic_icer3(&self) -> &NvicIcer3 { + pub const fn nvic_icer3(&self) -> &NVIC_ICER3 { &self.nvic_icer3 } #[doc = "0x200 - Interrupt Set-pending Register 0"] #[inline(always)] - pub const fn nvic_ispr0(&self) -> &NvicIspr0 { + pub const fn nvic_ispr0(&self) -> &NVIC_ISPR0 { &self.nvic_ispr0 } #[doc = "0x204 - Interrupt Set-pending Register 1"] #[inline(always)] - pub const fn nvic_ispr1(&self) -> &NvicIspr1 { + pub const fn nvic_ispr1(&self) -> &NVIC_ISPR1 { &self.nvic_ispr1 } #[doc = "0x208 - Interrupt Set-pending Register 2"] #[inline(always)] - pub const fn nvic_ispr2(&self) -> &NvicIspr2 { + pub const fn nvic_ispr2(&self) -> &NVIC_ISPR2 { &self.nvic_ispr2 } #[doc = "0x20c - Interrupt Set-pending Register 3"] #[inline(always)] - pub const fn nvic_ispr3(&self) -> &NvicIspr3 { + pub const fn nvic_ispr3(&self) -> &NVIC_ISPR3 { &self.nvic_ispr3 } #[doc = "0x280 - Interrupt Clear-pending Register 0"] #[inline(always)] - pub const fn nvic_icpr0(&self) -> &NvicIcpr0 { + pub const fn nvic_icpr0(&self) -> &NVIC_ICPR0 { &self.nvic_icpr0 } #[doc = "0x284 - Interrupt Clear-pending Register 1"] #[inline(always)] - pub const fn nvic_icpr1(&self) -> &NvicIcpr1 { + pub const fn nvic_icpr1(&self) -> &NVIC_ICPR1 { &self.nvic_icpr1 } #[doc = "0x288 - Interrupt Clear-pending Register 2"] #[inline(always)] - pub const fn nvic_icpr2(&self) -> &NvicIcpr2 { + pub const fn nvic_icpr2(&self) -> &NVIC_ICPR2 { &self.nvic_icpr2 } #[doc = "0x28c - Interrupt Clear-pending Register 3"] #[inline(always)] - pub const fn nvic_icpr3(&self) -> &NvicIcpr3 { + pub const fn nvic_icpr3(&self) -> &NVIC_ICPR3 { &self.nvic_icpr3 } #[doc = "0x300 - Interrupt Active Bit Register 0"] #[inline(always)] - pub const fn nvic_iabr0(&self) -> &NvicIabr0 { + pub const fn nvic_iabr0(&self) -> &NVIC_IABR0 { &self.nvic_iabr0 } #[doc = "0x304 - Interrupt Active Bit Register 1"] #[inline(always)] - pub const fn nvic_iabr1(&self) -> &NvicIabr1 { + pub const fn nvic_iabr1(&self) -> &NVIC_IABR1 { &self.nvic_iabr1 } #[doc = "0x308 - Interrupt Active Bit Register 2"] #[inline(always)] - pub const fn nvic_iabr2(&self) -> &NvicIabr2 { + pub const fn nvic_iabr2(&self) -> &NVIC_IABR2 { &self.nvic_iabr2 } #[doc = "0x30c - Interrupt Active Bit Register 3"] #[inline(always)] - pub const fn nvic_iabr3(&self) -> &NvicIabr3 { + pub const fn nvic_iabr3(&self) -> &NVIC_IABR3 { &self.nvic_iabr3 } #[doc = "0x400 - Interrupt Priority Register 0"] #[inline(always)] - pub const fn nvic_ipr0(&self) -> &NvicIpr0 { + pub const fn nvic_ipr0(&self) -> &NVIC_IPR0 { &self.nvic_ipr0 } #[doc = "0x404 - Interrupt Priority Register 1"] #[inline(always)] - pub const fn nvic_ipr1(&self) -> &NvicIpr1 { + pub const fn nvic_ipr1(&self) -> &NVIC_IPR1 { &self.nvic_ipr1 } #[doc = "0x408 - Interrupt Priority Register 2"] #[inline(always)] - pub const fn nvic_ipr2(&self) -> &NvicIpr2 { + pub const fn nvic_ipr2(&self) -> &NVIC_IPR2 { &self.nvic_ipr2 } #[doc = "0x40c - Interrupt Priority Register 3"] #[inline(always)] - pub const fn nvic_ipr3(&self) -> &NvicIpr3 { + pub const fn nvic_ipr3(&self) -> &NVIC_IPR3 { &self.nvic_ipr3 } #[doc = "0x410 - Interrupt Priority Register 4"] #[inline(always)] - pub const fn nvic_ipr4(&self) -> &NvicIpr4 { + pub const fn nvic_ipr4(&self) -> &NVIC_IPR4 { &self.nvic_ipr4 } #[doc = "0x414 - Interrupt Priority Register 5"] #[inline(always)] - pub const fn nvic_ipr5(&self) -> &NvicIpr5 { + pub const fn nvic_ipr5(&self) -> &NVIC_IPR5 { &self.nvic_ipr5 } #[doc = "0x418 - Interrupt Priority Register 6"] #[inline(always)] - pub const fn nvic_ipr6(&self) -> &NvicIpr6 { + pub const fn nvic_ipr6(&self) -> &NVIC_IPR6 { &self.nvic_ipr6 } #[doc = "0x41c - Interrupt Priority Register 7"] #[inline(always)] - pub const fn nvic_ipr7(&self) -> &NvicIpr7 { + pub const fn nvic_ipr7(&self) -> &NVIC_IPR7 { &self.nvic_ipr7 } #[doc = "0x420 - Interrupt Priority Register 8"] #[inline(always)] - pub const fn nvic_ipr8(&self) -> &NvicIpr8 { + pub const fn nvic_ipr8(&self) -> &NVIC_IPR8 { &self.nvic_ipr8 } #[doc = "0x424 - Interrupt Priority Register 9"] #[inline(always)] - pub const fn nvic_ipr9(&self) -> &NvicIpr9 { + pub const fn nvic_ipr9(&self) -> &NVIC_IPR9 { &self.nvic_ipr9 } #[doc = "0x428 - Interrupt Priority Register 10"] #[inline(always)] - pub const fn nvic_ipr10(&self) -> &NvicIpr10 { + pub const fn nvic_ipr10(&self) -> &NVIC_IPR10 { &self.nvic_ipr10 } #[doc = "0x42c - Interrupt Priority Register 11"] #[inline(always)] - pub const fn nvic_ipr11(&self) -> &NvicIpr11 { + pub const fn nvic_ipr11(&self) -> &NVIC_IPR11 { &self.nvic_ipr11 } #[doc = "0x430 - Interrupt Priority Register 12"] #[inline(always)] - pub const fn nvic_ipr12(&self) -> &NvicIpr12 { + pub const fn nvic_ipr12(&self) -> &NVIC_IPR12 { &self.nvic_ipr12 } #[doc = "0x434 - Interrupt Priority Register 13"] #[inline(always)] - pub const fn nvic_ipr13(&self) -> &NvicIpr13 { + pub const fn nvic_ipr13(&self) -> &NVIC_IPR13 { &self.nvic_ipr13 } #[doc = "0x438 - Interrupt Priority Register 14"] #[inline(always)] - pub const fn nvic_ipr14(&self) -> &NvicIpr14 { + pub const fn nvic_ipr14(&self) -> &NVIC_IPR14 { &self.nvic_ipr14 } #[doc = "0x43c - Interrupt Priority Register 15"] #[inline(always)] - pub const fn nvic_ipr15(&self) -> &NvicIpr15 { + pub const fn nvic_ipr15(&self) -> &NVIC_IPR15 { &self.nvic_ipr15 } #[doc = "0x440 - Interrupt Priority Register 16"] #[inline(always)] - pub const fn nvic_ipr16(&self) -> &NvicIpr16 { + pub const fn nvic_ipr16(&self) -> &NVIC_IPR16 { &self.nvic_ipr16 } #[doc = "0x444 - Interrupt Priority Register 17"] #[inline(always)] - pub const fn nvic_ipr17(&self) -> &NvicIpr17 { + pub const fn nvic_ipr17(&self) -> &NVIC_IPR17 { &self.nvic_ipr17 } #[doc = "0x448 - Interrupt Priority Register 18"] #[inline(always)] - pub const fn nvic_ipr18(&self) -> &NvicIpr18 { + pub const fn nvic_ipr18(&self) -> &NVIC_IPR18 { &self.nvic_ipr18 } #[doc = "0x44c - Interrupt Priority Register 19"] #[inline(always)] - pub const fn nvic_ipr19(&self) -> &NvicIpr19 { + pub const fn nvic_ipr19(&self) -> &NVIC_IPR19 { &self.nvic_ipr19 } #[doc = "0x450 - Interrupt Priority Register 20"] #[inline(always)] - pub const fn nvic_ipr20(&self) -> &NvicIpr20 { + pub const fn nvic_ipr20(&self) -> &NVIC_IPR20 { &self.nvic_ipr20 } #[doc = "0x454 - Interrupt Priority Register 21"] #[inline(always)] - pub const fn nvic_ipr21(&self) -> &NvicIpr21 { + pub const fn nvic_ipr21(&self) -> &NVIC_IPR21 { &self.nvic_ipr21 } #[doc = "0x458 - Interrupt Priority Register 22"] #[inline(always)] - pub const fn nvic_ipr22(&self) -> &NvicIpr22 { + pub const fn nvic_ipr22(&self) -> &NVIC_IPR22 { &self.nvic_ipr22 } #[doc = "0x45c - Interrupt Priority Register 23"] #[inline(always)] - pub const fn nvic_ipr23(&self) -> &NvicIpr23 { + pub const fn nvic_ipr23(&self) -> &NVIC_IPR23 { &self.nvic_ipr23 } #[doc = "0x460 - Interrupt Priority Register 24"] #[inline(always)] - pub const fn nvic_ipr24(&self) -> &NvicIpr24 { + pub const fn nvic_ipr24(&self) -> &NVIC_IPR24 { &self.nvic_ipr24 } #[doc = "0x464 - Interrupt Priority Register 25"] #[inline(always)] - pub const fn nvic_ipr25(&self) -> &NvicIpr25 { + pub const fn nvic_ipr25(&self) -> &NVIC_IPR25 { &self.nvic_ipr25 } #[doc = "0x468 - Interrupt Priority Register 26"] #[inline(always)] - pub const fn nvic_ipr26(&self) -> &NvicIpr26 { + pub const fn nvic_ipr26(&self) -> &NVIC_IPR26 { &self.nvic_ipr26 } #[doc = "0x46c - Interrupt Priority Register 27"] #[inline(always)] - pub const fn nvic_ipr27(&self) -> &NvicIpr27 { + pub const fn nvic_ipr27(&self) -> &NVIC_IPR27 { &self.nvic_ipr27 } #[doc = "0xd00 - CPUID Base Register"] #[inline(always)] - pub const fn cpuid(&self) -> &Cpuid { + pub const fn cpuid(&self) -> &CPUID { &self.cpuid } #[doc = "0xd04 - Interrupt Control and State Register"] #[inline(always)] - pub const fn icsr(&self) -> &Icsr { + pub const fn icsr(&self) -> &ICSR { &self.icsr } #[doc = "0xd08 - Vector Table Offset Register"] #[inline(always)] - pub const fn vtor(&self) -> &Vtor { + pub const fn vtor(&self) -> &VTOR { &self.vtor } #[doc = "0xd0c - Application Interrupt and Reset Control Register"] #[inline(always)] - pub const fn aircr(&self) -> &Aircr { + pub const fn aircr(&self) -> &AIRCR { &self.aircr } #[doc = "0xd10 - System Control Register"] #[inline(always)] - pub const fn scr(&self) -> &Scr { + pub const fn scr(&self) -> &SCR { &self.scr } #[doc = "0xd14 - Configuration and Control Register"] #[inline(always)] - pub const fn ccr(&self) -> &Ccr { + pub const fn ccr(&self) -> &CCR { &self.ccr } #[doc = "0xd18 - System Handler Priority Register 1"] #[inline(always)] - pub const fn shpr1(&self) -> &Shpr1 { + pub const fn shpr1(&self) -> &SHPR1 { &self.shpr1 } #[doc = "0xd1c - System Handler Priority Register 2"] #[inline(always)] - pub const fn shpr2(&self) -> &Shpr2 { + pub const fn shpr2(&self) -> &SHPR2 { &self.shpr2 } #[doc = "0xd20 - System Handler Priority Register 3"] #[inline(always)] - pub const fn shpr3(&self) -> &Shpr3 { + pub const fn shpr3(&self) -> &SHPR3 { &self.shpr3 } #[doc = "0xd24 - System Handler Control and State Register"] #[inline(always)] - pub const fn shcsr(&self) -> &Shcsr { + pub const fn shcsr(&self) -> &SHCSR { &self.shcsr } #[doc = "0xd28 - Configurable Fault Status Register"] #[inline(always)] - pub const fn cfsr(&self) -> &Cfsr { + pub const fn cfsr(&self) -> &CFSR { &self.cfsr } #[doc = "0xd2c - HardFault Status Register"] #[inline(always)] - pub const fn hfsr(&self) -> &Hfsr { + pub const fn hfsr(&self) -> &HFSR { &self.hfsr } #[doc = "0xd34 - MemManage Fault Address Register"] #[inline(always)] - pub const fn mmfar(&self) -> &Mmfar { + pub const fn mmfar(&self) -> &MMFAR { &self.mmfar } #[doc = "0xd38 - BusFault Address Register"] #[inline(always)] - pub const fn bfar(&self) -> &Bfar { + pub const fn bfar(&self) -> &BFAR { &self.bfar } #[doc = "0xd3c - Auxiliary Fault Status Register"] #[inline(always)] - pub const fn afsr(&self) -> &Afsr { + pub const fn afsr(&self) -> &AFSR { &self.afsr } #[doc = "0xd88 - Coprocessor Access Control Register"] #[inline(always)] - pub const fn cpacr(&self) -> &Cpacr { + pub const fn cpacr(&self) -> &CPACR { &self.cpacr } #[doc = "0xd90 - MPU Type Register"] #[inline(always)] - pub const fn mpu_type(&self) -> &MpuType { + pub const fn mpu_type(&self) -> &MPU_TYPE { &self.mpu_type } #[doc = "0xd94 - MPU Control Register"] #[inline(always)] - pub const fn mpu_ctrl(&self) -> &MpuCtrl { + pub const fn mpu_ctrl(&self) -> &MPU_CTRL { &self.mpu_ctrl } #[doc = "0xd98 - MPU Region Number Register"] #[inline(always)] - pub const fn mpu_rnr(&self) -> &MpuRnr { + pub const fn mpu_rnr(&self) -> &MPU_RNR { &self.mpu_rnr } #[doc = "0xd9c - MPU Region Base Address Register"] #[inline(always)] - pub const fn mpu_rbar(&self) -> &MpuRbar { + pub const fn mpu_rbar(&self) -> &MPU_RBAR { &self.mpu_rbar } #[doc = "0xda0 - MPU Region Attribute and Size Register"] #[inline(always)] - pub const fn mpu_rasr(&self) -> &MpuRasr { + pub const fn mpu_rasr(&self) -> &MPU_RASR { &self.mpu_rasr } #[doc = "0xda4 - MPU Region Base Address Register A1"] #[inline(always)] - pub const fn mpu_rbar_a1(&self) -> &MpuRbarA1 { + pub const fn mpu_rbar_a1(&self) -> &MPU_RBAR_A1 { &self.mpu_rbar_a1 } #[doc = "0xda8 - MPU Region Attribute and Size Register A1"] #[inline(always)] - pub const fn mpu_rasr_a1(&self) -> &MpuRasrA1 { + pub const fn mpu_rasr_a1(&self) -> &MPU_RASR_A1 { &self.mpu_rasr_a1 } #[doc = "0xdac - MPU Region Base Address Register A2"] #[inline(always)] - pub const fn mpu_rbar_a2(&self) -> &MpuRbarA2 { + pub const fn mpu_rbar_a2(&self) -> &MPU_RBAR_A2 { &self.mpu_rbar_a2 } #[doc = "0xdb0 - MPU Region Attribute and Size Register A2"] #[inline(always)] - pub const fn mpu_rasr_a2(&self) -> &MpuRasrA2 { + pub const fn mpu_rasr_a2(&self) -> &MPU_RASR_A2 { &self.mpu_rasr_a2 } #[doc = "0xdb4 - MPU Region Base Address Register A3"] #[inline(always)] - pub const fn mpu_rbar_a3(&self) -> &MpuRbarA3 { + pub const fn mpu_rbar_a3(&self) -> &MPU_RBAR_A3 { &self.mpu_rbar_a3 } #[doc = "0xdb8 - MPU Region Attribute and Size Register A3"] #[inline(always)] - pub const fn mpu_rasr_a3(&self) -> &MpuRasrA3 { + pub const fn mpu_rasr_a3(&self) -> &MPU_RASR_A3 { &self.mpu_rasr_a3 } #[doc = "0xf00 - Software Trigger Interrupt Register"] #[inline(always)] - pub const fn stir(&self) -> &Stir { + pub const fn stir(&self) -> &STIR { &self.stir } #[doc = "0xf34 - Floating-point Context Control Register"] #[inline(always)] - pub const fn fpccr(&self) -> &Fpccr { + pub const fn fpccr(&self) -> &FPCCR { &self.fpccr } #[doc = "0xf38 - Floating-point Context Address Register"] #[inline(always)] - pub const fn fpcar(&self) -> &Fpcar { + pub const fn fpcar(&self) -> &FPCAR { &self.fpcar } #[doc = "0xf3c - Floating-point Default Status Control Register"] #[inline(always)] - pub const fn fpdscr(&self) -> &Fpdscr { + pub const fn fpdscr(&self) -> &FPDSCR { &self.fpdscr } } #[doc = "ACTLR (rw) register accessor: Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@actlr`] module"] -#[doc(alias = "ACTLR")] -pub type Actlr = crate::Reg; +pub type ACTLR = crate::Reg; #[doc = "Auxiliary Control Register"] pub mod actlr; #[doc = "SYST_CSR (rw) register accessor: SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_csr`] module"] -#[doc(alias = "SYST_CSR")] -pub type SystCsr = crate::Reg; +pub type SYST_CSR = crate::Reg; #[doc = "SysTick Control and Status Register"] pub mod syst_csr; #[doc = "SYST_RVR (rw) register accessor: SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_rvr`] module"] -#[doc(alias = "SYST_RVR")] -pub type SystRvr = crate::Reg; +pub type SYST_RVR = crate::Reg; #[doc = "SysTick Reload Value Register"] pub mod syst_rvr; #[doc = "SYST_CVR (rw) register accessor: SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_cvr`] module"] -#[doc(alias = "SYST_CVR")] -pub type SystCvr = crate::Reg; +pub type SYST_CVR = crate::Reg; #[doc = "SysTick Current Value Register"] pub mod syst_cvr; #[doc = "SYST_CALIB (rw) register accessor: SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syst_calib`] module"] -#[doc(alias = "SYST_CALIB")] -pub type SystCalib = crate::Reg; +pub type SYST_CALIB = crate::Reg; #[doc = "SysTick Calibration Value Register r"] pub mod syst_calib; #[doc = "NVIC_ISER0 (rw) register accessor: Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser0`] module"] -#[doc(alias = "NVIC_ISER0")] -pub type NvicIser0 = crate::Reg; +pub type NVIC_ISER0 = crate::Reg; #[doc = "Interrupt Set-enable Register 0"] pub mod nvic_iser0; #[doc = "NVIC_ISER1 (rw) register accessor: Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser1`] module"] -#[doc(alias = "NVIC_ISER1")] -pub type NvicIser1 = crate::Reg; +pub type NVIC_ISER1 = crate::Reg; #[doc = "Interrupt Set-enable Register 1"] pub mod nvic_iser1; #[doc = "NVIC_ISER2 (rw) register accessor: Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser2`] module"] -#[doc(alias = "NVIC_ISER2")] -pub type NvicIser2 = crate::Reg; +pub type NVIC_ISER2 = crate::Reg; #[doc = "Interrupt Set-enable Register 2"] pub mod nvic_iser2; #[doc = "NVIC_ISER3 (rw) register accessor: Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iser3`] module"] -#[doc(alias = "NVIC_ISER3")] -pub type NvicIser3 = crate::Reg; +pub type NVIC_ISER3 = crate::Reg; #[doc = "Interrupt Set-enable Register 3"] pub mod nvic_iser3; #[doc = "NVIC_ICER0 (rw) register accessor: Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer0`] module"] -#[doc(alias = "NVIC_ICER0")] -pub type NvicIcer0 = crate::Reg; +pub type NVIC_ICER0 = crate::Reg; #[doc = "Interrupt Clear-enable Register 0"] pub mod nvic_icer0; #[doc = "NVIC_ICER1 (rw) register accessor: Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer1`] module"] -#[doc(alias = "NVIC_ICER1")] -pub type NvicIcer1 = crate::Reg; +pub type NVIC_ICER1 = crate::Reg; #[doc = "Interrupt Clear-enable Register 1"] pub mod nvic_icer1; #[doc = "NVIC_ICER2 (rw) register accessor: Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer2`] module"] -#[doc(alias = "NVIC_ICER2")] -pub type NvicIcer2 = crate::Reg; +pub type NVIC_ICER2 = crate::Reg; #[doc = "Interrupt Clear-enable Register 2"] pub mod nvic_icer2; #[doc = "NVIC_ICER3 (rw) register accessor: Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icer3`] module"] -#[doc(alias = "NVIC_ICER3")] -pub type NvicIcer3 = crate::Reg; +pub type NVIC_ICER3 = crate::Reg; #[doc = "Interrupt Clear-enable Register 3"] pub mod nvic_icer3; #[doc = "NVIC_ISPR0 (rw) register accessor: Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr0`] module"] -#[doc(alias = "NVIC_ISPR0")] -pub type NvicIspr0 = crate::Reg; +pub type NVIC_ISPR0 = crate::Reg; #[doc = "Interrupt Set-pending Register 0"] pub mod nvic_ispr0; #[doc = "NVIC_ISPR1 (rw) register accessor: Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr1`] module"] -#[doc(alias = "NVIC_ISPR1")] -pub type NvicIspr1 = crate::Reg; +pub type NVIC_ISPR1 = crate::Reg; #[doc = "Interrupt Set-pending Register 1"] pub mod nvic_ispr1; #[doc = "NVIC_ISPR2 (rw) register accessor: Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr2`] module"] -#[doc(alias = "NVIC_ISPR2")] -pub type NvicIspr2 = crate::Reg; +pub type NVIC_ISPR2 = crate::Reg; #[doc = "Interrupt Set-pending Register 2"] pub mod nvic_ispr2; #[doc = "NVIC_ISPR3 (rw) register accessor: Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ispr3`] module"] -#[doc(alias = "NVIC_ISPR3")] -pub type NvicIspr3 = crate::Reg; +pub type NVIC_ISPR3 = crate::Reg; #[doc = "Interrupt Set-pending Register 3"] pub mod nvic_ispr3; #[doc = "NVIC_ICPR0 (rw) register accessor: Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr0`] module"] -#[doc(alias = "NVIC_ICPR0")] -pub type NvicIcpr0 = crate::Reg; +pub type NVIC_ICPR0 = crate::Reg; #[doc = "Interrupt Clear-pending Register 0"] pub mod nvic_icpr0; #[doc = "NVIC_ICPR1 (rw) register accessor: Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr1`] module"] -#[doc(alias = "NVIC_ICPR1")] -pub type NvicIcpr1 = crate::Reg; +pub type NVIC_ICPR1 = crate::Reg; #[doc = "Interrupt Clear-pending Register 1"] pub mod nvic_icpr1; #[doc = "NVIC_ICPR2 (rw) register accessor: Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr2`] module"] -#[doc(alias = "NVIC_ICPR2")] -pub type NvicIcpr2 = crate::Reg; +pub type NVIC_ICPR2 = crate::Reg; #[doc = "Interrupt Clear-pending Register 2"] pub mod nvic_icpr2; #[doc = "NVIC_ICPR3 (rw) register accessor: Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_icpr3`] module"] -#[doc(alias = "NVIC_ICPR3")] -pub type NvicIcpr3 = crate::Reg; +pub type NVIC_ICPR3 = crate::Reg; #[doc = "Interrupt Clear-pending Register 3"] pub mod nvic_icpr3; #[doc = "NVIC_IABR0 (rw) register accessor: Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr0`] module"] -#[doc(alias = "NVIC_IABR0")] -pub type NvicIabr0 = crate::Reg; +pub type NVIC_IABR0 = crate::Reg; #[doc = "Interrupt Active Bit Register 0"] pub mod nvic_iabr0; #[doc = "NVIC_IABR1 (rw) register accessor: Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr1`] module"] -#[doc(alias = "NVIC_IABR1")] -pub type NvicIabr1 = crate::Reg; +pub type NVIC_IABR1 = crate::Reg; #[doc = "Interrupt Active Bit Register 1"] pub mod nvic_iabr1; #[doc = "NVIC_IABR2 (rw) register accessor: Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr2`] module"] -#[doc(alias = "NVIC_IABR2")] -pub type NvicIabr2 = crate::Reg; +pub type NVIC_IABR2 = crate::Reg; #[doc = "Interrupt Active Bit Register 2"] pub mod nvic_iabr2; #[doc = "NVIC_IABR3 (rw) register accessor: Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_iabr3`] module"] -#[doc(alias = "NVIC_IABR3")] -pub type NvicIabr3 = crate::Reg; +pub type NVIC_IABR3 = crate::Reg; #[doc = "Interrupt Active Bit Register 3"] pub mod nvic_iabr3; #[doc = "NVIC_IPR0 (rw) register accessor: Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr0`] module"] -#[doc(alias = "NVIC_IPR0")] -pub type NvicIpr0 = crate::Reg; +pub type NVIC_IPR0 = crate::Reg; #[doc = "Interrupt Priority Register 0"] pub mod nvic_ipr0; #[doc = "NVIC_IPR1 (rw) register accessor: Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr1`] module"] -#[doc(alias = "NVIC_IPR1")] -pub type NvicIpr1 = crate::Reg; +pub type NVIC_IPR1 = crate::Reg; #[doc = "Interrupt Priority Register 1"] pub mod nvic_ipr1; #[doc = "NVIC_IPR2 (rw) register accessor: Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr2`] module"] -#[doc(alias = "NVIC_IPR2")] -pub type NvicIpr2 = crate::Reg; +pub type NVIC_IPR2 = crate::Reg; #[doc = "Interrupt Priority Register 2"] pub mod nvic_ipr2; #[doc = "NVIC_IPR3 (rw) register accessor: Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr3`] module"] -#[doc(alias = "NVIC_IPR3")] -pub type NvicIpr3 = crate::Reg; +pub type NVIC_IPR3 = crate::Reg; #[doc = "Interrupt Priority Register 3"] pub mod nvic_ipr3; #[doc = "NVIC_IPR4 (rw) register accessor: Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr4`] module"] -#[doc(alias = "NVIC_IPR4")] -pub type NvicIpr4 = crate::Reg; +pub type NVIC_IPR4 = crate::Reg; #[doc = "Interrupt Priority Register 4"] pub mod nvic_ipr4; #[doc = "NVIC_IPR5 (rw) register accessor: Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr5`] module"] -#[doc(alias = "NVIC_IPR5")] -pub type NvicIpr5 = crate::Reg; +pub type NVIC_IPR5 = crate::Reg; #[doc = "Interrupt Priority Register 5"] pub mod nvic_ipr5; #[doc = "NVIC_IPR6 (rw) register accessor: Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr6`] module"] -#[doc(alias = "NVIC_IPR6")] -pub type NvicIpr6 = crate::Reg; +pub type NVIC_IPR6 = crate::Reg; #[doc = "Interrupt Priority Register 6"] pub mod nvic_ipr6; #[doc = "NVIC_IPR7 (rw) register accessor: Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr7`] module"] -#[doc(alias = "NVIC_IPR7")] -pub type NvicIpr7 = crate::Reg; +pub type NVIC_IPR7 = crate::Reg; #[doc = "Interrupt Priority Register 7"] pub mod nvic_ipr7; #[doc = "NVIC_IPR8 (rw) register accessor: Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr8`] module"] -#[doc(alias = "NVIC_IPR8")] -pub type NvicIpr8 = crate::Reg; +pub type NVIC_IPR8 = crate::Reg; #[doc = "Interrupt Priority Register 8"] pub mod nvic_ipr8; #[doc = "NVIC_IPR9 (rw) register accessor: Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr9`] module"] -#[doc(alias = "NVIC_IPR9")] -pub type NvicIpr9 = crate::Reg; +pub type NVIC_IPR9 = crate::Reg; #[doc = "Interrupt Priority Register 9"] pub mod nvic_ipr9; #[doc = "NVIC_IPR10 (rw) register accessor: Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr10`] module"] -#[doc(alias = "NVIC_IPR10")] -pub type NvicIpr10 = crate::Reg; +pub type NVIC_IPR10 = crate::Reg; #[doc = "Interrupt Priority Register 10"] pub mod nvic_ipr10; #[doc = "NVIC_IPR11 (rw) register accessor: Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr11`] module"] -#[doc(alias = "NVIC_IPR11")] -pub type NvicIpr11 = crate::Reg; +pub type NVIC_IPR11 = crate::Reg; #[doc = "Interrupt Priority Register 11"] pub mod nvic_ipr11; #[doc = "NVIC_IPR12 (rw) register accessor: Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr12`] module"] -#[doc(alias = "NVIC_IPR12")] -pub type NvicIpr12 = crate::Reg; +pub type NVIC_IPR12 = crate::Reg; #[doc = "Interrupt Priority Register 12"] pub mod nvic_ipr12; #[doc = "NVIC_IPR13 (rw) register accessor: Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr13`] module"] -#[doc(alias = "NVIC_IPR13")] -pub type NvicIpr13 = crate::Reg; +pub type NVIC_IPR13 = crate::Reg; #[doc = "Interrupt Priority Register 13"] pub mod nvic_ipr13; #[doc = "NVIC_IPR14 (rw) register accessor: Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr14`] module"] -#[doc(alias = "NVIC_IPR14")] -pub type NvicIpr14 = crate::Reg; +pub type NVIC_IPR14 = crate::Reg; #[doc = "Interrupt Priority Register 14"] pub mod nvic_ipr14; #[doc = "NVIC_IPR15 (rw) register accessor: Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr15`] module"] -#[doc(alias = "NVIC_IPR15")] -pub type NvicIpr15 = crate::Reg; +pub type NVIC_IPR15 = crate::Reg; #[doc = "Interrupt Priority Register 15"] pub mod nvic_ipr15; #[doc = "NVIC_IPR16 (rw) register accessor: Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr16`] module"] -#[doc(alias = "NVIC_IPR16")] -pub type NvicIpr16 = crate::Reg; +pub type NVIC_IPR16 = crate::Reg; #[doc = "Interrupt Priority Register 16"] pub mod nvic_ipr16; #[doc = "NVIC_IPR17 (rw) register accessor: Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr17`] module"] -#[doc(alias = "NVIC_IPR17")] -pub type NvicIpr17 = crate::Reg; +pub type NVIC_IPR17 = crate::Reg; #[doc = "Interrupt Priority Register 17"] pub mod nvic_ipr17; #[doc = "NVIC_IPR18 (rw) register accessor: Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr18`] module"] -#[doc(alias = "NVIC_IPR18")] -pub type NvicIpr18 = crate::Reg; +pub type NVIC_IPR18 = crate::Reg; #[doc = "Interrupt Priority Register 18"] pub mod nvic_ipr18; #[doc = "NVIC_IPR19 (rw) register accessor: Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr19`] module"] -#[doc(alias = "NVIC_IPR19")] -pub type NvicIpr19 = crate::Reg; +pub type NVIC_IPR19 = crate::Reg; #[doc = "Interrupt Priority Register 19"] pub mod nvic_ipr19; #[doc = "NVIC_IPR20 (rw) register accessor: Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr20`] module"] -#[doc(alias = "NVIC_IPR20")] -pub type NvicIpr20 = crate::Reg; +pub type NVIC_IPR20 = crate::Reg; #[doc = "Interrupt Priority Register 20"] pub mod nvic_ipr20; #[doc = "NVIC_IPR21 (rw) register accessor: Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr21`] module"] -#[doc(alias = "NVIC_IPR21")] -pub type NvicIpr21 = crate::Reg; +pub type NVIC_IPR21 = crate::Reg; #[doc = "Interrupt Priority Register 21"] pub mod nvic_ipr21; #[doc = "NVIC_IPR22 (rw) register accessor: Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr22`] module"] -#[doc(alias = "NVIC_IPR22")] -pub type NvicIpr22 = crate::Reg; +pub type NVIC_IPR22 = crate::Reg; #[doc = "Interrupt Priority Register 22"] pub mod nvic_ipr22; #[doc = "NVIC_IPR23 (rw) register accessor: Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr23`] module"] -#[doc(alias = "NVIC_IPR23")] -pub type NvicIpr23 = crate::Reg; +pub type NVIC_IPR23 = crate::Reg; #[doc = "Interrupt Priority Register 23"] pub mod nvic_ipr23; #[doc = "NVIC_IPR24 (rw) register accessor: Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr24`] module"] -#[doc(alias = "NVIC_IPR24")] -pub type NvicIpr24 = crate::Reg; +pub type NVIC_IPR24 = crate::Reg; #[doc = "Interrupt Priority Register 24"] pub mod nvic_ipr24; #[doc = "NVIC_IPR25 (rw) register accessor: Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr25`] module"] -#[doc(alias = "NVIC_IPR25")] -pub type NvicIpr25 = crate::Reg; +pub type NVIC_IPR25 = crate::Reg; #[doc = "Interrupt Priority Register 25"] pub mod nvic_ipr25; #[doc = "NVIC_IPR26 (rw) register accessor: Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr26`] module"] -#[doc(alias = "NVIC_IPR26")] -pub type NvicIpr26 = crate::Reg; +pub type NVIC_IPR26 = crate::Reg; #[doc = "Interrupt Priority Register 26"] pub mod nvic_ipr26; #[doc = "NVIC_IPR27 (rw) register accessor: Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nvic_ipr27`] module"] -#[doc(alias = "NVIC_IPR27")] -pub type NvicIpr27 = crate::Reg; +pub type NVIC_IPR27 = crate::Reg; #[doc = "Interrupt Priority Register 27"] pub mod nvic_ipr27; #[doc = "CPUID (r) register accessor: CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuid`] module"] -#[doc(alias = "CPUID")] -pub type Cpuid = crate::Reg; +pub type CPUID = crate::Reg; #[doc = "CPUID Base Register"] pub mod cpuid; #[doc = "ICSR (rw) register accessor: Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icsr`] module"] -#[doc(alias = "ICSR")] -pub type Icsr = crate::Reg; +pub type ICSR = crate::Reg; #[doc = "Interrupt Control and State Register"] pub mod icsr; #[doc = "VTOR (rw) register accessor: Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vtor`] module"] -#[doc(alias = "VTOR")] -pub type Vtor = crate::Reg; +pub type VTOR = crate::Reg; #[doc = "Vector Table Offset Register"] pub mod vtor; #[doc = "AIRCR (rw) register accessor: Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aircr`] module"] -#[doc(alias = "AIRCR")] -pub type Aircr = crate::Reg; +pub type AIRCR = crate::Reg; #[doc = "Application Interrupt and Reset Control Register"] pub mod aircr; #[doc = "SCR (rw) register accessor: System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`] module"] -#[doc(alias = "SCR")] -pub type Scr = crate::Reg; +pub type SCR = crate::Reg; #[doc = "System Control Register"] pub mod scr; #[doc = "CCR (rw) register accessor: Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] -#[doc(alias = "CCR")] -pub type Ccr = crate::Reg; +pub type CCR = crate::Reg; #[doc = "Configuration and Control Register"] pub mod ccr; #[doc = "SHPR1 (rw) register accessor: System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr1`] module"] -#[doc(alias = "SHPR1")] -pub type Shpr1 = crate::Reg; +pub type SHPR1 = crate::Reg; #[doc = "System Handler Priority Register 1"] pub mod shpr1; #[doc = "SHPR2 (rw) register accessor: System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr2`] module"] -#[doc(alias = "SHPR2")] -pub type Shpr2 = crate::Reg; +pub type SHPR2 = crate::Reg; #[doc = "System Handler Priority Register 2"] pub mod shpr2; #[doc = "SHPR3 (rw) register accessor: System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shpr3`] module"] -#[doc(alias = "SHPR3")] -pub type Shpr3 = crate::Reg; +pub type SHPR3 = crate::Reg; #[doc = "System Handler Priority Register 3"] pub mod shpr3; #[doc = "SHCSR (rw) register accessor: System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@shcsr`] module"] -#[doc(alias = "SHCSR")] -pub type Shcsr = crate::Reg; +pub type SHCSR = crate::Reg; #[doc = "System Handler Control and State Register"] pub mod shcsr; #[doc = "CFSR (rw) register accessor: Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfsr`] module"] -#[doc(alias = "CFSR")] -pub type Cfsr = crate::Reg; +pub type CFSR = crate::Reg; #[doc = "Configurable Fault Status Register"] pub mod cfsr; #[doc = "HFSR (rw) register accessor: HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hfsr`] module"] -#[doc(alias = "HFSR")] -pub type Hfsr = crate::Reg; +pub type HFSR = crate::Reg; #[doc = "HardFault Status Register"] pub mod hfsr; #[doc = "MMFAR (rw) register accessor: MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mmfar`] module"] -#[doc(alias = "MMFAR")] -pub type Mmfar = crate::Reg; +pub type MMFAR = crate::Reg; #[doc = "MemManage Fault Address Register"] pub mod mmfar; #[doc = "BFAR (rw) register accessor: BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfar`] module"] -#[doc(alias = "BFAR")] -pub type Bfar = crate::Reg; +pub type BFAR = crate::Reg; #[doc = "BusFault Address Register"] pub mod bfar; #[doc = "AFSR (rw) register accessor: Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@afsr`] module"] -#[doc(alias = "AFSR")] -pub type Afsr = crate::Reg; +pub type AFSR = crate::Reg; #[doc = "Auxiliary Fault Status Register"] pub mod afsr; #[doc = "CPACR (rw) register accessor: Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpacr`] module"] -#[doc(alias = "CPACR")] -pub type Cpacr = crate::Reg; +pub type CPACR = crate::Reg; #[doc = "Coprocessor Access Control Register"] pub mod cpacr; #[doc = "MPU_TYPE (r) register accessor: MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_type`] module"] -#[doc(alias = "MPU_TYPE")] -pub type MpuType = crate::Reg; +pub type MPU_TYPE = crate::Reg; #[doc = "MPU Type Register"] pub mod mpu_type; #[doc = "MPU_CTRL (rw) register accessor: MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_ctrl`] module"] -#[doc(alias = "MPU_CTRL")] -pub type MpuCtrl = crate::Reg; +pub type MPU_CTRL = crate::Reg; #[doc = "MPU Control Register"] pub mod mpu_ctrl; #[doc = "MPU_RNR (rw) register accessor: MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rnr`] module"] -#[doc(alias = "MPU_RNR")] -pub type MpuRnr = crate::Reg; +pub type MPU_RNR = crate::Reg; #[doc = "MPU Region Number Register"] pub mod mpu_rnr; #[doc = "MPU_RBAR (rw) register accessor: MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar`] module"] -#[doc(alias = "MPU_RBAR")] -pub type MpuRbar = crate::Reg; +pub type MPU_RBAR = crate::Reg; #[doc = "MPU Region Base Address Register"] pub mod mpu_rbar; #[doc = "MPU_RASR (rw) register accessor: MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr`] module"] -#[doc(alias = "MPU_RASR")] -pub type MpuRasr = crate::Reg; +pub type MPU_RASR = crate::Reg; #[doc = "MPU Region Attribute and Size Register"] pub mod mpu_rasr; #[doc = "MPU_RBAR_A1 (rw) register accessor: MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a1`] module"] -#[doc(alias = "MPU_RBAR_A1")] -pub type MpuRbarA1 = crate::Reg; +pub type MPU_RBAR_A1 = crate::Reg; #[doc = "MPU Region Base Address Register A1"] pub mod mpu_rbar_a1; #[doc = "MPU_RASR_A1 (rw) register accessor: MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a1`] module"] -#[doc(alias = "MPU_RASR_A1")] -pub type MpuRasrA1 = crate::Reg; +pub type MPU_RASR_A1 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A1"] pub mod mpu_rasr_a1; #[doc = "MPU_RBAR_A2 (rw) register accessor: MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a2`] module"] -#[doc(alias = "MPU_RBAR_A2")] -pub type MpuRbarA2 = crate::Reg; +pub type MPU_RBAR_A2 = crate::Reg; #[doc = "MPU Region Base Address Register A2"] pub mod mpu_rbar_a2; #[doc = "MPU_RASR_A2 (rw) register accessor: MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a2`] module"] -#[doc(alias = "MPU_RASR_A2")] -pub type MpuRasrA2 = crate::Reg; +pub type MPU_RASR_A2 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A2"] pub mod mpu_rasr_a2; #[doc = "MPU_RBAR_A3 (rw) register accessor: MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rbar_a3`] module"] -#[doc(alias = "MPU_RBAR_A3")] -pub type MpuRbarA3 = crate::Reg; +pub type MPU_RBAR_A3 = crate::Reg; #[doc = "MPU Region Base Address Register A3"] pub mod mpu_rbar_a3; #[doc = "MPU_RASR_A3 (rw) register accessor: MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mpu_rasr_a3`] module"] -#[doc(alias = "MPU_RASR_A3")] -pub type MpuRasrA3 = crate::Reg; +pub type MPU_RASR_A3 = crate::Reg; #[doc = "MPU Region Attribute and Size Register A3"] pub mod mpu_rasr_a3; #[doc = "STIR (w) register accessor: Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stir`] module"] -#[doc(alias = "STIR")] -pub type Stir = crate::Reg; +pub type STIR = crate::Reg; #[doc = "Software Trigger Interrupt Register"] pub mod stir; #[doc = "FPCCR (rw) register accessor: Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpccr`] module"] -#[doc(alias = "FPCCR")] -pub type Fpccr = crate::Reg; +pub type FPCCR = crate::Reg; #[doc = "Floating-point Context Control Register"] pub mod fpccr; #[doc = "FPCAR (rw) register accessor: Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpcar`] module"] -#[doc(alias = "FPCAR")] -pub type Fpcar = crate::Reg; +pub type FPCAR = crate::Reg; #[doc = "Floating-point Context Address Register"] pub mod fpcar; #[doc = "FPDSCR (rw) register accessor: Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpdscr`] module"] -#[doc(alias = "FPDSCR")] -pub type Fpdscr = crate::Reg; +pub type FPDSCR = crate::Reg; #[doc = "Floating-point Default Status Control Register"] pub mod fpdscr; diff --git a/src/ppb/actlr.rs b/src/ppb/actlr.rs index 132455ac..f921e839 100644 --- a/src/ppb/actlr.rs +++ b/src/ppb/actlr.rs @@ -1,100 +1,100 @@ #[doc = "Register `ACTLR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ACTLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DISMCYCINT` reader - Disable load/store multiple"] -pub type DismcycintR = crate::BitReader; +pub type DISMCYCINT_R = crate::BitReader; #[doc = "Field `DISMCYCINT` writer - Disable load/store multiple"] -pub type DismcycintW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISMCYCINT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISDEFWBUF` reader - Disable write buffer"] -pub type DisdefwbufR = crate::BitReader; +pub type DISDEFWBUF_R = crate::BitReader; #[doc = "Field `DISDEFWBUF` writer - Disable write buffer"] -pub type DisdefwbufW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISDEFWBUF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISFOLD` reader - Disable IT folding"] -pub type DisfoldR = crate::BitReader; +pub type DISFOLD_R = crate::BitReader; #[doc = "Field `DISFOLD` writer - Disable IT folding"] -pub type DisfoldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISFOLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISFPCA` reader - Disable FPCA update"] -pub type DisfpcaR = crate::BitReader; +pub type DISFPCA_R = crate::BitReader; #[doc = "Field `DISFPCA` writer - Disable FPCA update"] -pub type DisfpcaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISFPCA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DISOOFP` reader - Disable out of order FP execution"] -pub type DisoofpR = crate::BitReader; +pub type DISOOFP_R = crate::BitReader; #[doc = "Field `DISOOFP` writer - Disable out of order FP execution"] -pub type DisoofpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DISOOFP_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Disable load/store multiple"] #[inline(always)] - pub fn dismcycint(&self) -> DismcycintR { - DismcycintR::new((self.bits & 1) != 0) + pub fn dismcycint(&self) -> DISMCYCINT_R { + DISMCYCINT_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Disable write buffer"] #[inline(always)] - pub fn disdefwbuf(&self) -> DisdefwbufR { - DisdefwbufR::new(((self.bits >> 1) & 1) != 0) + pub fn disdefwbuf(&self) -> DISDEFWBUF_R { + DISDEFWBUF_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Disable IT folding"] #[inline(always)] - pub fn disfold(&self) -> DisfoldR { - DisfoldR::new(((self.bits >> 2) & 1) != 0) + pub fn disfold(&self) -> DISFOLD_R { + DISFOLD_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Disable FPCA update"] #[inline(always)] - pub fn disfpca(&self) -> DisfpcaR { - DisfpcaR::new(((self.bits >> 8) & 1) != 0) + pub fn disfpca(&self) -> DISFPCA_R { + DISFPCA_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Disable out of order FP execution"] #[inline(always)] - pub fn disoofp(&self) -> DisoofpR { - DisoofpR::new(((self.bits >> 9) & 1) != 0) + pub fn disoofp(&self) -> DISOOFP_R { + DISOOFP_R::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Disable load/store multiple"] #[inline(always)] #[must_use] - pub fn dismcycint(&mut self) -> DismcycintW { - DismcycintW::new(self, 0) + pub fn dismcycint(&mut self) -> DISMCYCINT_W { + DISMCYCINT_W::new(self, 0) } #[doc = "Bit 1 - Disable write buffer"] #[inline(always)] #[must_use] - pub fn disdefwbuf(&mut self) -> DisdefwbufW { - DisdefwbufW::new(self, 1) + pub fn disdefwbuf(&mut self) -> DISDEFWBUF_W { + DISDEFWBUF_W::new(self, 1) } #[doc = "Bit 2 - Disable IT folding"] #[inline(always)] #[must_use] - pub fn disfold(&mut self) -> DisfoldW { - DisfoldW::new(self, 2) + pub fn disfold(&mut self) -> DISFOLD_W { + DISFOLD_W::new(self, 2) } #[doc = "Bit 8 - Disable FPCA update"] #[inline(always)] #[must_use] - pub fn disfpca(&mut self) -> DisfpcaW { - DisfpcaW::new(self, 8) + pub fn disfpca(&mut self) -> DISFPCA_W { + DISFPCA_W::new(self, 8) } #[doc = "Bit 9 - Disable out of order FP execution"] #[inline(always)] #[must_use] - pub fn disoofp(&mut self) -> DisoofpW { - DisoofpW::new(self, 9) + pub fn disoofp(&mut self) -> DISOOFP_W { + DISOOFP_W::new(self, 9) } } #[doc = "Auxiliary Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`actlr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`actlr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ActlrSpec; -impl crate::RegisterSpec for ActlrSpec { +pub struct ACTLR_SPEC; +impl crate::RegisterSpec for ACTLR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`actlr::R`](R) reader structure"] -impl crate::Readable for ActlrSpec {} +impl crate::Readable for ACTLR_SPEC {} #[doc = "`write(|w| ..)` method takes [`actlr::W`](W) writer structure"] -impl crate::Writable for ActlrSpec { +impl crate::Writable for ACTLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ACTLR to value 0"] -impl crate::Resettable for ActlrSpec { +impl crate::Resettable for ACTLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/afsr.rs b/src/ppb/afsr.rs index 9e56cd89..280e37a7 100644 --- a/src/ppb/afsr.rs +++ b/src/ppb/afsr.rs @@ -1,40 +1,40 @@ #[doc = "Register `AFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AFSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VALUE` reader - Reserved"] -pub type ValueR = crate::FieldReader; +pub type VALUE_R = crate::FieldReader; #[doc = "Field `VALUE` writer - Reserved"] -pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type VALUE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] - pub fn value(&self) -> ValueR { - ValueR::new(self.bits) + pub fn value(&self) -> VALUE_R { + VALUE_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] #[must_use] - pub fn value(&mut self) -> ValueW { - ValueW::new(self, 0) + pub fn value(&mut self) -> VALUE_W { + VALUE_W::new(self, 0) } } #[doc = "Auxiliary Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`afsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`afsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AfsrSpec; -impl crate::RegisterSpec for AfsrSpec { +pub struct AFSR_SPEC; +impl crate::RegisterSpec for AFSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`afsr::R`](R) reader structure"] -impl crate::Readable for AfsrSpec {} +impl crate::Readable for AFSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`afsr::W`](W) writer structure"] -impl crate::Writable for AfsrSpec { +impl crate::Writable for AFSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AFSR to value 0"] -impl crate::Resettable for AfsrSpec { +impl crate::Resettable for AFSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/aircr.rs b/src/ppb/aircr.rs index caca2494..5b044510 100644 --- a/src/ppb/aircr.rs +++ b/src/ppb/aircr.rs @@ -1,149 +1,149 @@ #[doc = "Register `AIRCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `AIRCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VECTRESET` writer - Reserved for Debug use."] -pub type VectresetW<'a, REG> = crate::BitWriter<'a, REG>; +pub type VECTRESET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `VECTCLRACTIVE` writer - Reserved for Debug use."] -pub type VectclractiveW<'a, REG> = crate::BitWriter<'a, REG>; +pub type VECTCLRACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "System reset request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sysresetreq { +pub enum SYSRESETREQ_A { #[doc = "0: no system reset request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: asserts a signal to the outer system that requests a reset."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sysresetreq) -> Self { + fn from(variant: SYSRESETREQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSRESETREQ` writer - System reset request"] -pub type SysresetreqW<'a, REG> = crate::BitWriter<'a, REG, Sysresetreq>; -impl<'a, REG> SysresetreqW<'a, REG> +pub type SYSRESETREQ_W<'a, REG> = crate::BitWriter<'a, REG, SYSRESETREQ_A>; +impl<'a, REG> SYSRESETREQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no system reset request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sysresetreq::Value1) + self.variant(SYSRESETREQ_A::VALUE1) } #[doc = "asserts a signal to the outer system that requests a reset."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sysresetreq::Value2) + self.variant(SYSRESETREQ_A::VALUE2) } } #[doc = "Field `PRIGROUP` reader - Interrupt priority grouping field"] -pub type PrigroupR = crate::FieldReader; +pub type PRIGROUP_R = crate::FieldReader; #[doc = "Field `PRIGROUP` writer - Interrupt priority grouping field"] -pub type PrigroupW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PRIGROUP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Data endianness bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Endianness { +pub enum ENDIANNESS_A { #[doc = "0: Little-endian"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Big-endian."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Endianness) -> Self { + fn from(variant: ENDIANNESS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENDIANNESS` reader - Data endianness bit"] -pub type EndiannessR = crate::BitReader; -impl EndiannessR { +pub type ENDIANNESS_R = crate::BitReader; +impl ENDIANNESS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Endianness { + pub const fn variant(&self) -> ENDIANNESS_A { match self.bits { - false => Endianness::Value1, - true => Endianness::Value2, + false => ENDIANNESS_A::VALUE1, + true => ENDIANNESS_A::VALUE2, } } #[doc = "Little-endian"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Endianness::Value1 + *self == ENDIANNESS_A::VALUE1 } #[doc = "Big-endian."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Endianness::Value2 + *self == ENDIANNESS_A::VALUE2 } } #[doc = "Field `VECTKEY` reader - Register key"] -pub type VectkeyR = crate::FieldReader; +pub type VECTKEY_R = crate::FieldReader; #[doc = "Field `VECTKEY` writer - Register key"] -pub type VectkeyW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type VECTKEY_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 8:10 - Interrupt priority grouping field"] #[inline(always)] - pub fn prigroup(&self) -> PrigroupR { - PrigroupR::new(((self.bits >> 8) & 7) as u8) + pub fn prigroup(&self) -> PRIGROUP_R { + PRIGROUP_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bit 15 - Data endianness bit"] #[inline(always)] - pub fn endianness(&self) -> EndiannessR { - EndiannessR::new(((self.bits >> 15) & 1) != 0) + pub fn endianness(&self) -> ENDIANNESS_R { + ENDIANNESS_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:31 - Register key"] #[inline(always)] - pub fn vectkey(&self) -> VectkeyR { - VectkeyR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn vectkey(&self) -> VECTKEY_R { + VECTKEY_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - Reserved for Debug use."] #[inline(always)] #[must_use] - pub fn vectreset(&mut self) -> VectresetW { - VectresetW::new(self, 0) + pub fn vectreset(&mut self) -> VECTRESET_W { + VECTRESET_W::new(self, 0) } #[doc = "Bit 1 - Reserved for Debug use."] #[inline(always)] #[must_use] - pub fn vectclractive(&mut self) -> VectclractiveW { - VectclractiveW::new(self, 1) + pub fn vectclractive(&mut self) -> VECTCLRACTIVE_W { + VECTCLRACTIVE_W::new(self, 1) } #[doc = "Bit 2 - System reset request"] #[inline(always)] #[must_use] - pub fn sysresetreq(&mut self) -> SysresetreqW { - SysresetreqW::new(self, 2) + pub fn sysresetreq(&mut self) -> SYSRESETREQ_W { + SYSRESETREQ_W::new(self, 2) } #[doc = "Bits 8:10 - Interrupt priority grouping field"] #[inline(always)] #[must_use] - pub fn prigroup(&mut self) -> PrigroupW { - PrigroupW::new(self, 8) + pub fn prigroup(&mut self) -> PRIGROUP_W { + PRIGROUP_W::new(self, 8) } #[doc = "Bits 16:31 - Register key"] #[inline(always)] #[must_use] - pub fn vectkey(&mut self) -> VectkeyW { - VectkeyW::new(self, 16) + pub fn vectkey(&mut self) -> VECTKEY_W { + VECTKEY_W::new(self, 16) } } #[doc = "Application Interrupt and Reset Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aircr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aircr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AircrSpec; -impl crate::RegisterSpec for AircrSpec { +pub struct AIRCR_SPEC; +impl crate::RegisterSpec for AIRCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`aircr::R`](R) reader structure"] -impl crate::Readable for AircrSpec {} +impl crate::Readable for AIRCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`aircr::W`](W) writer structure"] -impl crate::Writable for AircrSpec { +impl crate::Writable for AIRCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets AIRCR to value 0xfa05_0000"] -impl crate::Resettable for AircrSpec { +impl crate::Resettable for AIRCR_SPEC { const RESET_VALUE: u32 = 0xfa05_0000; } diff --git a/src/ppb/bfar.rs b/src/ppb/bfar.rs index 512dcf44..6f2f280d 100644 --- a/src/ppb/bfar.rs +++ b/src/ppb/bfar.rs @@ -1,40 +1,40 @@ #[doc = "Register `BFAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address causing the fault"] -pub type AddressR = crate::FieldReader; +pub type ADDRESS_R = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address causing the fault"] -pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - pub fn address(&self) -> AddressR { - AddressR::new(self.bits) + pub fn address(&self) -> ADDRESS_R { + ADDRESS_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> AddressW { - AddressW::new(self, 0) + pub fn address(&mut self) -> ADDRESS_W { + ADDRESS_W::new(self, 0) } } #[doc = "BusFault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BfarSpec; -impl crate::RegisterSpec for BfarSpec { +pub struct BFAR_SPEC; +impl crate::RegisterSpec for BFAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bfar::R`](R) reader structure"] -impl crate::Readable for BfarSpec {} +impl crate::Readable for BFAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`bfar::W`](W) writer structure"] -impl crate::Writable for BfarSpec { +impl crate::Writable for BFAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFAR to value 0"] -impl crate::Resettable for BfarSpec { +impl crate::Resettable for BFAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/ccr.rs b/src/ppb/ccr.rs index 2712c8c6..4c202028 100644 --- a/src/ppb/ccr.rs +++ b/src/ppb/ccr.rs @@ -1,412 +1,412 @@ #[doc = "Register `CCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Non Base Thread Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Nonbasethrdena { +pub enum NONBASETHRDENA_A { #[doc = "0: processor can enter Thread mode only when no exception is active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Nonbasethrdena) -> Self { + fn from(variant: NONBASETHRDENA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NONBASETHRDENA` reader - Non Base Thread Mode Enable"] -pub type NonbasethrdenaR = crate::BitReader; -impl NonbasethrdenaR { +pub type NONBASETHRDENA_R = crate::BitReader; +impl NONBASETHRDENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nonbasethrdena { + pub const fn variant(&self) -> NONBASETHRDENA_A { match self.bits { - false => Nonbasethrdena::Value1, - true => Nonbasethrdena::Value2, + false => NONBASETHRDENA_A::VALUE1, + true => NONBASETHRDENA_A::VALUE2, } } #[doc = "processor can enter Thread mode only when no exception is active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nonbasethrdena::Value1 + *self == NONBASETHRDENA_A::VALUE1 } #[doc = "processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nonbasethrdena::Value2 + *self == NONBASETHRDENA_A::VALUE2 } } #[doc = "Field `NONBASETHRDENA` writer - Non Base Thread Mode Enable"] -pub type NonbasethrdenaW<'a, REG> = crate::BitWriter<'a, REG, Nonbasethrdena>; -impl<'a, REG> NonbasethrdenaW<'a, REG> +pub type NONBASETHRDENA_W<'a, REG> = crate::BitWriter<'a, REG, NONBASETHRDENA_A>; +impl<'a, REG> NONBASETHRDENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "processor can enter Thread mode only when no exception is active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nonbasethrdena::Value1) + self.variant(NONBASETHRDENA_A::VALUE1) } #[doc = "processor can enter Thread mode from any level under the control of an EXC_RETURN value, see Exception returnException return occurs when the processor is in Handler mode and executes one of the following instructions to load the EXC_RETURN value into the PC:an LDM or POP instruction that loads the PCan LDR instruction with PC as the destinationa BX instruction using any register.EXC_RETURN is the value loaded into the LR on exception entry. The exception mechanism relies on this value to detect when the processor has completed an exception handler. The lowest five bits of this value provide information on the return stack and processor mode. shows the EXC_RETURN values with a description of the exception return behavior. All EXC_RETURN values have bits\\[31:5\\] set to one. When this value is loaded into the PC it indicates to the processor that the exception is complete, and the processor initiates the appropriate exception return sequence.Exception return behaviorEXC_RETURN\\[31:0\\]Description 0xFFFFFFF1 Return to Handler mode, exception return uses non-floating-point state from the MSP and execution uses MSP after return. 0xFFFFFFF9 Return to Thread mode, exception return uses non-floating-point state from MSP and execution uses MSP after return. 0xFFFFFFFD Return to Thread mode, exception return uses non-floating-point state from the PSP and execution uses PSP after return. 0xFFFFFFE1 Return to Handler mode, exception return uses floating-point-state from MSP and execution uses MSP after return. 0xFFFFFFE9 Return to Thread mode, exception return uses floating-point state from MSP and execution uses MSP after return. 0xFFFFFFED Return to Thread mode, exception return uses floating-point state from PSP and execution uses PSP after return. ."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nonbasethrdena::Value2) + self.variant(NONBASETHRDENA_A::VALUE2) } } #[doc = "User Set Pending Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usersetmpend { +pub enum USERSETMPEND_A { #[doc = "0: disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usersetmpend) -> Self { + fn from(variant: USERSETMPEND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USERSETMPEND` reader - User Set Pending Enable"] -pub type UsersetmpendR = crate::BitReader; -impl UsersetmpendR { +pub type USERSETMPEND_R = crate::BitReader; +impl USERSETMPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usersetmpend { + pub const fn variant(&self) -> USERSETMPEND_A { match self.bits { - false => Usersetmpend::Value1, - true => Usersetmpend::Value2, + false => USERSETMPEND_A::VALUE1, + true => USERSETMPEND_A::VALUE2, } } #[doc = "disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usersetmpend::Value1 + *self == USERSETMPEND_A::VALUE1 } #[doc = "enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usersetmpend::Value2 + *self == USERSETMPEND_A::VALUE2 } } #[doc = "Field `USERSETMPEND` writer - User Set Pending Enable"] -pub type UsersetmpendW<'a, REG> = crate::BitWriter<'a, REG, Usersetmpend>; -impl<'a, REG> UsersetmpendW<'a, REG> +pub type USERSETMPEND_W<'a, REG> = crate::BitWriter<'a, REG, USERSETMPEND_A>; +impl<'a, REG> USERSETMPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usersetmpend::Value1) + self.variant(USERSETMPEND_A::VALUE1) } #[doc = "enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usersetmpend::Value2) + self.variant(USERSETMPEND_A::VALUE2) } } #[doc = "Unaligned Access Trap Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum UnalignTrp { +pub enum UNALIGN_TRP_A { #[doc = "0: do not trap unaligned halfword and word accesses"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: trap unaligned halfword and word accesses."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: UnalignTrp) -> Self { + fn from(variant: UNALIGN_TRP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UNALIGN_TRP` reader - Unaligned Access Trap Enable"] -pub type UnalignTrpR = crate::BitReader; -impl UnalignTrpR { +pub type UNALIGN_TRP_R = crate::BitReader; +impl UNALIGN_TRP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> UnalignTrp { + pub const fn variant(&self) -> UNALIGN_TRP_A { match self.bits { - false => UnalignTrp::Value1, - true => UnalignTrp::Value2, + false => UNALIGN_TRP_A::VALUE1, + true => UNALIGN_TRP_A::VALUE2, } } #[doc = "do not trap unaligned halfword and word accesses"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == UnalignTrp::Value1 + *self == UNALIGN_TRP_A::VALUE1 } #[doc = "trap unaligned halfword and word accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == UnalignTrp::Value2 + *self == UNALIGN_TRP_A::VALUE2 } } #[doc = "Field `UNALIGN_TRP` writer - Unaligned Access Trap Enable"] -pub type UnalignTrpW<'a, REG> = crate::BitWriter<'a, REG, UnalignTrp>; -impl<'a, REG> UnalignTrpW<'a, REG> +pub type UNALIGN_TRP_W<'a, REG> = crate::BitWriter<'a, REG, UNALIGN_TRP_A>; +impl<'a, REG> UNALIGN_TRP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not trap unaligned halfword and word accesses"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(UnalignTrp::Value1) + self.variant(UNALIGN_TRP_A::VALUE1) } #[doc = "trap unaligned halfword and word accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(UnalignTrp::Value2) + self.variant(UNALIGN_TRP_A::VALUE2) } } #[doc = "Divide by Zero Trap Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Div0Trp { +pub enum DIV_0_TRP_A { #[doc = "0: do not trap divide by 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: trap divide by 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Div0Trp) -> Self { + fn from(variant: DIV_0_TRP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIV_0_TRP` reader - Divide by Zero Trap Enable"] -pub type Div0TrpR = crate::BitReader; -impl Div0TrpR { +pub type DIV_0_TRP_R = crate::BitReader; +impl DIV_0_TRP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Div0Trp { + pub const fn variant(&self) -> DIV_0_TRP_A { match self.bits { - false => Div0Trp::Value1, - true => Div0Trp::Value2, + false => DIV_0_TRP_A::VALUE1, + true => DIV_0_TRP_A::VALUE2, } } #[doc = "do not trap divide by 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Div0Trp::Value1 + *self == DIV_0_TRP_A::VALUE1 } #[doc = "trap divide by 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Div0Trp::Value2 + *self == DIV_0_TRP_A::VALUE2 } } #[doc = "Field `DIV_0_TRP` writer - Divide by Zero Trap Enable"] -pub type Div0TrpW<'a, REG> = crate::BitWriter<'a, REG, Div0Trp>; -impl<'a, REG> Div0TrpW<'a, REG> +pub type DIV_0_TRP_W<'a, REG> = crate::BitWriter<'a, REG, DIV_0_TRP_A>; +impl<'a, REG> DIV_0_TRP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not trap divide by 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Div0Trp::Value1) + self.variant(DIV_0_TRP_A::VALUE1) } #[doc = "trap divide by 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Div0Trp::Value2) + self.variant(DIV_0_TRP_A::VALUE2) } } #[doc = "Bus Fault Hard Fault and NMI Ignore\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfhfnmign { +pub enum BFHFNMIGN_A { #[doc = "0: data bus faults caused by load and store instructions cause a lock-up"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfhfnmign) -> Self { + fn from(variant: BFHFNMIGN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFHFNMIGN` reader - Bus Fault Hard Fault and NMI Ignore"] -pub type BfhfnmignR = crate::BitReader; -impl BfhfnmignR { +pub type BFHFNMIGN_R = crate::BitReader; +impl BFHFNMIGN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfhfnmign { + pub const fn variant(&self) -> BFHFNMIGN_A { match self.bits { - false => Bfhfnmign::Value1, - true => Bfhfnmign::Value2, + false => BFHFNMIGN_A::VALUE1, + true => BFHFNMIGN_A::VALUE2, } } #[doc = "data bus faults caused by load and store instructions cause a lock-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfhfnmign::Value1 + *self == BFHFNMIGN_A::VALUE1 } #[doc = "handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfhfnmign::Value2 + *self == BFHFNMIGN_A::VALUE2 } } #[doc = "Field `BFHFNMIGN` writer - Bus Fault Hard Fault and NMI Ignore"] -pub type BfhfnmignW<'a, REG> = crate::BitWriter<'a, REG, Bfhfnmign>; -impl<'a, REG> BfhfnmignW<'a, REG> +pub type BFHFNMIGN_W<'a, REG> = crate::BitWriter<'a, REG, BFHFNMIGN_A>; +impl<'a, REG> BFHFNMIGN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "data bus faults caused by load and store instructions cause a lock-up"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfhfnmign::Value1) + self.variant(BFHFNMIGN_A::VALUE1) } #[doc = "handlers running at priority -1 and -2 ignore data bus faults caused by load and store instructions."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfhfnmign::Value2) + self.variant(BFHFNMIGN_A::VALUE2) } } #[doc = "Stack Alignment\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stkalign { +pub enum STKALIGN_A { #[doc = "0: 4-byte aligned"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 8-byte aligned."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stkalign) -> Self { + fn from(variant: STKALIGN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STKALIGN` reader - Stack Alignment"] -pub type StkalignR = crate::BitReader; -impl StkalignR { +pub type STKALIGN_R = crate::BitReader; +impl STKALIGN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stkalign { + pub const fn variant(&self) -> STKALIGN_A { match self.bits { - false => Stkalign::Value1, - true => Stkalign::Value2, + false => STKALIGN_A::VALUE1, + true => STKALIGN_A::VALUE2, } } #[doc = "4-byte aligned"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stkalign::Value1 + *self == STKALIGN_A::VALUE1 } #[doc = "8-byte aligned."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stkalign::Value2 + *self == STKALIGN_A::VALUE2 } } #[doc = "Field `STKALIGN` writer - Stack Alignment"] -pub type StkalignW<'a, REG> = crate::BitWriter<'a, REG, Stkalign>; -impl<'a, REG> StkalignW<'a, REG> +pub type STKALIGN_W<'a, REG> = crate::BitWriter<'a, REG, STKALIGN_A>; +impl<'a, REG> STKALIGN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "4-byte aligned"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stkalign::Value1) + self.variant(STKALIGN_A::VALUE1) } #[doc = "8-byte aligned."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stkalign::Value2) + self.variant(STKALIGN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Non Base Thread Mode Enable"] #[inline(always)] - pub fn nonbasethrdena(&self) -> NonbasethrdenaR { - NonbasethrdenaR::new((self.bits & 1) != 0) + pub fn nonbasethrdena(&self) -> NONBASETHRDENA_R { + NONBASETHRDENA_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - User Set Pending Enable"] #[inline(always)] - pub fn usersetmpend(&self) -> UsersetmpendR { - UsersetmpendR::new(((self.bits >> 1) & 1) != 0) + pub fn usersetmpend(&self) -> USERSETMPEND_R { + USERSETMPEND_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Unaligned Access Trap Enable"] #[inline(always)] - pub fn unalign_trp(&self) -> UnalignTrpR { - UnalignTrpR::new(((self.bits >> 3) & 1) != 0) + pub fn unalign_trp(&self) -> UNALIGN_TRP_R { + UNALIGN_TRP_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Divide by Zero Trap Enable"] #[inline(always)] - pub fn div_0_trp(&self) -> Div0TrpR { - Div0TrpR::new(((self.bits >> 4) & 1) != 0) + pub fn div_0_trp(&self) -> DIV_0_TRP_R { + DIV_0_TRP_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"] #[inline(always)] - pub fn bfhfnmign(&self) -> BfhfnmignR { - BfhfnmignR::new(((self.bits >> 8) & 1) != 0) + pub fn bfhfnmign(&self) -> BFHFNMIGN_R { + BFHFNMIGN_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Stack Alignment"] #[inline(always)] - pub fn stkalign(&self) -> StkalignR { - StkalignR::new(((self.bits >> 9) & 1) != 0) + pub fn stkalign(&self) -> STKALIGN_R { + STKALIGN_R::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Non Base Thread Mode Enable"] #[inline(always)] #[must_use] - pub fn nonbasethrdena(&mut self) -> NonbasethrdenaW { - NonbasethrdenaW::new(self, 0) + pub fn nonbasethrdena(&mut self) -> NONBASETHRDENA_W { + NONBASETHRDENA_W::new(self, 0) } #[doc = "Bit 1 - User Set Pending Enable"] #[inline(always)] #[must_use] - pub fn usersetmpend(&mut self) -> UsersetmpendW { - UsersetmpendW::new(self, 1) + pub fn usersetmpend(&mut self) -> USERSETMPEND_W { + USERSETMPEND_W::new(self, 1) } #[doc = "Bit 3 - Unaligned Access Trap Enable"] #[inline(always)] #[must_use] - pub fn unalign_trp(&mut self) -> UnalignTrpW { - UnalignTrpW::new(self, 3) + pub fn unalign_trp(&mut self) -> UNALIGN_TRP_W { + UNALIGN_TRP_W::new(self, 3) } #[doc = "Bit 4 - Divide by Zero Trap Enable"] #[inline(always)] #[must_use] - pub fn div_0_trp(&mut self) -> Div0TrpW { - Div0TrpW::new(self, 4) + pub fn div_0_trp(&mut self) -> DIV_0_TRP_W { + DIV_0_TRP_W::new(self, 4) } #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"] #[inline(always)] #[must_use] - pub fn bfhfnmign(&mut self) -> BfhfnmignW { - BfhfnmignW::new(self, 8) + pub fn bfhfnmign(&mut self) -> BFHFNMIGN_W { + BFHFNMIGN_W::new(self, 8) } #[doc = "Bit 9 - Stack Alignment"] #[inline(always)] #[must_use] - pub fn stkalign(&mut self) -> StkalignW { - StkalignW::new(self, 9) + pub fn stkalign(&mut self) -> STKALIGN_W { + STKALIGN_W::new(self, 9) } } #[doc = "Configuration and Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcrSpec; -impl crate::RegisterSpec for CcrSpec { +pub struct CCR_SPEC; +impl crate::RegisterSpec for CCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ccr::R`](R) reader structure"] -impl crate::Readable for CcrSpec {} +impl crate::Readable for CCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"] -impl crate::Writable for CcrSpec { +impl crate::Writable for CCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCR to value 0x0200"] -impl crate::Resettable for CcrSpec { +impl crate::Resettable for CCR_SPEC { const RESET_VALUE: u32 = 0x0200; } diff --git a/src/ppb/cfsr.rs b/src/ppb/cfsr.rs index 3d556f7d..e02e6632 100644 --- a/src/ppb/cfsr.rs +++ b/src/ppb/cfsr.rs @@ -1,1241 +1,1241 @@ #[doc = "Register `CFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CFSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Instruction access violation flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Iaccviol { +pub enum IACCVIOL_A { #[doc = "0: no instruction access violation fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor attempted an instruction fetch from a location that does not permit execution."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Iaccviol) -> Self { + fn from(variant: IACCVIOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IACCVIOL` reader - Instruction access violation flag"] -pub type IaccviolR = crate::BitReader; -impl IaccviolR { +pub type IACCVIOL_R = crate::BitReader; +impl IACCVIOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Iaccviol { + pub const fn variant(&self) -> IACCVIOL_A { match self.bits { - false => Iaccviol::Value1, - true => Iaccviol::Value2, + false => IACCVIOL_A::VALUE1, + true => IACCVIOL_A::VALUE2, } } #[doc = "no instruction access violation fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Iaccviol::Value1 + *self == IACCVIOL_A::VALUE1 } #[doc = "the processor attempted an instruction fetch from a location that does not permit execution."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Iaccviol::Value2 + *self == IACCVIOL_A::VALUE2 } } #[doc = "Field `IACCVIOL` writer - Instruction access violation flag"] -pub type IaccviolW<'a, REG> = crate::BitWriter<'a, REG, Iaccviol>; -impl<'a, REG> IaccviolW<'a, REG> +pub type IACCVIOL_W<'a, REG> = crate::BitWriter<'a, REG, IACCVIOL_A>; +impl<'a, REG> IACCVIOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no instruction access violation fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Iaccviol::Value1) + self.variant(IACCVIOL_A::VALUE1) } #[doc = "the processor attempted an instruction fetch from a location that does not permit execution."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Iaccviol::Value2) + self.variant(IACCVIOL_A::VALUE2) } } #[doc = "Data access violation flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Daccviol { +pub enum DACCVIOL_A { #[doc = "0: no data access violation fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor attempted a load or store at a location that does not permit the operation."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Daccviol) -> Self { + fn from(variant: DACCVIOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DACCVIOL` reader - Data access violation flag"] -pub type DaccviolR = crate::BitReader; -impl DaccviolR { +pub type DACCVIOL_R = crate::BitReader; +impl DACCVIOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Daccviol { + pub const fn variant(&self) -> DACCVIOL_A { match self.bits { - false => Daccviol::Value1, - true => Daccviol::Value2, + false => DACCVIOL_A::VALUE1, + true => DACCVIOL_A::VALUE2, } } #[doc = "no data access violation fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Daccviol::Value1 + *self == DACCVIOL_A::VALUE1 } #[doc = "the processor attempted a load or store at a location that does not permit the operation."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Daccviol::Value2 + *self == DACCVIOL_A::VALUE2 } } #[doc = "Field `DACCVIOL` writer - Data access violation flag"] -pub type DaccviolW<'a, REG> = crate::BitWriter<'a, REG, Daccviol>; -impl<'a, REG> DaccviolW<'a, REG> +pub type DACCVIOL_W<'a, REG> = crate::BitWriter<'a, REG, DACCVIOL_A>; +impl<'a, REG> DACCVIOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no data access violation fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Daccviol::Value1) + self.variant(DACCVIOL_A::VALUE1) } #[doc = "the processor attempted a load or store at a location that does not permit the operation."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Daccviol::Value2) + self.variant(DACCVIOL_A::VALUE2) } } #[doc = "MemManage fault on unstacking for a return from exception\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Munstkerr { +pub enum MUNSTKERR_A { #[doc = "0: no unstacking fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: unstack for an exception return has caused one or more access violations."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Munstkerr) -> Self { + fn from(variant: MUNSTKERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MUNSTKERR` reader - MemManage fault on unstacking for a return from exception"] -pub type MunstkerrR = crate::BitReader; -impl MunstkerrR { +pub type MUNSTKERR_R = crate::BitReader; +impl MUNSTKERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Munstkerr { + pub const fn variant(&self) -> MUNSTKERR_A { match self.bits { - false => Munstkerr::Value1, - true => Munstkerr::Value2, + false => MUNSTKERR_A::VALUE1, + true => MUNSTKERR_A::VALUE2, } } #[doc = "no unstacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Munstkerr::Value1 + *self == MUNSTKERR_A::VALUE1 } #[doc = "unstack for an exception return has caused one or more access violations."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Munstkerr::Value2 + *self == MUNSTKERR_A::VALUE2 } } #[doc = "Field `MUNSTKERR` writer - MemManage fault on unstacking for a return from exception"] -pub type MunstkerrW<'a, REG> = crate::BitWriter<'a, REG, Munstkerr>; -impl<'a, REG> MunstkerrW<'a, REG> +pub type MUNSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, MUNSTKERR_A>; +impl<'a, REG> MUNSTKERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unstacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Munstkerr::Value1) + self.variant(MUNSTKERR_A::VALUE1) } #[doc = "unstack for an exception return has caused one or more access violations."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Munstkerr::Value2) + self.variant(MUNSTKERR_A::VALUE2) } } #[doc = "MemManage fault on stacking for exception entry\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mstkerr { +pub enum MSTKERR_A { #[doc = "0: no stacking fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: stacking for an exception entry has caused one or more access violations."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mstkerr) -> Self { + fn from(variant: MSTKERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSTKERR` reader - MemManage fault on stacking for exception entry"] -pub type MstkerrR = crate::BitReader; -impl MstkerrR { +pub type MSTKERR_R = crate::BitReader; +impl MSTKERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mstkerr { + pub const fn variant(&self) -> MSTKERR_A { match self.bits { - false => Mstkerr::Value1, - true => Mstkerr::Value2, + false => MSTKERR_A::VALUE1, + true => MSTKERR_A::VALUE2, } } #[doc = "no stacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mstkerr::Value1 + *self == MSTKERR_A::VALUE1 } #[doc = "stacking for an exception entry has caused one or more access violations."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mstkerr::Value2 + *self == MSTKERR_A::VALUE2 } } #[doc = "Field `MSTKERR` writer - MemManage fault on stacking for exception entry"] -pub type MstkerrW<'a, REG> = crate::BitWriter<'a, REG, Mstkerr>; -impl<'a, REG> MstkerrW<'a, REG> +pub type MSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, MSTKERR_A>; +impl<'a, REG> MSTKERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no stacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mstkerr::Value1) + self.variant(MSTKERR_A::VALUE1) } #[doc = "stacking for an exception entry has caused one or more access violations."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mstkerr::Value2) + self.variant(MSTKERR_A::VALUE2) } } #[doc = "MemManage fault during floating point lazy state preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mlsperr { +pub enum MLSPERR_A { #[doc = "0: No MemManage fault occurred during floating-point lazy state preservation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A MemManage fault occurred during floating-point lazy state preservation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mlsperr) -> Self { + fn from(variant: MLSPERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MLSPERR` reader - MemManage fault during floating point lazy state preservation"] -pub type MlsperrR = crate::BitReader; -impl MlsperrR { +pub type MLSPERR_R = crate::BitReader; +impl MLSPERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mlsperr { + pub const fn variant(&self) -> MLSPERR_A { match self.bits { - false => Mlsperr::Value1, - true => Mlsperr::Value2, + false => MLSPERR_A::VALUE1, + true => MLSPERR_A::VALUE2, } } #[doc = "No MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mlsperr::Value1 + *self == MLSPERR_A::VALUE1 } #[doc = "A MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mlsperr::Value2 + *self == MLSPERR_A::VALUE2 } } #[doc = "Field `MLSPERR` writer - MemManage fault during floating point lazy state preservation"] -pub type MlsperrW<'a, REG> = crate::BitWriter<'a, REG, Mlsperr>; -impl<'a, REG> MlsperrW<'a, REG> +pub type MLSPERR_W<'a, REG> = crate::BitWriter<'a, REG, MLSPERR_A>; +impl<'a, REG> MLSPERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mlsperr::Value1) + self.variant(MLSPERR_A::VALUE1) } #[doc = "A MemManage fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mlsperr::Value2) + self.variant(MLSPERR_A::VALUE2) } } #[doc = "MemManage Fault Address Register (MMFAR) valid flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mmarvalid { +pub enum MMARVALID_A { #[doc = "0: value in MMAR is not a valid fault address"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: MMAR holds a valid fault address."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mmarvalid) -> Self { + fn from(variant: MMARVALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MMARVALID` reader - MemManage Fault Address Register (MMFAR) valid flag"] -pub type MmarvalidR = crate::BitReader; -impl MmarvalidR { +pub type MMARVALID_R = crate::BitReader; +impl MMARVALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mmarvalid { + pub const fn variant(&self) -> MMARVALID_A { match self.bits { - false => Mmarvalid::Value1, - true => Mmarvalid::Value2, + false => MMARVALID_A::VALUE1, + true => MMARVALID_A::VALUE2, } } #[doc = "value in MMAR is not a valid fault address"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mmarvalid::Value1 + *self == MMARVALID_A::VALUE1 } #[doc = "MMAR holds a valid fault address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mmarvalid::Value2 + *self == MMARVALID_A::VALUE2 } } #[doc = "Field `MMARVALID` writer - MemManage Fault Address Register (MMFAR) valid flag"] -pub type MmarvalidW<'a, REG> = crate::BitWriter<'a, REG, Mmarvalid>; -impl<'a, REG> MmarvalidW<'a, REG> +pub type MMARVALID_W<'a, REG> = crate::BitWriter<'a, REG, MMARVALID_A>; +impl<'a, REG> MMARVALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "value in MMAR is not a valid fault address"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mmarvalid::Value1) + self.variant(MMARVALID_A::VALUE1) } #[doc = "MMAR holds a valid fault address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mmarvalid::Value2) + self.variant(MMARVALID_A::VALUE2) } } #[doc = "Instruction bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ibuserr { +pub enum IBUSERR_A { #[doc = "0: no instruction bus error"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: instruction bus error."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ibuserr) -> Self { + fn from(variant: IBUSERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IBUSERR` reader - Instruction bus error"] -pub type IbuserrR = crate::BitReader; -impl IbuserrR { +pub type IBUSERR_R = crate::BitReader; +impl IBUSERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ibuserr { + pub const fn variant(&self) -> IBUSERR_A { match self.bits { - false => Ibuserr::Value1, - true => Ibuserr::Value2, + false => IBUSERR_A::VALUE1, + true => IBUSERR_A::VALUE2, } } #[doc = "no instruction bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ibuserr::Value1 + *self == IBUSERR_A::VALUE1 } #[doc = "instruction bus error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ibuserr::Value2 + *self == IBUSERR_A::VALUE2 } } #[doc = "Field `IBUSERR` writer - Instruction bus error"] -pub type IbuserrW<'a, REG> = crate::BitWriter<'a, REG, Ibuserr>; -impl<'a, REG> IbuserrW<'a, REG> +pub type IBUSERR_W<'a, REG> = crate::BitWriter<'a, REG, IBUSERR_A>; +impl<'a, REG> IBUSERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no instruction bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ibuserr::Value1) + self.variant(IBUSERR_A::VALUE1) } #[doc = "instruction bus error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ibuserr::Value2) + self.variant(IBUSERR_A::VALUE2) } } #[doc = "Precise data bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Preciserr { +pub enum PRECISERR_A { #[doc = "0: no precise data bus error"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Preciserr) -> Self { + fn from(variant: PRECISERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRECISERR` reader - Precise data bus error"] -pub type PreciserrR = crate::BitReader; -impl PreciserrR { +pub type PRECISERR_R = crate::BitReader; +impl PRECISERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Preciserr { + pub const fn variant(&self) -> PRECISERR_A { match self.bits { - false => Preciserr::Value1, - true => Preciserr::Value2, + false => PRECISERR_A::VALUE1, + true => PRECISERR_A::VALUE2, } } #[doc = "no precise data bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Preciserr::Value1 + *self == PRECISERR_A::VALUE1 } #[doc = "a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Preciserr::Value2 + *self == PRECISERR_A::VALUE2 } } #[doc = "Field `PRECISERR` writer - Precise data bus error"] -pub type PreciserrW<'a, REG> = crate::BitWriter<'a, REG, Preciserr>; -impl<'a, REG> PreciserrW<'a, REG> +pub type PRECISERR_W<'a, REG> = crate::BitWriter<'a, REG, PRECISERR_A>; +impl<'a, REG> PRECISERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no precise data bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Preciserr::Value1) + self.variant(PRECISERR_A::VALUE1) } #[doc = "a data bus error has occurred, and the PC value stacked for the exception return points to the instruction that caused the fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Preciserr::Value2) + self.variant(PRECISERR_A::VALUE2) } } #[doc = "Imprecise data bus error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Impreciserr { +pub enum IMPRECISERR_A { #[doc = "0: no imprecise data bus error"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Impreciserr) -> Self { + fn from(variant: IMPRECISERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IMPRECISERR` reader - Imprecise data bus error"] -pub type ImpreciserrR = crate::BitReader; -impl ImpreciserrR { +pub type IMPRECISERR_R = crate::BitReader; +impl IMPRECISERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Impreciserr { + pub const fn variant(&self) -> IMPRECISERR_A { match self.bits { - false => Impreciserr::Value1, - true => Impreciserr::Value2, + false => IMPRECISERR_A::VALUE1, + true => IMPRECISERR_A::VALUE2, } } #[doc = "no imprecise data bus error"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Impreciserr::Value1 + *self == IMPRECISERR_A::VALUE1 } #[doc = "a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Impreciserr::Value2 + *self == IMPRECISERR_A::VALUE2 } } #[doc = "Field `IMPRECISERR` writer - Imprecise data bus error"] -pub type ImpreciserrW<'a, REG> = crate::BitWriter<'a, REG, Impreciserr>; -impl<'a, REG> ImpreciserrW<'a, REG> +pub type IMPRECISERR_W<'a, REG> = crate::BitWriter<'a, REG, IMPRECISERR_A>; +impl<'a, REG> IMPRECISERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no imprecise data bus error"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Impreciserr::Value1) + self.variant(IMPRECISERR_A::VALUE1) } #[doc = "a data bus error has occurred, but the return address in the stack frame is not related to the instruction that caused the error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Impreciserr::Value2) + self.variant(IMPRECISERR_A::VALUE2) } } #[doc = "BusFault on unstacking for a return from exception\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Unstkerr { +pub enum UNSTKERR_A { #[doc = "0: no unstacking fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: stacking for an exception entry has caused one or more BusFaults."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Unstkerr) -> Self { + fn from(variant: UNSTKERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UNSTKERR` reader - BusFault on unstacking for a return from exception"] -pub type UnstkerrR = crate::BitReader; -impl UnstkerrR { +pub type UNSTKERR_R = crate::BitReader; +impl UNSTKERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Unstkerr { + pub const fn variant(&self) -> UNSTKERR_A { match self.bits { - false => Unstkerr::Value1, - true => Unstkerr::Value2, + false => UNSTKERR_A::VALUE1, + true => UNSTKERR_A::VALUE2, } } #[doc = "no unstacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Unstkerr::Value1 + *self == UNSTKERR_A::VALUE1 } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Unstkerr::Value2 + *self == UNSTKERR_A::VALUE2 } } #[doc = "Field `UNSTKERR` writer - BusFault on unstacking for a return from exception"] -pub type UnstkerrW<'a, REG> = crate::BitWriter<'a, REG, Unstkerr>; -impl<'a, REG> UnstkerrW<'a, REG> +pub type UNSTKERR_W<'a, REG> = crate::BitWriter<'a, REG, UNSTKERR_A>; +impl<'a, REG> UNSTKERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unstacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Unstkerr::Value1) + self.variant(UNSTKERR_A::VALUE1) } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Unstkerr::Value2) + self.variant(UNSTKERR_A::VALUE2) } } #[doc = "BusFault on stacking for exception entry\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stkerr { +pub enum STKERR_A { #[doc = "0: no stacking fault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: stacking for an exception entry has caused one or more BusFaults."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stkerr) -> Self { + fn from(variant: STKERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STKERR` reader - BusFault on stacking for exception entry"] -pub type StkerrR = crate::BitReader; -impl StkerrR { +pub type STKERR_R = crate::BitReader; +impl STKERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stkerr { + pub const fn variant(&self) -> STKERR_A { match self.bits { - false => Stkerr::Value1, - true => Stkerr::Value2, + false => STKERR_A::VALUE1, + true => STKERR_A::VALUE2, } } #[doc = "no stacking fault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stkerr::Value1 + *self == STKERR_A::VALUE1 } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stkerr::Value2 + *self == STKERR_A::VALUE2 } } #[doc = "Field `STKERR` writer - BusFault on stacking for exception entry"] -pub type StkerrW<'a, REG> = crate::BitWriter<'a, REG, Stkerr>; -impl<'a, REG> StkerrW<'a, REG> +pub type STKERR_W<'a, REG> = crate::BitWriter<'a, REG, STKERR_A>; +impl<'a, REG> STKERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no stacking fault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stkerr::Value1) + self.variant(STKERR_A::VALUE1) } #[doc = "stacking for an exception entry has caused one or more BusFaults."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stkerr::Value2) + self.variant(STKERR_A::VALUE2) } } #[doc = "BusFault during floating point lazy state preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lsperr { +pub enum LSPERR_A { #[doc = "0: No bus fault occurred during floating-point lazy state preservation."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A bus fault occurred during floating-point lazy state preservation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lsperr) -> Self { + fn from(variant: LSPERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LSPERR` reader - BusFault during floating point lazy state preservation"] -pub type LsperrR = crate::BitReader; -impl LsperrR { +pub type LSPERR_R = crate::BitReader; +impl LSPERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lsperr { + pub const fn variant(&self) -> LSPERR_A { match self.bits { - false => Lsperr::Value1, - true => Lsperr::Value2, + false => LSPERR_A::VALUE1, + true => LSPERR_A::VALUE2, } } #[doc = "No bus fault occurred during floating-point lazy state preservation."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lsperr::Value1 + *self == LSPERR_A::VALUE1 } #[doc = "A bus fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lsperr::Value2 + *self == LSPERR_A::VALUE2 } } #[doc = "Field `LSPERR` writer - BusFault during floating point lazy state preservation"] -pub type LsperrW<'a, REG> = crate::BitWriter<'a, REG, Lsperr>; -impl<'a, REG> LsperrW<'a, REG> +pub type LSPERR_W<'a, REG> = crate::BitWriter<'a, REG, LSPERR_A>; +impl<'a, REG> LSPERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No bus fault occurred during floating-point lazy state preservation."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lsperr::Value1) + self.variant(LSPERR_A::VALUE1) } #[doc = "A bus fault occurred during floating-point lazy state preservation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lsperr::Value2) + self.variant(LSPERR_A::VALUE2) } } #[doc = "BusFault Address Register (BFAR) valid flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfarvalid { +pub enum BFARVALID_A { #[doc = "0: value in BFAR is not a valid fault address"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: BFAR holds a valid fault address."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfarvalid) -> Self { + fn from(variant: BFARVALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFARVALID` reader - BusFault Address Register (BFAR) valid flag"] -pub type BfarvalidR = crate::BitReader; -impl BfarvalidR { +pub type BFARVALID_R = crate::BitReader; +impl BFARVALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfarvalid { + pub const fn variant(&self) -> BFARVALID_A { match self.bits { - false => Bfarvalid::Value1, - true => Bfarvalid::Value2, + false => BFARVALID_A::VALUE1, + true => BFARVALID_A::VALUE2, } } #[doc = "value in BFAR is not a valid fault address"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfarvalid::Value1 + *self == BFARVALID_A::VALUE1 } #[doc = "BFAR holds a valid fault address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfarvalid::Value2 + *self == BFARVALID_A::VALUE2 } } #[doc = "Field `BFARVALID` writer - BusFault Address Register (BFAR) valid flag"] -pub type BfarvalidW<'a, REG> = crate::BitWriter<'a, REG, Bfarvalid>; -impl<'a, REG> BfarvalidW<'a, REG> +pub type BFARVALID_W<'a, REG> = crate::BitWriter<'a, REG, BFARVALID_A>; +impl<'a, REG> BFARVALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "value in BFAR is not a valid fault address"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfarvalid::Value1) + self.variant(BFARVALID_A::VALUE1) } #[doc = "BFAR holds a valid fault address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfarvalid::Value2) + self.variant(BFARVALID_A::VALUE2) } } #[doc = "Undefined instruction UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Undefinstr { +pub enum UNDEFINSTR_A { #[doc = "0: no undefined instruction UsageFault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has attempted to execute an undefined instruction."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Undefinstr) -> Self { + fn from(variant: UNDEFINSTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UNDEFINSTR` reader - Undefined instruction UsageFault"] -pub type UndefinstrR = crate::BitReader; -impl UndefinstrR { +pub type UNDEFINSTR_R = crate::BitReader; +impl UNDEFINSTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Undefinstr { + pub const fn variant(&self) -> UNDEFINSTR_A { match self.bits { - false => Undefinstr::Value1, - true => Undefinstr::Value2, + false => UNDEFINSTR_A::VALUE1, + true => UNDEFINSTR_A::VALUE2, } } #[doc = "no undefined instruction UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Undefinstr::Value1 + *self == UNDEFINSTR_A::VALUE1 } #[doc = "the processor has attempted to execute an undefined instruction."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Undefinstr::Value2 + *self == UNDEFINSTR_A::VALUE2 } } #[doc = "Field `UNDEFINSTR` writer - Undefined instruction UsageFault"] -pub type UndefinstrW<'a, REG> = crate::BitWriter<'a, REG, Undefinstr>; -impl<'a, REG> UndefinstrW<'a, REG> +pub type UNDEFINSTR_W<'a, REG> = crate::BitWriter<'a, REG, UNDEFINSTR_A>; +impl<'a, REG> UNDEFINSTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no undefined instruction UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Undefinstr::Value1) + self.variant(UNDEFINSTR_A::VALUE1) } #[doc = "the processor has attempted to execute an undefined instruction."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Undefinstr::Value2) + self.variant(UNDEFINSTR_A::VALUE2) } } #[doc = "Invalid state UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Invstate { +pub enum INVSTATE_A { #[doc = "0: no invalid state UsageFault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has attempted to execute an instruction that makes illegal use of the EPSR."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Invstate) -> Self { + fn from(variant: INVSTATE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INVSTATE` reader - Invalid state UsageFault"] -pub type InvstateR = crate::BitReader; -impl InvstateR { +pub type INVSTATE_R = crate::BitReader; +impl INVSTATE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Invstate { + pub const fn variant(&self) -> INVSTATE_A { match self.bits { - false => Invstate::Value1, - true => Invstate::Value2, + false => INVSTATE_A::VALUE1, + true => INVSTATE_A::VALUE2, } } #[doc = "no invalid state UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Invstate::Value1 + *self == INVSTATE_A::VALUE1 } #[doc = "the processor has attempted to execute an instruction that makes illegal use of the EPSR."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Invstate::Value2 + *self == INVSTATE_A::VALUE2 } } #[doc = "Field `INVSTATE` writer - Invalid state UsageFault"] -pub type InvstateW<'a, REG> = crate::BitWriter<'a, REG, Invstate>; -impl<'a, REG> InvstateW<'a, REG> +pub type INVSTATE_W<'a, REG> = crate::BitWriter<'a, REG, INVSTATE_A>; +impl<'a, REG> INVSTATE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no invalid state UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Invstate::Value1) + self.variant(INVSTATE_A::VALUE1) } #[doc = "the processor has attempted to execute an instruction that makes illegal use of the EPSR."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Invstate::Value2) + self.variant(INVSTATE_A::VALUE2) } } #[doc = "Invalid PC load UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Invpc { +pub enum INVPC_A { #[doc = "0: no invalid PC load UsageFault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Invpc) -> Self { + fn from(variant: INVPC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INVPC` reader - Invalid PC load UsageFault"] -pub type InvpcR = crate::BitReader; -impl InvpcR { +pub type INVPC_R = crate::BitReader; +impl INVPC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Invpc { + pub const fn variant(&self) -> INVPC_A { match self.bits { - false => Invpc::Value1, - true => Invpc::Value2, + false => INVPC_A::VALUE1, + true => INVPC_A::VALUE2, } } #[doc = "no invalid PC load UsageFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Invpc::Value1 + *self == INVPC_A::VALUE1 } #[doc = "the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Invpc::Value2 + *self == INVPC_A::VALUE2 } } #[doc = "Field `INVPC` writer - Invalid PC load UsageFault"] -pub type InvpcW<'a, REG> = crate::BitWriter<'a, REG, Invpc>; -impl<'a, REG> InvpcW<'a, REG> +pub type INVPC_W<'a, REG> = crate::BitWriter<'a, REG, INVPC_A>; +impl<'a, REG> INVPC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no invalid PC load UsageFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Invpc::Value1) + self.variant(INVPC_A::VALUE1) } #[doc = "the processor has attempted an illegal load of EXC_RETURN to the PC, as a result of an invalid context, or an invalid EXC_RETURN value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Invpc::Value2) + self.variant(INVPC_A::VALUE2) } } #[doc = "No coprocessor UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Nocp { +pub enum NOCP_A { #[doc = "0: no UsageFault caused by attempting to access a coprocessor"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has attempted to access a coprocessor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Nocp) -> Self { + fn from(variant: NOCP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NOCP` reader - No coprocessor UsageFault"] -pub type NocpR = crate::BitReader; -impl NocpR { +pub type NOCP_R = crate::BitReader; +impl NOCP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nocp { + pub const fn variant(&self) -> NOCP_A { match self.bits { - false => Nocp::Value1, - true => Nocp::Value2, + false => NOCP_A::VALUE1, + true => NOCP_A::VALUE2, } } #[doc = "no UsageFault caused by attempting to access a coprocessor"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nocp::Value1 + *self == NOCP_A::VALUE1 } #[doc = "the processor has attempted to access a coprocessor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nocp::Value2 + *self == NOCP_A::VALUE2 } } #[doc = "Field `NOCP` writer - No coprocessor UsageFault"] -pub type NocpW<'a, REG> = crate::BitWriter<'a, REG, Nocp>; -impl<'a, REG> NocpW<'a, REG> +pub type NOCP_W<'a, REG> = crate::BitWriter<'a, REG, NOCP_A>; +impl<'a, REG> NOCP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no UsageFault caused by attempting to access a coprocessor"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nocp::Value1) + self.variant(NOCP_A::VALUE1) } #[doc = "the processor has attempted to access a coprocessor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nocp::Value2) + self.variant(NOCP_A::VALUE2) } } #[doc = "Unaligned access UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Unaligned { +pub enum UNALIGNED_A { #[doc = "0: no unaligned access fault, or unaligned access trapping not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has made an unaligned memory access."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Unaligned) -> Self { + fn from(variant: UNALIGNED_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UNALIGNED` reader - Unaligned access UsageFault"] -pub type UnalignedR = crate::BitReader; -impl UnalignedR { +pub type UNALIGNED_R = crate::BitReader; +impl UNALIGNED_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Unaligned { + pub const fn variant(&self) -> UNALIGNED_A { match self.bits { - false => Unaligned::Value1, - true => Unaligned::Value2, + false => UNALIGNED_A::VALUE1, + true => UNALIGNED_A::VALUE2, } } #[doc = "no unaligned access fault, or unaligned access trapping not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Unaligned::Value1 + *self == UNALIGNED_A::VALUE1 } #[doc = "the processor has made an unaligned memory access."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Unaligned::Value2 + *self == UNALIGNED_A::VALUE2 } } #[doc = "Field `UNALIGNED` writer - Unaligned access UsageFault"] -pub type UnalignedW<'a, REG> = crate::BitWriter<'a, REG, Unaligned>; -impl<'a, REG> UnalignedW<'a, REG> +pub type UNALIGNED_W<'a, REG> = crate::BitWriter<'a, REG, UNALIGNED_A>; +impl<'a, REG> UNALIGNED_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no unaligned access fault, or unaligned access trapping not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Unaligned::Value1) + self.variant(UNALIGNED_A::VALUE1) } #[doc = "the processor has made an unaligned memory access."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Unaligned::Value2) + self.variant(UNALIGNED_A::VALUE2) } } #[doc = "Divide by zero UsageFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Divbyzero { +pub enum DIVBYZERO_A { #[doc = "0: no divide by zero fault, or divide by zero trapping not enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor has executed an SDIV or UDIV instruction with a divisor of 0"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Divbyzero) -> Self { + fn from(variant: DIVBYZERO_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIVBYZERO` reader - Divide by zero UsageFault"] -pub type DivbyzeroR = crate::BitReader; -impl DivbyzeroR { +pub type DIVBYZERO_R = crate::BitReader; +impl DIVBYZERO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Divbyzero { + pub const fn variant(&self) -> DIVBYZERO_A { match self.bits { - false => Divbyzero::Value1, - true => Divbyzero::Value2, + false => DIVBYZERO_A::VALUE1, + true => DIVBYZERO_A::VALUE2, } } #[doc = "no divide by zero fault, or divide by zero trapping not enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Divbyzero::Value1 + *self == DIVBYZERO_A::VALUE1 } #[doc = "the processor has executed an SDIV or UDIV instruction with a divisor of 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Divbyzero::Value2 + *self == DIVBYZERO_A::VALUE2 } } #[doc = "Field `DIVBYZERO` writer - Divide by zero UsageFault"] -pub type DivbyzeroW<'a, REG> = crate::BitWriter<'a, REG, Divbyzero>; -impl<'a, REG> DivbyzeroW<'a, REG> +pub type DIVBYZERO_W<'a, REG> = crate::BitWriter<'a, REG, DIVBYZERO_A>; +impl<'a, REG> DIVBYZERO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no divide by zero fault, or divide by zero trapping not enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Divbyzero::Value1) + self.variant(DIVBYZERO_A::VALUE1) } #[doc = "the processor has executed an SDIV or UDIV instruction with a divisor of 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Divbyzero::Value2) + self.variant(DIVBYZERO_A::VALUE2) } } impl R { #[doc = "Bit 0 - Instruction access violation flag"] #[inline(always)] - pub fn iaccviol(&self) -> IaccviolR { - IaccviolR::new((self.bits & 1) != 0) + pub fn iaccviol(&self) -> IACCVIOL_R { + IACCVIOL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Data access violation flag"] #[inline(always)] - pub fn daccviol(&self) -> DaccviolR { - DaccviolR::new(((self.bits >> 1) & 1) != 0) + pub fn daccviol(&self) -> DACCVIOL_R { + DACCVIOL_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"] #[inline(always)] - pub fn munstkerr(&self) -> MunstkerrR { - MunstkerrR::new(((self.bits >> 3) & 1) != 0) + pub fn munstkerr(&self) -> MUNSTKERR_R { + MUNSTKERR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MemManage fault on stacking for exception entry"] #[inline(always)] - pub fn mstkerr(&self) -> MstkerrR { - MstkerrR::new(((self.bits >> 4) & 1) != 0) + pub fn mstkerr(&self) -> MSTKERR_R { + MSTKERR_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"] #[inline(always)] - pub fn mlsperr(&self) -> MlsperrR { - MlsperrR::new(((self.bits >> 5) & 1) != 0) + pub fn mlsperr(&self) -> MLSPERR_R { + MLSPERR_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"] #[inline(always)] - pub fn mmarvalid(&self) -> MmarvalidR { - MmarvalidR::new(((self.bits >> 7) & 1) != 0) + pub fn mmarvalid(&self) -> MMARVALID_R { + MMARVALID_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Instruction bus error"] #[inline(always)] - pub fn ibuserr(&self) -> IbuserrR { - IbuserrR::new(((self.bits >> 8) & 1) != 0) + pub fn ibuserr(&self) -> IBUSERR_R { + IBUSERR_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Precise data bus error"] #[inline(always)] - pub fn preciserr(&self) -> PreciserrR { - PreciserrR::new(((self.bits >> 9) & 1) != 0) + pub fn preciserr(&self) -> PRECISERR_R { + PRECISERR_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Imprecise data bus error"] #[inline(always)] - pub fn impreciserr(&self) -> ImpreciserrR { - ImpreciserrR::new(((self.bits >> 10) & 1) != 0) + pub fn impreciserr(&self) -> IMPRECISERR_R { + IMPRECISERR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - BusFault on unstacking for a return from exception"] #[inline(always)] - pub fn unstkerr(&self) -> UnstkerrR { - UnstkerrR::new(((self.bits >> 11) & 1) != 0) + pub fn unstkerr(&self) -> UNSTKERR_R { + UNSTKERR_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BusFault on stacking for exception entry"] #[inline(always)] - pub fn stkerr(&self) -> StkerrR { - StkerrR::new(((self.bits >> 12) & 1) != 0) + pub fn stkerr(&self) -> STKERR_R { + STKERR_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - BusFault during floating point lazy state preservation"] #[inline(always)] - pub fn lsperr(&self) -> LsperrR { - LsperrR::new(((self.bits >> 13) & 1) != 0) + pub fn lsperr(&self) -> LSPERR_R { + LSPERR_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"] #[inline(always)] - pub fn bfarvalid(&self) -> BfarvalidR { - BfarvalidR::new(((self.bits >> 15) & 1) != 0) + pub fn bfarvalid(&self) -> BFARVALID_R { + BFARVALID_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Undefined instruction UsageFault"] #[inline(always)] - pub fn undefinstr(&self) -> UndefinstrR { - UndefinstrR::new(((self.bits >> 16) & 1) != 0) + pub fn undefinstr(&self) -> UNDEFINSTR_R { + UNDEFINSTR_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Invalid state UsageFault"] #[inline(always)] - pub fn invstate(&self) -> InvstateR { - InvstateR::new(((self.bits >> 17) & 1) != 0) + pub fn invstate(&self) -> INVSTATE_R { + INVSTATE_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Invalid PC load UsageFault"] #[inline(always)] - pub fn invpc(&self) -> InvpcR { - InvpcR::new(((self.bits >> 18) & 1) != 0) + pub fn invpc(&self) -> INVPC_R { + INVPC_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - No coprocessor UsageFault"] #[inline(always)] - pub fn nocp(&self) -> NocpR { - NocpR::new(((self.bits >> 19) & 1) != 0) + pub fn nocp(&self) -> NOCP_R { + NOCP_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 24 - Unaligned access UsageFault"] #[inline(always)] - pub fn unaligned(&self) -> UnalignedR { - UnalignedR::new(((self.bits >> 24) & 1) != 0) + pub fn unaligned(&self) -> UNALIGNED_R { + UNALIGNED_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Divide by zero UsageFault"] #[inline(always)] - pub fn divbyzero(&self) -> DivbyzeroR { - DivbyzeroR::new(((self.bits >> 25) & 1) != 0) + pub fn divbyzero(&self) -> DIVBYZERO_R { + DIVBYZERO_R::new(((self.bits >> 25) & 1) != 0) } } impl W { #[doc = "Bit 0 - Instruction access violation flag"] #[inline(always)] #[must_use] - pub fn iaccviol(&mut self) -> IaccviolW { - IaccviolW::new(self, 0) + pub fn iaccviol(&mut self) -> IACCVIOL_W { + IACCVIOL_W::new(self, 0) } #[doc = "Bit 1 - Data access violation flag"] #[inline(always)] #[must_use] - pub fn daccviol(&mut self) -> DaccviolW { - DaccviolW::new(self, 1) + pub fn daccviol(&mut self) -> DACCVIOL_W { + DACCVIOL_W::new(self, 1) } #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"] #[inline(always)] #[must_use] - pub fn munstkerr(&mut self) -> MunstkerrW { - MunstkerrW::new(self, 3) + pub fn munstkerr(&mut self) -> MUNSTKERR_W { + MUNSTKERR_W::new(self, 3) } #[doc = "Bit 4 - MemManage fault on stacking for exception entry"] #[inline(always)] #[must_use] - pub fn mstkerr(&mut self) -> MstkerrW { - MstkerrW::new(self, 4) + pub fn mstkerr(&mut self) -> MSTKERR_W { + MSTKERR_W::new(self, 4) } #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"] #[inline(always)] #[must_use] - pub fn mlsperr(&mut self) -> MlsperrW { - MlsperrW::new(self, 5) + pub fn mlsperr(&mut self) -> MLSPERR_W { + MLSPERR_W::new(self, 5) } #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"] #[inline(always)] #[must_use] - pub fn mmarvalid(&mut self) -> MmarvalidW { - MmarvalidW::new(self, 7) + pub fn mmarvalid(&mut self) -> MMARVALID_W { + MMARVALID_W::new(self, 7) } #[doc = "Bit 8 - Instruction bus error"] #[inline(always)] #[must_use] - pub fn ibuserr(&mut self) -> IbuserrW { - IbuserrW::new(self, 8) + pub fn ibuserr(&mut self) -> IBUSERR_W { + IBUSERR_W::new(self, 8) } #[doc = "Bit 9 - Precise data bus error"] #[inline(always)] #[must_use] - pub fn preciserr(&mut self) -> PreciserrW { - PreciserrW::new(self, 9) + pub fn preciserr(&mut self) -> PRECISERR_W { + PRECISERR_W::new(self, 9) } #[doc = "Bit 10 - Imprecise data bus error"] #[inline(always)] #[must_use] - pub fn impreciserr(&mut self) -> ImpreciserrW { - ImpreciserrW::new(self, 10) + pub fn impreciserr(&mut self) -> IMPRECISERR_W { + IMPRECISERR_W::new(self, 10) } #[doc = "Bit 11 - BusFault on unstacking for a return from exception"] #[inline(always)] #[must_use] - pub fn unstkerr(&mut self) -> UnstkerrW { - UnstkerrW::new(self, 11) + pub fn unstkerr(&mut self) -> UNSTKERR_W { + UNSTKERR_W::new(self, 11) } #[doc = "Bit 12 - BusFault on stacking for exception entry"] #[inline(always)] #[must_use] - pub fn stkerr(&mut self) -> StkerrW { - StkerrW::new(self, 12) + pub fn stkerr(&mut self) -> STKERR_W { + STKERR_W::new(self, 12) } #[doc = "Bit 13 - BusFault during floating point lazy state preservation"] #[inline(always)] #[must_use] - pub fn lsperr(&mut self) -> LsperrW { - LsperrW::new(self, 13) + pub fn lsperr(&mut self) -> LSPERR_W { + LSPERR_W::new(self, 13) } #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"] #[inline(always)] #[must_use] - pub fn bfarvalid(&mut self) -> BfarvalidW { - BfarvalidW::new(self, 15) + pub fn bfarvalid(&mut self) -> BFARVALID_W { + BFARVALID_W::new(self, 15) } #[doc = "Bit 16 - Undefined instruction UsageFault"] #[inline(always)] #[must_use] - pub fn undefinstr(&mut self) -> UndefinstrW { - UndefinstrW::new(self, 16) + pub fn undefinstr(&mut self) -> UNDEFINSTR_W { + UNDEFINSTR_W::new(self, 16) } #[doc = "Bit 17 - Invalid state UsageFault"] #[inline(always)] #[must_use] - pub fn invstate(&mut self) -> InvstateW { - InvstateW::new(self, 17) + pub fn invstate(&mut self) -> INVSTATE_W { + INVSTATE_W::new(self, 17) } #[doc = "Bit 18 - Invalid PC load UsageFault"] #[inline(always)] #[must_use] - pub fn invpc(&mut self) -> InvpcW { - InvpcW::new(self, 18) + pub fn invpc(&mut self) -> INVPC_W { + INVPC_W::new(self, 18) } #[doc = "Bit 19 - No coprocessor UsageFault"] #[inline(always)] #[must_use] - pub fn nocp(&mut self) -> NocpW { - NocpW::new(self, 19) + pub fn nocp(&mut self) -> NOCP_W { + NOCP_W::new(self, 19) } #[doc = "Bit 24 - Unaligned access UsageFault"] #[inline(always)] #[must_use] - pub fn unaligned(&mut self) -> UnalignedW { - UnalignedW::new(self, 24) + pub fn unaligned(&mut self) -> UNALIGNED_W { + UNALIGNED_W::new(self, 24) } #[doc = "Bit 25 - Divide by zero UsageFault"] #[inline(always)] #[must_use] - pub fn divbyzero(&mut self) -> DivbyzeroW { - DivbyzeroW::new(self, 25) + pub fn divbyzero(&mut self) -> DIVBYZERO_W { + DIVBYZERO_W::new(self, 25) } } #[doc = "Configurable Fault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CfsrSpec; -impl crate::RegisterSpec for CfsrSpec { +pub struct CFSR_SPEC; +impl crate::RegisterSpec for CFSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cfsr::R`](R) reader structure"] -impl crate::Readable for CfsrSpec {} +impl crate::Readable for CFSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`cfsr::W`](W) writer structure"] -impl crate::Writable for CfsrSpec { +impl crate::Writable for CFSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CFSR to value 0"] -impl crate::Resettable for CfsrSpec { +impl crate::Resettable for CFSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/cpacr.rs b/src/ppb/cpacr.rs index 843f2b24..dae19663 100644 --- a/src/ppb/cpacr.rs +++ b/src/ppb/cpacr.rs @@ -1,60 +1,60 @@ #[doc = "Register `CPACR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CPACR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Access privileges for coprocessor 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cp10 { +pub enum CP10_A { #[doc = "0: Access denied. Any attempted access generates a NOCP UsageFault."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Privileged access only. An unprivileged access generates a NOCP fault."] - Value2 = 1, + VALUE2 = 1, #[doc = "3: Full access."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cp10) -> Self { + fn from(variant: CP10_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cp10 { +impl crate::FieldSpec for CP10_A { type Ux = u8; } -impl crate::IsEnum for Cp10 {} +impl crate::IsEnum for CP10_A {} #[doc = "Field `CP10` reader - Access privileges for coprocessor 10"] -pub type Cp10R = crate::FieldReader; -impl Cp10R { +pub type CP10_R = crate::FieldReader; +impl CP10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cp10::Value1), - 1 => Some(Cp10::Value2), - 3 => Some(Cp10::Value4), + 0 => Some(CP10_A::VALUE1), + 1 => Some(CP10_A::VALUE2), + 3 => Some(CP10_A::VALUE4), _ => None, } } #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cp10::Value1 + *self == CP10_A::VALUE1 } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cp10::Value2 + *self == CP10_A::VALUE2 } #[doc = "Full access."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cp10::Value4 + *self == CP10_A::VALUE4 } } #[doc = "Field `CP10` writer - Access privileges for coprocessor 10"] -pub type Cp10W<'a, REG> = crate::FieldWriter<'a, REG, 2, Cp10>; -impl<'a, REG> Cp10W<'a, REG> +pub type CP10_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CP10_A>; +impl<'a, REG> CP10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,72 +62,72 @@ where #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cp10::Value1) + self.variant(CP10_A::VALUE1) } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cp10::Value2) + self.variant(CP10_A::VALUE2) } #[doc = "Full access."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cp10::Value4) + self.variant(CP10_A::VALUE4) } } #[doc = "Access privileges for coprocessor 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cp11 { +pub enum CP11_A { #[doc = "0: Access denied. Any attempted access generates a NOCP UsageFault."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Privileged access only. An unprivileged access generates a NOCP fault."] - Value2 = 1, + VALUE2 = 1, #[doc = "3: Full access."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cp11) -> Self { + fn from(variant: CP11_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cp11 { +impl crate::FieldSpec for CP11_A { type Ux = u8; } -impl crate::IsEnum for Cp11 {} +impl crate::IsEnum for CP11_A {} #[doc = "Field `CP11` reader - Access privileges for coprocessor 11"] -pub type Cp11R = crate::FieldReader; -impl Cp11R { +pub type CP11_R = crate::FieldReader; +impl CP11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cp11::Value1), - 1 => Some(Cp11::Value2), - 3 => Some(Cp11::Value4), + 0 => Some(CP11_A::VALUE1), + 1 => Some(CP11_A::VALUE2), + 3 => Some(CP11_A::VALUE4), _ => None, } } #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cp11::Value1 + *self == CP11_A::VALUE1 } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cp11::Value2 + *self == CP11_A::VALUE2 } #[doc = "Full access."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cp11::Value4 + *self == CP11_A::VALUE4 } } #[doc = "Field `CP11` writer - Access privileges for coprocessor 11"] -pub type Cp11W<'a, REG> = crate::FieldWriter<'a, REG, 2, Cp11>; -impl<'a, REG> Cp11W<'a, REG> +pub type CP11_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CP11_A>; +impl<'a, REG> CP11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -135,59 +135,59 @@ where #[doc = "Access denied. Any attempted access generates a NOCP UsageFault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cp11::Value1) + self.variant(CP11_A::VALUE1) } #[doc = "Privileged access only. An unprivileged access generates a NOCP fault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cp11::Value2) + self.variant(CP11_A::VALUE2) } #[doc = "Full access."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cp11::Value4) + self.variant(CP11_A::VALUE4) } } impl R { #[doc = "Bits 20:21 - Access privileges for coprocessor 10"] #[inline(always)] - pub fn cp10(&self) -> Cp10R { - Cp10R::new(((self.bits >> 20) & 3) as u8) + pub fn cp10(&self) -> CP10_R { + CP10_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bits 22:23 - Access privileges for coprocessor 11"] #[inline(always)] - pub fn cp11(&self) -> Cp11R { - Cp11R::new(((self.bits >> 22) & 3) as u8) + pub fn cp11(&self) -> CP11_R { + CP11_R::new(((self.bits >> 22) & 3) as u8) } } impl W { #[doc = "Bits 20:21 - Access privileges for coprocessor 10"] #[inline(always)] #[must_use] - pub fn cp10(&mut self) -> Cp10W { - Cp10W::new(self, 20) + pub fn cp10(&mut self) -> CP10_W { + CP10_W::new(self, 20) } #[doc = "Bits 22:23 - Access privileges for coprocessor 11"] #[inline(always)] #[must_use] - pub fn cp11(&mut self) -> Cp11W { - Cp11W::new(self, 22) + pub fn cp11(&mut self) -> CP11_W { + CP11_W::new(self, 22) } } #[doc = "Coprocessor Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CpacrSpec; -impl crate::RegisterSpec for CpacrSpec { +pub struct CPACR_SPEC; +impl crate::RegisterSpec for CPACR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cpacr::R`](R) reader structure"] -impl crate::Readable for CpacrSpec {} +impl crate::Readable for CPACR_SPEC {} #[doc = "`write(|w| ..)` method takes [`cpacr::W`](W) writer structure"] -impl crate::Writable for CpacrSpec { +impl crate::Writable for CPACR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CPACR to value 0"] -impl crate::Resettable for CpacrSpec { +impl crate::Resettable for CPACR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/cpuid.rs b/src/ppb/cpuid.rs index 71ecf927..604fff46 100644 --- a/src/ppb/cpuid.rs +++ b/src/ppb/cpuid.rs @@ -1,178 +1,178 @@ #[doc = "Register `CPUID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Revision number\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Revision { +pub enum REVISION_A { #[doc = "1: Patch 1"] - Value1 = 1, + VALUE1 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Revision) -> Self { + fn from(variant: REVISION_A) -> Self { variant as _ } } -impl crate::FieldSpec for Revision { +impl crate::FieldSpec for REVISION_A { type Ux = u8; } -impl crate::IsEnum for Revision {} +impl crate::IsEnum for REVISION_A {} #[doc = "Field `Revision` reader - Revision number"] -pub type RevisionR = crate::FieldReader; -impl RevisionR { +pub type REVISION_R = crate::FieldReader; +impl REVISION_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(Revision::Value1), + 1 => Some(REVISION_A::VALUE1), _ => None, } } #[doc = "Patch 1"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Revision::Value1 + *self == REVISION_A::VALUE1 } } #[doc = "Part number of the processor\n\nValue on reset: 3108"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum PartNo { +pub enum PART_NO_A { #[doc = "3108: Cortex-M4"] - Value1 = 3108, + VALUE1 = 3108, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: PartNo) -> Self { + fn from(variant: PART_NO_A) -> Self { variant as _ } } -impl crate::FieldSpec for PartNo { +impl crate::FieldSpec for PART_NO_A { type Ux = u16; } -impl crate::IsEnum for PartNo {} +impl crate::IsEnum for PART_NO_A {} #[doc = "Field `PartNo` reader - Part number of the processor"] -pub type PartNoR = crate::FieldReader; -impl PartNoR { +pub type PART_NO_R = crate::FieldReader; +impl PART_NO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3108 => Some(PartNo::Value1), + 3108 => Some(PART_NO_A::VALUE1), _ => None, } } #[doc = "Cortex-M4"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PartNo::Value1 + *self == PART_NO_A::VALUE1 } } #[doc = "Field `Constant` reader - Reads as 0xF"] -pub type ConstantR = crate::FieldReader; +pub type CONSTANT_R = crate::FieldReader; #[doc = "Variant number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Variant { +pub enum VARIANT_A { #[doc = "0: Revision 0"] - Value1 = 0, + VALUE1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Variant) -> Self { + fn from(variant: VARIANT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Variant { +impl crate::FieldSpec for VARIANT_A { type Ux = u8; } -impl crate::IsEnum for Variant {} +impl crate::IsEnum for VARIANT_A {} #[doc = "Field `Variant` reader - Variant number"] -pub type VariantR = crate::FieldReader; -impl VariantR { +pub type VARIANT_R = crate::FieldReader; +impl VARIANT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Variant::Value1), + 0 => Some(VARIANT_A::VALUE1), _ => None, } } #[doc = "Revision 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Variant::Value1 + *self == VARIANT_A::VALUE1 } } #[doc = "Implementer code\n\nValue on reset: 65"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Implementer { +pub enum IMPLEMENTER_A { #[doc = "65: ARM"] - Value1 = 65, + VALUE1 = 65, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Implementer) -> Self { + fn from(variant: IMPLEMENTER_A) -> Self { variant as _ } } -impl crate::FieldSpec for Implementer { +impl crate::FieldSpec for IMPLEMENTER_A { type Ux = u8; } -impl crate::IsEnum for Implementer {} +impl crate::IsEnum for IMPLEMENTER_A {} #[doc = "Field `Implementer` reader - Implementer code"] -pub type ImplementerR = crate::FieldReader; -impl ImplementerR { +pub type IMPLEMENTER_R = crate::FieldReader; +impl IMPLEMENTER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 65 => Some(Implementer::Value1), + 65 => Some(IMPLEMENTER_A::VALUE1), _ => None, } } #[doc = "ARM"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Implementer::Value1 + *self == IMPLEMENTER_A::VALUE1 } } impl R { #[doc = "Bits 0:3 - Revision number"] #[inline(always)] - pub fn revision(&self) -> RevisionR { - RevisionR::new((self.bits & 0x0f) as u8) + pub fn revision(&self) -> REVISION_R { + REVISION_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:15 - Part number of the processor"] #[inline(always)] - pub fn part_no(&self) -> PartNoR { - PartNoR::new(((self.bits >> 4) & 0x0fff) as u16) + pub fn part_no(&self) -> PART_NO_R { + PART_NO_R::new(((self.bits >> 4) & 0x0fff) as u16) } #[doc = "Bits 16:19 - Reads as 0xF"] #[inline(always)] - pub fn constant(&self) -> ConstantR { - ConstantR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn constant(&self) -> CONSTANT_R { + CONSTANT_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Variant number"] #[inline(always)] - pub fn variant(&self) -> VariantR { - VariantR::new(((self.bits >> 20) & 0x0f) as u8) + pub fn variant(&self) -> VARIANT_R { + VARIANT_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:31 - Implementer code"] #[inline(always)] - pub fn implementer(&self) -> ImplementerR { - ImplementerR::new(((self.bits >> 24) & 0xff) as u8) + pub fn implementer(&self) -> IMPLEMENTER_R { + IMPLEMENTER_R::new(((self.bits >> 24) & 0xff) as u8) } } #[doc = "CPUID Base Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CpuidSpec; -impl crate::RegisterSpec for CpuidSpec { +pub struct CPUID_SPEC; +impl crate::RegisterSpec for CPUID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cpuid::R`](R) reader structure"] -impl crate::Readable for CpuidSpec {} +impl crate::Readable for CPUID_SPEC {} #[doc = "`reset()` method sets CPUID to value 0x410f_c241"] -impl crate::Resettable for CpuidSpec { +impl crate::Resettable for CPUID_SPEC { const RESET_VALUE: u32 = 0x410f_c241; } diff --git a/src/ppb/fpcar.rs b/src/ppb/fpcar.rs index f44020d2..1a3a8de5 100644 --- a/src/ppb/fpcar.rs +++ b/src/ppb/fpcar.rs @@ -1,40 +1,40 @@ #[doc = "Register `FPCAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address"] -pub type AddressR = crate::FieldReader; +pub type ADDRESS_R = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address"] -pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; +pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 29, u32>; impl R { #[doc = "Bits 3:31 - Address"] #[inline(always)] - pub fn address(&self) -> AddressR { - AddressR::new((self.bits >> 3) & 0x1fff_ffff) + pub fn address(&self) -> ADDRESS_R { + ADDRESS_R::new((self.bits >> 3) & 0x1fff_ffff) } } impl W { #[doc = "Bits 3:31 - Address"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> AddressW { - AddressW::new(self, 3) + pub fn address(&mut self) -> ADDRESS_W { + ADDRESS_W::new(self, 3) } } #[doc = "Floating-point Context Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpcar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpcar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpcarSpec; -impl crate::RegisterSpec for FpcarSpec { +pub struct FPCAR_SPEC; +impl crate::RegisterSpec for FPCAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpcar::R`](R) reader structure"] -impl crate::Readable for FpcarSpec {} +impl crate::Readable for FPCAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpcar::W`](W) writer structure"] -impl crate::Writable for FpcarSpec { +impl crate::Writable for FPCAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCAR to value 0"] -impl crate::Resettable for FpcarSpec { +impl crate::Resettable for FPCAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/fpccr.rs b/src/ppb/fpccr.rs index 397bbb8c..03190909 100644 --- a/src/ppb/fpccr.rs +++ b/src/ppb/fpccr.rs @@ -1,601 +1,601 @@ #[doc = "Register `FPCCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPCCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Lazy State Preservation Active\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lspact { +pub enum LSPACT_A { #[doc = "0: Lazy state preservation is not active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lspact) -> Self { + fn from(variant: LSPACT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LSPACT` reader - Lazy State Preservation Active"] -pub type LspactR = crate::BitReader; -impl LspactR { +pub type LSPACT_R = crate::BitReader; +impl LSPACT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lspact { + pub const fn variant(&self) -> LSPACT_A { match self.bits { - false => Lspact::Value1, - true => Lspact::Value2, + false => LSPACT_A::VALUE1, + true => LSPACT_A::VALUE2, } } #[doc = "Lazy state preservation is not active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lspact::Value1 + *self == LSPACT_A::VALUE1 } #[doc = "Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lspact::Value2 + *self == LSPACT_A::VALUE2 } } #[doc = "Field `LSPACT` writer - Lazy State Preservation Active"] -pub type LspactW<'a, REG> = crate::BitWriter<'a, REG, Lspact>; -impl<'a, REG> LspactW<'a, REG> +pub type LSPACT_W<'a, REG> = crate::BitWriter<'a, REG, LSPACT_A>; +impl<'a, REG> LSPACT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Lazy state preservation is not active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lspact::Value1) + self.variant(LSPACT_A::VALUE1) } #[doc = "Lazy state preservation is active. floating-point stack frame has been allocated but saving state to it has been deferred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lspact::Value2) + self.variant(LSPACT_A::VALUE2) } } #[doc = "User allocated Stack Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum User { +pub enum USER_A { #[doc = "0: Privilege level was not user when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Privilege level was user when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: User) -> Self { + fn from(variant: USER_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USER` reader - User allocated Stack Frame"] -pub type UserR = crate::BitReader; -impl UserR { +pub type USER_R = crate::BitReader; +impl USER_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> User { + pub const fn variant(&self) -> USER_A { match self.bits { - false => User::Value1, - true => User::Value2, + false => USER_A::VALUE1, + true => USER_A::VALUE2, } } #[doc = "Privilege level was not user when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == User::Value1 + *self == USER_A::VALUE1 } #[doc = "Privilege level was user when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == User::Value2 + *self == USER_A::VALUE2 } } #[doc = "Field `USER` writer - User allocated Stack Frame"] -pub type UserW<'a, REG> = crate::BitWriter<'a, REG, User>; -impl<'a, REG> UserW<'a, REG> +pub type USER_W<'a, REG> = crate::BitWriter<'a, REG, USER_A>; +impl<'a, REG> USER_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Privilege level was not user when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(User::Value1) + self.variant(USER_A::VALUE1) } #[doc = "Privilege level was user when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(User::Value2) + self.variant(USER_A::VALUE2) } } #[doc = "Thread Mode allocated Stack Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Thread { +pub enum THREAD_A { #[doc = "0: Mode was not Thread Mode when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Mode was Thread Mode when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Thread) -> Self { + fn from(variant: THREAD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `THREAD` reader - Thread Mode allocated Stack Frame"] -pub type ThreadR = crate::BitReader; -impl ThreadR { +pub type THREAD_R = crate::BitReader; +impl THREAD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Thread { + pub const fn variant(&self) -> THREAD_A { match self.bits { - false => Thread::Value1, - true => Thread::Value2, + false => THREAD_A::VALUE1, + true => THREAD_A::VALUE2, } } #[doc = "Mode was not Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Thread::Value1 + *self == THREAD_A::VALUE1 } #[doc = "Mode was Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Thread::Value2 + *self == THREAD_A::VALUE2 } } #[doc = "Field `THREAD` writer - Thread Mode allocated Stack Frame"] -pub type ThreadW<'a, REG> = crate::BitWriter<'a, REG, Thread>; -impl<'a, REG> ThreadW<'a, REG> +pub type THREAD_W<'a, REG> = crate::BitWriter<'a, REG, THREAD_A>; +impl<'a, REG> THREAD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Mode was not Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Thread::Value1) + self.variant(THREAD_A::VALUE1) } #[doc = "Mode was Thread Mode when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Thread::Value2) + self.variant(THREAD_A::VALUE2) } } #[doc = "HardFault Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hfrdy { +pub enum HFRDY_A { #[doc = "0: Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hfrdy) -> Self { + fn from(variant: HFRDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HFRDY` reader - HardFault Ready"] -pub type HfrdyR = crate::BitReader; -impl HfrdyR { +pub type HFRDY_R = crate::BitReader; +impl HFRDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hfrdy { + pub const fn variant(&self) -> HFRDY_A { match self.bits { - false => Hfrdy::Value1, - true => Hfrdy::Value2, + false => HFRDY_A::VALUE1, + true => HFRDY_A::VALUE2, } } #[doc = "Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hfrdy::Value1 + *self == HFRDY_A::VALUE1 } #[doc = "Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hfrdy::Value2 + *self == HFRDY_A::VALUE2 } } #[doc = "Field `HFRDY` writer - HardFault Ready"] -pub type HfrdyW<'a, REG> = crate::BitWriter<'a, REG, Hfrdy>; -impl<'a, REG> HfrdyW<'a, REG> +pub type HFRDY_W<'a, REG> = crate::BitWriter<'a, REG, HFRDY_A>; +impl<'a, REG> HFRDY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Priority did not permit setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hfrdy::Value1) + self.variant(HFRDY_A::VALUE1) } #[doc = "Priority permitted setting the HardFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hfrdy::Value2) + self.variant(HFRDY_A::VALUE2) } } #[doc = "MemManage Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mmrdy { +pub enum MMRDY_A { #[doc = "0: MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mmrdy) -> Self { + fn from(variant: MMRDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MMRDY` reader - MemManage Ready"] -pub type MmrdyR = crate::BitReader; -impl MmrdyR { +pub type MMRDY_R = crate::BitReader; +impl MMRDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mmrdy { + pub const fn variant(&self) -> MMRDY_A { match self.bits { - false => Mmrdy::Value1, - true => Mmrdy::Value2, + false => MMRDY_A::VALUE1, + true => MMRDY_A::VALUE2, } } #[doc = "MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mmrdy::Value1 + *self == MMRDY_A::VALUE1 } #[doc = "MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mmrdy::Value2 + *self == MMRDY_A::VALUE2 } } #[doc = "Field `MMRDY` writer - MemManage Ready"] -pub type MmrdyW<'a, REG> = crate::BitWriter<'a, REG, Mmrdy>; -impl<'a, REG> MmrdyW<'a, REG> +pub type MMRDY_W<'a, REG> = crate::BitWriter<'a, REG, MMRDY_A>; +impl<'a, REG> MMRDY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MemManage is disabled or priority did not permit setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mmrdy::Value1) + self.variant(MMRDY_A::VALUE1) } #[doc = "MemManage is enabled and priority permitted setting the MemManage handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mmrdy::Value2) + self.variant(MMRDY_A::VALUE2) } } #[doc = "BusFault Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfrdy { +pub enum BFRDY_A { #[doc = "0: BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfrdy) -> Self { + fn from(variant: BFRDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFRDY` reader - BusFault Ready"] -pub type BfrdyR = crate::BitReader; -impl BfrdyR { +pub type BFRDY_R = crate::BitReader; +impl BFRDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfrdy { + pub const fn variant(&self) -> BFRDY_A { match self.bits { - false => Bfrdy::Value1, - true => Bfrdy::Value2, + false => BFRDY_A::VALUE1, + true => BFRDY_A::VALUE2, } } #[doc = "BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfrdy::Value1 + *self == BFRDY_A::VALUE1 } #[doc = "BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfrdy::Value2 + *self == BFRDY_A::VALUE2 } } #[doc = "Field `BFRDY` writer - BusFault Ready"] -pub type BfrdyW<'a, REG> = crate::BitWriter<'a, REG, Bfrdy>; -impl<'a, REG> BfrdyW<'a, REG> +pub type BFRDY_W<'a, REG> = crate::BitWriter<'a, REG, BFRDY_A>; +impl<'a, REG> BFRDY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "BusFault is disabled or priority did not permit setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfrdy::Value1) + self.variant(BFRDY_A::VALUE1) } #[doc = "BusFault is enabled and priority permitted setting the BusFault handler to the pending state when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfrdy::Value2) + self.variant(BFRDY_A::VALUE2) } } #[doc = "Monitor Ready\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Monrdy { +pub enum MONRDY_A { #[doc = "0: Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Monrdy) -> Self { + fn from(variant: MONRDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MONRDY` reader - Monitor Ready"] -pub type MonrdyR = crate::BitReader; -impl MonrdyR { +pub type MONRDY_R = crate::BitReader; +impl MONRDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Monrdy { + pub const fn variant(&self) -> MONRDY_A { match self.bits { - false => Monrdy::Value1, - true => Monrdy::Value2, + false => MONRDY_A::VALUE1, + true => MONRDY_A::VALUE2, } } #[doc = "Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Monrdy::Value1 + *self == MONRDY_A::VALUE1 } #[doc = "Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Monrdy::Value2 + *self == MONRDY_A::VALUE2 } } #[doc = "Field `MONRDY` writer - Monitor Ready"] -pub type MonrdyW<'a, REG> = crate::BitWriter<'a, REG, Monrdy>; -impl<'a, REG> MonrdyW<'a, REG> +pub type MONRDY_W<'a, REG> = crate::BitWriter<'a, REG, MONRDY_A>; +impl<'a, REG> MONRDY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Debug Monitor is disabled or priority did not permit setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Monrdy::Value1) + self.variant(MONRDY_A::VALUE1) } #[doc = "Debug Monitor is enabled and priority permits setting MON_PEND when the floating-point stack frame was allocated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Monrdy::Value2) + self.variant(MONRDY_A::VALUE2) } } #[doc = "Lazy State Preservation Enabled\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lspen { +pub enum LSPEN_A { #[doc = "0: Disable automatic lazy state preservation for floating-point context."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable automatic lazy state preservation for floating-point context."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lspen) -> Self { + fn from(variant: LSPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LSPEN` reader - Lazy State Preservation Enabled"] -pub type LspenR = crate::BitReader; -impl LspenR { +pub type LSPEN_R = crate::BitReader; +impl LSPEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lspen { + pub const fn variant(&self) -> LSPEN_A { match self.bits { - false => Lspen::Value1, - true => Lspen::Value2, + false => LSPEN_A::VALUE1, + true => LSPEN_A::VALUE2, } } #[doc = "Disable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lspen::Value1 + *self == LSPEN_A::VALUE1 } #[doc = "Enable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lspen::Value2 + *self == LSPEN_A::VALUE2 } } #[doc = "Field `LSPEN` writer - Lazy State Preservation Enabled"] -pub type LspenW<'a, REG> = crate::BitWriter<'a, REG, Lspen>; -impl<'a, REG> LspenW<'a, REG> +pub type LSPEN_W<'a, REG> = crate::BitWriter<'a, REG, LSPEN_A>; +impl<'a, REG> LSPEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lspen::Value1) + self.variant(LSPEN_A::VALUE1) } #[doc = "Enable automatic lazy state preservation for floating-point context."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lspen::Value2) + self.variant(LSPEN_A::VALUE2) } } #[doc = "Automatic State Preservation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aspen { +pub enum ASPEN_A { #[doc = "0: Disable CONTROL setting on execution of a floating-point instruction."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable CONTROL setting on execution of a floating-point instruction."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aspen) -> Self { + fn from(variant: ASPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASPEN` reader - Automatic State Preservation"] -pub type AspenR = crate::BitReader; -impl AspenR { +pub type ASPEN_R = crate::BitReader; +impl ASPEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aspen { + pub const fn variant(&self) -> ASPEN_A { match self.bits { - false => Aspen::Value1, - true => Aspen::Value2, + false => ASPEN_A::VALUE1, + true => ASPEN_A::VALUE2, } } #[doc = "Disable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aspen::Value1 + *self == ASPEN_A::VALUE1 } #[doc = "Enable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aspen::Value2 + *self == ASPEN_A::VALUE2 } } #[doc = "Field `ASPEN` writer - Automatic State Preservation"] -pub type AspenW<'a, REG> = crate::BitWriter<'a, REG, Aspen>; -impl<'a, REG> AspenW<'a, REG> +pub type ASPEN_W<'a, REG> = crate::BitWriter<'a, REG, ASPEN_A>; +impl<'a, REG> ASPEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aspen::Value1) + self.variant(ASPEN_A::VALUE1) } #[doc = "Enable CONTROL setting on execution of a floating-point instruction."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aspen::Value2) + self.variant(ASPEN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Lazy State Preservation Active"] #[inline(always)] - pub fn lspact(&self) -> LspactR { - LspactR::new((self.bits & 1) != 0) + pub fn lspact(&self) -> LSPACT_R { + LSPACT_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - User allocated Stack Frame"] #[inline(always)] - pub fn user(&self) -> UserR { - UserR::new(((self.bits >> 1) & 1) != 0) + pub fn user(&self) -> USER_R { + USER_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Thread Mode allocated Stack Frame"] #[inline(always)] - pub fn thread(&self) -> ThreadR { - ThreadR::new(((self.bits >> 3) & 1) != 0) + pub fn thread(&self) -> THREAD_R { + THREAD_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - HardFault Ready"] #[inline(always)] - pub fn hfrdy(&self) -> HfrdyR { - HfrdyR::new(((self.bits >> 4) & 1) != 0) + pub fn hfrdy(&self) -> HFRDY_R { + HFRDY_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - MemManage Ready"] #[inline(always)] - pub fn mmrdy(&self) -> MmrdyR { - MmrdyR::new(((self.bits >> 5) & 1) != 0) + pub fn mmrdy(&self) -> MMRDY_R { + MMRDY_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - BusFault Ready"] #[inline(always)] - pub fn bfrdy(&self) -> BfrdyR { - BfrdyR::new(((self.bits >> 6) & 1) != 0) + pub fn bfrdy(&self) -> BFRDY_R { + BFRDY_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Monitor Ready"] #[inline(always)] - pub fn monrdy(&self) -> MonrdyR { - MonrdyR::new(((self.bits >> 8) & 1) != 0) + pub fn monrdy(&self) -> MONRDY_R { + MONRDY_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 30 - Lazy State Preservation Enabled"] #[inline(always)] - pub fn lspen(&self) -> LspenR { - LspenR::new(((self.bits >> 30) & 1) != 0) + pub fn lspen(&self) -> LSPEN_R { + LSPEN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Automatic State Preservation"] #[inline(always)] - pub fn aspen(&self) -> AspenR { - AspenR::new(((self.bits >> 31) & 1) != 0) + pub fn aspen(&self) -> ASPEN_R { + ASPEN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Lazy State Preservation Active"] #[inline(always)] #[must_use] - pub fn lspact(&mut self) -> LspactW { - LspactW::new(self, 0) + pub fn lspact(&mut self) -> LSPACT_W { + LSPACT_W::new(self, 0) } #[doc = "Bit 1 - User allocated Stack Frame"] #[inline(always)] #[must_use] - pub fn user(&mut self) -> UserW { - UserW::new(self, 1) + pub fn user(&mut self) -> USER_W { + USER_W::new(self, 1) } #[doc = "Bit 3 - Thread Mode allocated Stack Frame"] #[inline(always)] #[must_use] - pub fn thread(&mut self) -> ThreadW { - ThreadW::new(self, 3) + pub fn thread(&mut self) -> THREAD_W { + THREAD_W::new(self, 3) } #[doc = "Bit 4 - HardFault Ready"] #[inline(always)] #[must_use] - pub fn hfrdy(&mut self) -> HfrdyW { - HfrdyW::new(self, 4) + pub fn hfrdy(&mut self) -> HFRDY_W { + HFRDY_W::new(self, 4) } #[doc = "Bit 5 - MemManage Ready"] #[inline(always)] #[must_use] - pub fn mmrdy(&mut self) -> MmrdyW { - MmrdyW::new(self, 5) + pub fn mmrdy(&mut self) -> MMRDY_W { + MMRDY_W::new(self, 5) } #[doc = "Bit 6 - BusFault Ready"] #[inline(always)] #[must_use] - pub fn bfrdy(&mut self) -> BfrdyW { - BfrdyW::new(self, 6) + pub fn bfrdy(&mut self) -> BFRDY_W { + BFRDY_W::new(self, 6) } #[doc = "Bit 8 - Monitor Ready"] #[inline(always)] #[must_use] - pub fn monrdy(&mut self) -> MonrdyW { - MonrdyW::new(self, 8) + pub fn monrdy(&mut self) -> MONRDY_W { + MONRDY_W::new(self, 8) } #[doc = "Bit 30 - Lazy State Preservation Enabled"] #[inline(always)] #[must_use] - pub fn lspen(&mut self) -> LspenW { - LspenW::new(self, 30) + pub fn lspen(&mut self) -> LSPEN_W { + LSPEN_W::new(self, 30) } #[doc = "Bit 31 - Automatic State Preservation"] #[inline(always)] #[must_use] - pub fn aspen(&mut self) -> AspenW { - AspenW::new(self, 31) + pub fn aspen(&mut self) -> ASPEN_W { + ASPEN_W::new(self, 31) } } #[doc = "Floating-point Context Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpccrSpec; -impl crate::RegisterSpec for FpccrSpec { +pub struct FPCCR_SPEC; +impl crate::RegisterSpec for FPCCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpccr::R`](R) reader structure"] -impl crate::Readable for FpccrSpec {} +impl crate::Readable for FPCCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpccr::W`](W) writer structure"] -impl crate::Writable for FpccrSpec { +impl crate::Writable for FPCCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPCCR to value 0"] -impl crate::Resettable for FpccrSpec { +impl crate::Resettable for FPCCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/fpdscr.rs b/src/ppb/fpdscr.rs index 5bc79315..57f48595 100644 --- a/src/ppb/fpdscr.rs +++ b/src/ppb/fpdscr.rs @@ -1,85 +1,85 @@ #[doc = "Register `FPDSCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FPDSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RMode` reader - Default value for FPSCR.RMode"] -pub type RmodeR = crate::FieldReader; +pub type RMODE_R = crate::FieldReader; #[doc = "Field `RMode` writer - Default value for FPSCR.RMode"] -pub type RmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type RMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `FZ` reader - Default value for FPSCR.FZ"] -pub type FzR = crate::BitReader; +pub type FZ_R = crate::BitReader; #[doc = "Field `FZ` writer - Default value for FPSCR.FZ"] -pub type FzW<'a, REG> = crate::BitWriter<'a, REG>; +pub type FZ_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DN` reader - Default value for FPSCR.DN"] -pub type DnR = crate::BitReader; +pub type DN_R = crate::BitReader; #[doc = "Field `DN` writer - Default value for FPSCR.DN"] -pub type DnW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHP` reader - Default value for FPSCR.AHP"] -pub type AhpR = crate::BitReader; +pub type AHP_R = crate::BitReader; #[doc = "Field `AHP` writer - Default value for FPSCR.AHP"] -pub type AhpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHP_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 22:23 - Default value for FPSCR.RMode"] #[inline(always)] - pub fn rmode(&self) -> RmodeR { - RmodeR::new(((self.bits >> 22) & 3) as u8) + pub fn rmode(&self) -> RMODE_R { + RMODE_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bit 24 - Default value for FPSCR.FZ"] #[inline(always)] - pub fn fz(&self) -> FzR { - FzR::new(((self.bits >> 24) & 1) != 0) + pub fn fz(&self) -> FZ_R { + FZ_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Default value for FPSCR.DN"] #[inline(always)] - pub fn dn(&self) -> DnR { - DnR::new(((self.bits >> 25) & 1) != 0) + pub fn dn(&self) -> DN_R { + DN_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Default value for FPSCR.AHP"] #[inline(always)] - pub fn ahp(&self) -> AhpR { - AhpR::new(((self.bits >> 26) & 1) != 0) + pub fn ahp(&self) -> AHP_R { + AHP_R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 22:23 - Default value for FPSCR.RMode"] #[inline(always)] #[must_use] - pub fn rmode(&mut self) -> RmodeW { - RmodeW::new(self, 22) + pub fn rmode(&mut self) -> RMODE_W { + RMODE_W::new(self, 22) } #[doc = "Bit 24 - Default value for FPSCR.FZ"] #[inline(always)] #[must_use] - pub fn fz(&mut self) -> FzW { - FzW::new(self, 24) + pub fn fz(&mut self) -> FZ_W { + FZ_W::new(self, 24) } #[doc = "Bit 25 - Default value for FPSCR.DN"] #[inline(always)] #[must_use] - pub fn dn(&mut self) -> DnW { - DnW::new(self, 25) + pub fn dn(&mut self) -> DN_W { + DN_W::new(self, 25) } #[doc = "Bit 26 - Default value for FPSCR.AHP"] #[inline(always)] #[must_use] - pub fn ahp(&mut self) -> AhpW { - AhpW::new(self, 26) + pub fn ahp(&mut self) -> AHP_W { + AHP_W::new(self, 26) } } #[doc = "Floating-point Default Status Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fpdscr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fpdscr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FpdscrSpec; -impl crate::RegisterSpec for FpdscrSpec { +pub struct FPDSCR_SPEC; +impl crate::RegisterSpec for FPDSCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fpdscr::R`](R) reader structure"] -impl crate::Readable for FpdscrSpec {} +impl crate::Readable for FPDSCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`fpdscr::W`](W) writer structure"] -impl crate::Writable for FpdscrSpec { +impl crate::Writable for FPDSCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FPDSCR to value 0"] -impl crate::Resettable for FpdscrSpec { +impl crate::Resettable for FPDSCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/hfsr.rs b/src/ppb/hfsr.rs index 2a5023ce..3697d907 100644 --- a/src/ppb/hfsr.rs +++ b/src/ppb/hfsr.rs @@ -1,168 +1,168 @@ #[doc = "Register `HFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HFSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "BusFault on vector table read\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vecttbl { +pub enum VECTTBL_A { #[doc = "0: no BusFault on vector table read"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: BusFault on vector table read"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vecttbl) -> Self { + fn from(variant: VECTTBL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VECTTBL` reader - BusFault on vector table read"] -pub type VecttblR = crate::BitReader; -impl VecttblR { +pub type VECTTBL_R = crate::BitReader; +impl VECTTBL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vecttbl { + pub const fn variant(&self) -> VECTTBL_A { match self.bits { - false => Vecttbl::Value1, - true => Vecttbl::Value2, + false => VECTTBL_A::VALUE1, + true => VECTTBL_A::VALUE2, } } #[doc = "no BusFault on vector table read"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vecttbl::Value1 + *self == VECTTBL_A::VALUE1 } #[doc = "BusFault on vector table read"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vecttbl::Value2 + *self == VECTTBL_A::VALUE2 } } #[doc = "Field `VECTTBL` writer - BusFault on vector table read"] -pub type VecttblW<'a, REG> = crate::BitWriter<'a, REG, Vecttbl>; -impl<'a, REG> VecttblW<'a, REG> +pub type VECTTBL_W<'a, REG> = crate::BitWriter<'a, REG, VECTTBL_A>; +impl<'a, REG> VECTTBL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no BusFault on vector table read"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vecttbl::Value1) + self.variant(VECTTBL_A::VALUE1) } #[doc = "BusFault on vector table read"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vecttbl::Value2) + self.variant(VECTTBL_A::VALUE2) } } #[doc = "Forced HardFault\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Forced { +pub enum FORCED_A { #[doc = "0: no forced HardFault"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: forced HardFault."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Forced) -> Self { + fn from(variant: FORCED_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FORCED` reader - Forced HardFault"] -pub type ForcedR = crate::BitReader; -impl ForcedR { +pub type FORCED_R = crate::BitReader; +impl FORCED_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Forced { + pub const fn variant(&self) -> FORCED_A { match self.bits { - false => Forced::Value1, - true => Forced::Value2, + false => FORCED_A::VALUE1, + true => FORCED_A::VALUE2, } } #[doc = "no forced HardFault"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Forced::Value1 + *self == FORCED_A::VALUE1 } #[doc = "forced HardFault."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Forced::Value2 + *self == FORCED_A::VALUE2 } } #[doc = "Field `FORCED` writer - Forced HardFault"] -pub type ForcedW<'a, REG> = crate::BitWriter<'a, REG, Forced>; -impl<'a, REG> ForcedW<'a, REG> +pub type FORCED_W<'a, REG> = crate::BitWriter<'a, REG, FORCED_A>; +impl<'a, REG> FORCED_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no forced HardFault"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Forced::Value1) + self.variant(FORCED_A::VALUE1) } #[doc = "forced HardFault."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Forced::Value2) + self.variant(FORCED_A::VALUE2) } } #[doc = "Field `DEBUGEVT` reader - Reserved for Debug use"] -pub type DebugevtR = crate::BitReader; +pub type DEBUGEVT_R = crate::BitReader; #[doc = "Field `DEBUGEVT` writer - Reserved for Debug use"] -pub type DebugevtW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DEBUGEVT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 1 - BusFault on vector table read"] #[inline(always)] - pub fn vecttbl(&self) -> VecttblR { - VecttblR::new(((self.bits >> 1) & 1) != 0) + pub fn vecttbl(&self) -> VECTTBL_R { + VECTTBL_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 30 - Forced HardFault"] #[inline(always)] - pub fn forced(&self) -> ForcedR { - ForcedR::new(((self.bits >> 30) & 1) != 0) + pub fn forced(&self) -> FORCED_R { + FORCED_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Reserved for Debug use"] #[inline(always)] - pub fn debugevt(&self) -> DebugevtR { - DebugevtR::new(((self.bits >> 31) & 1) != 0) + pub fn debugevt(&self) -> DEBUGEVT_R { + DEBUGEVT_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 1 - BusFault on vector table read"] #[inline(always)] #[must_use] - pub fn vecttbl(&mut self) -> VecttblW { - VecttblW::new(self, 1) + pub fn vecttbl(&mut self) -> VECTTBL_W { + VECTTBL_W::new(self, 1) } #[doc = "Bit 30 - Forced HardFault"] #[inline(always)] #[must_use] - pub fn forced(&mut self) -> ForcedW { - ForcedW::new(self, 30) + pub fn forced(&mut self) -> FORCED_W { + FORCED_W::new(self, 30) } #[doc = "Bit 31 - Reserved for Debug use"] #[inline(always)] #[must_use] - pub fn debugevt(&mut self) -> DebugevtW { - DebugevtW::new(self, 31) + pub fn debugevt(&mut self) -> DEBUGEVT_W { + DEBUGEVT_W::new(self, 31) } } #[doc = "HardFault Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hfsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hfsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HfsrSpec; -impl crate::RegisterSpec for HfsrSpec { +pub struct HFSR_SPEC; +impl crate::RegisterSpec for HFSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hfsr::R`](R) reader structure"] -impl crate::Readable for HfsrSpec {} +impl crate::Readable for HFSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`hfsr::W`](W) writer structure"] -impl crate::Writable for HfsrSpec { +impl crate::Writable for HFSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HFSR to value 0"] -impl crate::Resettable for HfsrSpec { +impl crate::Resettable for HFSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/icsr.rs b/src/ppb/icsr.rs index 2b7e564a..3a2a5f5c 100644 --- a/src/ppb/icsr.rs +++ b/src/ppb/icsr.rs @@ -1,353 +1,353 @@ #[doc = "Register `ICSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ICSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Active exception number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum Vectactive { +pub enum VECTACTIVE_A { #[doc = "0: Thread mode"] - Value1 = 0, + VALUE1 = 0, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: Vectactive) -> Self { + fn from(variant: VECTACTIVE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vectactive { +impl crate::FieldSpec for VECTACTIVE_A { type Ux = u16; } -impl crate::IsEnum for Vectactive {} +impl crate::IsEnum for VECTACTIVE_A {} #[doc = "Field `VECTACTIVE` reader - Active exception number"] -pub type VectactiveR = crate::FieldReader; -impl VectactiveR { +pub type VECTACTIVE_R = crate::FieldReader; +impl VECTACTIVE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Vectactive::Value1), + 0 => Some(VECTACTIVE_A::VALUE1), _ => None, } } #[doc = "Thread mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vectactive::Value1 + *self == VECTACTIVE_A::VALUE1 } } #[doc = "Return to Base\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rettobase { +pub enum RETTOBASE_A { #[doc = "0: there are preempted active exceptions to execute"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: there are no active exceptions, or the currently-executing exception is the only active exception."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rettobase) -> Self { + fn from(variant: RETTOBASE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RETTOBASE` reader - Return to Base"] -pub type RettobaseR = crate::BitReader; -impl RettobaseR { +pub type RETTOBASE_R = crate::BitReader; +impl RETTOBASE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rettobase { + pub const fn variant(&self) -> RETTOBASE_A { match self.bits { - false => Rettobase::Value1, - true => Rettobase::Value2, + false => RETTOBASE_A::VALUE1, + true => RETTOBASE_A::VALUE2, } } #[doc = "there are preempted active exceptions to execute"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rettobase::Value1 + *self == RETTOBASE_A::VALUE1 } #[doc = "there are no active exceptions, or the currently-executing exception is the only active exception."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rettobase::Value2 + *self == RETTOBASE_A::VALUE2 } } #[doc = "Vector Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Vectpending { +pub enum VECTPENDING_A { #[doc = "0: no pending exceptions"] - Value1 = 0, + VALUE1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Vectpending) -> Self { + fn from(variant: VECTPENDING_A) -> Self { variant as _ } } -impl crate::FieldSpec for Vectpending { +impl crate::FieldSpec for VECTPENDING_A { type Ux = u8; } -impl crate::IsEnum for Vectpending {} +impl crate::IsEnum for VECTPENDING_A {} #[doc = "Field `VECTPENDING` reader - Vector Pending"] -pub type VectpendingR = crate::FieldReader; -impl VectpendingR { +pub type VECTPENDING_R = crate::FieldReader; +impl VECTPENDING_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Vectpending::Value1), + 0 => Some(VECTPENDING_A::VALUE1), _ => None, } } #[doc = "no pending exceptions"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vectpending::Value1 + *self == VECTPENDING_A::VALUE1 } } #[doc = "Interrupt pending flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Isrpending { +pub enum ISRPENDING_A { #[doc = "0: interrupt not pending"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: interrupt pending."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Isrpending) -> Self { + fn from(variant: ISRPENDING_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ISRPENDING` reader - Interrupt pending flag"] -pub type IsrpendingR = crate::BitReader; -impl IsrpendingR { +pub type ISRPENDING_R = crate::BitReader; +impl ISRPENDING_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Isrpending { + pub const fn variant(&self) -> ISRPENDING_A { match self.bits { - false => Isrpending::Value1, - true => Isrpending::Value2, + false => ISRPENDING_A::VALUE1, + true => ISRPENDING_A::VALUE2, } } #[doc = "interrupt not pending"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Isrpending::Value1 + *self == ISRPENDING_A::VALUE1 } #[doc = "interrupt pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Isrpending::Value2 + *self == ISRPENDING_A::VALUE2 } } #[doc = "SysTick exception clear-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pendstclr { +pub enum PENDSTCLR_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: removes the pending state from the SysTick exception."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pendstclr) -> Self { + fn from(variant: PENDSTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PENDSTCLR` writer - SysTick exception clear-pending bit"] -pub type PendstclrW<'a, REG> = crate::BitWriter<'a, REG, Pendstclr>; -impl<'a, REG> PendstclrW<'a, REG> +pub type PENDSTCLR_W<'a, REG> = crate::BitWriter<'a, REG, PENDSTCLR_A>; +impl<'a, REG> PENDSTCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pendstclr::Value1) + self.variant(PENDSTCLR_A::VALUE1) } #[doc = "removes the pending state from the SysTick exception."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pendstclr::Value2) + self.variant(PENDSTCLR_A::VALUE2) } } #[doc = "SysTick exception set-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pendstset { +pub enum PENDSTSET_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: changes SysTick exception state to pending."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pendstset) -> Self { + fn from(variant: PENDSTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PENDSTSET` reader - SysTick exception set-pending bit"] -pub type PendstsetR = crate::BitReader; -impl PendstsetR { +pub type PENDSTSET_R = crate::BitReader; +impl PENDSTSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pendstset { + pub const fn variant(&self) -> PENDSTSET_A { match self.bits { - false => Pendstset::Value1, - true => Pendstset::Value2, + false => PENDSTSET_A::VALUE1, + true => PENDSTSET_A::VALUE2, } } #[doc = "no effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pendstset::Value1 + *self == PENDSTSET_A::VALUE1 } #[doc = "changes SysTick exception state to pending."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pendstset::Value2 + *self == PENDSTSET_A::VALUE2 } } #[doc = "Field `PENDSTSET` writer - SysTick exception set-pending bit"] -pub type PendstsetW<'a, REG> = crate::BitWriter<'a, REG, Pendstset>; -impl<'a, REG> PendstsetW<'a, REG> +pub type PENDSTSET_W<'a, REG> = crate::BitWriter<'a, REG, PENDSTSET_A>; +impl<'a, REG> PENDSTSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pendstset::Value1) + self.variant(PENDSTSET_A::VALUE1) } #[doc = "changes SysTick exception state to pending."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pendstset::Value2) + self.variant(PENDSTSET_A::VALUE2) } } #[doc = "PendSV clear-pending bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pendsvclr { +pub enum PENDSVCLR_A { #[doc = "0: no effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: removes the pending state from the PendSV exception."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pendsvclr) -> Self { + fn from(variant: PENDSVCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PENDSVCLR` writer - PendSV clear-pending bit"] -pub type PendsvclrW<'a, REG> = crate::BitWriter<'a, REG, Pendsvclr>; -impl<'a, REG> PendsvclrW<'a, REG> +pub type PENDSVCLR_W<'a, REG> = crate::BitWriter<'a, REG, PENDSVCLR_A>; +impl<'a, REG> PENDSVCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "no effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pendsvclr::Value1) + self.variant(PENDSVCLR_A::VALUE1) } #[doc = "removes the pending state from the PendSV exception."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pendsvclr::Value2) + self.variant(PENDSVCLR_A::VALUE2) } } #[doc = "Field `PENDSVSET` reader - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] -pub type PendsvsetR = crate::BitReader; +pub type PENDSVSET_R = crate::BitReader; #[doc = "Field `PENDSVSET` writer - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] -pub type PendsvsetW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PENDSVSET_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NMIPENDSET` reader - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] -pub type NmipendsetR = crate::BitReader; +pub type NMIPENDSET_R = crate::BitReader; #[doc = "Field `NMIPENDSET` writer - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] -pub type NmipendsetW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NMIPENDSET_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:8 - Active exception number"] #[inline(always)] - pub fn vectactive(&self) -> VectactiveR { - VectactiveR::new((self.bits & 0x01ff) as u16) + pub fn vectactive(&self) -> VECTACTIVE_R { + VECTACTIVE_R::new((self.bits & 0x01ff) as u16) } #[doc = "Bit 11 - Return to Base"] #[inline(always)] - pub fn rettobase(&self) -> RettobaseR { - RettobaseR::new(((self.bits >> 11) & 1) != 0) + pub fn rettobase(&self) -> RETTOBASE_R { + RETTOBASE_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 12:17 - Vector Pending"] #[inline(always)] - pub fn vectpending(&self) -> VectpendingR { - VectpendingR::new(((self.bits >> 12) & 0x3f) as u8) + pub fn vectpending(&self) -> VECTPENDING_R { + VECTPENDING_R::new(((self.bits >> 12) & 0x3f) as u8) } #[doc = "Bit 22 - Interrupt pending flag"] #[inline(always)] - pub fn isrpending(&self) -> IsrpendingR { - IsrpendingR::new(((self.bits >> 22) & 1) != 0) + pub fn isrpending(&self) -> ISRPENDING_R { + ISRPENDING_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 26 - SysTick exception set-pending bit"] #[inline(always)] - pub fn pendstset(&self) -> PendstsetR { - PendstsetR::new(((self.bits >> 26) & 1) != 0) + pub fn pendstset(&self) -> PENDSTSET_R { + PENDSTSET_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] #[inline(always)] - pub fn pendsvset(&self) -> PendsvsetR { - PendsvsetR::new(((self.bits >> 28) & 1) != 0) + pub fn pendsvset(&self) -> PENDSVSET_R { + PENDSVSET_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] #[inline(always)] - pub fn nmipendset(&self) -> NmipendsetR { - NmipendsetR::new(((self.bits >> 31) & 1) != 0) + pub fn nmipendset(&self) -> NMIPENDSET_R { + NMIPENDSET_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 25 - SysTick exception clear-pending bit"] #[inline(always)] #[must_use] - pub fn pendstclr(&mut self) -> PendstclrW { - PendstclrW::new(self, 25) + pub fn pendstclr(&mut self) -> PENDSTCLR_W { + PENDSTCLR_W::new(self, 25) } #[doc = "Bit 26 - SysTick exception set-pending bit"] #[inline(always)] #[must_use] - pub fn pendstset(&mut self) -> PendstsetW { - PendstsetW::new(self, 26) + pub fn pendstset(&mut self) -> PENDSTSET_W { + PENDSTSET_W::new(self, 26) } #[doc = "Bit 27 - PendSV clear-pending bit"] #[inline(always)] #[must_use] - pub fn pendsvclr(&mut self) -> PendsvclrW { - PendsvclrW::new(self, 27) + pub fn pendsvclr(&mut self) -> PENDSVCLR_W { + PENDSVCLR_W::new(self, 27) } #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] #[inline(always)] #[must_use] - pub fn pendsvset(&mut self) -> PendsvsetW { - PendsvsetW::new(self, 28) + pub fn pendsvset(&mut self) -> PENDSVSET_W { + PENDSVSET_W::new(self, 28) } #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] #[inline(always)] #[must_use] - pub fn nmipendset(&mut self) -> NmipendsetW { - NmipendsetW::new(self, 31) + pub fn nmipendset(&mut self) -> NMIPENDSET_W { + NMIPENDSET_W::new(self, 31) } } #[doc = "Interrupt Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IcsrSpec; -impl crate::RegisterSpec for IcsrSpec { +pub struct ICSR_SPEC; +impl crate::RegisterSpec for ICSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`icsr::R`](R) reader structure"] -impl crate::Readable for IcsrSpec {} +impl crate::Readable for ICSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`icsr::W`](W) writer structure"] -impl crate::Writable for IcsrSpec { +impl crate::Writable for ICSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICSR to value 0"] -impl crate::Resettable for IcsrSpec { +impl crate::Resettable for ICSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mmfar.rs b/src/ppb/mmfar.rs index 262303d6..f0f5066a 100644 --- a/src/ppb/mmfar.rs +++ b/src/ppb/mmfar.rs @@ -1,40 +1,40 @@ #[doc = "Register `MMFAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MMFAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ADDRESS` reader - Address causing the fault"] -pub type AddressR = crate::FieldReader; +pub type ADDRESS_R = crate::FieldReader; #[doc = "Field `ADDRESS` writer - Address causing the fault"] -pub type AddressW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - pub fn address(&self) -> AddressR { - AddressR::new(self.bits) + pub fn address(&self) -> ADDRESS_R { + ADDRESS_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] #[must_use] - pub fn address(&mut self) -> AddressW { - AddressW::new(self, 0) + pub fn address(&mut self) -> ADDRESS_W { + ADDRESS_W::new(self, 0) } } #[doc = "MemManage Fault Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mmfar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mmfar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MmfarSpec; -impl crate::RegisterSpec for MmfarSpec { +pub struct MMFAR_SPEC; +impl crate::RegisterSpec for MMFAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mmfar::R`](R) reader structure"] -impl crate::Readable for MmfarSpec {} +impl crate::Readable for MMFAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mmfar::W`](W) writer structure"] -impl crate::Writable for MmfarSpec { +impl crate::Writable for MMFAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MMFAR to value 0"] -impl crate::Resettable for MmfarSpec { +impl crate::Resettable for MMFAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_ctrl.rs b/src/ppb/mpu_ctrl.rs index dc617eb0..2c257619 100644 --- a/src/ppb/mpu_ctrl.rs +++ b/src/ppb/mpu_ctrl.rs @@ -1,217 +1,217 @@ #[doc = "Register `MPU_CTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_CTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable MPU\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enable { +pub enum ENABLE_A { #[doc = "0: MPU disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: MPU enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enable) -> Self { + fn from(variant: ENABLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENABLE` reader - Enable MPU"] -pub type EnableR = crate::BitReader; -impl EnableR { +pub type ENABLE_R = crate::BitReader; +impl ENABLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enable { + pub const fn variant(&self) -> ENABLE_A { match self.bits { - false => Enable::Value1, - true => Enable::Value2, + false => ENABLE_A::VALUE1, + true => ENABLE_A::VALUE2, } } #[doc = "MPU disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enable::Value1 + *self == ENABLE_A::VALUE1 } #[doc = "MPU enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enable::Value2 + *self == ENABLE_A::VALUE2 } } #[doc = "Field `ENABLE` writer - Enable MPU"] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>; -impl<'a, REG> EnableW<'a, REG> +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, ENABLE_A>; +impl<'a, REG> ENABLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enable::Value1) + self.variant(ENABLE_A::VALUE1) } #[doc = "MPU enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enable::Value2) + self.variant(ENABLE_A::VALUE2) } } #[doc = "Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hfnmiena { +pub enum HFNMIENA_A { #[doc = "0: MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hfnmiena) -> Self { + fn from(variant: HFNMIENA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HFNMIENA` reader - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] -pub type HfnmienaR = crate::BitReader; -impl HfnmienaR { +pub type HFNMIENA_R = crate::BitReader; +impl HFNMIENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hfnmiena { + pub const fn variant(&self) -> HFNMIENA_A { match self.bits { - false => Hfnmiena::Value1, - true => Hfnmiena::Value2, + false => HFNMIENA_A::VALUE1, + true => HFNMIENA_A::VALUE2, } } #[doc = "MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hfnmiena::Value1 + *self == HFNMIENA_A::VALUE1 } #[doc = "the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hfnmiena::Value2 + *self == HFNMIENA_A::VALUE2 } } #[doc = "Field `HFNMIENA` writer - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] -pub type HfnmienaW<'a, REG> = crate::BitWriter<'a, REG, Hfnmiena>; -impl<'a, REG> HfnmienaW<'a, REG> +pub type HFNMIENA_W<'a, REG> = crate::BitWriter<'a, REG, HFNMIENA_A>; +impl<'a, REG> HFNMIENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU is disabled during hard fault, NMI, and FAULTMASK handlers, regardless of the value of the ENABLE bit"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hfnmiena::Value1) + self.variant(HFNMIENA_A::VALUE1) } #[doc = "the MPU is enabled during hard fault, NMI, and FAULTMASK handlers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hfnmiena::Value2) + self.variant(HFNMIENA_A::VALUE2) } } #[doc = "Enables privileged software access to the default memory map\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Privdefena { +pub enum PRIVDEFENA_A { #[doc = "0: If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Privdefena) -> Self { + fn from(variant: PRIVDEFENA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRIVDEFENA` reader - Enables privileged software access to the default memory map"] -pub type PrivdefenaR = crate::BitReader; -impl PrivdefenaR { +pub type PRIVDEFENA_R = crate::BitReader; +impl PRIVDEFENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Privdefena { + pub const fn variant(&self) -> PRIVDEFENA_A { match self.bits { - false => Privdefena::Value1, - true => Privdefena::Value2, + false => PRIVDEFENA_A::VALUE1, + true => PRIVDEFENA_A::VALUE2, } } #[doc = "If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Privdefena::Value1 + *self == PRIVDEFENA_A::VALUE1 } #[doc = "If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Privdefena::Value2 + *self == PRIVDEFENA_A::VALUE2 } } #[doc = "Field `PRIVDEFENA` writer - Enables privileged software access to the default memory map"] -pub type PrivdefenaW<'a, REG> = crate::BitWriter<'a, REG, Privdefena>; -impl<'a, REG> PrivdefenaW<'a, REG> +pub type PRIVDEFENA_W<'a, REG> = crate::BitWriter<'a, REG, PRIVDEFENA_A>; +impl<'a, REG> PRIVDEFENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "If the MPU is enabled, disables use of the default memory map. Any memory access to a location not covered by any enabled region causes a fault."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Privdefena::Value1) + self.variant(PRIVDEFENA_A::VALUE1) } #[doc = "If the MPU is enabled, enables use of the default memory map as a background region for privileged software accesses."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Privdefena::Value2) + self.variant(PRIVDEFENA_A::VALUE2) } } impl R { #[doc = "Bit 0 - Enable MPU"] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] #[inline(always)] - pub fn hfnmiena(&self) -> HfnmienaR { - HfnmienaR::new(((self.bits >> 1) & 1) != 0) + pub fn hfnmiena(&self) -> HFNMIENA_R { + HFNMIENA_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Enables privileged software access to the default memory map"] #[inline(always)] - pub fn privdefena(&self) -> PrivdefenaR { - PrivdefenaR::new(((self.bits >> 2) & 1) != 0) + pub fn privdefena(&self) -> PRIVDEFENA_R { + PRIVDEFENA_R::new(((self.bits >> 2) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable MPU"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] #[inline(always)] #[must_use] - pub fn hfnmiena(&mut self) -> HfnmienaW { - HfnmienaW::new(self, 1) + pub fn hfnmiena(&mut self) -> HFNMIENA_W { + HFNMIENA_W::new(self, 1) } #[doc = "Bit 2 - Enables privileged software access to the default memory map"] #[inline(always)] #[must_use] - pub fn privdefena(&mut self) -> PrivdefenaW { - PrivdefenaW::new(self, 2) + pub fn privdefena(&mut self) -> PRIVDEFENA_W { + PRIVDEFENA_W::new(self, 2) } } #[doc = "MPU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuCtrlSpec; -impl crate::RegisterSpec for MpuCtrlSpec { +pub struct MPU_CTRL_SPEC; +impl crate::RegisterSpec for MPU_CTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_ctrl::R`](R) reader structure"] -impl crate::Readable for MpuCtrlSpec {} +impl crate::Readable for MPU_CTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_ctrl::W`](W) writer structure"] -impl crate::Writable for MpuCtrlSpec { +impl crate::Writable for MPU_CTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_CTRL to value 0"] -impl crate::Resettable for MpuCtrlSpec { +impl crate::Resettable for MPU_CTRL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr.rs b/src/ppb/mpu_rasr.rs index 572cdbb6..77842758 100644 --- a/src/ppb/mpu_rasr.rs +++ b/src/ppb/mpu_rasr.rs @@ -1,60 +1,60 @@ #[doc = "Register `MPU_RASR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type EnableR = crate::BitReader; +pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SizeR = crate::FieldReader; +pub type SIZE_R = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srd { +pub enum SRD_A { #[doc = "0: corresponding sub-region is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: corresponding sub-region is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srd) -> Self { + fn from(variant: SRD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srd { +impl crate::FieldSpec for SRD_A { type Ux = u8; } -impl crate::IsEnum for Srd {} +impl crate::IsEnum for SRD_A {} #[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SrdR = crate::FieldReader; -impl SrdR { +pub type SRD_R = crate::FieldReader; +impl SRD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srd::Value1), - 1 => Some(Srd::Value2), + 0 => Some(SRD_A::VALUE1), + 1 => Some(SRD_A::VALUE2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srd::Value1 + *self == SRD_A::VALUE1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srd::Value2 + *self == SRD_A::VALUE2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; -impl<'a, REG> SrdW<'a, REG> +pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; +impl<'a, REG> SRD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,204 +62,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srd::Value1) + self.variant(SRD_A::VALUE1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srd::Value2) + self.variant(SRD_A::VALUE2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type BR = crate::BitReader; +pub type B_R = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type BW<'a, REG> = crate::BitWriter<'a, REG>; +pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type CR = crate::BitReader; +pub type C_R = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type CW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type SR = crate::BitReader; +pub type S_R = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type SW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TexR = crate::FieldReader; +pub type TEX_R = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type ApR = crate::FieldReader; +pub type AP_R = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xn { +pub enum XN_A { #[doc = "0: instruction fetches enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: instruction fetches disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xn) -> Self { + fn from(variant: XN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XnR = crate::BitReader; -impl XnR { +pub type XN_R = crate::BitReader; +impl XN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xn { + pub const fn variant(&self) -> XN_A { match self.bits { - false => Xn::Value1, - true => Xn::Value2, + false => XN_A::VALUE1, + true => XN_A::VALUE2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xn::Value1 + *self == XN_A::VALUE1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xn::Value2 + *self == XN_A::VALUE2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; -impl<'a, REG> XnW<'a, REG> +pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; +impl<'a, REG> XN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xn::Value1) + self.variant(XN_A::VALUE1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xn::Value2) + self.variant(XN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SrdR { - SrdR::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SRD_R { + SRD_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> BR { - BR::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> B_R { + B_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> CR { - CR::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> C_R { + C_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> SR { - SR::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> S_R { + S_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TexR { - TexR::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TEX_R { + TEX_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> ApR { - ApR::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> AP_R { + AP_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XnR { - XnR::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XN_R { + XN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 1) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SrdW { - SrdW::new(self, 8) + pub fn srd(&mut self) -> SRD_W { + SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> BW { - BW::new(self, 16) + pub fn b(&mut self) -> B_W { + B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> CW { - CW::new(self, 17) + pub fn c(&mut self) -> C_W { + C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> SW { - SW::new(self, 18) + pub fn s(&mut self) -> S_W { + S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TexW { - TexW::new(self, 19) + pub fn tex(&mut self) -> TEX_W { + TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> ApW { - ApW::new(self, 24) + pub fn ap(&mut self) -> AP_W { + AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XnW { - XnW::new(self, 28) + pub fn xn(&mut self) -> XN_W { + XN_W::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRasrSpec; -impl crate::RegisterSpec for MpuRasrSpec { +pub struct MPU_RASR_SPEC; +impl crate::RegisterSpec for MPU_RASR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr::R`](R) reader structure"] -impl crate::Readable for MpuRasrSpec {} +impl crate::Readable for MPU_RASR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr::W`](W) writer structure"] -impl crate::Writable for MpuRasrSpec { +impl crate::Writable for MPU_RASR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR to value 0"] -impl crate::Resettable for MpuRasrSpec { +impl crate::Resettable for MPU_RASR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a1.rs b/src/ppb/mpu_rasr_a1.rs index 8c7f2855..7e093b9f 100644 --- a/src/ppb/mpu_rasr_a1.rs +++ b/src/ppb/mpu_rasr_a1.rs @@ -1,60 +1,60 @@ #[doc = "Register `MPU_RASR_A1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type EnableR = crate::BitReader; +pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SizeR = crate::FieldReader; +pub type SIZE_R = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srd { +pub enum SRD_A { #[doc = "0: corresponding sub-region is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: corresponding sub-region is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srd) -> Self { + fn from(variant: SRD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srd { +impl crate::FieldSpec for SRD_A { type Ux = u8; } -impl crate::IsEnum for Srd {} +impl crate::IsEnum for SRD_A {} #[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SrdR = crate::FieldReader; -impl SrdR { +pub type SRD_R = crate::FieldReader; +impl SRD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srd::Value1), - 1 => Some(Srd::Value2), + 0 => Some(SRD_A::VALUE1), + 1 => Some(SRD_A::VALUE2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srd::Value1 + *self == SRD_A::VALUE1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srd::Value2 + *self == SRD_A::VALUE2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; -impl<'a, REG> SrdW<'a, REG> +pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; +impl<'a, REG> SRD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,204 +62,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srd::Value1) + self.variant(SRD_A::VALUE1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srd::Value2) + self.variant(SRD_A::VALUE2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type BR = crate::BitReader; +pub type B_R = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type BW<'a, REG> = crate::BitWriter<'a, REG>; +pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type CR = crate::BitReader; +pub type C_R = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type CW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type SR = crate::BitReader; +pub type S_R = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type SW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TexR = crate::FieldReader; +pub type TEX_R = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type ApR = crate::FieldReader; +pub type AP_R = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xn { +pub enum XN_A { #[doc = "0: instruction fetches enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: instruction fetches disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xn) -> Self { + fn from(variant: XN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XnR = crate::BitReader; -impl XnR { +pub type XN_R = crate::BitReader; +impl XN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xn { + pub const fn variant(&self) -> XN_A { match self.bits { - false => Xn::Value1, - true => Xn::Value2, + false => XN_A::VALUE1, + true => XN_A::VALUE2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xn::Value1 + *self == XN_A::VALUE1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xn::Value2 + *self == XN_A::VALUE2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; -impl<'a, REG> XnW<'a, REG> +pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; +impl<'a, REG> XN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xn::Value1) + self.variant(XN_A::VALUE1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xn::Value2) + self.variant(XN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SrdR { - SrdR::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SRD_R { + SRD_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> BR { - BR::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> B_R { + B_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> CR { - CR::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> C_R { + C_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> SR { - SR::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> S_R { + S_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TexR { - TexR::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TEX_R { + TEX_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> ApR { - ApR::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> AP_R { + AP_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XnR { - XnR::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XN_R { + XN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 1) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SrdW { - SrdW::new(self, 8) + pub fn srd(&mut self) -> SRD_W { + SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> BW { - BW::new(self, 16) + pub fn b(&mut self) -> B_W { + B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> CW { - CW::new(self, 17) + pub fn c(&mut self) -> C_W { + C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> SW { - SW::new(self, 18) + pub fn s(&mut self) -> S_W { + S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TexW { - TexW::new(self, 19) + pub fn tex(&mut self) -> TEX_W { + TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> ApW { - ApW::new(self, 24) + pub fn ap(&mut self) -> AP_W { + AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XnW { - XnW::new(self, 28) + pub fn xn(&mut self) -> XN_W { + XN_W::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRasrA1Spec; -impl crate::RegisterSpec for MpuRasrA1Spec { +pub struct MPU_RASR_A1_SPEC; +impl crate::RegisterSpec for MPU_RASR_A1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a1::R`](R) reader structure"] -impl crate::Readable for MpuRasrA1Spec {} +impl crate::Readable for MPU_RASR_A1_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a1::W`](W) writer structure"] -impl crate::Writable for MpuRasrA1Spec { +impl crate::Writable for MPU_RASR_A1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A1 to value 0"] -impl crate::Resettable for MpuRasrA1Spec { +impl crate::Resettable for MPU_RASR_A1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a2.rs b/src/ppb/mpu_rasr_a2.rs index cd4345a6..74ff4667 100644 --- a/src/ppb/mpu_rasr_a2.rs +++ b/src/ppb/mpu_rasr_a2.rs @@ -1,60 +1,60 @@ #[doc = "Register `MPU_RASR_A2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type EnableR = crate::BitReader; +pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SizeR = crate::FieldReader; +pub type SIZE_R = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srd { +pub enum SRD_A { #[doc = "0: corresponding sub-region is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: corresponding sub-region is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srd) -> Self { + fn from(variant: SRD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srd { +impl crate::FieldSpec for SRD_A { type Ux = u8; } -impl crate::IsEnum for Srd {} +impl crate::IsEnum for SRD_A {} #[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SrdR = crate::FieldReader; -impl SrdR { +pub type SRD_R = crate::FieldReader; +impl SRD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srd::Value1), - 1 => Some(Srd::Value2), + 0 => Some(SRD_A::VALUE1), + 1 => Some(SRD_A::VALUE2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srd::Value1 + *self == SRD_A::VALUE1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srd::Value2 + *self == SRD_A::VALUE2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; -impl<'a, REG> SrdW<'a, REG> +pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; +impl<'a, REG> SRD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,204 +62,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srd::Value1) + self.variant(SRD_A::VALUE1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srd::Value2) + self.variant(SRD_A::VALUE2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type BR = crate::BitReader; +pub type B_R = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type BW<'a, REG> = crate::BitWriter<'a, REG>; +pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type CR = crate::BitReader; +pub type C_R = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type CW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type SR = crate::BitReader; +pub type S_R = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type SW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TexR = crate::FieldReader; +pub type TEX_R = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type ApR = crate::FieldReader; +pub type AP_R = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xn { +pub enum XN_A { #[doc = "0: instruction fetches enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: instruction fetches disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xn) -> Self { + fn from(variant: XN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XnR = crate::BitReader; -impl XnR { +pub type XN_R = crate::BitReader; +impl XN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xn { + pub const fn variant(&self) -> XN_A { match self.bits { - false => Xn::Value1, - true => Xn::Value2, + false => XN_A::VALUE1, + true => XN_A::VALUE2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xn::Value1 + *self == XN_A::VALUE1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xn::Value2 + *self == XN_A::VALUE2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; -impl<'a, REG> XnW<'a, REG> +pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; +impl<'a, REG> XN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xn::Value1) + self.variant(XN_A::VALUE1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xn::Value2) + self.variant(XN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SrdR { - SrdR::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SRD_R { + SRD_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> BR { - BR::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> B_R { + B_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> CR { - CR::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> C_R { + C_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> SR { - SR::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> S_R { + S_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TexR { - TexR::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TEX_R { + TEX_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> ApR { - ApR::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> AP_R { + AP_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XnR { - XnR::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XN_R { + XN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 1) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SrdW { - SrdW::new(self, 8) + pub fn srd(&mut self) -> SRD_W { + SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> BW { - BW::new(self, 16) + pub fn b(&mut self) -> B_W { + B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> CW { - CW::new(self, 17) + pub fn c(&mut self) -> C_W { + C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> SW { - SW::new(self, 18) + pub fn s(&mut self) -> S_W { + S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TexW { - TexW::new(self, 19) + pub fn tex(&mut self) -> TEX_W { + TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> ApW { - ApW::new(self, 24) + pub fn ap(&mut self) -> AP_W { + AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XnW { - XnW::new(self, 28) + pub fn xn(&mut self) -> XN_W { + XN_W::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRasrA2Spec; -impl crate::RegisterSpec for MpuRasrA2Spec { +pub struct MPU_RASR_A2_SPEC; +impl crate::RegisterSpec for MPU_RASR_A2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a2::R`](R) reader structure"] -impl crate::Readable for MpuRasrA2Spec {} +impl crate::Readable for MPU_RASR_A2_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a2::W`](W) writer structure"] -impl crate::Writable for MpuRasrA2Spec { +impl crate::Writable for MPU_RASR_A2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A2 to value 0"] -impl crate::Resettable for MpuRasrA2Spec { +impl crate::Resettable for MPU_RASR_A2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rasr_a3.rs b/src/ppb/mpu_rasr_a3.rs index 95658976..558c8533 100644 --- a/src/ppb/mpu_rasr_a3.rs +++ b/src/ppb/mpu_rasr_a3.rs @@ -1,60 +1,60 @@ #[doc = "Register `MPU_RASR_A3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RASR_A3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENABLE` reader - Region enable bit."] -pub type EnableR = crate::BitReader; +pub type ENABLE_R = crate::BitReader; #[doc = "Field `ENABLE` writer - Region enable bit."] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SIZE` reader - MPU protection region size"] -pub type SizeR = crate::FieldReader; +pub type SIZE_R = crate::FieldReader; #[doc = "Field `SIZE` writer - MPU protection region size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Subregion disable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srd { +pub enum SRD_A { #[doc = "0: corresponding sub-region is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: corresponding sub-region is disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srd) -> Self { + fn from(variant: SRD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srd { +impl crate::FieldSpec for SRD_A { type Ux = u8; } -impl crate::IsEnum for Srd {} +impl crate::IsEnum for SRD_A {} #[doc = "Field `SRD` reader - Subregion disable bits"] -pub type SrdR = crate::FieldReader; -impl SrdR { +pub type SRD_R = crate::FieldReader; +impl SRD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srd::Value1), - 1 => Some(Srd::Value2), + 0 => Some(SRD_A::VALUE1), + 1 => Some(SRD_A::VALUE2), _ => None, } } #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srd::Value1 + *self == SRD_A::VALUE1 } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srd::Value2 + *self == SRD_A::VALUE2 } } #[doc = "Field `SRD` writer - Subregion disable bits"] -pub type SrdW<'a, REG> = crate::FieldWriter<'a, REG, 8, Srd>; -impl<'a, REG> SrdW<'a, REG> +pub type SRD_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SRD_A>; +impl<'a, REG> SRD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,204 +62,204 @@ where #[doc = "corresponding sub-region is enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srd::Value1) + self.variant(SRD_A::VALUE1) } #[doc = "corresponding sub-region is disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srd::Value2) + self.variant(SRD_A::VALUE2) } } #[doc = "Field `B` reader - Memory access attribute"] -pub type BR = crate::BitReader; +pub type B_R = crate::BitReader; #[doc = "Field `B` writer - Memory access attribute"] -pub type BW<'a, REG> = crate::BitWriter<'a, REG>; +pub type B_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `C` reader - Memory access attribute"] -pub type CR = crate::BitReader; +pub type C_R = crate::BitReader; #[doc = "Field `C` writer - Memory access attribute"] -pub type CW<'a, REG> = crate::BitWriter<'a, REG>; +pub type C_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `S` reader - Shareable bit"] -pub type SR = crate::BitReader; +pub type S_R = crate::BitReader; #[doc = "Field `S` writer - Shareable bit"] -pub type SW<'a, REG> = crate::BitWriter<'a, REG>; +pub type S_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TEX` reader - Memory access attribute"] -pub type TexR = crate::FieldReader; +pub type TEX_R = crate::FieldReader; #[doc = "Field `TEX` writer - Memory access attribute"] -pub type TexW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TEX_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AP` reader - Access permission field"] -pub type ApR = crate::FieldReader; +pub type AP_R = crate::FieldReader; #[doc = "Field `AP` writer - Access permission field"] -pub type ApW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Instruction access disable bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xn { +pub enum XN_A { #[doc = "0: instruction fetches enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: instruction fetches disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xn) -> Self { + fn from(variant: XN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XN` reader - Instruction access disable bit"] -pub type XnR = crate::BitReader; -impl XnR { +pub type XN_R = crate::BitReader; +impl XN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xn { + pub const fn variant(&self) -> XN_A { match self.bits { - false => Xn::Value1, - true => Xn::Value2, + false => XN_A::VALUE1, + true => XN_A::VALUE2, } } #[doc = "instruction fetches enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xn::Value1 + *self == XN_A::VALUE1 } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xn::Value2 + *self == XN_A::VALUE2 } } #[doc = "Field `XN` writer - Instruction access disable bit"] -pub type XnW<'a, REG> = crate::BitWriter<'a, REG, Xn>; -impl<'a, REG> XnW<'a, REG> +pub type XN_W<'a, REG> = crate::BitWriter<'a, REG, XN_A>; +impl<'a, REG> XN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "instruction fetches enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xn::Value1) + self.variant(XN_A::VALUE1) } #[doc = "instruction fetches disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xn::Value2) + self.variant(XN_A::VALUE2) } } impl R { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 1) & 0x1f) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 1) & 0x1f) as u8) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - pub fn srd(&self) -> SrdR { - SrdR::new(((self.bits >> 8) & 0xff) as u8) + pub fn srd(&self) -> SRD_R { + SRD_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - pub fn b(&self) -> BR { - BR::new(((self.bits >> 16) & 1) != 0) + pub fn b(&self) -> B_R { + B_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - pub fn c(&self) -> CR { - CR::new(((self.bits >> 17) & 1) != 0) + pub fn c(&self) -> C_R { + C_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - pub fn s(&self) -> SR { - SR::new(((self.bits >> 18) & 1) != 0) + pub fn s(&self) -> S_R { + S_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - pub fn tex(&self) -> TexR { - TexR::new(((self.bits >> 19) & 7) as u8) + pub fn tex(&self) -> TEX_R { + TEX_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - pub fn ap(&self) -> ApR { - ApR::new(((self.bits >> 24) & 7) as u8) + pub fn ap(&self) -> AP_R { + AP_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - pub fn xn(&self) -> XnR { - XnR::new(((self.bits >> 28) & 1) != 0) + pub fn xn(&self) -> XN_R { + XN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 1) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] #[must_use] - pub fn srd(&mut self) -> SrdW { - SrdW::new(self, 8) + pub fn srd(&mut self) -> SRD_W { + SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn b(&mut self) -> BW { - BW::new(self, 16) + pub fn b(&mut self) -> B_W { + B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn c(&mut self) -> CW { - CW::new(self, 17) + pub fn c(&mut self) -> C_W { + C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] #[must_use] - pub fn s(&mut self) -> SW { - SW::new(self, 18) + pub fn s(&mut self) -> S_W { + S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] #[must_use] - pub fn tex(&mut self) -> TexW { - TexW::new(self, 19) + pub fn tex(&mut self) -> TEX_W { + TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] #[must_use] - pub fn ap(&mut self) -> ApW { - ApW::new(self, 24) + pub fn ap(&mut self) -> AP_W { + AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] #[must_use] - pub fn xn(&mut self) -> XnW { - XnW::new(self, 28) + pub fn xn(&mut self) -> XN_W { + XN_W::new(self, 28) } } #[doc = "MPU Region Attribute and Size Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rasr_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rasr_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRasrA3Spec; -impl crate::RegisterSpec for MpuRasrA3Spec { +pub struct MPU_RASR_A3_SPEC; +impl crate::RegisterSpec for MPU_RASR_A3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rasr_a3::R`](R) reader structure"] -impl crate::Readable for MpuRasrA3Spec {} +impl crate::Readable for MPU_RASR_A3_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rasr_a3::W`](W) writer structure"] -impl crate::Writable for MpuRasrA3Spec { +impl crate::Writable for MPU_RASR_A3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RASR_A3 to value 0"] -impl crate::Resettable for MpuRasrA3Spec { +impl crate::Resettable for MPU_RASR_A3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar.rs b/src/ppb/mpu_rbar.rs index 0266b225..67e670b4 100644 --- a/src/ppb/mpu_rbar.rs +++ b/src/ppb/mpu_rbar.rs @@ -1,119 +1,119 @@ #[doc = "Register `MPU_RBAR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type RegionR = crate::FieldReader; +pub type REGION_R = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Valid { +pub enum VALID_A { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Valid) -> Self { + fn from(variant: VALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type ValidR = crate::BitReader; -impl ValidR { +pub type VALID_R = crate::BitReader; +impl VALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Valid { + pub const fn variant(&self) -> VALID_A { match self.bits { - false => Valid::Value1, - true => Valid::Value2, + false => VALID_A::VALUE1, + true => VALID_A::VALUE2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Valid::Value1 + *self == VALID_A::VALUE1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Valid::Value2 + *self == VALID_A::VALUE2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; -impl<'a, REG> ValidW<'a, REG> +pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; +impl<'a, REG> VALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Valid::Value1) + self.variant(VALID_A::VALUE1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Valid::Value2) + self.variant(VALID_A::VALUE2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type AddrR = crate::FieldReader; +pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> RegionR { - RegionR::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> REGION_R { + REGION_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> ValidR { - ValidR::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> VALID_R { + VALID_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> AddrR { - AddrR::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> RegionW { - RegionW::new(self, 0) + pub fn region(&mut self) -> REGION_W { + REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> ValidW { - ValidW::new(self, 4) + pub fn valid(&mut self) -> VALID_W { + VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> AddrW { - AddrW::new(self, 9) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 9) } } #[doc = "MPU Region Base Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRbarSpec; -impl crate::RegisterSpec for MpuRbarSpec { +pub struct MPU_RBAR_SPEC; +impl crate::RegisterSpec for MPU_RBAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar::R`](R) reader structure"] -impl crate::Readable for MpuRbarSpec {} +impl crate::Readable for MPU_RBAR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar::W`](W) writer structure"] -impl crate::Writable for MpuRbarSpec { +impl crate::Writable for MPU_RBAR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR to value 0"] -impl crate::Resettable for MpuRbarSpec { +impl crate::Resettable for MPU_RBAR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a1.rs b/src/ppb/mpu_rbar_a1.rs index e287fd7c..29a81ba2 100644 --- a/src/ppb/mpu_rbar_a1.rs +++ b/src/ppb/mpu_rbar_a1.rs @@ -1,119 +1,119 @@ #[doc = "Register `MPU_RBAR_A1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type RegionR = crate::FieldReader; +pub type REGION_R = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Valid { +pub enum VALID_A { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Valid) -> Self { + fn from(variant: VALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type ValidR = crate::BitReader; -impl ValidR { +pub type VALID_R = crate::BitReader; +impl VALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Valid { + pub const fn variant(&self) -> VALID_A { match self.bits { - false => Valid::Value1, - true => Valid::Value2, + false => VALID_A::VALUE1, + true => VALID_A::VALUE2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Valid::Value1 + *self == VALID_A::VALUE1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Valid::Value2 + *self == VALID_A::VALUE2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; -impl<'a, REG> ValidW<'a, REG> +pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; +impl<'a, REG> VALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Valid::Value1) + self.variant(VALID_A::VALUE1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Valid::Value2) + self.variant(VALID_A::VALUE2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type AddrR = crate::FieldReader; +pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> RegionR { - RegionR::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> REGION_R { + REGION_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> ValidR { - ValidR::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> VALID_R { + VALID_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> AddrR { - AddrR::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> RegionW { - RegionW::new(self, 0) + pub fn region(&mut self) -> REGION_W { + REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> ValidW { - ValidW::new(self, 4) + pub fn valid(&mut self) -> VALID_W { + VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> AddrW { - AddrW::new(self, 9) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 9) } } #[doc = "MPU Region Base Address Register A1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRbarA1Spec; -impl crate::RegisterSpec for MpuRbarA1Spec { +pub struct MPU_RBAR_A1_SPEC; +impl crate::RegisterSpec for MPU_RBAR_A1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a1::R`](R) reader structure"] -impl crate::Readable for MpuRbarA1Spec {} +impl crate::Readable for MPU_RBAR_A1_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a1::W`](W) writer structure"] -impl crate::Writable for MpuRbarA1Spec { +impl crate::Writable for MPU_RBAR_A1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A1 to value 0"] -impl crate::Resettable for MpuRbarA1Spec { +impl crate::Resettable for MPU_RBAR_A1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a2.rs b/src/ppb/mpu_rbar_a2.rs index 1d03a6be..9f72c2a9 100644 --- a/src/ppb/mpu_rbar_a2.rs +++ b/src/ppb/mpu_rbar_a2.rs @@ -1,119 +1,119 @@ #[doc = "Register `MPU_RBAR_A2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type RegionR = crate::FieldReader; +pub type REGION_R = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Valid { +pub enum VALID_A { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Valid) -> Self { + fn from(variant: VALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type ValidR = crate::BitReader; -impl ValidR { +pub type VALID_R = crate::BitReader; +impl VALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Valid { + pub const fn variant(&self) -> VALID_A { match self.bits { - false => Valid::Value1, - true => Valid::Value2, + false => VALID_A::VALUE1, + true => VALID_A::VALUE2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Valid::Value1 + *self == VALID_A::VALUE1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Valid::Value2 + *self == VALID_A::VALUE2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; -impl<'a, REG> ValidW<'a, REG> +pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; +impl<'a, REG> VALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Valid::Value1) + self.variant(VALID_A::VALUE1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Valid::Value2) + self.variant(VALID_A::VALUE2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type AddrR = crate::FieldReader; +pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> RegionR { - RegionR::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> REGION_R { + REGION_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> ValidR { - ValidR::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> VALID_R { + VALID_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> AddrR { - AddrR::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> RegionW { - RegionW::new(self, 0) + pub fn region(&mut self) -> REGION_W { + REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> ValidW { - ValidW::new(self, 4) + pub fn valid(&mut self) -> VALID_W { + VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> AddrW { - AddrW::new(self, 9) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 9) } } #[doc = "MPU Region Base Address Register A2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRbarA2Spec; -impl crate::RegisterSpec for MpuRbarA2Spec { +pub struct MPU_RBAR_A2_SPEC; +impl crate::RegisterSpec for MPU_RBAR_A2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a2::R`](R) reader structure"] -impl crate::Readable for MpuRbarA2Spec {} +impl crate::Readable for MPU_RBAR_A2_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a2::W`](W) writer structure"] -impl crate::Writable for MpuRbarA2Spec { +impl crate::Writable for MPU_RBAR_A2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A2 to value 0"] -impl crate::Resettable for MpuRbarA2Spec { +impl crate::Resettable for MPU_RBAR_A2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rbar_a3.rs b/src/ppb/mpu_rbar_a3.rs index 3711d22e..a7300f47 100644 --- a/src/ppb/mpu_rbar_a3.rs +++ b/src/ppb/mpu_rbar_a3.rs @@ -1,119 +1,119 @@ #[doc = "Register `MPU_RBAR_A3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RBAR_A3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - MPU region field"] -pub type RegionR = crate::FieldReader; +pub type REGION_R = crate::FieldReader; #[doc = "Field `REGION` writer - MPU region field"] -pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "MPU Region Number valid bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Valid { +pub enum VALID_A { #[doc = "0: MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Valid) -> Self { + fn from(variant: VALID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VALID` reader - MPU Region Number valid bit"] -pub type ValidR = crate::BitReader; -impl ValidR { +pub type VALID_R = crate::BitReader; +impl VALID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Valid { + pub const fn variant(&self) -> VALID_A { match self.bits { - false => Valid::Value1, - true => Valid::Value2, + false => VALID_A::VALUE1, + true => VALID_A::VALUE2, } } #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Valid::Value1 + *self == VALID_A::VALUE1 } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Valid::Value2 + *self == VALID_A::VALUE2 } } #[doc = "Field `VALID` writer - MPU Region Number valid bit"] -pub type ValidW<'a, REG> = crate::BitWriter<'a, REG, Valid>; -impl<'a, REG> ValidW<'a, REG> +pub type VALID_W<'a, REG> = crate::BitWriter<'a, REG, VALID_A>; +impl<'a, REG> VALID_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MPU_RNR not changed, and the processor: - updates the base address for the region specified in the MPU_RNR - ignores the value of the REGION field"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Valid::Value1) + self.variant(VALID_A::VALUE1) } #[doc = "the processor: - updates the value of the MPU_RNR to the value of the REGION field - updates the base address for the region specified in the REGION field."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Valid::Value2) + self.variant(VALID_A::VALUE2) } } #[doc = "Field `ADDR` reader - Region base address field"] -pub type AddrR = crate::FieldReader; +pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Region base address field"] -pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>; impl R { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - pub fn region(&self) -> RegionR { - RegionR::new((self.bits & 0x0f) as u8) + pub fn region(&self) -> REGION_R { + REGION_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - pub fn valid(&self) -> ValidR { - ValidR::new(((self.bits >> 4) & 1) != 0) + pub fn valid(&self) -> VALID_R { + VALID_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - pub fn addr(&self) -> AddrR { - AddrR::new((self.bits >> 9) & 0x007f_ffff) + pub fn addr(&self) -> ADDR_R { + ADDR_R::new((self.bits >> 9) & 0x007f_ffff) } } impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> RegionW { - RegionW::new(self, 0) + pub fn region(&mut self) -> REGION_W { + REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] #[must_use] - pub fn valid(&mut self) -> ValidW { - ValidW::new(self, 4) + pub fn valid(&mut self) -> VALID_W { + VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> AddrW { - AddrW::new(self, 9) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 9) } } #[doc = "MPU Region Base Address Register A3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rbar_a3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rbar_a3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRbarA3Spec; -impl crate::RegisterSpec for MpuRbarA3Spec { +pub struct MPU_RBAR_A3_SPEC; +impl crate::RegisterSpec for MPU_RBAR_A3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rbar_a3::R`](R) reader structure"] -impl crate::Readable for MpuRbarA3Spec {} +impl crate::Readable for MPU_RBAR_A3_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rbar_a3::W`](W) writer structure"] -impl crate::Writable for MpuRbarA3Spec { +impl crate::Writable for MPU_RBAR_A3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RBAR_A3 to value 0"] -impl crate::Resettable for MpuRbarA3Spec { +impl crate::Resettable for MPU_RBAR_A3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_rnr.rs b/src/ppb/mpu_rnr.rs index 5df15e71..e8767ab2 100644 --- a/src/ppb/mpu_rnr.rs +++ b/src/ppb/mpu_rnr.rs @@ -1,40 +1,40 @@ #[doc = "Register `MPU_RNR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MPU_RNR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REGION` reader - Region"] -pub type RegionR = crate::FieldReader; +pub type REGION_R = crate::FieldReader; #[doc = "Field `REGION` writer - Region"] -pub type RegionW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type REGION_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Region"] #[inline(always)] - pub fn region(&self) -> RegionR { - RegionR::new((self.bits & 0xff) as u8) + pub fn region(&self) -> REGION_R { + REGION_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Region"] #[inline(always)] #[must_use] - pub fn region(&mut self) -> RegionW { - RegionW::new(self, 0) + pub fn region(&mut self) -> REGION_W { + REGION_W::new(self, 0) } } #[doc = "MPU Region Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_rnr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mpu_rnr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuRnrSpec; -impl crate::RegisterSpec for MpuRnrSpec { +pub struct MPU_RNR_SPEC; +impl crate::RegisterSpec for MPU_RNR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_rnr::R`](R) reader structure"] -impl crate::Readable for MpuRnrSpec {} +impl crate::Readable for MPU_RNR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mpu_rnr::W`](W) writer structure"] -impl crate::Writable for MpuRnrSpec { +impl crate::Writable for MPU_RNR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MPU_RNR to value 0"] -impl crate::Resettable for MpuRnrSpec { +impl crate::Resettable for MPU_RNR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/mpu_type.rs b/src/ppb/mpu_type.rs index 0dac1791..78279dc0 100644 --- a/src/ppb/mpu_type.rs +++ b/src/ppb/mpu_type.rs @@ -1,36 +1,36 @@ #[doc = "Register `MPU_TYPE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SEPARATE` reader - Support for unified or separate instruction and date memory maps"] -pub type SeparateR = crate::BitReader; +pub type SEPARATE_R = crate::BitReader; #[doc = "Field `DREGION` reader - Number of supported MPU data regions"] -pub type DregionR = crate::FieldReader; +pub type DREGION_R = crate::FieldReader; #[doc = "Field `IREGION` reader - Number of supported MPU instruction regions"] -pub type IregionR = crate::FieldReader; +pub type IREGION_R = crate::FieldReader; impl R { #[doc = "Bit 0 - Support for unified or separate instruction and date memory maps"] #[inline(always)] - pub fn separate(&self) -> SeparateR { - SeparateR::new((self.bits & 1) != 0) + pub fn separate(&self) -> SEPARATE_R { + SEPARATE_R::new((self.bits & 1) != 0) } #[doc = "Bits 8:15 - Number of supported MPU data regions"] #[inline(always)] - pub fn dregion(&self) -> DregionR { - DregionR::new(((self.bits >> 8) & 0xff) as u8) + pub fn dregion(&self) -> DREGION_R { + DREGION_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Number of supported MPU instruction regions"] #[inline(always)] - pub fn iregion(&self) -> IregionR { - IregionR::new(((self.bits >> 16) & 0xff) as u8) + pub fn iregion(&self) -> IREGION_R { + IREGION_R::new(((self.bits >> 16) & 0xff) as u8) } } #[doc = "MPU Type Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mpu_type::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MpuTypeSpec; -impl crate::RegisterSpec for MpuTypeSpec { +pub struct MPU_TYPE_SPEC; +impl crate::RegisterSpec for MPU_TYPE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mpu_type::R`](R) reader structure"] -impl crate::Readable for MpuTypeSpec {} +impl crate::Readable for MPU_TYPE_SPEC {} #[doc = "`reset()` method sets MPU_TYPE to value 0x0800"] -impl crate::Resettable for MpuTypeSpec { +impl crate::Resettable for MPU_TYPE_SPEC { const RESET_VALUE: u32 = 0x0800; } diff --git a/src/ppb/nvic_iabr0.rs b/src/ppb/nvic_iabr0.rs index 95ee3d7b..dd77dac0 100644 --- a/src/ppb/nvic_iabr0.rs +++ b/src/ppb/nvic_iabr0.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_IABR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Active { +pub enum ACTIVE_A { #[doc = "0: interrupt not active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: interrupt active"] - Value2 = 1, + VALUE2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Active) -> Self { + fn from(variant: ACTIVE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Active { +impl crate::FieldSpec for ACTIVE_A { type Ux = u32; } -impl crate::IsEnum for Active {} +impl crate::IsEnum for ACTIVE_A {} #[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ActiveR = crate::FieldReader; -impl ActiveR { +pub type ACTIVE_R = crate::FieldReader; +impl ACTIVE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Active::Value1), - 1 => Some(Active::Value2), + 0 => Some(ACTIVE_A::VALUE1), + 1 => Some(ACTIVE_A::VALUE2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Active::Value1 + *self == ACTIVE_A::VALUE1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Active::Value2 + *self == ACTIVE_A::VALUE2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; -impl<'a, REG> ActiveW<'a, REG> +pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; +impl<'a, REG> ACTIVE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Active::Value1) + self.variant(ACTIVE_A::VALUE1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Active::Value2) + self.variant(ACTIVE_A::VALUE2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ActiveR { - ActiveR::new(self.bits) + pub fn active(&self) -> ACTIVE_R { + ACTIVE_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ActiveW { - ActiveW::new(self, 0) + pub fn active(&mut self) -> ACTIVE_W { + ACTIVE_W::new(self, 0) } } #[doc = "Interrupt Active Bit Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIabr0Spec; -impl crate::RegisterSpec for NvicIabr0Spec { +pub struct NVIC_IABR0_SPEC; +impl crate::RegisterSpec for NVIC_IABR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr0::R`](R) reader structure"] -impl crate::Readable for NvicIabr0Spec {} +impl crate::Readable for NVIC_IABR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr0::W`](W) writer structure"] -impl crate::Writable for NvicIabr0Spec { +impl crate::Writable for NVIC_IABR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR0 to value 0"] -impl crate::Resettable for NvicIabr0Spec { +impl crate::Resettable for NVIC_IABR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr1.rs b/src/ppb/nvic_iabr1.rs index b639f54c..fd06bcf2 100644 --- a/src/ppb/nvic_iabr1.rs +++ b/src/ppb/nvic_iabr1.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_IABR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Active { +pub enum ACTIVE_A { #[doc = "0: interrupt not active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: interrupt active"] - Value2 = 1, + VALUE2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Active) -> Self { + fn from(variant: ACTIVE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Active { +impl crate::FieldSpec for ACTIVE_A { type Ux = u32; } -impl crate::IsEnum for Active {} +impl crate::IsEnum for ACTIVE_A {} #[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ActiveR = crate::FieldReader; -impl ActiveR { +pub type ACTIVE_R = crate::FieldReader; +impl ACTIVE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Active::Value1), - 1 => Some(Active::Value2), + 0 => Some(ACTIVE_A::VALUE1), + 1 => Some(ACTIVE_A::VALUE2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Active::Value1 + *self == ACTIVE_A::VALUE1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Active::Value2 + *self == ACTIVE_A::VALUE2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; -impl<'a, REG> ActiveW<'a, REG> +pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; +impl<'a, REG> ACTIVE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Active::Value1) + self.variant(ACTIVE_A::VALUE1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Active::Value2) + self.variant(ACTIVE_A::VALUE2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ActiveR { - ActiveR::new(self.bits) + pub fn active(&self) -> ACTIVE_R { + ACTIVE_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ActiveW { - ActiveW::new(self, 0) + pub fn active(&mut self) -> ACTIVE_W { + ACTIVE_W::new(self, 0) } } #[doc = "Interrupt Active Bit Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIabr1Spec; -impl crate::RegisterSpec for NvicIabr1Spec { +pub struct NVIC_IABR1_SPEC; +impl crate::RegisterSpec for NVIC_IABR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr1::R`](R) reader structure"] -impl crate::Readable for NvicIabr1Spec {} +impl crate::Readable for NVIC_IABR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr1::W`](W) writer structure"] -impl crate::Writable for NvicIabr1Spec { +impl crate::Writable for NVIC_IABR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR1 to value 0"] -impl crate::Resettable for NvicIabr1Spec { +impl crate::Resettable for NVIC_IABR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr2.rs b/src/ppb/nvic_iabr2.rs index b2516332..9081fde1 100644 --- a/src/ppb/nvic_iabr2.rs +++ b/src/ppb/nvic_iabr2.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_IABR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Active { +pub enum ACTIVE_A { #[doc = "0: interrupt not active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: interrupt active"] - Value2 = 1, + VALUE2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Active) -> Self { + fn from(variant: ACTIVE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Active { +impl crate::FieldSpec for ACTIVE_A { type Ux = u32; } -impl crate::IsEnum for Active {} +impl crate::IsEnum for ACTIVE_A {} #[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ActiveR = crate::FieldReader; -impl ActiveR { +pub type ACTIVE_R = crate::FieldReader; +impl ACTIVE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Active::Value1), - 1 => Some(Active::Value2), + 0 => Some(ACTIVE_A::VALUE1), + 1 => Some(ACTIVE_A::VALUE2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Active::Value1 + *self == ACTIVE_A::VALUE1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Active::Value2 + *self == ACTIVE_A::VALUE2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; -impl<'a, REG> ActiveW<'a, REG> +pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; +impl<'a, REG> ACTIVE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Active::Value1) + self.variant(ACTIVE_A::VALUE1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Active::Value2) + self.variant(ACTIVE_A::VALUE2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ActiveR { - ActiveR::new(self.bits) + pub fn active(&self) -> ACTIVE_R { + ACTIVE_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ActiveW { - ActiveW::new(self, 0) + pub fn active(&mut self) -> ACTIVE_W { + ACTIVE_W::new(self, 0) } } #[doc = "Interrupt Active Bit Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIabr2Spec; -impl crate::RegisterSpec for NvicIabr2Spec { +pub struct NVIC_IABR2_SPEC; +impl crate::RegisterSpec for NVIC_IABR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr2::R`](R) reader structure"] -impl crate::Readable for NvicIabr2Spec {} +impl crate::Readable for NVIC_IABR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr2::W`](W) writer structure"] -impl crate::Writable for NvicIabr2Spec { +impl crate::Writable for NVIC_IABR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR2 to value 0"] -impl crate::Resettable for NvicIabr2Spec { +impl crate::Resettable for NVIC_IABR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iabr3.rs b/src/ppb/nvic_iabr3.rs index 35afd5e8..824411cd 100644 --- a/src/ppb/nvic_iabr3.rs +++ b/src/ppb/nvic_iabr3.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_IABR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IABR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt active flags:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Active { +pub enum ACTIVE_A { #[doc = "0: interrupt not active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: interrupt active"] - Value2 = 1, + VALUE2 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Active) -> Self { + fn from(variant: ACTIVE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Active { +impl crate::FieldSpec for ACTIVE_A { type Ux = u32; } -impl crate::IsEnum for Active {} +impl crate::IsEnum for ACTIVE_A {} #[doc = "Field `ACTIVE` reader - Interrupt active flags:"] -pub type ActiveR = crate::FieldReader; -impl ActiveR { +pub type ACTIVE_R = crate::FieldReader; +impl ACTIVE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Active::Value1), - 1 => Some(Active::Value2), + 0 => Some(ACTIVE_A::VALUE1), + 1 => Some(ACTIVE_A::VALUE2), _ => None, } } #[doc = "interrupt not active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Active::Value1 + *self == ACTIVE_A::VALUE1 } #[doc = "interrupt active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Active::Value2 + *self == ACTIVE_A::VALUE2 } } #[doc = "Field `ACTIVE` writer - Interrupt active flags:"] -pub type ActiveW<'a, REG> = crate::FieldWriter<'a, REG, 32, Active>; -impl<'a, REG> ActiveW<'a, REG> +pub type ACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, ACTIVE_A>; +impl<'a, REG> ACTIVE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt not active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Active::Value1) + self.variant(ACTIVE_A::VALUE1) } #[doc = "interrupt active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Active::Value2) + self.variant(ACTIVE_A::VALUE2) } } impl R { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - pub fn active(&self) -> ActiveR { - ActiveR::new(self.bits) + pub fn active(&self) -> ACTIVE_R { + ACTIVE_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] #[must_use] - pub fn active(&mut self) -> ActiveW { - ActiveW::new(self, 0) + pub fn active(&mut self) -> ACTIVE_W { + ACTIVE_W::new(self, 0) } } #[doc = "Interrupt Active Bit Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iabr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iabr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIabr3Spec; -impl crate::RegisterSpec for NvicIabr3Spec { +pub struct NVIC_IABR3_SPEC; +impl crate::RegisterSpec for NVIC_IABR3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iabr3::R`](R) reader structure"] -impl crate::Readable for NvicIabr3Spec {} +impl crate::Readable for NVIC_IABR3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iabr3::W`](W) writer structure"] -impl crate::Writable for NvicIabr3Spec { +impl crate::Writable for NVIC_IABR3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IABR3 to value 0"] -impl crate::Resettable for NvicIabr3Spec { +impl crate::Resettable for NVIC_IABR3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer0.rs b/src/ppb/nvic_icer0.rs index fcc85ed5..514a6631 100644 --- a/src/ppb/nvic_icer0.rs +++ b/src/ppb/nvic_icer0.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICER0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrena { +pub enum CLRENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrena) -> Self { + fn from(variant: CLRENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrena { +impl crate::FieldSpec for CLRENA_A { type Ux = u32; } -impl crate::IsEnum for Clrena {} +impl crate::IsEnum for CLRENA_A {} #[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type ClrenaR = crate::FieldReader; -impl ClrenaR { +pub type CLRENA_R = crate::FieldReader; +impl CLRENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrena::Value3), - 1 => Some(Clrena::Value4), + 0 => Some(CLRENA_A::VALUE3), + 1 => Some(CLRENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrena::Value3 + *self == CLRENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrena::Value4 + *self == CLRENA_A::VALUE4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; -impl<'a, REG> ClrenaW<'a, REG> +pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; +impl<'a, REG> CLRENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrena::Value3) + self.variant(CLRENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrena::Value4) + self.variant(CLRENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> ClrenaR { - ClrenaR::new(self.bits) + pub fn clrena(&self) -> CLRENA_R { + CLRENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> ClrenaW { - ClrenaW::new(self, 0) + pub fn clrena(&mut self) -> CLRENA_W { + CLRENA_W::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcer0Spec; -impl crate::RegisterSpec for NvicIcer0Spec { +pub struct NVIC_ICER0_SPEC; +impl crate::RegisterSpec for NVIC_ICER0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer0::R`](R) reader structure"] -impl crate::Readable for NvicIcer0Spec {} +impl crate::Readable for NVIC_ICER0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icer0::W`](W) writer structure"] -impl crate::Writable for NvicIcer0Spec { +impl crate::Writable for NVIC_ICER0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER0 to value 0"] -impl crate::Resettable for NvicIcer0Spec { +impl crate::Resettable for NVIC_ICER0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer1.rs b/src/ppb/nvic_icer1.rs index 8398d060..39fe3638 100644 --- a/src/ppb/nvic_icer1.rs +++ b/src/ppb/nvic_icer1.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICER1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrena { +pub enum CLRENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrena) -> Self { + fn from(variant: CLRENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrena { +impl crate::FieldSpec for CLRENA_A { type Ux = u32; } -impl crate::IsEnum for Clrena {} +impl crate::IsEnum for CLRENA_A {} #[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type ClrenaR = crate::FieldReader; -impl ClrenaR { +pub type CLRENA_R = crate::FieldReader; +impl CLRENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrena::Value3), - 1 => Some(Clrena::Value4), + 0 => Some(CLRENA_A::VALUE3), + 1 => Some(CLRENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrena::Value3 + *self == CLRENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrena::Value4 + *self == CLRENA_A::VALUE4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; -impl<'a, REG> ClrenaW<'a, REG> +pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; +impl<'a, REG> CLRENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrena::Value3) + self.variant(CLRENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrena::Value4) + self.variant(CLRENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> ClrenaR { - ClrenaR::new(self.bits) + pub fn clrena(&self) -> CLRENA_R { + CLRENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> ClrenaW { - ClrenaW::new(self, 0) + pub fn clrena(&mut self) -> CLRENA_W { + CLRENA_W::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcer1Spec; -impl crate::RegisterSpec for NvicIcer1Spec { +pub struct NVIC_ICER1_SPEC; +impl crate::RegisterSpec for NVIC_ICER1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer1::R`](R) reader structure"] -impl crate::Readable for NvicIcer1Spec {} +impl crate::Readable for NVIC_ICER1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icer1::W`](W) writer structure"] -impl crate::Writable for NvicIcer1Spec { +impl crate::Writable for NVIC_ICER1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER1 to value 0"] -impl crate::Resettable for NvicIcer1Spec { +impl crate::Resettable for NVIC_ICER1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer2.rs b/src/ppb/nvic_icer2.rs index 087f4e31..a4708794 100644 --- a/src/ppb/nvic_icer2.rs +++ b/src/ppb/nvic_icer2.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICER2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrena { +pub enum CLRENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrena) -> Self { + fn from(variant: CLRENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrena { +impl crate::FieldSpec for CLRENA_A { type Ux = u32; } -impl crate::IsEnum for Clrena {} +impl crate::IsEnum for CLRENA_A {} #[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type ClrenaR = crate::FieldReader; -impl ClrenaR { +pub type CLRENA_R = crate::FieldReader; +impl CLRENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrena::Value3), - 1 => Some(Clrena::Value4), + 0 => Some(CLRENA_A::VALUE3), + 1 => Some(CLRENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrena::Value3 + *self == CLRENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrena::Value4 + *self == CLRENA_A::VALUE4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; -impl<'a, REG> ClrenaW<'a, REG> +pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; +impl<'a, REG> CLRENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrena::Value3) + self.variant(CLRENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrena::Value4) + self.variant(CLRENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> ClrenaR { - ClrenaR::new(self.bits) + pub fn clrena(&self) -> CLRENA_R { + CLRENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> ClrenaW { - ClrenaW::new(self, 0) + pub fn clrena(&mut self) -> CLRENA_W { + CLRENA_W::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcer2Spec; -impl crate::RegisterSpec for NvicIcer2Spec { +pub struct NVIC_ICER2_SPEC; +impl crate::RegisterSpec for NVIC_ICER2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer2::R`](R) reader structure"] -impl crate::Readable for NvicIcer2Spec {} +impl crate::Readable for NVIC_ICER2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icer2::W`](W) writer structure"] -impl crate::Writable for NvicIcer2Spec { +impl crate::Writable for NVIC_ICER2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER2 to value 0"] -impl crate::Resettable for NvicIcer2Spec { +impl crate::Resettable for NVIC_ICER2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icer3.rs b/src/ppb/nvic_icer3.rs index 727ac402..cbc0a7d4 100644 --- a/src/ppb/nvic_icer3.rs +++ b/src/ppb/nvic_icer3.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICER3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICER3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt clear-enable bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrena { +pub enum CLRENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrena) -> Self { + fn from(variant: CLRENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrena { +impl crate::FieldSpec for CLRENA_A { type Ux = u32; } -impl crate::IsEnum for Clrena {} +impl crate::IsEnum for CLRENA_A {} #[doc = "Field `CLRENA` reader - Interrupt clear-enable bits."] -pub type ClrenaR = crate::FieldReader; -impl ClrenaR { +pub type CLRENA_R = crate::FieldReader; +impl CLRENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrena::Value3), - 1 => Some(Clrena::Value4), + 0 => Some(CLRENA_A::VALUE3), + 1 => Some(CLRENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrena::Value3 + *self == CLRENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrena::Value4 + *self == CLRENA_A::VALUE4 } } #[doc = "Field `CLRENA` writer - Interrupt clear-enable bits."] -pub type ClrenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrena>; -impl<'a, REG> ClrenaW<'a, REG> +pub type CLRENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRENA_A>; +impl<'a, REG> CLRENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrena::Value3) + self.variant(CLRENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrena::Value4) + self.variant(CLRENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - pub fn clrena(&self) -> ClrenaR { - ClrenaR::new(self.bits) + pub fn clrena(&self) -> CLRENA_R { + CLRENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] #[must_use] - pub fn clrena(&mut self) -> ClrenaW { - ClrenaW::new(self, 0) + pub fn clrena(&mut self) -> CLRENA_W { + CLRENA_W::new(self, 0) } } #[doc = "Interrupt Clear-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icer3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icer3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcer3Spec; -impl crate::RegisterSpec for NvicIcer3Spec { +pub struct NVIC_ICER3_SPEC; +impl crate::RegisterSpec for NVIC_ICER3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icer3::R`](R) reader structure"] -impl crate::Readable for NvicIcer3Spec {} +impl crate::Readable for NVIC_ICER3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icer3::W`](W) writer structure"] -impl crate::Writable for NvicIcer3Spec { +impl crate::Writable for NVIC_ICER3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICER3 to value 0"] -impl crate::Resettable for NvicIcer3Spec { +impl crate::Resettable for NVIC_ICER3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr0.rs b/src/ppb/nvic_icpr0.rs index c4cd35c3..5445e2f2 100644 --- a/src/ppb/nvic_icpr0.rs +++ b/src/ppb/nvic_icpr0.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrpend { +pub enum CLRPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrpend) -> Self { + fn from(variant: CLRPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrpend { +impl crate::FieldSpec for CLRPEND_A { type Ux = u32; } -impl crate::IsEnum for Clrpend {} +impl crate::IsEnum for CLRPEND_A {} #[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type ClrpendR = crate::FieldReader; -impl ClrpendR { +pub type CLRPEND_R = crate::FieldReader; +impl CLRPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrpend::Value3), - 1 => Some(Clrpend::Value4), + 0 => Some(CLRPEND_A::VALUE3), + 1 => Some(CLRPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrpend::Value3 + *self == CLRPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrpend::Value4 + *self == CLRPEND_A::VALUE4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; -impl<'a, REG> ClrpendW<'a, REG> +pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; +impl<'a, REG> CLRPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrpend::Value3) + self.variant(CLRPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrpend::Value4) + self.variant(CLRPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> ClrpendR { - ClrpendR::new(self.bits) + pub fn clrpend(&self) -> CLRPEND_R { + CLRPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> ClrpendW { - ClrpendW::new(self, 0) + pub fn clrpend(&mut self) -> CLRPEND_W { + CLRPEND_W::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcpr0Spec; -impl crate::RegisterSpec for NvicIcpr0Spec { +pub struct NVIC_ICPR0_SPEC; +impl crate::RegisterSpec for NVIC_ICPR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr0::R`](R) reader structure"] -impl crate::Readable for NvicIcpr0Spec {} +impl crate::Readable for NVIC_ICPR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr0::W`](W) writer structure"] -impl crate::Writable for NvicIcpr0Spec { +impl crate::Writable for NVIC_ICPR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR0 to value 0"] -impl crate::Resettable for NvicIcpr0Spec { +impl crate::Resettable for NVIC_ICPR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr1.rs b/src/ppb/nvic_icpr1.rs index 428afc88..fc0fc013 100644 --- a/src/ppb/nvic_icpr1.rs +++ b/src/ppb/nvic_icpr1.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrpend { +pub enum CLRPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrpend) -> Self { + fn from(variant: CLRPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrpend { +impl crate::FieldSpec for CLRPEND_A { type Ux = u32; } -impl crate::IsEnum for Clrpend {} +impl crate::IsEnum for CLRPEND_A {} #[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type ClrpendR = crate::FieldReader; -impl ClrpendR { +pub type CLRPEND_R = crate::FieldReader; +impl CLRPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrpend::Value3), - 1 => Some(Clrpend::Value4), + 0 => Some(CLRPEND_A::VALUE3), + 1 => Some(CLRPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrpend::Value3 + *self == CLRPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrpend::Value4 + *self == CLRPEND_A::VALUE4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; -impl<'a, REG> ClrpendW<'a, REG> +pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; +impl<'a, REG> CLRPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrpend::Value3) + self.variant(CLRPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrpend::Value4) + self.variant(CLRPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> ClrpendR { - ClrpendR::new(self.bits) + pub fn clrpend(&self) -> CLRPEND_R { + CLRPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> ClrpendW { - ClrpendW::new(self, 0) + pub fn clrpend(&mut self) -> CLRPEND_W { + CLRPEND_W::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcpr1Spec; -impl crate::RegisterSpec for NvicIcpr1Spec { +pub struct NVIC_ICPR1_SPEC; +impl crate::RegisterSpec for NVIC_ICPR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr1::R`](R) reader structure"] -impl crate::Readable for NvicIcpr1Spec {} +impl crate::Readable for NVIC_ICPR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr1::W`](W) writer structure"] -impl crate::Writable for NvicIcpr1Spec { +impl crate::Writable for NVIC_ICPR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR1 to value 0"] -impl crate::Resettable for NvicIcpr1Spec { +impl crate::Resettable for NVIC_ICPR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr2.rs b/src/ppb/nvic_icpr2.rs index ed1e02f1..7864b0e1 100644 --- a/src/ppb/nvic_icpr2.rs +++ b/src/ppb/nvic_icpr2.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrpend { +pub enum CLRPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrpend) -> Self { + fn from(variant: CLRPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrpend { +impl crate::FieldSpec for CLRPEND_A { type Ux = u32; } -impl crate::IsEnum for Clrpend {} +impl crate::IsEnum for CLRPEND_A {} #[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type ClrpendR = crate::FieldReader; -impl ClrpendR { +pub type CLRPEND_R = crate::FieldReader; +impl CLRPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrpend::Value3), - 1 => Some(Clrpend::Value4), + 0 => Some(CLRPEND_A::VALUE3), + 1 => Some(CLRPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrpend::Value3 + *self == CLRPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrpend::Value4 + *self == CLRPEND_A::VALUE4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; -impl<'a, REG> ClrpendW<'a, REG> +pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; +impl<'a, REG> CLRPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrpend::Value3) + self.variant(CLRPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrpend::Value4) + self.variant(CLRPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> ClrpendR { - ClrpendR::new(self.bits) + pub fn clrpend(&self) -> CLRPEND_R { + CLRPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> ClrpendW { - ClrpendW::new(self, 0) + pub fn clrpend(&mut self) -> CLRPEND_W { + CLRPEND_W::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcpr2Spec; -impl crate::RegisterSpec for NvicIcpr2Spec { +pub struct NVIC_ICPR2_SPEC; +impl crate::RegisterSpec for NVIC_ICPR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr2::R`](R) reader structure"] -impl crate::Readable for NvicIcpr2Spec {} +impl crate::Readable for NVIC_ICPR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr2::W`](W) writer structure"] -impl crate::Writable for NvicIcpr2Spec { +impl crate::Writable for NVIC_ICPR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR2 to value 0"] -impl crate::Resettable for NvicIcpr2Spec { +impl crate::Resettable for NVIC_ICPR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_icpr3.rs b/src/ppb/nvic_icpr3.rs index c107d02c..f28d9fd0 100644 --- a/src/ppb/nvic_icpr3.rs +++ b/src/ppb/nvic_icpr3.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ICPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ICPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Clrpend { +pub enum CLRPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Clrpend) -> Self { + fn from(variant: CLRPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clrpend { +impl crate::FieldSpec for CLRPEND_A { type Ux = u32; } -impl crate::IsEnum for Clrpend {} +impl crate::IsEnum for CLRPEND_A {} #[doc = "Field `CLRPEND` reader - Interrupt set-pending bits."] -pub type ClrpendR = crate::FieldReader; -impl ClrpendR { +pub type CLRPEND_R = crate::FieldReader; +impl CLRPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clrpend::Value3), - 1 => Some(Clrpend::Value4), + 0 => Some(CLRPEND_A::VALUE3), + 1 => Some(CLRPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clrpend::Value3 + *self == CLRPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clrpend::Value4 + *self == CLRPEND_A::VALUE4 } } #[doc = "Field `CLRPEND` writer - Interrupt set-pending bits."] -pub type ClrpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Clrpend>; -impl<'a, REG> ClrpendW<'a, REG> +pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, CLRPEND_A>; +impl<'a, REG> CLRPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clrpend::Value3) + self.variant(CLRPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clrpend::Value4) + self.variant(CLRPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn clrpend(&self) -> ClrpendR { - ClrpendR::new(self.bits) + pub fn clrpend(&self) -> CLRPEND_R { + CLRPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn clrpend(&mut self) -> ClrpendW { - ClrpendW::new(self, 0) + pub fn clrpend(&mut self) -> CLRPEND_W { + CLRPEND_W::new(self, 0) } } #[doc = "Interrupt Clear-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIcpr3Spec; -impl crate::RegisterSpec for NvicIcpr3Spec { +pub struct NVIC_ICPR3_SPEC; +impl crate::RegisterSpec for NVIC_ICPR3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_icpr3::R`](R) reader structure"] -impl crate::Readable for NvicIcpr3Spec {} +impl crate::Readable for NVIC_ICPR3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_icpr3::W`](W) writer structure"] -impl crate::Writable for NvicIcpr3Spec { +impl crate::Writable for NVIC_ICPR3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ICPR3 to value 0"] -impl crate::Resettable for NvicIcpr3Spec { +impl crate::Resettable for NVIC_ICPR3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr0.rs b/src/ppb/nvic_ipr0.rs index ba971de3..1fc89f6d 100644 --- a/src/ppb/nvic_ipr0.rs +++ b/src/ppb/nvic_ipr0.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr0Spec; -impl crate::RegisterSpec for NvicIpr0Spec { +pub struct NVIC_IPR0_SPEC; +impl crate::RegisterSpec for NVIC_IPR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr0::R`](R) reader structure"] -impl crate::Readable for NvicIpr0Spec {} +impl crate::Readable for NVIC_IPR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr0::W`](W) writer structure"] -impl crate::Writable for NvicIpr0Spec { +impl crate::Writable for NVIC_IPR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR0 to value 0"] -impl crate::Resettable for NvicIpr0Spec { +impl crate::Resettable for NVIC_IPR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr1.rs b/src/ppb/nvic_ipr1.rs index b125454a..5fde81f1 100644 --- a/src/ppb/nvic_ipr1.rs +++ b/src/ppb/nvic_ipr1.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr1Spec; -impl crate::RegisterSpec for NvicIpr1Spec { +pub struct NVIC_IPR1_SPEC; +impl crate::RegisterSpec for NVIC_IPR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr1::R`](R) reader structure"] -impl crate::Readable for NvicIpr1Spec {} +impl crate::Readable for NVIC_IPR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr1::W`](W) writer structure"] -impl crate::Writable for NvicIpr1Spec { +impl crate::Writable for NVIC_IPR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR1 to value 0"] -impl crate::Resettable for NvicIpr1Spec { +impl crate::Resettable for NVIC_IPR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr10.rs b/src/ppb/nvic_ipr10.rs index 027cd742..df64b5e7 100644 --- a/src/ppb/nvic_ipr10.rs +++ b/src/ppb/nvic_ipr10.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR10` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR10` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr10::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr10Spec; -impl crate::RegisterSpec for NvicIpr10Spec { +pub struct NVIC_IPR10_SPEC; +impl crate::RegisterSpec for NVIC_IPR10_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr10::R`](R) reader structure"] -impl crate::Readable for NvicIpr10Spec {} +impl crate::Readable for NVIC_IPR10_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr10::W`](W) writer structure"] -impl crate::Writable for NvicIpr10Spec { +impl crate::Writable for NVIC_IPR10_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR10 to value 0"] -impl crate::Resettable for NvicIpr10Spec { +impl crate::Resettable for NVIC_IPR10_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr11.rs b/src/ppb/nvic_ipr11.rs index 8a52e864..45bdeed6 100644 --- a/src/ppb/nvic_ipr11.rs +++ b/src/ppb/nvic_ipr11.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR11` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR11` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr11::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr11::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr11Spec; -impl crate::RegisterSpec for NvicIpr11Spec { +pub struct NVIC_IPR11_SPEC; +impl crate::RegisterSpec for NVIC_IPR11_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr11::R`](R) reader structure"] -impl crate::Readable for NvicIpr11Spec {} +impl crate::Readable for NVIC_IPR11_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr11::W`](W) writer structure"] -impl crate::Writable for NvicIpr11Spec { +impl crate::Writable for NVIC_IPR11_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR11 to value 0"] -impl crate::Resettable for NvicIpr11Spec { +impl crate::Resettable for NVIC_IPR11_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr12.rs b/src/ppb/nvic_ipr12.rs index 759994cb..f6af8e36 100644 --- a/src/ppb/nvic_ipr12.rs +++ b/src/ppb/nvic_ipr12.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR12` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR12` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr12::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr12::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr12Spec; -impl crate::RegisterSpec for NvicIpr12Spec { +pub struct NVIC_IPR12_SPEC; +impl crate::RegisterSpec for NVIC_IPR12_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr12::R`](R) reader structure"] -impl crate::Readable for NvicIpr12Spec {} +impl crate::Readable for NVIC_IPR12_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr12::W`](W) writer structure"] -impl crate::Writable for NvicIpr12Spec { +impl crate::Writable for NVIC_IPR12_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR12 to value 0"] -impl crate::Resettable for NvicIpr12Spec { +impl crate::Resettable for NVIC_IPR12_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr13.rs b/src/ppb/nvic_ipr13.rs index 30da8186..88352ec2 100644 --- a/src/ppb/nvic_ipr13.rs +++ b/src/ppb/nvic_ipr13.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR13` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR13` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr13::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr13::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr13Spec; -impl crate::RegisterSpec for NvicIpr13Spec { +pub struct NVIC_IPR13_SPEC; +impl crate::RegisterSpec for NVIC_IPR13_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr13::R`](R) reader structure"] -impl crate::Readable for NvicIpr13Spec {} +impl crate::Readable for NVIC_IPR13_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr13::W`](W) writer structure"] -impl crate::Writable for NvicIpr13Spec { +impl crate::Writable for NVIC_IPR13_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR13 to value 0"] -impl crate::Resettable for NvicIpr13Spec { +impl crate::Resettable for NVIC_IPR13_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr14.rs b/src/ppb/nvic_ipr14.rs index 54cee235..51d93123 100644 --- a/src/ppb/nvic_ipr14.rs +++ b/src/ppb/nvic_ipr14.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR14` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR14` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr14::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr14::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr14Spec; -impl crate::RegisterSpec for NvicIpr14Spec { +pub struct NVIC_IPR14_SPEC; +impl crate::RegisterSpec for NVIC_IPR14_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr14::R`](R) reader structure"] -impl crate::Readable for NvicIpr14Spec {} +impl crate::Readable for NVIC_IPR14_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr14::W`](W) writer structure"] -impl crate::Writable for NvicIpr14Spec { +impl crate::Writable for NVIC_IPR14_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR14 to value 0"] -impl crate::Resettable for NvicIpr14Spec { +impl crate::Resettable for NVIC_IPR14_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr15.rs b/src/ppb/nvic_ipr15.rs index 59692b17..797d1f6d 100644 --- a/src/ppb/nvic_ipr15.rs +++ b/src/ppb/nvic_ipr15.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR15` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR15` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr15::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr15::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr15Spec; -impl crate::RegisterSpec for NvicIpr15Spec { +pub struct NVIC_IPR15_SPEC; +impl crate::RegisterSpec for NVIC_IPR15_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr15::R`](R) reader structure"] -impl crate::Readable for NvicIpr15Spec {} +impl crate::Readable for NVIC_IPR15_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr15::W`](W) writer structure"] -impl crate::Writable for NvicIpr15Spec { +impl crate::Writable for NVIC_IPR15_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR15 to value 0"] -impl crate::Resettable for NvicIpr15Spec { +impl crate::Resettable for NVIC_IPR15_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr16.rs b/src/ppb/nvic_ipr16.rs index 0b9c02a2..aded47e7 100644 --- a/src/ppb/nvic_ipr16.rs +++ b/src/ppb/nvic_ipr16.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR16` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR16` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 16\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr16::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr16::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr16Spec; -impl crate::RegisterSpec for NvicIpr16Spec { +pub struct NVIC_IPR16_SPEC; +impl crate::RegisterSpec for NVIC_IPR16_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr16::R`](R) reader structure"] -impl crate::Readable for NvicIpr16Spec {} +impl crate::Readable for NVIC_IPR16_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr16::W`](W) writer structure"] -impl crate::Writable for NvicIpr16Spec { +impl crate::Writable for NVIC_IPR16_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR16 to value 0"] -impl crate::Resettable for NvicIpr16Spec { +impl crate::Resettable for NVIC_IPR16_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr17.rs b/src/ppb/nvic_ipr17.rs index e49d63f5..17cb4107 100644 --- a/src/ppb/nvic_ipr17.rs +++ b/src/ppb/nvic_ipr17.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR17` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR17` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 17\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr17::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr17::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr17Spec; -impl crate::RegisterSpec for NvicIpr17Spec { +pub struct NVIC_IPR17_SPEC; +impl crate::RegisterSpec for NVIC_IPR17_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr17::R`](R) reader structure"] -impl crate::Readable for NvicIpr17Spec {} +impl crate::Readable for NVIC_IPR17_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr17::W`](W) writer structure"] -impl crate::Writable for NvicIpr17Spec { +impl crate::Writable for NVIC_IPR17_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR17 to value 0"] -impl crate::Resettable for NvicIpr17Spec { +impl crate::Resettable for NVIC_IPR17_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr18.rs b/src/ppb/nvic_ipr18.rs index 8d6e7942..a4f66552 100644 --- a/src/ppb/nvic_ipr18.rs +++ b/src/ppb/nvic_ipr18.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR18` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR18` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 18\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr18::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr18::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr18Spec; -impl crate::RegisterSpec for NvicIpr18Spec { +pub struct NVIC_IPR18_SPEC; +impl crate::RegisterSpec for NVIC_IPR18_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr18::R`](R) reader structure"] -impl crate::Readable for NvicIpr18Spec {} +impl crate::Readable for NVIC_IPR18_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr18::W`](W) writer structure"] -impl crate::Writable for NvicIpr18Spec { +impl crate::Writable for NVIC_IPR18_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR18 to value 0"] -impl crate::Resettable for NvicIpr18Spec { +impl crate::Resettable for NVIC_IPR18_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr19.rs b/src/ppb/nvic_ipr19.rs index 8d0b7b65..737504ef 100644 --- a/src/ppb/nvic_ipr19.rs +++ b/src/ppb/nvic_ipr19.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR19` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR19` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 19\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr19::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr19::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr19Spec; -impl crate::RegisterSpec for NvicIpr19Spec { +pub struct NVIC_IPR19_SPEC; +impl crate::RegisterSpec for NVIC_IPR19_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr19::R`](R) reader structure"] -impl crate::Readable for NvicIpr19Spec {} +impl crate::Readable for NVIC_IPR19_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr19::W`](W) writer structure"] -impl crate::Writable for NvicIpr19Spec { +impl crate::Writable for NVIC_IPR19_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR19 to value 0"] -impl crate::Resettable for NvicIpr19Spec { +impl crate::Resettable for NVIC_IPR19_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr2.rs b/src/ppb/nvic_ipr2.rs index 809d900a..54b3b5e7 100644 --- a/src/ppb/nvic_ipr2.rs +++ b/src/ppb/nvic_ipr2.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr2Spec; -impl crate::RegisterSpec for NvicIpr2Spec { +pub struct NVIC_IPR2_SPEC; +impl crate::RegisterSpec for NVIC_IPR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr2::R`](R) reader structure"] -impl crate::Readable for NvicIpr2Spec {} +impl crate::Readable for NVIC_IPR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr2::W`](W) writer structure"] -impl crate::Writable for NvicIpr2Spec { +impl crate::Writable for NVIC_IPR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR2 to value 0"] -impl crate::Resettable for NvicIpr2Spec { +impl crate::Resettable for NVIC_IPR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr20.rs b/src/ppb/nvic_ipr20.rs index 9b2eb86b..37f4364f 100644 --- a/src/ppb/nvic_ipr20.rs +++ b/src/ppb/nvic_ipr20.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR20` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR20` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 20\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr20::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr20::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr20Spec; -impl crate::RegisterSpec for NvicIpr20Spec { +pub struct NVIC_IPR20_SPEC; +impl crate::RegisterSpec for NVIC_IPR20_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr20::R`](R) reader structure"] -impl crate::Readable for NvicIpr20Spec {} +impl crate::Readable for NVIC_IPR20_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr20::W`](W) writer structure"] -impl crate::Writable for NvicIpr20Spec { +impl crate::Writable for NVIC_IPR20_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR20 to value 0"] -impl crate::Resettable for NvicIpr20Spec { +impl crate::Resettable for NVIC_IPR20_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr21.rs b/src/ppb/nvic_ipr21.rs index d3050b90..74d0cb1e 100644 --- a/src/ppb/nvic_ipr21.rs +++ b/src/ppb/nvic_ipr21.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR21` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR21` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 21\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr21::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr21::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr21Spec; -impl crate::RegisterSpec for NvicIpr21Spec { +pub struct NVIC_IPR21_SPEC; +impl crate::RegisterSpec for NVIC_IPR21_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr21::R`](R) reader structure"] -impl crate::Readable for NvicIpr21Spec {} +impl crate::Readable for NVIC_IPR21_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr21::W`](W) writer structure"] -impl crate::Writable for NvicIpr21Spec { +impl crate::Writable for NVIC_IPR21_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR21 to value 0"] -impl crate::Resettable for NvicIpr21Spec { +impl crate::Resettable for NVIC_IPR21_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr22.rs b/src/ppb/nvic_ipr22.rs index 6619732c..55802b0a 100644 --- a/src/ppb/nvic_ipr22.rs +++ b/src/ppb/nvic_ipr22.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR22` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR22` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 22\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr22::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr22::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr22Spec; -impl crate::RegisterSpec for NvicIpr22Spec { +pub struct NVIC_IPR22_SPEC; +impl crate::RegisterSpec for NVIC_IPR22_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr22::R`](R) reader structure"] -impl crate::Readable for NvicIpr22Spec {} +impl crate::Readable for NVIC_IPR22_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr22::W`](W) writer structure"] -impl crate::Writable for NvicIpr22Spec { +impl crate::Writable for NVIC_IPR22_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR22 to value 0"] -impl crate::Resettable for NvicIpr22Spec { +impl crate::Resettable for NVIC_IPR22_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr23.rs b/src/ppb/nvic_ipr23.rs index 5d3dc06a..a455964e 100644 --- a/src/ppb/nvic_ipr23.rs +++ b/src/ppb/nvic_ipr23.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR23` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR23` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 23\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr23::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr23::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr23Spec; -impl crate::RegisterSpec for NvicIpr23Spec { +pub struct NVIC_IPR23_SPEC; +impl crate::RegisterSpec for NVIC_IPR23_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr23::R`](R) reader structure"] -impl crate::Readable for NvicIpr23Spec {} +impl crate::Readable for NVIC_IPR23_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr23::W`](W) writer structure"] -impl crate::Writable for NvicIpr23Spec { +impl crate::Writable for NVIC_IPR23_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR23 to value 0"] -impl crate::Resettable for NvicIpr23Spec { +impl crate::Resettable for NVIC_IPR23_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr24.rs b/src/ppb/nvic_ipr24.rs index 8c39da34..e4a25307 100644 --- a/src/ppb/nvic_ipr24.rs +++ b/src/ppb/nvic_ipr24.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR24` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR24` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 24\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr24::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr24::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr24Spec; -impl crate::RegisterSpec for NvicIpr24Spec { +pub struct NVIC_IPR24_SPEC; +impl crate::RegisterSpec for NVIC_IPR24_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr24::R`](R) reader structure"] -impl crate::Readable for NvicIpr24Spec {} +impl crate::Readable for NVIC_IPR24_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr24::W`](W) writer structure"] -impl crate::Writable for NvicIpr24Spec { +impl crate::Writable for NVIC_IPR24_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR24 to value 0"] -impl crate::Resettable for NvicIpr24Spec { +impl crate::Resettable for NVIC_IPR24_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr25.rs b/src/ppb/nvic_ipr25.rs index 9f0c9bda..fa865334 100644 --- a/src/ppb/nvic_ipr25.rs +++ b/src/ppb/nvic_ipr25.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR25` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR25` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 25\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr25::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr25::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr25Spec; -impl crate::RegisterSpec for NvicIpr25Spec { +pub struct NVIC_IPR25_SPEC; +impl crate::RegisterSpec for NVIC_IPR25_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr25::R`](R) reader structure"] -impl crate::Readable for NvicIpr25Spec {} +impl crate::Readable for NVIC_IPR25_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr25::W`](W) writer structure"] -impl crate::Writable for NvicIpr25Spec { +impl crate::Writable for NVIC_IPR25_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR25 to value 0"] -impl crate::Resettable for NvicIpr25Spec { +impl crate::Resettable for NVIC_IPR25_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr26.rs b/src/ppb/nvic_ipr26.rs index 7c9f900a..f3bddfc5 100644 --- a/src/ppb/nvic_ipr26.rs +++ b/src/ppb/nvic_ipr26.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR26` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR26` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 26\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr26::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr26::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr26Spec; -impl crate::RegisterSpec for NvicIpr26Spec { +pub struct NVIC_IPR26_SPEC; +impl crate::RegisterSpec for NVIC_IPR26_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr26::R`](R) reader structure"] -impl crate::Readable for NvicIpr26Spec {} +impl crate::Readable for NVIC_IPR26_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr26::W`](W) writer structure"] -impl crate::Writable for NvicIpr26Spec { +impl crate::Writable for NVIC_IPR26_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR26 to value 0"] -impl crate::Resettable for NvicIpr26Spec { +impl crate::Resettable for NVIC_IPR26_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr27.rs b/src/ppb/nvic_ipr27.rs index 3761d07c..6e001e20 100644 --- a/src/ppb/nvic_ipr27.rs +++ b/src/ppb/nvic_ipr27.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR27` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR27` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 27\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr27::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr27::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr27Spec; -impl crate::RegisterSpec for NvicIpr27Spec { +pub struct NVIC_IPR27_SPEC; +impl crate::RegisterSpec for NVIC_IPR27_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr27::R`](R) reader structure"] -impl crate::Readable for NvicIpr27Spec {} +impl crate::Readable for NVIC_IPR27_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr27::W`](W) writer structure"] -impl crate::Writable for NvicIpr27Spec { +impl crate::Writable for NVIC_IPR27_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR27 to value 0"] -impl crate::Resettable for NvicIpr27Spec { +impl crate::Resettable for NVIC_IPR27_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr3.rs b/src/ppb/nvic_ipr3.rs index 528ec08c..8c361d56 100644 --- a/src/ppb/nvic_ipr3.rs +++ b/src/ppb/nvic_ipr3.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr3Spec; -impl crate::RegisterSpec for NvicIpr3Spec { +pub struct NVIC_IPR3_SPEC; +impl crate::RegisterSpec for NVIC_IPR3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr3::R`](R) reader structure"] -impl crate::Readable for NvicIpr3Spec {} +impl crate::Readable for NVIC_IPR3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr3::W`](W) writer structure"] -impl crate::Writable for NvicIpr3Spec { +impl crate::Writable for NVIC_IPR3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR3 to value 0"] -impl crate::Resettable for NvicIpr3Spec { +impl crate::Resettable for NVIC_IPR3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr4.rs b/src/ppb/nvic_ipr4.rs index 363d664e..47c888a6 100644 --- a/src/ppb/nvic_ipr4.rs +++ b/src/ppb/nvic_ipr4.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr4Spec; -impl crate::RegisterSpec for NvicIpr4Spec { +pub struct NVIC_IPR4_SPEC; +impl crate::RegisterSpec for NVIC_IPR4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr4::R`](R) reader structure"] -impl crate::Readable for NvicIpr4Spec {} +impl crate::Readable for NVIC_IPR4_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr4::W`](W) writer structure"] -impl crate::Writable for NvicIpr4Spec { +impl crate::Writable for NVIC_IPR4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR4 to value 0"] -impl crate::Resettable for NvicIpr4Spec { +impl crate::Resettable for NVIC_IPR4_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr5.rs b/src/ppb/nvic_ipr5.rs index f01df3c7..3870b4f6 100644 --- a/src/ppb/nvic_ipr5.rs +++ b/src/ppb/nvic_ipr5.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR5` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR5` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr5Spec; -impl crate::RegisterSpec for NvicIpr5Spec { +pub struct NVIC_IPR5_SPEC; +impl crate::RegisterSpec for NVIC_IPR5_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr5::R`](R) reader structure"] -impl crate::Readable for NvicIpr5Spec {} +impl crate::Readable for NVIC_IPR5_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr5::W`](W) writer structure"] -impl crate::Writable for NvicIpr5Spec { +impl crate::Writable for NVIC_IPR5_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR5 to value 0"] -impl crate::Resettable for NvicIpr5Spec { +impl crate::Resettable for NVIC_IPR5_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr6.rs b/src/ppb/nvic_ipr6.rs index 547054cc..b79589ae 100644 --- a/src/ppb/nvic_ipr6.rs +++ b/src/ppb/nvic_ipr6.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR6` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR6` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr6Spec; -impl crate::RegisterSpec for NvicIpr6Spec { +pub struct NVIC_IPR6_SPEC; +impl crate::RegisterSpec for NVIC_IPR6_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr6::R`](R) reader structure"] -impl crate::Readable for NvicIpr6Spec {} +impl crate::Readable for NVIC_IPR6_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr6::W`](W) writer structure"] -impl crate::Writable for NvicIpr6Spec { +impl crate::Writable for NVIC_IPR6_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR6 to value 0"] -impl crate::Resettable for NvicIpr6Spec { +impl crate::Resettable for NVIC_IPR6_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr7.rs b/src/ppb/nvic_ipr7.rs index 02d25665..5a0e310f 100644 --- a/src/ppb/nvic_ipr7.rs +++ b/src/ppb/nvic_ipr7.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR7` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR7` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr7::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr7::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr7Spec; -impl crate::RegisterSpec for NvicIpr7Spec { +pub struct NVIC_IPR7_SPEC; +impl crate::RegisterSpec for NVIC_IPR7_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr7::R`](R) reader structure"] -impl crate::Readable for NvicIpr7Spec {} +impl crate::Readable for NVIC_IPR7_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr7::W`](W) writer structure"] -impl crate::Writable for NvicIpr7Spec { +impl crate::Writable for NVIC_IPR7_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR7 to value 0"] -impl crate::Resettable for NvicIpr7Spec { +impl crate::Resettable for NVIC_IPR7_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr8.rs b/src/ppb/nvic_ipr8.rs index b30ee8fb..8ae71408 100644 --- a/src/ppb/nvic_ipr8.rs +++ b/src/ppb/nvic_ipr8.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR8` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR8` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr8::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr8::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr8Spec; -impl crate::RegisterSpec for NvicIpr8Spec { +pub struct NVIC_IPR8_SPEC; +impl crate::RegisterSpec for NVIC_IPR8_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr8::R`](R) reader structure"] -impl crate::Readable for NvicIpr8Spec {} +impl crate::Readable for NVIC_IPR8_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr8::W`](W) writer structure"] -impl crate::Writable for NvicIpr8Spec { +impl crate::Writable for NVIC_IPR8_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR8 to value 0"] -impl crate::Resettable for NvicIpr8Spec { +impl crate::Resettable for NVIC_IPR8_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ipr9.rs b/src/ppb/nvic_ipr9.rs index 0601831a..59bac530 100644 --- a/src/ppb/nvic_ipr9.rs +++ b/src/ppb/nvic_ipr9.rs @@ -1,85 +1,85 @@ #[doc = "Register `NVIC_IPR9` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_IPR9` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_0` reader - Priority value 0"] -pub type Pri0R = crate::FieldReader; +pub type PRI_0_R = crate::FieldReader; #[doc = "Field `PRI_0` writer - Priority value 0"] -pub type Pri0W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_1` reader - Priority value 1"] -pub type Pri1R = crate::FieldReader; +pub type PRI_1_R = crate::FieldReader; #[doc = "Field `PRI_1` writer - Priority value 1"] -pub type Pri1W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_2` reader - Priority value 2"] -pub type Pri2R = crate::FieldReader; +pub type PRI_2_R = crate::FieldReader; #[doc = "Field `PRI_2` writer - Priority value 2"] -pub type Pri2W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_3` reader - Priority value 3"] -pub type Pri3R = crate::FieldReader; +pub type PRI_3_R = crate::FieldReader; #[doc = "Field `PRI_3` writer - Priority value 3"] -pub type Pri3W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - pub fn pri_0(&self) -> Pri0R { - Pri0R::new((self.bits & 0xff) as u8) + pub fn pri_0(&self) -> PRI_0_R { + PRI_0_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - pub fn pri_1(&self) -> Pri1R { - Pri1R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_1(&self) -> PRI_1_R { + PRI_1_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - pub fn pri_2(&self) -> Pri2R { - Pri2R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_2(&self) -> PRI_2_R { + PRI_2_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - pub fn pri_3(&self) -> Pri3R { - Pri3R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_3(&self) -> PRI_3_R { + PRI_3_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] #[must_use] - pub fn pri_0(&mut self) -> Pri0W { - Pri0W::new(self, 0) + pub fn pri_0(&mut self) -> PRI_0_W { + PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] #[must_use] - pub fn pri_1(&mut self) -> Pri1W { - Pri1W::new(self, 8) + pub fn pri_1(&mut self) -> PRI_1_W { + PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] #[must_use] - pub fn pri_2(&mut self) -> Pri2W { - Pri2W::new(self, 16) + pub fn pri_2(&mut self) -> PRI_2_W { + PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] #[must_use] - pub fn pri_3(&mut self) -> Pri3W { - Pri3W::new(self, 24) + pub fn pri_3(&mut self) -> PRI_3_W { + PRI_3_W::new(self, 24) } } #[doc = "Interrupt Priority Register 9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ipr9::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ipr9::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIpr9Spec; -impl crate::RegisterSpec for NvicIpr9Spec { +pub struct NVIC_IPR9_SPEC; +impl crate::RegisterSpec for NVIC_IPR9_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ipr9::R`](R) reader structure"] -impl crate::Readable for NvicIpr9Spec {} +impl crate::Readable for NVIC_IPR9_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ipr9::W`](W) writer structure"] -impl crate::Writable for NvicIpr9Spec { +impl crate::Writable for NVIC_IPR9_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_IPR9 to value 0"] -impl crate::Resettable for NvicIpr9Spec { +impl crate::Resettable for NVIC_IPR9_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser0.rs b/src/ppb/nvic_iser0.rs index abf3d340..2d08fdde 100644 --- a/src/ppb/nvic_iser0.rs +++ b/src/ppb/nvic_iser0.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISER0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setena { +pub enum SETENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setena) -> Self { + fn from(variant: SETENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setena { +impl crate::FieldSpec for SETENA_A { type Ux = u32; } -impl crate::IsEnum for Setena {} +impl crate::IsEnum for SETENA_A {} #[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SetenaR = crate::FieldReader; -impl SetenaR { +pub type SETENA_R = crate::FieldReader; +impl SETENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setena::Value3), - 1 => Some(Setena::Value4), + 0 => Some(SETENA_A::VALUE3), + 1 => Some(SETENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setena::Value3 + *self == SETENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setena::Value4 + *self == SETENA_A::VALUE4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; -impl<'a, REG> SetenaW<'a, REG> +pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; +impl<'a, REG> SETENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setena::Value3) + self.variant(SETENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setena::Value4) + self.variant(SETENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SetenaR { - SetenaR::new(self.bits) + pub fn setena(&self) -> SETENA_R { + SETENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SetenaW { - SetenaW::new(self, 0) + pub fn setena(&mut self) -> SETENA_W { + SETENA_W::new(self, 0) } } #[doc = "Interrupt Set-enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIser0Spec; -impl crate::RegisterSpec for NvicIser0Spec { +pub struct NVIC_ISER0_SPEC; +impl crate::RegisterSpec for NVIC_ISER0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser0::R`](R) reader structure"] -impl crate::Readable for NvicIser0Spec {} +impl crate::Readable for NVIC_ISER0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iser0::W`](W) writer structure"] -impl crate::Writable for NvicIser0Spec { +impl crate::Writable for NVIC_ISER0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER0 to value 0"] -impl crate::Resettable for NvicIser0Spec { +impl crate::Resettable for NVIC_ISER0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser1.rs b/src/ppb/nvic_iser1.rs index 554aa7d3..7f737780 100644 --- a/src/ppb/nvic_iser1.rs +++ b/src/ppb/nvic_iser1.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISER1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setena { +pub enum SETENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setena) -> Self { + fn from(variant: SETENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setena { +impl crate::FieldSpec for SETENA_A { type Ux = u32; } -impl crate::IsEnum for Setena {} +impl crate::IsEnum for SETENA_A {} #[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SetenaR = crate::FieldReader; -impl SetenaR { +pub type SETENA_R = crate::FieldReader; +impl SETENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setena::Value3), - 1 => Some(Setena::Value4), + 0 => Some(SETENA_A::VALUE3), + 1 => Some(SETENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setena::Value3 + *self == SETENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setena::Value4 + *self == SETENA_A::VALUE4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; -impl<'a, REG> SetenaW<'a, REG> +pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; +impl<'a, REG> SETENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setena::Value3) + self.variant(SETENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setena::Value4) + self.variant(SETENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SetenaR { - SetenaR::new(self.bits) + pub fn setena(&self) -> SETENA_R { + SETENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SetenaW { - SetenaW::new(self, 0) + pub fn setena(&mut self) -> SETENA_W { + SETENA_W::new(self, 0) } } #[doc = "Interrupt Set-enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIser1Spec; -impl crate::RegisterSpec for NvicIser1Spec { +pub struct NVIC_ISER1_SPEC; +impl crate::RegisterSpec for NVIC_ISER1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser1::R`](R) reader structure"] -impl crate::Readable for NvicIser1Spec {} +impl crate::Readable for NVIC_ISER1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iser1::W`](W) writer structure"] -impl crate::Writable for NvicIser1Spec { +impl crate::Writable for NVIC_ISER1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER1 to value 0"] -impl crate::Resettable for NvicIser1Spec { +impl crate::Resettable for NVIC_ISER1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser2.rs b/src/ppb/nvic_iser2.rs index f8994c40..03fc4f9c 100644 --- a/src/ppb/nvic_iser2.rs +++ b/src/ppb/nvic_iser2.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISER2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setena { +pub enum SETENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setena) -> Self { + fn from(variant: SETENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setena { +impl crate::FieldSpec for SETENA_A { type Ux = u32; } -impl crate::IsEnum for Setena {} +impl crate::IsEnum for SETENA_A {} #[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SetenaR = crate::FieldReader; -impl SetenaR { +pub type SETENA_R = crate::FieldReader; +impl SETENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setena::Value3), - 1 => Some(Setena::Value4), + 0 => Some(SETENA_A::VALUE3), + 1 => Some(SETENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setena::Value3 + *self == SETENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setena::Value4 + *self == SETENA_A::VALUE4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; -impl<'a, REG> SetenaW<'a, REG> +pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; +impl<'a, REG> SETENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setena::Value3) + self.variant(SETENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setena::Value4) + self.variant(SETENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SetenaR { - SetenaR::new(self.bits) + pub fn setena(&self) -> SETENA_R { + SETENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SetenaW { - SetenaW::new(self, 0) + pub fn setena(&mut self) -> SETENA_W { + SETENA_W::new(self, 0) } } #[doc = "Interrupt Set-enable Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIser2Spec; -impl crate::RegisterSpec for NvicIser2Spec { +pub struct NVIC_ISER2_SPEC; +impl crate::RegisterSpec for NVIC_ISER2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser2::R`](R) reader structure"] -impl crate::Readable for NvicIser2Spec {} +impl crate::Readable for NVIC_ISER2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iser2::W`](W) writer structure"] -impl crate::Writable for NvicIser2Spec { +impl crate::Writable for NVIC_ISER2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER2 to value 0"] -impl crate::Resettable for NvicIser2Spec { +impl crate::Resettable for NVIC_ISER2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_iser3.rs b/src/ppb/nvic_iser3.rs index 91a3f577..6145e912 100644 --- a/src/ppb/nvic_iser3.rs +++ b/src/ppb/nvic_iser3.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISER3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISER3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-enable bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setena { +pub enum SETENA_A { #[doc = "0: interrupt disabled"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt enabled."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setena) -> Self { + fn from(variant: SETENA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setena { +impl crate::FieldSpec for SETENA_A { type Ux = u32; } -impl crate::IsEnum for Setena {} +impl crate::IsEnum for SETENA_A {} #[doc = "Field `SETENA` reader - Interrupt set-enable bits"] -pub type SetenaR = crate::FieldReader; -impl SetenaR { +pub type SETENA_R = crate::FieldReader; +impl SETENA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setena::Value3), - 1 => Some(Setena::Value4), + 0 => Some(SETENA_A::VALUE3), + 1 => Some(SETENA_A::VALUE4), _ => None, } } #[doc = "interrupt disabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setena::Value3 + *self == SETENA_A::VALUE3 } #[doc = "interrupt enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setena::Value4 + *self == SETENA_A::VALUE4 } } #[doc = "Field `SETENA` writer - Interrupt set-enable bits"] -pub type SetenaW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setena>; -impl<'a, REG> SetenaW<'a, REG> +pub type SETENA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETENA_A>; +impl<'a, REG> SETENA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt disabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setena::Value3) + self.variant(SETENA_A::VALUE3) } #[doc = "interrupt enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setena::Value4) + self.variant(SETENA_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - pub fn setena(&self) -> SetenaR { - SetenaR::new(self.bits) + pub fn setena(&self) -> SETENA_R { + SETENA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] #[must_use] - pub fn setena(&mut self) -> SetenaW { - SetenaW::new(self, 0) + pub fn setena(&mut self) -> SETENA_W { + SETENA_W::new(self, 0) } } #[doc = "Interrupt Set-enable Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_iser3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_iser3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIser3Spec; -impl crate::RegisterSpec for NvicIser3Spec { +pub struct NVIC_ISER3_SPEC; +impl crate::RegisterSpec for NVIC_ISER3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_iser3::R`](R) reader structure"] -impl crate::Readable for NvicIser3Spec {} +impl crate::Readable for NVIC_ISER3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_iser3::W`](W) writer structure"] -impl crate::Writable for NvicIser3Spec { +impl crate::Writable for NVIC_ISER3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISER3 to value 0"] -impl crate::Resettable for NvicIser3Spec { +impl crate::Resettable for NVIC_ISER3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr0.rs b/src/ppb/nvic_ispr0.rs index d31d39b4..3bcf8697 100644 --- a/src/ppb/nvic_ispr0.rs +++ b/src/ppb/nvic_ispr0.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setpend { +pub enum SETPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setpend) -> Self { + fn from(variant: SETPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setpend { +impl crate::FieldSpec for SETPEND_A { type Ux = u32; } -impl crate::IsEnum for Setpend {} +impl crate::IsEnum for SETPEND_A {} #[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SetpendR = crate::FieldReader; -impl SetpendR { +pub type SETPEND_R = crate::FieldReader; +impl SETPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setpend::Value3), - 1 => Some(Setpend::Value4), + 0 => Some(SETPEND_A::VALUE3), + 1 => Some(SETPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setpend::Value3 + *self == SETPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setpend::Value4 + *self == SETPEND_A::VALUE4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; -impl<'a, REG> SetpendW<'a, REG> +pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; +impl<'a, REG> SETPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setpend::Value3) + self.variant(SETPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setpend::Value4) + self.variant(SETPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SetpendR { - SetpendR::new(self.bits) + pub fn setpend(&self) -> SETPEND_R { + SETPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SetpendW { - SetpendW::new(self, 0) + pub fn setpend(&mut self) -> SETPEND_W { + SETPEND_W::new(self, 0) } } #[doc = "Interrupt Set-pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIspr0Spec; -impl crate::RegisterSpec for NvicIspr0Spec { +pub struct NVIC_ISPR0_SPEC; +impl crate::RegisterSpec for NVIC_ISPR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr0::R`](R) reader structure"] -impl crate::Readable for NvicIspr0Spec {} +impl crate::Readable for NVIC_ISPR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr0::W`](W) writer structure"] -impl crate::Writable for NvicIspr0Spec { +impl crate::Writable for NVIC_ISPR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR0 to value 0"] -impl crate::Resettable for NvicIspr0Spec { +impl crate::Resettable for NVIC_ISPR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr1.rs b/src/ppb/nvic_ispr1.rs index 381d8432..cb0299a8 100644 --- a/src/ppb/nvic_ispr1.rs +++ b/src/ppb/nvic_ispr1.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setpend { +pub enum SETPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setpend) -> Self { + fn from(variant: SETPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setpend { +impl crate::FieldSpec for SETPEND_A { type Ux = u32; } -impl crate::IsEnum for Setpend {} +impl crate::IsEnum for SETPEND_A {} #[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SetpendR = crate::FieldReader; -impl SetpendR { +pub type SETPEND_R = crate::FieldReader; +impl SETPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setpend::Value3), - 1 => Some(Setpend::Value4), + 0 => Some(SETPEND_A::VALUE3), + 1 => Some(SETPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setpend::Value3 + *self == SETPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setpend::Value4 + *self == SETPEND_A::VALUE4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; -impl<'a, REG> SetpendW<'a, REG> +pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; +impl<'a, REG> SETPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setpend::Value3) + self.variant(SETPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setpend::Value4) + self.variant(SETPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SetpendR { - SetpendR::new(self.bits) + pub fn setpend(&self) -> SETPEND_R { + SETPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SetpendW { - SetpendW::new(self, 0) + pub fn setpend(&mut self) -> SETPEND_W { + SETPEND_W::new(self, 0) } } #[doc = "Interrupt Set-pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIspr1Spec; -impl crate::RegisterSpec for NvicIspr1Spec { +pub struct NVIC_ISPR1_SPEC; +impl crate::RegisterSpec for NVIC_ISPR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr1::R`](R) reader structure"] -impl crate::Readable for NvicIspr1Spec {} +impl crate::Readable for NVIC_ISPR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr1::W`](W) writer structure"] -impl crate::Writable for NvicIspr1Spec { +impl crate::Writable for NVIC_ISPR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR1 to value 0"] -impl crate::Resettable for NvicIspr1Spec { +impl crate::Resettable for NVIC_ISPR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr2.rs b/src/ppb/nvic_ispr2.rs index 84be77b7..f1db28f4 100644 --- a/src/ppb/nvic_ispr2.rs +++ b/src/ppb/nvic_ispr2.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setpend { +pub enum SETPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setpend) -> Self { + fn from(variant: SETPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setpend { +impl crate::FieldSpec for SETPEND_A { type Ux = u32; } -impl crate::IsEnum for Setpend {} +impl crate::IsEnum for SETPEND_A {} #[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SetpendR = crate::FieldReader; -impl SetpendR { +pub type SETPEND_R = crate::FieldReader; +impl SETPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setpend::Value3), - 1 => Some(Setpend::Value4), + 0 => Some(SETPEND_A::VALUE3), + 1 => Some(SETPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setpend::Value3 + *self == SETPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setpend::Value4 + *self == SETPEND_A::VALUE4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; -impl<'a, REG> SetpendW<'a, REG> +pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; +impl<'a, REG> SETPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setpend::Value3) + self.variant(SETPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setpend::Value4) + self.variant(SETPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SetpendR { - SetpendR::new(self.bits) + pub fn setpend(&self) -> SETPEND_R { + SETPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SetpendW { - SetpendW::new(self, 0) + pub fn setpend(&mut self) -> SETPEND_W { + SETPEND_W::new(self, 0) } } #[doc = "Interrupt Set-pending Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIspr2Spec; -impl crate::RegisterSpec for NvicIspr2Spec { +pub struct NVIC_ISPR2_SPEC; +impl crate::RegisterSpec for NVIC_ISPR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr2::R`](R) reader structure"] -impl crate::Readable for NvicIspr2Spec {} +impl crate::Readable for NVIC_ISPR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr2::W`](W) writer structure"] -impl crate::Writable for NvicIspr2Spec { +impl crate::Writable for NVIC_ISPR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR2 to value 0"] -impl crate::Resettable for NvicIspr2Spec { +impl crate::Resettable for NVIC_ISPR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/nvic_ispr3.rs b/src/ppb/nvic_ispr3.rs index cf5a8bba..43c01e7d 100644 --- a/src/ppb/nvic_ispr3.rs +++ b/src/ppb/nvic_ispr3.rs @@ -1,52 +1,52 @@ #[doc = "Register `NVIC_ISPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NVIC_ISPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Interrupt set-pending bits.\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u32)] -pub enum Setpend { +pub enum SETPEND_A { #[doc = "0: interrupt is not pending"] - Value3 = 0, + VALUE3 = 0, #[doc = "1: interrupt is pending."] - Value4 = 1, + VALUE4 = 1, } -impl From for u32 { +impl From for u32 { #[inline(always)] - fn from(variant: Setpend) -> Self { + fn from(variant: SETPEND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Setpend { +impl crate::FieldSpec for SETPEND_A { type Ux = u32; } -impl crate::IsEnum for Setpend {} +impl crate::IsEnum for SETPEND_A {} #[doc = "Field `SETPEND` reader - Interrupt set-pending bits."] -pub type SetpendR = crate::FieldReader; -impl SetpendR { +pub type SETPEND_R = crate::FieldReader; +impl SETPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Setpend::Value3), - 1 => Some(Setpend::Value4), + 0 => Some(SETPEND_A::VALUE3), + 1 => Some(SETPEND_A::VALUE4), _ => None, } } #[doc = "interrupt is not pending"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Setpend::Value3 + *self == SETPEND_A::VALUE3 } #[doc = "interrupt is pending."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Setpend::Value4 + *self == SETPEND_A::VALUE4 } } #[doc = "Field `SETPEND` writer - Interrupt set-pending bits."] -pub type SetpendW<'a, REG> = crate::FieldWriter<'a, REG, 32, Setpend>; -impl<'a, REG> SetpendW<'a, REG> +pub type SETPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, SETPEND_A>; +impl<'a, REG> SETPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,43 +54,43 @@ where #[doc = "interrupt is not pending"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Setpend::Value3) + self.variant(SETPEND_A::VALUE3) } #[doc = "interrupt is pending."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Setpend::Value4) + self.variant(SETPEND_A::VALUE4) } } impl R { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - pub fn setpend(&self) -> SetpendR { - SetpendR::new(self.bits) + pub fn setpend(&self) -> SETPEND_R { + SETPEND_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] #[must_use] - pub fn setpend(&mut self) -> SetpendW { - SetpendW::new(self, 0) + pub fn setpend(&mut self) -> SETPEND_W { + SETPEND_W::new(self, 0) } } #[doc = "Interrupt Set-pending Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nvic_ispr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_ispr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NvicIspr3Spec; -impl crate::RegisterSpec for NvicIspr3Spec { +pub struct NVIC_ISPR3_SPEC; +impl crate::RegisterSpec for NVIC_ISPR3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nvic_ispr3::R`](R) reader structure"] -impl crate::Readable for NvicIspr3Spec {} +impl crate::Readable for NVIC_ISPR3_SPEC {} #[doc = "`write(|w| ..)` method takes [`nvic_ispr3::W`](W) writer structure"] -impl crate::Writable for NvicIspr3Spec { +impl crate::Writable for NVIC_ISPR3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NVIC_ISPR3 to value 0"] -impl crate::Resettable for NvicIspr3Spec { +impl crate::Resettable for NVIC_ISPR3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/scr.rs b/src/ppb/scr.rs index a2a02833..34612da7 100644 --- a/src/ppb/scr.rs +++ b/src/ppb/scr.rs @@ -1,217 +1,217 @@ #[doc = "Register `SCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Sleep on Exit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sleeponexit { +pub enum SLEEPONEXIT_A { #[doc = "0: do not sleep when returning to Thread mode."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enter sleep, or deep sleep, on return from an ISR."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sleeponexit) -> Self { + fn from(variant: SLEEPONEXIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLEEPONEXIT` reader - Sleep on Exit"] -pub type SleeponexitR = crate::BitReader; -impl SleeponexitR { +pub type SLEEPONEXIT_R = crate::BitReader; +impl SLEEPONEXIT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sleeponexit { + pub const fn variant(&self) -> SLEEPONEXIT_A { match self.bits { - false => Sleeponexit::Value1, - true => Sleeponexit::Value2, + false => SLEEPONEXIT_A::VALUE1, + true => SLEEPONEXIT_A::VALUE2, } } #[doc = "do not sleep when returning to Thread mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sleeponexit::Value1 + *self == SLEEPONEXIT_A::VALUE1 } #[doc = "enter sleep, or deep sleep, on return from an ISR."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sleeponexit::Value2 + *self == SLEEPONEXIT_A::VALUE2 } } #[doc = "Field `SLEEPONEXIT` writer - Sleep on Exit"] -pub type SleeponexitW<'a, REG> = crate::BitWriter<'a, REG, Sleeponexit>; -impl<'a, REG> SleeponexitW<'a, REG> +pub type SLEEPONEXIT_W<'a, REG> = crate::BitWriter<'a, REG, SLEEPONEXIT_A>; +impl<'a, REG> SLEEPONEXIT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "do not sleep when returning to Thread mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sleeponexit::Value1) + self.variant(SLEEPONEXIT_A::VALUE1) } #[doc = "enter sleep, or deep sleep, on return from an ISR."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sleeponexit::Value2) + self.variant(SLEEPONEXIT_A::VALUE2) } } #[doc = "Sleep or Deep Sleep\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sleepdeep { +pub enum SLEEPDEEP_A { #[doc = "0: sleep"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: deep sleep"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sleepdeep) -> Self { + fn from(variant: SLEEPDEEP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLEEPDEEP` reader - Sleep or Deep Sleep"] -pub type SleepdeepR = crate::BitReader; -impl SleepdeepR { +pub type SLEEPDEEP_R = crate::BitReader; +impl SLEEPDEEP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sleepdeep { + pub const fn variant(&self) -> SLEEPDEEP_A { match self.bits { - false => Sleepdeep::Value1, - true => Sleepdeep::Value2, + false => SLEEPDEEP_A::VALUE1, + true => SLEEPDEEP_A::VALUE2, } } #[doc = "sleep"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sleepdeep::Value1 + *self == SLEEPDEEP_A::VALUE1 } #[doc = "deep sleep"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sleepdeep::Value2 + *self == SLEEPDEEP_A::VALUE2 } } #[doc = "Field `SLEEPDEEP` writer - Sleep or Deep Sleep"] -pub type SleepdeepW<'a, REG> = crate::BitWriter<'a, REG, Sleepdeep>; -impl<'a, REG> SleepdeepW<'a, REG> +pub type SLEEPDEEP_W<'a, REG> = crate::BitWriter<'a, REG, SLEEPDEEP_A>; +impl<'a, REG> SLEEPDEEP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "sleep"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sleepdeep::Value1) + self.variant(SLEEPDEEP_A::VALUE1) } #[doc = "deep sleep"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sleepdeep::Value2) + self.variant(SLEEPDEEP_A::VALUE2) } } #[doc = "Send Event on Pending bit:\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sevonpend { +pub enum SEVONPEND_A { #[doc = "0: only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sevonpend) -> Self { + fn from(variant: SEVONPEND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEVONPEND` reader - Send Event on Pending bit:"] -pub type SevonpendR = crate::BitReader; -impl SevonpendR { +pub type SEVONPEND_R = crate::BitReader; +impl SEVONPEND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sevonpend { + pub const fn variant(&self) -> SEVONPEND_A { match self.bits { - false => Sevonpend::Value1, - true => Sevonpend::Value2, + false => SEVONPEND_A::VALUE1, + true => SEVONPEND_A::VALUE2, } } #[doc = "only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sevonpend::Value1 + *self == SEVONPEND_A::VALUE1 } #[doc = "enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sevonpend::Value2 + *self == SEVONPEND_A::VALUE2 } } #[doc = "Field `SEVONPEND` writer - Send Event on Pending bit:"] -pub type SevonpendW<'a, REG> = crate::BitWriter<'a, REG, Sevonpend>; -impl<'a, REG> SevonpendW<'a, REG> +pub type SEVONPEND_W<'a, REG> = crate::BitWriter<'a, REG, SEVONPEND_A>; +impl<'a, REG> SEVONPEND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sevonpend::Value1) + self.variant(SEVONPEND_A::VALUE1) } #[doc = "enabled events and all interrupts, including disabled interrupts, can wakeup the processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sevonpend::Value2) + self.variant(SEVONPEND_A::VALUE2) } } impl R { #[doc = "Bit 1 - Sleep on Exit"] #[inline(always)] - pub fn sleeponexit(&self) -> SleeponexitR { - SleeponexitR::new(((self.bits >> 1) & 1) != 0) + pub fn sleeponexit(&self) -> SLEEPONEXIT_R { + SLEEPONEXIT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Sleep or Deep Sleep"] #[inline(always)] - pub fn sleepdeep(&self) -> SleepdeepR { - SleepdeepR::new(((self.bits >> 2) & 1) != 0) + pub fn sleepdeep(&self) -> SLEEPDEEP_R { + SLEEPDEEP_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Send Event on Pending bit:"] #[inline(always)] - pub fn sevonpend(&self) -> SevonpendR { - SevonpendR::new(((self.bits >> 4) & 1) != 0) + pub fn sevonpend(&self) -> SEVONPEND_R { + SEVONPEND_R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 1 - Sleep on Exit"] #[inline(always)] #[must_use] - pub fn sleeponexit(&mut self) -> SleeponexitW { - SleeponexitW::new(self, 1) + pub fn sleeponexit(&mut self) -> SLEEPONEXIT_W { + SLEEPONEXIT_W::new(self, 1) } #[doc = "Bit 2 - Sleep or Deep Sleep"] #[inline(always)] #[must_use] - pub fn sleepdeep(&mut self) -> SleepdeepW { - SleepdeepW::new(self, 2) + pub fn sleepdeep(&mut self) -> SLEEPDEEP_W { + SLEEPDEEP_W::new(self, 2) } #[doc = "Bit 4 - Send Event on Pending bit:"] #[inline(always)] #[must_use] - pub fn sevonpend(&mut self) -> SevonpendW { - SevonpendW::new(self, 4) + pub fn sevonpend(&mut self) -> SEVONPEND_W { + SEVONPEND_W::new(self, 4) } } #[doc = "System Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ScrSpec; -impl crate::RegisterSpec for ScrSpec { +pub struct SCR_SPEC; +impl crate::RegisterSpec for SCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`scr::R`](R) reader structure"] -impl crate::Readable for ScrSpec {} +impl crate::Readable for SCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`scr::W`](W) writer structure"] -impl crate::Writable for ScrSpec { +impl crate::Writable for SCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCR to value 0"] -impl crate::Resettable for ScrSpec { +impl crate::Resettable for SCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shcsr.rs b/src/ppb/shcsr.rs index 994a708b..54862cc3 100644 --- a/src/ppb/shcsr.rs +++ b/src/ppb/shcsr.rs @@ -1,235 +1,235 @@ #[doc = "Register `SHCSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHCSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MEMFAULTACT` reader - MemManage exception active bit"] -pub type MemfaultactR = crate::BitReader; +pub type MEMFAULTACT_R = crate::BitReader; #[doc = "Field `MEMFAULTACT` writer - MemManage exception active bit"] -pub type MemfaultactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MEMFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTACT` reader - BusFault exception active bit"] -pub type BusfaultactR = crate::BitReader; +pub type BUSFAULTACT_R = crate::BitReader; #[doc = "Field `BUSFAULTACT` writer - BusFault exception active bit"] -pub type BusfaultactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BUSFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTACT` reader - UsageFault exception active bit"] -pub type UsgfaultactR = crate::BitReader; +pub type USGFAULTACT_R = crate::BitReader; #[doc = "Field `USGFAULTACT` writer - UsageFault exception active bit"] -pub type UsgfaultactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USGFAULTACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SVCALLACT` reader - SVCall active bit"] -pub type SvcallactR = crate::BitReader; +pub type SVCALLACT_R = crate::BitReader; #[doc = "Field `SVCALLACT` writer - SVCall active bit"] -pub type SvcallactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SVCALLACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MONITORACT` reader - Debug monitor active bit"] -pub type MonitoractR = crate::BitReader; +pub type MONITORACT_R = crate::BitReader; #[doc = "Field `MONITORACT` writer - Debug monitor active bit"] -pub type MonitoractW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MONITORACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PENDSVACT` reader - PendSV exception active bit"] -pub type PendsvactR = crate::BitReader; +pub type PENDSVACT_R = crate::BitReader; #[doc = "Field `PENDSVACT` writer - PendSV exception active bit"] -pub type PendsvactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PENDSVACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SYSTICKACT` reader - SysTick exception active bit"] -pub type SystickactR = crate::BitReader; +pub type SYSTICKACT_R = crate::BitReader; #[doc = "Field `SYSTICKACT` writer - SysTick exception active bit"] -pub type SystickactW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SYSTICKACT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTPENDED` reader - UsageFault exception pending bit"] -pub type UsgfaultpendedR = crate::BitReader; +pub type USGFAULTPENDED_R = crate::BitReader; #[doc = "Field `USGFAULTPENDED` writer - UsageFault exception pending bit"] -pub type UsgfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USGFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MEMFAULTPENDED` reader - MemManage exception pending bit"] -pub type MemfaultpendedR = crate::BitReader; +pub type MEMFAULTPENDED_R = crate::BitReader; #[doc = "Field `MEMFAULTPENDED` writer - MemManage exception pending bit"] -pub type MemfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MEMFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTPENDED` reader - BusFault exception pending bit"] -pub type BusfaultpendedR = crate::BitReader; +pub type BUSFAULTPENDED_R = crate::BitReader; #[doc = "Field `BUSFAULTPENDED` writer - BusFault exception pending bit"] -pub type BusfaultpendedW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BUSFAULTPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SVCALLPENDED` reader - SVCall pending bit"] -pub type SvcallpendedR = crate::BitReader; +pub type SVCALLPENDED_R = crate::BitReader; #[doc = "Field `SVCALLPENDED` writer - SVCall pending bit"] -pub type SvcallpendedW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SVCALLPENDED_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MEMFAULTENA` reader - MemManage enable bit"] -pub type MemfaultenaR = crate::BitReader; +pub type MEMFAULTENA_R = crate::BitReader; #[doc = "Field `MEMFAULTENA` writer - MemManage enable bit"] -pub type MemfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MEMFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BUSFAULTENA` reader - BusFault enable bit"] -pub type BusfaultenaR = crate::BitReader; +pub type BUSFAULTENA_R = crate::BitReader; #[doc = "Field `BUSFAULTENA` writer - BusFault enable bit"] -pub type BusfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BUSFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USGFAULTENA` reader - UsageFault enable bit"] -pub type UsgfaultenaR = crate::BitReader; +pub type USGFAULTENA_R = crate::BitReader; #[doc = "Field `USGFAULTENA` writer - UsageFault enable bit"] -pub type UsgfaultenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USGFAULTENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - MemManage exception active bit"] #[inline(always)] - pub fn memfaultact(&self) -> MemfaultactR { - MemfaultactR::new((self.bits & 1) != 0) + pub fn memfaultact(&self) -> MEMFAULTACT_R { + MEMFAULTACT_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - BusFault exception active bit"] #[inline(always)] - pub fn busfaultact(&self) -> BusfaultactR { - BusfaultactR::new(((self.bits >> 1) & 1) != 0) + pub fn busfaultact(&self) -> BUSFAULTACT_R { + BUSFAULTACT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - UsageFault exception active bit"] #[inline(always)] - pub fn usgfaultact(&self) -> UsgfaultactR { - UsgfaultactR::new(((self.bits >> 3) & 1) != 0) + pub fn usgfaultact(&self) -> USGFAULTACT_R { + USGFAULTACT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - SVCall active bit"] #[inline(always)] - pub fn svcallact(&self) -> SvcallactR { - SvcallactR::new(((self.bits >> 7) & 1) != 0) + pub fn svcallact(&self) -> SVCALLACT_R { + SVCALLACT_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Debug monitor active bit"] #[inline(always)] - pub fn monitoract(&self) -> MonitoractR { - MonitoractR::new(((self.bits >> 8) & 1) != 0) + pub fn monitoract(&self) -> MONITORACT_R { + MONITORACT_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - PendSV exception active bit"] #[inline(always)] - pub fn pendsvact(&self) -> PendsvactR { - PendsvactR::new(((self.bits >> 10) & 1) != 0) + pub fn pendsvact(&self) -> PENDSVACT_R { + PENDSVACT_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - SysTick exception active bit"] #[inline(always)] - pub fn systickact(&self) -> SystickactR { - SystickactR::new(((self.bits >> 11) & 1) != 0) + pub fn systickact(&self) -> SYSTICKACT_R { + SYSTICKACT_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - UsageFault exception pending bit"] #[inline(always)] - pub fn usgfaultpended(&self) -> UsgfaultpendedR { - UsgfaultpendedR::new(((self.bits >> 12) & 1) != 0) + pub fn usgfaultpended(&self) -> USGFAULTPENDED_R { + USGFAULTPENDED_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - MemManage exception pending bit"] #[inline(always)] - pub fn memfaultpended(&self) -> MemfaultpendedR { - MemfaultpendedR::new(((self.bits >> 13) & 1) != 0) + pub fn memfaultpended(&self) -> MEMFAULTPENDED_R { + MEMFAULTPENDED_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - BusFault exception pending bit"] #[inline(always)] - pub fn busfaultpended(&self) -> BusfaultpendedR { - BusfaultpendedR::new(((self.bits >> 14) & 1) != 0) + pub fn busfaultpended(&self) -> BUSFAULTPENDED_R { + BUSFAULTPENDED_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - SVCall pending bit"] #[inline(always)] - pub fn svcallpended(&self) -> SvcallpendedR { - SvcallpendedR::new(((self.bits >> 15) & 1) != 0) + pub fn svcallpended(&self) -> SVCALLPENDED_R { + SVCALLPENDED_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - MemManage enable bit"] #[inline(always)] - pub fn memfaultena(&self) -> MemfaultenaR { - MemfaultenaR::new(((self.bits >> 16) & 1) != 0) + pub fn memfaultena(&self) -> MEMFAULTENA_R { + MEMFAULTENA_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - BusFault enable bit"] #[inline(always)] - pub fn busfaultena(&self) -> BusfaultenaR { - BusfaultenaR::new(((self.bits >> 17) & 1) != 0) + pub fn busfaultena(&self) -> BUSFAULTENA_R { + BUSFAULTENA_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - UsageFault enable bit"] #[inline(always)] - pub fn usgfaultena(&self) -> UsgfaultenaR { - UsgfaultenaR::new(((self.bits >> 18) & 1) != 0) + pub fn usgfaultena(&self) -> USGFAULTENA_R { + USGFAULTENA_R::new(((self.bits >> 18) & 1) != 0) } } impl W { #[doc = "Bit 0 - MemManage exception active bit"] #[inline(always)] #[must_use] - pub fn memfaultact(&mut self) -> MemfaultactW { - MemfaultactW::new(self, 0) + pub fn memfaultact(&mut self) -> MEMFAULTACT_W { + MEMFAULTACT_W::new(self, 0) } #[doc = "Bit 1 - BusFault exception active bit"] #[inline(always)] #[must_use] - pub fn busfaultact(&mut self) -> BusfaultactW { - BusfaultactW::new(self, 1) + pub fn busfaultact(&mut self) -> BUSFAULTACT_W { + BUSFAULTACT_W::new(self, 1) } #[doc = "Bit 3 - UsageFault exception active bit"] #[inline(always)] #[must_use] - pub fn usgfaultact(&mut self) -> UsgfaultactW { - UsgfaultactW::new(self, 3) + pub fn usgfaultact(&mut self) -> USGFAULTACT_W { + USGFAULTACT_W::new(self, 3) } #[doc = "Bit 7 - SVCall active bit"] #[inline(always)] #[must_use] - pub fn svcallact(&mut self) -> SvcallactW { - SvcallactW::new(self, 7) + pub fn svcallact(&mut self) -> SVCALLACT_W { + SVCALLACT_W::new(self, 7) } #[doc = "Bit 8 - Debug monitor active bit"] #[inline(always)] #[must_use] - pub fn monitoract(&mut self) -> MonitoractW { - MonitoractW::new(self, 8) + pub fn monitoract(&mut self) -> MONITORACT_W { + MONITORACT_W::new(self, 8) } #[doc = "Bit 10 - PendSV exception active bit"] #[inline(always)] #[must_use] - pub fn pendsvact(&mut self) -> PendsvactW { - PendsvactW::new(self, 10) + pub fn pendsvact(&mut self) -> PENDSVACT_W { + PENDSVACT_W::new(self, 10) } #[doc = "Bit 11 - SysTick exception active bit"] #[inline(always)] #[must_use] - pub fn systickact(&mut self) -> SystickactW { - SystickactW::new(self, 11) + pub fn systickact(&mut self) -> SYSTICKACT_W { + SYSTICKACT_W::new(self, 11) } #[doc = "Bit 12 - UsageFault exception pending bit"] #[inline(always)] #[must_use] - pub fn usgfaultpended(&mut self) -> UsgfaultpendedW { - UsgfaultpendedW::new(self, 12) + pub fn usgfaultpended(&mut self) -> USGFAULTPENDED_W { + USGFAULTPENDED_W::new(self, 12) } #[doc = "Bit 13 - MemManage exception pending bit"] #[inline(always)] #[must_use] - pub fn memfaultpended(&mut self) -> MemfaultpendedW { - MemfaultpendedW::new(self, 13) + pub fn memfaultpended(&mut self) -> MEMFAULTPENDED_W { + MEMFAULTPENDED_W::new(self, 13) } #[doc = "Bit 14 - BusFault exception pending bit"] #[inline(always)] #[must_use] - pub fn busfaultpended(&mut self) -> BusfaultpendedW { - BusfaultpendedW::new(self, 14) + pub fn busfaultpended(&mut self) -> BUSFAULTPENDED_W { + BUSFAULTPENDED_W::new(self, 14) } #[doc = "Bit 15 - SVCall pending bit"] #[inline(always)] #[must_use] - pub fn svcallpended(&mut self) -> SvcallpendedW { - SvcallpendedW::new(self, 15) + pub fn svcallpended(&mut self) -> SVCALLPENDED_W { + SVCALLPENDED_W::new(self, 15) } #[doc = "Bit 16 - MemManage enable bit"] #[inline(always)] #[must_use] - pub fn memfaultena(&mut self) -> MemfaultenaW { - MemfaultenaW::new(self, 16) + pub fn memfaultena(&mut self) -> MEMFAULTENA_W { + MEMFAULTENA_W::new(self, 16) } #[doc = "Bit 17 - BusFault enable bit"] #[inline(always)] #[must_use] - pub fn busfaultena(&mut self) -> BusfaultenaW { - BusfaultenaW::new(self, 17) + pub fn busfaultena(&mut self) -> BUSFAULTENA_W { + BUSFAULTENA_W::new(self, 17) } #[doc = "Bit 18 - UsageFault enable bit"] #[inline(always)] #[must_use] - pub fn usgfaultena(&mut self) -> UsgfaultenaW { - UsgfaultenaW::new(self, 18) + pub fn usgfaultena(&mut self) -> USGFAULTENA_W { + USGFAULTENA_W::new(self, 18) } } #[doc = "System Handler Control and State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ShcsrSpec; -impl crate::RegisterSpec for ShcsrSpec { +pub struct SHCSR_SPEC; +impl crate::RegisterSpec for SHCSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`shcsr::R`](R) reader structure"] -impl crate::Readable for ShcsrSpec {} +impl crate::Readable for SHCSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`shcsr::W`](W) writer structure"] -impl crate::Writable for ShcsrSpec { +impl crate::Writable for SHCSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHCSR to value 0"] -impl crate::Resettable for ShcsrSpec { +impl crate::Resettable for SHCSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr1.rs b/src/ppb/shpr1.rs index 218cb241..b2eefba9 100644 --- a/src/ppb/shpr1.rs +++ b/src/ppb/shpr1.rs @@ -1,70 +1,70 @@ #[doc = "Register `SHPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_4` reader - Priority of system handler 4, MemManage"] -pub type Pri4R = crate::FieldReader; +pub type PRI_4_R = crate::FieldReader; #[doc = "Field `PRI_4` writer - Priority of system handler 4, MemManage"] -pub type Pri4W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_5` reader - Priority of system handler 5, BusFault"] -pub type Pri5R = crate::FieldReader; +pub type PRI_5_R = crate::FieldReader; #[doc = "Field `PRI_5` writer - Priority of system handler 5, BusFault"] -pub type Pri5W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_6` reader - Priority of system handler 6, UsageFault"] -pub type Pri6R = crate::FieldReader; +pub type PRI_6_R = crate::FieldReader; #[doc = "Field `PRI_6` writer - Priority of system handler 6, UsageFault"] -pub type Pri6W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_6_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"] #[inline(always)] - pub fn pri_4(&self) -> Pri4R { - Pri4R::new((self.bits & 0xff) as u8) + pub fn pri_4(&self) -> PRI_4_R { + PRI_4_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"] #[inline(always)] - pub fn pri_5(&self) -> Pri5R { - Pri5R::new(((self.bits >> 8) & 0xff) as u8) + pub fn pri_5(&self) -> PRI_5_R { + PRI_5_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"] #[inline(always)] - pub fn pri_6(&self) -> Pri6R { - Pri6R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_6(&self) -> PRI_6_R { + PRI_6_R::new(((self.bits >> 16) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"] #[inline(always)] #[must_use] - pub fn pri_4(&mut self) -> Pri4W { - Pri4W::new(self, 0) + pub fn pri_4(&mut self) -> PRI_4_W { + PRI_4_W::new(self, 0) } #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"] #[inline(always)] #[must_use] - pub fn pri_5(&mut self) -> Pri5W { - Pri5W::new(self, 8) + pub fn pri_5(&mut self) -> PRI_5_W { + PRI_5_W::new(self, 8) } #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"] #[inline(always)] #[must_use] - pub fn pri_6(&mut self) -> Pri6W { - Pri6W::new(self, 16) + pub fn pri_6(&mut self) -> PRI_6_W { + PRI_6_W::new(self, 16) } } #[doc = "System Handler Priority Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Shpr1Spec; -impl crate::RegisterSpec for Shpr1Spec { +pub struct SHPR1_SPEC; +impl crate::RegisterSpec for SHPR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`shpr1::R`](R) reader structure"] -impl crate::Readable for Shpr1Spec {} +impl crate::Readable for SHPR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`shpr1::W`](W) writer structure"] -impl crate::Writable for Shpr1Spec { +impl crate::Writable for SHPR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR1 to value 0"] -impl crate::Resettable for Shpr1Spec { +impl crate::Resettable for SHPR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr2.rs b/src/ppb/shpr2.rs index 9df98516..da6d23f4 100644 --- a/src/ppb/shpr2.rs +++ b/src/ppb/shpr2.rs @@ -1,40 +1,40 @@ #[doc = "Register `SHPR2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_11` reader - Priority of system handler 11, SVCall"] -pub type Pri11R = crate::FieldReader; +pub type PRI_11_R = crate::FieldReader; #[doc = "Field `PRI_11` writer - Priority of system handler 11, SVCall"] -pub type Pri11W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_11_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"] #[inline(always)] - pub fn pri_11(&self) -> Pri11R { - Pri11R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_11(&self) -> PRI_11_R { + PRI_11_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"] #[inline(always)] #[must_use] - pub fn pri_11(&mut self) -> Pri11W { - Pri11W::new(self, 24) + pub fn pri_11(&mut self) -> PRI_11_W { + PRI_11_W::new(self, 24) } } #[doc = "System Handler Priority Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Shpr2Spec; -impl crate::RegisterSpec for Shpr2Spec { +pub struct SHPR2_SPEC; +impl crate::RegisterSpec for SHPR2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`shpr2::R`](R) reader structure"] -impl crate::Readable for Shpr2Spec {} +impl crate::Readable for SHPR2_SPEC {} #[doc = "`write(|w| ..)` method takes [`shpr2::W`](W) writer structure"] -impl crate::Writable for Shpr2Spec { +impl crate::Writable for SHPR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR2 to value 0"] -impl crate::Resettable for Shpr2Spec { +impl crate::Resettable for SHPR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/shpr3.rs b/src/ppb/shpr3.rs index e1faf7cd..56ec2423 100644 --- a/src/ppb/shpr3.rs +++ b/src/ppb/shpr3.rs @@ -1,55 +1,55 @@ #[doc = "Register `SHPR3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SHPR3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PRI_14` reader - Priority of system handler 14"] -pub type Pri14R = crate::FieldReader; +pub type PRI_14_R = crate::FieldReader; #[doc = "Field `PRI_14` writer - Priority of system handler 14"] -pub type Pri14W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_14_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRI_15` reader - Priority of system handler 15"] -pub type Pri15R = crate::FieldReader; +pub type PRI_15_R = crate::FieldReader; #[doc = "Field `PRI_15` writer - Priority of system handler 15"] -pub type Pri15W<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PRI_15_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bits 16:23 - Priority of system handler 14"] #[inline(always)] - pub fn pri_14(&self) -> Pri14R { - Pri14R::new(((self.bits >> 16) & 0xff) as u8) + pub fn pri_14(&self) -> PRI_14_R { + PRI_14_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Priority of system handler 15"] #[inline(always)] - pub fn pri_15(&self) -> Pri15R { - Pri15R::new(((self.bits >> 24) & 0xff) as u8) + pub fn pri_15(&self) -> PRI_15_R { + PRI_15_R::new(((self.bits >> 24) & 0xff) as u8) } } impl W { #[doc = "Bits 16:23 - Priority of system handler 14"] #[inline(always)] #[must_use] - pub fn pri_14(&mut self) -> Pri14W { - Pri14W::new(self, 16) + pub fn pri_14(&mut self) -> PRI_14_W { + PRI_14_W::new(self, 16) } #[doc = "Bits 24:31 - Priority of system handler 15"] #[inline(always)] #[must_use] - pub fn pri_15(&mut self) -> Pri15W { - Pri15W::new(self, 24) + pub fn pri_15(&mut self) -> PRI_15_W { + PRI_15_W::new(self, 24) } } #[doc = "System Handler Priority Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`shpr3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`shpr3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Shpr3Spec; -impl crate::RegisterSpec for Shpr3Spec { +pub struct SHPR3_SPEC; +impl crate::RegisterSpec for SHPR3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`shpr3::R`](R) reader structure"] -impl crate::Readable for Shpr3Spec {} +impl crate::Readable for SHPR3_SPEC {} #[doc = "`write(|w| ..)` method takes [`shpr3::W`](W) writer structure"] -impl crate::Writable for Shpr3Spec { +impl crate::Writable for SHPR3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SHPR3 to value 0"] -impl crate::Resettable for Shpr3Spec { +impl crate::Resettable for SHPR3_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/stir.rs b/src/ppb/stir.rs index 21115520..4b715a26 100644 --- a/src/ppb/stir.rs +++ b/src/ppb/stir.rs @@ -1,27 +1,27 @@ #[doc = "Register `STIR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INTID` writer - Interrupt ID of the interrupt to trigger"] -pub type IntidW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +pub type INTID_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl W { #[doc = "Bits 0:8 - Interrupt ID of the interrupt to trigger"] #[inline(always)] #[must_use] - pub fn intid(&mut self) -> IntidW { - IntidW::new(self, 0) + pub fn intid(&mut self) -> INTID_W { + INTID_W::new(self, 0) } } #[doc = "Software Trigger Interrupt Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stir::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StirSpec; -impl crate::RegisterSpec for StirSpec { +pub struct STIR_SPEC; +impl crate::RegisterSpec for STIR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`stir::W`](W) writer structure"] -impl crate::Writable for StirSpec { +impl crate::Writable for STIR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STIR to value 0"] -impl crate::Resettable for StirSpec { +impl crate::Resettable for STIR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/syst_calib.rs b/src/ppb/syst_calib.rs index 087972d7..f70e2384 100644 --- a/src/ppb/syst_calib.rs +++ b/src/ppb/syst_calib.rs @@ -1,168 +1,168 @@ #[doc = "Register `SYST_CALIB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CALIB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TENMS` reader - Ten Milliseconds Reload Value"] -pub type TenmsR = crate::FieldReader; +pub type TENMS_R = crate::FieldReader; #[doc = "Field `TENMS` writer - Ten Milliseconds Reload Value"] -pub type TenmsW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; +pub type TENMS_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; #[doc = "Ten Milliseconds Skewed\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Skew { +pub enum SKEW_A { #[doc = "0: TENMS value is exact"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: TENMS value is inexact, or not given."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Skew) -> Self { + fn from(variant: SKEW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SKEW` reader - Ten Milliseconds Skewed"] -pub type SkewR = crate::BitReader; -impl SkewR { +pub type SKEW_R = crate::BitReader; +impl SKEW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Skew { + pub const fn variant(&self) -> SKEW_A { match self.bits { - false => Skew::Value1, - true => Skew::Value2, + false => SKEW_A::VALUE1, + true => SKEW_A::VALUE2, } } #[doc = "TENMS value is exact"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Skew::Value1 + *self == SKEW_A::VALUE1 } #[doc = "TENMS value is inexact, or not given."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Skew::Value2 + *self == SKEW_A::VALUE2 } } #[doc = "Field `SKEW` writer - Ten Milliseconds Skewed"] -pub type SkewW<'a, REG> = crate::BitWriter<'a, REG, Skew>; -impl<'a, REG> SkewW<'a, REG> +pub type SKEW_W<'a, REG> = crate::BitWriter<'a, REG, SKEW_A>; +impl<'a, REG> SKEW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "TENMS value is exact"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Skew::Value1) + self.variant(SKEW_A::VALUE1) } #[doc = "TENMS value is inexact, or not given."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Skew::Value2) + self.variant(SKEW_A::VALUE2) } } #[doc = "No Reference Clock\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Noref { +pub enum NOREF_A { #[doc = "0: reference clock provided"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: no reference clock provided."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Noref) -> Self { + fn from(variant: NOREF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NOREF` reader - No Reference Clock"] -pub type NorefR = crate::BitReader; -impl NorefR { +pub type NOREF_R = crate::BitReader; +impl NOREF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Noref { + pub const fn variant(&self) -> NOREF_A { match self.bits { - false => Noref::Value1, - true => Noref::Value2, + false => NOREF_A::VALUE1, + true => NOREF_A::VALUE2, } } #[doc = "reference clock provided"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Noref::Value1 + *self == NOREF_A::VALUE1 } #[doc = "no reference clock provided."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Noref::Value2 + *self == NOREF_A::VALUE2 } } #[doc = "Field `NOREF` writer - No Reference Clock"] -pub type NorefW<'a, REG> = crate::BitWriter<'a, REG, Noref>; -impl<'a, REG> NorefW<'a, REG> +pub type NOREF_W<'a, REG> = crate::BitWriter<'a, REG, NOREF_A>; +impl<'a, REG> NOREF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "reference clock provided"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Noref::Value1) + self.variant(NOREF_A::VALUE1) } #[doc = "no reference clock provided."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Noref::Value2) + self.variant(NOREF_A::VALUE2) } } impl R { #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"] #[inline(always)] - pub fn tenms(&self) -> TenmsR { - TenmsR::new(self.bits & 0x00ff_ffff) + pub fn tenms(&self) -> TENMS_R { + TENMS_R::new(self.bits & 0x00ff_ffff) } #[doc = "Bit 30 - Ten Milliseconds Skewed"] #[inline(always)] - pub fn skew(&self) -> SkewR { - SkewR::new(((self.bits >> 30) & 1) != 0) + pub fn skew(&self) -> SKEW_R { + SKEW_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - No Reference Clock"] #[inline(always)] - pub fn noref(&self) -> NorefR { - NorefR::new(((self.bits >> 31) & 1) != 0) + pub fn noref(&self) -> NOREF_R { + NOREF_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"] #[inline(always)] #[must_use] - pub fn tenms(&mut self) -> TenmsW { - TenmsW::new(self, 0) + pub fn tenms(&mut self) -> TENMS_W { + TENMS_W::new(self, 0) } #[doc = "Bit 30 - Ten Milliseconds Skewed"] #[inline(always)] #[must_use] - pub fn skew(&mut self) -> SkewW { - SkewW::new(self, 30) + pub fn skew(&mut self) -> SKEW_W { + SKEW_W::new(self, 30) } #[doc = "Bit 31 - No Reference Clock"] #[inline(always)] #[must_use] - pub fn noref(&mut self) -> NorefW { - NorefW::new(self, 31) + pub fn noref(&mut self) -> NOREF_W { + NOREF_W::new(self, 31) } } #[doc = "SysTick Calibration Value Register r\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_calib::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_calib::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SystCalibSpec; -impl crate::RegisterSpec for SystCalibSpec { +pub struct SYST_CALIB_SPEC; +impl crate::RegisterSpec for SYST_CALIB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`syst_calib::R`](R) reader structure"] -impl crate::Readable for SystCalibSpec {} +impl crate::Readable for SYST_CALIB_SPEC {} #[doc = "`write(|w| ..)` method takes [`syst_calib::W`](W) writer structure"] -impl crate::Writable for SystCalibSpec { +impl crate::Writable for SYST_CALIB_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CALIB to value 0xc000_0000"] -impl crate::Resettable for SystCalibSpec { +impl crate::Resettable for SYST_CALIB_SPEC { const RESET_VALUE: u32 = 0xc000_0000; } diff --git a/src/ppb/syst_csr.rs b/src/ppb/syst_csr.rs index a2d70674..090cbcef 100644 --- a/src/ppb/syst_csr.rs +++ b/src/ppb/syst_csr.rs @@ -1,232 +1,232 @@ #[doc = "Register `SYST_CSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enable { +pub enum ENABLE_A { #[doc = "0: counter disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: counter enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enable) -> Self { + fn from(variant: ENABLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENABLE` reader - Enable"] -pub type EnableR = crate::BitReader; -impl EnableR { +pub type ENABLE_R = crate::BitReader; +impl ENABLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enable { + pub const fn variant(&self) -> ENABLE_A { match self.bits { - false => Enable::Value1, - true => Enable::Value2, + false => ENABLE_A::VALUE1, + true => ENABLE_A::VALUE2, } } #[doc = "counter disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enable::Value1 + *self == ENABLE_A::VALUE1 } #[doc = "counter enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enable::Value2 + *self == ENABLE_A::VALUE2 } } #[doc = "Field `ENABLE` writer - Enable"] -pub type EnableW<'a, REG> = crate::BitWriter<'a, REG, Enable>; -impl<'a, REG> EnableW<'a, REG> +pub type ENABLE_W<'a, REG> = crate::BitWriter<'a, REG, ENABLE_A>; +impl<'a, REG> ENABLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "counter disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enable::Value1) + self.variant(ENABLE_A::VALUE1) } #[doc = "counter enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enable::Value2) + self.variant(ENABLE_A::VALUE2) } } #[doc = "Tick Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tickint { +pub enum TICKINT_A { #[doc = "0: counting down to zero does not assert the SysTick exception request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: counting down to zero to asserts the SysTick exception request."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tickint) -> Self { + fn from(variant: TICKINT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TICKINT` reader - Tick Interrupt Enable"] -pub type TickintR = crate::BitReader; -impl TickintR { +pub type TICKINT_R = crate::BitReader; +impl TICKINT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tickint { + pub const fn variant(&self) -> TICKINT_A { match self.bits { - false => Tickint::Value1, - true => Tickint::Value2, + false => TICKINT_A::VALUE1, + true => TICKINT_A::VALUE2, } } #[doc = "counting down to zero does not assert the SysTick exception request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tickint::Value1 + *self == TICKINT_A::VALUE1 } #[doc = "counting down to zero to asserts the SysTick exception request."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tickint::Value2 + *self == TICKINT_A::VALUE2 } } #[doc = "Field `TICKINT` writer - Tick Interrupt Enable"] -pub type TickintW<'a, REG> = crate::BitWriter<'a, REG, Tickint>; -impl<'a, REG> TickintW<'a, REG> +pub type TICKINT_W<'a, REG> = crate::BitWriter<'a, REG, TICKINT_A>; +impl<'a, REG> TICKINT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "counting down to zero does not assert the SysTick exception request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tickint::Value1) + self.variant(TICKINT_A::VALUE1) } #[doc = "counting down to zero to asserts the SysTick exception request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tickint::Value2) + self.variant(TICKINT_A::VALUE2) } } #[doc = "Indicates the clock source:\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Clksource { +pub enum CLKSOURCE_A { #[doc = "0: external clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: processor clock."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Clksource) -> Self { + fn from(variant: CLKSOURCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CLKSOURCE` reader - Indicates the clock source:"] -pub type ClksourceR = crate::BitReader; -impl ClksourceR { +pub type CLKSOURCE_R = crate::BitReader; +impl CLKSOURCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Clksource { + pub const fn variant(&self) -> CLKSOURCE_A { match self.bits { - false => Clksource::Value1, - true => Clksource::Value2, + false => CLKSOURCE_A::VALUE1, + true => CLKSOURCE_A::VALUE2, } } #[doc = "external clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Clksource::Value1 + *self == CLKSOURCE_A::VALUE1 } #[doc = "processor clock."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Clksource::Value2 + *self == CLKSOURCE_A::VALUE2 } } #[doc = "Field `CLKSOURCE` writer - Indicates the clock source:"] -pub type ClksourceW<'a, REG> = crate::BitWriter<'a, REG, Clksource>; -impl<'a, REG> ClksourceW<'a, REG> +pub type CLKSOURCE_W<'a, REG> = crate::BitWriter<'a, REG, CLKSOURCE_A>; +impl<'a, REG> CLKSOURCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "external clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clksource::Value1) + self.variant(CLKSOURCE_A::VALUE1) } #[doc = "processor clock."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Clksource::Value2) + self.variant(CLKSOURCE_A::VALUE2) } } #[doc = "Field `COUNTFLAG` reader - Counter Flag"] -pub type CountflagR = crate::BitReader; +pub type COUNTFLAG_R = crate::BitReader; #[doc = "Field `COUNTFLAG` writer - Counter Flag"] -pub type CountflagW<'a, REG> = crate::BitWriter<'a, REG>; +pub type COUNTFLAG_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn enable(&self) -> EnableR { - EnableR::new((self.bits & 1) != 0) + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Tick Interrupt Enable"] #[inline(always)] - pub fn tickint(&self) -> TickintR { - TickintR::new(((self.bits >> 1) & 1) != 0) + pub fn tickint(&self) -> TICKINT_R { + TICKINT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Indicates the clock source:"] #[inline(always)] - pub fn clksource(&self) -> ClksourceR { - ClksourceR::new(((self.bits >> 2) & 1) != 0) + pub fn clksource(&self) -> CLKSOURCE_R { + CLKSOURCE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Counter Flag"] #[inline(always)] - pub fn countflag(&self) -> CountflagR { - CountflagR::new(((self.bits >> 16) & 1) != 0) + pub fn countflag(&self) -> COUNTFLAG_R { + COUNTFLAG_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn enable(&mut self) -> EnableW { - EnableW::new(self, 0) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Tick Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tickint(&mut self) -> TickintW { - TickintW::new(self, 1) + pub fn tickint(&mut self) -> TICKINT_W { + TICKINT_W::new(self, 1) } #[doc = "Bit 2 - Indicates the clock source:"] #[inline(always)] #[must_use] - pub fn clksource(&mut self) -> ClksourceW { - ClksourceW::new(self, 2) + pub fn clksource(&mut self) -> CLKSOURCE_W { + CLKSOURCE_W::new(self, 2) } #[doc = "Bit 16 - Counter Flag"] #[inline(always)] #[must_use] - pub fn countflag(&mut self) -> CountflagW { - CountflagW::new(self, 16) + pub fn countflag(&mut self) -> COUNTFLAG_W { + COUNTFLAG_W::new(self, 16) } } #[doc = "SysTick Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_csr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_csr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SystCsrSpec; -impl crate::RegisterSpec for SystCsrSpec { +pub struct SYST_CSR_SPEC; +impl crate::RegisterSpec for SYST_CSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`syst_csr::R`](R) reader structure"] -impl crate::Readable for SystCsrSpec {} +impl crate::Readable for SYST_CSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`syst_csr::W`](W) writer structure"] -impl crate::Writable for SystCsrSpec { +impl crate::Writable for SYST_CSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CSR to value 0x04"] -impl crate::Resettable for SystCsrSpec { +impl crate::Resettable for SYST_CSR_SPEC { const RESET_VALUE: u32 = 0x04; } diff --git a/src/ppb/syst_cvr.rs b/src/ppb/syst_cvr.rs index 2f3ac473..5dc9034b 100644 --- a/src/ppb/syst_cvr.rs +++ b/src/ppb/syst_cvr.rs @@ -1,40 +1,40 @@ #[doc = "Register `SYST_CVR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_CVR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CURRENT` reader - Current Value"] -pub type CurrentR = crate::FieldReader; +pub type CURRENT_R = crate::FieldReader; #[doc = "Field `CURRENT` writer - Current Value"] -pub type CurrentW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; +pub type CURRENT_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Current Value"] #[inline(always)] - pub fn current(&self) -> CurrentR { - CurrentR::new(self.bits & 0x00ff_ffff) + pub fn current(&self) -> CURRENT_R { + CURRENT_R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Current Value"] #[inline(always)] #[must_use] - pub fn current(&mut self) -> CurrentW { - CurrentW::new(self, 0) + pub fn current(&mut self) -> CURRENT_W { + CURRENT_W::new(self, 0) } } #[doc = "SysTick Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_cvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_cvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SystCvrSpec; -impl crate::RegisterSpec for SystCvrSpec { +pub struct SYST_CVR_SPEC; +impl crate::RegisterSpec for SYST_CVR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`syst_cvr::R`](R) reader structure"] -impl crate::Readable for SystCvrSpec {} +impl crate::Readable for SYST_CVR_SPEC {} #[doc = "`write(|w| ..)` method takes [`syst_cvr::W`](W) writer structure"] -impl crate::Writable for SystCvrSpec { +impl crate::Writable for SYST_CVR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_CVR to value 0"] -impl crate::Resettable for SystCvrSpec { +impl crate::Resettable for SYST_CVR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/syst_rvr.rs b/src/ppb/syst_rvr.rs index 07b2cb80..1394ee23 100644 --- a/src/ppb/syst_rvr.rs +++ b/src/ppb/syst_rvr.rs @@ -1,40 +1,40 @@ #[doc = "Register `SYST_RVR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYST_RVR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RELOAD` reader - Reload Value"] -pub type ReloadR = crate::FieldReader; +pub type RELOAD_R = crate::FieldReader; #[doc = "Field `RELOAD` writer - Reload Value"] -pub type ReloadW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; +pub type RELOAD_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>; impl R { #[doc = "Bits 0:23 - Reload Value"] #[inline(always)] - pub fn reload(&self) -> ReloadR { - ReloadR::new(self.bits & 0x00ff_ffff) + pub fn reload(&self) -> RELOAD_R { + RELOAD_R::new(self.bits & 0x00ff_ffff) } } impl W { #[doc = "Bits 0:23 - Reload Value"] #[inline(always)] #[must_use] - pub fn reload(&mut self) -> ReloadW { - ReloadW::new(self, 0) + pub fn reload(&mut self) -> RELOAD_W { + RELOAD_W::new(self, 0) } } #[doc = "SysTick Reload Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`syst_rvr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`syst_rvr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SystRvrSpec; -impl crate::RegisterSpec for SystRvrSpec { +pub struct SYST_RVR_SPEC; +impl crate::RegisterSpec for SYST_RVR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`syst_rvr::R`](R) reader structure"] -impl crate::Readable for SystRvrSpec {} +impl crate::Readable for SYST_RVR_SPEC {} #[doc = "`write(|w| ..)` method takes [`syst_rvr::W`](W) writer structure"] -impl crate::Writable for SystRvrSpec { +impl crate::Writable for SYST_RVR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYST_RVR to value 0"] -impl crate::Resettable for SystRvrSpec { +impl crate::Resettable for SYST_RVR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/ppb/vtor.rs b/src/ppb/vtor.rs index ec4eb64b..67cd5c13 100644 --- a/src/ppb/vtor.rs +++ b/src/ppb/vtor.rs @@ -1,40 +1,40 @@ #[doc = "Register `VTOR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `VTOR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TBLOFF` reader - Vector table base offset field"] -pub type TbloffR = crate::FieldReader; +pub type TBLOFF_R = crate::FieldReader; #[doc = "Field `TBLOFF` writer - Vector table base offset field"] -pub type TbloffW<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; +pub type TBLOFF_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>; impl R { #[doc = "Bits 10:31 - Vector table base offset field"] #[inline(always)] - pub fn tbloff(&self) -> TbloffR { - TbloffR::new((self.bits >> 10) & 0x003f_ffff) + pub fn tbloff(&self) -> TBLOFF_R { + TBLOFF_R::new((self.bits >> 10) & 0x003f_ffff) } } impl W { #[doc = "Bits 10:31 - Vector table base offset field"] #[inline(always)] #[must_use] - pub fn tbloff(&mut self) -> TbloffW { - TbloffW::new(self, 10) + pub fn tbloff(&mut self) -> TBLOFF_W { + TBLOFF_W::new(self, 10) } } #[doc = "Vector Table Offset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vtor::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vtor::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VtorSpec; -impl crate::RegisterSpec for VtorSpec { +pub struct VTOR_SPEC; +impl crate::RegisterSpec for VTOR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`vtor::R`](R) reader structure"] -impl crate::Readable for VtorSpec {} +impl crate::Readable for VTOR_SPEC {} #[doc = "`write(|w| ..)` method takes [`vtor::W`](W) writer structure"] -impl crate::Writable for VtorSpec { +impl crate::Writable for VTOR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VTOR to value 0"] -impl crate::Resettable for VtorSpec { +impl crate::Resettable for VTOR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/pref.rs b/src/pref.rs index e64d0c24..7205f0ae 100644 --- a/src/pref.rs +++ b/src/pref.rs @@ -1,18 +1,17 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - pcon: Pcon, + pcon: PCON, } impl RegisterBlock { #[doc = "0x00 - Prefetch Configuration Register"] #[inline(always)] - pub const fn pcon(&self) -> &Pcon { + pub const fn pcon(&self) -> &PCON { &self.pcon } } #[doc = "PCON (rw) register accessor: Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcon`] module"] -#[doc(alias = "PCON")] -pub type Pcon = crate::Reg; +pub type PCON = crate::Reg; #[doc = "Prefetch Configuration Register"] pub mod pcon; diff --git a/src/pref/pcon.rs b/src/pref/pcon.rs index 5fadf3e9..115be096 100644 --- a/src/pref/pcon.rs +++ b/src/pref/pcon.rs @@ -1,190 +1,190 @@ #[doc = "Register `PCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Instruction Prefetch Buffer Bypass\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ibyp { +pub enum IBYP_A { #[doc = "0: Instruction prefetch buffer not bypassed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Instruction prefetch buffer bypassed."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ibyp) -> Self { + fn from(variant: IBYP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IBYP` reader - Instruction Prefetch Buffer Bypass"] -pub type IbypR = crate::BitReader; -impl IbypR { +pub type IBYP_R = crate::BitReader; +impl IBYP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ibyp { + pub const fn variant(&self) -> IBYP_A { match self.bits { - false => Ibyp::Value1, - true => Ibyp::Value2, + false => IBYP_A::VALUE1, + true => IBYP_A::VALUE2, } } #[doc = "Instruction prefetch buffer not bypassed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ibyp::Value1 + *self == IBYP_A::VALUE1 } #[doc = "Instruction prefetch buffer bypassed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ibyp::Value2 + *self == IBYP_A::VALUE2 } } #[doc = "Field `IBYP` writer - Instruction Prefetch Buffer Bypass"] -pub type IbypW<'a, REG> = crate::BitWriter<'a, REG, Ibyp>; -impl<'a, REG> IbypW<'a, REG> +pub type IBYP_W<'a, REG> = crate::BitWriter<'a, REG, IBYP_A>; +impl<'a, REG> IBYP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Instruction prefetch buffer not bypassed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ibyp::Value1) + self.variant(IBYP_A::VALUE1) } #[doc = "Instruction prefetch buffer bypassed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ibyp::Value2) + self.variant(IBYP_A::VALUE2) } } #[doc = "Instruction Prefetch Buffer Invalidate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Iinv { +pub enum IINV_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Initiate invalidation of entire instruction cache."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Iinv) -> Self { + fn from(variant: IINV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IINV` writer - Instruction Prefetch Buffer Invalidate"] -pub type IinvW<'a, REG> = crate::BitWriter<'a, REG, Iinv>; -impl<'a, REG> IinvW<'a, REG> +pub type IINV_W<'a, REG> = crate::BitWriter<'a, REG, IINV_A>; +impl<'a, REG> IINV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Iinv::Value1) + self.variant(IINV_A::VALUE1) } #[doc = "Initiate invalidation of entire instruction cache."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Iinv::Value2) + self.variant(IINV_A::VALUE2) } } #[doc = "Data Buffer Bypass\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dbyp { +pub enum DBYP_A { #[doc = "0: Prefetch Data buffer not bypassed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prefetch Data buffer bypassed."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dbyp) -> Self { + fn from(variant: DBYP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DBYP` reader - Data Buffer Bypass"] -pub type DbypR = crate::BitReader; -impl DbypR { +pub type DBYP_R = crate::BitReader; +impl DBYP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dbyp { + pub const fn variant(&self) -> DBYP_A { match self.bits { - false => Dbyp::Value1, - true => Dbyp::Value2, + false => DBYP_A::VALUE1, + true => DBYP_A::VALUE2, } } #[doc = "Prefetch Data buffer not bypassed."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dbyp::Value1 + *self == DBYP_A::VALUE1 } #[doc = "Prefetch Data buffer bypassed."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dbyp::Value2 + *self == DBYP_A::VALUE2 } } #[doc = "Field `DBYP` writer - Data Buffer Bypass"] -pub type DbypW<'a, REG> = crate::BitWriter<'a, REG, Dbyp>; -impl<'a, REG> DbypW<'a, REG> +pub type DBYP_W<'a, REG> = crate::BitWriter<'a, REG, DBYP_A>; +impl<'a, REG> DBYP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Prefetch Data buffer not bypassed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dbyp::Value1) + self.variant(DBYP_A::VALUE1) } #[doc = "Prefetch Data buffer bypassed."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dbyp::Value2) + self.variant(DBYP_A::VALUE2) } } impl R { #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"] #[inline(always)] - pub fn ibyp(&self) -> IbypR { - IbypR::new((self.bits & 1) != 0) + pub fn ibyp(&self) -> IBYP_R { + IBYP_R::new((self.bits & 1) != 0) } #[doc = "Bit 4 - Data Buffer Bypass"] #[inline(always)] - pub fn dbyp(&self) -> DbypR { - DbypR::new(((self.bits >> 4) & 1) != 0) + pub fn dbyp(&self) -> DBYP_R { + DBYP_R::new(((self.bits >> 4) & 1) != 0) } } impl W { #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"] #[inline(always)] #[must_use] - pub fn ibyp(&mut self) -> IbypW { - IbypW::new(self, 0) + pub fn ibyp(&mut self) -> IBYP_W { + IBYP_W::new(self, 0) } #[doc = "Bit 1 - Instruction Prefetch Buffer Invalidate"] #[inline(always)] #[must_use] - pub fn iinv(&mut self) -> IinvW { - IinvW::new(self, 1) + pub fn iinv(&mut self) -> IINV_W { + IINV_W::new(self, 1) } #[doc = "Bit 4 - Data Buffer Bypass"] #[inline(always)] #[must_use] - pub fn dbyp(&mut self) -> DbypW { - DbypW::new(self, 4) + pub fn dbyp(&mut self) -> DBYP_W { + DBYP_W::new(self, 4) } } #[doc = "Prefetch Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PconSpec; -impl crate::RegisterSpec for PconSpec { +pub struct PCON_SPEC; +impl crate::RegisterSpec for PCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcon::R`](R) reader structure"] -impl crate::Readable for PconSpec {} +impl crate::Readable for PCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcon::W`](W) writer structure"] -impl crate::Writable for PconSpec { +impl crate::Writable for PCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCON to value 0"] -impl crate::Resettable for PconSpec { +impl crate::Resettable for PCON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc.rs b/src/rtc.rs index 115c82bc..eff62dc2 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -1,126 +1,116 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, - ctr: Ctr, - rawstat: Rawstat, - stssr: Stssr, - msksr: Msksr, - clrsr: Clrsr, - atim0: Atim0, - atim1: Atim1, - tim0: Tim0, - tim1: Tim1, + id: ID, + ctr: CTR, + rawstat: RAWSTAT, + stssr: STSSR, + msksr: MSKSR, + clrsr: CLRSR, + atim0: ATIM0, + atim1: ATIM1, + tim0: TIM0, + tim1: TIM1, } impl RegisterBlock { #[doc = "0x00 - RTC ID Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x04 - RTC Control Register"] #[inline(always)] - pub const fn ctr(&self) -> &Ctr { + pub const fn ctr(&self) -> &CTR { &self.ctr } #[doc = "0x08 - RTC Raw Service Request Register"] #[inline(always)] - pub const fn rawstat(&self) -> &Rawstat { + pub const fn rawstat(&self) -> &RAWSTAT { &self.rawstat } #[doc = "0x0c - RTC Service Request Status Register"] #[inline(always)] - pub const fn stssr(&self) -> &Stssr { + pub const fn stssr(&self) -> &STSSR { &self.stssr } #[doc = "0x10 - RTC Service Request Mask Register"] #[inline(always)] - pub const fn msksr(&self) -> &Msksr { + pub const fn msksr(&self) -> &MSKSR { &self.msksr } #[doc = "0x14 - RTC Clear Service Request Register"] #[inline(always)] - pub const fn clrsr(&self) -> &Clrsr { + pub const fn clrsr(&self) -> &CLRSR { &self.clrsr } #[doc = "0x18 - RTC Alarm Time Register 0"] #[inline(always)] - pub const fn atim0(&self) -> &Atim0 { + pub const fn atim0(&self) -> &ATIM0 { &self.atim0 } #[doc = "0x1c - RTC Alarm Time Register 1"] #[inline(always)] - pub const fn atim1(&self) -> &Atim1 { + pub const fn atim1(&self) -> &ATIM1 { &self.atim1 } #[doc = "0x20 - RTC Time Register 0"] #[inline(always)] - pub const fn tim0(&self) -> &Tim0 { + pub const fn tim0(&self) -> &TIM0 { &self.tim0 } #[doc = "0x24 - RTC Time Register 1"] #[inline(always)] - pub const fn tim1(&self) -> &Tim1 { + pub const fn tim1(&self) -> &TIM1 { &self.tim1 } } #[doc = "ID (r) register accessor: RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "RTC ID Register"] pub mod id; #[doc = "CTR (rw) register accessor: RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -#[doc(alias = "CTR")] -pub type Ctr = crate::Reg; +pub type CTR = crate::Reg; #[doc = "RTC Control Register"] pub mod ctr; #[doc = "RAWSTAT (r) register accessor: RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rawstat`] module"] -#[doc(alias = "RAWSTAT")] -pub type Rawstat = crate::Reg; +pub type RAWSTAT = crate::Reg; #[doc = "RTC Raw Service Request Register"] pub mod rawstat; #[doc = "STSSR (r) register accessor: RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stssr`] module"] -#[doc(alias = "STSSR")] -pub type Stssr = crate::Reg; +pub type STSSR = crate::Reg; #[doc = "RTC Service Request Status Register"] pub mod stssr; #[doc = "MSKSR (rw) register accessor: RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@msksr`] module"] -#[doc(alias = "MSKSR")] -pub type Msksr = crate::Reg; +pub type MSKSR = crate::Reg; #[doc = "RTC Service Request Mask Register"] pub mod msksr; #[doc = "CLRSR (w) register accessor: RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clrsr`] module"] -#[doc(alias = "CLRSR")] -pub type Clrsr = crate::Reg; +pub type CLRSR = crate::Reg; #[doc = "RTC Clear Service Request Register"] pub mod clrsr; #[doc = "ATIM0 (rw) register accessor: RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim0`] module"] -#[doc(alias = "ATIM0")] -pub type Atim0 = crate::Reg; +pub type ATIM0 = crate::Reg; #[doc = "RTC Alarm Time Register 0"] pub mod atim0; #[doc = "ATIM1 (rw) register accessor: RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@atim1`] module"] -#[doc(alias = "ATIM1")] -pub type Atim1 = crate::Reg; +pub type ATIM1 = crate::Reg; #[doc = "RTC Alarm Time Register 1"] pub mod atim1; #[doc = "TIM0 (rw) register accessor: RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim0`] module"] -#[doc(alias = "TIM0")] -pub type Tim0 = crate::Reg; +pub type TIM0 = crate::Reg; #[doc = "RTC Time Register 0"] pub mod tim0; #[doc = "TIM1 (rw) register accessor: RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim1`] module"] -#[doc(alias = "TIM1")] -pub type Tim1 = crate::Reg; +pub type TIM1 = crate::Reg; #[doc = "RTC Time Register 1"] pub mod tim1; diff --git a/src/rtc/atim0.rs b/src/rtc/atim0.rs index 05beee25..bb787ee5 100644 --- a/src/rtc/atim0.rs +++ b/src/rtc/atim0.rs @@ -1,85 +1,85 @@ #[doc = "Register `ATIM0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ATIM0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ASE` reader - Alarm Seconds Compare Value"] -pub type AseR = crate::FieldReader; +pub type ASE_R = crate::FieldReader; #[doc = "Field `ASE` writer - Alarm Seconds Compare Value"] -pub type AseW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type ASE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `AMI` reader - Alarm Minutes Compare Value"] -pub type AmiR = crate::FieldReader; +pub type AMI_R = crate::FieldReader; #[doc = "Field `AMI` writer - Alarm Minutes Compare Value"] -pub type AmiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type AMI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `AHO` reader - Alarm Hours Compare Value"] -pub type AhoR = crate::FieldReader; +pub type AHO_R = crate::FieldReader; #[doc = "Field `AHO` writer - Alarm Hours Compare Value"] -pub type AhoW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type AHO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `ADA` reader - Alarm Days Compare Value"] -pub type AdaR = crate::FieldReader; +pub type ADA_R = crate::FieldReader; #[doc = "Field `ADA` writer - Alarm Days Compare Value"] -pub type AdaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ADA_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:5 - Alarm Seconds Compare Value"] #[inline(always)] - pub fn ase(&self) -> AseR { - AseR::new((self.bits & 0x3f) as u8) + pub fn ase(&self) -> ASE_R { + ASE_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Alarm Minutes Compare Value"] #[inline(always)] - pub fn ami(&self) -> AmiR { - AmiR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn ami(&self) -> AMI_R { + AMI_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:20 - Alarm Hours Compare Value"] #[inline(always)] - pub fn aho(&self) -> AhoR { - AhoR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn aho(&self) -> AHO_R { + AHO_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Alarm Days Compare Value"] #[inline(always)] - pub fn ada(&self) -> AdaR { - AdaR::new(((self.bits >> 24) & 0x1f) as u8) + pub fn ada(&self) -> ADA_R { + ADA_R::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:5 - Alarm Seconds Compare Value"] #[inline(always)] #[must_use] - pub fn ase(&mut self) -> AseW { - AseW::new(self, 0) + pub fn ase(&mut self) -> ASE_W { + ASE_W::new(self, 0) } #[doc = "Bits 8:13 - Alarm Minutes Compare Value"] #[inline(always)] #[must_use] - pub fn ami(&mut self) -> AmiW { - AmiW::new(self, 8) + pub fn ami(&mut self) -> AMI_W { + AMI_W::new(self, 8) } #[doc = "Bits 16:20 - Alarm Hours Compare Value"] #[inline(always)] #[must_use] - pub fn aho(&mut self) -> AhoW { - AhoW::new(self, 16) + pub fn aho(&mut self) -> AHO_W { + AHO_W::new(self, 16) } #[doc = "Bits 24:28 - Alarm Days Compare Value"] #[inline(always)] #[must_use] - pub fn ada(&mut self) -> AdaW { - AdaW::new(self, 24) + pub fn ada(&mut self) -> ADA_W { + ADA_W::new(self, 24) } } #[doc = "RTC Alarm Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Atim0Spec; -impl crate::RegisterSpec for Atim0Spec { +pub struct ATIM0_SPEC; +impl crate::RegisterSpec for ATIM0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`atim0::R`](R) reader structure"] -impl crate::Readable for Atim0Spec {} +impl crate::Readable for ATIM0_SPEC {} #[doc = "`write(|w| ..)` method takes [`atim0::W`](W) writer structure"] -impl crate::Writable for Atim0Spec { +impl crate::Writable for ATIM0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ATIM0 to value 0"] -impl crate::Resettable for Atim0Spec { +impl crate::Resettable for ATIM0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/atim1.rs b/src/rtc/atim1.rs index f17a238f..5e6f6718 100644 --- a/src/rtc/atim1.rs +++ b/src/rtc/atim1.rs @@ -1,55 +1,55 @@ #[doc = "Register `ATIM1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ATIM1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AMO` reader - Alarm Month Compare Value"] -pub type AmoR = crate::FieldReader; +pub type AMO_R = crate::FieldReader; #[doc = "Field `AMO` writer - Alarm Month Compare Value"] -pub type AmoW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type AMO_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `AYE` reader - Alarm Year Compare Value"] -pub type AyeR = crate::FieldReader; +pub type AYE_R = crate::FieldReader; #[doc = "Field `AYE` writer - Alarm Year Compare Value"] -pub type AyeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type AYE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 8:11 - Alarm Month Compare Value"] #[inline(always)] - pub fn amo(&self) -> AmoR { - AmoR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn amo(&self) -> AMO_R { + AMO_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:31 - Alarm Year Compare Value"] #[inline(always)] - pub fn aye(&self) -> AyeR { - AyeR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn aye(&self) -> AYE_R { + AYE_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 8:11 - Alarm Month Compare Value"] #[inline(always)] #[must_use] - pub fn amo(&mut self) -> AmoW { - AmoW::new(self, 8) + pub fn amo(&mut self) -> AMO_W { + AMO_W::new(self, 8) } #[doc = "Bits 16:31 - Alarm Year Compare Value"] #[inline(always)] #[must_use] - pub fn aye(&mut self) -> AyeW { - AyeW::new(self, 16) + pub fn aye(&mut self) -> AYE_W { + AYE_W::new(self, 16) } } #[doc = "RTC Alarm Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`atim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`atim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Atim1Spec; -impl crate::RegisterSpec for Atim1Spec { +pub struct ATIM1_SPEC; +impl crate::RegisterSpec for ATIM1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`atim1::R`](R) reader structure"] -impl crate::Readable for Atim1Spec {} +impl crate::Readable for ATIM1_SPEC {} #[doc = "`write(|w| ..)` method takes [`atim1::W`](W) writer structure"] -impl crate::Writable for Atim1Spec { +impl crate::Writable for ATIM1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ATIM1 to value 0"] -impl crate::Resettable for Atim1Spec { +impl crate::Resettable for ATIM1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/clrsr.rs b/src/rtc/clrsr.rs index e10ddcad..792ea452 100644 --- a/src/rtc/clrsr.rs +++ b/src/rtc/clrsr.rs @@ -1,75 +1,75 @@ #[doc = "Register `CLRSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RPSE` writer - Periodic Seconds Interrupt Clear"] -pub type RpseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPMI` writer - Periodic Minutes Interrupt Clear"] -pub type RpmiW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPMI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPHO` writer - Periodic Hours Interrupt Clear"] -pub type RphoW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPHO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPDA` writer - Periodic Days Interrupt Clear"] -pub type RpdaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPDA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPMO` writer - Periodic Months Interrupt Clear"] -pub type RpmoW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPMO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RPYE` writer - Periodic Years Interrupt Clear"] -pub type RpyeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RPYE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RAI` writer - Alarm Interrupt Clear"] -pub type RaiW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RAI_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpse(&mut self) -> RpseW { - RpseW::new(self, 0) + pub fn rpse(&mut self) -> RPSE_W { + RPSE_W::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpmi(&mut self) -> RpmiW { - RpmiW::new(self, 1) + pub fn rpmi(&mut self) -> RPMI_W { + RPMI_W::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpho(&mut self) -> RphoW { - RphoW::new(self, 2) + pub fn rpho(&mut self) -> RPHO_W { + RPHO_W::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpda(&mut self) -> RpdaW { - RpdaW::new(self, 3) + pub fn rpda(&mut self) -> RPDA_W { + RPDA_W::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpmo(&mut self) -> RpmoW { - RpmoW::new(self, 5) + pub fn rpmo(&mut self) -> RPMO_W { + RPMO_W::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rpye(&mut self) -> RpyeW { - RpyeW::new(self, 6) + pub fn rpye(&mut self) -> RPYE_W { + RPYE_W::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Clear"] #[inline(always)] #[must_use] - pub fn rai(&mut self) -> RaiW { - RaiW::new(self, 8) + pub fn rai(&mut self) -> RAI_W { + RAI_W::new(self, 8) } } #[doc = "RTC Clear Service Request Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clrsr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClrsrSpec; -impl crate::RegisterSpec for ClrsrSpec { +pub struct CLRSR_SPEC; +impl crate::RegisterSpec for CLRSR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clrsr::W`](W) writer structure"] -impl crate::Writable for ClrsrSpec { +impl crate::Writable for CLRSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLRSR to value 0"] -impl crate::Resettable for ClrsrSpec { +impl crate::Resettable for CLRSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/ctr.rs b/src/rtc/ctr.rs index 4fce9e2b..ff1b5894 100644 --- a/src/rtc/ctr.rs +++ b/src/rtc/ctr.rs @@ -1,160 +1,160 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENB` reader - RTC Module Enable"] -pub type EnbR = crate::BitReader; +pub type ENB_R = crate::BitReader; #[doc = "Field `ENB` writer - RTC Module Enable"] -pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TAE` reader - Timer Alarm Enable for Hibernation Wake-up"] -pub type TaeR = crate::BitReader; +pub type TAE_R = crate::BitReader; #[doc = "Field `TAE` writer - Timer Alarm Enable for Hibernation Wake-up"] -pub type TaeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TAE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ESEC` reader - Enable Seconds Comparison for Hibernation Wake-up"] -pub type EsecR = crate::BitReader; +pub type ESEC_R = crate::BitReader; #[doc = "Field `ESEC` writer - Enable Seconds Comparison for Hibernation Wake-up"] -pub type EsecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ESEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMIC` reader - Enable Minutes Comparison for Hibernation Wake-up"] -pub type EmicR = crate::BitReader; +pub type EMIC_R = crate::BitReader; #[doc = "Field `EMIC` writer - Enable Minutes Comparison for Hibernation Wake-up"] -pub type EmicW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EMIC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EHOC` reader - Enable Hours Comparison for Hibernation Wake-up"] -pub type EhocR = crate::BitReader; +pub type EHOC_R = crate::BitReader; #[doc = "Field `EHOC` writer - Enable Hours Comparison for Hibernation Wake-up"] -pub type EhocW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EHOC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EDAC` reader - Enable Days Comparison for Hibernation Wake-up"] -pub type EdacR = crate::BitReader; +pub type EDAC_R = crate::BitReader; #[doc = "Field `EDAC` writer - Enable Days Comparison for Hibernation Wake-up"] -pub type EdacW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EDAC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EMOC` reader - Enable Months Comparison for Hibernation Wake-up"] -pub type EmocR = crate::BitReader; +pub type EMOC_R = crate::BitReader; #[doc = "Field `EMOC` writer - Enable Months Comparison for Hibernation Wake-up"] -pub type EmocW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EMOC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EYEC` reader - Enable Years Comparison for Hibernation Wake-up"] -pub type EyecR = crate::BitReader; +pub type EYEC_R = crate::BitReader; #[doc = "Field `EYEC` writer - Enable Years Comparison for Hibernation Wake-up"] -pub type EyecW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EYEC_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DIV` reader - RTC Clock Divider Value"] -pub type DivR = crate::FieldReader; +pub type DIV_R = crate::FieldReader; #[doc = "Field `DIV` writer - RTC Clock Divider Value"] -pub type DivW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bit 0 - RTC Module Enable"] #[inline(always)] - pub fn enb(&self) -> EnbR { - EnbR::new((self.bits & 1) != 0) + pub fn enb(&self) -> ENB_R { + ENB_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"] #[inline(always)] - pub fn tae(&self) -> TaeR { - TaeR::new(((self.bits >> 2) & 1) != 0) + pub fn tae(&self) -> TAE_R { + TAE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn esec(&self) -> EsecR { - EsecR::new(((self.bits >> 8) & 1) != 0) + pub fn esec(&self) -> ESEC_R { + ESEC_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn emic(&self) -> EmicR { - EmicR::new(((self.bits >> 9) & 1) != 0) + pub fn emic(&self) -> EMIC_R { + EMIC_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn ehoc(&self) -> EhocR { - EhocR::new(((self.bits >> 10) & 1) != 0) + pub fn ehoc(&self) -> EHOC_R { + EHOC_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn edac(&self) -> EdacR { - EdacR::new(((self.bits >> 11) & 1) != 0) + pub fn edac(&self) -> EDAC_R { + EDAC_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn emoc(&self) -> EmocR { - EmocR::new(((self.bits >> 13) & 1) != 0) + pub fn emoc(&self) -> EMOC_R { + EMOC_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"] #[inline(always)] - pub fn eyec(&self) -> EyecR { - EyecR::new(((self.bits >> 14) & 1) != 0) + pub fn eyec(&self) -> EYEC_R { + EYEC_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:31 - RTC Clock Divider Value"] #[inline(always)] - pub fn div(&self) -> DivR { - DivR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn div(&self) -> DIV_R { + DIV_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bit 0 - RTC Module Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> EnbW { - EnbW::new(self, 0) + pub fn enb(&mut self) -> ENB_W { + ENB_W::new(self, 0) } #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn tae(&mut self) -> TaeW { - TaeW::new(self, 2) + pub fn tae(&mut self) -> TAE_W { + TAE_W::new(self, 2) } #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn esec(&mut self) -> EsecW { - EsecW::new(self, 8) + pub fn esec(&mut self) -> ESEC_W { + ESEC_W::new(self, 8) } #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn emic(&mut self) -> EmicW { - EmicW::new(self, 9) + pub fn emic(&mut self) -> EMIC_W { + EMIC_W::new(self, 9) } #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn ehoc(&mut self) -> EhocW { - EhocW::new(self, 10) + pub fn ehoc(&mut self) -> EHOC_W { + EHOC_W::new(self, 10) } #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn edac(&mut self) -> EdacW { - EdacW::new(self, 11) + pub fn edac(&mut self) -> EDAC_W { + EDAC_W::new(self, 11) } #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn emoc(&mut self) -> EmocW { - EmocW::new(self, 13) + pub fn emoc(&mut self) -> EMOC_W { + EMOC_W::new(self, 13) } #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"] #[inline(always)] #[must_use] - pub fn eyec(&mut self) -> EyecW { - EyecW::new(self, 14) + pub fn eyec(&mut self) -> EYEC_W { + EYEC_W::new(self, 14) } #[doc = "Bits 16:31 - RTC Clock Divider Value"] #[inline(always)] #[must_use] - pub fn div(&mut self) -> DivW { - DivW::new(self, 16) + pub fn div(&mut self) -> DIV_W { + DIV_W::new(self, 16) } } #[doc = "RTC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtrSpec; -impl crate::RegisterSpec for CtrSpec { +pub struct CTR_SPEC; +impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CtrSpec {} +impl crate::Readable for CTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CtrSpec { +impl crate::Writable for CTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0x7fff_0000"] -impl crate::Resettable for CtrSpec { +impl crate::Resettable for CTR_SPEC { const RESET_VALUE: u32 = 0x7fff_0000; } diff --git a/src/rtc/id.rs b/src/rtc/id.rs index 4c639521..4e46c792 100644 --- a/src/rtc/id.rs +++ b/src/rtc/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "RTC ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00a3_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00a3_c000; } diff --git a/src/rtc/msksr.rs b/src/rtc/msksr.rs index 4227ee27..2169d505 100644 --- a/src/rtc/msksr.rs +++ b/src/rtc/msksr.rs @@ -1,130 +1,130 @@ #[doc = "Register `MSKSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MSKSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPSE` reader - Periodic Seconds Interrupt Mask"] -pub type MpseR = crate::BitReader; +pub type MPSE_R = crate::BitReader; #[doc = "Field `MPSE` writer - Periodic Seconds Interrupt Mask"] -pub type MpseW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPSE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPMI` reader - Periodic Minutes Interrupt Mask"] -pub type MpmiR = crate::BitReader; +pub type MPMI_R = crate::BitReader; #[doc = "Field `MPMI` writer - Periodic Minutes Interrupt Mask"] -pub type MpmiW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPMI_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPHO` reader - Periodic Hours Interrupt Mask"] -pub type MphoR = crate::BitReader; +pub type MPHO_R = crate::BitReader; #[doc = "Field `MPHO` writer - Periodic Hours Interrupt Mask"] -pub type MphoW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPHO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPDA` reader - Periodic Days Interrupt Mask"] -pub type MpdaR = crate::BitReader; +pub type MPDA_R = crate::BitReader; #[doc = "Field `MPDA` writer - Periodic Days Interrupt Mask"] -pub type MpdaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPDA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPMO` reader - Periodic Months Interrupt Mask"] -pub type MpmoR = crate::BitReader; +pub type MPMO_R = crate::BitReader; #[doc = "Field `MPMO` writer - Periodic Months Interrupt Mask"] -pub type MpmoW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPMO_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MPYE` reader - Periodic Years Interrupt Mask"] -pub type MpyeR = crate::BitReader; +pub type MPYE_R = crate::BitReader; #[doc = "Field `MPYE` writer - Periodic Years Interrupt Mask"] -pub type MpyeW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MPYE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `MAI` reader - Alarm Interrupt Mask"] -pub type MaiR = crate::BitReader; +pub type MAI_R = crate::BitReader; #[doc = "Field `MAI` writer - Alarm Interrupt Mask"] -pub type MaiW<'a, REG> = crate::BitWriter<'a, REG>; +pub type MAI_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"] #[inline(always)] - pub fn mpse(&self) -> MpseR { - MpseR::new((self.bits & 1) != 0) + pub fn mpse(&self) -> MPSE_R { + MPSE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"] #[inline(always)] - pub fn mpmi(&self) -> MpmiR { - MpmiR::new(((self.bits >> 1) & 1) != 0) + pub fn mpmi(&self) -> MPMI_R { + MPMI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Periodic Hours Interrupt Mask"] #[inline(always)] - pub fn mpho(&self) -> MphoR { - MphoR::new(((self.bits >> 2) & 1) != 0) + pub fn mpho(&self) -> MPHO_R { + MPHO_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Periodic Days Interrupt Mask"] #[inline(always)] - pub fn mpda(&self) -> MpdaR { - MpdaR::new(((self.bits >> 3) & 1) != 0) + pub fn mpda(&self) -> MPDA_R { + MPDA_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Periodic Months Interrupt Mask"] #[inline(always)] - pub fn mpmo(&self) -> MpmoR { - MpmoR::new(((self.bits >> 5) & 1) != 0) + pub fn mpmo(&self) -> MPMO_R { + MPMO_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Periodic Years Interrupt Mask"] #[inline(always)] - pub fn mpye(&self) -> MpyeR { - MpyeR::new(((self.bits >> 6) & 1) != 0) + pub fn mpye(&self) -> MPYE_R { + MPYE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Alarm Interrupt Mask"] #[inline(always)] - pub fn mai(&self) -> MaiR { - MaiR::new(((self.bits >> 8) & 1) != 0) + pub fn mai(&self) -> MAI_R { + MAI_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpse(&mut self) -> MpseW { - MpseW::new(self, 0) + pub fn mpse(&mut self) -> MPSE_W { + MPSE_W::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpmi(&mut self) -> MpmiW { - MpmiW::new(self, 1) + pub fn mpmi(&mut self) -> MPMI_W { + MPMI_W::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpho(&mut self) -> MphoW { - MphoW::new(self, 2) + pub fn mpho(&mut self) -> MPHO_W { + MPHO_W::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpda(&mut self) -> MpdaW { - MpdaW::new(self, 3) + pub fn mpda(&mut self) -> MPDA_W { + MPDA_W::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpmo(&mut self) -> MpmoW { - MpmoW::new(self, 5) + pub fn mpmo(&mut self) -> MPMO_W { + MPMO_W::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mpye(&mut self) -> MpyeW { - MpyeW::new(self, 6) + pub fn mpye(&mut self) -> MPYE_W { + MPYE_W::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Mask"] #[inline(always)] #[must_use] - pub fn mai(&mut self) -> MaiW { - MaiW::new(self, 8) + pub fn mai(&mut self) -> MAI_W { + MAI_W::new(self, 8) } } #[doc = "RTC Service Request Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`msksr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`msksr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MsksrSpec; -impl crate::RegisterSpec for MsksrSpec { +pub struct MSKSR_SPEC; +impl crate::RegisterSpec for MSKSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`msksr::R`](R) reader structure"] -impl crate::Readable for MsksrSpec {} +impl crate::Readable for MSKSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`msksr::W`](W) writer structure"] -impl crate::Writable for MsksrSpec { +impl crate::Writable for MSKSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MSKSR to value 0"] -impl crate::Resettable for MsksrSpec { +impl crate::Resettable for MSKSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/rawstat.rs b/src/rtc/rawstat.rs index 533ff466..1d473d74 100644 --- a/src/rtc/rawstat.rs +++ b/src/rtc/rawstat.rs @@ -1,64 +1,64 @@ #[doc = "Register `RAWSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RPSE` reader - Raw Periodic Seconds Service Request"] -pub type RpseR = crate::BitReader; +pub type RPSE_R = crate::BitReader; #[doc = "Field `RPMI` reader - Raw Periodic Minutes Service Request"] -pub type RpmiR = crate::BitReader; +pub type RPMI_R = crate::BitReader; #[doc = "Field `RPHO` reader - Raw Periodic Hours Service Request"] -pub type RphoR = crate::BitReader; +pub type RPHO_R = crate::BitReader; #[doc = "Field `RPDA` reader - Raw Periodic Days Service Request"] -pub type RpdaR = crate::BitReader; +pub type RPDA_R = crate::BitReader; #[doc = "Field `RPMO` reader - Raw Periodic Months Service Request"] -pub type RpmoR = crate::BitReader; +pub type RPMO_R = crate::BitReader; #[doc = "Field `RPYE` reader - Raw Periodic Years Service Request"] -pub type RpyeR = crate::BitReader; +pub type RPYE_R = crate::BitReader; #[doc = "Field `RAI` reader - Raw Alarm Service Request"] -pub type RaiR = crate::BitReader; +pub type RAI_R = crate::BitReader; impl R { #[doc = "Bit 0 - Raw Periodic Seconds Service Request"] #[inline(always)] - pub fn rpse(&self) -> RpseR { - RpseR::new((self.bits & 1) != 0) + pub fn rpse(&self) -> RPSE_R { + RPSE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Raw Periodic Minutes Service Request"] #[inline(always)] - pub fn rpmi(&self) -> RpmiR { - RpmiR::new(((self.bits >> 1) & 1) != 0) + pub fn rpmi(&self) -> RPMI_R { + RPMI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Raw Periodic Hours Service Request"] #[inline(always)] - pub fn rpho(&self) -> RphoR { - RphoR::new(((self.bits >> 2) & 1) != 0) + pub fn rpho(&self) -> RPHO_R { + RPHO_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Raw Periodic Days Service Request"] #[inline(always)] - pub fn rpda(&self) -> RpdaR { - RpdaR::new(((self.bits >> 3) & 1) != 0) + pub fn rpda(&self) -> RPDA_R { + RPDA_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Raw Periodic Months Service Request"] #[inline(always)] - pub fn rpmo(&self) -> RpmoR { - RpmoR::new(((self.bits >> 5) & 1) != 0) + pub fn rpmo(&self) -> RPMO_R { + RPMO_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Raw Periodic Years Service Request"] #[inline(always)] - pub fn rpye(&self) -> RpyeR { - RpyeR::new(((self.bits >> 6) & 1) != 0) + pub fn rpye(&self) -> RPYE_R { + RPYE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Raw Alarm Service Request"] #[inline(always)] - pub fn rai(&self) -> RaiR { - RaiR::new(((self.bits >> 8) & 1) != 0) + pub fn rai(&self) -> RAI_R { + RAI_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "RTC Raw Service Request Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rawstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RawstatSpec; -impl crate::RegisterSpec for RawstatSpec { +pub struct RAWSTAT_SPEC; +impl crate::RegisterSpec for RAWSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rawstat::R`](R) reader structure"] -impl crate::Readable for RawstatSpec {} +impl crate::Readable for RAWSTAT_SPEC {} #[doc = "`reset()` method sets RAWSTAT to value 0"] -impl crate::Resettable for RawstatSpec { +impl crate::Resettable for RAWSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/stssr.rs b/src/rtc/stssr.rs index 10781881..78e32ac1 100644 --- a/src/rtc/stssr.rs +++ b/src/rtc/stssr.rs @@ -1,64 +1,64 @@ #[doc = "Register `STSSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SPSE` reader - Periodic Seconds Service Request Status after Masking"] -pub type SpseR = crate::BitReader; +pub type SPSE_R = crate::BitReader; #[doc = "Field `SPMI` reader - Periodic Minutes Service Request Status after Masking"] -pub type SpmiR = crate::BitReader; +pub type SPMI_R = crate::BitReader; #[doc = "Field `SPHO` reader - Periodic Hours Service Request Status after Masking"] -pub type SphoR = crate::BitReader; +pub type SPHO_R = crate::BitReader; #[doc = "Field `SPDA` reader - Periodic Days Service Request Status after Masking"] -pub type SpdaR = crate::BitReader; +pub type SPDA_R = crate::BitReader; #[doc = "Field `SPMO` reader - Periodic Months Service Request Status after Masking"] -pub type SpmoR = crate::BitReader; +pub type SPMO_R = crate::BitReader; #[doc = "Field `SPYE` reader - Periodic Years Service Request Status after Masking"] -pub type SpyeR = crate::BitReader; +pub type SPYE_R = crate::BitReader; #[doc = "Field `SAI` reader - Alarm Service Request Status after Masking"] -pub type SaiR = crate::BitReader; +pub type SAI_R = crate::BitReader; impl R { #[doc = "Bit 0 - Periodic Seconds Service Request Status after Masking"] #[inline(always)] - pub fn spse(&self) -> SpseR { - SpseR::new((self.bits & 1) != 0) + pub fn spse(&self) -> SPSE_R { + SPSE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Periodic Minutes Service Request Status after Masking"] #[inline(always)] - pub fn spmi(&self) -> SpmiR { - SpmiR::new(((self.bits >> 1) & 1) != 0) + pub fn spmi(&self) -> SPMI_R { + SPMI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Periodic Hours Service Request Status after Masking"] #[inline(always)] - pub fn spho(&self) -> SphoR { - SphoR::new(((self.bits >> 2) & 1) != 0) + pub fn spho(&self) -> SPHO_R { + SPHO_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Periodic Days Service Request Status after Masking"] #[inline(always)] - pub fn spda(&self) -> SpdaR { - SpdaR::new(((self.bits >> 3) & 1) != 0) + pub fn spda(&self) -> SPDA_R { + SPDA_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - Periodic Months Service Request Status after Masking"] #[inline(always)] - pub fn spmo(&self) -> SpmoR { - SpmoR::new(((self.bits >> 5) & 1) != 0) + pub fn spmo(&self) -> SPMO_R { + SPMO_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Periodic Years Service Request Status after Masking"] #[inline(always)] - pub fn spye(&self) -> SpyeR { - SpyeR::new(((self.bits >> 6) & 1) != 0) + pub fn spye(&self) -> SPYE_R { + SPYE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Alarm Service Request Status after Masking"] #[inline(always)] - pub fn sai(&self) -> SaiR { - SaiR::new(((self.bits >> 8) & 1) != 0) + pub fn sai(&self) -> SAI_R { + SAI_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "RTC Service Request Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stssr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StssrSpec; -impl crate::RegisterSpec for StssrSpec { +pub struct STSSR_SPEC; +impl crate::RegisterSpec for STSSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`stssr::R`](R) reader structure"] -impl crate::Readable for StssrSpec {} +impl crate::Readable for STSSR_SPEC {} #[doc = "`reset()` method sets STSSR to value 0"] -impl crate::Resettable for StssrSpec { +impl crate::Resettable for STSSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/tim0.rs b/src/rtc/tim0.rs index 41bc63a7..692a3141 100644 --- a/src/rtc/tim0.rs +++ b/src/rtc/tim0.rs @@ -1,85 +1,85 @@ #[doc = "Register `TIM0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIM0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SE` reader - Seconds Time Value"] -pub type SeR = crate::FieldReader; +pub type SE_R = crate::FieldReader; #[doc = "Field `SE` writer - Seconds Time Value"] -pub type SeW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type SE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `MI` reader - Minutes Time Value"] -pub type MiR = crate::FieldReader; +pub type MI_R = crate::FieldReader; #[doc = "Field `MI` writer - Minutes Time Value"] -pub type MiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type MI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `HO` reader - Hours Time Value"] -pub type HoR = crate::FieldReader; +pub type HO_R = crate::FieldReader; #[doc = "Field `HO` writer - Hours Time Value"] -pub type HoW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type HO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `DA` reader - Days Time Value"] -pub type DaR = crate::FieldReader; +pub type DA_R = crate::FieldReader; #[doc = "Field `DA` writer - Days Time Value"] -pub type DaW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DA_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:5 - Seconds Time Value"] #[inline(always)] - pub fn se(&self) -> SeR { - SeR::new((self.bits & 0x3f) as u8) + pub fn se(&self) -> SE_R { + SE_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Minutes Time Value"] #[inline(always)] - pub fn mi(&self) -> MiR { - MiR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn mi(&self) -> MI_R { + MI_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:20 - Hours Time Value"] #[inline(always)] - pub fn ho(&self) -> HoR { - HoR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn ho(&self) -> HO_R { + HO_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:28 - Days Time Value"] #[inline(always)] - pub fn da(&self) -> DaR { - DaR::new(((self.bits >> 24) & 0x1f) as u8) + pub fn da(&self) -> DA_R { + DA_R::new(((self.bits >> 24) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:5 - Seconds Time Value"] #[inline(always)] #[must_use] - pub fn se(&mut self) -> SeW { - SeW::new(self, 0) + pub fn se(&mut self) -> SE_W { + SE_W::new(self, 0) } #[doc = "Bits 8:13 - Minutes Time Value"] #[inline(always)] #[must_use] - pub fn mi(&mut self) -> MiW { - MiW::new(self, 8) + pub fn mi(&mut self) -> MI_W { + MI_W::new(self, 8) } #[doc = "Bits 16:20 - Hours Time Value"] #[inline(always)] #[must_use] - pub fn ho(&mut self) -> HoW { - HoW::new(self, 16) + pub fn ho(&mut self) -> HO_W { + HO_W::new(self, 16) } #[doc = "Bits 24:28 - Days Time Value"] #[inline(always)] #[must_use] - pub fn da(&mut self) -> DaW { - DaW::new(self, 24) + pub fn da(&mut self) -> DA_W { + DA_W::new(self, 24) } } #[doc = "RTC Time Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Tim0Spec; -impl crate::RegisterSpec for Tim0Spec { +pub struct TIM0_SPEC; +impl crate::RegisterSpec for TIM0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tim0::R`](R) reader structure"] -impl crate::Readable for Tim0Spec {} +impl crate::Readable for TIM0_SPEC {} #[doc = "`write(|w| ..)` method takes [`tim0::W`](W) writer structure"] -impl crate::Writable for Tim0Spec { +impl crate::Writable for TIM0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM0 to value 0"] -impl crate::Resettable for Tim0Spec { +impl crate::Resettable for TIM0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/rtc/tim1.rs b/src/rtc/tim1.rs index 3a8a5628..a8177888 100644 --- a/src/rtc/tim1.rs +++ b/src/rtc/tim1.rs @@ -1,70 +1,70 @@ #[doc = "Register `TIM1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TIM1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAWE` reader - Days of Week Time Value"] -pub type DaweR = crate::FieldReader; +pub type DAWE_R = crate::FieldReader; #[doc = "Field `DAWE` writer - Days of Week Time Value"] -pub type DaweW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type DAWE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `MO` reader - Month Time Value"] -pub type MoR = crate::FieldReader; +pub type MO_R = crate::FieldReader; #[doc = "Field `MO` writer - Month Time Value"] -pub type MoW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type MO_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `YE` reader - Year Time Value"] -pub type YeR = crate::FieldReader; +pub type YE_R = crate::FieldReader; #[doc = "Field `YE` writer - Year Time Value"] -pub type YeW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type YE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:2 - Days of Week Time Value"] #[inline(always)] - pub fn dawe(&self) -> DaweR { - DaweR::new((self.bits & 7) as u8) + pub fn dawe(&self) -> DAWE_R { + DAWE_R::new((self.bits & 7) as u8) } #[doc = "Bits 8:11 - Month Time Value"] #[inline(always)] - pub fn mo(&self) -> MoR { - MoR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn mo(&self) -> MO_R { + MO_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 16:31 - Year Time Value"] #[inline(always)] - pub fn ye(&self) -> YeR { - YeR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn ye(&self) -> YE_R { + YE_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:2 - Days of Week Time Value"] #[inline(always)] #[must_use] - pub fn dawe(&mut self) -> DaweW { - DaweW::new(self, 0) + pub fn dawe(&mut self) -> DAWE_W { + DAWE_W::new(self, 0) } #[doc = "Bits 8:11 - Month Time Value"] #[inline(always)] #[must_use] - pub fn mo(&mut self) -> MoW { - MoW::new(self, 8) + pub fn mo(&mut self) -> MO_W { + MO_W::new(self, 8) } #[doc = "Bits 16:31 - Year Time Value"] #[inline(always)] #[must_use] - pub fn ye(&mut self) -> YeW { - YeW::new(self, 16) + pub fn ye(&mut self) -> YE_W { + YE_W::new(self, 16) } } #[doc = "RTC Time Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Tim1Spec; -impl crate::RegisterSpec for Tim1Spec { +pub struct TIM1_SPEC; +impl crate::RegisterSpec for TIM1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tim1::R`](R) reader structure"] -impl crate::Readable for Tim1Spec {} +impl crate::Readable for TIM1_SPEC {} #[doc = "`write(|w| ..)` method takes [`tim1::W`](W) writer structure"] -impl crate::Writable for Tim1Spec { +impl crate::Writable for TIM1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TIM1 to value 0"] -impl crate::Resettable for Tim1Spec { +impl crate::Resettable for TIM1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk.rs b/src/scu_clk.rs index 1bf4b5e6..5d959a84 100644 --- a/src/scu_clk.rs +++ b/src/scu_clk.rs @@ -1,272 +1,250 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - clkstat: Clkstat, - clkset: Clkset, - clkclr: Clkclr, - sysclkcr: Sysclkcr, - cpuclkcr: Cpuclkcr, - pbclkcr: Pbclkcr, - usbclkcr: Usbclkcr, + clkstat: CLKSTAT, + clkset: CLKSET, + clkclr: CLKCLR, + sysclkcr: SYSCLKCR, + cpuclkcr: CPUCLKCR, + pbclkcr: PBCLKCR, + usbclkcr: USBCLKCR, _reserved7: [u8; 0x04], - ccuclkcr: Ccuclkcr, - wdtclkcr: Wdtclkcr, - extclkcr: Extclkcr, - mlinkclkcr: Mlinkclkcr, - sleepcr: Sleepcr, - dsleepcr: Dsleepcr, + ccuclkcr: CCUCLKCR, + wdtclkcr: WDTCLKCR, + extclkcr: EXTCLKCR, + mlinkclkcr: MLINKCLKCR, + sleepcr: SLEEPCR, + dsleepcr: DSLEEPCR, _reserved13: [u8; 0x08], - cgatstat0: Cgatstat0, - cgatset0: Cgatset0, - cgatclr0: Cgatclr0, - cgatstat1: Cgatstat1, - cgatset1: Cgatset1, - cgatclr1: Cgatclr1, - cgatstat2: Cgatstat2, - cgatset2: Cgatset2, - cgatclr2: Cgatclr2, + cgatstat0: CGATSTAT0, + cgatset0: CGATSET0, + cgatclr0: CGATCLR0, + cgatstat1: CGATSTAT1, + cgatset1: CGATSET1, + cgatclr1: CGATCLR1, + cgatstat2: CGATSTAT2, + cgatset2: CGATSET2, + cgatclr2: CGATCLR2, } impl RegisterBlock { #[doc = "0x00 - Clock Status Register"] #[inline(always)] - pub const fn clkstat(&self) -> &Clkstat { + pub const fn clkstat(&self) -> &CLKSTAT { &self.clkstat } #[doc = "0x04 - CLK Set Register"] #[inline(always)] - pub const fn clkset(&self) -> &Clkset { + pub const fn clkset(&self) -> &CLKSET { &self.clkset } #[doc = "0x08 - CLK Clear Register"] #[inline(always)] - pub const fn clkclr(&self) -> &Clkclr { + pub const fn clkclr(&self) -> &CLKCLR { &self.clkclr } #[doc = "0x0c - System Clock Control Register"] #[inline(always)] - pub const fn sysclkcr(&self) -> &Sysclkcr { + pub const fn sysclkcr(&self) -> &SYSCLKCR { &self.sysclkcr } #[doc = "0x10 - CPU Clock Control Register"] #[inline(always)] - pub const fn cpuclkcr(&self) -> &Cpuclkcr { + pub const fn cpuclkcr(&self) -> &CPUCLKCR { &self.cpuclkcr } #[doc = "0x14 - Peripheral Bus Clock Control Register"] #[inline(always)] - pub const fn pbclkcr(&self) -> &Pbclkcr { + pub const fn pbclkcr(&self) -> &PBCLKCR { &self.pbclkcr } #[doc = "0x18 - USB Clock Control Register"] #[inline(always)] - pub const fn usbclkcr(&self) -> &Usbclkcr { + pub const fn usbclkcr(&self) -> &USBCLKCR { &self.usbclkcr } #[doc = "0x20 - CCU Clock Control Register"] #[inline(always)] - pub const fn ccuclkcr(&self) -> &Ccuclkcr { + pub const fn ccuclkcr(&self) -> &CCUCLKCR { &self.ccuclkcr } #[doc = "0x24 - WDT Clock Control Register"] #[inline(always)] - pub const fn wdtclkcr(&self) -> &Wdtclkcr { + pub const fn wdtclkcr(&self) -> &WDTCLKCR { &self.wdtclkcr } #[doc = "0x28 - External Clock Control"] #[inline(always)] - pub const fn extclkcr(&self) -> &Extclkcr { + pub const fn extclkcr(&self) -> &EXTCLKCR { &self.extclkcr } #[doc = "0x2c - Multi-Link Clock Control"] #[inline(always)] - pub const fn mlinkclkcr(&self) -> &Mlinkclkcr { + pub const fn mlinkclkcr(&self) -> &MLINKCLKCR { &self.mlinkclkcr } #[doc = "0x30 - Sleep Control Register"] #[inline(always)] - pub const fn sleepcr(&self) -> &Sleepcr { + pub const fn sleepcr(&self) -> &SLEEPCR { &self.sleepcr } #[doc = "0x34 - Deep Sleep Control Register"] #[inline(always)] - pub const fn dsleepcr(&self) -> &Dsleepcr { + pub const fn dsleepcr(&self) -> &DSLEEPCR { &self.dsleepcr } #[doc = "0x40 - Peripheral 0 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat0(&self) -> &Cgatstat0 { + pub const fn cgatstat0(&self) -> &CGATSTAT0 { &self.cgatstat0 } #[doc = "0x44 - Peripheral 0 Clock Gating Set"] #[inline(always)] - pub const fn cgatset0(&self) -> &Cgatset0 { + pub const fn cgatset0(&self) -> &CGATSET0 { &self.cgatset0 } #[doc = "0x48 - Peripheral 0 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr0(&self) -> &Cgatclr0 { + pub const fn cgatclr0(&self) -> &CGATCLR0 { &self.cgatclr0 } #[doc = "0x4c - Peripheral 1 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat1(&self) -> &Cgatstat1 { + pub const fn cgatstat1(&self) -> &CGATSTAT1 { &self.cgatstat1 } #[doc = "0x50 - Peripheral 1 Clock Gating Set"] #[inline(always)] - pub const fn cgatset1(&self) -> &Cgatset1 { + pub const fn cgatset1(&self) -> &CGATSET1 { &self.cgatset1 } #[doc = "0x54 - Peripheral 1 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr1(&self) -> &Cgatclr1 { + pub const fn cgatclr1(&self) -> &CGATCLR1 { &self.cgatclr1 } #[doc = "0x58 - Peripheral 2 Clock Gating Status"] #[inline(always)] - pub const fn cgatstat2(&self) -> &Cgatstat2 { + pub const fn cgatstat2(&self) -> &CGATSTAT2 { &self.cgatstat2 } #[doc = "0x5c - Peripheral 2 Clock Gating Set"] #[inline(always)] - pub const fn cgatset2(&self) -> &Cgatset2 { + pub const fn cgatset2(&self) -> &CGATSET2 { &self.cgatset2 } #[doc = "0x60 - Peripheral 2 Clock Gating Clear"] #[inline(always)] - pub const fn cgatclr2(&self) -> &Cgatclr2 { + pub const fn cgatclr2(&self) -> &CGATCLR2 { &self.cgatclr2 } } #[doc = "CLKSTAT (r) register accessor: Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkstat`] module"] -#[doc(alias = "CLKSTAT")] -pub type Clkstat = crate::Reg; +pub type CLKSTAT = crate::Reg; #[doc = "Clock Status Register"] pub mod clkstat; #[doc = "CLKSET (w) register accessor: CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkset`] module"] -#[doc(alias = "CLKSET")] -pub type Clkset = crate::Reg; +pub type CLKSET = crate::Reg; #[doc = "CLK Set Register"] pub mod clkset; #[doc = "CLKCLR (w) register accessor: CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkclr`] module"] -#[doc(alias = "CLKCLR")] -pub type Clkclr = crate::Reg; +pub type CLKCLR = crate::Reg; #[doc = "CLK Clear Register"] pub mod clkclr; #[doc = "SYSCLKCR (rw) register accessor: System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclkcr`] module"] -#[doc(alias = "SYSCLKCR")] -pub type Sysclkcr = crate::Reg; +pub type SYSCLKCR = crate::Reg; #[doc = "System Clock Control Register"] pub mod sysclkcr; #[doc = "CPUCLKCR (rw) register accessor: CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpuclkcr`] module"] -#[doc(alias = "CPUCLKCR")] -pub type Cpuclkcr = crate::Reg; +pub type CPUCLKCR = crate::Reg; #[doc = "CPU Clock Control Register"] pub mod cpuclkcr; #[doc = "PBCLKCR (rw) register accessor: Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pbclkcr`] module"] -#[doc(alias = "PBCLKCR")] -pub type Pbclkcr = crate::Reg; +pub type PBCLKCR = crate::Reg; #[doc = "Peripheral Bus Clock Control Register"] pub mod pbclkcr; #[doc = "USBCLKCR (rw) register accessor: USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbclkcr`] module"] -#[doc(alias = "USBCLKCR")] -pub type Usbclkcr = crate::Reg; +pub type USBCLKCR = crate::Reg; #[doc = "USB Clock Control Register"] pub mod usbclkcr; #[doc = "CCUCLKCR (rw) register accessor: CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccuclkcr`] module"] -#[doc(alias = "CCUCLKCR")] -pub type Ccuclkcr = crate::Reg; +pub type CCUCLKCR = crate::Reg; #[doc = "CCU Clock Control Register"] pub mod ccuclkcr; #[doc = "WDTCLKCR (rw) register accessor: WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclkcr`] module"] -#[doc(alias = "WDTCLKCR")] -pub type Wdtclkcr = crate::Reg; +pub type WDTCLKCR = crate::Reg; #[doc = "WDT Clock Control Register"] pub mod wdtclkcr; #[doc = "EXTCLKCR (rw) register accessor: External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@extclkcr`] module"] -#[doc(alias = "EXTCLKCR")] -pub type Extclkcr = crate::Reg; +pub type EXTCLKCR = crate::Reg; #[doc = "External Clock Control"] pub mod extclkcr; #[doc = "MLINKCLKCR (rw) register accessor: Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mlinkclkcr`] module"] -#[doc(alias = "MLINKCLKCR")] -pub type Mlinkclkcr = crate::Reg; +pub type MLINKCLKCR = crate::Reg; #[doc = "Multi-Link Clock Control"] pub mod mlinkclkcr; #[doc = "SLEEPCR (rw) register accessor: Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sleepcr`] module"] -#[doc(alias = "SLEEPCR")] -pub type Sleepcr = crate::Reg; +pub type SLEEPCR = crate::Reg; #[doc = "Sleep Control Register"] pub mod sleepcr; #[doc = "DSLEEPCR (rw) register accessor: Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsleepcr`] module"] -#[doc(alias = "DSLEEPCR")] -pub type Dsleepcr = crate::Reg; +pub type DSLEEPCR = crate::Reg; #[doc = "Deep Sleep Control Register"] pub mod dsleepcr; #[doc = "CGATSTAT0 (r) register accessor: Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat0`] module"] -#[doc(alias = "CGATSTAT0")] -pub type Cgatstat0 = crate::Reg; +pub type CGATSTAT0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Status"] pub mod cgatstat0; #[doc = "CGATSET0 (w) register accessor: Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset0`] module"] -#[doc(alias = "CGATSET0")] -pub type Cgatset0 = crate::Reg; +pub type CGATSET0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Set"] pub mod cgatset0; #[doc = "CGATCLR0 (w) register accessor: Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr0`] module"] -#[doc(alias = "CGATCLR0")] -pub type Cgatclr0 = crate::Reg; +pub type CGATCLR0 = crate::Reg; #[doc = "Peripheral 0 Clock Gating Clear"] pub mod cgatclr0; #[doc = "CGATSTAT1 (r) register accessor: Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat1`] module"] -#[doc(alias = "CGATSTAT1")] -pub type Cgatstat1 = crate::Reg; +pub type CGATSTAT1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Status"] pub mod cgatstat1; #[doc = "CGATSET1 (w) register accessor: Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset1`] module"] -#[doc(alias = "CGATSET1")] -pub type Cgatset1 = crate::Reg; +pub type CGATSET1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Set"] pub mod cgatset1; #[doc = "CGATCLR1 (w) register accessor: Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr1`] module"] -#[doc(alias = "CGATCLR1")] -pub type Cgatclr1 = crate::Reg; +pub type CGATCLR1 = crate::Reg; #[doc = "Peripheral 1 Clock Gating Clear"] pub mod cgatclr1; #[doc = "CGATSTAT2 (r) register accessor: Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatstat2`] module"] -#[doc(alias = "CGATSTAT2")] -pub type Cgatstat2 = crate::Reg; +pub type CGATSTAT2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Status"] pub mod cgatstat2; #[doc = "CGATSET2 (w) register accessor: Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatset2`] module"] -#[doc(alias = "CGATSET2")] -pub type Cgatset2 = crate::Reg; +pub type CGATSET2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Set"] pub mod cgatset2; #[doc = "CGATCLR2 (w) register accessor: Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cgatclr2`] module"] -#[doc(alias = "CGATCLR2")] -pub type Cgatclr2 = crate::Reg; +pub type CGATCLR2 = crate::Reg; #[doc = "Peripheral 2 Clock Gating Clear"] pub mod cgatclr2; diff --git a/src/scu_clk/ccuclkcr.rs b/src/scu_clk/ccuclkcr.rs index 89eee678..92d7a1d6 100644 --- a/src/scu_clk/ccuclkcr.rs +++ b/src/scu_clk/ccuclkcr.rs @@ -1,89 +1,89 @@ #[doc = "Register `CCUCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCUCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CCU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccudiv { +pub enum CCUDIV_A { #[doc = "0: fCCU = fSYS"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCCU = fSYS / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccudiv) -> Self { + fn from(variant: CCUDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] -pub type CcudivR = crate::BitReader; -impl CcudivR { +pub type CCUDIV_R = crate::BitReader; +impl CCUDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccudiv { + pub const fn variant(&self) -> CCUDIV_A { match self.bits { - false => Ccudiv::Value1, - true => Ccudiv::Value2, + false => CCUDIV_A::VALUE1, + true => CCUDIV_A::VALUE2, } } #[doc = "fCCU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccudiv::Value1 + *self == CCUDIV_A::VALUE1 } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccudiv::Value2 + *self == CCUDIV_A::VALUE2 } } #[doc = "Field `CCUDIV` writer - CCU Clock Divider Enable"] -pub type CcudivW<'a, REG> = crate::BitWriter<'a, REG, Ccudiv>; -impl<'a, REG> CcudivW<'a, REG> +pub type CCUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CCUDIV_A>; +impl<'a, REG> CCUDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCCU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccudiv::Value1) + self.variant(CCUDIV_A::VALUE1) } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccudiv::Value2) + self.variant(CCUDIV_A::VALUE2) } } impl R { #[doc = "Bit 0 - CCU Clock Divider Enable"] #[inline(always)] - pub fn ccudiv(&self) -> CcudivR { - CcudivR::new((self.bits & 1) != 0) + pub fn ccudiv(&self) -> CCUDIV_R { + CCUDIV_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CCU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn ccudiv(&mut self) -> CcudivW { - CcudivW::new(self, 0) + pub fn ccudiv(&mut self) -> CCUDIV_W { + CCUDIV_W::new(self, 0) } } #[doc = "CCU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcuclkcrSpec; -impl crate::RegisterSpec for CcuclkcrSpec { +pub struct CCUCLKCR_SPEC; +impl crate::RegisterSpec for CCUCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ccuclkcr::R`](R) reader structure"] -impl crate::Readable for CcuclkcrSpec {} +impl crate::Readable for CCUCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ccuclkcr::W`](W) writer structure"] -impl crate::Writable for CcuclkcrSpec { +impl crate::Writable for CCUCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCUCLKCR to value 0"] -impl crate::Resettable for CcuclkcrSpec { +impl crate::Resettable for CCUCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr0.rs b/src/scu_clk/cgatclr0.rs index 721989c6..ea71144f 100644 --- a/src/scu_clk/cgatclr0.rs +++ b/src/scu_clk/cgatclr0.rs @@ -1,315 +1,315 @@ #[doc = "Register `CGATCLR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadc { +pub enum VADC_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadc) -> Self { + fn from(variant: VADC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADC` writer - VADC Gating Clear"] -pub type VadcW<'a, REG> = crate::BitWriter<'a, REG, Vadc>; -impl<'a, REG> VadcW<'a, REG> +pub type VADC_W<'a, REG> = crate::BitWriter<'a, REG, VADC_A>; +impl<'a, REG> VADC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vadc::Value1) + self.variant(VADC_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vadc::Value2) + self.variant(VADC_A::VALUE2) } } #[doc = "CCU40 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40 { +pub enum CCU40_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40) -> Self { + fn from(variant: CCU40_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40` writer - CCU40 Gating Clear"] -pub type Ccu40W<'a, REG> = crate::BitWriter<'a, REG, Ccu40>; -impl<'a, REG> Ccu40W<'a, REG> +pub type CCU40_W<'a, REG> = crate::BitWriter<'a, REG, CCU40_A>; +impl<'a, REG> CCU40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu40::Value1) + self.variant(CCU40_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu40::Value2) + self.variant(CCU40_A::VALUE2) } } #[doc = "CCU41 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41 { +pub enum CCU41_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41) -> Self { + fn from(variant: CCU41_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41` writer - CCU41 Gating Clear"] -pub type Ccu41W<'a, REG> = crate::BitWriter<'a, REG, Ccu41>; -impl<'a, REG> Ccu41W<'a, REG> +pub type CCU41_W<'a, REG> = crate::BitWriter<'a, REG, CCU41_A>; +impl<'a, REG> CCU41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu41::Value1) + self.variant(CCU41_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu41::Value2) + self.variant(CCU41_A::VALUE2) } } #[doc = "CCU80 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80 { +pub enum CCU80_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80) -> Self { + fn from(variant: CCU80_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80` writer - CCU80 Gating Clear"] -pub type Ccu80W<'a, REG> = crate::BitWriter<'a, REG, Ccu80>; -impl<'a, REG> Ccu80W<'a, REG> +pub type CCU80_W<'a, REG> = crate::BitWriter<'a, REG, CCU80_A>; +impl<'a, REG> CCU80_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu80::Value1) + self.variant(CCU80_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu80::Value2) + self.variant(CCU80_A::VALUE2) } } #[doc = "POSIF0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0 { +pub enum POSIF0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0) -> Self { + fn from(variant: POSIF0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0` writer - POSIF0 Gating Clear"] -pub type Posif0W<'a, REG> = crate::BitWriter<'a, REG, Posif0>; -impl<'a, REG> Posif0W<'a, REG> +pub type POSIF0_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0_A>; +impl<'a, REG> POSIF0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posif0::Value1) + self.variant(POSIF0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posif0::Value2) + self.variant(POSIF0_A::VALUE2) } } #[doc = "USIC0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0 { +pub enum USIC0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0) -> Self { + fn from(variant: USIC0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0` writer - USIC0 Gating Clear"] -pub type Usic0W<'a, REG> = crate::BitWriter<'a, REG, Usic0>; -impl<'a, REG> Usic0W<'a, REG> +pub type USIC0_W<'a, REG> = crate::BitWriter<'a, REG, USIC0_A>; +impl<'a, REG> USIC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic0::Value1) + self.variant(USIC0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic0::Value2) + self.variant(USIC0_A::VALUE2) } } #[doc = "ERU1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1 { +pub enum ERU1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1) -> Self { + fn from(variant: ERU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1` writer - ERU1 Gating Clear"] -pub type Eru1W<'a, REG> = crate::BitWriter<'a, REG, Eru1>; -impl<'a, REG> Eru1W<'a, REG> +pub type ERU1_W<'a, REG> = crate::BitWriter<'a, REG, ERU1_A>; +impl<'a, REG> ERU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru1::Value1) + self.variant(ERU1_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru1::Value2) + self.variant(ERU1_A::VALUE2) } } #[doc = "HRPWM0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0 { +pub enum HRPWM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0) -> Self { + fn from(variant: HRPWM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0` writer - HRPWM0 Gating Clear"] -pub type Hrpwm0W<'a, REG> = crate::BitWriter<'a, REG, Hrpwm0>; -impl<'a, REG> Hrpwm0W<'a, REG> +pub type HRPWM0_W<'a, REG> = crate::BitWriter<'a, REG, HRPWM0_A>; +impl<'a, REG> HRPWM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrpwm0::Value1) + self.variant(HRPWM0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrpwm0::Value2) + self.variant(HRPWM0_A::VALUE2) } } impl W { #[doc = "Bit 0 - VADC Gating Clear"] #[inline(always)] #[must_use] - pub fn vadc(&mut self) -> VadcW { - VadcW::new(self, 0) + pub fn vadc(&mut self) -> VADC_W { + VADC_W::new(self, 0) } #[doc = "Bit 2 - CCU40 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu40(&mut self) -> Ccu40W { - Ccu40W::new(self, 2) + pub fn ccu40(&mut self) -> CCU40_W { + CCU40_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu41(&mut self) -> Ccu41W { - Ccu41W::new(self, 3) + pub fn ccu41(&mut self) -> CCU41_W { + CCU41_W::new(self, 3) } #[doc = "Bit 7 - CCU80 Gating Clear"] #[inline(always)] #[must_use] - pub fn ccu80(&mut self) -> Ccu80W { - Ccu80W::new(self, 7) + pub fn ccu80(&mut self) -> CCU80_W { + CCU80_W::new(self, 7) } #[doc = "Bit 9 - POSIF0 Gating Clear"] #[inline(always)] #[must_use] - pub fn posif0(&mut self) -> Posif0W { - Posif0W::new(self, 9) + pub fn posif0(&mut self) -> POSIF0_W { + POSIF0_W::new(self, 9) } #[doc = "Bit 11 - USIC0 Gating Clear"] #[inline(always)] #[must_use] - pub fn usic0(&mut self) -> Usic0W { - Usic0W::new(self, 11) + pub fn usic0(&mut self) -> USIC0_W { + USIC0_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Clear"] #[inline(always)] #[must_use] - pub fn eru1(&mut self) -> Eru1W { - Eru1W::new(self, 16) + pub fn eru1(&mut self) -> ERU1_W { + ERU1_W::new(self, 16) } #[doc = "Bit 23 - HRPWM0 Gating Clear"] #[inline(always)] #[must_use] - pub fn hrpwm0(&mut self) -> Hrpwm0W { - Hrpwm0W::new(self, 23) + pub fn hrpwm0(&mut self) -> HRPWM0_W { + HRPWM0_W::new(self, 23) } } #[doc = "Peripheral 0 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatclr0Spec; -impl crate::RegisterSpec for Cgatclr0Spec { +pub struct CGATCLR0_SPEC; +impl crate::RegisterSpec for CGATCLR0_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr0::W`](W) writer structure"] -impl crate::Writable for Cgatclr0Spec { +impl crate::Writable for CGATCLR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR0 to value 0"] -impl crate::Resettable for Cgatclr0Spec { +impl crate::Resettable for CGATCLR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr1.rs b/src/scu_clk/cgatclr1.rs index 2523b1bc..8e2ec896 100644 --- a/src/scu_clk/cgatclr1.rs +++ b/src/scu_clk/cgatclr1.rs @@ -1,204 +1,204 @@ #[doc = "Register `CGATCLR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "LEDTS Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0 { +pub enum LEDTSCU0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0) -> Self { + fn from(variant: LEDTSCU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0` writer - LEDTS Gating Clear"] -pub type Ledtscu0W<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0>; -impl<'a, REG> Ledtscu0W<'a, REG> +pub type LEDTSCU0_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0_A>; +impl<'a, REG> LEDTSCU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ledtscu0::Value1) + self.variant(LEDTSCU0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ledtscu0::Value2) + self.variant(LEDTSCU0_A::VALUE2) } } #[doc = "MultiCAN Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0 { +pub enum MCAN0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0) -> Self { + fn from(variant: MCAN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0` writer - MultiCAN Gating Clear"] -pub type Mcan0W<'a, REG> = crate::BitWriter<'a, REG, Mcan0>; -impl<'a, REG> Mcan0W<'a, REG> +pub type MCAN0_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0_A>; +impl<'a, REG> MCAN0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcan0::Value1) + self.variant(MCAN0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcan0::Value2) + self.variant(MCAN0_A::VALUE2) } } #[doc = "DAC Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dac { +pub enum DAC_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dac) -> Self { + fn from(variant: DAC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DAC` writer - DAC Gating Clear"] -pub type DacW<'a, REG> = crate::BitWriter<'a, REG, Dac>; -impl<'a, REG> DacW<'a, REG> +pub type DAC_W<'a, REG> = crate::BitWriter<'a, REG, DAC_A>; +impl<'a, REG> DAC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dac::Value1) + self.variant(DAC_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dac::Value2) + self.variant(DAC_A::VALUE2) } } #[doc = "USIC1 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1 { +pub enum USIC1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1) -> Self { + fn from(variant: USIC1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1` writer - USIC1 Gating Clear"] -pub type Usic1W<'a, REG> = crate::BitWriter<'a, REG, Usic1>; -impl<'a, REG> Usic1W<'a, REG> +pub type USIC1_W<'a, REG> = crate::BitWriter<'a, REG, USIC1_A>; +impl<'a, REG> USIC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic1::Value1) + self.variant(USIC1_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic1::Value2) + self.variant(USIC1_A::VALUE2) } } #[doc = "PORTS Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pports { +pub enum PPORTS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pports) -> Self { + fn from(variant: PPORTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTS` writer - PORTS Gating Clear"] -pub type PportsW<'a, REG> = crate::BitWriter<'a, REG, Pports>; -impl<'a, REG> PportsW<'a, REG> +pub type PPORTS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTS_A>; +impl<'a, REG> PPORTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pports::Value1) + self.variant(PPORTS_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pports::Value2) + self.variant(PPORTS_A::VALUE2) } } impl W { #[doc = "Bit 3 - LEDTS Gating Clear"] #[inline(always)] #[must_use] - pub fn ledtscu0(&mut self) -> Ledtscu0W { - Ledtscu0W::new(self, 3) + pub fn ledtscu0(&mut self) -> LEDTSCU0_W { + LEDTSCU0_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Clear"] #[inline(always)] #[must_use] - pub fn mcan0(&mut self) -> Mcan0W { - Mcan0W::new(self, 4) + pub fn mcan0(&mut self) -> MCAN0_W { + MCAN0_W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Clear"] #[inline(always)] #[must_use] - pub fn dac(&mut self) -> DacW { - DacW::new(self, 5) + pub fn dac(&mut self) -> DAC_W { + DAC_W::new(self, 5) } #[doc = "Bit 7 - USIC1 Gating Clear"] #[inline(always)] #[must_use] - pub fn usic1(&mut self) -> Usic1W { - Usic1W::new(self, 7) + pub fn usic1(&mut self) -> USIC1_W { + USIC1_W::new(self, 7) } #[doc = "Bit 9 - PORTS Gating Clear"] #[inline(always)] #[must_use] - pub fn pports(&mut self) -> PportsW { - PportsW::new(self, 9) + pub fn pports(&mut self) -> PPORTS_W { + PPORTS_W::new(self, 9) } } #[doc = "Peripheral 1 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatclr1Spec; -impl crate::RegisterSpec for Cgatclr1Spec { +pub struct CGATCLR1_SPEC; +impl crate::RegisterSpec for CGATCLR1_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr1::W`](W) writer structure"] -impl crate::Writable for Cgatclr1Spec { +impl crate::Writable for CGATCLR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR1 to value 0"] -impl crate::Resettable for Cgatclr1Spec { +impl crate::Resettable for CGATCLR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatclr2.rs b/src/scu_clk/cgatclr2.rs index b7f1339d..53622a8f 100644 --- a/src/scu_clk/cgatclr2.rs +++ b/src/scu_clk/cgatclr2.rs @@ -1,167 +1,167 @@ #[doc = "Register `CGATCLR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdt { +pub enum WDT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdt) -> Self { + fn from(variant: WDT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDT` writer - WDT Gating Clear"] -pub type WdtW<'a, REG> = crate::BitWriter<'a, REG, Wdt>; -impl<'a, REG> WdtW<'a, REG> +pub type WDT_W<'a, REG> = crate::BitWriter<'a, REG, WDT_A>; +impl<'a, REG> WDT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdt::Value1) + self.variant(WDT_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdt::Value2) + self.variant(WDT_A::VALUE2) } } #[doc = "DMA0 Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0 { +pub enum DMA0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0) -> Self { + fn from(variant: DMA0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0` writer - DMA0 Gating Clear"] -pub type Dma0W<'a, REG> = crate::BitWriter<'a, REG, Dma0>; -impl<'a, REG> Dma0W<'a, REG> +pub type DMA0_W<'a, REG> = crate::BitWriter<'a, REG, DMA0_A>; +impl<'a, REG> DMA0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dma0::Value1) + self.variant(DMA0_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dma0::Value2) + self.variant(DMA0_A::VALUE2) } } #[doc = "FCE Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fce { +pub enum FCE_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fce) -> Self { + fn from(variant: FCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCE` writer - FCE Gating Clear"] -pub type FceW<'a, REG> = crate::BitWriter<'a, REG, Fce>; -impl<'a, REG> FceW<'a, REG> +pub type FCE_W<'a, REG> = crate::BitWriter<'a, REG, FCE_A>; +impl<'a, REG> FCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fce::Value1) + self.variant(FCE_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fce::Value2) + self.variant(FCE_A::VALUE2) } } #[doc = "USB Gating Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usb { +pub enum USB_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usb) -> Self { + fn from(variant: USB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USB` writer - USB Gating Clear"] -pub type UsbW<'a, REG> = crate::BitWriter<'a, REG, Usb>; -impl<'a, REG> UsbW<'a, REG> +pub type USB_W<'a, REG> = crate::BitWriter<'a, REG, USB_A>; +impl<'a, REG> USB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usb::Value1) + self.variant(USB_A::VALUE1) } #[doc = "Disable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usb::Value2) + self.variant(USB_A::VALUE2) } } impl W { #[doc = "Bit 1 - WDT Gating Clear"] #[inline(always)] #[must_use] - pub fn wdt(&mut self) -> WdtW { - WdtW::new(self, 1) + pub fn wdt(&mut self) -> WDT_W { + WDT_W::new(self, 1) } #[doc = "Bit 4 - DMA0 Gating Clear"] #[inline(always)] #[must_use] - pub fn dma0(&mut self) -> Dma0W { - Dma0W::new(self, 4) + pub fn dma0(&mut self) -> DMA0_W { + DMA0_W::new(self, 4) } #[doc = "Bit 6 - FCE Gating Clear"] #[inline(always)] #[must_use] - pub fn fce(&mut self) -> FceW { - FceW::new(self, 6) + pub fn fce(&mut self) -> FCE_W { + FCE_W::new(self, 6) } #[doc = "Bit 7 - USB Gating Clear"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> UsbW { - UsbW::new(self, 7) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 7) } } #[doc = "Peripheral 2 Clock Gating Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatclr2Spec; -impl crate::RegisterSpec for Cgatclr2Spec { +pub struct CGATCLR2_SPEC; +impl crate::RegisterSpec for CGATCLR2_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatclr2::W`](W) writer structure"] -impl crate::Writable for Cgatclr2Spec { +impl crate::Writable for CGATCLR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATCLR2 to value 0"] -impl crate::Resettable for Cgatclr2Spec { +impl crate::Resettable for CGATCLR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset0.rs b/src/scu_clk/cgatset0.rs index 41a7de37..bc17f1bd 100644 --- a/src/scu_clk/cgatset0.rs +++ b/src/scu_clk/cgatset0.rs @@ -1,315 +1,315 @@ #[doc = "Register `CGATSET0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadc { +pub enum VADC_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadc) -> Self { + fn from(variant: VADC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADC` writer - VADC Gating Set"] -pub type VadcW<'a, REG> = crate::BitWriter<'a, REG, Vadc>; -impl<'a, REG> VadcW<'a, REG> +pub type VADC_W<'a, REG> = crate::BitWriter<'a, REG, VADC_A>; +impl<'a, REG> VADC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vadc::Value1) + self.variant(VADC_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vadc::Value2) + self.variant(VADC_A::VALUE2) } } #[doc = "CCU40 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40 { +pub enum CCU40_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40) -> Self { + fn from(variant: CCU40_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40` writer - CCU40 Gating Set"] -pub type Ccu40W<'a, REG> = crate::BitWriter<'a, REG, Ccu40>; -impl<'a, REG> Ccu40W<'a, REG> +pub type CCU40_W<'a, REG> = crate::BitWriter<'a, REG, CCU40_A>; +impl<'a, REG> CCU40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu40::Value1) + self.variant(CCU40_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu40::Value2) + self.variant(CCU40_A::VALUE2) } } #[doc = "CCU41 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41 { +pub enum CCU41_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41) -> Self { + fn from(variant: CCU41_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41` writer - CCU41 Gating Set"] -pub type Ccu41W<'a, REG> = crate::BitWriter<'a, REG, Ccu41>; -impl<'a, REG> Ccu41W<'a, REG> +pub type CCU41_W<'a, REG> = crate::BitWriter<'a, REG, CCU41_A>; +impl<'a, REG> CCU41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu41::Value1) + self.variant(CCU41_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu41::Value2) + self.variant(CCU41_A::VALUE2) } } #[doc = "CCU80 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80 { +pub enum CCU80_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80) -> Self { + fn from(variant: CCU80_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80` writer - CCU80 Gating Set"] -pub type Ccu80W<'a, REG> = crate::BitWriter<'a, REG, Ccu80>; -impl<'a, REG> Ccu80W<'a, REG> +pub type CCU80_W<'a, REG> = crate::BitWriter<'a, REG, CCU80_A>; +impl<'a, REG> CCU80_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu80::Value1) + self.variant(CCU80_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu80::Value2) + self.variant(CCU80_A::VALUE2) } } #[doc = "POSIF0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0 { +pub enum POSIF0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0) -> Self { + fn from(variant: POSIF0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0` writer - POSIF0 Gating Set"] -pub type Posif0W<'a, REG> = crate::BitWriter<'a, REG, Posif0>; -impl<'a, REG> Posif0W<'a, REG> +pub type POSIF0_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0_A>; +impl<'a, REG> POSIF0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posif0::Value1) + self.variant(POSIF0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posif0::Value2) + self.variant(POSIF0_A::VALUE2) } } #[doc = "USIC0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0 { +pub enum USIC0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0) -> Self { + fn from(variant: USIC0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0` writer - USIC0 Gating Set"] -pub type Usic0W<'a, REG> = crate::BitWriter<'a, REG, Usic0>; -impl<'a, REG> Usic0W<'a, REG> +pub type USIC0_W<'a, REG> = crate::BitWriter<'a, REG, USIC0_A>; +impl<'a, REG> USIC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic0::Value1) + self.variant(USIC0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic0::Value2) + self.variant(USIC0_A::VALUE2) } } #[doc = "ERU1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1 { +pub enum ERU1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1) -> Self { + fn from(variant: ERU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1` writer - ERU1 Gating Set"] -pub type Eru1W<'a, REG> = crate::BitWriter<'a, REG, Eru1>; -impl<'a, REG> Eru1W<'a, REG> +pub type ERU1_W<'a, REG> = crate::BitWriter<'a, REG, ERU1_A>; +impl<'a, REG> ERU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru1::Value1) + self.variant(ERU1_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru1::Value2) + self.variant(ERU1_A::VALUE2) } } #[doc = "HRPWM0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0 { +pub enum HRPWM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0) -> Self { + fn from(variant: HRPWM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0` writer - HRPWM0 Gating Set"] -pub type Hrpwm0W<'a, REG> = crate::BitWriter<'a, REG, Hrpwm0>; -impl<'a, REG> Hrpwm0W<'a, REG> +pub type HRPWM0_W<'a, REG> = crate::BitWriter<'a, REG, HRPWM0_A>; +impl<'a, REG> HRPWM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrpwm0::Value1) + self.variant(HRPWM0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrpwm0::Value2) + self.variant(HRPWM0_A::VALUE2) } } impl W { #[doc = "Bit 0 - VADC Gating Set"] #[inline(always)] #[must_use] - pub fn vadc(&mut self) -> VadcW { - VadcW::new(self, 0) + pub fn vadc(&mut self) -> VADC_W { + VADC_W::new(self, 0) } #[doc = "Bit 2 - CCU40 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu40(&mut self) -> Ccu40W { - Ccu40W::new(self, 2) + pub fn ccu40(&mut self) -> CCU40_W { + CCU40_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu41(&mut self) -> Ccu41W { - Ccu41W::new(self, 3) + pub fn ccu41(&mut self) -> CCU41_W { + CCU41_W::new(self, 3) } #[doc = "Bit 7 - CCU80 Gating Set"] #[inline(always)] #[must_use] - pub fn ccu80(&mut self) -> Ccu80W { - Ccu80W::new(self, 7) + pub fn ccu80(&mut self) -> CCU80_W { + CCU80_W::new(self, 7) } #[doc = "Bit 9 - POSIF0 Gating Set"] #[inline(always)] #[must_use] - pub fn posif0(&mut self) -> Posif0W { - Posif0W::new(self, 9) + pub fn posif0(&mut self) -> POSIF0_W { + POSIF0_W::new(self, 9) } #[doc = "Bit 11 - USIC0 Gating Set"] #[inline(always)] #[must_use] - pub fn usic0(&mut self) -> Usic0W { - Usic0W::new(self, 11) + pub fn usic0(&mut self) -> USIC0_W { + USIC0_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Set"] #[inline(always)] #[must_use] - pub fn eru1(&mut self) -> Eru1W { - Eru1W::new(self, 16) + pub fn eru1(&mut self) -> ERU1_W { + ERU1_W::new(self, 16) } #[doc = "Bit 23 - HRPWM0 Gating Set"] #[inline(always)] #[must_use] - pub fn hrpwm0(&mut self) -> Hrpwm0W { - Hrpwm0W::new(self, 23) + pub fn hrpwm0(&mut self) -> HRPWM0_W { + HRPWM0_W::new(self, 23) } } #[doc = "Peripheral 0 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatset0Spec; -impl crate::RegisterSpec for Cgatset0Spec { +pub struct CGATSET0_SPEC; +impl crate::RegisterSpec for CGATSET0_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset0::W`](W) writer structure"] -impl crate::Writable for Cgatset0Spec { +impl crate::Writable for CGATSET0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET0 to value 0"] -impl crate::Resettable for Cgatset0Spec { +impl crate::Resettable for CGATSET0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset1.rs b/src/scu_clk/cgatset1.rs index b0a3aa67..626e3725 100644 --- a/src/scu_clk/cgatset1.rs +++ b/src/scu_clk/cgatset1.rs @@ -1,204 +1,204 @@ #[doc = "Register `CGATSET1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "LEDTS Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0 { +pub enum LEDTSCU0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0) -> Self { + fn from(variant: LEDTSCU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0` writer - LEDTS Gating Set"] -pub type Ledtscu0W<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0>; -impl<'a, REG> Ledtscu0W<'a, REG> +pub type LEDTSCU0_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0_A>; +impl<'a, REG> LEDTSCU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ledtscu0::Value1) + self.variant(LEDTSCU0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ledtscu0::Value2) + self.variant(LEDTSCU0_A::VALUE2) } } #[doc = "MultiCAN Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0 { +pub enum MCAN0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0) -> Self { + fn from(variant: MCAN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0` writer - MultiCAN Gating Set"] -pub type Mcan0W<'a, REG> = crate::BitWriter<'a, REG, Mcan0>; -impl<'a, REG> Mcan0W<'a, REG> +pub type MCAN0_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0_A>; +impl<'a, REG> MCAN0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcan0::Value1) + self.variant(MCAN0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcan0::Value2) + self.variant(MCAN0_A::VALUE2) } } #[doc = "DAC Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dac { +pub enum DAC_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dac) -> Self { + fn from(variant: DAC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DAC` writer - DAC Gating Set"] -pub type DacW<'a, REG> = crate::BitWriter<'a, REG, Dac>; -impl<'a, REG> DacW<'a, REG> +pub type DAC_W<'a, REG> = crate::BitWriter<'a, REG, DAC_A>; +impl<'a, REG> DAC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dac::Value1) + self.variant(DAC_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dac::Value2) + self.variant(DAC_A::VALUE2) } } #[doc = "USIC1 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1 { +pub enum USIC1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1) -> Self { + fn from(variant: USIC1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1` writer - USIC1 Gating Set"] -pub type Usic1W<'a, REG> = crate::BitWriter<'a, REG, Usic1>; -impl<'a, REG> Usic1W<'a, REG> +pub type USIC1_W<'a, REG> = crate::BitWriter<'a, REG, USIC1_A>; +impl<'a, REG> USIC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic1::Value1) + self.variant(USIC1_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic1::Value2) + self.variant(USIC1_A::VALUE2) } } #[doc = "PORTS Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pports { +pub enum PPORTS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pports) -> Self { + fn from(variant: PPORTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTS` writer - PORTS Gating Set"] -pub type PportsW<'a, REG> = crate::BitWriter<'a, REG, Pports>; -impl<'a, REG> PportsW<'a, REG> +pub type PPORTS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTS_A>; +impl<'a, REG> PPORTS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pports::Value1) + self.variant(PPORTS_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pports::Value2) + self.variant(PPORTS_A::VALUE2) } } impl W { #[doc = "Bit 3 - LEDTS Gating Set"] #[inline(always)] #[must_use] - pub fn ledtscu0(&mut self) -> Ledtscu0W { - Ledtscu0W::new(self, 3) + pub fn ledtscu0(&mut self) -> LEDTSCU0_W { + LEDTSCU0_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Set"] #[inline(always)] #[must_use] - pub fn mcan0(&mut self) -> Mcan0W { - Mcan0W::new(self, 4) + pub fn mcan0(&mut self) -> MCAN0_W { + MCAN0_W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Set"] #[inline(always)] #[must_use] - pub fn dac(&mut self) -> DacW { - DacW::new(self, 5) + pub fn dac(&mut self) -> DAC_W { + DAC_W::new(self, 5) } #[doc = "Bit 7 - USIC1 Gating Set"] #[inline(always)] #[must_use] - pub fn usic1(&mut self) -> Usic1W { - Usic1W::new(self, 7) + pub fn usic1(&mut self) -> USIC1_W { + USIC1_W::new(self, 7) } #[doc = "Bit 9 - PORTS Gating Set"] #[inline(always)] #[must_use] - pub fn pports(&mut self) -> PportsW { - PportsW::new(self, 9) + pub fn pports(&mut self) -> PPORTS_W { + PPORTS_W::new(self, 9) } } #[doc = "Peripheral 1 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatset1Spec; -impl crate::RegisterSpec for Cgatset1Spec { +pub struct CGATSET1_SPEC; +impl crate::RegisterSpec for CGATSET1_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset1::W`](W) writer structure"] -impl crate::Writable for Cgatset1Spec { +impl crate::Writable for CGATSET1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET1 to value 0"] -impl crate::Resettable for Cgatset1Spec { +impl crate::Resettable for CGATSET1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatset2.rs b/src/scu_clk/cgatset2.rs index 887e7a53..75e6f89a 100644 --- a/src/scu_clk/cgatset2.rs +++ b/src/scu_clk/cgatset2.rs @@ -1,167 +1,167 @@ #[doc = "Register `CGATSET2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdt { +pub enum WDT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdt) -> Self { + fn from(variant: WDT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDT` writer - WDT Gating Set"] -pub type WdtW<'a, REG> = crate::BitWriter<'a, REG, Wdt>; -impl<'a, REG> WdtW<'a, REG> +pub type WDT_W<'a, REG> = crate::BitWriter<'a, REG, WDT_A>; +impl<'a, REG> WDT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdt::Value1) + self.variant(WDT_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdt::Value2) + self.variant(WDT_A::VALUE2) } } #[doc = "DMA0 Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0 { +pub enum DMA0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0) -> Self { + fn from(variant: DMA0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0` writer - DMA0 Gating Set"] -pub type Dma0W<'a, REG> = crate::BitWriter<'a, REG, Dma0>; -impl<'a, REG> Dma0W<'a, REG> +pub type DMA0_W<'a, REG> = crate::BitWriter<'a, REG, DMA0_A>; +impl<'a, REG> DMA0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dma0::Value1) + self.variant(DMA0_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dma0::Value2) + self.variant(DMA0_A::VALUE2) } } #[doc = "FCE Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fce { +pub enum FCE_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fce) -> Self { + fn from(variant: FCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCE` writer - FCE Gating Set"] -pub type FceW<'a, REG> = crate::BitWriter<'a, REG, Fce>; -impl<'a, REG> FceW<'a, REG> +pub type FCE_W<'a, REG> = crate::BitWriter<'a, REG, FCE_A>; +impl<'a, REG> FCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fce::Value1) + self.variant(FCE_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fce::Value2) + self.variant(FCE_A::VALUE2) } } #[doc = "USB Gating Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usb { +pub enum USB_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable gating"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usb) -> Self { + fn from(variant: USB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USB` writer - USB Gating Set"] -pub type UsbW<'a, REG> = crate::BitWriter<'a, REG, Usb>; -impl<'a, REG> UsbW<'a, REG> +pub type USB_W<'a, REG> = crate::BitWriter<'a, REG, USB_A>; +impl<'a, REG> USB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usb::Value1) + self.variant(USB_A::VALUE1) } #[doc = "Enable gating"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usb::Value2) + self.variant(USB_A::VALUE2) } } impl W { #[doc = "Bit 1 - WDT Gating Set"] #[inline(always)] #[must_use] - pub fn wdt(&mut self) -> WdtW { - WdtW::new(self, 1) + pub fn wdt(&mut self) -> WDT_W { + WDT_W::new(self, 1) } #[doc = "Bit 4 - DMA0 Gating Set"] #[inline(always)] #[must_use] - pub fn dma0(&mut self) -> Dma0W { - Dma0W::new(self, 4) + pub fn dma0(&mut self) -> DMA0_W { + DMA0_W::new(self, 4) } #[doc = "Bit 6 - FCE Gating Set"] #[inline(always)] #[must_use] - pub fn fce(&mut self) -> FceW { - FceW::new(self, 6) + pub fn fce(&mut self) -> FCE_W { + FCE_W::new(self, 6) } #[doc = "Bit 7 - USB Gating Set"] #[inline(always)] #[must_use] - pub fn usb(&mut self) -> UsbW { - UsbW::new(self, 7) + pub fn usb(&mut self) -> USB_W { + USB_W::new(self, 7) } } #[doc = "Peripheral 2 Clock Gating Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cgatset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatset2Spec; -impl crate::RegisterSpec for Cgatset2Spec { +pub struct CGATSET2_SPEC; +impl crate::RegisterSpec for CGATSET2_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cgatset2::W`](W) writer structure"] -impl crate::Writable for Cgatset2Spec { +impl crate::Writable for CGATSET2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CGATSET2 to value 0"] -impl crate::Resettable for Cgatset2Spec { +impl crate::Resettable for CGATSET2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat0.rs b/src/scu_clk/cgatstat0.rs index 17a790d0..39c0aa59 100644 --- a/src/scu_clk/cgatstat0.rs +++ b/src/scu_clk/cgatstat0.rs @@ -1,343 +1,343 @@ #[doc = "Register `CGATSTAT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "VADC Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadc { +pub enum VADC_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadc) -> Self { + fn from(variant: VADC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADC` reader - VADC Gating Status"] -pub type VadcR = crate::BitReader; -impl VadcR { +pub type VADC_R = crate::BitReader; +impl VADC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vadc { + pub const fn variant(&self) -> VADC_A { match self.bits { - false => Vadc::Value1, - true => Vadc::Value2, + false => VADC_A::VALUE1, + true => VADC_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vadc::Value1 + *self == VADC_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vadc::Value2 + *self == VADC_A::VALUE2 } } #[doc = "CCU40 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40 { +pub enum CCU40_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40) -> Self { + fn from(variant: CCU40_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40` reader - CCU40 Gating Status"] -pub type Ccu40R = crate::BitReader; -impl Ccu40R { +pub type CCU40_R = crate::BitReader; +impl CCU40_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu40 { + pub const fn variant(&self) -> CCU40_A { match self.bits { - false => Ccu40::Value1, - true => Ccu40::Value2, + false => CCU40_A::VALUE1, + true => CCU40_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu40::Value1 + *self == CCU40_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu40::Value2 + *self == CCU40_A::VALUE2 } } #[doc = "CCU41 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41 { +pub enum CCU41_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41) -> Self { + fn from(variant: CCU41_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41` reader - CCU41 Gating Status"] -pub type Ccu41R = crate::BitReader; -impl Ccu41R { +pub type CCU41_R = crate::BitReader; +impl CCU41_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu41 { + pub const fn variant(&self) -> CCU41_A { match self.bits { - false => Ccu41::Value1, - true => Ccu41::Value2, + false => CCU41_A::VALUE1, + true => CCU41_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu41::Value1 + *self == CCU41_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu41::Value2 + *self == CCU41_A::VALUE2 } } #[doc = "CCU80 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80 { +pub enum CCU80_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80) -> Self { + fn from(variant: CCU80_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80` reader - CCU80 Gating Status"] -pub type Ccu80R = crate::BitReader; -impl Ccu80R { +pub type CCU80_R = crate::BitReader; +impl CCU80_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu80 { + pub const fn variant(&self) -> CCU80_A { match self.bits { - false => Ccu80::Value1, - true => Ccu80::Value2, + false => CCU80_A::VALUE1, + true => CCU80_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu80::Value1 + *self == CCU80_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu80::Value2 + *self == CCU80_A::VALUE2 } } #[doc = "POSIF0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0 { +pub enum POSIF0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0) -> Self { + fn from(variant: POSIF0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0` reader - POSIF0 Gating Status"] -pub type Posif0R = crate::BitReader; -impl Posif0R { +pub type POSIF0_R = crate::BitReader; +impl POSIF0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Posif0 { + pub const fn variant(&self) -> POSIF0_A { match self.bits { - false => Posif0::Value1, - true => Posif0::Value2, + false => POSIF0_A::VALUE1, + true => POSIF0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Posif0::Value1 + *self == POSIF0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Posif0::Value2 + *self == POSIF0_A::VALUE2 } } #[doc = "USIC0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0 { +pub enum USIC0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0) -> Self { + fn from(variant: USIC0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0` reader - USIC0 Gating Status"] -pub type Usic0R = crate::BitReader; -impl Usic0R { +pub type USIC0_R = crate::BitReader; +impl USIC0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic0 { + pub const fn variant(&self) -> USIC0_A { match self.bits { - false => Usic0::Value1, - true => Usic0::Value2, + false => USIC0_A::VALUE1, + true => USIC0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic0::Value1 + *self == USIC0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic0::Value2 + *self == USIC0_A::VALUE2 } } #[doc = "ERU1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1 { +pub enum ERU1_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1) -> Self { + fn from(variant: ERU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1` reader - ERU1 Gating Status"] -pub type Eru1R = crate::BitReader; -impl Eru1R { +pub type ERU1_R = crate::BitReader; +impl ERU1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru1 { + pub const fn variant(&self) -> ERU1_A { match self.bits { - false => Eru1::Value1, - true => Eru1::Value2, + false => ERU1_A::VALUE1, + true => ERU1_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru1::Value1 + *self == ERU1_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru1::Value2 + *self == ERU1_A::VALUE2 } } #[doc = "HRPWM0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0 { +pub enum HRPWM0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0) -> Self { + fn from(variant: HRPWM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0` reader - HRPWM0 Gating Status"] -pub type Hrpwm0R = crate::BitReader; -impl Hrpwm0R { +pub type HRPWM0_R = crate::BitReader; +impl HRPWM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrpwm0 { + pub const fn variant(&self) -> HRPWM0_A { match self.bits { - false => Hrpwm0::Value1, - true => Hrpwm0::Value2, + false => HRPWM0_A::VALUE1, + true => HRPWM0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrpwm0::Value1 + *self == HRPWM0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrpwm0::Value2 + *self == HRPWM0_A::VALUE2 } } impl R { #[doc = "Bit 0 - VADC Gating Status"] #[inline(always)] - pub fn vadc(&self) -> VadcR { - VadcR::new((self.bits & 1) != 0) + pub fn vadc(&self) -> VADC_R { + VADC_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - CCU40 Gating Status"] #[inline(always)] - pub fn ccu40(&self) -> Ccu40R { - Ccu40R::new(((self.bits >> 2) & 1) != 0) + pub fn ccu40(&self) -> CCU40_R { + CCU40_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CCU41 Gating Status"] #[inline(always)] - pub fn ccu41(&self) -> Ccu41R { - Ccu41R::new(((self.bits >> 3) & 1) != 0) + pub fn ccu41(&self) -> CCU41_R { + CCU41_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - CCU80 Gating Status"] #[inline(always)] - pub fn ccu80(&self) -> Ccu80R { - Ccu80R::new(((self.bits >> 7) & 1) != 0) + pub fn ccu80(&self) -> CCU80_R { + CCU80_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - POSIF0 Gating Status"] #[inline(always)] - pub fn posif0(&self) -> Posif0R { - Posif0R::new(((self.bits >> 9) & 1) != 0) + pub fn posif0(&self) -> POSIF0_R { + POSIF0_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - USIC0 Gating Status"] #[inline(always)] - pub fn usic0(&self) -> Usic0R { - Usic0R::new(((self.bits >> 11) & 1) != 0) + pub fn usic0(&self) -> USIC0_R { + USIC0_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - ERU1 Gating Status"] #[inline(always)] - pub fn eru1(&self) -> Eru1R { - Eru1R::new(((self.bits >> 16) & 1) != 0) + pub fn eru1(&self) -> ERU1_R { + ERU1_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 23 - HRPWM0 Gating Status"] #[inline(always)] - pub fn hrpwm0(&self) -> Hrpwm0R { - Hrpwm0R::new(((self.bits >> 23) & 1) != 0) + pub fn hrpwm0(&self) -> HRPWM0_R { + HRPWM0_R::new(((self.bits >> 23) & 1) != 0) } } #[doc = "Peripheral 0 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatstat0Spec; -impl crate::RegisterSpec for Cgatstat0Spec { +pub struct CGATSTAT0_SPEC; +impl crate::RegisterSpec for CGATSTAT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat0::R`](R) reader structure"] -impl crate::Readable for Cgatstat0Spec {} +impl crate::Readable for CGATSTAT0_SPEC {} #[doc = "`reset()` method sets CGATSTAT0 to value 0"] -impl crate::Resettable for Cgatstat0Spec { +impl crate::Resettable for CGATSTAT0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat1.rs b/src/scu_clk/cgatstat1.rs index fe4b8ea8..78eac7b4 100644 --- a/src/scu_clk/cgatstat1.rs +++ b/src/scu_clk/cgatstat1.rs @@ -1,220 +1,220 @@ #[doc = "Register `CGATSTAT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "LEDTS Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0 { +pub enum LEDTSCU0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0) -> Self { + fn from(variant: LEDTSCU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0` reader - LEDTS Gating Status"] -pub type Ledtscu0R = crate::BitReader; -impl Ledtscu0R { +pub type LEDTSCU0_R = crate::BitReader; +impl LEDTSCU0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ledtscu0 { + pub const fn variant(&self) -> LEDTSCU0_A { match self.bits { - false => Ledtscu0::Value1, - true => Ledtscu0::Value2, + false => LEDTSCU0_A::VALUE1, + true => LEDTSCU0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ledtscu0::Value1 + *self == LEDTSCU0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ledtscu0::Value2 + *self == LEDTSCU0_A::VALUE2 } } #[doc = "MultiCAN Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0 { +pub enum MCAN0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0) -> Self { + fn from(variant: MCAN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0` reader - MultiCAN Gating Status"] -pub type Mcan0R = crate::BitReader; -impl Mcan0R { +pub type MCAN0_R = crate::BitReader; +impl MCAN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcan0 { + pub const fn variant(&self) -> MCAN0_A { match self.bits { - false => Mcan0::Value1, - true => Mcan0::Value2, + false => MCAN0_A::VALUE1, + true => MCAN0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcan0::Value1 + *self == MCAN0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcan0::Value2 + *self == MCAN0_A::VALUE2 } } #[doc = "DAC Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dac { +pub enum DAC_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dac) -> Self { + fn from(variant: DAC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DAC` reader - DAC Gating Status"] -pub type DacR = crate::BitReader; -impl DacR { +pub type DAC_R = crate::BitReader; +impl DAC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dac { + pub const fn variant(&self) -> DAC_A { match self.bits { - false => Dac::Value1, - true => Dac::Value2, + false => DAC_A::VALUE1, + true => DAC_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dac::Value1 + *self == DAC_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dac::Value2 + *self == DAC_A::VALUE2 } } #[doc = "USIC1 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1 { +pub enum USIC1_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1) -> Self { + fn from(variant: USIC1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1` reader - USIC1 Gating Status"] -pub type Usic1R = crate::BitReader; -impl Usic1R { +pub type USIC1_R = crate::BitReader; +impl USIC1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic1 { + pub const fn variant(&self) -> USIC1_A { match self.bits { - false => Usic1::Value1, - true => Usic1::Value2, + false => USIC1_A::VALUE1, + true => USIC1_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic1::Value1 + *self == USIC1_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic1::Value2 + *self == USIC1_A::VALUE2 } } #[doc = "PORTS Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pports { +pub enum PPORTS_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pports) -> Self { + fn from(variant: PPORTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTS` reader - PORTS Gating Status"] -pub type PportsR = crate::BitReader; -impl PportsR { +pub type PPORTS_R = crate::BitReader; +impl PPORTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pports { + pub const fn variant(&self) -> PPORTS_A { match self.bits { - false => Pports::Value1, - true => Pports::Value2, + false => PPORTS_A::VALUE1, + true => PPORTS_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pports::Value1 + *self == PPORTS_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pports::Value2 + *self == PPORTS_A::VALUE2 } } impl R { #[doc = "Bit 3 - LEDTS Gating Status"] #[inline(always)] - pub fn ledtscu0(&self) -> Ledtscu0R { - Ledtscu0R::new(((self.bits >> 3) & 1) != 0) + pub fn ledtscu0(&self) -> LEDTSCU0_R { + LEDTSCU0_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MultiCAN Gating Status"] #[inline(always)] - pub fn mcan0(&self) -> Mcan0R { - Mcan0R::new(((self.bits >> 4) & 1) != 0) + pub fn mcan0(&self) -> MCAN0_R { + MCAN0_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DAC Gating Status"] #[inline(always)] - pub fn dac(&self) -> DacR { - DacR::new(((self.bits >> 5) & 1) != 0) + pub fn dac(&self) -> DAC_R { + DAC_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - USIC1 Gating Status"] #[inline(always)] - pub fn usic1(&self) -> Usic1R { - Usic1R::new(((self.bits >> 7) & 1) != 0) + pub fn usic1(&self) -> USIC1_R { + USIC1_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - PORTS Gating Status"] #[inline(always)] - pub fn pports(&self) -> PportsR { - PportsR::new(((self.bits >> 9) & 1) != 0) + pub fn pports(&self) -> PPORTS_R { + PPORTS_R::new(((self.bits >> 9) & 1) != 0) } } #[doc = "Peripheral 1 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatstat1Spec; -impl crate::RegisterSpec for Cgatstat1Spec { +pub struct CGATSTAT1_SPEC; +impl crate::RegisterSpec for CGATSTAT1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat1::R`](R) reader structure"] -impl crate::Readable for Cgatstat1Spec {} +impl crate::Readable for CGATSTAT1_SPEC {} #[doc = "`reset()` method sets CGATSTAT1 to value 0"] -impl crate::Resettable for Cgatstat1Spec { +impl crate::Resettable for CGATSTAT1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cgatstat2.rs b/src/scu_clk/cgatstat2.rs index 9adebeca..619ba230 100644 --- a/src/scu_clk/cgatstat2.rs +++ b/src/scu_clk/cgatstat2.rs @@ -1,179 +1,179 @@ #[doc = "Register `CGATSTAT2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "WDT Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdt { +pub enum WDT_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdt) -> Self { + fn from(variant: WDT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDT` reader - WDT Gating Status"] -pub type WdtR = crate::BitReader; -impl WdtR { +pub type WDT_R = crate::BitReader; +impl WDT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wdt { + pub const fn variant(&self) -> WDT_A { match self.bits { - false => Wdt::Value1, - true => Wdt::Value2, + false => WDT_A::VALUE1, + true => WDT_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdt::Value1 + *self == WDT_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdt::Value2 + *self == WDT_A::VALUE2 } } #[doc = "DMA0 Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0 { +pub enum DMA0_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0) -> Self { + fn from(variant: DMA0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0` reader - DMA0 Gating Status"] -pub type Dma0R = crate::BitReader; -impl Dma0R { +pub type DMA0_R = crate::BitReader; +impl DMA0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dma0 { + pub const fn variant(&self) -> DMA0_A { match self.bits { - false => Dma0::Value1, - true => Dma0::Value2, + false => DMA0_A::VALUE1, + true => DMA0_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dma0::Value1 + *self == DMA0_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dma0::Value2 + *self == DMA0_A::VALUE2 } } #[doc = "FCE Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fce { +pub enum FCE_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fce) -> Self { + fn from(variant: FCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCE` reader - FCE Gating Status"] -pub type FceR = crate::BitReader; -impl FceR { +pub type FCE_R = crate::BitReader; +impl FCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fce { + pub const fn variant(&self) -> FCE_A { match self.bits { - false => Fce::Value1, - true => Fce::Value2, + false => FCE_A::VALUE1, + true => FCE_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fce::Value1 + *self == FCE_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fce::Value2 + *self == FCE_A::VALUE2 } } #[doc = "USB Gating Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usb { +pub enum USB_A { #[doc = "0: Gating de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Gating asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usb) -> Self { + fn from(variant: USB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USB` reader - USB Gating Status"] -pub type UsbR = crate::BitReader; -impl UsbR { +pub type USB_R = crate::BitReader; +impl USB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usb { + pub const fn variant(&self) -> USB_A { match self.bits { - false => Usb::Value1, - true => Usb::Value2, + false => USB_A::VALUE1, + true => USB_A::VALUE2, } } #[doc = "Gating de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usb::Value1 + *self == USB_A::VALUE1 } #[doc = "Gating asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usb::Value2 + *self == USB_A::VALUE2 } } impl R { #[doc = "Bit 1 - WDT Gating Status"] #[inline(always)] - pub fn wdt(&self) -> WdtR { - WdtR::new(((self.bits >> 1) & 1) != 0) + pub fn wdt(&self) -> WDT_R { + WDT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - DMA0 Gating Status"] #[inline(always)] - pub fn dma0(&self) -> Dma0R { - Dma0R::new(((self.bits >> 4) & 1) != 0) + pub fn dma0(&self) -> DMA0_R { + DMA0_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - FCE Gating Status"] #[inline(always)] - pub fn fce(&self) -> FceR { - FceR::new(((self.bits >> 6) & 1) != 0) + pub fn fce(&self) -> FCE_R { + FCE_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USB Gating Status"] #[inline(always)] - pub fn usb(&self) -> UsbR { - UsbR::new(((self.bits >> 7) & 1) != 0) + pub fn usb(&self) -> USB_R { + USB_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Peripheral 2 Clock Gating Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cgatstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cgatstat2Spec; -impl crate::RegisterSpec for Cgatstat2Spec { +pub struct CGATSTAT2_SPEC; +impl crate::RegisterSpec for CGATSTAT2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cgatstat2::R`](R) reader structure"] -impl crate::Readable for Cgatstat2Spec {} +impl crate::Readable for CGATSTAT2_SPEC {} #[doc = "`reset()` method sets CGATSTAT2 to value 0"] -impl crate::Resettable for Cgatstat2Spec { +impl crate::Resettable for CGATSTAT2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkclr.rs b/src/scu_clk/clkclr.rs index 711f9e9c..4a9ccd16 100644 --- a/src/scu_clk/clkclr.rs +++ b/src/scu_clk/clkclr.rs @@ -1,130 +1,130 @@ #[doc = "Register `CLKCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "USB Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbcdi { +pub enum USBCDI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbcdi) -> Self { + fn from(variant: USBCDI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCDI` writer - USB Clock Disable"] -pub type UsbcdiW<'a, REG> = crate::BitWriter<'a, REG, Usbcdi>; -impl<'a, REG> UsbcdiW<'a, REG> +pub type USBCDI_W<'a, REG> = crate::BitWriter<'a, REG, USBCDI_A>; +impl<'a, REG> USBCDI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbcdi::Value1) + self.variant(USBCDI_A::VALUE1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbcdi::Value2) + self.variant(USBCDI_A::VALUE2) } } #[doc = "CCU Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccucdi { +pub enum CCUCDI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccucdi) -> Self { + fn from(variant: CCUCDI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCDI` writer - CCU Clock Disable"] -pub type CcucdiW<'a, REG> = crate::BitWriter<'a, REG, Ccucdi>; -impl<'a, REG> CcucdiW<'a, REG> +pub type CCUCDI_W<'a, REG> = crate::BitWriter<'a, REG, CCUCDI_A>; +impl<'a, REG> CCUCDI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccucdi::Value1) + self.variant(CCUCDI_A::VALUE1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccucdi::Value2) + self.variant(CCUCDI_A::VALUE2) } } #[doc = "WDT Clock Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtcdi { +pub enum WDTCDI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtcdi) -> Self { + fn from(variant: WDTCDI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCDI` writer - WDT Clock Disable"] -pub type WdtcdiW<'a, REG> = crate::BitWriter<'a, REG, Wdtcdi>; -impl<'a, REG> WdtcdiW<'a, REG> +pub type WDTCDI_W<'a, REG> = crate::BitWriter<'a, REG, WDTCDI_A>; +impl<'a, REG> WDTCDI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtcdi::Value1) + self.variant(WDTCDI_A::VALUE1) } #[doc = "Disable clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtcdi::Value2) + self.variant(WDTCDI_A::VALUE2) } } impl W { #[doc = "Bit 0 - USB Clock Disable"] #[inline(always)] #[must_use] - pub fn usbcdi(&mut self) -> UsbcdiW { - UsbcdiW::new(self, 0) + pub fn usbcdi(&mut self) -> USBCDI_W { + USBCDI_W::new(self, 0) } #[doc = "Bit 4 - CCU Clock Disable"] #[inline(always)] #[must_use] - pub fn ccucdi(&mut self) -> CcucdiW { - CcucdiW::new(self, 4) + pub fn ccucdi(&mut self) -> CCUCDI_W { + CCUCDI_W::new(self, 4) } #[doc = "Bit 5 - WDT Clock Disable"] #[inline(always)] #[must_use] - pub fn wdtcdi(&mut self) -> WdtcdiW { - WdtcdiW::new(self, 5) + pub fn wdtcdi(&mut self) -> WDTCDI_W { + WDTCDI_W::new(self, 5) } } #[doc = "CLK Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClkclrSpec; -impl crate::RegisterSpec for ClkclrSpec { +pub struct CLKCLR_SPEC; +impl crate::RegisterSpec for CLKCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clkclr::W`](W) writer structure"] -impl crate::Writable for ClkclrSpec { +impl crate::Writable for CLKCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKCLR to value 0"] -impl crate::Resettable for ClkclrSpec { +impl crate::Resettable for CLKCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkset.rs b/src/scu_clk/clkset.rs index b2be05dc..d3d4fcf3 100644 --- a/src/scu_clk/clkset.rs +++ b/src/scu_clk/clkset.rs @@ -1,130 +1,130 @@ #[doc = "Register `CLKSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "USB Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbcen { +pub enum USBCEN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbcen) -> Self { + fn from(variant: USBCEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCEN` writer - USB Clock Enable"] -pub type UsbcenW<'a, REG> = crate::BitWriter<'a, REG, Usbcen>; -impl<'a, REG> UsbcenW<'a, REG> +pub type USBCEN_W<'a, REG> = crate::BitWriter<'a, REG, USBCEN_A>; +impl<'a, REG> USBCEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbcen::Value1) + self.variant(USBCEN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbcen::Value2) + self.variant(USBCEN_A::VALUE2) } } #[doc = "CCU Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccucen { +pub enum CCUCEN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccucen) -> Self { + fn from(variant: CCUCEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCEN` writer - CCU Clock Enable"] -pub type CcucenW<'a, REG> = crate::BitWriter<'a, REG, Ccucen>; -impl<'a, REG> CcucenW<'a, REG> +pub type CCUCEN_W<'a, REG> = crate::BitWriter<'a, REG, CCUCEN_A>; +impl<'a, REG> CCUCEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccucen::Value1) + self.variant(CCUCEN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccucen::Value2) + self.variant(CCUCEN_A::VALUE2) } } #[doc = "WDT Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtcen { +pub enum WDTCEN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtcen) -> Self { + fn from(variant: WDTCEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCEN` writer - WDT Clock Enable"] -pub type WdtcenW<'a, REG> = crate::BitWriter<'a, REG, Wdtcen>; -impl<'a, REG> WdtcenW<'a, REG> +pub type WDTCEN_W<'a, REG> = crate::BitWriter<'a, REG, WDTCEN_A>; +impl<'a, REG> WDTCEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtcen::Value1) + self.variant(WDTCEN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtcen::Value2) + self.variant(WDTCEN_A::VALUE2) } } impl W { #[doc = "Bit 0 - USB Clock Enable"] #[inline(always)] #[must_use] - pub fn usbcen(&mut self) -> UsbcenW { - UsbcenW::new(self, 0) + pub fn usbcen(&mut self) -> USBCEN_W { + USBCEN_W::new(self, 0) } #[doc = "Bit 4 - CCU Clock Enable"] #[inline(always)] #[must_use] - pub fn ccucen(&mut self) -> CcucenW { - CcucenW::new(self, 4) + pub fn ccucen(&mut self) -> CCUCEN_W { + CCUCEN_W::new(self, 4) } #[doc = "Bit 5 - WDT Clock Enable"] #[inline(always)] #[must_use] - pub fn wdtcen(&mut self) -> WdtcenW { - WdtcenW::new(self, 5) + pub fn wdtcen(&mut self) -> WDTCEN_W { + WDTCEN_W::new(self, 5) } } #[doc = "CLK Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClksetSpec; -impl crate::RegisterSpec for ClksetSpec { +pub struct CLKSET_SPEC; +impl crate::RegisterSpec for CLKSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`clkset::W`](W) writer structure"] -impl crate::Writable for ClksetSpec { +impl crate::Writable for CLKSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKSET to value 0"] -impl crate::Resettable for ClksetSpec { +impl crate::Resettable for CLKSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/clkstat.rs b/src/scu_clk/clkstat.rs index ddcb36d4..b002d260 100644 --- a/src/scu_clk/clkstat.rs +++ b/src/scu_clk/clkstat.rs @@ -1,138 +1,138 @@ #[doc = "Register `CLKSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "USB Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbcst { +pub enum USBCST_A { #[doc = "0: Clock disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clock enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbcst) -> Self { + fn from(variant: USBCST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCST` reader - USB Clock Status"] -pub type UsbcstR = crate::BitReader; -impl UsbcstR { +pub type USBCST_R = crate::BitReader; +impl USBCST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbcst { + pub const fn variant(&self) -> USBCST_A { match self.bits { - false => Usbcst::Value1, - true => Usbcst::Value2, + false => USBCST_A::VALUE1, + true => USBCST_A::VALUE2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbcst::Value1 + *self == USBCST_A::VALUE1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbcst::Value2 + *self == USBCST_A::VALUE2 } } #[doc = "CCU Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccucst { +pub enum CCUCST_A { #[doc = "0: Clock disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clock enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccucst) -> Self { + fn from(variant: CCUCST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCST` reader - CCU Clock Status"] -pub type CcucstR = crate::BitReader; -impl CcucstR { +pub type CCUCST_R = crate::BitReader; +impl CCUCST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccucst { + pub const fn variant(&self) -> CCUCST_A { match self.bits { - false => Ccucst::Value1, - true => Ccucst::Value2, + false => CCUCST_A::VALUE1, + true => CCUCST_A::VALUE2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccucst::Value1 + *self == CCUCST_A::VALUE1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccucst::Value2 + *self == CCUCST_A::VALUE2 } } #[doc = "WDT Clock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtcst { +pub enum WDTCST_A { #[doc = "0: Clock disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clock enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtcst) -> Self { + fn from(variant: WDTCST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCST` reader - WDT Clock Status"] -pub type WdtcstR = crate::BitReader; -impl WdtcstR { +pub type WDTCST_R = crate::BitReader; +impl WDTCST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wdtcst { + pub const fn variant(&self) -> WDTCST_A { match self.bits { - false => Wdtcst::Value1, - true => Wdtcst::Value2, + false => WDTCST_A::VALUE1, + true => WDTCST_A::VALUE2, } } #[doc = "Clock disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtcst::Value1 + *self == WDTCST_A::VALUE1 } #[doc = "Clock enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtcst::Value2 + *self == WDTCST_A::VALUE2 } } impl R { #[doc = "Bit 0 - USB Clock Status"] #[inline(always)] - pub fn usbcst(&self) -> UsbcstR { - UsbcstR::new((self.bits & 1) != 0) + pub fn usbcst(&self) -> USBCST_R { + USBCST_R::new((self.bits & 1) != 0) } #[doc = "Bit 4 - CCU Clock Status"] #[inline(always)] - pub fn ccucst(&self) -> CcucstR { - CcucstR::new(((self.bits >> 4) & 1) != 0) + pub fn ccucst(&self) -> CCUCST_R { + CCUCST_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WDT Clock Status"] #[inline(always)] - pub fn wdtcst(&self) -> WdtcstR { - WdtcstR::new(((self.bits >> 5) & 1) != 0) + pub fn wdtcst(&self) -> WDTCST_R { + WDTCST_R::new(((self.bits >> 5) & 1) != 0) } } #[doc = "Clock Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClkstatSpec; -impl crate::RegisterSpec for ClkstatSpec { +pub struct CLKSTAT_SPEC; +impl crate::RegisterSpec for CLKSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clkstat::R`](R) reader structure"] -impl crate::Readable for ClkstatSpec {} +impl crate::Readable for CLKSTAT_SPEC {} #[doc = "`reset()` method sets CLKSTAT to value 0"] -impl crate::Resettable for ClkstatSpec { +impl crate::Resettable for CLKSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/cpuclkcr.rs b/src/scu_clk/cpuclkcr.rs index d39d959c..1a855510 100644 --- a/src/scu_clk/cpuclkcr.rs +++ b/src/scu_clk/cpuclkcr.rs @@ -1,89 +1,89 @@ #[doc = "Register `CPUCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CPUCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "CPU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cpudiv { +pub enum CPUDIV_A { #[doc = "0: fCPU = fSYS"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCPU = fSYS / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cpudiv) -> Self { + fn from(variant: CPUDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] -pub type CpudivR = crate::BitReader; -impl CpudivR { +pub type CPUDIV_R = crate::BitReader; +impl CPUDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cpudiv { + pub const fn variant(&self) -> CPUDIV_A { match self.bits { - false => Cpudiv::Value1, - true => Cpudiv::Value2, + false => CPUDIV_A::VALUE1, + true => CPUDIV_A::VALUE2, } } #[doc = "fCPU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cpudiv::Value1 + *self == CPUDIV_A::VALUE1 } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cpudiv::Value2 + *self == CPUDIV_A::VALUE2 } } #[doc = "Field `CPUDIV` writer - CPU Clock Divider Enable"] -pub type CpudivW<'a, REG> = crate::BitWriter<'a, REG, Cpudiv>; -impl<'a, REG> CpudivW<'a, REG> +pub type CPUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CPUDIV_A>; +impl<'a, REG> CPUDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCPU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cpudiv::Value1) + self.variant(CPUDIV_A::VALUE1) } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cpudiv::Value2) + self.variant(CPUDIV_A::VALUE2) } } impl R { #[doc = "Bit 0 - CPU Clock Divider Enable"] #[inline(always)] - pub fn cpudiv(&self) -> CpudivR { - CpudivR::new((self.bits & 1) != 0) + pub fn cpudiv(&self) -> CPUDIV_R { + CPUDIV_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - CPU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn cpudiv(&mut self) -> CpudivW { - CpudivW::new(self, 0) + pub fn cpudiv(&mut self) -> CPUDIV_W { + CPUDIV_W::new(self, 0) } } #[doc = "CPU Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpuclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpuclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CpuclkcrSpec; -impl crate::RegisterSpec for CpuclkcrSpec { +pub struct CPUCLKCR_SPEC; +impl crate::RegisterSpec for CPUCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cpuclkcr::R`](R) reader structure"] -impl crate::Readable for CpuclkcrSpec {} +impl crate::Readable for CPUCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`cpuclkcr::W`](W) writer structure"] -impl crate::Writable for CpuclkcrSpec { +impl crate::Writable for CPUCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CPUCLKCR to value 0"] -impl crate::Resettable for CpuclkcrSpec { +impl crate::Resettable for CPUCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/dsleepcr.rs b/src/scu_clk/dsleepcr.rs index ed150428..d5c4c8e5 100644 --- a/src/scu_clk/dsleepcr.rs +++ b/src/scu_clk/dsleepcr.rs @@ -1,473 +1,473 @@ #[doc = "Register `DSLEEPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DSLEEPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Syssel { +pub enum SYSSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPLL clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Syssel) -> Self { + fn from(variant: SYSSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SysselR = crate::BitReader; -impl SysselR { +pub type SYSSEL_R = crate::BitReader; +impl SYSSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Syssel { + pub const fn variant(&self) -> SYSSEL_A { match self.bits { - false => Syssel::Value1, - true => Syssel::Value2, + false => SYSSEL_A::VALUE1, + true => SYSSEL_A::VALUE2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Syssel::Value1 + *self == SYSSEL_A::VALUE1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Syssel::Value2 + *self == SYSSEL_A::VALUE2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; -impl<'a, REG> SysselW<'a, REG> +pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; +impl<'a, REG> SYSSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Syssel::Value1) + self.variant(SYSSEL_A::VALUE1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Syssel::Value2) + self.variant(SYSSEL_A::VALUE2) } } #[doc = "Flash Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fpdn { +pub enum FPDN_A { #[doc = "1: Flash power down module"] - Value1 = 1, + VALUE1 = 1, #[doc = "0: No effect"] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fpdn) -> Self { + fn from(variant: FPDN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FPDN` reader - Flash Power Down"] -pub type FpdnR = crate::BitReader; -impl FpdnR { +pub type FPDN_R = crate::BitReader; +impl FPDN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fpdn { + pub const fn variant(&self) -> FPDN_A { match self.bits { - true => Fpdn::Value1, - false => Fpdn::Value2, + true => FPDN_A::VALUE1, + false => FPDN_A::VALUE2, } } #[doc = "Flash power down module"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fpdn::Value1 + *self == FPDN_A::VALUE1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fpdn::Value2 + *self == FPDN_A::VALUE2 } } #[doc = "Field `FPDN` writer - Flash Power Down"] -pub type FpdnW<'a, REG> = crate::BitWriter<'a, REG, Fpdn>; -impl<'a, REG> FpdnW<'a, REG> +pub type FPDN_W<'a, REG> = crate::BitWriter<'a, REG, FPDN_A>; +impl<'a, REG> FPDN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Flash power down module"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fpdn::Value1) + self.variant(FPDN_A::VALUE1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fpdn::Value2) + self.variant(FPDN_A::VALUE2) } } #[doc = "PLL Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pllpdn { +pub enum PLLPDN_A { #[doc = "1: Switch off main PLL"] - Value1 = 1, + VALUE1 = 1, #[doc = "0: No effect"] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pllpdn) -> Self { + fn from(variant: PLLPDN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLPDN` reader - PLL Power Down"] -pub type PllpdnR = crate::BitReader; -impl PllpdnR { +pub type PLLPDN_R = crate::BitReader; +impl PLLPDN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pllpdn { + pub const fn variant(&self) -> PLLPDN_A { match self.bits { - true => Pllpdn::Value1, - false => Pllpdn::Value2, + true => PLLPDN_A::VALUE1, + false => PLLPDN_A::VALUE2, } } #[doc = "Switch off main PLL"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pllpdn::Value1 + *self == PLLPDN_A::VALUE1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pllpdn::Value2 + *self == PLLPDN_A::VALUE2 } } #[doc = "Field `PLLPDN` writer - PLL Power Down"] -pub type PllpdnW<'a, REG> = crate::BitWriter<'a, REG, Pllpdn>; -impl<'a, REG> PllpdnW<'a, REG> +pub type PLLPDN_W<'a, REG> = crate::BitWriter<'a, REG, PLLPDN_A>; +impl<'a, REG> PLLPDN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Switch off main PLL"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pllpdn::Value1) + self.variant(PLLPDN_A::VALUE1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pllpdn::Value2) + self.variant(PLLPDN_A::VALUE2) } } #[doc = "VCO Power Down\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcopdn { +pub enum VCOPDN_A { #[doc = "1: Switch off VCO of main PLL"] - Value1 = 1, + VALUE1 = 1, #[doc = "0: No effect"] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcopdn) -> Self { + fn from(variant: VCOPDN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOPDN` reader - VCO Power Down"] -pub type VcopdnR = crate::BitReader; -impl VcopdnR { +pub type VCOPDN_R = crate::BitReader; +impl VCOPDN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcopdn { + pub const fn variant(&self) -> VCOPDN_A { match self.bits { - true => Vcopdn::Value1, - false => Vcopdn::Value2, + true => VCOPDN_A::VALUE1, + false => VCOPDN_A::VALUE2, } } #[doc = "Switch off VCO of main PLL"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcopdn::Value1 + *self == VCOPDN_A::VALUE1 } #[doc = "No effect"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcopdn::Value2 + *self == VCOPDN_A::VALUE2 } } #[doc = "Field `VCOPDN` writer - VCO Power Down"] -pub type VcopdnW<'a, REG> = crate::BitWriter<'a, REG, Vcopdn>; -impl<'a, REG> VcopdnW<'a, REG> +pub type VCOPDN_W<'a, REG> = crate::BitWriter<'a, REG, VCOPDN_A>; +impl<'a, REG> VCOPDN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Switch off VCO of main PLL"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcopdn::Value1) + self.variant(VCOPDN_A::VALUE1) } #[doc = "No effect"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcopdn::Value2) + self.variant(VCOPDN_A::VALUE2) } } #[doc = "USB Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbcr { +pub enum USBCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbcr) -> Self { + fn from(variant: USBCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCR` reader - USB Clock Control"] -pub type UsbcrR = crate::BitReader; -impl UsbcrR { +pub type USBCR_R = crate::BitReader; +impl USBCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbcr { + pub const fn variant(&self) -> USBCR_A { match self.bits { - false => Usbcr::Value1, - true => Usbcr::Value2, + false => USBCR_A::VALUE1, + true => USBCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbcr::Value1 + *self == USBCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbcr::Value2 + *self == USBCR_A::VALUE2 } } #[doc = "Field `USBCR` writer - USB Clock Control"] -pub type UsbcrW<'a, REG> = crate::BitWriter<'a, REG, Usbcr>; -impl<'a, REG> UsbcrW<'a, REG> +pub type USBCR_W<'a, REG> = crate::BitWriter<'a, REG, USBCR_A>; +impl<'a, REG> USBCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbcr::Value1) + self.variant(USBCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbcr::Value2) + self.variant(USBCR_A::VALUE2) } } #[doc = "CCU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccucr { +pub enum CCUCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccucr) -> Self { + fn from(variant: CCUCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCR` reader - CCU Clock Control"] -pub type CcucrR = crate::BitReader; -impl CcucrR { +pub type CCUCR_R = crate::BitReader; +impl CCUCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccucr { + pub const fn variant(&self) -> CCUCR_A { match self.bits { - false => Ccucr::Value1, - true => Ccucr::Value2, + false => CCUCR_A::VALUE1, + true => CCUCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccucr::Value1 + *self == CCUCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccucr::Value2 + *self == CCUCR_A::VALUE2 } } #[doc = "Field `CCUCR` writer - CCU Clock Control"] -pub type CcucrW<'a, REG> = crate::BitWriter<'a, REG, Ccucr>; -impl<'a, REG> CcucrW<'a, REG> +pub type CCUCR_W<'a, REG> = crate::BitWriter<'a, REG, CCUCR_A>; +impl<'a, REG> CCUCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccucr::Value1) + self.variant(CCUCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccucr::Value2) + self.variant(CCUCR_A::VALUE2) } } #[doc = "WDT Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtcr { +pub enum WDTCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtcr) -> Self { + fn from(variant: WDTCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCR` reader - WDT Clock Control"] -pub type WdtcrR = crate::BitReader; -impl WdtcrR { +pub type WDTCR_R = crate::BitReader; +impl WDTCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wdtcr { + pub const fn variant(&self) -> WDTCR_A { match self.bits { - false => Wdtcr::Value1, - true => Wdtcr::Value2, + false => WDTCR_A::VALUE1, + true => WDTCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtcr::Value1 + *self == WDTCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtcr::Value2 + *self == WDTCR_A::VALUE2 } } #[doc = "Field `WDTCR` writer - WDT Clock Control"] -pub type WdtcrW<'a, REG> = crate::BitWriter<'a, REG, Wdtcr>; -impl<'a, REG> WdtcrW<'a, REG> +pub type WDTCR_W<'a, REG> = crate::BitWriter<'a, REG, WDTCR_A>; +impl<'a, REG> WDTCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtcr::Value1) + self.variant(WDTCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtcr::Value2) + self.variant(WDTCR_A::VALUE2) } } impl R { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SysselR { - SysselR::new((self.bits & 1) != 0) + pub fn syssel(&self) -> SYSSEL_R { + SYSSEL_R::new((self.bits & 1) != 0) } #[doc = "Bit 11 - Flash Power Down"] #[inline(always)] - pub fn fpdn(&self) -> FpdnR { - FpdnR::new(((self.bits >> 11) & 1) != 0) + pub fn fpdn(&self) -> FPDN_R { + FPDN_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - PLL Power Down"] #[inline(always)] - pub fn pllpdn(&self) -> PllpdnR { - PllpdnR::new(((self.bits >> 12) & 1) != 0) + pub fn pllpdn(&self) -> PLLPDN_R { + PLLPDN_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - VCO Power Down"] #[inline(always)] - pub fn vcopdn(&self) -> VcopdnR { - VcopdnR::new(((self.bits >> 13) & 1) != 0) + pub fn vcopdn(&self) -> VCOPDN_R { + VCOPDN_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - pub fn usbcr(&self) -> UsbcrR { - UsbcrR::new(((self.bits >> 16) & 1) != 0) + pub fn usbcr(&self) -> USBCR_R { + USBCR_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - pub fn ccucr(&self) -> CcucrR { - CcucrR::new(((self.bits >> 20) & 1) != 0) + pub fn ccucr(&self) -> CCUCR_R { + CCUCR_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - pub fn wdtcr(&self) -> WdtcrR { - WdtcrR::new(((self.bits >> 21) & 1) != 0) + pub fn wdtcr(&self) -> WDTCR_R { + WDTCR_R::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SysselW { - SysselW::new(self, 0) + pub fn syssel(&mut self) -> SYSSEL_W { + SYSSEL_W::new(self, 0) } #[doc = "Bit 11 - Flash Power Down"] #[inline(always)] #[must_use] - pub fn fpdn(&mut self) -> FpdnW { - FpdnW::new(self, 11) + pub fn fpdn(&mut self) -> FPDN_W { + FPDN_W::new(self, 11) } #[doc = "Bit 12 - PLL Power Down"] #[inline(always)] #[must_use] - pub fn pllpdn(&mut self) -> PllpdnW { - PllpdnW::new(self, 12) + pub fn pllpdn(&mut self) -> PLLPDN_W { + PLLPDN_W::new(self, 12) } #[doc = "Bit 13 - VCO Power Down"] #[inline(always)] #[must_use] - pub fn vcopdn(&mut self) -> VcopdnW { - VcopdnW::new(self, 13) + pub fn vcopdn(&mut self) -> VCOPDN_W { + VCOPDN_W::new(self, 13) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] #[must_use] - pub fn usbcr(&mut self) -> UsbcrW { - UsbcrW::new(self, 16) + pub fn usbcr(&mut self) -> USBCR_W { + USBCR_W::new(self, 16) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] #[must_use] - pub fn ccucr(&mut self) -> CcucrW { - CcucrW::new(self, 20) + pub fn ccucr(&mut self) -> CCUCR_W { + CCUCR_W::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] #[must_use] - pub fn wdtcr(&mut self) -> WdtcrW { - WdtcrW::new(self, 21) + pub fn wdtcr(&mut self) -> WDTCR_W { + WDTCR_W::new(self, 21) } } #[doc = "Deep Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DsleepcrSpec; -impl crate::RegisterSpec for DsleepcrSpec { +pub struct DSLEEPCR_SPEC; +impl crate::RegisterSpec for DSLEEPCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dsleepcr::R`](R) reader structure"] -impl crate::Readable for DsleepcrSpec {} +impl crate::Readable for DSLEEPCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dsleepcr::W`](W) writer structure"] -impl crate::Writable for DsleepcrSpec { +impl crate::Writable for DSLEEPCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DSLEEPCR to value 0"] -impl crate::Resettable for DsleepcrSpec { +impl crate::Resettable for DSLEEPCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/extclkcr.rs b/src/scu_clk/extclkcr.rs index b8a56791..bc6bf4be 100644 --- a/src/scu_clk/extclkcr.rs +++ b/src/scu_clk/extclkcr.rs @@ -1,68 +1,68 @@ #[doc = "Register `EXTCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EXTCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "External Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ecksel { +pub enum ECKSEL_A { #[doc = "0: fSYS clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "2: fUSB clock"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: fPLL clock divided according to ECKDIV bit field configuration"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: fSTDBY clock"] - Value5 = 4, + VALUE5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ecksel) -> Self { + fn from(variant: ECKSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ecksel { +impl crate::FieldSpec for ECKSEL_A { type Ux = u8; } -impl crate::IsEnum for Ecksel {} +impl crate::IsEnum for ECKSEL_A {} #[doc = "Field `ECKSEL` reader - External Clock Selection Value"] -pub type EckselR = crate::FieldReader; -impl EckselR { +pub type ECKSEL_R = crate::FieldReader; +impl ECKSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Ecksel::Value1), - 2 => Some(Ecksel::Value3), - 3 => Some(Ecksel::Value4), - 4 => Some(Ecksel::Value5), + 0 => Some(ECKSEL_A::VALUE1), + 2 => Some(ECKSEL_A::VALUE3), + 3 => Some(ECKSEL_A::VALUE4), + 4 => Some(ECKSEL_A::VALUE5), _ => None, } } #[doc = "fSYS clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ecksel::Value1 + *self == ECKSEL_A::VALUE1 } #[doc = "fUSB clock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ecksel::Value3 + *self == ECKSEL_A::VALUE3 } #[doc = "fPLL clock divided according to ECKDIV bit field configuration"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ecksel::Value4 + *self == ECKSEL_A::VALUE4 } #[doc = "fSTDBY clock"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Ecksel::Value5 + *self == ECKSEL_A::VALUE5 } } #[doc = "Field `ECKSEL` writer - External Clock Selection Value"] -pub type EckselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Ecksel>; -impl<'a, REG> EckselW<'a, REG> +pub type ECKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ECKSEL_A>; +impl<'a, REG> ECKSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,68 +70,68 @@ where #[doc = "fSYS clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ecksel::Value1) + self.variant(ECKSEL_A::VALUE1) } #[doc = "fUSB clock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ecksel::Value3) + self.variant(ECKSEL_A::VALUE3) } #[doc = "fPLL clock divided according to ECKDIV bit field configuration"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ecksel::Value4) + self.variant(ECKSEL_A::VALUE4) } #[doc = "fSTDBY clock"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Ecksel::Value5) + self.variant(ECKSEL_A::VALUE5) } } #[doc = "Field `ECKDIV` reader - External Clock Divider Value"] -pub type EckdivR = crate::FieldReader; +pub type ECKDIV_R = crate::FieldReader; #[doc = "Field `ECKDIV` writer - External Clock Divider Value"] -pub type EckdivW<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; +pub type ECKDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl R { #[doc = "Bits 0:2 - External Clock Selection Value"] #[inline(always)] - pub fn ecksel(&self) -> EckselR { - EckselR::new((self.bits & 7) as u8) + pub fn ecksel(&self) -> ECKSEL_R { + ECKSEL_R::new((self.bits & 7) as u8) } #[doc = "Bits 16:24 - External Clock Divider Value"] #[inline(always)] - pub fn eckdiv(&self) -> EckdivR { - EckdivR::new(((self.bits >> 16) & 0x01ff) as u16) + pub fn eckdiv(&self) -> ECKDIV_R { + ECKDIV_R::new(((self.bits >> 16) & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:2 - External Clock Selection Value"] #[inline(always)] #[must_use] - pub fn ecksel(&mut self) -> EckselW { - EckselW::new(self, 0) + pub fn ecksel(&mut self) -> ECKSEL_W { + ECKSEL_W::new(self, 0) } #[doc = "Bits 16:24 - External Clock Divider Value"] #[inline(always)] #[must_use] - pub fn eckdiv(&mut self) -> EckdivW { - EckdivW::new(self, 16) + pub fn eckdiv(&mut self) -> ECKDIV_W { + ECKDIV_W::new(self, 16) } } #[doc = "External Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`extclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`extclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ExtclkcrSpec; -impl crate::RegisterSpec for ExtclkcrSpec { +pub struct EXTCLKCR_SPEC; +impl crate::RegisterSpec for EXTCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`extclkcr::R`](R) reader structure"] -impl crate::Readable for ExtclkcrSpec {} +impl crate::Readable for EXTCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`extclkcr::W`](W) writer structure"] -impl crate::Writable for ExtclkcrSpec { +impl crate::Writable for EXTCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EXTCLKCR to value 0"] -impl crate::Resettable for ExtclkcrSpec { +impl crate::Resettable for EXTCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/mlinkclkcr.rs b/src/scu_clk/mlinkclkcr.rs index 2b087584..9261c321 100644 --- a/src/scu_clk/mlinkclkcr.rs +++ b/src/scu_clk/mlinkclkcr.rs @@ -1,280 +1,280 @@ #[doc = "Register `MLINKCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MLINKCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SYSDIV` reader - System Clock Division Value"] -pub type SysdivR = crate::FieldReader; +pub type SYSDIV_R = crate::FieldReader; #[doc = "Field `SYSDIV` writer - System Clock Division Value"] -pub type SysdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SYSDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Syssel { +pub enum SYSSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPLL clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Syssel) -> Self { + fn from(variant: SYSSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SysselR = crate::BitReader; -impl SysselR { +pub type SYSSEL_R = crate::BitReader; +impl SYSSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Syssel { + pub const fn variant(&self) -> SYSSEL_A { match self.bits { - false => Syssel::Value1, - true => Syssel::Value2, + false => SYSSEL_A::VALUE1, + true => SYSSEL_A::VALUE2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Syssel::Value1 + *self == SYSSEL_A::VALUE1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Syssel::Value2 + *self == SYSSEL_A::VALUE2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; -impl<'a, REG> SysselW<'a, REG> +pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; +impl<'a, REG> SYSSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Syssel::Value1) + self.variant(SYSSEL_A::VALUE1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Syssel::Value2) + self.variant(SYSSEL_A::VALUE2) } } #[doc = "CPU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cpudiv { +pub enum CPUDIV_A { #[doc = "0: fCPU = fSYS"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCPU = fSYS / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cpudiv) -> Self { + fn from(variant: CPUDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CPUDIV` reader - CPU Clock Divider Enable"] -pub type CpudivR = crate::BitReader; -impl CpudivR { +pub type CPUDIV_R = crate::BitReader; +impl CPUDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cpudiv { + pub const fn variant(&self) -> CPUDIV_A { match self.bits { - false => Cpudiv::Value1, - true => Cpudiv::Value2, + false => CPUDIV_A::VALUE1, + true => CPUDIV_A::VALUE2, } } #[doc = "fCPU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cpudiv::Value1 + *self == CPUDIV_A::VALUE1 } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cpudiv::Value2 + *self == CPUDIV_A::VALUE2 } } #[doc = "Field `CPUDIV` writer - CPU Clock Divider Enable"] -pub type CpudivW<'a, REG> = crate::BitWriter<'a, REG, Cpudiv>; -impl<'a, REG> CpudivW<'a, REG> +pub type CPUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CPUDIV_A>; +impl<'a, REG> CPUDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCPU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cpudiv::Value1) + self.variant(CPUDIV_A::VALUE1) } #[doc = "fCPU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cpudiv::Value2) + self.variant(CPUDIV_A::VALUE2) } } #[doc = "PB Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pbdiv { +pub enum PBDIV_A { #[doc = "0: fPERIPH = fCPU"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPERIPH = fCPU / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pbdiv) -> Self { + fn from(variant: PBDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] -pub type PbdivR = crate::BitReader; -impl PbdivR { +pub type PBDIV_R = crate::BitReader; +impl PBDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pbdiv { + pub const fn variant(&self) -> PBDIV_A { match self.bits { - false => Pbdiv::Value1, - true => Pbdiv::Value2, + false => PBDIV_A::VALUE1, + true => PBDIV_A::VALUE2, } } #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pbdiv::Value1 + *self == PBDIV_A::VALUE1 } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pbdiv::Value2 + *self == PBDIV_A::VALUE2 } } #[doc = "Field `PBDIV` writer - PB Clock Divider Enable"] -pub type PbdivW<'a, REG> = crate::BitWriter<'a, REG, Pbdiv>; -impl<'a, REG> PbdivW<'a, REG> +pub type PBDIV_W<'a, REG> = crate::BitWriter<'a, REG, PBDIV_A>; +impl<'a, REG> PBDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pbdiv::Value1) + self.variant(PBDIV_A::VALUE1) } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pbdiv::Value2) + self.variant(PBDIV_A::VALUE2) } } #[doc = "CCU Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccudiv { +pub enum CCUDIV_A { #[doc = "0: fCCU = fSYS"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCCU = fSYS / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccudiv) -> Self { + fn from(variant: CCUDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUDIV` reader - CCU Clock Divider Enable"] -pub type CcudivR = crate::BitReader; -impl CcudivR { +pub type CCUDIV_R = crate::BitReader; +impl CCUDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccudiv { + pub const fn variant(&self) -> CCUDIV_A { match self.bits { - false => Ccudiv::Value1, - true => Ccudiv::Value2, + false => CCUDIV_A::VALUE1, + true => CCUDIV_A::VALUE2, } } #[doc = "fCCU = fSYS"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccudiv::Value1 + *self == CCUDIV_A::VALUE1 } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccudiv::Value2 + *self == CCUDIV_A::VALUE2 } } #[doc = "Field `CCUDIV` writer - CCU Clock Divider Enable"] -pub type CcudivW<'a, REG> = crate::BitWriter<'a, REG, Ccudiv>; -impl<'a, REG> CcudivW<'a, REG> +pub type CCUDIV_W<'a, REG> = crate::BitWriter<'a, REG, CCUDIV_A>; +impl<'a, REG> CCUDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fCCU = fSYS"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccudiv::Value1) + self.variant(CCUDIV_A::VALUE1) } #[doc = "fCCU = fSYS / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccudiv::Value2) + self.variant(CCUDIV_A::VALUE2) } } #[doc = "Field `WDTDIV` reader - WDT Clock Divider Value"] -pub type WdtdivR = crate::FieldReader; +pub type WDTDIV_R = crate::FieldReader; #[doc = "Field `WDTDIV` writer - WDT Clock Divider Value"] -pub type WdtdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type WDTDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "WDT Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Wdtsel { +pub enum WDTSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fSTDBY clock"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fPLL clock"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Wdtsel) -> Self { + fn from(variant: WDTSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Wdtsel { +impl crate::FieldSpec for WDTSEL_A { type Ux = u8; } -impl crate::IsEnum for Wdtsel {} +impl crate::IsEnum for WDTSEL_A {} #[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] -pub type WdtselR = crate::FieldReader; -impl WdtselR { +pub type WDTSEL_R = crate::FieldReader; +impl WDTSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Wdtsel::Value1), - 1 => Some(Wdtsel::Value2), - 2 => Some(Wdtsel::Value3), + 0 => Some(WDTSEL_A::VALUE1), + 1 => Some(WDTSEL_A::VALUE2), + 2 => Some(WDTSEL_A::VALUE3), _ => None, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtsel::Value1 + *self == WDTSEL_A::VALUE1 } #[doc = "fSTDBY clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtsel::Value2 + *self == WDTSEL_A::VALUE2 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Wdtsel::Value3 + *self == WDTSEL_A::VALUE3 } } #[doc = "Field `WDTSEL` writer - WDT Clock Selection Value"] -pub type WdtselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Wdtsel>; -impl<'a, REG> WdtselW<'a, REG> +pub type WDTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WDTSEL_A>; +impl<'a, REG> WDTSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -282,114 +282,114 @@ where #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value1) + self.variant(WDTSEL_A::VALUE1) } #[doc = "fSTDBY clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value2) + self.variant(WDTSEL_A::VALUE2) } #[doc = "fPLL clock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value3) + self.variant(WDTSEL_A::VALUE3) } } impl R { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - pub fn sysdiv(&self) -> SysdivR { - SysdivR::new((self.bits & 0xff) as u8) + pub fn sysdiv(&self) -> SYSDIV_R { + SYSDIV_R::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SysselR { - SysselR::new(((self.bits >> 8) & 1) != 0) + pub fn syssel(&self) -> SYSSEL_R { + SYSSEL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - CPU Clock Divider Enable"] #[inline(always)] - pub fn cpudiv(&self) -> CpudivR { - CpudivR::new(((self.bits >> 10) & 1) != 0) + pub fn cpudiv(&self) -> CPUDIV_R { + CPUDIV_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - PB Clock Divider Enable"] #[inline(always)] - pub fn pbdiv(&self) -> PbdivR { - PbdivR::new(((self.bits >> 12) & 1) != 0) + pub fn pbdiv(&self) -> PBDIV_R { + PBDIV_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - CCU Clock Divider Enable"] #[inline(always)] - pub fn ccudiv(&self) -> CcudivR { - CcudivR::new(((self.bits >> 14) & 1) != 0) + pub fn ccudiv(&self) -> CCUDIV_R { + CCUDIV_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:23 - WDT Clock Divider Value"] #[inline(always)] - pub fn wdtdiv(&self) -> WdtdivR { - WdtdivR::new(((self.bits >> 16) & 0xff) as u8) + pub fn wdtdiv(&self) -> WDTDIV_R { + WDTDIV_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:25 - WDT Clock Selection Value"] #[inline(always)] - pub fn wdtsel(&self) -> WdtselR { - WdtselR::new(((self.bits >> 24) & 3) as u8) + pub fn wdtsel(&self) -> WDTSEL_R { + WDTSEL_R::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] #[must_use] - pub fn sysdiv(&mut self) -> SysdivW { - SysdivW::new(self, 0) + pub fn sysdiv(&mut self) -> SYSDIV_W { + SYSDIV_W::new(self, 0) } #[doc = "Bit 8 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SysselW { - SysselW::new(self, 8) + pub fn syssel(&mut self) -> SYSSEL_W { + SYSSEL_W::new(self, 8) } #[doc = "Bit 10 - CPU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn cpudiv(&mut self) -> CpudivW { - CpudivW::new(self, 10) + pub fn cpudiv(&mut self) -> CPUDIV_W { + CPUDIV_W::new(self, 10) } #[doc = "Bit 12 - PB Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn pbdiv(&mut self) -> PbdivW { - PbdivW::new(self, 12) + pub fn pbdiv(&mut self) -> PBDIV_W { + PBDIV_W::new(self, 12) } #[doc = "Bit 14 - CCU Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn ccudiv(&mut self) -> CcudivW { - CcudivW::new(self, 14) + pub fn ccudiv(&mut self) -> CCUDIV_W { + CCUDIV_W::new(self, 14) } #[doc = "Bits 16:23 - WDT Clock Divider Value"] #[inline(always)] #[must_use] - pub fn wdtdiv(&mut self) -> WdtdivW { - WdtdivW::new(self, 16) + pub fn wdtdiv(&mut self) -> WDTDIV_W { + WDTDIV_W::new(self, 16) } #[doc = "Bits 24:25 - WDT Clock Selection Value"] #[inline(always)] #[must_use] - pub fn wdtsel(&mut self) -> WdtselW { - WdtselW::new(self, 24) + pub fn wdtsel(&mut self) -> WDTSEL_W { + WDTSEL_W::new(self, 24) } } #[doc = "Multi-Link Clock Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mlinkclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mlinkclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MlinkclkcrSpec; -impl crate::RegisterSpec for MlinkclkcrSpec { +pub struct MLINKCLKCR_SPEC; +impl crate::RegisterSpec for MLINKCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mlinkclkcr::R`](R) reader structure"] -impl crate::Readable for MlinkclkcrSpec {} +impl crate::Readable for MLINKCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`mlinkclkcr::W`](W) writer structure"] -impl crate::Writable for MlinkclkcrSpec { +impl crate::Writable for MLINKCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MLINKCLKCR to value 0"] -impl crate::Resettable for MlinkclkcrSpec { +impl crate::Resettable for MLINKCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/pbclkcr.rs b/src/scu_clk/pbclkcr.rs index 32ce9f7a..22ef4325 100644 --- a/src/scu_clk/pbclkcr.rs +++ b/src/scu_clk/pbclkcr.rs @@ -1,89 +1,89 @@ #[doc = "Register `PBCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PBCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "PB Clock Divider Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pbdiv { +pub enum PBDIV_A { #[doc = "0: fPERIPH = fCPU"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPERIPH = fCPU / 2"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pbdiv) -> Self { + fn from(variant: PBDIV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PBDIV` reader - PB Clock Divider Enable"] -pub type PbdivR = crate::BitReader; -impl PbdivR { +pub type PBDIV_R = crate::BitReader; +impl PBDIV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pbdiv { + pub const fn variant(&self) -> PBDIV_A { match self.bits { - false => Pbdiv::Value1, - true => Pbdiv::Value2, + false => PBDIV_A::VALUE1, + true => PBDIV_A::VALUE2, } } #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pbdiv::Value1 + *self == PBDIV_A::VALUE1 } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pbdiv::Value2 + *self == PBDIV_A::VALUE2 } } #[doc = "Field `PBDIV` writer - PB Clock Divider Enable"] -pub type PbdivW<'a, REG> = crate::BitWriter<'a, REG, Pbdiv>; -impl<'a, REG> PbdivW<'a, REG> +pub type PBDIV_W<'a, REG> = crate::BitWriter<'a, REG, PBDIV_A>; +impl<'a, REG> PBDIV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fPERIPH = fCPU"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pbdiv::Value1) + self.variant(PBDIV_A::VALUE1) } #[doc = "fPERIPH = fCPU / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pbdiv::Value2) + self.variant(PBDIV_A::VALUE2) } } impl R { #[doc = "Bit 0 - PB Clock Divider Enable"] #[inline(always)] - pub fn pbdiv(&self) -> PbdivR { - PbdivR::new((self.bits & 1) != 0) + pub fn pbdiv(&self) -> PBDIV_R { + PBDIV_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - PB Clock Divider Enable"] #[inline(always)] #[must_use] - pub fn pbdiv(&mut self) -> PbdivW { - PbdivW::new(self, 0) + pub fn pbdiv(&mut self) -> PBDIV_W { + PBDIV_W::new(self, 0) } } #[doc = "Peripheral Bus Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PbclkcrSpec; -impl crate::RegisterSpec for PbclkcrSpec { +pub struct PBCLKCR_SPEC; +impl crate::RegisterSpec for PBCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pbclkcr::R`](R) reader structure"] -impl crate::Readable for PbclkcrSpec {} +impl crate::Readable for PBCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`pbclkcr::W`](W) writer structure"] -impl crate::Writable for PbclkcrSpec { +impl crate::Writable for PBCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PBCLKCR to value 0"] -impl crate::Resettable for PbclkcrSpec { +impl crate::Resettable for PBCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/sleepcr.rs b/src/scu_clk/sleepcr.rs index 74b42e2e..df221896 100644 --- a/src/scu_clk/sleepcr.rs +++ b/src/scu_clk/sleepcr.rs @@ -1,281 +1,281 @@ #[doc = "Register `SLEEPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SLEEPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Syssel { +pub enum SYSSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPLL clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Syssel) -> Self { + fn from(variant: SYSSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SysselR = crate::BitReader; -impl SysselR { +pub type SYSSEL_R = crate::BitReader; +impl SYSSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Syssel { + pub const fn variant(&self) -> SYSSEL_A { match self.bits { - false => Syssel::Value1, - true => Syssel::Value2, + false => SYSSEL_A::VALUE1, + true => SYSSEL_A::VALUE2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Syssel::Value1 + *self == SYSSEL_A::VALUE1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Syssel::Value2 + *self == SYSSEL_A::VALUE2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; -impl<'a, REG> SysselW<'a, REG> +pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; +impl<'a, REG> SYSSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Syssel::Value1) + self.variant(SYSSEL_A::VALUE1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Syssel::Value2) + self.variant(SYSSEL_A::VALUE2) } } #[doc = "USB Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbcr { +pub enum USBCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbcr) -> Self { + fn from(variant: USBCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBCR` reader - USB Clock Control"] -pub type UsbcrR = crate::BitReader; -impl UsbcrR { +pub type USBCR_R = crate::BitReader; +impl USBCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbcr { + pub const fn variant(&self) -> USBCR_A { match self.bits { - false => Usbcr::Value1, - true => Usbcr::Value2, + false => USBCR_A::VALUE1, + true => USBCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbcr::Value1 + *self == USBCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbcr::Value2 + *self == USBCR_A::VALUE2 } } #[doc = "Field `USBCR` writer - USB Clock Control"] -pub type UsbcrW<'a, REG> = crate::BitWriter<'a, REG, Usbcr>; -impl<'a, REG> UsbcrW<'a, REG> +pub type USBCR_W<'a, REG> = crate::BitWriter<'a, REG, USBCR_A>; +impl<'a, REG> USBCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbcr::Value1) + self.variant(USBCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbcr::Value2) + self.variant(USBCR_A::VALUE2) } } #[doc = "CCU Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccucr { +pub enum CCUCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccucr) -> Self { + fn from(variant: CCUCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCUCR` reader - CCU Clock Control"] -pub type CcucrR = crate::BitReader; -impl CcucrR { +pub type CCUCR_R = crate::BitReader; +impl CCUCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccucr { + pub const fn variant(&self) -> CCUCR_A { match self.bits { - false => Ccucr::Value1, - true => Ccucr::Value2, + false => CCUCR_A::VALUE1, + true => CCUCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccucr::Value1 + *self == CCUCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccucr::Value2 + *self == CCUCR_A::VALUE2 } } #[doc = "Field `CCUCR` writer - CCU Clock Control"] -pub type CcucrW<'a, REG> = crate::BitWriter<'a, REG, Ccucr>; -impl<'a, REG> CcucrW<'a, REG> +pub type CCUCR_W<'a, REG> = crate::BitWriter<'a, REG, CCUCR_A>; +impl<'a, REG> CCUCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccucr::Value1) + self.variant(CCUCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccucr::Value2) + self.variant(CCUCR_A::VALUE2) } } #[doc = "WDT Clock Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtcr { +pub enum WDTCR_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtcr) -> Self { + fn from(variant: WDTCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTCR` reader - WDT Clock Control"] -pub type WdtcrR = crate::BitReader; -impl WdtcrR { +pub type WDTCR_R = crate::BitReader; +impl WDTCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wdtcr { + pub const fn variant(&self) -> WDTCR_A { match self.bits { - false => Wdtcr::Value1, - true => Wdtcr::Value2, + false => WDTCR_A::VALUE1, + true => WDTCR_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtcr::Value1 + *self == WDTCR_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtcr::Value2 + *self == WDTCR_A::VALUE2 } } #[doc = "Field `WDTCR` writer - WDT Clock Control"] -pub type WdtcrW<'a, REG> = crate::BitWriter<'a, REG, Wdtcr>; -impl<'a, REG> WdtcrW<'a, REG> +pub type WDTCR_W<'a, REG> = crate::BitWriter<'a, REG, WDTCR_A>; +impl<'a, REG> WDTCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtcr::Value1) + self.variant(WDTCR_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtcr::Value2) + self.variant(WDTCR_A::VALUE2) } } impl R { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SysselR { - SysselR::new((self.bits & 1) != 0) + pub fn syssel(&self) -> SYSSEL_R { + SYSSEL_R::new((self.bits & 1) != 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - pub fn usbcr(&self) -> UsbcrR { - UsbcrR::new(((self.bits >> 16) & 1) != 0) + pub fn usbcr(&self) -> USBCR_R { + USBCR_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - pub fn ccucr(&self) -> CcucrR { - CcucrR::new(((self.bits >> 20) & 1) != 0) + pub fn ccucr(&self) -> CCUCR_R { + CCUCR_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - pub fn wdtcr(&self) -> WdtcrR { - WdtcrR::new(((self.bits >> 21) & 1) != 0) + pub fn wdtcr(&self) -> WDTCR_R { + WDTCR_R::new(((self.bits >> 21) & 1) != 0) } } impl W { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SysselW { - SysselW::new(self, 0) + pub fn syssel(&mut self) -> SYSSEL_W { + SYSSEL_W::new(self, 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] #[must_use] - pub fn usbcr(&mut self) -> UsbcrW { - UsbcrW::new(self, 16) + pub fn usbcr(&mut self) -> USBCR_W { + USBCR_W::new(self, 16) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] #[must_use] - pub fn ccucr(&mut self) -> CcucrW { - CcucrW::new(self, 20) + pub fn ccucr(&mut self) -> CCUCR_W { + CCUCR_W::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] #[must_use] - pub fn wdtcr(&mut self) -> WdtcrW { - WdtcrW::new(self, 21) + pub fn wdtcr(&mut self) -> WDTCR_W { + WDTCR_W::new(self, 21) } } #[doc = "Sleep Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sleepcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sleepcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SleepcrSpec; -impl crate::RegisterSpec for SleepcrSpec { +pub struct SLEEPCR_SPEC; +impl crate::RegisterSpec for SLEEPCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sleepcr::R`](R) reader structure"] -impl crate::Readable for SleepcrSpec {} +impl crate::Readable for SLEEPCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sleepcr::W`](W) writer structure"] -impl crate::Writable for SleepcrSpec { +impl crate::Writable for SLEEPCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SLEEPCR to value 0"] -impl crate::Resettable for SleepcrSpec { +impl crate::Resettable for SLEEPCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/sysclkcr.rs b/src/scu_clk/sysclkcr.rs index 10418fbe..bfa8440f 100644 --- a/src/scu_clk/sysclkcr.rs +++ b/src/scu_clk/sysclkcr.rs @@ -1,104 +1,104 @@ #[doc = "Register `SYSCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYSCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SYSDIV` reader - System Clock Division Value"] -pub type SysdivR = crate::FieldReader; +pub type SYSDIV_R = crate::FieldReader; #[doc = "Field `SYSDIV` writer - System Clock Division Value"] -pub type SysdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SYSDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "System Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Syssel { +pub enum SYSSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fPLL clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Syssel) -> Self { + fn from(variant: SYSSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYSSEL` reader - System Clock Selection Value"] -pub type SysselR = crate::BitReader; -impl SysselR { +pub type SYSSEL_R = crate::BitReader; +impl SYSSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Syssel { + pub const fn variant(&self) -> SYSSEL_A { match self.bits { - false => Syssel::Value1, - true => Syssel::Value2, + false => SYSSEL_A::VALUE1, + true => SYSSEL_A::VALUE2, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Syssel::Value1 + *self == SYSSEL_A::VALUE1 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Syssel::Value2 + *self == SYSSEL_A::VALUE2 } } #[doc = "Field `SYSSEL` writer - System Clock Selection Value"] -pub type SysselW<'a, REG> = crate::BitWriter<'a, REG, Syssel>; -impl<'a, REG> SysselW<'a, REG> +pub type SYSSEL_W<'a, REG> = crate::BitWriter<'a, REG, SYSSEL_A>; +impl<'a, REG> SYSSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Syssel::Value1) + self.variant(SYSSEL_A::VALUE1) } #[doc = "fPLL clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Syssel::Value2) + self.variant(SYSSEL_A::VALUE2) } } impl R { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - pub fn sysdiv(&self) -> SysdivR { - SysdivR::new((self.bits & 0xff) as u8) + pub fn sysdiv(&self) -> SYSDIV_R { + SYSDIV_R::new((self.bits & 0xff) as u8) } #[doc = "Bit 16 - System Clock Selection Value"] #[inline(always)] - pub fn syssel(&self) -> SysselR { - SysselR::new(((self.bits >> 16) & 1) != 0) + pub fn syssel(&self) -> SYSSEL_R { + SYSSEL_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] #[must_use] - pub fn sysdiv(&mut self) -> SysdivW { - SysdivW::new(self, 0) + pub fn sysdiv(&mut self) -> SYSDIV_W { + SYSDIV_W::new(self, 0) } #[doc = "Bit 16 - System Clock Selection Value"] #[inline(always)] #[must_use] - pub fn syssel(&mut self) -> SysselW { - SysselW::new(self, 16) + pub fn syssel(&mut self) -> SYSSEL_W { + SYSSEL_W::new(self, 16) } } #[doc = "System Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sysclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sysclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SysclkcrSpec; -impl crate::RegisterSpec for SysclkcrSpec { +pub struct SYSCLKCR_SPEC; +impl crate::RegisterSpec for SYSCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sysclkcr::R`](R) reader structure"] -impl crate::Readable for SysclkcrSpec {} +impl crate::Readable for SYSCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sysclkcr::W`](W) writer structure"] -impl crate::Writable for SysclkcrSpec { +impl crate::Writable for SYSCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYSCLKCR to value 0"] -impl crate::Resettable for SysclkcrSpec { +impl crate::Resettable for SYSCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/usbclkcr.rs b/src/scu_clk/usbclkcr.rs index d3465726..9828c860 100644 --- a/src/scu_clk/usbclkcr.rs +++ b/src/scu_clk/usbclkcr.rs @@ -1,104 +1,104 @@ #[doc = "Register `USBCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `USBCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `USBDIV` reader - USB Clock Divider Value"] -pub type UsbdivR = crate::FieldReader; +pub type USBDIV_R = crate::FieldReader; #[doc = "Field `USBDIV` writer - USB Clock Divider Value"] -pub type UsbdivW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type USBDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "USB Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbsel { +pub enum USBSEL_A { #[doc = "0: USB PLL Clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PLL Clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbsel) -> Self { + fn from(variant: USBSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBSEL` reader - USB Clock Selection Value"] -pub type UsbselR = crate::BitReader; -impl UsbselR { +pub type USBSEL_R = crate::BitReader; +impl USBSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbsel { + pub const fn variant(&self) -> USBSEL_A { match self.bits { - false => Usbsel::Value1, - true => Usbsel::Value2, + false => USBSEL_A::VALUE1, + true => USBSEL_A::VALUE2, } } #[doc = "USB PLL Clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbsel::Value1 + *self == USBSEL_A::VALUE1 } #[doc = "PLL Clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbsel::Value2 + *self == USBSEL_A::VALUE2 } } #[doc = "Field `USBSEL` writer - USB Clock Selection Value"] -pub type UsbselW<'a, REG> = crate::BitWriter<'a, REG, Usbsel>; -impl<'a, REG> UsbselW<'a, REG> +pub type USBSEL_W<'a, REG> = crate::BitWriter<'a, REG, USBSEL_A>; +impl<'a, REG> USBSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "USB PLL Clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbsel::Value1) + self.variant(USBSEL_A::VALUE1) } #[doc = "PLL Clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbsel::Value2) + self.variant(USBSEL_A::VALUE2) } } impl R { #[doc = "Bits 0:2 - USB Clock Divider Value"] #[inline(always)] - pub fn usbdiv(&self) -> UsbdivR { - UsbdivR::new((self.bits & 7) as u8) + pub fn usbdiv(&self) -> USBDIV_R { + USBDIV_R::new((self.bits & 7) as u8) } #[doc = "Bit 16 - USB Clock Selection Value"] #[inline(always)] - pub fn usbsel(&self) -> UsbselR { - UsbselR::new(((self.bits >> 16) & 1) != 0) + pub fn usbsel(&self) -> USBSEL_R { + USBSEL_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - USB Clock Divider Value"] #[inline(always)] #[must_use] - pub fn usbdiv(&mut self) -> UsbdivW { - UsbdivW::new(self, 0) + pub fn usbdiv(&mut self) -> USBDIV_W { + USBDIV_W::new(self, 0) } #[doc = "Bit 16 - USB Clock Selection Value"] #[inline(always)] #[must_use] - pub fn usbsel(&mut self) -> UsbselW { - UsbselW::new(self, 16) + pub fn usbsel(&mut self) -> USBSEL_W { + USBSEL_W::new(self, 16) } } #[doc = "USB Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct UsbclkcrSpec; -impl crate::RegisterSpec for UsbclkcrSpec { +pub struct USBCLKCR_SPEC; +impl crate::RegisterSpec for USBCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`usbclkcr::R`](R) reader structure"] -impl crate::Readable for UsbclkcrSpec {} +impl crate::Readable for USBCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`usbclkcr::W`](W) writer structure"] -impl crate::Writable for UsbclkcrSpec { +impl crate::Writable for USBCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USBCLKCR to value 0"] -impl crate::Resettable for UsbclkcrSpec { +impl crate::Resettable for USBCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_clk/wdtclkcr.rs b/src/scu_clk/wdtclkcr.rs index 5c06d57f..4dafd608 100644 --- a/src/scu_clk/wdtclkcr.rs +++ b/src/scu_clk/wdtclkcr.rs @@ -1,64 +1,64 @@ #[doc = "Register `WDTCLKCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WDTCLKCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WDTDIV` reader - WDT Clock Divider Value"] -pub type WdtdivR = crate::FieldReader; +pub type WDTDIV_R = crate::FieldReader; #[doc = "Field `WDTDIV` writer - WDT Clock Divider Value"] -pub type WdtdivW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type WDTDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "WDT Clock Selection Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Wdtsel { +pub enum WDTSEL_A { #[doc = "0: fOFI clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fSTDBY clock"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fPLL clock"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Wdtsel) -> Self { + fn from(variant: WDTSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Wdtsel { +impl crate::FieldSpec for WDTSEL_A { type Ux = u8; } -impl crate::IsEnum for Wdtsel {} +impl crate::IsEnum for WDTSEL_A {} #[doc = "Field `WDTSEL` reader - WDT Clock Selection Value"] -pub type WdtselR = crate::FieldReader; -impl WdtselR { +pub type WDTSEL_R = crate::FieldReader; +impl WDTSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Wdtsel::Value1), - 1 => Some(Wdtsel::Value2), - 2 => Some(Wdtsel::Value3), + 0 => Some(WDTSEL_A::VALUE1), + 1 => Some(WDTSEL_A::VALUE2), + 2 => Some(WDTSEL_A::VALUE3), _ => None, } } #[doc = "fOFI clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtsel::Value1 + *self == WDTSEL_A::VALUE1 } #[doc = "fSTDBY clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtsel::Value2 + *self == WDTSEL_A::VALUE2 } #[doc = "fPLL clock"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Wdtsel::Value3 + *self == WDTSEL_A::VALUE3 } } #[doc = "Field `WDTSEL` writer - WDT Clock Selection Value"] -pub type WdtselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Wdtsel>; -impl<'a, REG> WdtselW<'a, REG> +pub type WDTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, WDTSEL_A>; +impl<'a, REG> WDTSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -66,59 +66,59 @@ where #[doc = "fOFI clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value1) + self.variant(WDTSEL_A::VALUE1) } #[doc = "fSTDBY clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value2) + self.variant(WDTSEL_A::VALUE2) } #[doc = "fPLL clock"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Wdtsel::Value3) + self.variant(WDTSEL_A::VALUE3) } } impl R { #[doc = "Bits 0:7 - WDT Clock Divider Value"] #[inline(always)] - pub fn wdtdiv(&self) -> WdtdivR { - WdtdivR::new((self.bits & 0xff) as u8) + pub fn wdtdiv(&self) -> WDTDIV_R { + WDTDIV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 16:17 - WDT Clock Selection Value"] #[inline(always)] - pub fn wdtsel(&self) -> WdtselR { - WdtselR::new(((self.bits >> 16) & 3) as u8) + pub fn wdtsel(&self) -> WDTSEL_R { + WDTSEL_R::new(((self.bits >> 16) & 3) as u8) } } impl W { #[doc = "Bits 0:7 - WDT Clock Divider Value"] #[inline(always)] #[must_use] - pub fn wdtdiv(&mut self) -> WdtdivW { - WdtdivW::new(self, 0) + pub fn wdtdiv(&mut self) -> WDTDIV_W { + WDTDIV_W::new(self, 0) } #[doc = "Bits 16:17 - WDT Clock Selection Value"] #[inline(always)] #[must_use] - pub fn wdtsel(&mut self) -> WdtselW { - WdtselW::new(self, 16) + pub fn wdtsel(&mut self) -> WDTSEL_W { + WDTSEL_W::new(self, 16) } } #[doc = "WDT Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtclkcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclkcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WdtclkcrSpec; -impl crate::RegisterSpec for WdtclkcrSpec { +pub struct WDTCLKCR_SPEC; +impl crate::RegisterSpec for WDTCLKCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`wdtclkcr::R`](R) reader structure"] -impl crate::Readable for WdtclkcrSpec {} +impl crate::Readable for WDTCLKCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`wdtclkcr::W`](W) writer structure"] -impl crate::Writable for WdtclkcrSpec { +impl crate::Writable for WDTCLKCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDTCLKCR to value 0"] -impl crate::Resettable for WdtclkcrSpec { +impl crate::Resettable for WDTCLKCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general.rs b/src/scu_general.rs index cccdf015..6267c1cf 100644 --- a/src/scu_general.rs +++ b/src/scu_general.rs @@ -1,228 +1,210 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, - idchip: Idchip, - idmanuf: Idmanuf, + id: ID, + idchip: IDCHIP, + idmanuf: IDMANUF, _reserved3: [u8; 0x04], - stcon: Stcon, + stcon: STCON, _reserved4: [u8; 0x18], - gpr0: Gpr0, - gpr1: Gpr1, + gpr0: GPR0, + gpr1: GPR1, _reserved6: [u8; 0x18], - ccucon: Ccucon, + ccucon: CCUCON, _reserved7: [u8; 0x3c], - dtscon: Dtscon, - dtsstat: Dtsstat, + dtscon: DTSCON, + dtsstat: DTSSTAT, _reserved9: [u8; 0x0c], - g0orcen: G0orcen, - g1orcen: G1orcen, - dtemplim: Dtemplim, - dtempalarm: Dtempalarm, + g0orcen: G0ORCEN, + g1orcen: G1ORCEN, + dtemplim: DTEMPLIM, + dtempalarm: DTEMPALARM, _reserved13: [u8; 0x14], - mirrsts: Mirrsts, - rmacr: Rmacr, - rmdata: Rmdata, - mirrallstat: Mirrallstat, - mirrallreq: Mirrallreq, + mirrsts: MIRRSTS, + rmacr: RMACR, + rmdata: RMDATA, + mirrallstat: MIRRALLSTAT, + mirrallreq: MIRRALLREQ, } impl RegisterBlock { #[doc = "0x00 - SCU Module ID Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x04 - Chip ID Register"] #[inline(always)] - pub const fn idchip(&self) -> &Idchip { + pub const fn idchip(&self) -> &IDCHIP { &self.idchip } #[doc = "0x08 - Manufactory ID Register"] #[inline(always)] - pub const fn idmanuf(&self) -> &Idmanuf { + pub const fn idmanuf(&self) -> &IDMANUF { &self.idmanuf } #[doc = "0x10 - Startup Configuration Register"] #[inline(always)] - pub const fn stcon(&self) -> &Stcon { + pub const fn stcon(&self) -> &STCON { &self.stcon } #[doc = "0x2c - General Purpose Register 0"] #[inline(always)] - pub const fn gpr0(&self) -> &Gpr0 { + pub const fn gpr0(&self) -> &GPR0 { &self.gpr0 } #[doc = "0x30 - General Purpose Register 1"] #[inline(always)] - pub const fn gpr1(&self) -> &Gpr1 { + pub const fn gpr1(&self) -> &GPR1 { &self.gpr1 } #[doc = "0x4c - CCU Control Register"] #[inline(always)] - pub const fn ccucon(&self) -> &Ccucon { + pub const fn ccucon(&self) -> &CCUCON { &self.ccucon } #[doc = "0x8c - Die Temperature Sensor Control Register"] #[inline(always)] - pub const fn dtscon(&self) -> &Dtscon { + pub const fn dtscon(&self) -> &DTSCON { &self.dtscon } #[doc = "0x90 - Die Temperature Sensor Status Register"] #[inline(always)] - pub const fn dtsstat(&self) -> &Dtsstat { + pub const fn dtsstat(&self) -> &DTSSTAT { &self.dtsstat } #[doc = "0xa0 - Out of Range Comparator Enable Register 0"] #[inline(always)] - pub const fn g0orcen(&self) -> &G0orcen { + pub const fn g0orcen(&self) -> &G0ORCEN { &self.g0orcen } #[doc = "0xa4 - Out of Range Comparator Enable Register 1"] #[inline(always)] - pub const fn g1orcen(&self) -> &G1orcen { + pub const fn g1orcen(&self) -> &G1ORCEN { &self.g1orcen } #[doc = "0xa8 - Die Temperature Sensor Limit Register"] #[inline(always)] - pub const fn dtemplim(&self) -> &Dtemplim { + pub const fn dtemplim(&self) -> &DTEMPLIM { &self.dtemplim } #[doc = "0xac - Die Temperature Sensor Alarm Register"] #[inline(always)] - pub const fn dtempalarm(&self) -> &Dtempalarm { + pub const fn dtempalarm(&self) -> &DTEMPALARM { &self.dtempalarm } #[doc = "0xc4 - Mirror Write Status Register"] #[inline(always)] - pub const fn mirrsts(&self) -> &Mirrsts { + pub const fn mirrsts(&self) -> &MIRRSTS { &self.mirrsts } #[doc = "0xc8 - Retention Memory Access Control Register"] #[inline(always)] - pub const fn rmacr(&self) -> &Rmacr { + pub const fn rmacr(&self) -> &RMACR { &self.rmacr } #[doc = "0xcc - Retention Memory Access Data Register"] #[inline(always)] - pub const fn rmdata(&self) -> &Rmdata { + pub const fn rmdata(&self) -> &RMDATA { &self.rmdata } #[doc = "0xd0 - Mirror All Status"] #[inline(always)] - pub const fn mirrallstat(&self) -> &Mirrallstat { + pub const fn mirrallstat(&self) -> &MIRRALLSTAT { &self.mirrallstat } #[doc = "0xd4 - Mirror All Request"] #[inline(always)] - pub const fn mirrallreq(&self) -> &Mirrallreq { + pub const fn mirrallreq(&self) -> &MIRRALLREQ { &self.mirrallreq } } #[doc = "ID (r) register accessor: SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "SCU Module ID Register"] pub mod id; #[doc = "IDCHIP (r) register accessor: Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idchip`] module"] -#[doc(alias = "IDCHIP")] -pub type Idchip = crate::Reg; +pub type IDCHIP = crate::Reg; #[doc = "Chip ID Register"] pub mod idchip; #[doc = "IDMANUF (r) register accessor: Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idmanuf`] module"] -#[doc(alias = "IDMANUF")] -pub type Idmanuf = crate::Reg; +pub type IDMANUF = crate::Reg; #[doc = "Manufactory ID Register"] pub mod idmanuf; #[doc = "STCON (rw) register accessor: Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@stcon`] module"] -#[doc(alias = "STCON")] -pub type Stcon = crate::Reg; +pub type STCON = crate::Reg; #[doc = "Startup Configuration Register"] pub mod stcon; #[doc = "GPR0 (rw) register accessor: General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr0`] module"] -#[doc(alias = "GPR0")] -pub type Gpr0 = crate::Reg; +pub type GPR0 = crate::Reg; #[doc = "General Purpose Register 0"] pub mod gpr0; #[doc = "GPR1 (rw) register accessor: General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpr1`] module"] -#[doc(alias = "GPR1")] -pub type Gpr1 = crate::Reg; +pub type GPR1 = crate::Reg; #[doc = "General Purpose Register 1"] pub mod gpr1; #[doc = "CCUCON (rw) register accessor: CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccucon`] module"] -#[doc(alias = "CCUCON")] -pub type Ccucon = crate::Reg; +pub type CCUCON = crate::Reg; #[doc = "CCU Control Register"] pub mod ccucon; #[doc = "DTSCON (rw) register accessor: Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtscon`] module"] -#[doc(alias = "DTSCON")] -pub type Dtscon = crate::Reg; +pub type DTSCON = crate::Reg; #[doc = "Die Temperature Sensor Control Register"] pub mod dtscon; #[doc = "DTSSTAT (r) register accessor: Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtsstat`] module"] -#[doc(alias = "DTSSTAT")] -pub type Dtsstat = crate::Reg; +pub type DTSSTAT = crate::Reg; #[doc = "Die Temperature Sensor Status Register"] pub mod dtsstat; #[doc = "G0ORCEN (rw) register accessor: Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g0orcen`] module"] -#[doc(alias = "G0ORCEN")] -pub type G0orcen = crate::Reg; +pub type G0ORCEN = crate::Reg; #[doc = "Out of Range Comparator Enable Register 0"] pub mod g0orcen; #[doc = "G1ORCEN (rw) register accessor: Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@g1orcen`] module"] -#[doc(alias = "G1ORCEN")] -pub type G1orcen = crate::Reg; +pub type G1ORCEN = crate::Reg; #[doc = "Out of Range Comparator Enable Register 1"] pub mod g1orcen; #[doc = "DTEMPLIM (rw) register accessor: Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtemplim::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtemplim::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtemplim`] module"] -#[doc(alias = "DTEMPLIM")] -pub type Dtemplim = crate::Reg; +pub type DTEMPLIM = crate::Reg; #[doc = "Die Temperature Sensor Limit Register"] pub mod dtemplim; #[doc = "DTEMPALARM (r) register accessor: Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtempalarm::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtempalarm`] module"] -#[doc(alias = "DTEMPALARM")] -pub type Dtempalarm = crate::Reg; +pub type DTEMPALARM = crate::Reg; #[doc = "Die Temperature Sensor Alarm Register"] pub mod dtempalarm; #[doc = "MIRRSTS (r) register accessor: Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrsts`] module"] -#[doc(alias = "MIRRSTS")] -pub type Mirrsts = crate::Reg; +pub type MIRRSTS = crate::Reg; #[doc = "Mirror Write Status Register"] pub mod mirrsts; #[doc = "RMACR (rw) register accessor: Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmacr`] module"] -#[doc(alias = "RMACR")] -pub type Rmacr = crate::Reg; +pub type RMACR = crate::Reg; #[doc = "Retention Memory Access Control Register"] pub mod rmacr; #[doc = "RMDATA (rw) register accessor: Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmdata`] module"] -#[doc(alias = "RMDATA")] -pub type Rmdata = crate::Reg; +pub type RMDATA = crate::Reg; #[doc = "Retention Memory Access Data Register"] pub mod rmdata; #[doc = "MIRRALLSTAT (r) register accessor: Mirror All Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrallstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallstat`] module"] -#[doc(alias = "MIRRALLSTAT")] -pub type Mirrallstat = crate::Reg; +pub type MIRRALLSTAT = crate::Reg; #[doc = "Mirror All Status"] pub mod mirrallstat; #[doc = "MIRRALLREQ (w) register accessor: Mirror All Request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mirrallreq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mirrallreq`] module"] -#[doc(alias = "MIRRALLREQ")] -pub type Mirrallreq = crate::Reg; +pub type MIRRALLREQ = crate::Reg; #[doc = "Mirror All Request"] pub mod mirrallreq; diff --git a/src/scu_general/ccucon.rs b/src/scu_general/ccucon.rs index 0bddece6..e29f4844 100644 --- a/src/scu_general/ccucon.rs +++ b/src/scu_general/ccucon.rs @@ -1,281 +1,281 @@ #[doc = "Register `CCUCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCUCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Global Start Control CCU40\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gsc40 { +pub enum GSC40_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gsc40) -> Self { + fn from(variant: GSC40_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GSC40` reader - Global Start Control CCU40"] -pub type Gsc40R = crate::BitReader; -impl Gsc40R { +pub type GSC40_R = crate::BitReader; +impl GSC40_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gsc40 { + pub const fn variant(&self) -> GSC40_A { match self.bits { - false => Gsc40::Value1, - true => Gsc40::Value2, + false => GSC40_A::VALUE1, + true => GSC40_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gsc40::Value1 + *self == GSC40_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gsc40::Value2 + *self == GSC40_A::VALUE2 } } #[doc = "Field `GSC40` writer - Global Start Control CCU40"] -pub type Gsc40W<'a, REG> = crate::BitWriter<'a, REG, Gsc40>; -impl<'a, REG> Gsc40W<'a, REG> +pub type GSC40_W<'a, REG> = crate::BitWriter<'a, REG, GSC40_A>; +impl<'a, REG> GSC40_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gsc40::Value1) + self.variant(GSC40_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gsc40::Value2) + self.variant(GSC40_A::VALUE2) } } #[doc = "Global Start Control CCU41\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gsc41 { +pub enum GSC41_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gsc41) -> Self { + fn from(variant: GSC41_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GSC41` reader - Global Start Control CCU41"] -pub type Gsc41R = crate::BitReader; -impl Gsc41R { +pub type GSC41_R = crate::BitReader; +impl GSC41_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gsc41 { + pub const fn variant(&self) -> GSC41_A { match self.bits { - false => Gsc41::Value1, - true => Gsc41::Value2, + false => GSC41_A::VALUE1, + true => GSC41_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gsc41::Value1 + *self == GSC41_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gsc41::Value2 + *self == GSC41_A::VALUE2 } } #[doc = "Field `GSC41` writer - Global Start Control CCU41"] -pub type Gsc41W<'a, REG> = crate::BitWriter<'a, REG, Gsc41>; -impl<'a, REG> Gsc41W<'a, REG> +pub type GSC41_W<'a, REG> = crate::BitWriter<'a, REG, GSC41_A>; +impl<'a, REG> GSC41_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gsc41::Value1) + self.variant(GSC41_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gsc41::Value2) + self.variant(GSC41_A::VALUE2) } } #[doc = "Global Start Control CCU80\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gsc80 { +pub enum GSC80_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gsc80) -> Self { + fn from(variant: GSC80_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GSC80` reader - Global Start Control CCU80"] -pub type Gsc80R = crate::BitReader; -impl Gsc80R { +pub type GSC80_R = crate::BitReader; +impl GSC80_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gsc80 { + pub const fn variant(&self) -> GSC80_A { match self.bits { - false => Gsc80::Value1, - true => Gsc80::Value2, + false => GSC80_A::VALUE1, + true => GSC80_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gsc80::Value1 + *self == GSC80_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gsc80::Value2 + *self == GSC80_A::VALUE2 } } #[doc = "Field `GSC80` writer - Global Start Control CCU80"] -pub type Gsc80W<'a, REG> = crate::BitWriter<'a, REG, Gsc80>; -impl<'a, REG> Gsc80W<'a, REG> +pub type GSC80_W<'a, REG> = crate::BitWriter<'a, REG, GSC80_A>; +impl<'a, REG> GSC80_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gsc80::Value1) + self.variant(GSC80_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gsc80::Value2) + self.variant(GSC80_A::VALUE2) } } #[doc = "Global Start Control HRPWM0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gshr0 { +pub enum GSHR0_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gshr0) -> Self { + fn from(variant: GSHR0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GSHR0` reader - Global Start Control HRPWM0"] -pub type Gshr0R = crate::BitReader; -impl Gshr0R { +pub type GSHR0_R = crate::BitReader; +impl GSHR0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gshr0 { + pub const fn variant(&self) -> GSHR0_A { match self.bits { - false => Gshr0::Value1, - true => Gshr0::Value2, + false => GSHR0_A::VALUE1, + true => GSHR0_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gshr0::Value1 + *self == GSHR0_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gshr0::Value2 + *self == GSHR0_A::VALUE2 } } #[doc = "Field `GSHR0` writer - Global Start Control HRPWM0"] -pub type Gshr0W<'a, REG> = crate::BitWriter<'a, REG, Gshr0>; -impl<'a, REG> Gshr0W<'a, REG> +pub type GSHR0_W<'a, REG> = crate::BitWriter<'a, REG, GSHR0_A>; +impl<'a, REG> GSHR0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gshr0::Value1) + self.variant(GSHR0_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gshr0::Value2) + self.variant(GSHR0_A::VALUE2) } } impl R { #[doc = "Bit 0 - Global Start Control CCU40"] #[inline(always)] - pub fn gsc40(&self) -> Gsc40R { - Gsc40R::new((self.bits & 1) != 0) + pub fn gsc40(&self) -> GSC40_R { + GSC40_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Global Start Control CCU41"] #[inline(always)] - pub fn gsc41(&self) -> Gsc41R { - Gsc41R::new(((self.bits >> 1) & 1) != 0) + pub fn gsc41(&self) -> GSC41_R { + GSC41_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Global Start Control CCU80"] #[inline(always)] - pub fn gsc80(&self) -> Gsc80R { - Gsc80R::new(((self.bits >> 8) & 1) != 0) + pub fn gsc80(&self) -> GSC80_R { + GSC80_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 24 - Global Start Control HRPWM0"] #[inline(always)] - pub fn gshr0(&self) -> Gshr0R { - Gshr0R::new(((self.bits >> 24) & 1) != 0) + pub fn gshr0(&self) -> GSHR0_R { + GSHR0_R::new(((self.bits >> 24) & 1) != 0) } } impl W { #[doc = "Bit 0 - Global Start Control CCU40"] #[inline(always)] #[must_use] - pub fn gsc40(&mut self) -> Gsc40W { - Gsc40W::new(self, 0) + pub fn gsc40(&mut self) -> GSC40_W { + GSC40_W::new(self, 0) } #[doc = "Bit 1 - Global Start Control CCU41"] #[inline(always)] #[must_use] - pub fn gsc41(&mut self) -> Gsc41W { - Gsc41W::new(self, 1) + pub fn gsc41(&mut self) -> GSC41_W { + GSC41_W::new(self, 1) } #[doc = "Bit 8 - Global Start Control CCU80"] #[inline(always)] #[must_use] - pub fn gsc80(&mut self) -> Gsc80W { - Gsc80W::new(self, 8) + pub fn gsc80(&mut self) -> GSC80_W { + GSC80_W::new(self, 8) } #[doc = "Bit 24 - Global Start Control HRPWM0"] #[inline(always)] #[must_use] - pub fn gshr0(&mut self) -> Gshr0W { - Gshr0W::new(self, 24) + pub fn gshr0(&mut self) -> GSHR0_W { + GSHR0_W::new(self, 24) } } #[doc = "CCU Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccucon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccucon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcuconSpec; -impl crate::RegisterSpec for CcuconSpec { +pub struct CCUCON_SPEC; +impl crate::RegisterSpec for CCUCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ccucon::R`](R) reader structure"] -impl crate::Readable for CcuconSpec {} +impl crate::Readable for CCUCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`ccucon::W`](W) writer structure"] -impl crate::Writable for CcuconSpec { +impl crate::Writable for CCUCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCUCON to value 0"] -impl crate::Resettable for CcuconSpec { +impl crate::Resettable for CCUCON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/dtempalarm.rs b/src/scu_general/dtempalarm.rs index 053d982a..92ff0df4 100644 --- a/src/scu_general/dtempalarm.rs +++ b/src/scu_general/dtempalarm.rs @@ -1,97 +1,97 @@ #[doc = "Register `DTEMPALARM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Lower Limit Underflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Underfl { +pub enum UNDERFL_A { #[doc = "0: No temperature underflow was detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A temperature underflow was detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Underfl) -> Self { + fn from(variant: UNDERFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UNDERFL` reader - Lower Limit Underflow"] -pub type UnderflR = crate::BitReader; -impl UnderflR { +pub type UNDERFL_R = crate::BitReader; +impl UNDERFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Underfl { + pub const fn variant(&self) -> UNDERFL_A { match self.bits { - false => Underfl::Value1, - true => Underfl::Value2, + false => UNDERFL_A::VALUE1, + true => UNDERFL_A::VALUE2, } } #[doc = "No temperature underflow was detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Underfl::Value1 + *self == UNDERFL_A::VALUE1 } #[doc = "A temperature underflow was detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Underfl::Value2 + *self == UNDERFL_A::VALUE2 } } #[doc = "Upper Limit Overflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Overfl { +pub enum OVERFL_A { #[doc = "0: No temperature overflow was detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A temperature overflow was detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Overfl) -> Self { + fn from(variant: OVERFL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OVERFL` reader - Upper Limit Overflow"] -pub type OverflR = crate::BitReader; -impl OverflR { +pub type OVERFL_R = crate::BitReader; +impl OVERFL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Overfl { + pub const fn variant(&self) -> OVERFL_A { match self.bits { - false => Overfl::Value1, - true => Overfl::Value2, + false => OVERFL_A::VALUE1, + true => OVERFL_A::VALUE2, } } #[doc = "No temperature overflow was detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Overfl::Value1 + *self == OVERFL_A::VALUE1 } #[doc = "A temperature overflow was detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Overfl::Value2 + *self == OVERFL_A::VALUE2 } } impl R { #[doc = "Bit 0 - Lower Limit Underflow"] #[inline(always)] - pub fn underfl(&self) -> UnderflR { - UnderflR::new((self.bits & 1) != 0) + pub fn underfl(&self) -> UNDERFL_R { + UNDERFL_R::new((self.bits & 1) != 0) } #[doc = "Bit 16 - Upper Limit Overflow"] #[inline(always)] - pub fn overfl(&self) -> OverflR { - OverflR::new(((self.bits >> 16) & 1) != 0) + pub fn overfl(&self) -> OVERFL_R { + OVERFL_R::new(((self.bits >> 16) & 1) != 0) } } #[doc = "Die Temperature Sensor Alarm Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtempalarm::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtempalarmSpec; -impl crate::RegisterSpec for DtempalarmSpec { +pub struct DTEMPALARM_SPEC; +impl crate::RegisterSpec for DTEMPALARM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtempalarm::R`](R) reader structure"] -impl crate::Readable for DtempalarmSpec {} +impl crate::Readable for DTEMPALARM_SPEC {} #[doc = "`reset()` method sets DTEMPALARM to value 0"] -impl crate::Resettable for DtempalarmSpec { +impl crate::Resettable for DTEMPALARM_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/dtemplim.rs b/src/scu_general/dtemplim.rs index f016fb03..20ae8dc9 100644 --- a/src/scu_general/dtemplim.rs +++ b/src/scu_general/dtemplim.rs @@ -1,55 +1,55 @@ #[doc = "Register `DTEMPLIM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DTEMPLIM` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `LOWER` reader - Lower Limit"] -pub type LowerR = crate::FieldReader; +pub type LOWER_R = crate::FieldReader; #[doc = "Field `LOWER` writer - Lower Limit"] -pub type LowerW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type LOWER_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Field `UPPER` reader - Upper Limit"] -pub type UpperR = crate::FieldReader; +pub type UPPER_R = crate::FieldReader; #[doc = "Field `UPPER` writer - Upper Limit"] -pub type UpperW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type UPPER_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Lower Limit"] #[inline(always)] - pub fn lower(&self) -> LowerR { - LowerR::new((self.bits & 0x03ff) as u16) + pub fn lower(&self) -> LOWER_R { + LOWER_R::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 16:25 - Upper Limit"] #[inline(always)] - pub fn upper(&self) -> UpperR { - UpperR::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn upper(&self) -> UPPER_R { + UPPER_R::new(((self.bits >> 16) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Lower Limit"] #[inline(always)] #[must_use] - pub fn lower(&mut self) -> LowerW { - LowerW::new(self, 0) + pub fn lower(&mut self) -> LOWER_W { + LOWER_W::new(self, 0) } #[doc = "Bits 16:25 - Upper Limit"] #[inline(always)] #[must_use] - pub fn upper(&mut self) -> UpperW { - UpperW::new(self, 16) + pub fn upper(&mut self) -> UPPER_W { + UPPER_W::new(self, 16) } } #[doc = "Die Temperature Sensor Limit Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtemplim::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtemplim::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtemplimSpec; -impl crate::RegisterSpec for DtemplimSpec { +pub struct DTEMPLIM_SPEC; +impl crate::RegisterSpec for DTEMPLIM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtemplim::R`](R) reader structure"] -impl crate::Readable for DtemplimSpec {} +impl crate::Readable for DTEMPLIM_SPEC {} #[doc = "`write(|w| ..)` method takes [`dtemplim::W`](W) writer structure"] -impl crate::Writable for DtemplimSpec { +impl crate::Writable for DTEMPLIM_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTEMPLIM to value 0"] -impl crate::Resettable for DtemplimSpec { +impl crate::Resettable for DTEMPLIM_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/dtscon.rs b/src/scu_general/dtscon.rs index 9827b54a..f3bc2362 100644 --- a/src/scu_general/dtscon.rs +++ b/src/scu_general/dtscon.rs @@ -1,186 +1,186 @@ #[doc = "Register `DTSCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DTSCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Sensor Power Down\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pwd { +pub enum PWD_A { #[doc = "0: The DTS is powered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The DTS is not powered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pwd) -> Self { + fn from(variant: PWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PWD` reader - Sensor Power Down"] -pub type PwdR = crate::BitReader; -impl PwdR { +pub type PWD_R = crate::BitReader; +impl PWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pwd { + pub const fn variant(&self) -> PWD_A { match self.bits { - false => Pwd::Value1, - true => Pwd::Value2, + false => PWD_A::VALUE1, + true => PWD_A::VALUE2, } } #[doc = "The DTS is powered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pwd::Value1 + *self == PWD_A::VALUE1 } #[doc = "The DTS is not powered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pwd::Value2 + *self == PWD_A::VALUE2 } } #[doc = "Field `PWD` writer - Sensor Power Down"] -pub type PwdW<'a, REG> = crate::BitWriter<'a, REG, Pwd>; -impl<'a, REG> PwdW<'a, REG> +pub type PWD_W<'a, REG> = crate::BitWriter<'a, REG, PWD_A>; +impl<'a, REG> PWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DTS is powered"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pwd::Value1) + self.variant(PWD_A::VALUE1) } #[doc = "The DTS is not powered"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pwd::Value2) + self.variant(PWD_A::VALUE2) } } #[doc = "Sensor Measurement Start\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Start { +pub enum START_A { #[doc = "0: No DTS measurement is started"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A DTS measurement is started"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Start) -> Self { + fn from(variant: START_A) -> Self { variant as u8 != 0 } } #[doc = "Field `START` writer - Sensor Measurement Start"] -pub type StartW<'a, REG> = crate::BitWriter<'a, REG, Start>; -impl<'a, REG> StartW<'a, REG> +pub type START_W<'a, REG> = crate::BitWriter<'a, REG, START_A>; +impl<'a, REG> START_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No DTS measurement is started"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Start::Value1) + self.variant(START_A::VALUE1) } #[doc = "A DTS measurement is started"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Start::Value2) + self.variant(START_A::VALUE2) } } #[doc = "Field `OFFSET` reader - Offset Calibration Value"] -pub type OffsetR = crate::FieldReader; +pub type OFFSET_R = crate::FieldReader; #[doc = "Field `OFFSET` writer - Offset Calibration Value"] -pub type OffsetW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type OFFSET_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `GAIN` reader - Gain Calibration Value"] -pub type GainR = crate::FieldReader; +pub type GAIN_R = crate::FieldReader; #[doc = "Field `GAIN` writer - Gain Calibration Value"] -pub type GainW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type GAIN_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `REFTRIM` reader - Reference Trim Calibration Value"] -pub type ReftrimR = crate::FieldReader; +pub type REFTRIM_R = crate::FieldReader; #[doc = "Field `REFTRIM` writer - Reference Trim Calibration Value"] -pub type ReftrimW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type REFTRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `BGTRIM` reader - Bandgap Trim Calibration Value"] -pub type BgtrimR = crate::FieldReader; +pub type BGTRIM_R = crate::FieldReader; #[doc = "Field `BGTRIM` writer - Bandgap Trim Calibration Value"] -pub type BgtrimW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type BGTRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Sensor Power Down"] #[inline(always)] - pub fn pwd(&self) -> PwdR { - PwdR::new((self.bits & 1) != 0) + pub fn pwd(&self) -> PWD_R { + PWD_R::new((self.bits & 1) != 0) } #[doc = "Bits 4:10 - Offset Calibration Value"] #[inline(always)] - pub fn offset(&self) -> OffsetR { - OffsetR::new(((self.bits >> 4) & 0x7f) as u8) + pub fn offset(&self) -> OFFSET_R { + OFFSET_R::new(((self.bits >> 4) & 0x7f) as u8) } #[doc = "Bits 11:16 - Gain Calibration Value"] #[inline(always)] - pub fn gain(&self) -> GainR { - GainR::new(((self.bits >> 11) & 0x3f) as u8) + pub fn gain(&self) -> GAIN_R { + GAIN_R::new(((self.bits >> 11) & 0x3f) as u8) } #[doc = "Bits 17:19 - Reference Trim Calibration Value"] #[inline(always)] - pub fn reftrim(&self) -> ReftrimR { - ReftrimR::new(((self.bits >> 17) & 7) as u8) + pub fn reftrim(&self) -> REFTRIM_R { + REFTRIM_R::new(((self.bits >> 17) & 7) as u8) } #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"] #[inline(always)] - pub fn bgtrim(&self) -> BgtrimR { - BgtrimR::new(((self.bits >> 20) & 0x0f) as u8) + pub fn bgtrim(&self) -> BGTRIM_R { + BGTRIM_R::new(((self.bits >> 20) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Sensor Power Down"] #[inline(always)] #[must_use] - pub fn pwd(&mut self) -> PwdW { - PwdW::new(self, 0) + pub fn pwd(&mut self) -> PWD_W { + PWD_W::new(self, 0) } #[doc = "Bit 1 - Sensor Measurement Start"] #[inline(always)] #[must_use] - pub fn start(&mut self) -> StartW { - StartW::new(self, 1) + pub fn start(&mut self) -> START_W { + START_W::new(self, 1) } #[doc = "Bits 4:10 - Offset Calibration Value"] #[inline(always)] #[must_use] - pub fn offset(&mut self) -> OffsetW { - OffsetW::new(self, 4) + pub fn offset(&mut self) -> OFFSET_W { + OFFSET_W::new(self, 4) } #[doc = "Bits 11:16 - Gain Calibration Value"] #[inline(always)] #[must_use] - pub fn gain(&mut self) -> GainW { - GainW::new(self, 11) + pub fn gain(&mut self) -> GAIN_W { + GAIN_W::new(self, 11) } #[doc = "Bits 17:19 - Reference Trim Calibration Value"] #[inline(always)] #[must_use] - pub fn reftrim(&mut self) -> ReftrimW { - ReftrimW::new(self, 17) + pub fn reftrim(&mut self) -> REFTRIM_W { + REFTRIM_W::new(self, 17) } #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"] #[inline(always)] #[must_use] - pub fn bgtrim(&mut self) -> BgtrimW { - BgtrimW::new(self, 20) + pub fn bgtrim(&mut self) -> BGTRIM_W { + BGTRIM_W::new(self, 20) } } #[doc = "Die Temperature Sensor Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtscon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dtscon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtsconSpec; -impl crate::RegisterSpec for DtsconSpec { +pub struct DTSCON_SPEC; +impl crate::RegisterSpec for DTSCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtscon::R`](R) reader structure"] -impl crate::Readable for DtsconSpec {} +impl crate::Readable for DTSCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`dtscon::W`](W) writer structure"] -impl crate::Writable for DtsconSpec { +impl crate::Writable for DTSCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DTSCON to value 0x01"] -impl crate::Resettable for DtsconSpec { +impl crate::Resettable for DTSCON_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_general/dtsstat.rs b/src/scu_general/dtsstat.rs index a51d1cb5..069dd88a 100644 --- a/src/scu_general/dtsstat.rs +++ b/src/scu_general/dtsstat.rs @@ -1,104 +1,104 @@ #[doc = "Register `DTSSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of the DTS Measurement"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Sensor Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdy { +pub enum RDY_A { #[doc = "0: The DTS is not ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The DTS is ready"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdy) -> Self { + fn from(variant: RDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDY` reader - Sensor Ready Status"] -pub type RdyR = crate::BitReader; -impl RdyR { +pub type RDY_R = crate::BitReader; +impl RDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdy { + pub const fn variant(&self) -> RDY_A { match self.bits { - false => Rdy::Value1, - true => Rdy::Value2, + false => RDY_A::VALUE1, + true => RDY_A::VALUE2, } } #[doc = "The DTS is not ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdy::Value1 + *self == RDY_A::VALUE1 } #[doc = "The DTS is ready"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdy::Value2 + *self == RDY_A::VALUE2 } } #[doc = "Sensor Busy Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Busy { +pub enum BUSY_A { #[doc = "0: not busy"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Busy) -> Self { + fn from(variant: BUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BUSY` reader - Sensor Busy Status"] -pub type BusyR = crate::BitReader; -impl BusyR { +pub type BUSY_R = crate::BitReader; +impl BUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Busy { + pub const fn variant(&self) -> BUSY_A { match self.bits { - false => Busy::Value1, - true => Busy::Value2, + false => BUSY_A::VALUE1, + true => BUSY_A::VALUE2, } } #[doc = "not busy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Busy::Value1 + *self == BUSY_A::VALUE1 } #[doc = "busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Busy::Value2 + *self == BUSY_A::VALUE2 } } impl R { #[doc = "Bits 0:9 - Result of the DTS Measurement"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new((self.bits & 0x03ff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0x03ff) as u16) } #[doc = "Bit 14 - Sensor Ready Status"] #[inline(always)] - pub fn rdy(&self) -> RdyR { - RdyR::new(((self.bits >> 14) & 1) != 0) + pub fn rdy(&self) -> RDY_R { + RDY_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Sensor Busy Status"] #[inline(always)] - pub fn busy(&self) -> BusyR { - BusyR::new(((self.bits >> 15) & 1) != 0) + pub fn busy(&self) -> BUSY_R { + BUSY_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Die Temperature Sensor Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtsstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtsstatSpec; -impl crate::RegisterSpec for DtsstatSpec { +pub struct DTSSTAT_SPEC; +impl crate::RegisterSpec for DTSSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtsstat::R`](R) reader structure"] -impl crate::Readable for DtsstatSpec {} +impl crate::Readable for DTSSTAT_SPEC {} #[doc = "`reset()` method sets DTSSTAT to value 0"] -impl crate::Resettable for DtsstatSpec { +impl crate::Resettable for DTSSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/g0orcen.rs b/src/scu_general/g0orcen.rs index 69392206..d95ca933 100644 --- a/src/scu_general/g0orcen.rs +++ b/src/scu_general/g0orcen.rs @@ -1,153 +1,153 @@ #[doc = "Register `G0ORCEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `G0ORCEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable Out of Range Comparator, Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enorc6 { +pub enum ENORC6_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enorc6) -> Self { + fn from(variant: ENORC6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] -pub type Enorc6R = crate::BitReader; -impl Enorc6R { +pub type ENORC6_R = crate::BitReader; +impl ENORC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enorc6 { + pub const fn variant(&self) -> ENORC6_A { match self.bits { - false => Enorc6::Value1, - true => Enorc6::Value2, + false => ENORC6_A::VALUE1, + true => ENORC6_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enorc6::Value1 + *self == ENORC6_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enorc6::Value2 + *self == ENORC6_A::VALUE2 } } #[doc = "Field `ENORC6` writer - Enable Out of Range Comparator, Channel 6"] -pub type Enorc6W<'a, REG> = crate::BitWriter<'a, REG, Enorc6>; -impl<'a, REG> Enorc6W<'a, REG> +pub type ENORC6_W<'a, REG> = crate::BitWriter<'a, REG, ENORC6_A>; +impl<'a, REG> ENORC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enorc6::Value1) + self.variant(ENORC6_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enorc6::Value2) + self.variant(ENORC6_A::VALUE2) } } #[doc = "Enable Out of Range Comparator, Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enorc7 { +pub enum ENORC7_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enorc7) -> Self { + fn from(variant: ENORC7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] -pub type Enorc7R = crate::BitReader; -impl Enorc7R { +pub type ENORC7_R = crate::BitReader; +impl ENORC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enorc7 { + pub const fn variant(&self) -> ENORC7_A { match self.bits { - false => Enorc7::Value1, - true => Enorc7::Value2, + false => ENORC7_A::VALUE1, + true => ENORC7_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enorc7::Value1 + *self == ENORC7_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enorc7::Value2 + *self == ENORC7_A::VALUE2 } } #[doc = "Field `ENORC7` writer - Enable Out of Range Comparator, Channel 7"] -pub type Enorc7W<'a, REG> = crate::BitWriter<'a, REG, Enorc7>; -impl<'a, REG> Enorc7W<'a, REG> +pub type ENORC7_W<'a, REG> = crate::BitWriter<'a, REG, ENORC7_A>; +impl<'a, REG> ENORC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enorc7::Value1) + self.variant(ENORC7_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enorc7::Value2) + self.variant(ENORC7_A::VALUE2) } } impl R { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - pub fn enorc6(&self) -> Enorc6R { - Enorc6R::new(((self.bits >> 6) & 1) != 0) + pub fn enorc6(&self) -> ENORC6_R { + ENORC6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - pub fn enorc7(&self) -> Enorc7R { - Enorc7R::new(((self.bits >> 7) & 1) != 0) + pub fn enorc7(&self) -> ENORC7_R { + ENORC7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] #[must_use] - pub fn enorc6(&mut self) -> Enorc6W { - Enorc6W::new(self, 6) + pub fn enorc6(&mut self) -> ENORC6_W { + ENORC6_W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] #[must_use] - pub fn enorc7(&mut self) -> Enorc7W { - Enorc7W::new(self, 7) + pub fn enorc7(&mut self) -> ENORC7_W { + ENORC7_W::new(self, 7) } } #[doc = "Out of Range Comparator Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g0orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g0orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct G0orcenSpec; -impl crate::RegisterSpec for G0orcenSpec { +pub struct G0ORCEN_SPEC; +impl crate::RegisterSpec for G0ORCEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`g0orcen::R`](R) reader structure"] -impl crate::Readable for G0orcenSpec {} +impl crate::Readable for G0ORCEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`g0orcen::W`](W) writer structure"] -impl crate::Writable for G0orcenSpec { +impl crate::Writable for G0ORCEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets G0ORCEN to value 0"] -impl crate::Resettable for G0orcenSpec { +impl crate::Resettable for G0ORCEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/g1orcen.rs b/src/scu_general/g1orcen.rs index 0eb72cab..c5a4a562 100644 --- a/src/scu_general/g1orcen.rs +++ b/src/scu_general/g1orcen.rs @@ -1,153 +1,153 @@ #[doc = "Register `G1ORCEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `G1ORCEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable Out of Range Comparator, Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enorc6 { +pub enum ENORC6_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enorc6) -> Self { + fn from(variant: ENORC6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENORC6` reader - Enable Out of Range Comparator, Channel 6"] -pub type Enorc6R = crate::BitReader; -impl Enorc6R { +pub type ENORC6_R = crate::BitReader; +impl ENORC6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enorc6 { + pub const fn variant(&self) -> ENORC6_A { match self.bits { - false => Enorc6::Value1, - true => Enorc6::Value2, + false => ENORC6_A::VALUE1, + true => ENORC6_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enorc6::Value1 + *self == ENORC6_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enorc6::Value2 + *self == ENORC6_A::VALUE2 } } #[doc = "Field `ENORC6` writer - Enable Out of Range Comparator, Channel 6"] -pub type Enorc6W<'a, REG> = crate::BitWriter<'a, REG, Enorc6>; -impl<'a, REG> Enorc6W<'a, REG> +pub type ENORC6_W<'a, REG> = crate::BitWriter<'a, REG, ENORC6_A>; +impl<'a, REG> ENORC6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enorc6::Value1) + self.variant(ENORC6_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enorc6::Value2) + self.variant(ENORC6_A::VALUE2) } } #[doc = "Enable Out of Range Comparator, Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enorc7 { +pub enum ENORC7_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enorc7) -> Self { + fn from(variant: ENORC7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENORC7` reader - Enable Out of Range Comparator, Channel 7"] -pub type Enorc7R = crate::BitReader; -impl Enorc7R { +pub type ENORC7_R = crate::BitReader; +impl ENORC7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enorc7 { + pub const fn variant(&self) -> ENORC7_A { match self.bits { - false => Enorc7::Value1, - true => Enorc7::Value2, + false => ENORC7_A::VALUE1, + true => ENORC7_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enorc7::Value1 + *self == ENORC7_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enorc7::Value2 + *self == ENORC7_A::VALUE2 } } #[doc = "Field `ENORC7` writer - Enable Out of Range Comparator, Channel 7"] -pub type Enorc7W<'a, REG> = crate::BitWriter<'a, REG, Enorc7>; -impl<'a, REG> Enorc7W<'a, REG> +pub type ENORC7_W<'a, REG> = crate::BitWriter<'a, REG, ENORC7_A>; +impl<'a, REG> ENORC7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enorc7::Value1) + self.variant(ENORC7_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enorc7::Value2) + self.variant(ENORC7_A::VALUE2) } } impl R { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - pub fn enorc6(&self) -> Enorc6R { - Enorc6R::new(((self.bits >> 6) & 1) != 0) + pub fn enorc6(&self) -> ENORC6_R { + ENORC6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - pub fn enorc7(&self) -> Enorc7R { - Enorc7R::new(((self.bits >> 7) & 1) != 0) + pub fn enorc7(&self) -> ENORC7_R { + ENORC7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] #[must_use] - pub fn enorc6(&mut self) -> Enorc6W { - Enorc6W::new(self, 6) + pub fn enorc6(&mut self) -> ENORC6_W { + ENORC6_W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] #[must_use] - pub fn enorc7(&mut self) -> Enorc7W { - Enorc7W::new(self, 7) + pub fn enorc7(&mut self) -> ENORC7_W { + ENORC7_W::new(self, 7) } } #[doc = "Out of Range Comparator Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`g1orcen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`g1orcen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct G1orcenSpec; -impl crate::RegisterSpec for G1orcenSpec { +pub struct G1ORCEN_SPEC; +impl crate::RegisterSpec for G1ORCEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`g1orcen::R`](R) reader structure"] -impl crate::Readable for G1orcenSpec {} +impl crate::Readable for G1ORCEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`g1orcen::W`](W) writer structure"] -impl crate::Writable for G1orcenSpec { +impl crate::Writable for G1ORCEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets G1ORCEN to value 0"] -impl crate::Resettable for G1orcenSpec { +impl crate::Resettable for G1ORCEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/gpr0.rs b/src/scu_general/gpr0.rs index b8d593a9..cf25921b 100644 --- a/src/scu_general/gpr0.rs +++ b/src/scu_general/gpr0.rs @@ -1,40 +1,40 @@ #[doc = "Register `GPR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAT` reader - User Data"] -pub type DatR = crate::FieldReader; +pub type DAT_R = crate::FieldReader; #[doc = "Field `DAT` writer - User Data"] -pub type DatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - pub fn dat(&self) -> DatR { - DatR::new(self.bits) + pub fn dat(&self) -> DAT_R { + DAT_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] #[must_use] - pub fn dat(&mut self) -> DatW { - DatW::new(self, 0) + pub fn dat(&mut self) -> DAT_W { + DAT_W::new(self, 0) } } #[doc = "General Purpose Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Gpr0Spec; -impl crate::RegisterSpec for Gpr0Spec { +pub struct GPR0_SPEC; +impl crate::RegisterSpec for GPR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gpr0::R`](R) reader structure"] -impl crate::Readable for Gpr0Spec {} +impl crate::Readable for GPR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`gpr0::W`](W) writer structure"] -impl crate::Writable for Gpr0Spec { +impl crate::Writable for GPR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPR0 to value 0"] -impl crate::Resettable for Gpr0Spec { +impl crate::Resettable for GPR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/gpr1.rs b/src/scu_general/gpr1.rs index 5daf62bb..f6c67f12 100644 --- a/src/scu_general/gpr1.rs +++ b/src/scu_general/gpr1.rs @@ -1,40 +1,40 @@ #[doc = "Register `GPR1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GPR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DAT` reader - User Data"] -pub type DatR = crate::FieldReader; +pub type DAT_R = crate::FieldReader; #[doc = "Field `DAT` writer - User Data"] -pub type DatW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DAT_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - pub fn dat(&self) -> DatR { - DatR::new(self.bits) + pub fn dat(&self) -> DAT_R { + DAT_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] #[must_use] - pub fn dat(&mut self) -> DatW { - DatW::new(self, 0) + pub fn dat(&mut self) -> DAT_W { + DAT_W::new(self, 0) } } #[doc = "General Purpose Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpr1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpr1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Gpr1Spec; -impl crate::RegisterSpec for Gpr1Spec { +pub struct GPR1_SPEC; +impl crate::RegisterSpec for GPR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gpr1::R`](R) reader structure"] -impl crate::Readable for Gpr1Spec {} +impl crate::Readable for GPR1_SPEC {} #[doc = "`write(|w| ..)` method takes [`gpr1::W`](W) writer structure"] -impl crate::Writable for Gpr1Spec { +impl crate::Writable for GPR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GPR1 to value 0"] -impl crate::Resettable for Gpr1Spec { +impl crate::Resettable for GPR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/id.rs b/src/scu_general/id.rs index c8abc7ce..48d7837c 100644 --- a/src/scu_general/id.rs +++ b/src/scu_general/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "SCU Module ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x009a_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x009a_c000; } diff --git a/src/scu_general/idchip.rs b/src/scu_general/idchip.rs index 529663bd..1ce6b30c 100644 --- a/src/scu_general/idchip.rs +++ b/src/scu_general/idchip.rs @@ -1,22 +1,22 @@ #[doc = "Register `IDCHIP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `IDCHIP` reader - Chip ID"] -pub type IdchipR = crate::FieldReader; +pub type IDCHIP_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Chip ID"] #[inline(always)] - pub fn idchip(&self) -> IdchipR { - IdchipR::new(self.bits) + pub fn idchip(&self) -> IDCHIP_R { + IDCHIP_R::new(self.bits) } } #[doc = "Chip ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idchip::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdchipSpec; -impl crate::RegisterSpec for IdchipSpec { +pub struct IDCHIP_SPEC; +impl crate::RegisterSpec for IDCHIP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`idchip::R`](R) reader structure"] -impl crate::Readable for IdchipSpec {} +impl crate::Readable for IDCHIP_SPEC {} #[doc = "`reset()` method sets IDCHIP to value 0"] -impl crate::Resettable for IdchipSpec { +impl crate::Resettable for IDCHIP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/idmanuf.rs b/src/scu_general/idmanuf.rs index 41ea4fc2..9ce0d588 100644 --- a/src/scu_general/idmanuf.rs +++ b/src/scu_general/idmanuf.rs @@ -1,29 +1,29 @@ #[doc = "Register `IDMANUF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DEPT` reader - Department Identification Number"] -pub type DeptR = crate::FieldReader; +pub type DEPT_R = crate::FieldReader; #[doc = "Field `MANUF` reader - Manufacturer Identification Number"] -pub type ManufR = crate::FieldReader; +pub type MANUF_R = crate::FieldReader; impl R { #[doc = "Bits 0:4 - Department Identification Number"] #[inline(always)] - pub fn dept(&self) -> DeptR { - DeptR::new((self.bits & 0x1f) as u8) + pub fn dept(&self) -> DEPT_R { + DEPT_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 5:15 - Manufacturer Identification Number"] #[inline(always)] - pub fn manuf(&self) -> ManufR { - ManufR::new(((self.bits >> 5) & 0x07ff) as u16) + pub fn manuf(&self) -> MANUF_R { + MANUF_R::new(((self.bits >> 5) & 0x07ff) as u16) } } #[doc = "Manufactory ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`idmanuf::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdmanufSpec; -impl crate::RegisterSpec for IdmanufSpec { +pub struct IDMANUF_SPEC; +impl crate::RegisterSpec for IDMANUF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`idmanuf::R`](R) reader structure"] -impl crate::Readable for IdmanufSpec {} +impl crate::Readable for IDMANUF_SPEC {} #[doc = "`reset()` method sets IDMANUF to value 0x1820"] -impl crate::Resettable for IdmanufSpec { +impl crate::Resettable for IDMANUF_SPEC { const RESET_VALUE: u32 = 0x1820; } diff --git a/src/scu_general/mirrallreq.rs b/src/scu_general/mirrallreq.rs index dddc41f8..ccc5443f 100644 --- a/src/scu_general/mirrallreq.rs +++ b/src/scu_general/mirrallreq.rs @@ -1,56 +1,56 @@ #[doc = "Register `MIRRALLREQ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Mirror All Execution Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Req { +pub enum REQ_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start mirror update"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Req) -> Self { + fn from(variant: REQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REQ` writer - Mirror All Execution Request"] -pub type ReqW<'a, REG> = crate::BitWriter<'a, REG, Req>; -impl<'a, REG> ReqW<'a, REG> +pub type REQ_W<'a, REG> = crate::BitWriter<'a, REG, REQ_A>; +impl<'a, REG> REQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Req::Value1) + self.variant(REQ_A::VALUE1) } #[doc = "Start mirror update"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Req::Value2) + self.variant(REQ_A::VALUE2) } } impl W { #[doc = "Bit 0 - Mirror All Execution Request"] #[inline(always)] #[must_use] - pub fn req(&mut self) -> ReqW { - ReqW::new(self, 0) + pub fn req(&mut self) -> REQ_W { + REQ_W::new(self, 0) } } #[doc = "Mirror All Request\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mirrallreq::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MirrallreqSpec; -impl crate::RegisterSpec for MirrallreqSpec { +pub struct MIRRALLREQ_SPEC; +impl crate::RegisterSpec for MIRRALLREQ_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`mirrallreq::W`](W) writer structure"] -impl crate::Writable for MirrallreqSpec { +impl crate::Writable for MIRRALLREQ_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MIRRALLREQ to value 0"] -impl crate::Resettable for MirrallreqSpec { +impl crate::Resettable for MIRRALLREQ_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/mirrallstat.rs b/src/scu_general/mirrallstat.rs index 992b1a01..cfa39143 100644 --- a/src/scu_general/mirrallstat.rs +++ b/src/scu_general/mirrallstat.rs @@ -1,56 +1,56 @@ #[doc = "Register `MIRRALLSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Mirror All Execution Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Busy { +pub enum BUSY_A { #[doc = "0: No update is pening"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update is pending"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Busy) -> Self { + fn from(variant: BUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BUSY` reader - Mirror All Execution Status"] -pub type BusyR = crate::BitReader; -impl BusyR { +pub type BUSY_R = crate::BitReader; +impl BUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Busy { + pub const fn variant(&self) -> BUSY_A { match self.bits { - false => Busy::Value1, - true => Busy::Value2, + false => BUSY_A::VALUE1, + true => BUSY_A::VALUE2, } } #[doc = "No update is pening"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Busy::Value1 + *self == BUSY_A::VALUE1 } #[doc = "Update is pending"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Busy::Value2 + *self == BUSY_A::VALUE2 } } impl R { #[doc = "Bit 0 - Mirror All Execution Status"] #[inline(always)] - pub fn busy(&self) -> BusyR { - BusyR::new((self.bits & 1) != 0) + pub fn busy(&self) -> BUSY_R { + BUSY_R::new((self.bits & 1) != 0) } } #[doc = "Mirror All Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrallstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MirrallstatSpec; -impl crate::RegisterSpec for MirrallstatSpec { +pub struct MIRRALLSTAT_SPEC; +impl crate::RegisterSpec for MIRRALLSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mirrallstat::R`](R) reader structure"] -impl crate::Readable for MirrallstatSpec {} +impl crate::Readable for MIRRALLSTAT_SPEC {} #[doc = "`reset()` method sets MIRRALLSTAT to value 0"] -impl crate::Resettable for MirrallstatSpec { +impl crate::Resettable for MIRRALLSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/mirrsts.rs b/src/scu_general/mirrsts.rs index dce299e5..75f15056 100644 --- a/src/scu_general/mirrsts.rs +++ b/src/scu_general/mirrsts.rs @@ -1,835 +1,835 @@ #[doc = "Register `MIRRSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "HDCLR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdclr { +pub enum HDCLR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdclr) -> Self { + fn from(variant: HDCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` reader - HDCLR Mirror Register Write Status"] -pub type HdclrR = crate::BitReader; -impl HdclrR { +pub type HDCLR_R = crate::BitReader; +impl HDCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdclr { + pub const fn variant(&self) -> HDCLR_A { match self.bits { - false => Hdclr::Value1, - true => Hdclr::Value2, + false => HDCLR_A::VALUE1, + true => HDCLR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdclr::Value1 + *self == HDCLR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdclr::Value2 + *self == HDCLR_A::VALUE2 } } #[doc = "HDSET Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdset { +pub enum HDSET_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdset) -> Self { + fn from(variant: HDSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` reader - HDSET Mirror Register Write Status"] -pub type HdsetR = crate::BitReader; -impl HdsetR { +pub type HDSET_R = crate::BitReader; +impl HDSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdset { + pub const fn variant(&self) -> HDSET_A { match self.bits { - false => Hdset::Value1, - true => Hdset::Value2, + false => HDSET_A::VALUE1, + true => HDSET_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdset::Value1 + *self == HDSET_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdset::Value2 + *self == HDSET_A::VALUE2 } } #[doc = "HDCR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` reader - HDCR Mirror Register Write Status"] -pub type HdcrR = crate::BitReader; -impl HdcrR { +pub type HDCR_R = crate::BitReader; +impl HDCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdcr { + pub const fn variant(&self) -> HDCR_A { match self.bits { - false => Hdcr::Value1, - true => Hdcr::Value2, + false => HDCR_A::VALUE1, + true => HDCR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdcr::Value1 + *self == HDCR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdcr::Value2 + *self == HDCR_A::VALUE2 } } #[doc = "OSCSICTRL Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Write Status"] -pub type OscsictrlR = crate::BitReader; -impl OscsictrlR { +pub type OSCSICTRL_R = crate::BitReader; +impl OSCSICTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscsictrl { + pub const fn variant(&self) -> OSCSICTRL_A { match self.bits { - false => Oscsictrl::Value1, - true => Oscsictrl::Value2, + false => OSCSICTRL_A::VALUE1, + true => OSCSICTRL_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscsictrl::Value1 + *self == OSCSICTRL_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscsictrl::Value2 + *self == OSCSICTRL_A::VALUE2 } } #[doc = "OSCULCTRL Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Write Status"] -pub type OsculctrlR = crate::BitReader; -impl OsculctrlR { +pub type OSCULCTRL_R = crate::BitReader; +impl OSCULCTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Osculctrl { + pub const fn variant(&self) -> OSCULCTRL_A { match self.bits { - false => Osculctrl::Value1, - true => Osculctrl::Value2, + false => OSCULCTRL_A::VALUE1, + true => OSCULCTRL_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Osculctrl::Value1 + *self == OSCULCTRL_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Osculctrl::Value2 + *self == OSCULCTRL_A::VALUE2 } } #[doc = "RTC CTR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Write Status"] -pub type RtcCtrR = crate::BitReader; -impl RtcCtrR { +pub type RTC_CTR_R = crate::BitReader; +impl RTC_CTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcCtr { + pub const fn variant(&self) -> RTC_CTR_A { match self.bits { - false => RtcCtr::Value1, - true => RtcCtr::Value2, + false => RTC_CTR_A::VALUE1, + true => RTC_CTR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcCtr::Value1 + *self == RTC_CTR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcCtr::Value2 + *self == RTC_CTR_A::VALUE2 } } #[doc = "RTC ATIM0 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Write Status"] -pub type RtcAtim0R = crate::BitReader; -impl RtcAtim0R { +pub type RTC_ATIM0_R = crate::BitReader; +impl RTC_ATIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim0 { + pub const fn variant(&self) -> RTC_ATIM0_A { match self.bits { - false => RtcAtim0::Value1, - true => RtcAtim0::Value2, + false => RTC_ATIM0_A::VALUE1, + true => RTC_ATIM0_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim0::Value1 + *self == RTC_ATIM0_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim0::Value2 + *self == RTC_ATIM0_A::VALUE2 } } #[doc = "RTC ATIM1 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Write Status"] -pub type RtcAtim1R = crate::BitReader; -impl RtcAtim1R { +pub type RTC_ATIM1_R = crate::BitReader; +impl RTC_ATIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim1 { + pub const fn variant(&self) -> RTC_ATIM1_A { match self.bits { - false => RtcAtim1::Value1, - true => RtcAtim1::Value2, + false => RTC_ATIM1_A::VALUE1, + true => RTC_ATIM1_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim1::Value1 + *self == RTC_ATIM1_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim1::Value2 + *self == RTC_ATIM1_A::VALUE2 } } #[doc = "RTC TIM0 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Write Status"] -pub type RtcTim0R = crate::BitReader; -impl RtcTim0R { +pub type RTC_TIM0_R = crate::BitReader; +impl RTC_TIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim0 { + pub const fn variant(&self) -> RTC_TIM0_A { match self.bits { - false => RtcTim0::Value1, - true => RtcTim0::Value2, + false => RTC_TIM0_A::VALUE1, + true => RTC_TIM0_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim0::Value1 + *self == RTC_TIM0_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim0::Value2 + *self == RTC_TIM0_A::VALUE2 } } #[doc = "RTC TIM1 Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Write Status"] -pub type RtcTim1R = crate::BitReader; -impl RtcTim1R { +pub type RTC_TIM1_R = crate::BitReader; +impl RTC_TIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim1 { + pub const fn variant(&self) -> RTC_TIM1_A { match self.bits { - false => RtcTim1::Value1, - true => RtcTim1::Value2, + false => RTC_TIM1_A::VALUE1, + true => RTC_TIM1_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim1::Value1 + *self == RTC_TIM1_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim1::Value2 + *self == RTC_TIM1_A::VALUE2 } } #[doc = "Retention Memory Access Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` reader - Retention Memory Access Register Update Status"] -pub type RmxR = crate::BitReader; -impl RmxR { +pub type RMX_R = crate::BitReader; +impl RMX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rmx { + pub const fn variant(&self) -> RMX_A { match self.bits { - false => Rmx::Value1, - true => Rmx::Value2, + false => RMX_A::VALUE1, + true => RMX_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rmx::Value1 + *self == RMX_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rmx::Value2 + *self == RMX_A::VALUE2 } } #[doc = "RTC MSKSSR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcMsksr { +pub enum RTC_MSKSR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcMsksr) -> Self { + fn from(variant: RTC_MSKSR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_MSKSR` reader - RTC MSKSSR Mirror Register Write Status"] -pub type RtcMsksrR = crate::BitReader; -impl RtcMsksrR { +pub type RTC_MSKSR_R = crate::BitReader; +impl RTC_MSKSR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcMsksr { + pub const fn variant(&self) -> RTC_MSKSR_A { match self.bits { - false => RtcMsksr::Value1, - true => RtcMsksr::Value2, + false => RTC_MSKSR_A::VALUE1, + true => RTC_MSKSR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcMsksr::Value1 + *self == RTC_MSKSR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcMsksr::Value2 + *self == RTC_MSKSR_A::VALUE2 } } #[doc = "RTC CLRSR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcClrsr { +pub enum RTC_CLRSR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcClrsr) -> Self { + fn from(variant: RTC_CLRSR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CLRSR` reader - RTC CLRSR Mirror Register Write Status"] -pub type RtcClrsrR = crate::BitReader; -impl RtcClrsrR { +pub type RTC_CLRSR_R = crate::BitReader; +impl RTC_CLRSR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcClrsr { + pub const fn variant(&self) -> RTC_CLRSR_A { match self.bits { - false => RtcClrsr::Value1, - true => RtcClrsr::Value2, + false => RTC_CLRSR_A::VALUE1, + true => RTC_CLRSR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcClrsr::Value1 + *self == RTC_CLRSR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcClrsr::Value2 + *self == RTC_CLRSR_A::VALUE2 } } #[doc = "LPACCONF Mirror Register Write Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacconf { +pub enum LPACCONF_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacconf) -> Self { + fn from(variant: LPACCONF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCONF` reader - LPACCONF Mirror Register Write Interrupt Set"] -pub type LpacconfR = crate::BitReader; -impl LpacconfR { +pub type LPACCONF_R = crate::BitReader; +impl LPACCONF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacconf { + pub const fn variant(&self) -> LPACCONF_A { match self.bits { - false => Lpacconf::Value1, - true => Lpacconf::Value2, + false => LPACCONF_A::VALUE1, + true => LPACCONF_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacconf::Value1 + *self == LPACCONF_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacconf::Value2 + *self == LPACCONF_A::VALUE2 } } #[doc = "LPACTH0 Mirror Register Write Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` reader - LPACTH0 Mirror Register Write Interrupt Set"] -pub type Lpacth0R = crate::BitReader; -impl Lpacth0R { +pub type LPACTH0_R = crate::BitReader; +impl LPACTH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth0 { + pub const fn variant(&self) -> LPACTH0_A { match self.bits { - false => Lpacth0::Value1, - true => Lpacth0::Value2, + false => LPACTH0_A::VALUE1, + true => LPACTH0_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth0::Value1 + *self == LPACTH0_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth0::Value2 + *self == LPACTH0_A::VALUE2 } } #[doc = "LPACTH1 Mirror Register Write Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` reader - LPACTH1 Mirror Register Write Interrupt Set"] -pub type Lpacth1R = crate::BitReader; -impl Lpacth1R { +pub type LPACTH1_R = crate::BitReader; +impl LPACTH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth1 { + pub const fn variant(&self) -> LPACTH1_A { match self.bits { - false => Lpacth1::Value1, - true => Lpacth1::Value2, + false => LPACTH1_A::VALUE1, + true => LPACTH1_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth1::Value1 + *self == LPACTH1_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth1::Value2 + *self == LPACTH1_A::VALUE2 } } #[doc = "LPACCLR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` reader - LPACCLR Mirror Register Write Status"] -pub type LpacclrR = crate::BitReader; -impl LpacclrR { +pub type LPACCLR_R = crate::BitReader; +impl LPACCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacclr { + pub const fn variant(&self) -> LPACCLR_A { match self.bits { - false => Lpacclr::Value1, - true => Lpacclr::Value2, + false => LPACCLR_A::VALUE1, + true => LPACCLR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacclr::Value1 + *self == LPACCLR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacclr::Value2 + *self == LPACCLR_A::VALUE2 } } #[doc = "LPACSET Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` reader - LPACSET Mirror Register Write Status"] -pub type LpacsetR = crate::BitReader; -impl LpacsetR { +pub type LPACSET_R = crate::BitReader; +impl LPACSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacset { + pub const fn variant(&self) -> LPACSET_A { match self.bits { - false => Lpacset::Value1, - true => Lpacset::Value2, + false => LPACSET_A::VALUE1, + true => LPACSET_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacset::Value1 + *self == LPACSET_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacset::Value2 + *self == LPACSET_A::VALUE2 } } #[doc = "HINTCLR Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` reader - HINTCLR Mirror Register Write Status"] -pub type HintclrR = crate::BitReader; -impl HintclrR { +pub type HINTCLR_R = crate::BitReader; +impl HINTCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintclr { + pub const fn variant(&self) -> HINTCLR_A { match self.bits { - false => Hintclr::Value1, - true => Hintclr::Value2, + false => HINTCLR_A::VALUE1, + true => HINTCLR_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintclr::Value1 + *self == HINTCLR_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintclr::Value2 + *self == HINTCLR_A::VALUE2 } } #[doc = "HINTSET Mirror Register Write Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: Ready"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Busy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` reader - HINTSET Mirror Register Write Status"] -pub type HintsetR = crate::BitReader; -impl HintsetR { +pub type HINTSET_R = crate::BitReader; +impl HINTSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintset { + pub const fn variant(&self) -> HINTSET_A { match self.bits { - false => Hintset::Value1, - true => Hintset::Value2, + false => HINTSET_A::VALUE1, + true => HINTSET_A::VALUE2, } } #[doc = "Ready"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintset::Value1 + *self == HINTSET_A::VALUE1 } #[doc = "Busy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintset::Value2 + *self == HINTSET_A::VALUE2 } } impl R { #[doc = "Bit 1 - HDCLR Mirror Register Write Status"] #[inline(always)] - pub fn hdclr(&self) -> HdclrR { - HdclrR::new(((self.bits >> 1) & 1) != 0) + pub fn hdclr(&self) -> HDCLR_R { + HDCLR_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - HDSET Mirror Register Write Status"] #[inline(always)] - pub fn hdset(&self) -> HdsetR { - HdsetR::new(((self.bits >> 2) & 1) != 0) + pub fn hdset(&self) -> HDSET_R { + HDSET_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - HDCR Mirror Register Write Status"] #[inline(always)] - pub fn hdcr(&self) -> HdcrR { - HdcrR::new(((self.bits >> 3) & 1) != 0) + pub fn hdcr(&self) -> HDCR_R { + HDCR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 5 - OSCSICTRL Mirror Register Write Status"] #[inline(always)] - pub fn oscsictrl(&self) -> OscsictrlR { - OscsictrlR::new(((self.bits >> 5) & 1) != 0) + pub fn oscsictrl(&self) -> OSCSICTRL_R { + OSCSICTRL_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - OSCULCTRL Mirror Register Write Status"] #[inline(always)] - pub fn osculctrl(&self) -> OsculctrlR { - OsculctrlR::new(((self.bits >> 7) & 1) != 0) + pub fn osculctrl(&self) -> OSCULCTRL_R { + OSCULCTRL_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - RTC CTR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_ctr(&self) -> RtcCtrR { - RtcCtrR::new(((self.bits >> 8) & 1) != 0) + pub fn rtc_ctr(&self) -> RTC_CTR_R { + RTC_CTR_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - RTC ATIM0 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_atim0(&self) -> RtcAtim0R { - RtcAtim0R::new(((self.bits >> 9) & 1) != 0) + pub fn rtc_atim0(&self) -> RTC_ATIM0_R { + RTC_ATIM0_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - RTC ATIM1 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_atim1(&self) -> RtcAtim1R { - RtcAtim1R::new(((self.bits >> 10) & 1) != 0) + pub fn rtc_atim1(&self) -> RTC_ATIM1_R { + RTC_ATIM1_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - RTC TIM0 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RtcTim0R { - RtcTim0R::new(((self.bits >> 11) & 1) != 0) + pub fn rtc_tim0(&self) -> RTC_TIM0_R { + RTC_TIM0_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - RTC TIM1 Mirror Register Write Status"] #[inline(always)] - pub fn rtc_tim1(&self) -> RtcTim1R { - RtcTim1R::new(((self.bits >> 12) & 1) != 0) + pub fn rtc_tim1(&self) -> RTC_TIM1_R { + RTC_TIM1_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Retention Memory Access Register Update Status"] #[inline(always)] - pub fn rmx(&self) -> RmxR { - RmxR::new(((self.bits >> 13) & 1) != 0) + pub fn rmx(&self) -> RMX_R { + RMX_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - RTC MSKSSR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_msksr(&self) -> RtcMsksrR { - RtcMsksrR::new(((self.bits >> 14) & 1) != 0) + pub fn rtc_msksr(&self) -> RTC_MSKSR_R { + RTC_MSKSR_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - RTC CLRSR Mirror Register Write Status"] #[inline(always)] - pub fn rtc_clrsr(&self) -> RtcClrsrR { - RtcClrsrR::new(((self.bits >> 15) & 1) != 0) + pub fn rtc_clrsr(&self) -> RTC_CLRSR_R { + RTC_CLRSR_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - LPACCONF Mirror Register Write Interrupt Set"] #[inline(always)] - pub fn lpacconf(&self) -> LpacconfR { - LpacconfR::new(((self.bits >> 16) & 1) != 0) + pub fn lpacconf(&self) -> LPACCONF_R { + LPACCONF_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - LPACTH0 Mirror Register Write Interrupt Set"] #[inline(always)] - pub fn lpacth0(&self) -> Lpacth0R { - Lpacth0R::new(((self.bits >> 17) & 1) != 0) + pub fn lpacth0(&self) -> LPACTH0_R { + LPACTH0_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - LPACTH1 Mirror Register Write Interrupt Set"] #[inline(always)] - pub fn lpacth1(&self) -> Lpacth1R { - Lpacth1R::new(((self.bits >> 18) & 1) != 0) + pub fn lpacth1(&self) -> LPACTH1_R { + LPACTH1_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 20 - LPACCLR Mirror Register Write Status"] #[inline(always)] - pub fn lpacclr(&self) -> LpacclrR { - LpacclrR::new(((self.bits >> 20) & 1) != 0) + pub fn lpacclr(&self) -> LPACCLR_R { + LPACCLR_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - LPACSET Mirror Register Write Status"] #[inline(always)] - pub fn lpacset(&self) -> LpacsetR { - LpacsetR::new(((self.bits >> 21) & 1) != 0) + pub fn lpacset(&self) -> LPACSET_R { + LPACSET_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - HINTCLR Mirror Register Write Status"] #[inline(always)] - pub fn hintclr(&self) -> HintclrR { - HintclrR::new(((self.bits >> 23) & 1) != 0) + pub fn hintclr(&self) -> HINTCLR_R { + HINTCLR_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - HINTSET Mirror Register Write Status"] #[inline(always)] - pub fn hintset(&self) -> HintsetR { - HintsetR::new(((self.bits >> 24) & 1) != 0) + pub fn hintset(&self) -> HINTSET_R { + HINTSET_R::new(((self.bits >> 24) & 1) != 0) } } #[doc = "Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MirrstsSpec; -impl crate::RegisterSpec for MirrstsSpec { +pub struct MIRRSTS_SPEC; +impl crate::RegisterSpec for MIRRSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mirrsts::R`](R) reader structure"] -impl crate::Readable for MirrstsSpec {} +impl crate::Readable for MIRRSTS_SPEC {} #[doc = "`reset()` method sets MIRRSTS to value 0"] -impl crate::Resettable for MirrstsSpec { +impl crate::Resettable for MIRRSTS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/rmacr.rs b/src/scu_general/rmacr.rs index 614d866f..0ceb3141 100644 --- a/src/scu_general/rmacr.rs +++ b/src/scu_general/rmacr.rs @@ -1,104 +1,104 @@ #[doc = "Register `RMACR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RMACR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Hibernate Retention Memory Register Update Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdwr { +pub enum RDWR_A { #[doc = "0: transfer data from Retention Memory in Hibernate domain to RMDATA register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: transfer data from RMDATA into Retention Memory in Hibernate domain"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdwr) -> Self { + fn from(variant: RDWR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDWR` reader - Hibernate Retention Memory Register Update Control"] -pub type RdwrR = crate::BitReader; -impl RdwrR { +pub type RDWR_R = crate::BitReader; +impl RDWR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdwr { + pub const fn variant(&self) -> RDWR_A { match self.bits { - false => Rdwr::Value1, - true => Rdwr::Value2, + false => RDWR_A::VALUE1, + true => RDWR_A::VALUE2, } } #[doc = "transfer data from Retention Memory in Hibernate domain to RMDATA register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdwr::Value1 + *self == RDWR_A::VALUE1 } #[doc = "transfer data from RMDATA into Retention Memory in Hibernate domain"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdwr::Value2 + *self == RDWR_A::VALUE2 } } #[doc = "Field `RDWR` writer - Hibernate Retention Memory Register Update Control"] -pub type RdwrW<'a, REG> = crate::BitWriter<'a, REG, Rdwr>; -impl<'a, REG> RdwrW<'a, REG> +pub type RDWR_W<'a, REG> = crate::BitWriter<'a, REG, RDWR_A>; +impl<'a, REG> RDWR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "transfer data from Retention Memory in Hibernate domain to RMDATA register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rdwr::Value1) + self.variant(RDWR_A::VALUE1) } #[doc = "transfer data from RMDATA into Retention Memory in Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rdwr::Value2) + self.variant(RDWR_A::VALUE2) } } #[doc = "Field `ADDR` reader - Hibernate Retention Memory Register Address Select"] -pub type AddrR = crate::FieldReader; +pub type ADDR_R = crate::FieldReader; #[doc = "Field `ADDR` writer - Hibernate Retention Memory Register Address Select"] -pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"] #[inline(always)] - pub fn rdwr(&self) -> RdwrR { - RdwrR::new((self.bits & 1) != 0) + pub fn rdwr(&self) -> RDWR_R { + RDWR_R::new((self.bits & 1) != 0) } #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"] #[inline(always)] - pub fn addr(&self) -> AddrR { - AddrR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn addr(&self) -> ADDR_R { + ADDR_R::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"] #[inline(always)] #[must_use] - pub fn rdwr(&mut self) -> RdwrW { - RdwrW::new(self, 0) + pub fn rdwr(&mut self) -> RDWR_W { + RDWR_W::new(self, 0) } #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"] #[inline(always)] #[must_use] - pub fn addr(&mut self) -> AddrW { - AddrW::new(self, 16) + pub fn addr(&mut self) -> ADDR_W { + ADDR_W::new(self, 16) } } #[doc = "Retention Memory Access Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmacr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RmacrSpec; -impl crate::RegisterSpec for RmacrSpec { +pub struct RMACR_SPEC; +impl crate::RegisterSpec for RMACR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rmacr::R`](R) reader structure"] -impl crate::Readable for RmacrSpec {} +impl crate::Readable for RMACR_SPEC {} #[doc = "`write(|w| ..)` method takes [`rmacr::W`](W) writer structure"] -impl crate::Writable for RmacrSpec { +impl crate::Writable for RMACR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RMACR to value 0"] -impl crate::Resettable for RmacrSpec { +impl crate::Resettable for RMACR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/rmdata.rs b/src/scu_general/rmdata.rs index cb58cd1e..e2f898fd 100644 --- a/src/scu_general/rmdata.rs +++ b/src/scu_general/rmdata.rs @@ -1,40 +1,40 @@ #[doc = "Register `RMDATA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RMDATA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DATA` reader - Hibernate Retention Memory Data"] -pub type DataR = crate::FieldReader; +pub type DATA_R = crate::FieldReader; #[doc = "Field `DATA` writer - Hibernate Retention Memory Data"] -pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Hibernate Retention Memory Data"] #[inline(always)] - pub fn data(&self) -> DataR { - DataR::new(self.bits) + pub fn data(&self) -> DATA_R { + DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Hibernate Retention Memory Data"] #[inline(always)] #[must_use] - pub fn data(&mut self) -> DataW { - DataW::new(self, 0) + pub fn data(&mut self) -> DATA_W { + DATA_W::new(self, 0) } } #[doc = "Retention Memory Access Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rmdata::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rmdata::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RmdataSpec; -impl crate::RegisterSpec for RmdataSpec { +pub struct RMDATA_SPEC; +impl crate::RegisterSpec for RMDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rmdata::R`](R) reader structure"] -impl crate::Readable for RmdataSpec {} +impl crate::Readable for RMDATA_SPEC {} #[doc = "`write(|w| ..)` method takes [`rmdata::W`](W) writer structure"] -impl crate::Writable for RmdataSpec { +impl crate::Writable for RMDATA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RMDATA to value 0"] -impl crate::Resettable for RmdataSpec { +impl crate::Resettable for RMDATA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_general/stcon.rs b/src/scu_general/stcon.rs index 260738bf..159a7799 100644 --- a/src/scu_general/stcon.rs +++ b/src/scu_general/stcon.rs @@ -1,158 +1,158 @@ #[doc = "Register `STCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `STCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "HW Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hwcon { +pub enum HWCON_A { #[doc = "0: Normal mode, JTAG"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ASC BSL enabled"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: BMI customized boot enabled"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CAN BSL enabled"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hwcon) -> Self { + fn from(variant: HWCON_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hwcon { +impl crate::FieldSpec for HWCON_A { type Ux = u8; } -impl crate::IsEnum for Hwcon {} +impl crate::IsEnum for HWCON_A {} #[doc = "Field `HWCON` reader - HW Configuration"] -pub type HwconR = crate::FieldReader; -impl HwconR { +pub type HWCON_R = crate::FieldReader; +impl HWCON_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hwcon { + pub const fn variant(&self) -> HWCON_A { match self.bits { - 0 => Hwcon::Value1, - 1 => Hwcon::Value2, - 2 => Hwcon::Value3, - 3 => Hwcon::Value4, + 0 => HWCON_A::VALUE1, + 1 => HWCON_A::VALUE2, + 2 => HWCON_A::VALUE3, + 3 => HWCON_A::VALUE4, _ => unreachable!(), } } #[doc = "Normal mode, JTAG"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hwcon::Value1 + *self == HWCON_A::VALUE1 } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hwcon::Value2 + *self == HWCON_A::VALUE2 } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hwcon::Value3 + *self == HWCON_A::VALUE3 } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Hwcon::Value4 + *self == HWCON_A::VALUE4 } } #[doc = "SW Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Swcon { +pub enum SWCON_A { #[doc = "0: Normal mode, boot from Boot ROM"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: ASC BSL enabled"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: BMI customized boot enabled"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: CAN BSL enabled"] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Boot from Code SRAM"] - Value5 = 4, + VALUE5 = 4, #[doc = "8: Boot from alternate Flash Address 0"] - Value6 = 8, + VALUE6 = 8, #[doc = "12: Boot from alternate Flash Address 1"] - Value7 = 12, + VALUE7 = 12, #[doc = "14: Enable fallback Alternate Boot Mode (ABM)"] - Value8 = 14, + VALUE8 = 14, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Swcon) -> Self { + fn from(variant: SWCON_A) -> Self { variant as _ } } -impl crate::FieldSpec for Swcon { +impl crate::FieldSpec for SWCON_A { type Ux = u8; } -impl crate::IsEnum for Swcon {} +impl crate::IsEnum for SWCON_A {} #[doc = "Field `SWCON` reader - SW Configuration"] -pub type SwconR = crate::FieldReader; -impl SwconR { +pub type SWCON_R = crate::FieldReader; +impl SWCON_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Swcon::Value1), - 1 => Some(Swcon::Value2), - 2 => Some(Swcon::Value3), - 3 => Some(Swcon::Value4), - 4 => Some(Swcon::Value5), - 8 => Some(Swcon::Value6), - 12 => Some(Swcon::Value7), - 14 => Some(Swcon::Value8), + 0 => Some(SWCON_A::VALUE1), + 1 => Some(SWCON_A::VALUE2), + 2 => Some(SWCON_A::VALUE3), + 3 => Some(SWCON_A::VALUE4), + 4 => Some(SWCON_A::VALUE5), + 8 => Some(SWCON_A::VALUE6), + 12 => Some(SWCON_A::VALUE7), + 14 => Some(SWCON_A::VALUE8), _ => None, } } #[doc = "Normal mode, boot from Boot ROM"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Swcon::Value1 + *self == SWCON_A::VALUE1 } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Swcon::Value2 + *self == SWCON_A::VALUE2 } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Swcon::Value3 + *self == SWCON_A::VALUE3 } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Swcon::Value4 + *self == SWCON_A::VALUE4 } #[doc = "Boot from Code SRAM"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Swcon::Value5 + *self == SWCON_A::VALUE5 } #[doc = "Boot from alternate Flash Address 0"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Swcon::Value6 + *self == SWCON_A::VALUE6 } #[doc = "Boot from alternate Flash Address 1"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Swcon::Value7 + *self == SWCON_A::VALUE7 } #[doc = "Enable fallback Alternate Boot Mode (ABM)"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Swcon::Value8 + *self == SWCON_A::VALUE8 } } #[doc = "Field `SWCON` writer - SW Configuration"] -pub type SwconW<'a, REG> = crate::FieldWriter<'a, REG, 4, Swcon>; -impl<'a, REG> SwconW<'a, REG> +pub type SWCON_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SWCON_A>; +impl<'a, REG> SWCON_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -160,78 +160,78 @@ where #[doc = "Normal mode, boot from Boot ROM"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Swcon::Value1) + self.variant(SWCON_A::VALUE1) } #[doc = "ASC BSL enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Swcon::Value2) + self.variant(SWCON_A::VALUE2) } #[doc = "BMI customized boot enabled"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Swcon::Value3) + self.variant(SWCON_A::VALUE3) } #[doc = "CAN BSL enabled"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Swcon::Value4) + self.variant(SWCON_A::VALUE4) } #[doc = "Boot from Code SRAM"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Swcon::Value5) + self.variant(SWCON_A::VALUE5) } #[doc = "Boot from alternate Flash Address 0"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Swcon::Value6) + self.variant(SWCON_A::VALUE6) } #[doc = "Boot from alternate Flash Address 1"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Swcon::Value7) + self.variant(SWCON_A::VALUE7) } #[doc = "Enable fallback Alternate Boot Mode (ABM)"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Swcon::Value8) + self.variant(SWCON_A::VALUE8) } } impl R { #[doc = "Bits 0:1 - HW Configuration"] #[inline(always)] - pub fn hwcon(&self) -> HwconR { - HwconR::new((self.bits & 3) as u8) + pub fn hwcon(&self) -> HWCON_R { + HWCON_R::new((self.bits & 3) as u8) } #[doc = "Bits 8:11 - SW Configuration"] #[inline(always)] - pub fn swcon(&self) -> SwconR { - SwconR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn swcon(&self) -> SWCON_R { + SWCON_R::new(((self.bits >> 8) & 0x0f) as u8) } } impl W { #[doc = "Bits 8:11 - SW Configuration"] #[inline(always)] #[must_use] - pub fn swcon(&mut self) -> SwconW { - SwconW::new(self, 8) + pub fn swcon(&mut self) -> SWCON_W { + SWCON_W::new(self, 8) } } #[doc = "Startup Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`stcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct StconSpec; -impl crate::RegisterSpec for StconSpec { +pub struct STCON_SPEC; +impl crate::RegisterSpec for STCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`stcon::R`](R) reader structure"] -impl crate::Readable for StconSpec {} +impl crate::Readable for STCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`stcon::W`](W) writer structure"] -impl crate::Writable for StconSpec { +impl crate::Writable for STCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets STCON to value 0"] -impl crate::Resettable for StconSpec { +impl crate::Resettable for STCON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate.rs b/src/scu_hibernate.rs index c459d8fe..1b2f94d4 100644 --- a/src/scu_hibernate.rs +++ b/src/scu_hibernate.rs @@ -1,199 +1,183 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - hdstat: Hdstat, - hdclr: Hdclr, - hdset: Hdset, - hdcr: Hdcr, + hdstat: HDSTAT, + hdclr: HDCLR, + hdset: HDSET, + hdcr: HDCR, _reserved4: [u8; 0x04], - oscsictrl: Oscsictrl, - osculstat: Osculstat, - osculctrl: Osculctrl, - lpacconf: Lpacconf, - lpacth0: Lpacth0, - lpacth1: Lpacth1, - lpacst: Lpacst, - lpacclr: Lpacclr, - lpacset: Lpacset, - hintst: Hintst, - hintclr: Hintclr, - hintset: Hintset, + oscsictrl: OSCSICTRL, + osculstat: OSCULSTAT, + osculctrl: OSCULCTRL, + lpacconf: LPACCONF, + lpacth0: LPACTH0, + lpacth1: LPACTH1, + lpacst: LPACST, + lpacclr: LPACCLR, + lpacset: LPACSET, + hintst: HINTST, + hintclr: HINTCLR, + hintset: HINTSET, } impl RegisterBlock { #[doc = "0x00 - Hibernate Domain Status Register"] #[inline(always)] - pub const fn hdstat(&self) -> &Hdstat { + pub const fn hdstat(&self) -> &HDSTAT { &self.hdstat } #[doc = "0x04 - Hibernate Domain Status Clear Register"] #[inline(always)] - pub const fn hdclr(&self) -> &Hdclr { + pub const fn hdclr(&self) -> &HDCLR { &self.hdclr } #[doc = "0x08 - Hibernate Domain Status Set Register"] #[inline(always)] - pub const fn hdset(&self) -> &Hdset { + pub const fn hdset(&self) -> &HDSET { &self.hdset } #[doc = "0x0c - Hibernate Domain Control Register"] #[inline(always)] - pub const fn hdcr(&self) -> &Hdcr { + pub const fn hdcr(&self) -> &HDCR { &self.hdcr } #[doc = "0x14 - fOSI Control Register"] #[inline(always)] - pub const fn oscsictrl(&self) -> &Oscsictrl { + pub const fn oscsictrl(&self) -> &OSCSICTRL { &self.oscsictrl } #[doc = "0x18 - OSC_ULP Status Register"] #[inline(always)] - pub const fn osculstat(&self) -> &Osculstat { + pub const fn osculstat(&self) -> &OSCULSTAT { &self.osculstat } #[doc = "0x1c - OSC_ULP Control Register"] #[inline(always)] - pub const fn osculctrl(&self) -> &Osculctrl { + pub const fn osculctrl(&self) -> &OSCULCTRL { &self.osculctrl } #[doc = "0x20 - Analog Wake-up Configuration Register"] #[inline(always)] - pub const fn lpacconf(&self) -> &Lpacconf { + pub const fn lpacconf(&self) -> &LPACCONF { &self.lpacconf } #[doc = "0x24 - LPAC Threshold Register 0"] #[inline(always)] - pub const fn lpacth0(&self) -> &Lpacth0 { + pub const fn lpacth0(&self) -> &LPACTH0 { &self.lpacth0 } #[doc = "0x28 - LPAC Threshold Register 1"] #[inline(always)] - pub const fn lpacth1(&self) -> &Lpacth1 { + pub const fn lpacth1(&self) -> &LPACTH1 { &self.lpacth1 } #[doc = "0x2c - Hibernate Analog Control State Register"] #[inline(always)] - pub const fn lpacst(&self) -> &Lpacst { + pub const fn lpacst(&self) -> &LPACST { &self.lpacst } #[doc = "0x30 - LPAC Control Clear Register"] #[inline(always)] - pub const fn lpacclr(&self) -> &Lpacclr { + pub const fn lpacclr(&self) -> &LPACCLR { &self.lpacclr } #[doc = "0x34 - LPAC Control Set Register"] #[inline(always)] - pub const fn lpacset(&self) -> &Lpacset { + pub const fn lpacset(&self) -> &LPACSET { &self.lpacset } #[doc = "0x38 - Hibernate Internal Control State Register"] #[inline(always)] - pub const fn hintst(&self) -> &Hintst { + pub const fn hintst(&self) -> &HINTST { &self.hintst } #[doc = "0x3c - Hibernate Internal Control Clear Register"] #[inline(always)] - pub const fn hintclr(&self) -> &Hintclr { + pub const fn hintclr(&self) -> &HINTCLR { &self.hintclr } #[doc = "0x40 - Hibernate Internal Control Set Register"] #[inline(always)] - pub const fn hintset(&self) -> &Hintset { + pub const fn hintset(&self) -> &HINTSET { &self.hintset } } #[doc = "HDSTAT (r) register accessor: Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdstat`] module"] -#[doc(alias = "HDSTAT")] -pub type Hdstat = crate::Reg; +pub type HDSTAT = crate::Reg; #[doc = "Hibernate Domain Status Register"] pub mod hdstat; #[doc = "HDCLR (w) register accessor: Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdclr`] module"] -#[doc(alias = "HDCLR")] -pub type Hdclr = crate::Reg; +pub type HDCLR = crate::Reg; #[doc = "Hibernate Domain Status Clear Register"] pub mod hdclr; #[doc = "HDSET (w) register accessor: Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdset`] module"] -#[doc(alias = "HDSET")] -pub type Hdset = crate::Reg; +pub type HDSET = crate::Reg; #[doc = "Hibernate Domain Status Set Register"] pub mod hdset; #[doc = "HDCR (rw) register accessor: Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hdcr`] module"] -#[doc(alias = "HDCR")] -pub type Hdcr = crate::Reg; +pub type HDCR = crate::Reg; #[doc = "Hibernate Domain Control Register"] pub mod hdcr; #[doc = "OSCSICTRL (rw) register accessor: fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oscsictrl`] module"] -#[doc(alias = "OSCSICTRL")] -pub type Oscsictrl = crate::Reg; +pub type OSCSICTRL = crate::Reg; #[doc = "fOSI Control Register"] pub mod oscsictrl; #[doc = "OSCULSTAT (r) register accessor: OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculstat`] module"] -#[doc(alias = "OSCULSTAT")] -pub type Osculstat = crate::Reg; +pub type OSCULSTAT = crate::Reg; #[doc = "OSC_ULP Status Register"] pub mod osculstat; #[doc = "OSCULCTRL (rw) register accessor: OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@osculctrl`] module"] -#[doc(alias = "OSCULCTRL")] -pub type Osculctrl = crate::Reg; +pub type OSCULCTRL = crate::Reg; #[doc = "OSC_ULP Control Register"] pub mod osculctrl; #[doc = "LPACCONF (rw) register accessor: Analog Wake-up Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacconf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacconf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacconf`] module"] -#[doc(alias = "LPACCONF")] -pub type Lpacconf = crate::Reg; +pub type LPACCONF = crate::Reg; #[doc = "Analog Wake-up Configuration Register"] pub mod lpacconf; #[doc = "LPACTH0 (rw) register accessor: LPAC Threshold Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth0`] module"] -#[doc(alias = "LPACTH0")] -pub type Lpacth0 = crate::Reg; +pub type LPACTH0 = crate::Reg; #[doc = "LPAC Threshold Register 0"] pub mod lpacth0; #[doc = "LPACTH1 (rw) register accessor: LPAC Threshold Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacth1`] module"] -#[doc(alias = "LPACTH1")] -pub type Lpacth1 = crate::Reg; +pub type LPACTH1 = crate::Reg; #[doc = "LPAC Threshold Register 1"] pub mod lpacth1; #[doc = "LPACST (r) register accessor: Hibernate Analog Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacst`] module"] -#[doc(alias = "LPACST")] -pub type Lpacst = crate::Reg; +pub type LPACST = crate::Reg; #[doc = "Hibernate Analog Control State Register"] pub mod lpacst; #[doc = "LPACCLR (w) register accessor: LPAC Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacclr`] module"] -#[doc(alias = "LPACCLR")] -pub type Lpacclr = crate::Reg; +pub type LPACCLR = crate::Reg; #[doc = "LPAC Control Clear Register"] pub mod lpacclr; #[doc = "LPACSET (w) register accessor: LPAC Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lpacset`] module"] -#[doc(alias = "LPACSET")] -pub type Lpacset = crate::Reg; +pub type LPACSET = crate::Reg; #[doc = "LPAC Control Set Register"] pub mod lpacset; #[doc = "HINTST (r) register accessor: Hibernate Internal Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hintst::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintst`] module"] -#[doc(alias = "HINTST")] -pub type Hintst = crate::Reg; +pub type HINTST = crate::Reg; #[doc = "Hibernate Internal Control State Register"] pub mod hintst; #[doc = "HINTCLR (w) register accessor: Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintclr`] module"] -#[doc(alias = "HINTCLR")] -pub type Hintclr = crate::Reg; +pub type HINTCLR = crate::Reg; #[doc = "Hibernate Internal Control Clear Register"] pub mod hintclr; #[doc = "HINTSET (w) register accessor: Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hintset`] module"] -#[doc(alias = "HINTSET")] -pub type Hintset = crate::Reg; +pub type HINTSET = crate::Reg; #[doc = "Hibernate Internal Control Set Register"] pub mod hintset; diff --git a/src/scu_hibernate/hdclr.rs b/src/scu_hibernate/hdclr.rs index 6633b228..edc65da2 100644 --- a/src/scu_hibernate/hdclr.rs +++ b/src/scu_hibernate/hdclr.rs @@ -1,315 +1,315 @@ #[doc = "Register `HDCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wake-up Pin Event Positive Edge Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Epev { +pub enum EPEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Epev) -> Self { + fn from(variant: EPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EPEV` writer - Wake-up Pin Event Positive Edge Clear"] -pub type EpevW<'a, REG> = crate::BitWriter<'a, REG, Epev>; -impl<'a, REG> EpevW<'a, REG> +pub type EPEV_W<'a, REG> = crate::BitWriter<'a, REG, EPEV_A>; +impl<'a, REG> EPEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Epev::Value1) + self.variant(EPEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Epev::Value2) + self.variant(EPEV_A::VALUE2) } } #[doc = "Wake-up Pin Event Negative Edge Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enev { +pub enum ENEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enev) -> Self { + fn from(variant: ENEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENEV` writer - Wake-up Pin Event Negative Edge Clear"] -pub type EnevW<'a, REG> = crate::BitWriter<'a, REG, Enev>; -impl<'a, REG> EnevW<'a, REG> +pub type ENEV_W<'a, REG> = crate::BitWriter<'a, REG, ENEV_A>; +impl<'a, REG> ENEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enev::Value1) + self.variant(ENEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enev::Value2) + self.variant(ENEV_A::VALUE2) } } #[doc = "RTC Event Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rtcev { +pub enum RTCEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rtcev) -> Self { + fn from(variant: RTCEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCEV` writer - RTC Event Clear"] -pub type RtcevW<'a, REG> = crate::BitWriter<'a, REG, Rtcev>; -impl<'a, REG> RtcevW<'a, REG> +pub type RTCEV_W<'a, REG> = crate::BitWriter<'a, REG, RTCEV_A>; +impl<'a, REG> RTCEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rtcev::Value1) + self.variant(RTCEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rtcev::Value2) + self.variant(RTCEV_A::VALUE2) } } #[doc = "ULP WDG Alarm Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdg { +pub enum ULPWDG_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear watchdog alarm"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdg) -> Self { + fn from(variant: ULPWDG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDG` writer - ULP WDG Alarm Clear"] -pub type UlpwdgW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdg>; -impl<'a, REG> UlpwdgW<'a, REG> +pub type ULPWDG_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDG_A>; +impl<'a, REG> ULPWDG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdg::Value1) + self.variant(ULPWDG_A::VALUE1) } #[doc = "Clear watchdog alarm"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdg::Value2) + self.variant(ULPWDG_A::VALUE2) } } #[doc = "Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatpev { +pub enum VBATPEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatpev) -> Self { + fn from(variant: VBATPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATPEV` writer - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Clear"] -pub type VbatpevW<'a, REG> = crate::BitWriter<'a, REG, Vbatpev>; -impl<'a, REG> VbatpevW<'a, REG> +pub type VBATPEV_W<'a, REG> = crate::BitWriter<'a, REG, VBATPEV_A>; +impl<'a, REG> VBATPEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatpev::Value1) + self.variant(VBATPEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatpev::Value2) + self.variant(VBATPEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatnev { +pub enum VBATNEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatnev) -> Self { + fn from(variant: VBATNEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATNEV` writer - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Clear"] -pub type VbatnevW<'a, REG> = crate::BitWriter<'a, REG, Vbatnev>; -impl<'a, REG> VbatnevW<'a, REG> +pub type VBATNEV_W<'a, REG> = crate::BitWriter<'a, REG, VBATNEV_A>; +impl<'a, REG> VBATNEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatnev::Value1) + self.variant(VBATNEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatnev::Value2) + self.variant(VBATNEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0pev { +pub enum AHIBIO0PEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0pev) -> Self { + fn from(variant: AHIBIO0PEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0PEV` writer - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Clear"] -pub type Ahibio0pevW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0pev>; -impl<'a, REG> Ahibio0pevW<'a, REG> +pub type AHIBIO0PEV_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0PEV_A>; +impl<'a, REG> AHIBIO0PEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0pev::Value1) + self.variant(AHIBIO0PEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0pev::Value2) + self.variant(AHIBIO0PEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0nev { +pub enum AHIBIO0NEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0nev) -> Self { + fn from(variant: AHIBIO0NEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0NEV` writer - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Clear"] -pub type Ahibio0nevW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0nev>; -impl<'a, REG> Ahibio0nevW<'a, REG> +pub type AHIBIO0NEV_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0NEV_A>; +impl<'a, REG> AHIBIO0NEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0nev::Value1) + self.variant(AHIBIO0NEV_A::VALUE1) } #[doc = "Clear wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0nev::Value2) + self.variant(AHIBIO0NEV_A::VALUE2) } } impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Clear"] #[inline(always)] #[must_use] - pub fn epev(&mut self) -> EpevW { - EpevW::new(self, 0) + pub fn epev(&mut self) -> EPEV_W { + EPEV_W::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Clear"] #[inline(always)] #[must_use] - pub fn enev(&mut self) -> EnevW { - EnevW::new(self, 1) + pub fn enev(&mut self) -> ENEV_W { + ENEV_W::new(self, 1) } #[doc = "Bit 2 - RTC Event Clear"] #[inline(always)] #[must_use] - pub fn rtcev(&mut self) -> RtcevW { - RtcevW::new(self, 2) + pub fn rtcev(&mut self) -> RTCEV_W { + RTCEV_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Clear"] #[inline(always)] #[must_use] - pub fn ulpwdg(&mut self) -> UlpwdgW { - UlpwdgW::new(self, 3) + pub fn ulpwdg(&mut self) -> ULPWDG_W { + ULPWDG_W::new(self, 3) } #[doc = "Bit 8 - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Clear"] #[inline(always)] #[must_use] - pub fn vbatpev(&mut self) -> VbatpevW { - VbatpevW::new(self, 8) + pub fn vbatpev(&mut self) -> VBATPEV_W { + VBATPEV_W::new(self, 8) } #[doc = "Bit 9 - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Clear"] #[inline(always)] #[must_use] - pub fn vbatnev(&mut self) -> VbatnevW { - VbatnevW::new(self, 9) + pub fn vbatnev(&mut self) -> VBATNEV_W { + VBATNEV_W::new(self, 9) } #[doc = "Bit 10 - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Clear"] #[inline(always)] #[must_use] - pub fn ahibio0pev(&mut self) -> Ahibio0pevW { - Ahibio0pevW::new(self, 10) + pub fn ahibio0pev(&mut self) -> AHIBIO0PEV_W { + AHIBIO0PEV_W::new(self, 10) } #[doc = "Bit 11 - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Clear"] #[inline(always)] #[must_use] - pub fn ahibio0nev(&mut self) -> Ahibio0nevW { - Ahibio0nevW::new(self, 11) + pub fn ahibio0nev(&mut self) -> AHIBIO0NEV_W { + AHIBIO0NEV_W::new(self, 11) } } #[doc = "Hibernate Domain Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HdclrSpec; -impl crate::RegisterSpec for HdclrSpec { +pub struct HDCLR_SPEC; +impl crate::RegisterSpec for HDCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hdclr::W`](W) writer structure"] -impl crate::Writable for HdclrSpec { +impl crate::Writable for HDCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDCLR to value 0"] -impl crate::Resettable for HdclrSpec { +impl crate::Resettable for HDCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hdcr.rs b/src/scu_hibernate/hdcr.rs index cb3299e4..5dd73ed3 100644 --- a/src/scu_hibernate/hdcr.rs +++ b/src/scu_hibernate/hdcr.rs @@ -1,740 +1,740 @@ #[doc = "Register `HDCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `HDCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wake-Up on Pin Event Positive Edge Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wkpep { +pub enum WKPEP_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wkpep) -> Self { + fn from(variant: WKPEP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WKPEP` reader - Wake-Up on Pin Event Positive Edge Enable"] -pub type WkpepR = crate::BitReader; -impl WkpepR { +pub type WKPEP_R = crate::BitReader; +impl WKPEP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wkpep { + pub const fn variant(&self) -> WKPEP_A { match self.bits { - false => Wkpep::Value1, - true => Wkpep::Value2, + false => WKPEP_A::VALUE1, + true => WKPEP_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wkpep::Value1 + *self == WKPEP_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wkpep::Value2 + *self == WKPEP_A::VALUE2 } } #[doc = "Field `WKPEP` writer - Wake-Up on Pin Event Positive Edge Enable"] -pub type WkpepW<'a, REG> = crate::BitWriter<'a, REG, Wkpep>; -impl<'a, REG> WkpepW<'a, REG> +pub type WKPEP_W<'a, REG> = crate::BitWriter<'a, REG, WKPEP_A>; +impl<'a, REG> WKPEP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wkpep::Value1) + self.variant(WKPEP_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wkpep::Value2) + self.variant(WKPEP_A::VALUE2) } } #[doc = "Wake-up on Pin Event Negative Edge Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wkpen { +pub enum WKPEN_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wkpen) -> Self { + fn from(variant: WKPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WKPEN` reader - Wake-up on Pin Event Negative Edge Enable"] -pub type WkpenR = crate::BitReader; -impl WkpenR { +pub type WKPEN_R = crate::BitReader; +impl WKPEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wkpen { + pub const fn variant(&self) -> WKPEN_A { match self.bits { - false => Wkpen::Value1, - true => Wkpen::Value2, + false => WKPEN_A::VALUE1, + true => WKPEN_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wkpen::Value1 + *self == WKPEN_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wkpen::Value2 + *self == WKPEN_A::VALUE2 } } #[doc = "Field `WKPEN` writer - Wake-up on Pin Event Negative Edge Enable"] -pub type WkpenW<'a, REG> = crate::BitWriter<'a, REG, Wkpen>; -impl<'a, REG> WkpenW<'a, REG> +pub type WKPEN_W<'a, REG> = crate::BitWriter<'a, REG, WKPEN_A>; +impl<'a, REG> WKPEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wkpen::Value1) + self.variant(WKPEN_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wkpen::Value2) + self.variant(WKPEN_A::VALUE2) } } #[doc = "Wake-up on RTC Event Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rtce { +pub enum RTCE_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rtce) -> Self { + fn from(variant: RTCE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCE` reader - Wake-up on RTC Event Enable"] -pub type RtceR = crate::BitReader; -impl RtceR { +pub type RTCE_R = crate::BitReader; +impl RTCE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rtce { + pub const fn variant(&self) -> RTCE_A { match self.bits { - false => Rtce::Value1, - true => Rtce::Value2, + false => RTCE_A::VALUE1, + true => RTCE_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rtce::Value1 + *self == RTCE_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rtce::Value2 + *self == RTCE_A::VALUE2 } } #[doc = "Field `RTCE` writer - Wake-up on RTC Event Enable"] -pub type RtceW<'a, REG> = crate::BitWriter<'a, REG, Rtce>; -impl<'a, REG> RtceW<'a, REG> +pub type RTCE_W<'a, REG> = crate::BitWriter<'a, REG, RTCE_A>; +impl<'a, REG> RTCE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rtce::Value1) + self.variant(RTCE_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rtce::Value2) + self.variant(RTCE_A::VALUE2) } } #[doc = "ULP WDG Alarm Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdgen { +pub enum ULPWDGEN_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdgen) -> Self { + fn from(variant: ULPWDGEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGEN` reader - ULP WDG Alarm Enable"] -pub type UlpwdgenR = crate::BitReader; -impl UlpwdgenR { +pub type ULPWDGEN_R = crate::BitReader; +impl ULPWDGEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ulpwdgen { + pub const fn variant(&self) -> ULPWDGEN_A { match self.bits { - false => Ulpwdgen::Value1, - true => Ulpwdgen::Value2, + false => ULPWDGEN_A::VALUE1, + true => ULPWDGEN_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ulpwdgen::Value1 + *self == ULPWDGEN_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ulpwdgen::Value2 + *self == ULPWDGEN_A::VALUE2 } } #[doc = "Field `ULPWDGEN` writer - ULP WDG Alarm Enable"] -pub type UlpwdgenW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgen>; -impl<'a, REG> UlpwdgenW<'a, REG> +pub type ULPWDGEN_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGEN_A>; +impl<'a, REG> ULPWDGEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdgen::Value1) + self.variant(ULPWDGEN_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdgen::Value2) + self.variant(ULPWDGEN_A::VALUE2) } } #[doc = "Hibernate Request Value Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hib { +pub enum HIB_A { #[doc = "0: External hibernate request inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: External hibernate request active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hib) -> Self { + fn from(variant: HIB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIB` reader - Hibernate Request Value Set"] -pub type HibR = crate::BitReader; -impl HibR { +pub type HIB_R = crate::BitReader; +impl HIB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hib { + pub const fn variant(&self) -> HIB_A { match self.bits { - false => Hib::Value1, - true => Hib::Value2, + false => HIB_A::VALUE1, + true => HIB_A::VALUE2, } } #[doc = "External hibernate request inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hib::Value1 + *self == HIB_A::VALUE1 } #[doc = "External hibernate request active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hib::Value2 + *self == HIB_A::VALUE2 } } #[doc = "Field `HIB` writer - Hibernate Request Value Set"] -pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; -impl<'a, REG> HibW<'a, REG> +pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_A>; +impl<'a, REG> HIB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External hibernate request inactive"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hib::Value1) + self.variant(HIB_A::VALUE1) } #[doc = "External hibernate request active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hib::Value2) + self.variant(HIB_A::VALUE2) } } #[doc = "Multiplex Control for RTC_XTAL_1 Select as GPI Input\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xtalgpi1sel { +pub enum XTALGPI1SEL_A { #[doc = "0: RTC_XTAL_1 input selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Analog comparator output for HIB_IO_1 or pre-selected digital IO input"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xtalgpi1sel) -> Self { + fn from(variant: XTALGPI1SEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XTALGPI1SEL` reader - Multiplex Control for RTC_XTAL_1 Select as GPI Input"] -pub type Xtalgpi1selR = crate::BitReader; -impl Xtalgpi1selR { +pub type XTALGPI1SEL_R = crate::BitReader; +impl XTALGPI1SEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xtalgpi1sel { + pub const fn variant(&self) -> XTALGPI1SEL_A { match self.bits { - false => Xtalgpi1sel::Value1, - true => Xtalgpi1sel::Value2, + false => XTALGPI1SEL_A::VALUE1, + true => XTALGPI1SEL_A::VALUE2, } } #[doc = "RTC_XTAL_1 input selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xtalgpi1sel::Value1 + *self == XTALGPI1SEL_A::VALUE1 } #[doc = "Analog comparator output for HIB_IO_1 or pre-selected digital IO input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xtalgpi1sel::Value2 + *self == XTALGPI1SEL_A::VALUE2 } } #[doc = "Field `XTALGPI1SEL` writer - Multiplex Control for RTC_XTAL_1 Select as GPI Input"] -pub type Xtalgpi1selW<'a, REG> = crate::BitWriter<'a, REG, Xtalgpi1sel>; -impl<'a, REG> Xtalgpi1selW<'a, REG> +pub type XTALGPI1SEL_W<'a, REG> = crate::BitWriter<'a, REG, XTALGPI1SEL_A>; +impl<'a, REG> XTALGPI1SEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "RTC_XTAL_1 input selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtalgpi1sel::Value1) + self.variant(XTALGPI1SEL_A::VALUE1) } #[doc = "Analog comparator output for HIB_IO_1 or pre-selected digital IO input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtalgpi1sel::Value2) + self.variant(XTALGPI1SEL_A::VALUE2) } } #[doc = "fRTC Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rcs { +pub enum RCS_A { #[doc = "0: fOSI selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fULP selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rcs) -> Self { + fn from(variant: RCS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RCS` reader - fRTC Clock Selection"] -pub type RcsR = crate::BitReader; -impl RcsR { +pub type RCS_R = crate::BitReader; +impl RCS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rcs { + pub const fn variant(&self) -> RCS_A { match self.bits { - false => Rcs::Value1, - true => Rcs::Value2, + false => RCS_A::VALUE1, + true => RCS_A::VALUE2, } } #[doc = "fOSI selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rcs::Value1 + *self == RCS_A::VALUE1 } #[doc = "fULP selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rcs::Value2 + *self == RCS_A::VALUE2 } } #[doc = "Field `RCS` writer - fRTC Clock Selection"] -pub type RcsW<'a, REG> = crate::BitWriter<'a, REG, Rcs>; -impl<'a, REG> RcsW<'a, REG> +pub type RCS_W<'a, REG> = crate::BitWriter<'a, REG, RCS_A>; +impl<'a, REG> RCS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOSI selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rcs::Value1) + self.variant(RCS_A::VALUE1) } #[doc = "fULP selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rcs::Value2) + self.variant(RCS_A::VALUE2) } } #[doc = "fSTDBY Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stdbysel { +pub enum STDBYSEL_A { #[doc = "0: fOSI selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fULP selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stdbysel) -> Self { + fn from(variant: STDBYSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STDBYSEL` reader - fSTDBY Clock Selection"] -pub type StdbyselR = crate::BitReader; -impl StdbyselR { +pub type STDBYSEL_R = crate::BitReader; +impl STDBYSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stdbysel { + pub const fn variant(&self) -> STDBYSEL_A { match self.bits { - false => Stdbysel::Value1, - true => Stdbysel::Value2, + false => STDBYSEL_A::VALUE1, + true => STDBYSEL_A::VALUE2, } } #[doc = "fOSI selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stdbysel::Value1 + *self == STDBYSEL_A::VALUE1 } #[doc = "fULP selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stdbysel::Value2 + *self == STDBYSEL_A::VALUE2 } } #[doc = "Field `STDBYSEL` writer - fSTDBY Clock Selection"] -pub type StdbyselW<'a, REG> = crate::BitWriter<'a, REG, Stdbysel>; -impl<'a, REG> StdbyselW<'a, REG> +pub type STDBYSEL_W<'a, REG> = crate::BitWriter<'a, REG, STDBYSEL_A>; +impl<'a, REG> STDBYSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "fOSI selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stdbysel::Value1) + self.variant(STDBYSEL_A::VALUE1) } #[doc = "fULP selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stdbysel::Value2) + self.variant(STDBYSEL_A::VALUE2) } } #[doc = "Wake-Up from Hibernate Trigger Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wkupsel { +pub enum WKUPSEL_A { #[doc = "0: HIB_IO_1 pin selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: HIB_IO_0 pin selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wkupsel) -> Self { + fn from(variant: WKUPSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WKUPSEL` reader - Wake-Up from Hibernate Trigger Input Selection"] -pub type WkupselR = crate::BitReader; -impl WkupselR { +pub type WKUPSEL_R = crate::BitReader; +impl WKUPSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wkupsel { + pub const fn variant(&self) -> WKUPSEL_A { match self.bits { - false => Wkupsel::Value1, - true => Wkupsel::Value2, + false => WKUPSEL_A::VALUE1, + true => WKUPSEL_A::VALUE2, } } #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wkupsel::Value1 + *self == WKUPSEL_A::VALUE1 } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wkupsel::Value2 + *self == WKUPSEL_A::VALUE2 } } #[doc = "Field `WKUPSEL` writer - Wake-Up from Hibernate Trigger Input Selection"] -pub type WkupselW<'a, REG> = crate::BitWriter<'a, REG, Wkupsel>; -impl<'a, REG> WkupselW<'a, REG> +pub type WKUPSEL_W<'a, REG> = crate::BitWriter<'a, REG, WKUPSEL_A>; +impl<'a, REG> WKUPSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HIB_IO_1 pin selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wkupsel::Value1) + self.variant(WKUPSEL_A::VALUE1) } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wkupsel::Value2) + self.variant(WKUPSEL_A::VALUE2) } } #[doc = "General Purpose Input 0 Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gpi0sel { +pub enum GPI0SEL_A { #[doc = "1: HIB_IO_0 pin selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gpi0sel) -> Self { + fn from(variant: GPI0SEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GPI0SEL` reader - General Purpose Input 0 Selection"] -pub type Gpi0selR = crate::BitReader; -impl Gpi0selR { +pub type GPI0SEL_R = crate::BitReader; +impl GPI0SEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(Gpi0sel::Value2), + true => Some(GPI0SEL_A::VALUE2), _ => None, } } #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gpi0sel::Value2 + *self == GPI0SEL_A::VALUE2 } } #[doc = "Field `GPI0SEL` writer - General Purpose Input 0 Selection"] -pub type Gpi0selW<'a, REG> = crate::BitWriter<'a, REG, Gpi0sel>; -impl<'a, REG> Gpi0selW<'a, REG> +pub type GPI0SEL_W<'a, REG> = crate::BitWriter<'a, REG, GPI0SEL_A>; +impl<'a, REG> GPI0SEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "HIB_IO_0 pin selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gpi0sel::Value2) + self.variant(GPI0SEL_A::VALUE2) } } #[doc = "HIBIO0 Polarity Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibio0pol { +pub enum HIBIO0POL_A { #[doc = "0: Direct value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Inverted value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibio0pol) -> Self { + fn from(variant: HIBIO0POL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBIO0POL` reader - HIBIO0 Polarity Set"] -pub type Hibio0polR = crate::BitReader; -impl Hibio0polR { +pub type HIBIO0POL_R = crate::BitReader; +impl HIBIO0POL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hibio0pol { + pub const fn variant(&self) -> HIBIO0POL_A { match self.bits { - false => Hibio0pol::Value1, - true => Hibio0pol::Value2, + false => HIBIO0POL_A::VALUE1, + true => HIBIO0POL_A::VALUE2, } } #[doc = "Direct value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibio0pol::Value1 + *self == HIBIO0POL_A::VALUE1 } #[doc = "Inverted value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibio0pol::Value2 + *self == HIBIO0POL_A::VALUE2 } } #[doc = "Field `HIBIO0POL` writer - HIBIO0 Polarity Set"] -pub type Hibio0polW<'a, REG> = crate::BitWriter<'a, REG, Hibio0pol>; -impl<'a, REG> Hibio0polW<'a, REG> +pub type HIBIO0POL_W<'a, REG> = crate::BitWriter<'a, REG, HIBIO0POL_A>; +impl<'a, REG> HIBIO0POL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Direct value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibio0pol::Value1) + self.variant(HIBIO0POL_A::VALUE1) } #[doc = "Inverted value"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibio0pol::Value2) + self.variant(HIBIO0POL_A::VALUE2) } } #[doc = "Select Analog Channel 0 or Digital Output Path\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Adig0sel { +pub enum ADIG0SEL_A { #[doc = "0: Digital input"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Analog comparator result for HIB_IO_0"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Adig0sel) -> Self { + fn from(variant: ADIG0SEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ADIG0SEL` reader - Select Analog Channel 0 or Digital Output Path"] -pub type Adig0selR = crate::BitReader; -impl Adig0selR { +pub type ADIG0SEL_R = crate::BitReader; +impl ADIG0SEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Adig0sel { + pub const fn variant(&self) -> ADIG0SEL_A { match self.bits { - false => Adig0sel::Value1, - true => Adig0sel::Value2, + false => ADIG0SEL_A::VALUE1, + true => ADIG0SEL_A::VALUE2, } } #[doc = "Digital input"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Adig0sel::Value1 + *self == ADIG0SEL_A::VALUE1 } #[doc = "Analog comparator result for HIB_IO_0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Adig0sel::Value2 + *self == ADIG0SEL_A::VALUE2 } } #[doc = "Field `ADIG0SEL` writer - Select Analog Channel 0 or Digital Output Path"] -pub type Adig0selW<'a, REG> = crate::BitWriter<'a, REG, Adig0sel>; -impl<'a, REG> Adig0selW<'a, REG> +pub type ADIG0SEL_W<'a, REG> = crate::BitWriter<'a, REG, ADIG0SEL_A>; +impl<'a, REG> ADIG0SEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Digital input"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Adig0sel::Value1) + self.variant(ADIG0SEL_A::VALUE1) } #[doc = "Analog comparator result for HIB_IO_0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Adig0sel::Value2) + self.variant(ADIG0SEL_A::VALUE2) } } #[doc = "HIB_IO_0 Pin I/O Control (default HIBOUT)\n\nValue on reset: 12"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hibio0sel { +pub enum HIBIO0SEL_A { #[doc = "0: Direct input, No input pull device connected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Direct input, Input pull-down device connected"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Direct input, Input pull-up device connected"] - Value3 = 2, + VALUE3 = 2, #[doc = "8: Push-pull HIB Control output"] - Value4 = 8, + VALUE4 = 8, #[doc = "9: Push-pull WDT service output"] - Value5 = 9, + VALUE5 = 9, #[doc = "10: Push-pull GPIO output"] - Value6 = 10, + VALUE6 = 10, #[doc = "12: Open-drain HIB Control output"] - Value7 = 12, + VALUE7 = 12, #[doc = "13: Open-drain WDT service output"] - Value8 = 13, + VALUE8 = 13, #[doc = "14: Open-drain GPIO output"] - Value9 = 14, + VALUE9 = 14, #[doc = "15: Analog input"] - Value10 = 15, + VALUE10 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hibio0sel) -> Self { + fn from(variant: HIBIO0SEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hibio0sel { +impl crate::FieldSpec for HIBIO0SEL_A { type Ux = u8; } -impl crate::IsEnum for Hibio0sel {} +impl crate::IsEnum for HIBIO0SEL_A {} #[doc = "Field `HIBIO0SEL` reader - HIB_IO_0 Pin I/O Control (default HIBOUT)"] -pub type Hibio0selR = crate::FieldReader; -impl Hibio0selR { +pub type HIBIO0SEL_R = crate::FieldReader; +impl HIBIO0SEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Hibio0sel::Value1), - 1 => Some(Hibio0sel::Value2), - 2 => Some(Hibio0sel::Value3), - 8 => Some(Hibio0sel::Value4), - 9 => Some(Hibio0sel::Value5), - 10 => Some(Hibio0sel::Value6), - 12 => Some(Hibio0sel::Value7), - 13 => Some(Hibio0sel::Value8), - 14 => Some(Hibio0sel::Value9), - 15 => Some(Hibio0sel::Value10), + 0 => Some(HIBIO0SEL_A::VALUE1), + 1 => Some(HIBIO0SEL_A::VALUE2), + 2 => Some(HIBIO0SEL_A::VALUE3), + 8 => Some(HIBIO0SEL_A::VALUE4), + 9 => Some(HIBIO0SEL_A::VALUE5), + 10 => Some(HIBIO0SEL_A::VALUE6), + 12 => Some(HIBIO0SEL_A::VALUE7), + 13 => Some(HIBIO0SEL_A::VALUE8), + 14 => Some(HIBIO0SEL_A::VALUE9), + 15 => Some(HIBIO0SEL_A::VALUE10), _ => None, } } #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibio0sel::Value1 + *self == HIBIO0SEL_A::VALUE1 } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibio0sel::Value2 + *self == HIBIO0SEL_A::VALUE2 } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hibio0sel::Value3 + *self == HIBIO0SEL_A::VALUE3 } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Hibio0sel::Value4 + *self == HIBIO0SEL_A::VALUE4 } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Hibio0sel::Value5 + *self == HIBIO0SEL_A::VALUE5 } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Hibio0sel::Value6 + *self == HIBIO0SEL_A::VALUE6 } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Hibio0sel::Value7 + *self == HIBIO0SEL_A::VALUE7 } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Hibio0sel::Value8 + *self == HIBIO0SEL_A::VALUE8 } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn is_value9(&self) -> bool { - *self == Hibio0sel::Value9 + *self == HIBIO0SEL_A::VALUE9 } #[doc = "Analog input"] #[inline(always)] pub fn is_value10(&self) -> bool { - *self == Hibio0sel::Value10 + *self == HIBIO0SEL_A::VALUE10 } } #[doc = "Field `HIBIO0SEL` writer - HIB_IO_0 Pin I/O Control (default HIBOUT)"] -pub type Hibio0selW<'a, REG> = crate::FieldWriter<'a, REG, 4, Hibio0sel>; -impl<'a, REG> Hibio0selW<'a, REG> +pub type HIBIO0SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, HIBIO0SEL_A>; +impl<'a, REG> HIBIO0SEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -742,471 +742,471 @@ where #[doc = "Direct input, No input pull device connected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value1) + self.variant(HIBIO0SEL_A::VALUE1) } #[doc = "Direct input, Input pull-down device connected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value2) + self.variant(HIBIO0SEL_A::VALUE2) } #[doc = "Direct input, Input pull-up device connected"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value3) + self.variant(HIBIO0SEL_A::VALUE3) } #[doc = "Push-pull HIB Control output"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value4) + self.variant(HIBIO0SEL_A::VALUE4) } #[doc = "Push-pull WDT service output"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value5) + self.variant(HIBIO0SEL_A::VALUE5) } #[doc = "Push-pull GPIO output"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value6) + self.variant(HIBIO0SEL_A::VALUE6) } #[doc = "Open-drain HIB Control output"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value7) + self.variant(HIBIO0SEL_A::VALUE7) } #[doc = "Open-drain WDT service output"] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value8) + self.variant(HIBIO0SEL_A::VALUE8) } #[doc = "Open-drain GPIO output"] #[inline(always)] pub fn value9(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value9) + self.variant(HIBIO0SEL_A::VALUE9) } #[doc = "Analog input"] #[inline(always)] pub fn value10(self) -> &'a mut crate::W { - self.variant(Hibio0sel::Value10) + self.variant(HIBIO0SEL_A::VALUE10) } } #[doc = "Wake-Up on VBAT Falling Below Threshold Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatlo { +pub enum VBATLO_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatlo) -> Self { + fn from(variant: VBATLO_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATLO` reader - Wake-Up on VBAT Falling Below Threshold Enable"] -pub type VbatloR = crate::BitReader; -impl VbatloR { +pub type VBATLO_R = crate::BitReader; +impl VBATLO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbatlo { + pub const fn variant(&self) -> VBATLO_A { match self.bits { - false => Vbatlo::Value1, - true => Vbatlo::Value2, + false => VBATLO_A::VALUE1, + true => VBATLO_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbatlo::Value1 + *self == VBATLO_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbatlo::Value2 + *self == VBATLO_A::VALUE2 } } #[doc = "Field `VBATLO` writer - Wake-Up on VBAT Falling Below Threshold Enable"] -pub type VbatloW<'a, REG> = crate::BitWriter<'a, REG, Vbatlo>; -impl<'a, REG> VbatloW<'a, REG> +pub type VBATLO_W<'a, REG> = crate::BitWriter<'a, REG, VBATLO_A>; +impl<'a, REG> VBATLO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatlo::Value1) + self.variant(VBATLO_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatlo::Value2) + self.variant(VBATLO_A::VALUE2) } } #[doc = "Wake-Up on VBAT Rising Above Threshold Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbathi { +pub enum VBATHI_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbathi) -> Self { + fn from(variant: VBATHI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATHI` reader - Wake-Up on VBAT Rising Above Threshold Enable"] -pub type VbathiR = crate::BitReader; -impl VbathiR { +pub type VBATHI_R = crate::BitReader; +impl VBATHI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbathi { + pub const fn variant(&self) -> VBATHI_A { match self.bits { - false => Vbathi::Value1, - true => Vbathi::Value2, + false => VBATHI_A::VALUE1, + true => VBATHI_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbathi::Value1 + *self == VBATHI_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbathi::Value2 + *self == VBATHI_A::VALUE2 } } #[doc = "Field `VBATHI` writer - Wake-Up on VBAT Rising Above Threshold Enable"] -pub type VbathiW<'a, REG> = crate::BitWriter<'a, REG, Vbathi>; -impl<'a, REG> VbathiW<'a, REG> +pub type VBATHI_W<'a, REG> = crate::BitWriter<'a, REG, VBATHI_A>; +impl<'a, REG> VBATHI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbathi::Value1) + self.variant(VBATHI_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbathi::Value2) + self.variant(VBATHI_A::VALUE2) } } #[doc = "Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0lo { +pub enum AHIBIO0LO_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0lo) -> Self { + fn from(variant: AHIBIO0LO_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0LO` reader - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable"] -pub type Ahibio0loR = crate::BitReader; -impl Ahibio0loR { +pub type AHIBIO0LO_R = crate::BitReader; +impl AHIBIO0LO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0lo { + pub const fn variant(&self) -> AHIBIO0LO_A { match self.bits { - false => Ahibio0lo::Value1, - true => Ahibio0lo::Value2, + false => AHIBIO0LO_A::VALUE1, + true => AHIBIO0LO_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0lo::Value1 + *self == AHIBIO0LO_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0lo::Value2 + *self == AHIBIO0LO_A::VALUE2 } } #[doc = "Field `AHIBIO0LO` writer - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable"] -pub type Ahibio0loW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0lo>; -impl<'a, REG> Ahibio0loW<'a, REG> +pub type AHIBIO0LO_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0LO_A>; +impl<'a, REG> AHIBIO0LO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0lo::Value1) + self.variant(AHIBIO0LO_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0lo::Value2) + self.variant(AHIBIO0LO_A::VALUE2) } } #[doc = "Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0hi { +pub enum AHIBIO0HI_A { #[doc = "0: Wake-up event disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0hi) -> Self { + fn from(variant: AHIBIO0HI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0HI` reader - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable"] -pub type Ahibio0hiR = crate::BitReader; -impl Ahibio0hiR { +pub type AHIBIO0HI_R = crate::BitReader; +impl AHIBIO0HI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0hi { + pub const fn variant(&self) -> AHIBIO0HI_A { match self.bits { - false => Ahibio0hi::Value1, - true => Ahibio0hi::Value2, + false => AHIBIO0HI_A::VALUE1, + true => AHIBIO0HI_A::VALUE2, } } #[doc = "Wake-up event disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0hi::Value1 + *self == AHIBIO0HI_A::VALUE1 } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0hi::Value2 + *self == AHIBIO0HI_A::VALUE2 } } #[doc = "Field `AHIBIO0HI` writer - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable"] -pub type Ahibio0hiW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0hi>; -impl<'a, REG> Ahibio0hiW<'a, REG> +pub type AHIBIO0HI_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0HI_A>; +impl<'a, REG> AHIBIO0HI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wake-up event disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0hi::Value1) + self.variant(AHIBIO0HI_A::VALUE1) } #[doc = "Wake-up event enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0hi::Value2) + self.variant(AHIBIO0HI_A::VALUE2) } } impl R { #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"] #[inline(always)] - pub fn wkpep(&self) -> WkpepR { - WkpepR::new((self.bits & 1) != 0) + pub fn wkpep(&self) -> WKPEP_R { + WKPEP_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"] #[inline(always)] - pub fn wkpen(&self) -> WkpenR { - WkpenR::new(((self.bits >> 1) & 1) != 0) + pub fn wkpen(&self) -> WKPEN_R { + WKPEN_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Wake-up on RTC Event Enable"] #[inline(always)] - pub fn rtce(&self) -> RtceR { - RtceR::new(((self.bits >> 2) & 1) != 0) + pub fn rtce(&self) -> RTCE_R { + RTCE_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ULP WDG Alarm Enable"] #[inline(always)] - pub fn ulpwdgen(&self) -> UlpwdgenR { - UlpwdgenR::new(((self.bits >> 3) & 1) != 0) + pub fn ulpwdgen(&self) -> ULPWDGEN_R { + ULPWDGEN_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hibernate Request Value Set"] #[inline(always)] - pub fn hib(&self) -> HibR { - HibR::new(((self.bits >> 4) & 1) != 0) + pub fn hib(&self) -> HIB_R { + HIB_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Multiplex Control for RTC_XTAL_1 Select as GPI Input"] #[inline(always)] - pub fn xtalgpi1sel(&self) -> Xtalgpi1selR { - Xtalgpi1selR::new(((self.bits >> 5) & 1) != 0) + pub fn xtalgpi1sel(&self) -> XTALGPI1SEL_R { + XTALGPI1SEL_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - fRTC Clock Selection"] #[inline(always)] - pub fn rcs(&self) -> RcsR { - RcsR::new(((self.bits >> 6) & 1) != 0) + pub fn rcs(&self) -> RCS_R { + RCS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - fSTDBY Clock Selection"] #[inline(always)] - pub fn stdbysel(&self) -> StdbyselR { - StdbyselR::new(((self.bits >> 7) & 1) != 0) + pub fn stdbysel(&self) -> STDBYSEL_R { + STDBYSEL_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"] #[inline(always)] - pub fn wkupsel(&self) -> WkupselR { - WkupselR::new(((self.bits >> 8) & 1) != 0) + pub fn wkupsel(&self) -> WKUPSEL_R { + WKUPSEL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 10 - General Purpose Input 0 Selection"] #[inline(always)] - pub fn gpi0sel(&self) -> Gpi0selR { - Gpi0selR::new(((self.bits >> 10) & 1) != 0) + pub fn gpi0sel(&self) -> GPI0SEL_R { + GPI0SEL_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 12 - HIBIO0 Polarity Set"] #[inline(always)] - pub fn hibio0pol(&self) -> Hibio0polR { - Hibio0polR::new(((self.bits >> 12) & 1) != 0) + pub fn hibio0pol(&self) -> HIBIO0POL_R { + HIBIO0POL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 14 - Select Analog Channel 0 or Digital Output Path"] #[inline(always)] - pub fn adig0sel(&self) -> Adig0selR { - Adig0selR::new(((self.bits >> 14) & 1) != 0) + pub fn adig0sel(&self) -> ADIG0SEL_R { + ADIG0SEL_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"] #[inline(always)] - pub fn hibio0sel(&self) -> Hibio0selR { - Hibio0selR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn hibio0sel(&self) -> HIBIO0SEL_R { + HIBIO0SEL_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 24 - Wake-Up on VBAT Falling Below Threshold Enable"] #[inline(always)] - pub fn vbatlo(&self) -> VbatloR { - VbatloR::new(((self.bits >> 24) & 1) != 0) + pub fn vbatlo(&self) -> VBATLO_R { + VBATLO_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Wake-Up on VBAT Rising Above Threshold Enable"] #[inline(always)] - pub fn vbathi(&self) -> VbathiR { - VbathiR::new(((self.bits >> 25) & 1) != 0) + pub fn vbathi(&self) -> VBATHI_R { + VBATHI_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable"] #[inline(always)] - pub fn ahibio0lo(&self) -> Ahibio0loR { - Ahibio0loR::new(((self.bits >> 26) & 1) != 0) + pub fn ahibio0lo(&self) -> AHIBIO0LO_R { + AHIBIO0LO_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable"] #[inline(always)] - pub fn ahibio0hi(&self) -> Ahibio0hiR { - Ahibio0hiR::new(((self.bits >> 27) & 1) != 0) + pub fn ahibio0hi(&self) -> AHIBIO0HI_R { + AHIBIO0HI_R::new(((self.bits >> 27) & 1) != 0) } } impl W { #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"] #[inline(always)] #[must_use] - pub fn wkpep(&mut self) -> WkpepW { - WkpepW::new(self, 0) + pub fn wkpep(&mut self) -> WKPEP_W { + WKPEP_W::new(self, 0) } #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"] #[inline(always)] #[must_use] - pub fn wkpen(&mut self) -> WkpenW { - WkpenW::new(self, 1) + pub fn wkpen(&mut self) -> WKPEN_W { + WKPEN_W::new(self, 1) } #[doc = "Bit 2 - Wake-up on RTC Event Enable"] #[inline(always)] #[must_use] - pub fn rtce(&mut self) -> RtceW { - RtceW::new(self, 2) + pub fn rtce(&mut self) -> RTCE_W { + RTCE_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Enable"] #[inline(always)] #[must_use] - pub fn ulpwdgen(&mut self) -> UlpwdgenW { - UlpwdgenW::new(self, 3) + pub fn ulpwdgen(&mut self) -> ULPWDGEN_W { + ULPWDGEN_W::new(self, 3) } #[doc = "Bit 4 - Hibernate Request Value Set"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HibW { - HibW::new(self, 4) + pub fn hib(&mut self) -> HIB_W { + HIB_W::new(self, 4) } #[doc = "Bit 5 - Multiplex Control for RTC_XTAL_1 Select as GPI Input"] #[inline(always)] #[must_use] - pub fn xtalgpi1sel(&mut self) -> Xtalgpi1selW { - Xtalgpi1selW::new(self, 5) + pub fn xtalgpi1sel(&mut self) -> XTALGPI1SEL_W { + XTALGPI1SEL_W::new(self, 5) } #[doc = "Bit 6 - fRTC Clock Selection"] #[inline(always)] #[must_use] - pub fn rcs(&mut self) -> RcsW { - RcsW::new(self, 6) + pub fn rcs(&mut self) -> RCS_W { + RCS_W::new(self, 6) } #[doc = "Bit 7 - fSTDBY Clock Selection"] #[inline(always)] #[must_use] - pub fn stdbysel(&mut self) -> StdbyselW { - StdbyselW::new(self, 7) + pub fn stdbysel(&mut self) -> STDBYSEL_W { + STDBYSEL_W::new(self, 7) } #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn wkupsel(&mut self) -> WkupselW { - WkupselW::new(self, 8) + pub fn wkupsel(&mut self) -> WKUPSEL_W { + WKUPSEL_W::new(self, 8) } #[doc = "Bit 10 - General Purpose Input 0 Selection"] #[inline(always)] #[must_use] - pub fn gpi0sel(&mut self) -> Gpi0selW { - Gpi0selW::new(self, 10) + pub fn gpi0sel(&mut self) -> GPI0SEL_W { + GPI0SEL_W::new(self, 10) } #[doc = "Bit 12 - HIBIO0 Polarity Set"] #[inline(always)] #[must_use] - pub fn hibio0pol(&mut self) -> Hibio0polW { - Hibio0polW::new(self, 12) + pub fn hibio0pol(&mut self) -> HIBIO0POL_W { + HIBIO0POL_W::new(self, 12) } #[doc = "Bit 14 - Select Analog Channel 0 or Digital Output Path"] #[inline(always)] #[must_use] - pub fn adig0sel(&mut self) -> Adig0selW { - Adig0selW::new(self, 14) + pub fn adig0sel(&mut self) -> ADIG0SEL_W { + ADIG0SEL_W::new(self, 14) } #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"] #[inline(always)] #[must_use] - pub fn hibio0sel(&mut self) -> Hibio0selW { - Hibio0selW::new(self, 16) + pub fn hibio0sel(&mut self) -> HIBIO0SEL_W { + HIBIO0SEL_W::new(self, 16) } #[doc = "Bit 24 - Wake-Up on VBAT Falling Below Threshold Enable"] #[inline(always)] #[must_use] - pub fn vbatlo(&mut self) -> VbatloW { - VbatloW::new(self, 24) + pub fn vbatlo(&mut self) -> VBATLO_W { + VBATLO_W::new(self, 24) } #[doc = "Bit 25 - Wake-Up on VBAT Rising Above Threshold Enable"] #[inline(always)] #[must_use] - pub fn vbathi(&mut self) -> VbathiW { - VbathiW::new(self, 25) + pub fn vbathi(&mut self) -> VBATHI_W { + VBATHI_W::new(self, 25) } #[doc = "Bit 26 - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable"] #[inline(always)] #[must_use] - pub fn ahibio0lo(&mut self) -> Ahibio0loW { - Ahibio0loW::new(self, 26) + pub fn ahibio0lo(&mut self) -> AHIBIO0LO_W { + AHIBIO0LO_W::new(self, 26) } #[doc = "Bit 27 - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable"] #[inline(always)] #[must_use] - pub fn ahibio0hi(&mut self) -> Ahibio0hiW { - Ahibio0hiW::new(self, 27) + pub fn ahibio0hi(&mut self) -> AHIBIO0HI_W { + AHIBIO0HI_W::new(self, 27) } } #[doc = "Hibernate Domain Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HdcrSpec; -impl crate::RegisterSpec for HdcrSpec { +pub struct HDCR_SPEC; +impl crate::RegisterSpec for HDCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hdcr::R`](R) reader structure"] -impl crate::Readable for HdcrSpec {} +impl crate::Readable for HDCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`hdcr::W`](W) writer structure"] -impl crate::Writable for HdcrSpec { +impl crate::Writable for HDCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDCR to value 0x000c_2000"] -impl crate::Resettable for HdcrSpec { +impl crate::Resettable for HDCR_SPEC { const RESET_VALUE: u32 = 0x000c_2000; } diff --git a/src/scu_hibernate/hdset.rs b/src/scu_hibernate/hdset.rs index 9877170b..a23c7faf 100644 --- a/src/scu_hibernate/hdset.rs +++ b/src/scu_hibernate/hdset.rs @@ -1,315 +1,315 @@ #[doc = "Register `HDSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Wake-up Pin Event Positive Edge Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Epev { +pub enum EPEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Epev) -> Self { + fn from(variant: EPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EPEV` writer - Wake-up Pin Event Positive Edge Set"] -pub type EpevW<'a, REG> = crate::BitWriter<'a, REG, Epev>; -impl<'a, REG> EpevW<'a, REG> +pub type EPEV_W<'a, REG> = crate::BitWriter<'a, REG, EPEV_A>; +impl<'a, REG> EPEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Epev::Value1) + self.variant(EPEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Epev::Value2) + self.variant(EPEV_A::VALUE2) } } #[doc = "Wake-up Pin Event Negative Edge Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enev { +pub enum ENEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enev) -> Self { + fn from(variant: ENEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENEV` writer - Wake-up Pin Event Negative Edge Set"] -pub type EnevW<'a, REG> = crate::BitWriter<'a, REG, Enev>; -impl<'a, REG> EnevW<'a, REG> +pub type ENEV_W<'a, REG> = crate::BitWriter<'a, REG, ENEV_A>; +impl<'a, REG> ENEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Enev::Value1) + self.variant(ENEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Enev::Value2) + self.variant(ENEV_A::VALUE2) } } #[doc = "RTC Event Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rtcev { +pub enum RTCEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rtcev) -> Self { + fn from(variant: RTCEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCEV` writer - RTC Event Set"] -pub type RtcevW<'a, REG> = crate::BitWriter<'a, REG, Rtcev>; -impl<'a, REG> RtcevW<'a, REG> +pub type RTCEV_W<'a, REG> = crate::BitWriter<'a, REG, RTCEV_A>; +impl<'a, REG> RTCEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rtcev::Value1) + self.variant(RTCEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rtcev::Value2) + self.variant(RTCEV_A::VALUE2) } } #[doc = "ULP WDG Alarm Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdg { +pub enum ULPWDG_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set watchdog alarm"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdg) -> Self { + fn from(variant: ULPWDG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDG` writer - ULP WDG Alarm Set"] -pub type UlpwdgW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdg>; -impl<'a, REG> UlpwdgW<'a, REG> +pub type ULPWDG_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDG_A>; +impl<'a, REG> ULPWDG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdg::Value1) + self.variant(ULPWDG_A::VALUE1) } #[doc = "Set watchdog alarm"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdg::Value2) + self.variant(ULPWDG_A::VALUE2) } } #[doc = "Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatpev { +pub enum VBATPEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatpev) -> Self { + fn from(variant: VBATPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATPEV` writer - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Set"] -pub type VbatpevW<'a, REG> = crate::BitWriter<'a, REG, Vbatpev>; -impl<'a, REG> VbatpevW<'a, REG> +pub type VBATPEV_W<'a, REG> = crate::BitWriter<'a, REG, VBATPEV_A>; +impl<'a, REG> VBATPEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatpev::Value1) + self.variant(VBATPEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatpev::Value2) + self.variant(VBATPEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatnev { +pub enum VBATNEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatnev) -> Self { + fn from(variant: VBATNEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATNEV` writer - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Set"] -pub type VbatnevW<'a, REG> = crate::BitWriter<'a, REG, Vbatnev>; -impl<'a, REG> VbatnevW<'a, REG> +pub type VBATNEV_W<'a, REG> = crate::BitWriter<'a, REG, VBATNEV_A>; +impl<'a, REG> VBATNEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatnev::Value1) + self.variant(VBATNEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatnev::Value2) + self.variant(VBATNEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0pev { +pub enum AHIBIO0PEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0pev) -> Self { + fn from(variant: AHIBIO0PEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0PEV` writer - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Set"] -pub type Ahibio0pevW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0pev>; -impl<'a, REG> Ahibio0pevW<'a, REG> +pub type AHIBIO0PEV_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0PEV_A>; +impl<'a, REG> AHIBIO0PEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0pev::Value1) + self.variant(AHIBIO0PEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0pev::Value2) + self.variant(AHIBIO0PEV_A::VALUE2) } } #[doc = "Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0nev { +pub enum AHIBIO0NEV_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0nev) -> Self { + fn from(variant: AHIBIO0NEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0NEV` writer - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Set"] -pub type Ahibio0nevW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0nev>; -impl<'a, REG> Ahibio0nevW<'a, REG> +pub type AHIBIO0NEV_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0NEV_A>; +impl<'a, REG> AHIBIO0NEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0nev::Value1) + self.variant(AHIBIO0NEV_A::VALUE1) } #[doc = "Set wake-up event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0nev::Value2) + self.variant(AHIBIO0NEV_A::VALUE2) } } impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Set"] #[inline(always)] #[must_use] - pub fn epev(&mut self) -> EpevW { - EpevW::new(self, 0) + pub fn epev(&mut self) -> EPEV_W { + EPEV_W::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Set"] #[inline(always)] #[must_use] - pub fn enev(&mut self) -> EnevW { - EnevW::new(self, 1) + pub fn enev(&mut self) -> ENEV_W { + ENEV_W::new(self, 1) } #[doc = "Bit 2 - RTC Event Set"] #[inline(always)] #[must_use] - pub fn rtcev(&mut self) -> RtcevW { - RtcevW::new(self, 2) + pub fn rtcev(&mut self) -> RTCEV_W { + RTCEV_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Set"] #[inline(always)] #[must_use] - pub fn ulpwdg(&mut self) -> UlpwdgW { - UlpwdgW::new(self, 3) + pub fn ulpwdg(&mut self) -> ULPWDG_W { + ULPWDG_W::new(self, 3) } #[doc = "Bit 8 - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing Set"] #[inline(always)] #[must_use] - pub fn vbatpev(&mut self) -> VbatpevW { - VbatpevW::new(self, 8) + pub fn vbatpev(&mut self) -> VBATPEV_W { + VBATPEV_W::new(self, 8) } #[doc = "Bit 9 - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing Set"] #[inline(always)] #[must_use] - pub fn vbatnev(&mut self) -> VbatnevW { - VbatnevW::new(self, 9) + pub fn vbatnev(&mut self) -> VBATNEV_W { + VBATNEV_W::new(self, 9) } #[doc = "Bit 10 - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing Set"] #[inline(always)] #[must_use] - pub fn ahibio0pev(&mut self) -> Ahibio0pevW { - Ahibio0pevW::new(self, 10) + pub fn ahibio0pev(&mut self) -> AHIBIO0PEV_W { + AHIBIO0PEV_W::new(self, 10) } #[doc = "Bit 11 - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing Set"] #[inline(always)] #[must_use] - pub fn ahibio0nev(&mut self) -> Ahibio0nevW { - Ahibio0nevW::new(self, 11) + pub fn ahibio0nev(&mut self) -> AHIBIO0NEV_W { + AHIBIO0NEV_W::new(self, 11) } } #[doc = "Hibernate Domain Status Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hdset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HdsetSpec; -impl crate::RegisterSpec for HdsetSpec { +pub struct HDSET_SPEC; +impl crate::RegisterSpec for HDSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hdset::W`](W) writer structure"] -impl crate::Writable for HdsetSpec { +impl crate::Writable for HDSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HDSET to value 0"] -impl crate::Resettable for HdsetSpec { +impl crate::Resettable for HDSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hdstat.rs b/src/scu_hibernate/hdstat.rs index ed5c4ab8..de041c53 100644 --- a/src/scu_hibernate/hdstat.rs +++ b/src/scu_hibernate/hdstat.rs @@ -1,384 +1,384 @@ #[doc = "Register `HDSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Wake-up Pin Event Positive Edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Epev { +pub enum EPEV_A { #[doc = "0: Wake-up on positive edge pin event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on positive edge pin event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Epev) -> Self { + fn from(variant: EPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EPEV` reader - Wake-up Pin Event Positive Edge"] -pub type EpevR = crate::BitReader; -impl EpevR { +pub type EPEV_R = crate::BitReader; +impl EPEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Epev { + pub const fn variant(&self) -> EPEV_A { match self.bits { - false => Epev::Value1, - true => Epev::Value2, + false => EPEV_A::VALUE1, + true => EPEV_A::VALUE2, } } #[doc = "Wake-up on positive edge pin event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Epev::Value1 + *self == EPEV_A::VALUE1 } #[doc = "Wake-up on positive edge pin event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Epev::Value2 + *self == EPEV_A::VALUE2 } } #[doc = "Wake-up Pin Event Negative Edge\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Enev { +pub enum ENEV_A { #[doc = "0: Wake-up on negative edge pin event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on negative edge pin event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Enev) -> Self { + fn from(variant: ENEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENEV` reader - Wake-up Pin Event Negative Edge"] -pub type EnevR = crate::BitReader; -impl EnevR { +pub type ENEV_R = crate::BitReader; +impl ENEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Enev { + pub const fn variant(&self) -> ENEV_A { match self.bits { - false => Enev::Value1, - true => Enev::Value2, + false => ENEV_A::VALUE1, + true => ENEV_A::VALUE2, } } #[doc = "Wake-up on negative edge pin event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Enev::Value1 + *self == ENEV_A::VALUE1 } #[doc = "Wake-up on negative edge pin event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Enev::Value2 + *self == ENEV_A::VALUE2 } } #[doc = "RTC Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rtcev { +pub enum RTCEV_A { #[doc = "0: Wake-up on RTC event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on RTC event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rtcev) -> Self { + fn from(variant: RTCEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTCEV` reader - RTC Event"] -pub type RtcevR = crate::BitReader; -impl RtcevR { +pub type RTCEV_R = crate::BitReader; +impl RTCEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rtcev { + pub const fn variant(&self) -> RTCEV_A { match self.bits { - false => Rtcev::Value1, - true => Rtcev::Value2, + false => RTCEV_A::VALUE1, + true => RTCEV_A::VALUE2, } } #[doc = "Wake-up on RTC event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rtcev::Value1 + *self == RTCEV_A::VALUE1 } #[doc = "Wake-up on RTC event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rtcev::Value2 + *self == RTCEV_A::VALUE2 } } #[doc = "ULP WDG Alarm Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdg { +pub enum ULPWDG_A { #[doc = "0: Watchdog alarm did not occur"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Watchdog alarm occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdg) -> Self { + fn from(variant: ULPWDG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDG` reader - ULP WDG Alarm Status"] -pub type UlpwdgR = crate::BitReader; -impl UlpwdgR { +pub type ULPWDG_R = crate::BitReader; +impl ULPWDG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ulpwdg { + pub const fn variant(&self) -> ULPWDG_A { match self.bits { - false => Ulpwdg::Value1, - true => Ulpwdg::Value2, + false => ULPWDG_A::VALUE1, + true => ULPWDG_A::VALUE2, } } #[doc = "Watchdog alarm did not occur"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ulpwdg::Value1 + *self == ULPWDG_A::VALUE1 } #[doc = "Watchdog alarm occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ulpwdg::Value2 + *self == ULPWDG_A::VALUE2 } } #[doc = "Hibernate Control Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibnout { +pub enum HIBNOUT_A { #[doc = "0: Hibernate not driven active to pads"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hibernate driven active to pads"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibnout) -> Self { + fn from(variant: HIBNOUT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBNOUT` reader - Hibernate Control Status"] -pub type HibnoutR = crate::BitReader; -impl HibnoutR { +pub type HIBNOUT_R = crate::BitReader; +impl HIBNOUT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hibnout { + pub const fn variant(&self) -> HIBNOUT_A { match self.bits { - false => Hibnout::Value1, - true => Hibnout::Value2, + false => HIBNOUT_A::VALUE1, + true => HIBNOUT_A::VALUE2, } } #[doc = "Hibernate not driven active to pads"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibnout::Value1 + *self == HIBNOUT_A::VALUE1 } #[doc = "Hibernate driven active to pads"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibnout::Value2 + *self == HIBNOUT_A::VALUE2 } } #[doc = "Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatpev { +pub enum VBATPEV_A { #[doc = "0: Wake-up on rising above threshold event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on rising above threshold event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatpev) -> Self { + fn from(variant: VBATPEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATPEV` reader - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing"] -pub type VbatpevR = crate::BitReader; -impl VbatpevR { +pub type VBATPEV_R = crate::BitReader; +impl VBATPEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbatpev { + pub const fn variant(&self) -> VBATPEV_A { match self.bits { - false => Vbatpev::Value1, - true => Vbatpev::Value2, + false => VBATPEV_A::VALUE1, + true => VBATPEV_A::VALUE2, } } #[doc = "Wake-up on rising above threshold event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbatpev::Value1 + *self == VBATPEV_A::VALUE1 } #[doc = "Wake-up on rising above threshold event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbatpev::Value2 + *self == VBATPEV_A::VALUE2 } } #[doc = "Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatnev { +pub enum VBATNEV_A { #[doc = "0: Wake-up on falling below threshold event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on falling below threshold event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatnev) -> Self { + fn from(variant: VBATNEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATNEV` reader - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing"] -pub type VbatnevR = crate::BitReader; -impl VbatnevR { +pub type VBATNEV_R = crate::BitReader; +impl VBATNEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbatnev { + pub const fn variant(&self) -> VBATNEV_A { match self.bits { - false => Vbatnev::Value1, - true => Vbatnev::Value2, + false => VBATNEV_A::VALUE1, + true => VBATNEV_A::VALUE2, } } #[doc = "Wake-up on falling below threshold event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbatnev::Value1 + *self == VBATNEV_A::VALUE1 } #[doc = "Wake-up on falling below threshold event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbatnev::Value2 + *self == VBATNEV_A::VALUE2 } } #[doc = "Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0pev { +pub enum AHIBIO0PEV_A { #[doc = "0: Wake-up on rising above threshold event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on rising above threshold event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0pev) -> Self { + fn from(variant: AHIBIO0PEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0PEV` reader - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing"] -pub type Ahibio0pevR = crate::BitReader; -impl Ahibio0pevR { +pub type AHIBIO0PEV_R = crate::BitReader; +impl AHIBIO0PEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0pev { + pub const fn variant(&self) -> AHIBIO0PEV_A { match self.bits { - false => Ahibio0pev::Value1, - true => Ahibio0pev::Value2, + false => AHIBIO0PEV_A::VALUE1, + true => AHIBIO0PEV_A::VALUE2, } } #[doc = "Wake-up on rising above threshold event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0pev::Value1 + *self == AHIBIO0PEV_A::VALUE1 } #[doc = "Wake-up on rising above threshold event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0pev::Value2 + *self == AHIBIO0PEV_A::VALUE2 } } #[doc = "Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0nev { +pub enum AHIBIO0NEV_A { #[doc = "0: Wake-up on falling below threshold event inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up on falling below threshold event active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0nev) -> Self { + fn from(variant: AHIBIO0NEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0NEV` reader - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing"] -pub type Ahibio0nevR = crate::BitReader; -impl Ahibio0nevR { +pub type AHIBIO0NEV_R = crate::BitReader; +impl AHIBIO0NEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0nev { + pub const fn variant(&self) -> AHIBIO0NEV_A { match self.bits { - false => Ahibio0nev::Value1, - true => Ahibio0nev::Value2, + false => AHIBIO0NEV_A::VALUE1, + true => AHIBIO0NEV_A::VALUE2, } } #[doc = "Wake-up on falling below threshold event inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0nev::Value1 + *self == AHIBIO0NEV_A::VALUE1 } #[doc = "Wake-up on falling below threshold event active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0nev::Value2 + *self == AHIBIO0NEV_A::VALUE2 } } impl R { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge"] #[inline(always)] - pub fn epev(&self) -> EpevR { - EpevR::new((self.bits & 1) != 0) + pub fn epev(&self) -> EPEV_R { + EPEV_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge"] #[inline(always)] - pub fn enev(&self) -> EnevR { - EnevR::new(((self.bits >> 1) & 1) != 0) + pub fn enev(&self) -> ENEV_R { + ENEV_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Event"] #[inline(always)] - pub fn rtcev(&self) -> RtcevR { - RtcevR::new(((self.bits >> 2) & 1) != 0) + pub fn rtcev(&self) -> RTCEV_R { + RTCEV_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - ULP WDG Alarm Status"] #[inline(always)] - pub fn ulpwdg(&self) -> UlpwdgR { - UlpwdgR::new(((self.bits >> 3) & 1) != 0) + pub fn ulpwdg(&self) -> ULPWDG_R { + ULPWDG_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hibernate Control Status"] #[inline(always)] - pub fn hibnout(&self) -> HibnoutR { - HibnoutR::new(((self.bits >> 4) & 1) != 0) + pub fn hibnout(&self) -> HIBNOUT_R { + HIBNOUT_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 8 - Wake-Up on LPAC Positive Edge of VBAT Threshold Crossing"] #[inline(always)] - pub fn vbatpev(&self) -> VbatpevR { - VbatpevR::new(((self.bits >> 8) & 1) != 0) + pub fn vbatpev(&self) -> VBATPEV_R { + VBATPEV_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Wake-Up on LPAC Negative Edge of VBAT Threshold Crossing"] #[inline(always)] - pub fn vbatnev(&self) -> VbatnevR { - VbatnevR::new(((self.bits >> 9) & 1) != 0) + pub fn vbatnev(&self) -> VBATNEV_R { + VBATNEV_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Wake-Up on LPAC Positive Edge of HIB_IO_0 Threshold Crossing"] #[inline(always)] - pub fn ahibio0pev(&self) -> Ahibio0pevR { - Ahibio0pevR::new(((self.bits >> 10) & 1) != 0) + pub fn ahibio0pev(&self) -> AHIBIO0PEV_R { + AHIBIO0PEV_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Wake-Up on LPAC Negative Edge of HIB_IO_0 Threshold Crossing"] #[inline(always)] - pub fn ahibio0nev(&self) -> Ahibio0nevR { - Ahibio0nevR::new(((self.bits >> 11) & 1) != 0) + pub fn ahibio0nev(&self) -> AHIBIO0NEV_R { + AHIBIO0NEV_R::new(((self.bits >> 11) & 1) != 0) } } #[doc = "Hibernate Domain Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hdstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HdstatSpec; -impl crate::RegisterSpec for HdstatSpec { +pub struct HDSTAT_SPEC; +impl crate::RegisterSpec for HDSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hdstat::R`](R) reader structure"] -impl crate::Readable for HdstatSpec {} +impl crate::Readable for HDSTAT_SPEC {} #[doc = "`reset()` method sets HDSTAT to value 0"] -impl crate::Resettable for HdstatSpec { +impl crate::Resettable for HDSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hintclr.rs b/src/scu_hibernate/hintclr.rs index 1f6b28ab..36572bc7 100644 --- a/src/scu_hibernate/hintclr.rs +++ b/src/scu_hibernate/hintclr.rs @@ -1,212 +1,212 @@ #[doc = "Register `HINTCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Internally Controlled Hibernate Sequence Request Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibnint { +pub enum HIBNINT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hibernate bit clear"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibnint) -> Self { + fn from(variant: HIBNINT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBNINT` writer - Internally Controlled Hibernate Sequence Request Clear"] -pub type HibnintW<'a, REG> = crate::BitWriter<'a, REG, Hibnint>; -impl<'a, REG> HibnintW<'a, REG> +pub type HIBNINT_W<'a, REG> = crate::BitWriter<'a, REG, HIBNINT_A>; +impl<'a, REG> HIBNINT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibnint::Value1) + self.variant(HIBNINT_A::VALUE1) } #[doc = "Hibernate bit clear"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibnint::Value2) + self.variant(HIBNINT_A::VALUE2) } } #[doc = "VDDP Supply Switch of Flash Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashoff { +pub enum FLASHOFF_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Switch on VDDP supply of Flash"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashoff) -> Self { + fn from(variant: FLASHOFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHOFF` writer - VDDP Supply Switch of Flash Clear"] -pub type FlashoffW<'a, REG> = crate::BitWriter<'a, REG, Flashoff>; -impl<'a, REG> FlashoffW<'a, REG> +pub type FLASHOFF_W<'a, REG> = crate::BitWriter<'a, REG, FLASHOFF_A>; +impl<'a, REG> FLASHOFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flashoff::Value1) + self.variant(FLASHOFF_A::VALUE1) } #[doc = "Switch on VDDP supply of Flash"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flashoff::Value2) + self.variant(FLASHOFF_A::VALUE2) } } #[doc = "Flash Power Down Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashpd { +pub enum FLASHPD_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash power down mode leave request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashpd) -> Self { + fn from(variant: FLASHPD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHPD` writer - Flash Power Down Clear"] -pub type FlashpdW<'a, REG> = crate::BitWriter<'a, REG, Flashpd>; -impl<'a, REG> FlashpdW<'a, REG> +pub type FLASHPD_W<'a, REG> = crate::BitWriter<'a, REG, FLASHPD_A>; +impl<'a, REG> FLASHPD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flashpd::Value1) + self.variant(FLASHPD_A::VALUE1) } #[doc = "Flash power down mode leave request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flashpd::Value2) + self.variant(FLASHPD_A::VALUE2) } } #[doc = "PORST Pull-up OFF Direct Control Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffd { +pub enum POFFD_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up on"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffd) -> Self { + fn from(variant: POFFD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFD` writer - PORST Pull-up OFF Direct Control Clear"] -pub type PoffdW<'a, REG> = crate::BitWriter<'a, REG, Poffd>; -impl<'a, REG> PoffdW<'a, REG> +pub type POFFD_W<'a, REG> = crate::BitWriter<'a, REG, POFFD_A>; +impl<'a, REG> POFFD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Poffd::Value1) + self.variant(POFFD_A::VALUE1) } #[doc = "Pull-up on"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Poffd::Value2) + self.variant(POFFD_A::VALUE2) } } #[doc = "Field `PPODEL` writer - Delay on PORTS Pull-up Switching OFF on Hibernate Request Clear"] -pub type PpodelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PPODEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "PORST Pull-up OFF in Hibernate Mode Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffh { +pub enum POFFH_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up on"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffh) -> Self { + fn from(variant: POFFH_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFH` writer - PORST Pull-up OFF in Hibernate Mode Clear"] -pub type PoffhW<'a, REG> = crate::BitWriter<'a, REG, Poffh>; -impl<'a, REG> PoffhW<'a, REG> +pub type POFFH_W<'a, REG> = crate::BitWriter<'a, REG, POFFH_A>; +impl<'a, REG> POFFH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Poffh::Value1) + self.variant(POFFH_A::VALUE1) } #[doc = "Pull-up on"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Poffh::Value2) + self.variant(POFFH_A::VALUE2) } } impl W { #[doc = "Bit 0 - Internally Controlled Hibernate Sequence Request Clear"] #[inline(always)] #[must_use] - pub fn hibnint(&mut self) -> HibnintW { - HibnintW::new(self, 0) + pub fn hibnint(&mut self) -> HIBNINT_W { + HIBNINT_W::new(self, 0) } #[doc = "Bit 2 - VDDP Supply Switch of Flash Clear"] #[inline(always)] #[must_use] - pub fn flashoff(&mut self) -> FlashoffW { - FlashoffW::new(self, 2) + pub fn flashoff(&mut self) -> FLASHOFF_W { + FLASHOFF_W::new(self, 2) } #[doc = "Bit 3 - Flash Power Down Clear"] #[inline(always)] #[must_use] - pub fn flashpd(&mut self) -> FlashpdW { - FlashpdW::new(self, 3) + pub fn flashpd(&mut self) -> FLASHPD_W { + FLASHPD_W::new(self, 3) } #[doc = "Bit 4 - PORST Pull-up OFF Direct Control Clear"] #[inline(always)] #[must_use] - pub fn poffd(&mut self) -> PoffdW { - PoffdW::new(self, 4) + pub fn poffd(&mut self) -> POFFD_W { + POFFD_W::new(self, 4) } #[doc = "Bits 16:17 - Delay on PORTS Pull-up Switching OFF on Hibernate Request Clear"] #[inline(always)] #[must_use] - pub fn ppodel(&mut self) -> PpodelW { - PpodelW::new(self, 16) + pub fn ppodel(&mut self) -> PPODEL_W { + PPODEL_W::new(self, 16) } #[doc = "Bit 20 - PORST Pull-up OFF in Hibernate Mode Clear"] #[inline(always)] #[must_use] - pub fn poffh(&mut self) -> PoffhW { - PoffhW::new(self, 20) + pub fn poffh(&mut self) -> POFFH_W { + POFFH_W::new(self, 20) } } #[doc = "Hibernate Internal Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HintclrSpec; -impl crate::RegisterSpec for HintclrSpec { +pub struct HINTCLR_SPEC; +impl crate::RegisterSpec for HINTCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hintclr::W`](W) writer structure"] -impl crate::Writable for HintclrSpec { +impl crate::Writable for HINTCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HINTCLR to value 0"] -impl crate::Resettable for HintclrSpec { +impl crate::Resettable for HINTCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hintset.rs b/src/scu_hibernate/hintset.rs index a35dadee..1302f4aa 100644 --- a/src/scu_hibernate/hintset.rs +++ b/src/scu_hibernate/hintset.rs @@ -1,249 +1,249 @@ #[doc = "Register `HINTSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Internally Controlled Hibernate Sequence Request Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibnint { +pub enum HIBNINT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hardware controlled hibernate sequence request active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibnint) -> Self { + fn from(variant: HIBNINT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBNINT` writer - Internally Controlled Hibernate Sequence Request Set"] -pub type HibnintW<'a, REG> = crate::BitWriter<'a, REG, Hibnint>; -impl<'a, REG> HibnintW<'a, REG> +pub type HIBNINT_W<'a, REG> = crate::BitWriter<'a, REG, HIBNINT_A>; +impl<'a, REG> HIBNINT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibnint::Value1) + self.variant(HIBNINT_A::VALUE1) } #[doc = "Hardware controlled hibernate sequence request active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibnint::Value2) + self.variant(HIBNINT_A::VALUE2) } } #[doc = "VDDC Generation off on EVR Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcoreoff { +pub enum VCOREOFF_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: VDDC off to EVR set"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcoreoff) -> Self { + fn from(variant: VCOREOFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOREOFF` writer - VDDC Generation off on EVR Set"] -pub type VcoreoffW<'a, REG> = crate::BitWriter<'a, REG, Vcoreoff>; -impl<'a, REG> VcoreoffW<'a, REG> +pub type VCOREOFF_W<'a, REG> = crate::BitWriter<'a, REG, VCOREOFF_A>; +impl<'a, REG> VCOREOFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcoreoff::Value1) + self.variant(VCOREOFF_A::VALUE1) } #[doc = "VDDC off to EVR set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcoreoff::Value2) + self.variant(VCOREOFF_A::VALUE2) } } #[doc = "VDDP Supply Switch of Flash Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashoff { +pub enum FLASHOFF_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Switch off VDDP supply of Flash"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashoff) -> Self { + fn from(variant: FLASHOFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHOFF` writer - VDDP Supply Switch of Flash Set"] -pub type FlashoffW<'a, REG> = crate::BitWriter<'a, REG, Flashoff>; -impl<'a, REG> FlashoffW<'a, REG> +pub type FLASHOFF_W<'a, REG> = crate::BitWriter<'a, REG, FLASHOFF_A>; +impl<'a, REG> FLASHOFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flashoff::Value1) + self.variant(FLASHOFF_A::VALUE1) } #[doc = "Switch off VDDP supply of Flash"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flashoff::Value2) + self.variant(FLASHOFF_A::VALUE2) } } #[doc = "Flash Power Down Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashpd { +pub enum FLASHPD_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flash power down mode request set"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashpd) -> Self { + fn from(variant: FLASHPD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHPD` writer - Flash Power Down Set"] -pub type FlashpdW<'a, REG> = crate::BitWriter<'a, REG, Flashpd>; -impl<'a, REG> FlashpdW<'a, REG> +pub type FLASHPD_W<'a, REG> = crate::BitWriter<'a, REG, FLASHPD_A>; +impl<'a, REG> FLASHPD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flashpd::Value1) + self.variant(FLASHPD_A::VALUE1) } #[doc = "Flash power down mode request set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flashpd::Value2) + self.variant(FLASHPD_A::VALUE2) } } #[doc = "PORST Pull-up OFF Direct Control Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffd { +pub enum POFFD_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up off"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffd) -> Self { + fn from(variant: POFFD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFD` writer - PORST Pull-up OFF Direct Control Set"] -pub type PoffdW<'a, REG> = crate::BitWriter<'a, REG, Poffd>; -impl<'a, REG> PoffdW<'a, REG> +pub type POFFD_W<'a, REG> = crate::BitWriter<'a, REG, POFFD_A>; +impl<'a, REG> POFFD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Poffd::Value1) + self.variant(POFFD_A::VALUE1) } #[doc = "Pull-up off"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Poffd::Value2) + self.variant(POFFD_A::VALUE2) } } #[doc = "Field `PPODEL` writer - Delay on PORTS Pull-up Switching OFF on Hibernate Request Set"] -pub type PpodelW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PPODEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "PORST Pull-up OFF in Hibernate Mode Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffh { +pub enum POFFH_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up off"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffh) -> Self { + fn from(variant: POFFH_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFH` writer - PORST Pull-up OFF in Hibernate Mode Set"] -pub type PoffhW<'a, REG> = crate::BitWriter<'a, REG, Poffh>; -impl<'a, REG> PoffhW<'a, REG> +pub type POFFH_W<'a, REG> = crate::BitWriter<'a, REG, POFFH_A>; +impl<'a, REG> POFFH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Poffh::Value1) + self.variant(POFFH_A::VALUE1) } #[doc = "Pull-up off"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Poffh::Value2) + self.variant(POFFH_A::VALUE2) } } impl W { #[doc = "Bit 0 - Internally Controlled Hibernate Sequence Request Set"] #[inline(always)] #[must_use] - pub fn hibnint(&mut self) -> HibnintW { - HibnintW::new(self, 0) + pub fn hibnint(&mut self) -> HIBNINT_W { + HIBNINT_W::new(self, 0) } #[doc = "Bit 1 - VDDC Generation off on EVR Set"] #[inline(always)] #[must_use] - pub fn vcoreoff(&mut self) -> VcoreoffW { - VcoreoffW::new(self, 1) + pub fn vcoreoff(&mut self) -> VCOREOFF_W { + VCOREOFF_W::new(self, 1) } #[doc = "Bit 2 - VDDP Supply Switch of Flash Set"] #[inline(always)] #[must_use] - pub fn flashoff(&mut self) -> FlashoffW { - FlashoffW::new(self, 2) + pub fn flashoff(&mut self) -> FLASHOFF_W { + FLASHOFF_W::new(self, 2) } #[doc = "Bit 3 - Flash Power Down Set"] #[inline(always)] #[must_use] - pub fn flashpd(&mut self) -> FlashpdW { - FlashpdW::new(self, 3) + pub fn flashpd(&mut self) -> FLASHPD_W { + FLASHPD_W::new(self, 3) } #[doc = "Bit 4 - PORST Pull-up OFF Direct Control Set"] #[inline(always)] #[must_use] - pub fn poffd(&mut self) -> PoffdW { - PoffdW::new(self, 4) + pub fn poffd(&mut self) -> POFFD_W { + POFFD_W::new(self, 4) } #[doc = "Bits 16:17 - Delay on PORTS Pull-up Switching OFF on Hibernate Request Set"] #[inline(always)] #[must_use] - pub fn ppodel(&mut self) -> PpodelW { - PpodelW::new(self, 16) + pub fn ppodel(&mut self) -> PPODEL_W { + PPODEL_W::new(self, 16) } #[doc = "Bit 20 - PORST Pull-up OFF in Hibernate Mode Set"] #[inline(always)] #[must_use] - pub fn poffh(&mut self) -> PoffhW { - PoffhW::new(self, 20) + pub fn poffh(&mut self) -> POFFH_W { + POFFH_W::new(self, 20) } } #[doc = "Hibernate Internal Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hintset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HintsetSpec; -impl crate::RegisterSpec for HintsetSpec { +pub struct HINTSET_SPEC; +impl crate::RegisterSpec for HINTSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`hintset::W`](W) writer structure"] -impl crate::Writable for HintsetSpec { +impl crate::Writable for HINTSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets HINTSET to value 0"] -impl crate::Resettable for HintsetSpec { +impl crate::Resettable for HINTSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/hintst.rs b/src/scu_hibernate/hintst.rs index 86e551eb..2bcda130 100644 --- a/src/scu_hibernate/hintst.rs +++ b/src/scu_hibernate/hintst.rs @@ -1,227 +1,227 @@ #[doc = "Register `HINTST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Internally Controlled Hibernate Sequence Request State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibnint { +pub enum HIBNINT_A { #[doc = "0: Hibernate not entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hibernate entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibnint) -> Self { + fn from(variant: HIBNINT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBNINT` reader - Internally Controlled Hibernate Sequence Request State"] -pub type HibnintR = crate::BitReader; -impl HibnintR { +pub type HIBNINT_R = crate::BitReader; +impl HIBNINT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hibnint { + pub const fn variant(&self) -> HIBNINT_A { match self.bits { - false => Hibnint::Value1, - true => Hibnint::Value2, + false => HIBNINT_A::VALUE1, + true => HIBNINT_A::VALUE2, } } #[doc = "Hibernate not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibnint::Value1 + *self == HIBNINT_A::VALUE1 } #[doc = "Hibernate entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibnint::Value2 + *self == HIBNINT_A::VALUE2 } } #[doc = "VDDP Supply Switch of Flash State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashoff { +pub enum FLASHOFF_A { #[doc = "0: VDDP supply of Flash switched on"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: VDDP supply of Flash switched off"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashoff) -> Self { + fn from(variant: FLASHOFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHOFF` reader - VDDP Supply Switch of Flash State"] -pub type FlashoffR = crate::BitReader; -impl FlashoffR { +pub type FLASHOFF_R = crate::BitReader; +impl FLASHOFF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Flashoff { + pub const fn variant(&self) -> FLASHOFF_A { match self.bits { - false => Flashoff::Value1, - true => Flashoff::Value2, + false => FLASHOFF_A::VALUE1, + true => FLASHOFF_A::VALUE2, } } #[doc = "VDDP supply of Flash switched on"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Flashoff::Value1 + *self == FLASHOFF_A::VALUE1 } #[doc = "VDDP supply of Flash switched off"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Flashoff::Value2 + *self == FLASHOFF_A::VALUE2 } } #[doc = "Flash Power Down State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flashpd { +pub enum FLASHPD_A { #[doc = "0: Normal mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Power down mode effectively entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flashpd) -> Self { + fn from(variant: FLASHPD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLASHPD` reader - Flash Power Down State"] -pub type FlashpdR = crate::BitReader; -impl FlashpdR { +pub type FLASHPD_R = crate::BitReader; +impl FLASHPD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Flashpd { + pub const fn variant(&self) -> FLASHPD_A { match self.bits { - false => Flashpd::Value1, - true => Flashpd::Value2, + false => FLASHPD_A::VALUE1, + true => FLASHPD_A::VALUE2, } } #[doc = "Normal mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Flashpd::Value1 + *self == FLASHPD_A::VALUE1 } #[doc = "Power down mode effectively entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Flashpd::Value2 + *self == FLASHPD_A::VALUE2 } } #[doc = "PORST Pull-up OFF Direct Control State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffd { +pub enum POFFD_A { #[doc = "0: Pull-up on"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up off"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffd) -> Self { + fn from(variant: POFFD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFD` reader - PORST Pull-up OFF Direct Control State"] -pub type PoffdR = crate::BitReader; -impl PoffdR { +pub type POFFD_R = crate::BitReader; +impl POFFD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Poffd { + pub const fn variant(&self) -> POFFD_A { match self.bits { - false => Poffd::Value1, - true => Poffd::Value2, + false => POFFD_A::VALUE1, + true => POFFD_A::VALUE2, } } #[doc = "Pull-up on"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Poffd::Value1 + *self == POFFD_A::VALUE1 } #[doc = "Pull-up off"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Poffd::Value2 + *self == POFFD_A::VALUE2 } } #[doc = "Field `PPODEL` reader - Delay on PORTS Pull-up Switching OFF on Hibernate Request"] -pub type PpodelR = crate::FieldReader; +pub type PPODEL_R = crate::FieldReader; #[doc = "PORST Pull-up OFF in Hibernate Mode State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Poffh { +pub enum POFFH_A { #[doc = "0: Pull-up on"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up off"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Poffh) -> Self { + fn from(variant: POFFH_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POFFH` reader - PORST Pull-up OFF in Hibernate Mode State"] -pub type PoffhR = crate::BitReader; -impl PoffhR { +pub type POFFH_R = crate::BitReader; +impl POFFH_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Poffh { + pub const fn variant(&self) -> POFFH_A { match self.bits { - false => Poffh::Value1, - true => Poffh::Value2, + false => POFFH_A::VALUE1, + true => POFFH_A::VALUE2, } } #[doc = "Pull-up on"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Poffh::Value1 + *self == POFFH_A::VALUE1 } #[doc = "Pull-up off"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Poffh::Value2 + *self == POFFH_A::VALUE2 } } impl R { #[doc = "Bit 0 - Internally Controlled Hibernate Sequence Request State"] #[inline(always)] - pub fn hibnint(&self) -> HibnintR { - HibnintR::new((self.bits & 1) != 0) + pub fn hibnint(&self) -> HIBNINT_R { + HIBNINT_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - VDDP Supply Switch of Flash State"] #[inline(always)] - pub fn flashoff(&self) -> FlashoffR { - FlashoffR::new(((self.bits >> 2) & 1) != 0) + pub fn flashoff(&self) -> FLASHOFF_R { + FLASHOFF_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Flash Power Down State"] #[inline(always)] - pub fn flashpd(&self) -> FlashpdR { - FlashpdR::new(((self.bits >> 3) & 1) != 0) + pub fn flashpd(&self) -> FLASHPD_R { + FLASHPD_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - PORST Pull-up OFF Direct Control State"] #[inline(always)] - pub fn poffd(&self) -> PoffdR { - PoffdR::new(((self.bits >> 4) & 1) != 0) + pub fn poffd(&self) -> POFFD_R { + POFFD_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 16:17 - Delay on PORTS Pull-up Switching OFF on Hibernate Request"] #[inline(always)] - pub fn ppodel(&self) -> PpodelR { - PpodelR::new(((self.bits >> 16) & 3) as u8) + pub fn ppodel(&self) -> PPODEL_R { + PPODEL_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 20 - PORST Pull-up OFF in Hibernate Mode State"] #[inline(always)] - pub fn poffh(&self) -> PoffhR { - PoffhR::new(((self.bits >> 20) & 1) != 0) + pub fn poffh(&self) -> POFFH_R { + POFFH_R::new(((self.bits >> 20) & 1) != 0) } } #[doc = "Hibernate Internal Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hintst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct HintstSpec; -impl crate::RegisterSpec for HintstSpec { +pub struct HINTST_SPEC; +impl crate::RegisterSpec for HINTST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`hintst::R`](R) reader structure"] -impl crate::Readable for HintstSpec {} +impl crate::Readable for HINTST_SPEC {} #[doc = "`reset()` method sets HINTST to value 0"] -impl crate::Resettable for HintstSpec { +impl crate::Resettable for HINTST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/lpacclr.rs b/src/scu_hibernate/lpacclr.rs index bdc1532d..70fa9c81 100644 --- a/src/scu_hibernate/lpacclr.rs +++ b/src/scu_hibernate/lpacclr.rs @@ -1,167 +1,167 @@ #[doc = "Register `LPACCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Trigger VBAT Single Compare Operation Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatscmp { +pub enum VBATSCMP_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the sticky bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatscmp) -> Self { + fn from(variant: VBATSCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATSCMP` writer - Trigger VBAT Single Compare Operation Clear"] -pub type VbatscmpW<'a, REG> = crate::BitWriter<'a, REG, Vbatscmp>; -impl<'a, REG> VbatscmpW<'a, REG> +pub type VBATSCMP_W<'a, REG> = crate::BitWriter<'a, REG, VBATSCMP_A>; +impl<'a, REG> VBATSCMP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatscmp::Value1) + self.variant(VBATSCMP_A::VALUE1) } #[doc = "Clear the sticky bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatscmp::Value2) + self.variant(VBATSCMP_A::VALUE2) } } #[doc = "Trigger HIB_IO_0 Input Single Compare Operation Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0scmp { +pub enum AHIBIO0SCMP_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the sticky bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0scmp) -> Self { + fn from(variant: AHIBIO0SCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0SCMP` writer - Trigger HIB_IO_0 Input Single Compare Operation Clear"] -pub type Ahibio0scmpW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0scmp>; -impl<'a, REG> Ahibio0scmpW<'a, REG> +pub type AHIBIO0SCMP_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0SCMP_A>; +impl<'a, REG> AHIBIO0SCMP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0scmp::Value1) + self.variant(AHIBIO0SCMP_A::VALUE1) } #[doc = "Clear the sticky bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0scmp::Value2) + self.variant(AHIBIO0SCMP_A::VALUE2) } } #[doc = "VBAT Compare Operation Initial Value Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatval { +pub enum VBATVAL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Below programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatval) -> Self { + fn from(variant: VBATVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATVAL` writer - VBAT Compare Operation Initial Value Clear"] -pub type VbatvalW<'a, REG> = crate::BitWriter<'a, REG, Vbatval>; -impl<'a, REG> VbatvalW<'a, REG> +pub type VBATVAL_W<'a, REG> = crate::BitWriter<'a, REG, VBATVAL_A>; +impl<'a, REG> VBATVAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatval::Value1) + self.variant(VBATVAL_A::VALUE1) } #[doc = "Below programmed threshold"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatval::Value2) + self.variant(VBATVAL_A::VALUE2) } } #[doc = "HIB_IO_0 Input Compare Initial Value Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0val { +pub enum AHIBIO0VAL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Below programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0val) -> Self { + fn from(variant: AHIBIO0VAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0VAL` writer - HIB_IO_0 Input Compare Initial Value Clear"] -pub type Ahibio0valW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0val>; -impl<'a, REG> Ahibio0valW<'a, REG> +pub type AHIBIO0VAL_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0VAL_A>; +impl<'a, REG> AHIBIO0VAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0val::Value1) + self.variant(AHIBIO0VAL_A::VALUE1) } #[doc = "Below programmed threshold"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0val::Value2) + self.variant(AHIBIO0VAL_A::VALUE2) } } impl W { #[doc = "Bit 0 - Trigger VBAT Single Compare Operation Clear"] #[inline(always)] #[must_use] - pub fn vbatscmp(&mut self) -> VbatscmpW { - VbatscmpW::new(self, 0) + pub fn vbatscmp(&mut self) -> VBATSCMP_W { + VBATSCMP_W::new(self, 0) } #[doc = "Bit 1 - Trigger HIB_IO_0 Input Single Compare Operation Clear"] #[inline(always)] #[must_use] - pub fn ahibio0scmp(&mut self) -> Ahibio0scmpW { - Ahibio0scmpW::new(self, 1) + pub fn ahibio0scmp(&mut self) -> AHIBIO0SCMP_W { + AHIBIO0SCMP_W::new(self, 1) } #[doc = "Bit 16 - VBAT Compare Operation Initial Value Clear"] #[inline(always)] #[must_use] - pub fn vbatval(&mut self) -> VbatvalW { - VbatvalW::new(self, 16) + pub fn vbatval(&mut self) -> VBATVAL_W { + VBATVAL_W::new(self, 16) } #[doc = "Bit 17 - HIB_IO_0 Input Compare Initial Value Clear"] #[inline(always)] #[must_use] - pub fn ahibio0val(&mut self) -> Ahibio0valW { - Ahibio0valW::new(self, 17) + pub fn ahibio0val(&mut self) -> AHIBIO0VAL_W { + AHIBIO0VAL_W::new(self, 17) } } #[doc = "LPAC Control Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LpacclrSpec; -impl crate::RegisterSpec for LpacclrSpec { +pub struct LPACCLR_SPEC; +impl crate::RegisterSpec for LPACCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`lpacclr::W`](W) writer structure"] -impl crate::Writable for LpacclrSpec { +impl crate::Writable for LPACCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPACCLR to value 0"] -impl crate::Resettable for LpacclrSpec { +impl crate::Resettable for LPACCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/lpacconf.rs b/src/scu_hibernate/lpacconf.rs index 55a7faf4..2ef28484 100644 --- a/src/scu_hibernate/lpacconf.rs +++ b/src/scu_hibernate/lpacconf.rs @@ -1,68 +1,68 @@ #[doc = "Register `LPACCONF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LPACCONF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Compare Enable for Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cmpen { +pub enum CMPEN_A { #[doc = "0: Comparator permanently in power down"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Comparator activated for VBAT input"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Comparator activated for HIB_IO_0 input"] - Value3 = 2, + VALUE3 = 2, #[doc = "4: Comparator activated for HIB_IO_1 input"] - Value4 = 4, + VALUE4 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cmpen) -> Self { + fn from(variant: CMPEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cmpen { +impl crate::FieldSpec for CMPEN_A { type Ux = u8; } -impl crate::IsEnum for Cmpen {} +impl crate::IsEnum for CMPEN_A {} #[doc = "Field `CMPEN` reader - Compare Enable for Input Selection"] -pub type CmpenR = crate::FieldReader; -impl CmpenR { +pub type CMPEN_R = crate::FieldReader; +impl CMPEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cmpen::Value1), - 1 => Some(Cmpen::Value2), - 2 => Some(Cmpen::Value3), - 4 => Some(Cmpen::Value4), + 0 => Some(CMPEN_A::VALUE1), + 1 => Some(CMPEN_A::VALUE2), + 2 => Some(CMPEN_A::VALUE3), + 4 => Some(CMPEN_A::VALUE4), _ => None, } } #[doc = "Comparator permanently in power down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cmpen::Value1 + *self == CMPEN_A::VALUE1 } #[doc = "Comparator activated for VBAT input"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cmpen::Value2 + *self == CMPEN_A::VALUE2 } #[doc = "Comparator activated for HIB_IO_0 input"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cmpen::Value3 + *self == CMPEN_A::VALUE3 } #[doc = "Comparator activated for HIB_IO_1 input"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cmpen::Value4 + *self == CMPEN_A::VALUE4 } } #[doc = "Field `CMPEN` writer - Compare Enable for Input Selection"] -pub type CmpenW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cmpen>; -impl<'a, REG> CmpenW<'a, REG> +pub type CMPEN_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMPEN_A>; +impl<'a, REG> CMPEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,109 +70,109 @@ where #[doc = "Comparator permanently in power down"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cmpen::Value1) + self.variant(CMPEN_A::VALUE1) } #[doc = "Comparator activated for VBAT input"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cmpen::Value2) + self.variant(CMPEN_A::VALUE2) } #[doc = "Comparator activated for HIB_IO_0 input"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cmpen::Value3) + self.variant(CMPEN_A::VALUE3) } #[doc = "Comparator activated for HIB_IO_1 input"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cmpen::Value4) + self.variant(CMPEN_A::VALUE4) } } #[doc = "Analog Compare Trigger Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trigsel { +pub enum TRIGSEL_A { #[doc = "0: Sub-second interval counter"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: RTC alarm event"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: RTC periodic event"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: On digital WKUP input positive edge event"] - Value4 = 3, + VALUE4 = 3, #[doc = "5: On digital WKUP input negative edge event"] - Value5 = 5, + VALUE5 = 5, #[doc = "6: Continuous measurement"] - Value6 = 6, + VALUE6 = 6, #[doc = "7: Single-shot on software request"] - Value7 = 7, + VALUE7 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trigsel) -> Self { + fn from(variant: TRIGSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trigsel { +impl crate::FieldSpec for TRIGSEL_A { type Ux = u8; } -impl crate::IsEnum for Trigsel {} +impl crate::IsEnum for TRIGSEL_A {} #[doc = "Field `TRIGSEL` reader - Analog Compare Trigger Select"] -pub type TrigselR = crate::FieldReader; -impl TrigselR { +pub type TRIGSEL_R = crate::FieldReader; +impl TRIGSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Trigsel::Value1), - 1 => Some(Trigsel::Value2), - 2 => Some(Trigsel::Value3), - 3 => Some(Trigsel::Value4), - 5 => Some(Trigsel::Value5), - 6 => Some(Trigsel::Value6), - 7 => Some(Trigsel::Value7), + 0 => Some(TRIGSEL_A::VALUE1), + 1 => Some(TRIGSEL_A::VALUE2), + 2 => Some(TRIGSEL_A::VALUE3), + 3 => Some(TRIGSEL_A::VALUE4), + 5 => Some(TRIGSEL_A::VALUE5), + 6 => Some(TRIGSEL_A::VALUE6), + 7 => Some(TRIGSEL_A::VALUE7), _ => None, } } #[doc = "Sub-second interval counter"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trigsel::Value1 + *self == TRIGSEL_A::VALUE1 } #[doc = "RTC alarm event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trigsel::Value2 + *self == TRIGSEL_A::VALUE2 } #[doc = "RTC periodic event"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trigsel::Value3 + *self == TRIGSEL_A::VALUE3 } #[doc = "On digital WKUP input positive edge event"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Trigsel::Value4 + *self == TRIGSEL_A::VALUE4 } #[doc = "On digital WKUP input negative edge event"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Trigsel::Value5 + *self == TRIGSEL_A::VALUE5 } #[doc = "Continuous measurement"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Trigsel::Value6 + *self == TRIGSEL_A::VALUE6 } #[doc = "Single-shot on software request"] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Trigsel::Value7 + *self == TRIGSEL_A::VALUE7 } } #[doc = "Field `TRIGSEL` writer - Analog Compare Trigger Select"] -pub type TrigselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Trigsel>; -impl<'a, REG> TrigselW<'a, REG> +pub type TRIGSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TRIGSEL_A>; +impl<'a, REG> TRIGSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -180,124 +180,124 @@ where #[doc = "Sub-second interval counter"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trigsel::Value1) + self.variant(TRIGSEL_A::VALUE1) } #[doc = "RTC alarm event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trigsel::Value2) + self.variant(TRIGSEL_A::VALUE2) } #[doc = "RTC periodic event"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trigsel::Value3) + self.variant(TRIGSEL_A::VALUE3) } #[doc = "On digital WKUP input positive edge event"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Trigsel::Value4) + self.variant(TRIGSEL_A::VALUE4) } #[doc = "On digital WKUP input negative edge event"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Trigsel::Value5) + self.variant(TRIGSEL_A::VALUE5) } #[doc = "Continuous measurement"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Trigsel::Value6) + self.variant(TRIGSEL_A::VALUE6) } #[doc = "Single-shot on software request"] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Trigsel::Value7) + self.variant(TRIGSEL_A::VALUE7) } } #[doc = "Field `CONVDEL` reader - Conversion Delay"] -pub type ConvdelR = crate::BitReader; +pub type CONVDEL_R = crate::BitReader; #[doc = "Field `CONVDEL` writer - Conversion Delay"] -pub type ConvdelW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CONVDEL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTERVCNT` reader - Sub-second Interval Counter"] -pub type IntervcntR = crate::FieldReader; +pub type INTERVCNT_R = crate::FieldReader; #[doc = "Field `INTERVCNT` writer - Sub-second Interval Counter"] -pub type IntervcntW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type INTERVCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `SETTLECNT` reader - LPAC Settle Time Counter"] -pub type SettlecntR = crate::FieldReader; +pub type SETTLECNT_R = crate::FieldReader; #[doc = "Field `SETTLECNT` writer - LPAC Settle Time Counter"] -pub type SettlecntW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type SETTLECNT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:2 - Compare Enable for Input Selection"] #[inline(always)] - pub fn cmpen(&self) -> CmpenR { - CmpenR::new((self.bits & 7) as u8) + pub fn cmpen(&self) -> CMPEN_R { + CMPEN_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Analog Compare Trigger Select"] #[inline(always)] - pub fn trigsel(&self) -> TrigselR { - TrigselR::new(((self.bits >> 4) & 7) as u8) + pub fn trigsel(&self) -> TRIGSEL_R { + TRIGSEL_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bit 12 - Conversion Delay"] #[inline(always)] - pub fn convdel(&self) -> ConvdelR { - ConvdelR::new(((self.bits >> 12) & 1) != 0) + pub fn convdel(&self) -> CONVDEL_R { + CONVDEL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 16:27 - Sub-second Interval Counter"] #[inline(always)] - pub fn intervcnt(&self) -> IntervcntR { - IntervcntR::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn intervcnt(&self) -> INTERVCNT_R { + INTERVCNT_R::new(((self.bits >> 16) & 0x0fff) as u16) } #[doc = "Bits 28:31 - LPAC Settle Time Counter"] #[inline(always)] - pub fn settlecnt(&self) -> SettlecntR { - SettlecntR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn settlecnt(&self) -> SETTLECNT_R { + SETTLECNT_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:2 - Compare Enable for Input Selection"] #[inline(always)] #[must_use] - pub fn cmpen(&mut self) -> CmpenW { - CmpenW::new(self, 0) + pub fn cmpen(&mut self) -> CMPEN_W { + CMPEN_W::new(self, 0) } #[doc = "Bits 4:6 - Analog Compare Trigger Select"] #[inline(always)] #[must_use] - pub fn trigsel(&mut self) -> TrigselW { - TrigselW::new(self, 4) + pub fn trigsel(&mut self) -> TRIGSEL_W { + TRIGSEL_W::new(self, 4) } #[doc = "Bit 12 - Conversion Delay"] #[inline(always)] #[must_use] - pub fn convdel(&mut self) -> ConvdelW { - ConvdelW::new(self, 12) + pub fn convdel(&mut self) -> CONVDEL_W { + CONVDEL_W::new(self, 12) } #[doc = "Bits 16:27 - Sub-second Interval Counter"] #[inline(always)] #[must_use] - pub fn intervcnt(&mut self) -> IntervcntW { - IntervcntW::new(self, 16) + pub fn intervcnt(&mut self) -> INTERVCNT_W { + INTERVCNT_W::new(self, 16) } #[doc = "Bits 28:31 - LPAC Settle Time Counter"] #[inline(always)] #[must_use] - pub fn settlecnt(&mut self) -> SettlecntW { - SettlecntW::new(self, 28) + pub fn settlecnt(&mut self) -> SETTLECNT_W { + SETTLECNT_W::new(self, 28) } } #[doc = "Analog Wake-up Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacconf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacconf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LpacconfSpec; -impl crate::RegisterSpec for LpacconfSpec { +pub struct LPACCONF_SPEC; +impl crate::RegisterSpec for LPACCONF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lpacconf::R`](R) reader structure"] -impl crate::Readable for LpacconfSpec {} +impl crate::Readable for LPACCONF_SPEC {} #[doc = "`write(|w| ..)` method takes [`lpacconf::W`](W) writer structure"] -impl crate::Writable for LpacconfSpec { +impl crate::Writable for LPACCONF_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPACCONF to value 0x7000_0000"] -impl crate::Resettable for LpacconfSpec { +impl crate::Resettable for LPACCONF_SPEC { const RESET_VALUE: u32 = 0x7000_0000; } diff --git a/src/scu_hibernate/lpacset.rs b/src/scu_hibernate/lpacset.rs index 33c3212c..8ce26fe9 100644 --- a/src/scu_hibernate/lpacset.rs +++ b/src/scu_hibernate/lpacset.rs @@ -1,167 +1,167 @@ #[doc = "Register `LPACSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Trigger VBAT Single Compare Operation Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatscmp { +pub enum VBATSCMP_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start compare operation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatscmp) -> Self { + fn from(variant: VBATSCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATSCMP` writer - Trigger VBAT Single Compare Operation Set"] -pub type VbatscmpW<'a, REG> = crate::BitWriter<'a, REG, Vbatscmp>; -impl<'a, REG> VbatscmpW<'a, REG> +pub type VBATSCMP_W<'a, REG> = crate::BitWriter<'a, REG, VBATSCMP_A>; +impl<'a, REG> VBATSCMP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatscmp::Value1) + self.variant(VBATSCMP_A::VALUE1) } #[doc = "Start compare operation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatscmp::Value2) + self.variant(VBATSCMP_A::VALUE2) } } #[doc = "Trigger HIB_IO_0 Input Single Compare Operation Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0scmp { +pub enum AHIBIO0SCMP_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start compare operation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0scmp) -> Self { + fn from(variant: AHIBIO0SCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0SCMP` writer - Trigger HIB_IO_0 Input Single Compare Operation Set"] -pub type Ahibio0scmpW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0scmp>; -impl<'a, REG> Ahibio0scmpW<'a, REG> +pub type AHIBIO0SCMP_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0SCMP_A>; +impl<'a, REG> AHIBIO0SCMP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0scmp::Value1) + self.variant(AHIBIO0SCMP_A::VALUE1) } #[doc = "Start compare operation"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0scmp::Value2) + self.variant(AHIBIO0SCMP_A::VALUE2) } } #[doc = "VBAT Compare Operation Initial Value Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatval { +pub enum VBATVAL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Above programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatval) -> Self { + fn from(variant: VBATVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATVAL` writer - VBAT Compare Operation Initial Value Set"] -pub type VbatvalW<'a, REG> = crate::BitWriter<'a, REG, Vbatval>; -impl<'a, REG> VbatvalW<'a, REG> +pub type VBATVAL_W<'a, REG> = crate::BitWriter<'a, REG, VBATVAL_A>; +impl<'a, REG> VBATVAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vbatval::Value1) + self.variant(VBATVAL_A::VALUE1) } #[doc = "Above programmed threshold"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vbatval::Value2) + self.variant(VBATVAL_A::VALUE2) } } #[doc = "HIB_IO_0 Input Compare Initial Value Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0val { +pub enum AHIBIO0VAL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Above programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0val) -> Self { + fn from(variant: AHIBIO0VAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0VAL` writer - HIB_IO_0 Input Compare Initial Value Set"] -pub type Ahibio0valW<'a, REG> = crate::BitWriter<'a, REG, Ahibio0val>; -impl<'a, REG> Ahibio0valW<'a, REG> +pub type AHIBIO0VAL_W<'a, REG> = crate::BitWriter<'a, REG, AHIBIO0VAL_A>; +impl<'a, REG> AHIBIO0VAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahibio0val::Value1) + self.variant(AHIBIO0VAL_A::VALUE1) } #[doc = "Above programmed threshold"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahibio0val::Value2) + self.variant(AHIBIO0VAL_A::VALUE2) } } impl W { #[doc = "Bit 0 - Trigger VBAT Single Compare Operation Set"] #[inline(always)] #[must_use] - pub fn vbatscmp(&mut self) -> VbatscmpW { - VbatscmpW::new(self, 0) + pub fn vbatscmp(&mut self) -> VBATSCMP_W { + VBATSCMP_W::new(self, 0) } #[doc = "Bit 1 - Trigger HIB_IO_0 Input Single Compare Operation Set"] #[inline(always)] #[must_use] - pub fn ahibio0scmp(&mut self) -> Ahibio0scmpW { - Ahibio0scmpW::new(self, 1) + pub fn ahibio0scmp(&mut self) -> AHIBIO0SCMP_W { + AHIBIO0SCMP_W::new(self, 1) } #[doc = "Bit 16 - VBAT Compare Operation Initial Value Set"] #[inline(always)] #[must_use] - pub fn vbatval(&mut self) -> VbatvalW { - VbatvalW::new(self, 16) + pub fn vbatval(&mut self) -> VBATVAL_W { + VBATVAL_W::new(self, 16) } #[doc = "Bit 17 - HIB_IO_0 Input Compare Initial Value Set"] #[inline(always)] #[must_use] - pub fn ahibio0val(&mut self) -> Ahibio0valW { - Ahibio0valW::new(self, 17) + pub fn ahibio0val(&mut self) -> AHIBIO0VAL_W { + AHIBIO0VAL_W::new(self, 17) } } #[doc = "LPAC Control Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LpacsetSpec; -impl crate::RegisterSpec for LpacsetSpec { +pub struct LPACSET_SPEC; +impl crate::RegisterSpec for LPACSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`lpacset::W`](W) writer structure"] -impl crate::Writable for LpacsetSpec { +impl crate::Writable for LPACSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPACSET to value 0"] -impl crate::Resettable for LpacsetSpec { +impl crate::Resettable for LPACSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/lpacst.rs b/src/scu_hibernate/lpacst.rs index cbf643d0..04a07f89 100644 --- a/src/scu_hibernate/lpacst.rs +++ b/src/scu_hibernate/lpacst.rs @@ -1,179 +1,179 @@ #[doc = "Register `LPACST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Trigger VBAT Single Compare Operation Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatscmp { +pub enum VBATSCMP_A { #[doc = "0: Ready to start new compare operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare operation completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatscmp) -> Self { + fn from(variant: VBATSCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATSCMP` reader - Trigger VBAT Single Compare Operation Status"] -pub type VbatscmpR = crate::BitReader; -impl VbatscmpR { +pub type VBATSCMP_R = crate::BitReader; +impl VBATSCMP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbatscmp { + pub const fn variant(&self) -> VBATSCMP_A { match self.bits { - false => Vbatscmp::Value1, - true => Vbatscmp::Value2, + false => VBATSCMP_A::VALUE1, + true => VBATSCMP_A::VALUE2, } } #[doc = "Ready to start new compare operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbatscmp::Value1 + *self == VBATSCMP_A::VALUE1 } #[doc = "Compare operation completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbatscmp::Value2 + *self == VBATSCMP_A::VALUE2 } } #[doc = "Trigger HIB_IO_0 Input Single Compare Operation Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0scmp { +pub enum AHIBIO0SCMP_A { #[doc = "0: Ready to start new compare operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Compare operation completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0scmp) -> Self { + fn from(variant: AHIBIO0SCMP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0SCMP` reader - Trigger HIB_IO_0 Input Single Compare Operation Status"] -pub type Ahibio0scmpR = crate::BitReader; -impl Ahibio0scmpR { +pub type AHIBIO0SCMP_R = crate::BitReader; +impl AHIBIO0SCMP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0scmp { + pub const fn variant(&self) -> AHIBIO0SCMP_A { match self.bits { - false => Ahibio0scmp::Value1, - true => Ahibio0scmp::Value2, + false => AHIBIO0SCMP_A::VALUE1, + true => AHIBIO0SCMP_A::VALUE2, } } #[doc = "Ready to start new compare operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0scmp::Value1 + *self == AHIBIO0SCMP_A::VALUE1 } #[doc = "Compare operation completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0scmp::Value2 + *self == AHIBIO0SCMP_A::VALUE2 } } #[doc = "VBAT Compare Operation Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vbatval { +pub enum VBATVAL_A { #[doc = "0: Below programmed threshold"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Above programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vbatval) -> Self { + fn from(variant: VBATVAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VBATVAL` reader - VBAT Compare Operation Result"] -pub type VbatvalR = crate::BitReader; -impl VbatvalR { +pub type VBATVAL_R = crate::BitReader; +impl VBATVAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vbatval { + pub const fn variant(&self) -> VBATVAL_A { match self.bits { - false => Vbatval::Value1, - true => Vbatval::Value2, + false => VBATVAL_A::VALUE1, + true => VBATVAL_A::VALUE2, } } #[doc = "Below programmed threshold"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vbatval::Value1 + *self == VBATVAL_A::VALUE1 } #[doc = "Above programmed threshold"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vbatval::Value2 + *self == VBATVAL_A::VALUE2 } } #[doc = "HIB_IO_0 Input Compare Operation Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahibio0val { +pub enum AHIBIO0VAL_A { #[doc = "0: Below programmed threshold"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Above programmed threshold"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahibio0val) -> Self { + fn from(variant: AHIBIO0VAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHIBIO0VAL` reader - HIB_IO_0 Input Compare Operation Result"] -pub type Ahibio0valR = crate::BitReader; -impl Ahibio0valR { +pub type AHIBIO0VAL_R = crate::BitReader; +impl AHIBIO0VAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahibio0val { + pub const fn variant(&self) -> AHIBIO0VAL_A { match self.bits { - false => Ahibio0val::Value1, - true => Ahibio0val::Value2, + false => AHIBIO0VAL_A::VALUE1, + true => AHIBIO0VAL_A::VALUE2, } } #[doc = "Below programmed threshold"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahibio0val::Value1 + *self == AHIBIO0VAL_A::VALUE1 } #[doc = "Above programmed threshold"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahibio0val::Value2 + *self == AHIBIO0VAL_A::VALUE2 } } impl R { #[doc = "Bit 0 - Trigger VBAT Single Compare Operation Status"] #[inline(always)] - pub fn vbatscmp(&self) -> VbatscmpR { - VbatscmpR::new((self.bits & 1) != 0) + pub fn vbatscmp(&self) -> VBATSCMP_R { + VBATSCMP_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Trigger HIB_IO_0 Input Single Compare Operation Status"] #[inline(always)] - pub fn ahibio0scmp(&self) -> Ahibio0scmpR { - Ahibio0scmpR::new(((self.bits >> 1) & 1) != 0) + pub fn ahibio0scmp(&self) -> AHIBIO0SCMP_R { + AHIBIO0SCMP_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 16 - VBAT Compare Operation Result"] #[inline(always)] - pub fn vbatval(&self) -> VbatvalR { - VbatvalR::new(((self.bits >> 16) & 1) != 0) + pub fn vbatval(&self) -> VBATVAL_R { + VBATVAL_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - HIB_IO_0 Input Compare Operation Result"] #[inline(always)] - pub fn ahibio0val(&self) -> Ahibio0valR { - Ahibio0valR::new(((self.bits >> 17) & 1) != 0) + pub fn ahibio0val(&self) -> AHIBIO0VAL_R { + AHIBIO0VAL_R::new(((self.bits >> 17) & 1) != 0) } } #[doc = "Hibernate Analog Control State Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacst::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct LpacstSpec; -impl crate::RegisterSpec for LpacstSpec { +pub struct LPACST_SPEC; +impl crate::RegisterSpec for LPACST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lpacst::R`](R) reader structure"] -impl crate::Readable for LpacstSpec {} +impl crate::Readable for LPACST_SPEC {} #[doc = "`reset()` method sets LPACST to value 0"] -impl crate::Resettable for LpacstSpec { +impl crate::Resettable for LPACST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/lpacth0.rs b/src/scu_hibernate/lpacth0.rs index f9dda930..d388073f 100644 --- a/src/scu_hibernate/lpacth0.rs +++ b/src/scu_hibernate/lpacth0.rs @@ -1,55 +1,55 @@ #[doc = "Register `LPACTH0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LPACTH0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `VBATLO` reader - VBAT Lower Threshold Value"] -pub type VbatloR = crate::FieldReader; +pub type VBATLO_R = crate::FieldReader; #[doc = "Field `VBATLO` writer - VBAT Lower Threshold Value"] -pub type VbatloW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type VBATLO_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `VBATHI` reader - VBAT Upper Threshold Value"] -pub type VbathiR = crate::FieldReader; +pub type VBATHI_R = crate::FieldReader; #[doc = "Field `VBATHI` writer - VBAT Upper Threshold Value"] -pub type VbathiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type VBATHI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - VBAT Lower Threshold Value"] #[inline(always)] - pub fn vbatlo(&self) -> VbatloR { - VbatloR::new((self.bits & 0x3f) as u8) + pub fn vbatlo(&self) -> VBATLO_R { + VBATLO_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - VBAT Upper Threshold Value"] #[inline(always)] - pub fn vbathi(&self) -> VbathiR { - VbathiR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn vbathi(&self) -> VBATHI_R { + VBATHI_R::new(((self.bits >> 8) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - VBAT Lower Threshold Value"] #[inline(always)] #[must_use] - pub fn vbatlo(&mut self) -> VbatloW { - VbatloW::new(self, 0) + pub fn vbatlo(&mut self) -> VBATLO_W { + VBATLO_W::new(self, 0) } #[doc = "Bits 8:13 - VBAT Upper Threshold Value"] #[inline(always)] #[must_use] - pub fn vbathi(&mut self) -> VbathiW { - VbathiW::new(self, 8) + pub fn vbathi(&mut self) -> VBATHI_W { + VBATHI_W::new(self, 8) } } #[doc = "LPAC Threshold Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Lpacth0Spec; -impl crate::RegisterSpec for Lpacth0Spec { +pub struct LPACTH0_SPEC; +impl crate::RegisterSpec for LPACTH0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lpacth0::R`](R) reader structure"] -impl crate::Readable for Lpacth0Spec {} +impl crate::Readable for LPACTH0_SPEC {} #[doc = "`write(|w| ..)` method takes [`lpacth0::W`](W) writer structure"] -impl crate::Writable for Lpacth0Spec { +impl crate::Writable for LPACTH0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPACTH0 to value 0"] -impl crate::Resettable for Lpacth0Spec { +impl crate::Resettable for LPACTH0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/lpacth1.rs b/src/scu_hibernate/lpacth1.rs index 5ebe9815..bb38abae 100644 --- a/src/scu_hibernate/lpacth1.rs +++ b/src/scu_hibernate/lpacth1.rs @@ -1,55 +1,55 @@ #[doc = "Register `LPACTH1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `LPACTH1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `AHIBIO0LO` reader - Analog HIB_IO_0 Lower Threshold Value"] -pub type Ahibio0loR = crate::FieldReader; +pub type AHIBIO0LO_R = crate::FieldReader; #[doc = "Field `AHIBIO0LO` writer - Analog HIB_IO_0 Lower Threshold Value"] -pub type Ahibio0loW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type AHIBIO0LO_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `AHIBIO0HI` reader - Analog HIB_IO_0 Upper Threshold Value"] -pub type Ahibio0hiR = crate::FieldReader; +pub type AHIBIO0HI_R = crate::FieldReader; #[doc = "Field `AHIBIO0HI` writer - Analog HIB_IO_0 Upper Threshold Value"] -pub type Ahibio0hiW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type AHIBIO0HI_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; impl R { #[doc = "Bits 0:5 - Analog HIB_IO_0 Lower Threshold Value"] #[inline(always)] - pub fn ahibio0lo(&self) -> Ahibio0loR { - Ahibio0loR::new((self.bits & 0x3f) as u8) + pub fn ahibio0lo(&self) -> AHIBIO0LO_R { + AHIBIO0LO_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Analog HIB_IO_0 Upper Threshold Value"] #[inline(always)] - pub fn ahibio0hi(&self) -> Ahibio0hiR { - Ahibio0hiR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn ahibio0hi(&self) -> AHIBIO0HI_R { + AHIBIO0HI_R::new(((self.bits >> 8) & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - Analog HIB_IO_0 Lower Threshold Value"] #[inline(always)] #[must_use] - pub fn ahibio0lo(&mut self) -> Ahibio0loW { - Ahibio0loW::new(self, 0) + pub fn ahibio0lo(&mut self) -> AHIBIO0LO_W { + AHIBIO0LO_W::new(self, 0) } #[doc = "Bits 8:13 - Analog HIB_IO_0 Upper Threshold Value"] #[inline(always)] #[must_use] - pub fn ahibio0hi(&mut self) -> Ahibio0hiW { - Ahibio0hiW::new(self, 8) + pub fn ahibio0hi(&mut self) -> AHIBIO0HI_W { + AHIBIO0HI_W::new(self, 8) } } #[doc = "LPAC Threshold Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lpacth1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lpacth1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Lpacth1Spec; -impl crate::RegisterSpec for Lpacth1Spec { +pub struct LPACTH1_SPEC; +impl crate::RegisterSpec for LPACTH1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`lpacth1::R`](R) reader structure"] -impl crate::Readable for Lpacth1Spec {} +impl crate::Readable for LPACTH1_SPEC {} #[doc = "`write(|w| ..)` method takes [`lpacth1::W`](W) writer structure"] -impl crate::Writable for Lpacth1Spec { +impl crate::Writable for LPACTH1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets LPACTH1 to value 0"] -impl crate::Resettable for Lpacth1Spec { +impl crate::Resettable for LPACTH1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_hibernate/oscsictrl.rs b/src/scu_hibernate/oscsictrl.rs index bdd80315..238ec24c 100644 --- a/src/scu_hibernate/oscsictrl.rs +++ b/src/scu_hibernate/oscsictrl.rs @@ -1,89 +1,89 @@ #[doc = "Register `OSCSICTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCSICTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Turn OFF the fOSI Clock Source\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pwd { +pub enum PWD_A { #[doc = "0: Enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pwd) -> Self { + fn from(variant: PWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PWD` reader - Turn OFF the fOSI Clock Source"] -pub type PwdR = crate::BitReader; -impl PwdR { +pub type PWD_R = crate::BitReader; +impl PWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pwd { + pub const fn variant(&self) -> PWD_A { match self.bits { - false => Pwd::Value1, - true => Pwd::Value2, + false => PWD_A::VALUE1, + true => PWD_A::VALUE2, } } #[doc = "Enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pwd::Value1 + *self == PWD_A::VALUE1 } #[doc = "Disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pwd::Value2 + *self == PWD_A::VALUE2 } } #[doc = "Field `PWD` writer - Turn OFF the fOSI Clock Source"] -pub type PwdW<'a, REG> = crate::BitWriter<'a, REG, Pwd>; -impl<'a, REG> PwdW<'a, REG> +pub type PWD_W<'a, REG> = crate::BitWriter<'a, REG, PWD_A>; +impl<'a, REG> PWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pwd::Value1) + self.variant(PWD_A::VALUE1) } #[doc = "Disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pwd::Value2) + self.variant(PWD_A::VALUE2) } } impl R { #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"] #[inline(always)] - pub fn pwd(&self) -> PwdR { - PwdR::new((self.bits & 1) != 0) + pub fn pwd(&self) -> PWD_R { + PWD_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"] #[inline(always)] #[must_use] - pub fn pwd(&mut self) -> PwdW { - PwdW::new(self, 0) + pub fn pwd(&mut self) -> PWD_W { + PWD_W::new(self, 0) } } #[doc = "fOSI Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oscsictrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oscsictrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OscsictrlSpec; -impl crate::RegisterSpec for OscsictrlSpec { +pub struct OSCSICTRL_SPEC; +impl crate::RegisterSpec for OSCSICTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`oscsictrl::R`](R) reader structure"] -impl crate::Readable for OscsictrlSpec {} +impl crate::Readable for OSCSICTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`oscsictrl::W`](W) writer structure"] -impl crate::Writable for OscsictrlSpec { +impl crate::Writable for OSCSICTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCSICTRL to value 0x01"] -impl crate::Resettable for OscsictrlSpec { +impl crate::Resettable for OSCSICTRL_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_hibernate/osculctrl.rs b/src/scu_hibernate/osculctrl.rs index 67fdfb51..fac02c72 100644 --- a/src/scu_hibernate/osculctrl.rs +++ b/src/scu_hibernate/osculctrl.rs @@ -1,121 +1,121 @@ #[doc = "Register `OSCULCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCULCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "XTAL1 Data General Purpose Input Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum X1den { +pub enum X1DEN_A { #[doc = "0: Data input inactivated, power down"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Data input active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: X1den) -> Self { + fn from(variant: X1DEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `X1DEN` reader - XTAL1 Data General Purpose Input Enable"] -pub type X1denR = crate::BitReader; -impl X1denR { +pub type X1DEN_R = crate::BitReader; +impl X1DEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> X1den { + pub const fn variant(&self) -> X1DEN_A { match self.bits { - false => X1den::Value1, - true => X1den::Value2, + false => X1DEN_A::VALUE1, + true => X1DEN_A::VALUE2, } } #[doc = "Data input inactivated, power down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == X1den::Value1 + *self == X1DEN_A::VALUE1 } #[doc = "Data input active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == X1den::Value2 + *self == X1DEN_A::VALUE2 } } #[doc = "Field `X1DEN` writer - XTAL1 Data General Purpose Input Enable"] -pub type X1denW<'a, REG> = crate::BitWriter<'a, REG, X1den>; -impl<'a, REG> X1denW<'a, REG> +pub type X1DEN_W<'a, REG> = crate::BitWriter<'a, REG, X1DEN_A>; +impl<'a, REG> X1DEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data input inactivated, power down"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(X1den::Value1) + self.variant(X1DEN_A::VALUE1) } #[doc = "Data input active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(X1den::Value2) + self.variant(X1DEN_A::VALUE2) } } #[doc = "Oscillator Mode\n\nValue on reset: 2"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mode { +pub enum MODE_A { #[doc = "0: Oscillator is enabled, in operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Oscillator is enabled, in bypass mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Oscillator in power down"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Oscillator in power down, can be used as GPI"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mode) -> Self { + fn from(variant: MODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mode { +impl crate::FieldSpec for MODE_A { type Ux = u8; } -impl crate::IsEnum for Mode {} +impl crate::IsEnum for MODE_A {} #[doc = "Field `MODE` reader - Oscillator Mode"] -pub type ModeR = crate::FieldReader; -impl ModeR { +pub type MODE_R = crate::FieldReader; +impl MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mode { + pub const fn variant(&self) -> MODE_A { match self.bits { - 0 => Mode::Value1, - 1 => Mode::Value2, - 2 => Mode::Value3, - 3 => Mode::Value4, + 0 => MODE_A::VALUE1, + 1 => MODE_A::VALUE2, + 2 => MODE_A::VALUE3, + 3 => MODE_A::VALUE4, _ => unreachable!(), } } #[doc = "Oscillator is enabled, in operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mode::Value1 + *self == MODE_A::VALUE1 } #[doc = "Oscillator is enabled, in bypass mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mode::Value2 + *self == MODE_A::VALUE2 } #[doc = "Oscillator in power down"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mode::Value3 + *self == MODE_A::VALUE3 } #[doc = "Oscillator in power down, can be used as GPI"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mode::Value4 + *self == MODE_A::VALUE4 } } #[doc = "Field `MODE` writer - Oscillator Mode"] -pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; -impl<'a, REG> ModeW<'a, REG> +pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE_A, crate::Safe>; +impl<'a, REG> MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -123,64 +123,64 @@ where #[doc = "Oscillator is enabled, in operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mode::Value1) + self.variant(MODE_A::VALUE1) } #[doc = "Oscillator is enabled, in bypass mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mode::Value2) + self.variant(MODE_A::VALUE2) } #[doc = "Oscillator in power down"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mode::Value3) + self.variant(MODE_A::VALUE3) } #[doc = "Oscillator in power down, can be used as GPI"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mode::Value4) + self.variant(MODE_A::VALUE4) } } impl R { #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"] #[inline(always)] - pub fn x1den(&self) -> X1denR { - X1denR::new((self.bits & 1) != 0) + pub fn x1den(&self) -> X1DEN_R { + X1DEN_R::new((self.bits & 1) != 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> ModeR { - ModeR::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 4) & 3) as u8) } } impl W { #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"] #[inline(always)] #[must_use] - pub fn x1den(&mut self) -> X1denW { - X1denW::new(self, 0) + pub fn x1den(&mut self) -> X1DEN_W { + X1DEN_W::new(self, 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> ModeW { - ModeW::new(self, 4) + pub fn mode(&mut self) -> MODE_W { + MODE_W::new(self, 4) } } #[doc = "OSC_ULP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`osculctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OsculctrlSpec; -impl crate::RegisterSpec for OsculctrlSpec { +pub struct OSCULCTRL_SPEC; +impl crate::RegisterSpec for OSCULCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`osculctrl::R`](R) reader structure"] -impl crate::Readable for OsculctrlSpec {} +impl crate::Readable for OSCULCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`osculctrl::W`](W) writer structure"] -impl crate::Writable for OsculctrlSpec { +impl crate::Writable for OSCULCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCULCTRL to value 0x20"] -impl crate::Resettable for OsculctrlSpec { +impl crate::Resettable for OSCULCTRL_SPEC { const RESET_VALUE: u32 = 0x20; } diff --git a/src/scu_hibernate/osculstat.rs b/src/scu_hibernate/osculstat.rs index d260c2b1..6cb65935 100644 --- a/src/scu_hibernate/osculstat.rs +++ b/src/scu_hibernate/osculstat.rs @@ -1,22 +1,22 @@ #[doc = "Register `OSCULSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `X1D` reader - XTAL1 Data Value"] -pub type X1dR = crate::BitReader; +pub type X1D_R = crate::BitReader; impl R { #[doc = "Bit 0 - XTAL1 Data Value"] #[inline(always)] - pub fn x1d(&self) -> X1dR { - X1dR::new((self.bits & 1) != 0) + pub fn x1d(&self) -> X1D_R { + X1D_R::new((self.bits & 1) != 0) } } #[doc = "OSC_ULP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`osculstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OsculstatSpec; -impl crate::RegisterSpec for OsculstatSpec { +pub struct OSCULSTAT_SPEC; +impl crate::RegisterSpec for OSCULSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`osculstat::R`](R) reader structure"] -impl crate::Readable for OsculstatSpec {} +impl crate::Readable for OSCULSTAT_SPEC {} #[doc = "`reset()` method sets OSCULSTAT to value 0"] -impl crate::Resettable for OsculstatSpec { +impl crate::Resettable for OSCULSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt.rs b/src/scu_interrupt.rs index d1160d43..e13a1316 100644 --- a/src/scu_interrupt.rs +++ b/src/scu_interrupt.rs @@ -1,78 +1,72 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - srstat: Srstat, - srraw: Srraw, - srmsk: Srmsk, - srclr: Srclr, - srset: Srset, - nmireqen: Nmireqen, + srstat: SRSTAT, + srraw: SRRAW, + srmsk: SRMSK, + srclr: SRCLR, + srset: SRSET, + nmireqen: NMIREQEN, } impl RegisterBlock { #[doc = "0x00 - SCU Service Request Status"] #[inline(always)] - pub const fn srstat(&self) -> &Srstat { + pub const fn srstat(&self) -> &SRSTAT { &self.srstat } #[doc = "0x04 - SCU Raw Service Request Status"] #[inline(always)] - pub const fn srraw(&self) -> &Srraw { + pub const fn srraw(&self) -> &SRRAW { &self.srraw } #[doc = "0x08 - SCU Service Request Mask"] #[inline(always)] - pub const fn srmsk(&self) -> &Srmsk { + pub const fn srmsk(&self) -> &SRMSK { &self.srmsk } #[doc = "0x0c - SCU Service Request Clear"] #[inline(always)] - pub const fn srclr(&self) -> &Srclr { + pub const fn srclr(&self) -> &SRCLR { &self.srclr } #[doc = "0x10 - SCU Service Request Set"] #[inline(always)] - pub const fn srset(&self) -> &Srset { + pub const fn srset(&self) -> &SRSET { &self.srset } #[doc = "0x14 - SCU Service Request Mask"] #[inline(always)] - pub const fn nmireqen(&self) -> &Nmireqen { + pub const fn nmireqen(&self) -> &NMIREQEN { &self.nmireqen } } #[doc = "SRSTAT (r) register accessor: SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srstat`] module"] -#[doc(alias = "SRSTAT")] -pub type Srstat = crate::Reg; +pub type SRSTAT = crate::Reg; #[doc = "SCU Service Request Status"] pub mod srstat; #[doc = "SRRAW (r) register accessor: SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srraw`] module"] -#[doc(alias = "SRRAW")] -pub type Srraw = crate::Reg; +pub type SRRAW = crate::Reg; #[doc = "SCU Raw Service Request Status"] pub mod srraw; #[doc = "SRMSK (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srmsk`] module"] -#[doc(alias = "SRMSK")] -pub type Srmsk = crate::Reg; +pub type SRMSK = crate::Reg; #[doc = "SCU Service Request Mask"] pub mod srmsk; #[doc = "SRCLR (w) register accessor: SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srclr`] module"] -#[doc(alias = "SRCLR")] -pub type Srclr = crate::Reg; +pub type SRCLR = crate::Reg; #[doc = "SCU Service Request Clear"] pub mod srclr; #[doc = "SRSET (w) register accessor: SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srset`] module"] -#[doc(alias = "SRSET")] -pub type Srset = crate::Reg; +pub type SRSET = crate::Reg; #[doc = "SCU Service Request Set"] pub mod srset; #[doc = "NMIREQEN (rw) register accessor: SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@nmireqen`] module"] -#[doc(alias = "NMIREQEN")] -pub type Nmireqen = crate::Reg; +pub type NMIREQEN = crate::Reg; #[doc = "SCU Service Request Mask"] pub mod nmireqen; diff --git a/src/scu_interrupt/nmireqen.rs b/src/scu_interrupt/nmireqen.rs index 0dfa90ef..0d7802c4 100644 --- a/src/scu_interrupt/nmireqen.rs +++ b/src/scu_interrupt/nmireqen.rs @@ -1,473 +1,473 @@ #[doc = "Register `NMIREQEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `NMIREQEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Promote Pre-Warning Interrupt Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` reader - Promote Pre-Warning Interrupt Request to NMI Request"] -pub type PrwarnR = crate::BitReader; -impl PrwarnR { +pub type PRWARN_R = crate::BitReader; +impl PRWARN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prwarn { + pub const fn variant(&self) -> PRWARN_A { match self.bits { - false => Prwarn::Value1, - true => Prwarn::Value2, + false => PRWARN_A::VALUE1, + true => PRWARN_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prwarn::Value1 + *self == PRWARN_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prwarn::Value2 + *self == PRWARN_A::VALUE2 } } #[doc = "Field `PRWARN` writer - Promote Pre-Warning Interrupt Request to NMI Request"] -pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; -impl<'a, REG> PrwarnW<'a, REG> +pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; +impl<'a, REG> PRWARN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prwarn::Value1) + self.variant(PRWARN_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prwarn::Value2) + self.variant(PRWARN_A::VALUE2) } } #[doc = "Promote RTC Periodic Interrupt request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pi { +pub enum PI_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pi) -> Self { + fn from(variant: PI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` reader - Promote RTC Periodic Interrupt request to NMI Request"] -pub type PiR = crate::BitReader; -impl PiR { +pub type PI_R = crate::BitReader; +impl PI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pi { + pub const fn variant(&self) -> PI_A { match self.bits { - false => Pi::Value1, - true => Pi::Value2, + false => PI_A::VALUE1, + true => PI_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pi::Value1 + *self == PI_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pi::Value2 + *self == PI_A::VALUE2 } } #[doc = "Field `PI` writer - Promote RTC Periodic Interrupt request to NMI Request"] -pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; -impl<'a, REG> PiW<'a, REG> +pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; +impl<'a, REG> PI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pi::Value1) + self.variant(PI_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pi::Value2) + self.variant(PI_A::VALUE2) } } #[doc = "Promote RTC Alarm Interrupt Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ai { +pub enum AI_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ai) -> Self { + fn from(variant: AI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` reader - Promote RTC Alarm Interrupt Request to NMI Request"] -pub type AiR = crate::BitReader; -impl AiR { +pub type AI_R = crate::BitReader; +impl AI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ai { + pub const fn variant(&self) -> AI_A { match self.bits { - false => Ai::Value1, - true => Ai::Value2, + false => AI_A::VALUE1, + true => AI_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ai::Value1 + *self == AI_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ai::Value2 + *self == AI_A::VALUE2 } } #[doc = "Field `AI` writer - Promote RTC Alarm Interrupt Request to NMI Request"] -pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; -impl<'a, REG> AiW<'a, REG> +pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; +impl<'a, REG> AI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ai::Value1) + self.variant(AI_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ai::Value2) + self.variant(AI_A::VALUE2) } } #[doc = "Promote Channel 0 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru00 { +pub enum ERU00_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru00) -> Self { + fn from(variant: ERU00_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU00` reader - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] -pub type Eru00R = crate::BitReader; -impl Eru00R { +pub type ERU00_R = crate::BitReader; +impl ERU00_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru00 { + pub const fn variant(&self) -> ERU00_A { match self.bits { - false => Eru00::Value1, - true => Eru00::Value2, + false => ERU00_A::VALUE1, + true => ERU00_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru00::Value1 + *self == ERU00_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru00::Value2 + *self == ERU00_A::VALUE2 } } #[doc = "Field `ERU00` writer - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] -pub type Eru00W<'a, REG> = crate::BitWriter<'a, REG, Eru00>; -impl<'a, REG> Eru00W<'a, REG> +pub type ERU00_W<'a, REG> = crate::BitWriter<'a, REG, ERU00_A>; +impl<'a, REG> ERU00_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru00::Value1) + self.variant(ERU00_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru00::Value2) + self.variant(ERU00_A::VALUE2) } } #[doc = "Promote Channel 1 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru01 { +pub enum ERU01_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru01) -> Self { + fn from(variant: ERU01_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU01` reader - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] -pub type Eru01R = crate::BitReader; -impl Eru01R { +pub type ERU01_R = crate::BitReader; +impl ERU01_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru01 { + pub const fn variant(&self) -> ERU01_A { match self.bits { - false => Eru01::Value1, - true => Eru01::Value2, + false => ERU01_A::VALUE1, + true => ERU01_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru01::Value1 + *self == ERU01_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru01::Value2 + *self == ERU01_A::VALUE2 } } #[doc = "Field `ERU01` writer - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] -pub type Eru01W<'a, REG> = crate::BitWriter<'a, REG, Eru01>; -impl<'a, REG> Eru01W<'a, REG> +pub type ERU01_W<'a, REG> = crate::BitWriter<'a, REG, ERU01_A>; +impl<'a, REG> ERU01_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru01::Value1) + self.variant(ERU01_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru01::Value2) + self.variant(ERU01_A::VALUE2) } } #[doc = "Promote Channel 2 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru02 { +pub enum ERU02_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru02) -> Self { + fn from(variant: ERU02_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU02` reader - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] -pub type Eru02R = crate::BitReader; -impl Eru02R { +pub type ERU02_R = crate::BitReader; +impl ERU02_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru02 { + pub const fn variant(&self) -> ERU02_A { match self.bits { - false => Eru02::Value1, - true => Eru02::Value2, + false => ERU02_A::VALUE1, + true => ERU02_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru02::Value1 + *self == ERU02_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru02::Value2 + *self == ERU02_A::VALUE2 } } #[doc = "Field `ERU02` writer - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] -pub type Eru02W<'a, REG> = crate::BitWriter<'a, REG, Eru02>; -impl<'a, REG> Eru02W<'a, REG> +pub type ERU02_W<'a, REG> = crate::BitWriter<'a, REG, ERU02_A>; +impl<'a, REG> ERU02_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru02::Value1) + self.variant(ERU02_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru02::Value2) + self.variant(ERU02_A::VALUE2) } } #[doc = "Promote Channel 3 Interrupt of ERU0 Request to NMI Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru03 { +pub enum ERU03_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru03) -> Self { + fn from(variant: ERU03_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU03` reader - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] -pub type Eru03R = crate::BitReader; -impl Eru03R { +pub type ERU03_R = crate::BitReader; +impl ERU03_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru03 { + pub const fn variant(&self) -> ERU03_A { match self.bits { - false => Eru03::Value1, - true => Eru03::Value2, + false => ERU03_A::VALUE1, + true => ERU03_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru03::Value1 + *self == ERU03_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru03::Value2 + *self == ERU03_A::VALUE2 } } #[doc = "Field `ERU03` writer - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] -pub type Eru03W<'a, REG> = crate::BitWriter<'a, REG, Eru03>; -impl<'a, REG> Eru03W<'a, REG> +pub type ERU03_W<'a, REG> = crate::BitWriter<'a, REG, ERU03_A>; +impl<'a, REG> ERU03_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru03::Value1) + self.variant(ERU03_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru03::Value2) + self.variant(ERU03_A::VALUE2) } } impl R { #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"] #[inline(always)] - pub fn prwarn(&self) -> PrwarnR { - PrwarnR::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PRWARN_R { + PRWARN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"] #[inline(always)] - pub fn pi(&self) -> PiR { - PiR::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PI_R { + PI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"] #[inline(always)] - pub fn ai(&self) -> AiR { - AiR::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AI_R { + AI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru00(&self) -> Eru00R { - Eru00R::new(((self.bits >> 16) & 1) != 0) + pub fn eru00(&self) -> ERU00_R { + ERU00_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru01(&self) -> Eru01R { - Eru01R::new(((self.bits >> 17) & 1) != 0) + pub fn eru01(&self) -> ERU01_R { + ERU01_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru02(&self) -> Eru02R { - Eru02R::new(((self.bits >> 18) & 1) != 0) + pub fn eru02(&self) -> ERU02_R { + ERU02_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - pub fn eru03(&self) -> Eru03R { - Eru03R::new(((self.bits >> 19) & 1) != 0) + pub fn eru03(&self) -> ERU03_R { + ERU03_R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PrwarnW { - PrwarnW::new(self, 0) + pub fn prwarn(&mut self) -> PRWARN_W { + PRWARN_W::new(self, 0) } #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PiW { - PiW::new(self, 1) + pub fn pi(&mut self) -> PI_W { + PI_W::new(self, 1) } #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AiW { - AiW::new(self, 2) + pub fn ai(&mut self) -> AI_W { + AI_W::new(self, 2) } #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru00(&mut self) -> Eru00W { - Eru00W::new(self, 16) + pub fn eru00(&mut self) -> ERU00_W { + ERU00_W::new(self, 16) } #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru01(&mut self) -> Eru01W { - Eru01W::new(self, 17) + pub fn eru01(&mut self) -> ERU01_W { + ERU01_W::new(self, 17) } #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru02(&mut self) -> Eru02W { - Eru02W::new(self, 18) + pub fn eru02(&mut self) -> ERU02_W { + ERU02_W::new(self, 18) } #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] #[must_use] - pub fn eru03(&mut self) -> Eru03W { - Eru03W::new(self, 19) + pub fn eru03(&mut self) -> ERU03_W { + ERU03_W::new(self, 19) } } #[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`nmireqen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nmireqen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct NmireqenSpec; -impl crate::RegisterSpec for NmireqenSpec { +pub struct NMIREQEN_SPEC; +impl crate::RegisterSpec for NMIREQEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`nmireqen::R`](R) reader structure"] -impl crate::Readable for NmireqenSpec {} +impl crate::Readable for NMIREQEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`nmireqen::W`](W) writer structure"] -impl crate::Writable for NmireqenSpec { +impl crate::Writable for NMIREQEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets NMIREQEN to value 0"] -impl crate::Resettable for NmireqenSpec { +impl crate::Resettable for NMIREQEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srclr.rs b/src/scu_interrupt/srclr.rs index 4fa2d623..2d03cd72 100644 --- a/src/scu_interrupt/srclr.rs +++ b/src/scu_interrupt/srclr.rs @@ -1,907 +1,907 @@ #[doc = "Register `SRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Clear"] -pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; -impl<'a, REG> PrwarnW<'a, REG> +pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; +impl<'a, REG> PRWARN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prwarn::Value1) + self.variant(PRWARN_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prwarn::Value2) + self.variant(PRWARN_A::VALUE2) } } #[doc = "RTC Periodic Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pi { +pub enum PI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pi) -> Self { + fn from(variant: PI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Clear"] -pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; -impl<'a, REG> PiW<'a, REG> +pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; +impl<'a, REG> PI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pi::Value1) + self.variant(PI_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pi::Value2) + self.variant(PI_A::VALUE2) } } #[doc = "RTC Alarm Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ai { +pub enum AI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ai) -> Self { + fn from(variant: AI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Clear"] -pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; -impl<'a, REG> AiW<'a, REG> +pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; +impl<'a, REG> AI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ai::Value1) + self.variant(AI_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ai::Value2) + self.variant(AI_A::VALUE2) } } #[doc = "DLR Request Overrun Interrupt clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlrovr { +pub enum DLROVR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlrovr) -> Self { + fn from(variant: DLROVR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt clear"] -pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; -impl<'a, REG> DlrovrW<'a, REG> +pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_A>; +impl<'a, REG> DLROVR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value1) + self.variant(DLROVR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value2) + self.variant(DLROVR_A::VALUE2) } } #[doc = "LPACLR Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpaccr { +pub enum LPACCR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpaccr) -> Self { + fn from(variant: LPACCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCR` writer - LPACLR Mirror Register Update Interrupt Clear"] -pub type LpaccrW<'a, REG> = crate::BitWriter<'a, REG, Lpaccr>; -impl<'a, REG> LpaccrW<'a, REG> +pub type LPACCR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCR_A>; +impl<'a, REG> LPACCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value1) + self.variant(LPACCR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value2) + self.variant(LPACCR_A::VALUE2) } } #[doc = "LPACTH0 Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` writer - LPACTH0 Mirror Register Update Interrupt Clear"] -pub type Lpacth0W<'a, REG> = crate::BitWriter<'a, REG, Lpacth0>; -impl<'a, REG> Lpacth0W<'a, REG> +pub type LPACTH0_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH0_A>; +impl<'a, REG> LPACTH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value1) + self.variant(LPACTH0_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value2) + self.variant(LPACTH0_A::VALUE2) } } #[doc = "LPACTH1 Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` writer - LPACTH1 Mirror Register Update Interrupt Clear"] -pub type Lpacth1W<'a, REG> = crate::BitWriter<'a, REG, Lpacth1>; -impl<'a, REG> Lpacth1W<'a, REG> +pub type LPACTH1_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH1_A>; +impl<'a, REG> LPACTH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value1) + self.variant(LPACTH1_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value2) + self.variant(LPACTH1_A::VALUE2) } } #[doc = "LPACST Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacst { +pub enum LPACST_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacst) -> Self { + fn from(variant: LPACST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACST` writer - LPACST Mirror Register Update Interrupt Clear"] -pub type LpacstW<'a, REG> = crate::BitWriter<'a, REG, Lpacst>; -impl<'a, REG> LpacstW<'a, REG> +pub type LPACST_W<'a, REG> = crate::BitWriter<'a, REG, LPACST_A>; +impl<'a, REG> LPACST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacst::Value1) + self.variant(LPACST_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacst::Value2) + self.variant(LPACST_A::VALUE2) } } #[doc = "LPACCLR Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` writer - LPACCLR Mirror Register Update Interrupt Clear"] -pub type LpacclrW<'a, REG> = crate::BitWriter<'a, REG, Lpacclr>; -impl<'a, REG> LpacclrW<'a, REG> +pub type LPACCLR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCLR_A>; +impl<'a, REG> LPACCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value1) + self.variant(LPACCLR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value2) + self.variant(LPACCLR_A::VALUE2) } } #[doc = "LPACSET Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` writer - LPACSET Mirror Register Update Interrupt Clear"] -pub type LpacsetW<'a, REG> = crate::BitWriter<'a, REG, Lpacset>; -impl<'a, REG> LpacsetW<'a, REG> +pub type LPACSET_W<'a, REG> = crate::BitWriter<'a, REG, LPACSET_A>; +impl<'a, REG> LPACSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacset::Value1) + self.variant(LPACSET_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacset::Value2) + self.variant(LPACSET_A::VALUE2) } } #[doc = "HINTST Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintst { +pub enum HINTST_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintst) -> Self { + fn from(variant: HINTST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTST` writer - HINTST Mirror Register Update Interrupt Clear"] -pub type HintstW<'a, REG> = crate::BitWriter<'a, REG, Hintst>; -impl<'a, REG> HintstW<'a, REG> +pub type HINTST_W<'a, REG> = crate::BitWriter<'a, REG, HINTST_A>; +impl<'a, REG> HINTST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintst::Value1) + self.variant(HINTST_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintst::Value2) + self.variant(HINTST_A::VALUE2) } } #[doc = "HINTCLR Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` writer - HINTCLR Mirror Register Update Interrupt Clear"] -pub type HintclrW<'a, REG> = crate::BitWriter<'a, REG, Hintclr>; -impl<'a, REG> HintclrW<'a, REG> +pub type HINTCLR_W<'a, REG> = crate::BitWriter<'a, REG, HINTCLR_A>; +impl<'a, REG> HINTCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintclr::Value1) + self.variant(HINTCLR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintclr::Value2) + self.variant(HINTCLR_A::VALUE2) } } #[doc = "HINTSET Mirror Register Update Interrupt Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` writer - HINTSET Mirror Register Update Interrupt Clear"] -pub type HintsetW<'a, REG> = crate::BitWriter<'a, REG, Hintset>; -impl<'a, REG> HintsetW<'a, REG> +pub type HINTSET_W<'a, REG> = crate::BitWriter<'a, REG, HINTSET_A>; +impl<'a, REG> HINTSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintset::Value1) + self.variant(HINTSET_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintset::Value2) + self.variant(HINTSET_A::VALUE2) } } #[doc = "HDCLR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdclr { +pub enum HDCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdclr) -> Self { + fn from(variant: HDCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` writer - HDCLR Mirror Register Update Clear"] -pub type HdclrW<'a, REG> = crate::BitWriter<'a, REG, Hdclr>; -impl<'a, REG> HdclrW<'a, REG> +pub type HDCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCLR_A>; +impl<'a, REG> HDCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdclr::Value1) + self.variant(HDCLR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdclr::Value2) + self.variant(HDCLR_A::VALUE2) } } #[doc = "HDSET Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdset { +pub enum HDSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdset) -> Self { + fn from(variant: HDSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` writer - HDSET Mirror Register Update Clear"] -pub type HdsetW<'a, REG> = crate::BitWriter<'a, REG, Hdset>; -impl<'a, REG> HdsetW<'a, REG> +pub type HDSET_W<'a, REG> = crate::BitWriter<'a, REG, HDSET_A>; +impl<'a, REG> HDSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdset::Value1) + self.variant(HDSET_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdset::Value2) + self.variant(HDSET_A::VALUE2) } } #[doc = "HDCR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Clear"] -pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; -impl<'a, REG> HdcrW<'a, REG> +pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_A>; +impl<'a, REG> HDCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdcr::Value1) + self.variant(HDCR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdcr::Value2) + self.variant(HDCR_A::VALUE2) } } #[doc = "OSCSICTRL Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Clear"] -pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; -impl<'a, REG> OscsictrlW<'a, REG> +pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_A>; +impl<'a, REG> OSCSICTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value1) + self.variant(OSCSICTRL_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value2) + self.variant(OSCSICTRL_A::VALUE2) } } #[doc = "OSCULCTRL Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Clear"] -pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; -impl<'a, REG> OsculctrlW<'a, REG> +pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_A>; +impl<'a, REG> OSCULCTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value1) + self.variant(OSCULCTRL_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value2) + self.variant(OSCULCTRL_A::VALUE2) } } #[doc = "RTC CTR Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Clear"] -pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; -impl<'a, REG> RtcCtrW<'a, REG> +pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_A>; +impl<'a, REG> RTC_CTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value1) + self.variant(RTC_CTR_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value2) + self.variant(RTC_CTR_A::VALUE2) } } #[doc = "RTC ATIM0 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Clear"] -pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; -impl<'a, REG> RtcAtim0W<'a, REG> +pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_A>; +impl<'a, REG> RTC_ATIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value1) + self.variant(RTC_ATIM0_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value2) + self.variant(RTC_ATIM0_A::VALUE2) } } #[doc = "RTC ATIM1 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Clear"] -pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; -impl<'a, REG> RtcAtim1W<'a, REG> +pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_A>; +impl<'a, REG> RTC_ATIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value1) + self.variant(RTC_ATIM1_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value2) + self.variant(RTC_ATIM1_A::VALUE2) } } #[doc = "RTC TIM0 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Clear"] -pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; -impl<'a, REG> RtcTim0W<'a, REG> +pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_A>; +impl<'a, REG> RTC_TIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value1) + self.variant(RTC_TIM0_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value2) + self.variant(RTC_TIM0_A::VALUE2) } } #[doc = "RTC TIM1 Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Clear"] -pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; -impl<'a, REG> RtcTim1W<'a, REG> +pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_A>; +impl<'a, REG> RTC_TIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value1) + self.variant(RTC_TIM1_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value2) + self.variant(RTC_TIM1_A::VALUE2) } } #[doc = "Retention Memory Mirror Register Update Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Clear"] -pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; -impl<'a, REG> RmxW<'a, REG> +pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_A>; +impl<'a, REG> RMX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rmx::Value1) + self.variant(RMX_A::VALUE1) } #[doc = "Clear the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rmx::Value2) + self.variant(RMX_A::VALUE2) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Clear"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PrwarnW { - PrwarnW::new(self, 0) + pub fn prwarn(&mut self) -> PRWARN_W { + PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Clear"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PiW { - PiW::new(self, 1) + pub fn pi(&mut self) -> PI_W { + PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Clear"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AiW { - AiW::new(self, 2) + pub fn ai(&mut self) -> AI_W { + AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt clear"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DlrovrW { - DlrovrW::new(self, 3) + pub fn dlrovr(&mut self) -> DLROVR_W { + DLROVR_W::new(self, 3) } #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpaccr(&mut self) -> LpaccrW { - LpaccrW::new(self, 6) + pub fn lpaccr(&mut self) -> LPACCR_W { + LPACCR_W::new(self, 6) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpacth0(&mut self) -> Lpacth0W { - Lpacth0W::new(self, 7) + pub fn lpacth0(&mut self) -> LPACTH0_W { + LPACTH0_W::new(self, 7) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpacth1(&mut self) -> Lpacth1W { - Lpacth1W::new(self, 8) + pub fn lpacth1(&mut self) -> LPACTH1_W { + LPACTH1_W::new(self, 8) } #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpacst(&mut self) -> LpacstW { - LpacstW::new(self, 9) + pub fn lpacst(&mut self) -> LPACST_W { + LPACST_W::new(self, 9) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpacclr(&mut self) -> LpacclrW { - LpacclrW::new(self, 10) + pub fn lpacclr(&mut self) -> LPACCLR_W { + LPACCLR_W::new(self, 10) } #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn lpacset(&mut self) -> LpacsetW { - LpacsetW::new(self, 11) + pub fn lpacset(&mut self) -> LPACSET_W { + LPACSET_W::new(self, 11) } #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn hintst(&mut self) -> HintstW { - HintstW::new(self, 12) + pub fn hintst(&mut self) -> HINTST_W { + HINTST_W::new(self, 12) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn hintclr(&mut self) -> HintclrW { - HintclrW::new(self, 13) + pub fn hintclr(&mut self) -> HINTCLR_W { + HINTCLR_W::new(self, 13) } #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Clear"] #[inline(always)] #[must_use] - pub fn hintset(&mut self) -> HintsetW { - HintsetW::new(self, 14) + pub fn hintset(&mut self) -> HINTSET_W { + HINTSET_W::new(self, 14) } #[doc = "Bit 17 - HDCLR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdclr(&mut self) -> HdclrW { - HdclrW::new(self, 17) + pub fn hdclr(&mut self) -> HDCLR_W { + HDCLR_W::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdset(&mut self) -> HdsetW { - HdsetW::new(self, 18) + pub fn hdset(&mut self) -> HDSET_W { + HDSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HdcrW { - HdcrW::new(self, 19) + pub fn hdcr(&mut self) -> HDCR_W { + HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OscsictrlW { - OscsictrlW::new(self, 21) + pub fn oscsictrl(&mut self) -> OSCSICTRL_W { + OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OsculctrlW { - OsculctrlW::new(self, 23) + pub fn osculctrl(&mut self) -> OSCULCTRL_W { + OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RtcCtrW { - RtcCtrW::new(self, 24) + pub fn rtc_ctr(&mut self) -> RTC_CTR_W { + RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RtcAtim0W { - RtcAtim0W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { + RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RtcAtim1W { - RtcAtim1W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { + RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RtcTim0W { - RtcTim0W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { + RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RtcTim1W { - RtcTim1W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { + RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Clear"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RmxW { - RmxW::new(self, 29) + pub fn rmx(&mut self) -> RMX_W { + RMX_W::new(self, 29) } } #[doc = "SCU Service Request Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrclrSpec; -impl crate::RegisterSpec for SrclrSpec { +pub struct SRCLR_SPEC; +impl crate::RegisterSpec for SRCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srclr::W`](W) writer structure"] -impl crate::Writable for SrclrSpec { +impl crate::Writable for SRCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRCLR to value 0"] -impl crate::Resettable for SrclrSpec { +impl crate::Resettable for SRCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srmsk.rs b/src/scu_interrupt/srmsk.rs index 7aa3472c..ee19705d 100644 --- a/src/scu_interrupt/srmsk.rs +++ b/src/scu_interrupt/srmsk.rs @@ -1,1561 +1,1561 @@ #[doc = "Register `SRMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SRMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Mask"] -pub type PrwarnR = crate::BitReader; -impl PrwarnR { +pub type PRWARN_R = crate::BitReader; +impl PRWARN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prwarn { + pub const fn variant(&self) -> PRWARN_A { match self.bits { - false => Prwarn::Value1, - true => Prwarn::Value2, + false => PRWARN_A::VALUE1, + true => PRWARN_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prwarn::Value1 + *self == PRWARN_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prwarn::Value2 + *self == PRWARN_A::VALUE2 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Mask"] -pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; -impl<'a, REG> PrwarnW<'a, REG> +pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; +impl<'a, REG> PRWARN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prwarn::Value1) + self.variant(PRWARN_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prwarn::Value2) + self.variant(PRWARN_A::VALUE2) } } #[doc = "RTC Periodic Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pi { +pub enum PI_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pi) -> Self { + fn from(variant: PI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` reader - RTC Periodic Interrupt Mask"] -pub type PiR = crate::BitReader; -impl PiR { +pub type PI_R = crate::BitReader; +impl PI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pi { + pub const fn variant(&self) -> PI_A { match self.bits { - false => Pi::Value1, - true => Pi::Value2, + false => PI_A::VALUE1, + true => PI_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pi::Value1 + *self == PI_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pi::Value2 + *self == PI_A::VALUE2 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Mask"] -pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; -impl<'a, REG> PiW<'a, REG> +pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; +impl<'a, REG> PI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pi::Value1) + self.variant(PI_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pi::Value2) + self.variant(PI_A::VALUE2) } } #[doc = "RTC Alarm Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ai { +pub enum AI_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ai) -> Self { + fn from(variant: AI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` reader - RTC Alarm Interrupt Mask"] -pub type AiR = crate::BitReader; -impl AiR { +pub type AI_R = crate::BitReader; +impl AI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ai { + pub const fn variant(&self) -> AI_A { match self.bits { - false => Ai::Value1, - true => Ai::Value2, + false => AI_A::VALUE1, + true => AI_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ai::Value1 + *self == AI_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ai::Value2 + *self == AI_A::VALUE2 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Mask"] -pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; -impl<'a, REG> AiW<'a, REG> +pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; +impl<'a, REG> AI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ai::Value1) + self.variant(AI_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ai::Value2) + self.variant(AI_A::VALUE2) } } #[doc = "DLR Request Overrun Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlrovr { +pub enum DLROVR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlrovr) -> Self { + fn from(variant: DLROVR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Mask"] -pub type DlrovrR = crate::BitReader; -impl DlrovrR { +pub type DLROVR_R = crate::BitReader; +impl DLROVR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlrovr { + pub const fn variant(&self) -> DLROVR_A { match self.bits { - false => Dlrovr::Value1, - true => Dlrovr::Value2, + false => DLROVR_A::VALUE1, + true => DLROVR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlrovr::Value1 + *self == DLROVR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlrovr::Value2 + *self == DLROVR_A::VALUE2 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt Mask"] -pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; -impl<'a, REG> DlrovrW<'a, REG> +pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_A>; +impl<'a, REG> DLROVR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value1) + self.variant(DLROVR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value2) + self.variant(DLROVR_A::VALUE2) } } #[doc = "LPACLR Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpaccr { +pub enum LPACCR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpaccr) -> Self { + fn from(variant: LPACCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCR` reader - LPACLR Mirror Register Update Interrupt Mask"] -pub type LpaccrR = crate::BitReader; -impl LpaccrR { +pub type LPACCR_R = crate::BitReader; +impl LPACCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpaccr { + pub const fn variant(&self) -> LPACCR_A { match self.bits { - false => Lpaccr::Value1, - true => Lpaccr::Value2, + false => LPACCR_A::VALUE1, + true => LPACCR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpaccr::Value1 + *self == LPACCR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpaccr::Value2 + *self == LPACCR_A::VALUE2 } } #[doc = "Field `LPACCR` writer - LPACLR Mirror Register Update Interrupt Mask"] -pub type LpaccrW<'a, REG> = crate::BitWriter<'a, REG, Lpaccr>; -impl<'a, REG> LpaccrW<'a, REG> +pub type LPACCR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCR_A>; +impl<'a, REG> LPACCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value1) + self.variant(LPACCR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value2) + self.variant(LPACCR_A::VALUE2) } } #[doc = "LPACTH0 Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` reader - LPACTH0 Mirror Register Update Interrupt Mask"] -pub type Lpacth0R = crate::BitReader; -impl Lpacth0R { +pub type LPACTH0_R = crate::BitReader; +impl LPACTH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth0 { + pub const fn variant(&self) -> LPACTH0_A { match self.bits { - false => Lpacth0::Value1, - true => Lpacth0::Value2, + false => LPACTH0_A::VALUE1, + true => LPACTH0_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth0::Value1 + *self == LPACTH0_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth0::Value2 + *self == LPACTH0_A::VALUE2 } } #[doc = "Field `LPACTH0` writer - LPACTH0 Mirror Register Update Interrupt Mask"] -pub type Lpacth0W<'a, REG> = crate::BitWriter<'a, REG, Lpacth0>; -impl<'a, REG> Lpacth0W<'a, REG> +pub type LPACTH0_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH0_A>; +impl<'a, REG> LPACTH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value1) + self.variant(LPACTH0_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value2) + self.variant(LPACTH0_A::VALUE2) } } #[doc = "LPACTH1 Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` reader - LPACTH1 Mirror Register Update Interrupt Mask"] -pub type Lpacth1R = crate::BitReader; -impl Lpacth1R { +pub type LPACTH1_R = crate::BitReader; +impl LPACTH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth1 { + pub const fn variant(&self) -> LPACTH1_A { match self.bits { - false => Lpacth1::Value1, - true => Lpacth1::Value2, + false => LPACTH1_A::VALUE1, + true => LPACTH1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth1::Value1 + *self == LPACTH1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth1::Value2 + *self == LPACTH1_A::VALUE2 } } #[doc = "Field `LPACTH1` writer - LPACTH1 Mirror Register Update Interrupt Mask"] -pub type Lpacth1W<'a, REG> = crate::BitWriter<'a, REG, Lpacth1>; -impl<'a, REG> Lpacth1W<'a, REG> +pub type LPACTH1_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH1_A>; +impl<'a, REG> LPACTH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value1) + self.variant(LPACTH1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value2) + self.variant(LPACTH1_A::VALUE2) } } #[doc = "LPACST Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacst { +pub enum LPACST_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacst) -> Self { + fn from(variant: LPACST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACST` reader - LPACST Mirror Register Update Interrupt Mask"] -pub type LpacstR = crate::BitReader; -impl LpacstR { +pub type LPACST_R = crate::BitReader; +impl LPACST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacst { + pub const fn variant(&self) -> LPACST_A { match self.bits { - false => Lpacst::Value1, - true => Lpacst::Value2, + false => LPACST_A::VALUE1, + true => LPACST_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacst::Value1 + *self == LPACST_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacst::Value2 + *self == LPACST_A::VALUE2 } } #[doc = "Field `LPACST` writer - LPACST Mirror Register Update Interrupt Mask"] -pub type LpacstW<'a, REG> = crate::BitWriter<'a, REG, Lpacst>; -impl<'a, REG> LpacstW<'a, REG> +pub type LPACST_W<'a, REG> = crate::BitWriter<'a, REG, LPACST_A>; +impl<'a, REG> LPACST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacst::Value1) + self.variant(LPACST_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacst::Value2) + self.variant(LPACST_A::VALUE2) } } #[doc = "LPACCLR Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` reader - LPACCLR Mirror Register Update Interrupt Mask"] -pub type LpacclrR = crate::BitReader; -impl LpacclrR { +pub type LPACCLR_R = crate::BitReader; +impl LPACCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacclr { + pub const fn variant(&self) -> LPACCLR_A { match self.bits { - false => Lpacclr::Value1, - true => Lpacclr::Value2, + false => LPACCLR_A::VALUE1, + true => LPACCLR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacclr::Value1 + *self == LPACCLR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacclr::Value2 + *self == LPACCLR_A::VALUE2 } } #[doc = "Field `LPACCLR` writer - LPACCLR Mirror Register Update Interrupt Mask"] -pub type LpacclrW<'a, REG> = crate::BitWriter<'a, REG, Lpacclr>; -impl<'a, REG> LpacclrW<'a, REG> +pub type LPACCLR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCLR_A>; +impl<'a, REG> LPACCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value1) + self.variant(LPACCLR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value2) + self.variant(LPACCLR_A::VALUE2) } } #[doc = "LPACSET Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` reader - LPACSET Mirror Register Update Interrupt Mask"] -pub type LpacsetR = crate::BitReader; -impl LpacsetR { +pub type LPACSET_R = crate::BitReader; +impl LPACSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacset { + pub const fn variant(&self) -> LPACSET_A { match self.bits { - false => Lpacset::Value1, - true => Lpacset::Value2, + false => LPACSET_A::VALUE1, + true => LPACSET_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacset::Value1 + *self == LPACSET_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacset::Value2 + *self == LPACSET_A::VALUE2 } } #[doc = "Field `LPACSET` writer - LPACSET Mirror Register Update Interrupt Mask"] -pub type LpacsetW<'a, REG> = crate::BitWriter<'a, REG, Lpacset>; -impl<'a, REG> LpacsetW<'a, REG> +pub type LPACSET_W<'a, REG> = crate::BitWriter<'a, REG, LPACSET_A>; +impl<'a, REG> LPACSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacset::Value1) + self.variant(LPACSET_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacset::Value2) + self.variant(LPACSET_A::VALUE2) } } #[doc = "HINTST Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintst { +pub enum HINTST_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintst) -> Self { + fn from(variant: HINTST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTST` reader - HINTST Mirror Register Update Interrupt Mask"] -pub type HintstR = crate::BitReader; -impl HintstR { +pub type HINTST_R = crate::BitReader; +impl HINTST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintst { + pub const fn variant(&self) -> HINTST_A { match self.bits { - false => Hintst::Value1, - true => Hintst::Value2, + false => HINTST_A::VALUE1, + true => HINTST_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintst::Value1 + *self == HINTST_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintst::Value2 + *self == HINTST_A::VALUE2 } } #[doc = "Field `HINTST` writer - HINTST Mirror Register Update Interrupt Mask"] -pub type HintstW<'a, REG> = crate::BitWriter<'a, REG, Hintst>; -impl<'a, REG> HintstW<'a, REG> +pub type HINTST_W<'a, REG> = crate::BitWriter<'a, REG, HINTST_A>; +impl<'a, REG> HINTST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintst::Value1) + self.variant(HINTST_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintst::Value2) + self.variant(HINTST_A::VALUE2) } } #[doc = "HINTCLR Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` reader - HINTCLR Mirror Register Update Interrupt Mask"] -pub type HintclrR = crate::BitReader; -impl HintclrR { +pub type HINTCLR_R = crate::BitReader; +impl HINTCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintclr { + pub const fn variant(&self) -> HINTCLR_A { match self.bits { - false => Hintclr::Value1, - true => Hintclr::Value2, + false => HINTCLR_A::VALUE1, + true => HINTCLR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintclr::Value1 + *self == HINTCLR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintclr::Value2 + *self == HINTCLR_A::VALUE2 } } #[doc = "Field `HINTCLR` writer - HINTCLR Mirror Register Update Interrupt Mask"] -pub type HintclrW<'a, REG> = crate::BitWriter<'a, REG, Hintclr>; -impl<'a, REG> HintclrW<'a, REG> +pub type HINTCLR_W<'a, REG> = crate::BitWriter<'a, REG, HINTCLR_A>; +impl<'a, REG> HINTCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintclr::Value1) + self.variant(HINTCLR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintclr::Value2) + self.variant(HINTCLR_A::VALUE2) } } #[doc = "HINTSET Mirror Register Update Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` reader - HINTSET Mirror Register Update Interrupt Mask"] -pub type HintsetR = crate::BitReader; -impl HintsetR { +pub type HINTSET_R = crate::BitReader; +impl HINTSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintset { + pub const fn variant(&self) -> HINTSET_A { match self.bits { - false => Hintset::Value1, - true => Hintset::Value2, + false => HINTSET_A::VALUE1, + true => HINTSET_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintset::Value1 + *self == HINTSET_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintset::Value2 + *self == HINTSET_A::VALUE2 } } #[doc = "Field `HINTSET` writer - HINTSET Mirror Register Update Interrupt Mask"] -pub type HintsetW<'a, REG> = crate::BitWriter<'a, REG, Hintset>; -impl<'a, REG> HintsetW<'a, REG> +pub type HINTSET_W<'a, REG> = crate::BitWriter<'a, REG, HINTSET_A>; +impl<'a, REG> HINTSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintset::Value1) + self.variant(HINTSET_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintset::Value2) + self.variant(HINTSET_A::VALUE2) } } #[doc = "HDCLR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdclr { +pub enum HDCLR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdclr) -> Self { + fn from(variant: HDCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Mask"] -pub type HdclrR = crate::BitReader; -impl HdclrR { +pub type HDCLR_R = crate::BitReader; +impl HDCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdclr { + pub const fn variant(&self) -> HDCLR_A { match self.bits { - false => Hdclr::Value1, - true => Hdclr::Value2, + false => HDCLR_A::VALUE1, + true => HDCLR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdclr::Value1 + *self == HDCLR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdclr::Value2 + *self == HDCLR_A::VALUE2 } } #[doc = "Field `HDCLR` writer - HDCLR Mirror Register Update Mask"] -pub type HdclrW<'a, REG> = crate::BitWriter<'a, REG, Hdclr>; -impl<'a, REG> HdclrW<'a, REG> +pub type HDCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCLR_A>; +impl<'a, REG> HDCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdclr::Value1) + self.variant(HDCLR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdclr::Value2) + self.variant(HDCLR_A::VALUE2) } } #[doc = "HDSET Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdset { +pub enum HDSET_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdset) -> Self { + fn from(variant: HDSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` reader - HDSET Mirror Register Update Mask"] -pub type HdsetR = crate::BitReader; -impl HdsetR { +pub type HDSET_R = crate::BitReader; +impl HDSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdset { + pub const fn variant(&self) -> HDSET_A { match self.bits { - false => Hdset::Value1, - true => Hdset::Value2, + false => HDSET_A::VALUE1, + true => HDSET_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdset::Value1 + *self == HDSET_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdset::Value2 + *self == HDSET_A::VALUE2 } } #[doc = "Field `HDSET` writer - HDSET Mirror Register Update Mask"] -pub type HdsetW<'a, REG> = crate::BitWriter<'a, REG, Hdset>; -impl<'a, REG> HdsetW<'a, REG> +pub type HDSET_W<'a, REG> = crate::BitWriter<'a, REG, HDSET_A>; +impl<'a, REG> HDSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdset::Value1) + self.variant(HDSET_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdset::Value2) + self.variant(HDSET_A::VALUE2) } } #[doc = "HDCR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` reader - HDCR Mirror Register Update Mask"] -pub type HdcrR = crate::BitReader; -impl HdcrR { +pub type HDCR_R = crate::BitReader; +impl HDCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdcr { + pub const fn variant(&self) -> HDCR_A { match self.bits { - false => Hdcr::Value1, - true => Hdcr::Value2, + false => HDCR_A::VALUE1, + true => HDCR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdcr::Value1 + *self == HDCR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdcr::Value2 + *self == HDCR_A::VALUE2 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Mask"] -pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; -impl<'a, REG> HdcrW<'a, REG> +pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_A>; +impl<'a, REG> HDCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdcr::Value1) + self.variant(HDCR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdcr::Value2) + self.variant(HDCR_A::VALUE2) } } #[doc = "OSCSICTRL Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Mask"] -pub type OscsictrlR = crate::BitReader; -impl OscsictrlR { +pub type OSCSICTRL_R = crate::BitReader; +impl OSCSICTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscsictrl { + pub const fn variant(&self) -> OSCSICTRL_A { match self.bits { - false => Oscsictrl::Value1, - true => Oscsictrl::Value2, + false => OSCSICTRL_A::VALUE1, + true => OSCSICTRL_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscsictrl::Value1 + *self == OSCSICTRL_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscsictrl::Value2 + *self == OSCSICTRL_A::VALUE2 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Mask"] -pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; -impl<'a, REG> OscsictrlW<'a, REG> +pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_A>; +impl<'a, REG> OSCSICTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value1) + self.variant(OSCSICTRL_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value2) + self.variant(OSCSICTRL_A::VALUE2) } } #[doc = "OSCULCTRL Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Mask"] -pub type OsculctrlR = crate::BitReader; -impl OsculctrlR { +pub type OSCULCTRL_R = crate::BitReader; +impl OSCULCTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Osculctrl { + pub const fn variant(&self) -> OSCULCTRL_A { match self.bits { - false => Osculctrl::Value1, - true => Osculctrl::Value2, + false => OSCULCTRL_A::VALUE1, + true => OSCULCTRL_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Osculctrl::Value1 + *self == OSCULCTRL_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Osculctrl::Value2 + *self == OSCULCTRL_A::VALUE2 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Mask"] -pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; -impl<'a, REG> OsculctrlW<'a, REG> +pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_A>; +impl<'a, REG> OSCULCTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value1) + self.variant(OSCULCTRL_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value2) + self.variant(OSCULCTRL_A::VALUE2) } } #[doc = "RTC CTR Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Mask"] -pub type RtcCtrR = crate::BitReader; -impl RtcCtrR { +pub type RTC_CTR_R = crate::BitReader; +impl RTC_CTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcCtr { + pub const fn variant(&self) -> RTC_CTR_A { match self.bits { - false => RtcCtr::Value1, - true => RtcCtr::Value2, + false => RTC_CTR_A::VALUE1, + true => RTC_CTR_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcCtr::Value1 + *self == RTC_CTR_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcCtr::Value2 + *self == RTC_CTR_A::VALUE2 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Mask"] -pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; -impl<'a, REG> RtcCtrW<'a, REG> +pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_A>; +impl<'a, REG> RTC_CTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value1) + self.variant(RTC_CTR_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value2) + self.variant(RTC_CTR_A::VALUE2) } } #[doc = "RTC ATIM0 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Mask"] -pub type RtcAtim0R = crate::BitReader; -impl RtcAtim0R { +pub type RTC_ATIM0_R = crate::BitReader; +impl RTC_ATIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim0 { + pub const fn variant(&self) -> RTC_ATIM0_A { match self.bits { - false => RtcAtim0::Value1, - true => RtcAtim0::Value2, + false => RTC_ATIM0_A::VALUE1, + true => RTC_ATIM0_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim0::Value1 + *self == RTC_ATIM0_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim0::Value2 + *self == RTC_ATIM0_A::VALUE2 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Mask"] -pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; -impl<'a, REG> RtcAtim0W<'a, REG> +pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_A>; +impl<'a, REG> RTC_ATIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value1) + self.variant(RTC_ATIM0_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value2) + self.variant(RTC_ATIM0_A::VALUE2) } } #[doc = "RTC ATIM1 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Mask"] -pub type RtcAtim1R = crate::BitReader; -impl RtcAtim1R { +pub type RTC_ATIM1_R = crate::BitReader; +impl RTC_ATIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim1 { + pub const fn variant(&self) -> RTC_ATIM1_A { match self.bits { - false => RtcAtim1::Value1, - true => RtcAtim1::Value2, + false => RTC_ATIM1_A::VALUE1, + true => RTC_ATIM1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim1::Value1 + *self == RTC_ATIM1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim1::Value2 + *self == RTC_ATIM1_A::VALUE2 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Mask"] -pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; -impl<'a, REG> RtcAtim1W<'a, REG> +pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_A>; +impl<'a, REG> RTC_ATIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value1) + self.variant(RTC_ATIM1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value2) + self.variant(RTC_ATIM1_A::VALUE2) } } #[doc = "RTC TIM0 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Mask"] -pub type RtcTim0R = crate::BitReader; -impl RtcTim0R { +pub type RTC_TIM0_R = crate::BitReader; +impl RTC_TIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim0 { + pub const fn variant(&self) -> RTC_TIM0_A { match self.bits { - false => RtcTim0::Value1, - true => RtcTim0::Value2, + false => RTC_TIM0_A::VALUE1, + true => RTC_TIM0_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim0::Value1 + *self == RTC_TIM0_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim0::Value2 + *self == RTC_TIM0_A::VALUE2 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Mask"] -pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; -impl<'a, REG> RtcTim0W<'a, REG> +pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_A>; +impl<'a, REG> RTC_TIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value1) + self.variant(RTC_TIM0_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value2) + self.variant(RTC_TIM0_A::VALUE2) } } #[doc = "RTC TIM1 Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Mask"] -pub type RtcTim1R = crate::BitReader; -impl RtcTim1R { +pub type RTC_TIM1_R = crate::BitReader; +impl RTC_TIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim1 { + pub const fn variant(&self) -> RTC_TIM1_A { match self.bits { - false => RtcTim1::Value1, - true => RtcTim1::Value2, + false => RTC_TIM1_A::VALUE1, + true => RTC_TIM1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim1::Value1 + *self == RTC_TIM1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim1::Value2 + *self == RTC_TIM1_A::VALUE2 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Mask"] -pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; -impl<'a, REG> RtcTim1W<'a, REG> +pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_A>; +impl<'a, REG> RTC_TIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value1) + self.variant(RTC_TIM1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value2) + self.variant(RTC_TIM1_A::VALUE2) } } #[doc = "Retention Memory Mirror Register Update Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Mask"] -pub type RmxR = crate::BitReader; -impl RmxR { +pub type RMX_R = crate::BitReader; +impl RMX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rmx { + pub const fn variant(&self) -> RMX_A { match self.bits { - false => Rmx::Value1, - true => Rmx::Value2, + false => RMX_A::VALUE1, + true => RMX_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rmx::Value1 + *self == RMX_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rmx::Value2 + *self == RMX_A::VALUE2 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Mask"] -pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; -impl<'a, REG> RmxW<'a, REG> +pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_A>; +impl<'a, REG> RMX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rmx::Value1) + self.variant(RMX_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rmx::Value2) + self.variant(RMX_A::VALUE2) } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"] #[inline(always)] - pub fn prwarn(&self) -> PrwarnR { - PrwarnR::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PRWARN_R { + PRWARN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Mask"] #[inline(always)] - pub fn pi(&self) -> PiR { - PiR::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PI_R { + PI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Alarm Interrupt Mask"] #[inline(always)] - pub fn ai(&self) -> AiR { - AiR::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AI_R { + AI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"] #[inline(always)] - pub fn dlrovr(&self) -> DlrovrR { - DlrovrR::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DLROVR_R { + DLROVR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpaccr(&self) -> LpaccrR { - LpaccrR::new(((self.bits >> 6) & 1) != 0) + pub fn lpaccr(&self) -> LPACCR_R { + LPACCR_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpacth0(&self) -> Lpacth0R { - Lpacth0R::new(((self.bits >> 7) & 1) != 0) + pub fn lpacth0(&self) -> LPACTH0_R { + LPACTH0_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpacth1(&self) -> Lpacth1R { - Lpacth1R::new(((self.bits >> 8) & 1) != 0) + pub fn lpacth1(&self) -> LPACTH1_R { + LPACTH1_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpacst(&self) -> LpacstR { - LpacstR::new(((self.bits >> 9) & 1) != 0) + pub fn lpacst(&self) -> LPACST_R { + LPACST_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpacclr(&self) -> LpacclrR { - LpacclrR::new(((self.bits >> 10) & 1) != 0) + pub fn lpacclr(&self) -> LPACCLR_R { + LPACCLR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn lpacset(&self) -> LpacsetR { - LpacsetR::new(((self.bits >> 11) & 1) != 0) + pub fn lpacset(&self) -> LPACSET_R { + LPACSET_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn hintst(&self) -> HintstR { - HintstR::new(((self.bits >> 12) & 1) != 0) + pub fn hintst(&self) -> HINTST_R { + HINTST_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn hintclr(&self) -> HintclrR { - HintclrR::new(((self.bits >> 13) & 1) != 0) + pub fn hintclr(&self) -> HINTCLR_R { + HINTCLR_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Mask"] #[inline(always)] - pub fn hintset(&self) -> HintsetR { - HintsetR::new(((self.bits >> 14) & 1) != 0) + pub fn hintset(&self) -> HINTSET_R { + HINTSET_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"] #[inline(always)] - pub fn hdclr(&self) -> HdclrR { - HdclrR::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HDCLR_R { + HDCLR_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Mask"] #[inline(always)] - pub fn hdset(&self) -> HdsetR { - HdsetR::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HDSET_R { + HDSET_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Mask"] #[inline(always)] - pub fn hdcr(&self) -> HdcrR { - HdcrR::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HDCR_R { + HDCR_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"] #[inline(always)] - pub fn oscsictrl(&self) -> OscsictrlR { - OscsictrlR::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OSCSICTRL_R { + OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"] #[inline(always)] - pub fn osculctrl(&self) -> OsculctrlR { - OsculctrlR::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OSCULCTRL_R { + OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_ctr(&self) -> RtcCtrR { - RtcCtrR::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RTC_CTR_R { + RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_atim0(&self) -> RtcAtim0R { - RtcAtim0R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RTC_ATIM0_R { + RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_atim1(&self) -> RtcAtim1R { - RtcAtim1R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RTC_ATIM1_R { + RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_tim0(&self) -> RtcTim0R { - RtcTim0R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RTC_TIM0_R { + RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"] #[inline(always)] - pub fn rtc_tim1(&self) -> RtcTim1R { - RtcTim1R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RTC_TIM1_R { + RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"] #[inline(always)] - pub fn rmx(&self) -> RmxR { - RmxR::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RMX_R { + RMX_R::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PrwarnW { - PrwarnW::new(self, 0) + pub fn prwarn(&mut self) -> PRWARN_W { + PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Mask"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PiW { - PiW::new(self, 1) + pub fn pi(&mut self) -> PI_W { + PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Mask"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AiW { - AiW::new(self, 2) + pub fn ai(&mut self) -> AI_W { + AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DlrovrW { - DlrovrW::new(self, 3) + pub fn dlrovr(&mut self) -> DLROVR_W { + DLROVR_W::new(self, 3) } #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpaccr(&mut self) -> LpaccrW { - LpaccrW::new(self, 6) + pub fn lpaccr(&mut self) -> LPACCR_W { + LPACCR_W::new(self, 6) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpacth0(&mut self) -> Lpacth0W { - Lpacth0W::new(self, 7) + pub fn lpacth0(&mut self) -> LPACTH0_W { + LPACTH0_W::new(self, 7) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpacth1(&mut self) -> Lpacth1W { - Lpacth1W::new(self, 8) + pub fn lpacth1(&mut self) -> LPACTH1_W { + LPACTH1_W::new(self, 8) } #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpacst(&mut self) -> LpacstW { - LpacstW::new(self, 9) + pub fn lpacst(&mut self) -> LPACST_W { + LPACST_W::new(self, 9) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpacclr(&mut self) -> LpacclrW { - LpacclrW::new(self, 10) + pub fn lpacclr(&mut self) -> LPACCLR_W { + LPACCLR_W::new(self, 10) } #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn lpacset(&mut self) -> LpacsetW { - LpacsetW::new(self, 11) + pub fn lpacset(&mut self) -> LPACSET_W { + LPACSET_W::new(self, 11) } #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn hintst(&mut self) -> HintstW { - HintstW::new(self, 12) + pub fn hintst(&mut self) -> HINTST_W { + HINTST_W::new(self, 12) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn hintclr(&mut self) -> HintclrW { - HintclrW::new(self, 13) + pub fn hintclr(&mut self) -> HINTCLR_W { + HINTCLR_W::new(self, 13) } #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Mask"] #[inline(always)] #[must_use] - pub fn hintset(&mut self) -> HintsetW { - HintsetW::new(self, 14) + pub fn hintset(&mut self) -> HINTSET_W { + HINTSET_W::new(self, 14) } #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdclr(&mut self) -> HdclrW { - HdclrW::new(self, 17) + pub fn hdclr(&mut self) -> HDCLR_W { + HDCLR_W::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdset(&mut self) -> HdsetW { - HdsetW::new(self, 18) + pub fn hdset(&mut self) -> HDSET_W { + HDSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HdcrW { - HdcrW::new(self, 19) + pub fn hdcr(&mut self) -> HDCR_W { + HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OscsictrlW { - OscsictrlW::new(self, 21) + pub fn oscsictrl(&mut self) -> OSCSICTRL_W { + OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OsculctrlW { - OsculctrlW::new(self, 23) + pub fn osculctrl(&mut self) -> OSCULCTRL_W { + OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RtcCtrW { - RtcCtrW::new(self, 24) + pub fn rtc_ctr(&mut self) -> RTC_CTR_W { + RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RtcAtim0W { - RtcAtim0W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { + RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RtcAtim1W { - RtcAtim1W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { + RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RtcTim0W { - RtcTim0W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { + RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RtcTim1W { - RtcTim1W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { + RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RmxW { - RmxW::new(self, 29) + pub fn rmx(&mut self) -> RMX_W { + RMX_W::new(self, 29) } } #[doc = "SCU Service Request Mask\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrmskSpec; -impl crate::RegisterSpec for SrmskSpec { +pub struct SRMSK_SPEC; +impl crate::RegisterSpec for SRMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srmsk::R`](R) reader structure"] -impl crate::Readable for SrmskSpec {} +impl crate::Readable for SRMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`srmsk::W`](W) writer structure"] -impl crate::Writable for SrmskSpec { +impl crate::Writable for SRMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRMSK to value 0"] -impl crate::Resettable for SrmskSpec { +impl crate::Resettable for SRMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srraw.rs b/src/scu_interrupt/srraw.rs index 74ee9c41..0eab2319 100644 --- a/src/scu_interrupt/srraw.rs +++ b/src/scu_interrupt/srraw.rs @@ -1,897 +1,897 @@ #[doc = "Register `SRRAW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "WDT pre-warning Interrupt Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: Inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status Before Masking"] -pub type PrwarnR = crate::BitReader; -impl PrwarnR { +pub type PRWARN_R = crate::BitReader; +impl PRWARN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prwarn { + pub const fn variant(&self) -> PRWARN_A { match self.bits { - false => Prwarn::Value1, - true => Prwarn::Value2, + false => PRWARN_A::VALUE1, + true => PRWARN_A::VALUE2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prwarn::Value1 + *self == PRWARN_A::VALUE1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prwarn::Value2 + *self == PRWARN_A::VALUE2 } } #[doc = "Field `PI` reader - RTC Raw Periodic Interrupt Status Before Masking"] -pub type PiR = crate::BitReader; +pub type PI_R = crate::BitReader; #[doc = "Field `AI` reader - RTC Raw Alarm Interrupt Status Before Masking"] -pub type AiR = crate::BitReader; +pub type AI_R = crate::BitReader; #[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Status Before Masking"] -pub type DlrovrR = crate::BitReader; +pub type DLROVR_R = crate::BitReader; #[doc = "LPACLR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpaccr { +pub enum LPACCR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpaccr) -> Self { + fn from(variant: LPACCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCR` reader - LPACLR Mirror Register Update Status Before Masking"] -pub type LpaccrR = crate::BitReader; -impl LpaccrR { +pub type LPACCR_R = crate::BitReader; +impl LPACCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpaccr { + pub const fn variant(&self) -> LPACCR_A { match self.bits { - false => Lpaccr::Value1, - true => Lpaccr::Value2, + false => LPACCR_A::VALUE1, + true => LPACCR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpaccr::Value1 + *self == LPACCR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpaccr::Value2 + *self == LPACCR_A::VALUE2 } } #[doc = "LPACTH0 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` reader - LPACTH0 Mirror Register Update Status Before Masking"] -pub type Lpacth0R = crate::BitReader; -impl Lpacth0R { +pub type LPACTH0_R = crate::BitReader; +impl LPACTH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth0 { + pub const fn variant(&self) -> LPACTH0_A { match self.bits { - false => Lpacth0::Value1, - true => Lpacth0::Value2, + false => LPACTH0_A::VALUE1, + true => LPACTH0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth0::Value1 + *self == LPACTH0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth0::Value2 + *self == LPACTH0_A::VALUE2 } } #[doc = "LPACTH1 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` reader - LPACTH1 Mirror Register Update Status Before Masking"] -pub type Lpacth1R = crate::BitReader; -impl Lpacth1R { +pub type LPACTH1_R = crate::BitReader; +impl LPACTH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth1 { + pub const fn variant(&self) -> LPACTH1_A { match self.bits { - false => Lpacth1::Value1, - true => Lpacth1::Value2, + false => LPACTH1_A::VALUE1, + true => LPACTH1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth1::Value1 + *self == LPACTH1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth1::Value2 + *self == LPACTH1_A::VALUE2 } } #[doc = "LPACST Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacst { +pub enum LPACST_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacst) -> Self { + fn from(variant: LPACST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACST` reader - LPACST Mirror Register Update Status Before Masking"] -pub type LpacstR = crate::BitReader; -impl LpacstR { +pub type LPACST_R = crate::BitReader; +impl LPACST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacst { + pub const fn variant(&self) -> LPACST_A { match self.bits { - false => Lpacst::Value1, - true => Lpacst::Value2, + false => LPACST_A::VALUE1, + true => LPACST_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacst::Value1 + *self == LPACST_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacst::Value2 + *self == LPACST_A::VALUE2 } } #[doc = "LPACCLR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` reader - LPACCLR Mirror Register Update Status Before Masking"] -pub type LpacclrR = crate::BitReader; -impl LpacclrR { +pub type LPACCLR_R = crate::BitReader; +impl LPACCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacclr { + pub const fn variant(&self) -> LPACCLR_A { match self.bits { - false => Lpacclr::Value1, - true => Lpacclr::Value2, + false => LPACCLR_A::VALUE1, + true => LPACCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacclr::Value1 + *self == LPACCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacclr::Value2 + *self == LPACCLR_A::VALUE2 } } #[doc = "LPACSET Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` reader - LPACSET Mirror Register Update Status Before Masking"] -pub type LpacsetR = crate::BitReader; -impl LpacsetR { +pub type LPACSET_R = crate::BitReader; +impl LPACSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacset { + pub const fn variant(&self) -> LPACSET_A { match self.bits { - false => Lpacset::Value1, - true => Lpacset::Value2, + false => LPACSET_A::VALUE1, + true => LPACSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacset::Value1 + *self == LPACSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacset::Value2 + *self == LPACSET_A::VALUE2 } } #[doc = "HINTST Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintst { +pub enum HINTST_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintst) -> Self { + fn from(variant: HINTST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTST` reader - HINTST Mirror Register Update Status Before Masking"] -pub type HintstR = crate::BitReader; -impl HintstR { +pub type HINTST_R = crate::BitReader; +impl HINTST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintst { + pub const fn variant(&self) -> HINTST_A { match self.bits { - false => Hintst::Value1, - true => Hintst::Value2, + false => HINTST_A::VALUE1, + true => HINTST_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintst::Value1 + *self == HINTST_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintst::Value2 + *self == HINTST_A::VALUE2 } } #[doc = "HINTCLR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` reader - HINTCLR Mirror Register Update Status Before Masking"] -pub type HintclrR = crate::BitReader; -impl HintclrR { +pub type HINTCLR_R = crate::BitReader; +impl HINTCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintclr { + pub const fn variant(&self) -> HINTCLR_A { match self.bits { - false => Hintclr::Value1, - true => Hintclr::Value2, + false => HINTCLR_A::VALUE1, + true => HINTCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintclr::Value1 + *self == HINTCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintclr::Value2 + *self == HINTCLR_A::VALUE2 } } #[doc = "HINTSET Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` reader - HINTSET Mirror Register Update Status Before Masking"] -pub type HintsetR = crate::BitReader; -impl HintsetR { +pub type HINTSET_R = crate::BitReader; +impl HINTSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintset { + pub const fn variant(&self) -> HINTSET_A { match self.bits { - false => Hintset::Value1, - true => Hintset::Value2, + false => HINTSET_A::VALUE1, + true => HINTSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintset::Value1 + *self == HINTSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintset::Value2 + *self == HINTSET_A::VALUE2 } } #[doc = "HDCLR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdclr { +pub enum HDCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdclr) -> Self { + fn from(variant: HDCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status Before Masking"] -pub type HdclrR = crate::BitReader; -impl HdclrR { +pub type HDCLR_R = crate::BitReader; +impl HDCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdclr { + pub const fn variant(&self) -> HDCLR_A { match self.bits { - false => Hdclr::Value1, - true => Hdclr::Value2, + false => HDCLR_A::VALUE1, + true => HDCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdclr::Value1 + *self == HDCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdclr::Value2 + *self == HDCLR_A::VALUE2 } } #[doc = "HDSET Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdset { +pub enum HDSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdset) -> Self { + fn from(variant: HDSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status Before Masking"] -pub type HdsetR = crate::BitReader; -impl HdsetR { +pub type HDSET_R = crate::BitReader; +impl HDSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdset { + pub const fn variant(&self) -> HDSET_A { match self.bits { - false => Hdset::Value1, - true => Hdset::Value2, + false => HDSET_A::VALUE1, + true => HDSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdset::Value1 + *self == HDSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdset::Value2 + *self == HDSET_A::VALUE2 } } #[doc = "HDCR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status Before Masking"] -pub type HdcrR = crate::BitReader; -impl HdcrR { +pub type HDCR_R = crate::BitReader; +impl HDCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdcr { + pub const fn variant(&self) -> HDCR_A { match self.bits { - false => Hdcr::Value1, - true => Hdcr::Value2, + false => HDCR_A::VALUE1, + true => HDCR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdcr::Value1 + *self == HDCR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdcr::Value2 + *self == HDCR_A::VALUE2 } } #[doc = "OSCSICTRL Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status Before Masking"] -pub type OscsictrlR = crate::BitReader; -impl OscsictrlR { +pub type OSCSICTRL_R = crate::BitReader; +impl OSCSICTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscsictrl { + pub const fn variant(&self) -> OSCSICTRL_A { match self.bits { - false => Oscsictrl::Value1, - true => Oscsictrl::Value2, + false => OSCSICTRL_A::VALUE1, + true => OSCSICTRL_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscsictrl::Value1 + *self == OSCSICTRL_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscsictrl::Value2 + *self == OSCSICTRL_A::VALUE2 } } #[doc = "OSCULCTRL Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status Before Masking"] -pub type OsculctrlR = crate::BitReader; -impl OsculctrlR { +pub type OSCULCTRL_R = crate::BitReader; +impl OSCULCTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Osculctrl { + pub const fn variant(&self) -> OSCULCTRL_A { match self.bits { - false => Osculctrl::Value1, - true => Osculctrl::Value2, + false => OSCULCTRL_A::VALUE1, + true => OSCULCTRL_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Osculctrl::Value1 + *self == OSCULCTRL_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Osculctrl::Value2 + *self == OSCULCTRL_A::VALUE2 } } #[doc = "RTC CTR Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status Before Masking"] -pub type RtcCtrR = crate::BitReader; -impl RtcCtrR { +pub type RTC_CTR_R = crate::BitReader; +impl RTC_CTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcCtr { + pub const fn variant(&self) -> RTC_CTR_A { match self.bits { - false => RtcCtr::Value1, - true => RtcCtr::Value2, + false => RTC_CTR_A::VALUE1, + true => RTC_CTR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcCtr::Value1 + *self == RTC_CTR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcCtr::Value2 + *self == RTC_CTR_A::VALUE2 } } #[doc = "RTC ATIM0 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status Before Masking"] -pub type RtcAtim0R = crate::BitReader; -impl RtcAtim0R { +pub type RTC_ATIM0_R = crate::BitReader; +impl RTC_ATIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim0 { + pub const fn variant(&self) -> RTC_ATIM0_A { match self.bits { - false => RtcAtim0::Value1, - true => RtcAtim0::Value2, + false => RTC_ATIM0_A::VALUE1, + true => RTC_ATIM0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim0::Value1 + *self == RTC_ATIM0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim0::Value2 + *self == RTC_ATIM0_A::VALUE2 } } #[doc = "RTC ATIM1 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status Before Masking"] -pub type RtcAtim1R = crate::BitReader; -impl RtcAtim1R { +pub type RTC_ATIM1_R = crate::BitReader; +impl RTC_ATIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim1 { + pub const fn variant(&self) -> RTC_ATIM1_A { match self.bits { - false => RtcAtim1::Value1, - true => RtcAtim1::Value2, + false => RTC_ATIM1_A::VALUE1, + true => RTC_ATIM1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim1::Value1 + *self == RTC_ATIM1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim1::Value2 + *self == RTC_ATIM1_A::VALUE2 } } #[doc = "RTC TIM0 Mirror Register Update Before Masking Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Before Masking Status"] -pub type RtcTim0R = crate::BitReader; -impl RtcTim0R { +pub type RTC_TIM0_R = crate::BitReader; +impl RTC_TIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim0 { + pub const fn variant(&self) -> RTC_TIM0_A { match self.bits { - false => RtcTim0::Value1, - true => RtcTim0::Value2, + false => RTC_TIM0_A::VALUE1, + true => RTC_TIM0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim0::Value1 + *self == RTC_TIM0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim0::Value2 + *self == RTC_TIM0_A::VALUE2 } } #[doc = "RTC TIM1 Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status Before Masking"] -pub type RtcTim1R = crate::BitReader; -impl RtcTim1R { +pub type RTC_TIM1_R = crate::BitReader; +impl RTC_TIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim1 { + pub const fn variant(&self) -> RTC_TIM1_A { match self.bits { - false => RtcTim1::Value1, - true => RtcTim1::Value2, + false => RTC_TIM1_A::VALUE1, + true => RTC_TIM1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim1::Value1 + *self == RTC_TIM1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim1::Value2 + *self == RTC_TIM1_A::VALUE2 } } #[doc = "Retention Memory Mirror Register Update Status Before Masking\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status Before Masking"] -pub type RmxR = crate::BitReader; -impl RmxR { +pub type RMX_R = crate::BitReader; +impl RMX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rmx { + pub const fn variant(&self) -> RMX_A { match self.bits { - false => Rmx::Value1, - true => Rmx::Value2, + false => RMX_A::VALUE1, + true => RMX_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rmx::Value1 + *self == RMX_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rmx::Value2 + *self == RMX_A::VALUE2 } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Status Before Masking"] #[inline(always)] - pub fn prwarn(&self) -> PrwarnR { - PrwarnR::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PRWARN_R { + PRWARN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Raw Periodic Interrupt Status Before Masking"] #[inline(always)] - pub fn pi(&self) -> PiR { - PiR::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PI_R { + PI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - RTC Raw Alarm Interrupt Status Before Masking"] #[inline(always)] - pub fn ai(&self) -> AiR { - AiR::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AI_R { + AI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Status Before Masking"] #[inline(always)] - pub fn dlrovr(&self) -> DlrovrR { - DlrovrR::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DLROVR_R { + DLROVR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - LPACLR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpaccr(&self) -> LpaccrR { - LpaccrR::new(((self.bits >> 6) & 1) != 0) + pub fn lpaccr(&self) -> LPACCR_R { + LPACCR_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpacth0(&self) -> Lpacth0R { - Lpacth0R::new(((self.bits >> 7) & 1) != 0) + pub fn lpacth0(&self) -> LPACTH0_R { + LPACTH0_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpacth1(&self) -> Lpacth1R { - Lpacth1R::new(((self.bits >> 8) & 1) != 0) + pub fn lpacth1(&self) -> LPACTH1_R { + LPACTH1_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LPACST Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpacst(&self) -> LpacstR { - LpacstR::new(((self.bits >> 9) & 1) != 0) + pub fn lpacst(&self) -> LPACST_R { + LPACST_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpacclr(&self) -> LpacclrR { - LpacclrR::new(((self.bits >> 10) & 1) != 0) + pub fn lpacclr(&self) -> LPACCLR_R { + LPACCLR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - LPACSET Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn lpacset(&self) -> LpacsetR { - LpacsetR::new(((self.bits >> 11) & 1) != 0) + pub fn lpacset(&self) -> LPACSET_R { + LPACSET_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - HINTST Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hintst(&self) -> HintstR { - HintstR::new(((self.bits >> 12) & 1) != 0) + pub fn hintst(&self) -> HINTST_R { + HINTST_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hintclr(&self) -> HintclrR { - HintclrR::new(((self.bits >> 13) & 1) != 0) + pub fn hintclr(&self) -> HINTCLR_R { + HINTCLR_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - HINTSET Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hintset(&self) -> HintsetR { - HintsetR::new(((self.bits >> 14) & 1) != 0) + pub fn hintset(&self) -> HINTSET_R { + HINTSET_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdclr(&self) -> HdclrR { - HdclrR::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HDCLR_R { + HDCLR_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdset(&self) -> HdsetR { - HdsetR::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HDSET_R { + HDSET_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn hdcr(&self) -> HdcrR { - HdcrR::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HDCR_R { + HDCR_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn oscsictrl(&self) -> OscsictrlR { - OscsictrlR::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OSCSICTRL_R { + OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn osculctrl(&self) -> OsculctrlR { - OsculctrlR::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OSCULCTRL_R { + OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_ctr(&self) -> RtcCtrR { - RtcCtrR::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RTC_CTR_R { + RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_atim0(&self) -> RtcAtim0R { - RtcAtim0R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RTC_ATIM0_R { + RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_atim1(&self) -> RtcAtim1R { - RtcAtim1R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RTC_ATIM1_R { + RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Before Masking Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RtcTim0R { - RtcTim0R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RTC_TIM0_R { + RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rtc_tim1(&self) -> RtcTim1R { - RtcTim1R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RTC_TIM1_R { + RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Status Before Masking"] #[inline(always)] - pub fn rmx(&self) -> RmxR { - RmxR::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RMX_R { + RMX_R::new(((self.bits >> 29) & 1) != 0) } } #[doc = "SCU Raw Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrrawSpec; -impl crate::RegisterSpec for SrrawSpec { +pub struct SRRAW_SPEC; +impl crate::RegisterSpec for SRRAW_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srraw::R`](R) reader structure"] -impl crate::Readable for SrrawSpec {} +impl crate::Readable for SRRAW_SPEC {} #[doc = "`reset()` method sets SRRAW to value 0"] -impl crate::Resettable for SrrawSpec { +impl crate::Resettable for SRRAW_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srset.rs b/src/scu_interrupt/srset.rs index 07093488..b500a14b 100644 --- a/src/scu_interrupt/srset.rs +++ b/src/scu_interrupt/srset.rs @@ -1,907 +1,907 @@ #[doc = "Register `SRSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT pre-warning Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` writer - WDT pre-warning Interrupt Set"] -pub type PrwarnW<'a, REG> = crate::BitWriter<'a, REG, Prwarn>; -impl<'a, REG> PrwarnW<'a, REG> +pub type PRWARN_W<'a, REG> = crate::BitWriter<'a, REG, PRWARN_A>; +impl<'a, REG> PRWARN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prwarn::Value1) + self.variant(PRWARN_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prwarn::Value2) + self.variant(PRWARN_A::VALUE2) } } #[doc = "RTC Periodic Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pi { +pub enum PI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pi) -> Self { + fn from(variant: PI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PI` writer - RTC Periodic Interrupt Set"] -pub type PiW<'a, REG> = crate::BitWriter<'a, REG, Pi>; -impl<'a, REG> PiW<'a, REG> +pub type PI_W<'a, REG> = crate::BitWriter<'a, REG, PI_A>; +impl<'a, REG> PI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pi::Value1) + self.variant(PI_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pi::Value2) + self.variant(PI_A::VALUE2) } } #[doc = "RTC Alarm Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ai { +pub enum AI_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ai) -> Self { + fn from(variant: AI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AI` writer - RTC Alarm Interrupt Set"] -pub type AiW<'a, REG> = crate::BitWriter<'a, REG, Ai>; -impl<'a, REG> AiW<'a, REG> +pub type AI_W<'a, REG> = crate::BitWriter<'a, REG, AI_A>; +impl<'a, REG> AI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ai::Value1) + self.variant(AI_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ai::Value2) + self.variant(AI_A::VALUE2) } } #[doc = "DLR Request Overrun Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlrovr { +pub enum DLROVR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlrovr) -> Self { + fn from(variant: DLROVR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLROVR` writer - DLR Request Overrun Interrupt Set"] -pub type DlrovrW<'a, REG> = crate::BitWriter<'a, REG, Dlrovr>; -impl<'a, REG> DlrovrW<'a, REG> +pub type DLROVR_W<'a, REG> = crate::BitWriter<'a, REG, DLROVR_A>; +impl<'a, REG> DLROVR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value1) + self.variant(DLROVR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlrovr::Value2) + self.variant(DLROVR_A::VALUE2) } } #[doc = "LPACLR Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpaccr { +pub enum LPACCR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpaccr) -> Self { + fn from(variant: LPACCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCR` writer - LPACLR Mirror Register Update Interrupt Set"] -pub type LpaccrW<'a, REG> = crate::BitWriter<'a, REG, Lpaccr>; -impl<'a, REG> LpaccrW<'a, REG> +pub type LPACCR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCR_A>; +impl<'a, REG> LPACCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value1) + self.variant(LPACCR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpaccr::Value2) + self.variant(LPACCR_A::VALUE2) } } #[doc = "LPACTH0 Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` writer - LPACTH0 Mirror Register Update Interrupt Set"] -pub type Lpacth0W<'a, REG> = crate::BitWriter<'a, REG, Lpacth0>; -impl<'a, REG> Lpacth0W<'a, REG> +pub type LPACTH0_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH0_A>; +impl<'a, REG> LPACTH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value1) + self.variant(LPACTH0_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth0::Value2) + self.variant(LPACTH0_A::VALUE2) } } #[doc = "LPACTH1 Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` writer - LPACTH1 Mirror Register Update Interrupt Set"] -pub type Lpacth1W<'a, REG> = crate::BitWriter<'a, REG, Lpacth1>; -impl<'a, REG> Lpacth1W<'a, REG> +pub type LPACTH1_W<'a, REG> = crate::BitWriter<'a, REG, LPACTH1_A>; +impl<'a, REG> LPACTH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value1) + self.variant(LPACTH1_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacth1::Value2) + self.variant(LPACTH1_A::VALUE2) } } #[doc = "LPACST Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacst { +pub enum LPACST_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacst) -> Self { + fn from(variant: LPACST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACST` writer - LPACST Mirror Register Update Interrupt Set"] -pub type LpacstW<'a, REG> = crate::BitWriter<'a, REG, Lpacst>; -impl<'a, REG> LpacstW<'a, REG> +pub type LPACST_W<'a, REG> = crate::BitWriter<'a, REG, LPACST_A>; +impl<'a, REG> LPACST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacst::Value1) + self.variant(LPACST_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacst::Value2) + self.variant(LPACST_A::VALUE2) } } #[doc = "LPACCLR Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` writer - LPACCLR Mirror Register Update Interrupt Set"] -pub type LpacclrW<'a, REG> = crate::BitWriter<'a, REG, Lpacclr>; -impl<'a, REG> LpacclrW<'a, REG> +pub type LPACCLR_W<'a, REG> = crate::BitWriter<'a, REG, LPACCLR_A>; +impl<'a, REG> LPACCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value1) + self.variant(LPACCLR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacclr::Value2) + self.variant(LPACCLR_A::VALUE2) } } #[doc = "LPACSET Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` writer - LPACSET Mirror Register Update Interrupt Set"] -pub type LpacsetW<'a, REG> = crate::BitWriter<'a, REG, Lpacset>; -impl<'a, REG> LpacsetW<'a, REG> +pub type LPACSET_W<'a, REG> = crate::BitWriter<'a, REG, LPACSET_A>; +impl<'a, REG> LPACSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lpacset::Value1) + self.variant(LPACSET_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lpacset::Value2) + self.variant(LPACSET_A::VALUE2) } } #[doc = "HINTST Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintst { +pub enum HINTST_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintst) -> Self { + fn from(variant: HINTST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTST` writer - HINTST Mirror Register Update Interrupt Set"] -pub type HintstW<'a, REG> = crate::BitWriter<'a, REG, Hintst>; -impl<'a, REG> HintstW<'a, REG> +pub type HINTST_W<'a, REG> = crate::BitWriter<'a, REG, HINTST_A>; +impl<'a, REG> HINTST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintst::Value1) + self.variant(HINTST_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintst::Value2) + self.variant(HINTST_A::VALUE2) } } #[doc = "HINTCLR Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` writer - HINTCLR Mirror Register Update Interrupt Set"] -pub type HintclrW<'a, REG> = crate::BitWriter<'a, REG, Hintclr>; -impl<'a, REG> HintclrW<'a, REG> +pub type HINTCLR_W<'a, REG> = crate::BitWriter<'a, REG, HINTCLR_A>; +impl<'a, REG> HINTCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintclr::Value1) + self.variant(HINTCLR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintclr::Value2) + self.variant(HINTCLR_A::VALUE2) } } #[doc = "HINTSET Mirror Register Update Interrupt Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` writer - HINTSET Mirror Register Update Interrupt Set"] -pub type HintsetW<'a, REG> = crate::BitWriter<'a, REG, Hintset>; -impl<'a, REG> HintsetW<'a, REG> +pub type HINTSET_W<'a, REG> = crate::BitWriter<'a, REG, HINTSET_A>; +impl<'a, REG> HINTSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hintset::Value1) + self.variant(HINTSET_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hintset::Value2) + self.variant(HINTSET_A::VALUE2) } } #[doc = "HDCRCLR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcrclr { +pub enum HDCRCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcrclr) -> Self { + fn from(variant: HDCRCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCRCLR` writer - HDCRCLR Mirror Register Update Set"] -pub type HdcrclrW<'a, REG> = crate::BitWriter<'a, REG, Hdcrclr>; -impl<'a, REG> HdcrclrW<'a, REG> +pub type HDCRCLR_W<'a, REG> = crate::BitWriter<'a, REG, HDCRCLR_A>; +impl<'a, REG> HDCRCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdcrclr::Value1) + self.variant(HDCRCLR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdcrclr::Value2) + self.variant(HDCRCLR_A::VALUE2) } } #[doc = "HDCRSET Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcrset { +pub enum HDCRSET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcrset) -> Self { + fn from(variant: HDCRSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCRSET` writer - HDCRSET Mirror Register Update Set"] -pub type HdcrsetW<'a, REG> = crate::BitWriter<'a, REG, Hdcrset>; -impl<'a, REG> HdcrsetW<'a, REG> +pub type HDCRSET_W<'a, REG> = crate::BitWriter<'a, REG, HDCRSET_A>; +impl<'a, REG> HDCRSET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdcrset::Value1) + self.variant(HDCRSET_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdcrset::Value2) + self.variant(HDCRSET_A::VALUE2) } } #[doc = "HDCR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` writer - HDCR Mirror Register Update Set"] -pub type HdcrW<'a, REG> = crate::BitWriter<'a, REG, Hdcr>; -impl<'a, REG> HdcrW<'a, REG> +pub type HDCR_W<'a, REG> = crate::BitWriter<'a, REG, HDCR_A>; +impl<'a, REG> HDCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hdcr::Value1) + self.variant(HDCR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hdcr::Value2) + self.variant(HDCR_A::VALUE2) } } #[doc = "OSCSICTRL Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` writer - OSCSICTRL Mirror Register Update Set"] -pub type OscsictrlW<'a, REG> = crate::BitWriter<'a, REG, Oscsictrl>; -impl<'a, REG> OscsictrlW<'a, REG> +pub type OSCSICTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCSICTRL_A>; +impl<'a, REG> OSCSICTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value1) + self.variant(OSCSICTRL_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscsictrl::Value2) + self.variant(OSCSICTRL_A::VALUE2) } } #[doc = "OSCULCTRL Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` writer - OSCULCTRL Mirror Register Update Set"] -pub type OsculctrlW<'a, REG> = crate::BitWriter<'a, REG, Osculctrl>; -impl<'a, REG> OsculctrlW<'a, REG> +pub type OSCULCTRL_W<'a, REG> = crate::BitWriter<'a, REG, OSCULCTRL_A>; +impl<'a, REG> OSCULCTRL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value1) + self.variant(OSCULCTRL_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Osculctrl::Value2) + self.variant(OSCULCTRL_A::VALUE2) } } #[doc = "RTC CTR Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` writer - RTC CTR Mirror Register Update Set"] -pub type RtcCtrW<'a, REG> = crate::BitWriter<'a, REG, RtcCtr>; -impl<'a, REG> RtcCtrW<'a, REG> +pub type RTC_CTR_W<'a, REG> = crate::BitWriter<'a, REG, RTC_CTR_A>; +impl<'a, REG> RTC_CTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value1) + self.variant(RTC_CTR_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcCtr::Value2) + self.variant(RTC_CTR_A::VALUE2) } } #[doc = "RTC ATIM0 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` writer - RTC ATIM0 Mirror Register Update Set"] -pub type RtcAtim0W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim0>; -impl<'a, REG> RtcAtim0W<'a, REG> +pub type RTC_ATIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM0_A>; +impl<'a, REG> RTC_ATIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value1) + self.variant(RTC_ATIM0_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim0::Value2) + self.variant(RTC_ATIM0_A::VALUE2) } } #[doc = "RTC ATIM1 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` writer - RTC ATIM1 Mirror Register Update Set"] -pub type RtcAtim1W<'a, REG> = crate::BitWriter<'a, REG, RtcAtim1>; -impl<'a, REG> RtcAtim1W<'a, REG> +pub type RTC_ATIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_ATIM1_A>; +impl<'a, REG> RTC_ATIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value1) + self.variant(RTC_ATIM1_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcAtim1::Value2) + self.variant(RTC_ATIM1_A::VALUE2) } } #[doc = "RTC TIM0 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` writer - RTC TIM0 Mirror Register Update Set"] -pub type RtcTim0W<'a, REG> = crate::BitWriter<'a, REG, RtcTim0>; -impl<'a, REG> RtcTim0W<'a, REG> +pub type RTC_TIM0_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM0_A>; +impl<'a, REG> RTC_TIM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value1) + self.variant(RTC_TIM0_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim0::Value2) + self.variant(RTC_TIM0_A::VALUE2) } } #[doc = "RTC TIM1 Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` writer - RTC TIM1 Mirror Register Update Set"] -pub type RtcTim1W<'a, REG> = crate::BitWriter<'a, REG, RtcTim1>; -impl<'a, REG> RtcTim1W<'a, REG> +pub type RTC_TIM1_W<'a, REG> = crate::BitWriter<'a, REG, RTC_TIM1_A>; +impl<'a, REG> RTC_TIM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value1) + self.variant(RTC_TIM1_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(RtcTim1::Value2) + self.variant(RTC_TIM1_A::VALUE2) } } #[doc = "Retention Memory Mirror Register Update Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: set the status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` writer - Retention Memory Mirror Register Update Set"] -pub type RmxW<'a, REG> = crate::BitWriter<'a, REG, Rmx>; -impl<'a, REG> RmxW<'a, REG> +pub type RMX_W<'a, REG> = crate::BitWriter<'a, REG, RMX_A>; +impl<'a, REG> RMX_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rmx::Value1) + self.variant(RMX_A::VALUE1) } #[doc = "set the status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rmx::Value2) + self.variant(RMX_A::VALUE2) } } impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Set"] #[inline(always)] #[must_use] - pub fn prwarn(&mut self) -> PrwarnW { - PrwarnW::new(self, 0) + pub fn prwarn(&mut self) -> PRWARN_W { + PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Set"] #[inline(always)] #[must_use] - pub fn pi(&mut self) -> PiW { - PiW::new(self, 1) + pub fn pi(&mut self) -> PI_W { + PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Set"] #[inline(always)] #[must_use] - pub fn ai(&mut self) -> AiW { - AiW::new(self, 2) + pub fn ai(&mut self) -> AI_W { + AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Set"] #[inline(always)] #[must_use] - pub fn dlrovr(&mut self) -> DlrovrW { - DlrovrW::new(self, 3) + pub fn dlrovr(&mut self) -> DLROVR_W { + DLROVR_W::new(self, 3) } #[doc = "Bit 6 - LPACLR Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpaccr(&mut self) -> LpaccrW { - LpaccrW::new(self, 6) + pub fn lpaccr(&mut self) -> LPACCR_W { + LPACCR_W::new(self, 6) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpacth0(&mut self) -> Lpacth0W { - Lpacth0W::new(self, 7) + pub fn lpacth0(&mut self) -> LPACTH0_W { + LPACTH0_W::new(self, 7) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpacth1(&mut self) -> Lpacth1W { - Lpacth1W::new(self, 8) + pub fn lpacth1(&mut self) -> LPACTH1_W { + LPACTH1_W::new(self, 8) } #[doc = "Bit 9 - LPACST Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpacst(&mut self) -> LpacstW { - LpacstW::new(self, 9) + pub fn lpacst(&mut self) -> LPACST_W { + LPACST_W::new(self, 9) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpacclr(&mut self) -> LpacclrW { - LpacclrW::new(self, 10) + pub fn lpacclr(&mut self) -> LPACCLR_W { + LPACCLR_W::new(self, 10) } #[doc = "Bit 11 - LPACSET Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn lpacset(&mut self) -> LpacsetW { - LpacsetW::new(self, 11) + pub fn lpacset(&mut self) -> LPACSET_W { + LPACSET_W::new(self, 11) } #[doc = "Bit 12 - HINTST Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn hintst(&mut self) -> HintstW { - HintstW::new(self, 12) + pub fn hintst(&mut self) -> HINTST_W { + HINTST_W::new(self, 12) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn hintclr(&mut self) -> HintclrW { - HintclrW::new(self, 13) + pub fn hintclr(&mut self) -> HINTCLR_W { + HINTCLR_W::new(self, 13) } #[doc = "Bit 14 - HINTSET Mirror Register Update Interrupt Set"] #[inline(always)] #[must_use] - pub fn hintset(&mut self) -> HintsetW { - HintsetW::new(self, 14) + pub fn hintset(&mut self) -> HINTSET_W { + HINTSET_W::new(self, 14) } #[doc = "Bit 17 - HDCRCLR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcrclr(&mut self) -> HdcrclrW { - HdcrclrW::new(self, 17) + pub fn hdcrclr(&mut self) -> HDCRCLR_W { + HDCRCLR_W::new(self, 17) } #[doc = "Bit 18 - HDCRSET Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcrset(&mut self) -> HdcrsetW { - HdcrsetW::new(self, 18) + pub fn hdcrset(&mut self) -> HDCRSET_W { + HDCRSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn hdcr(&mut self) -> HdcrW { - HdcrW::new(self, 19) + pub fn hdcr(&mut self) -> HDCR_W { + HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn oscsictrl(&mut self) -> OscsictrlW { - OscsictrlW::new(self, 21) + pub fn oscsictrl(&mut self) -> OSCSICTRL_W { + OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn osculctrl(&mut self) -> OsculctrlW { - OsculctrlW::new(self, 23) + pub fn osculctrl(&mut self) -> OSCULCTRL_W { + OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_ctr(&mut self) -> RtcCtrW { - RtcCtrW::new(self, 24) + pub fn rtc_ctr(&mut self) -> RTC_CTR_W { + RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_atim0(&mut self) -> RtcAtim0W { - RtcAtim0W::new(self, 25) + pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { + RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_atim1(&mut self) -> RtcAtim1W { - RtcAtim1W::new(self, 26) + pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { + RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_tim0(&mut self) -> RtcTim0W { - RtcTim0W::new(self, 27) + pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { + RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rtc_tim1(&mut self) -> RtcTim1W { - RtcTim1W::new(self, 28) + pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { + RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Set"] #[inline(always)] #[must_use] - pub fn rmx(&mut self) -> RmxW { - RmxW::new(self, 29) + pub fn rmx(&mut self) -> RMX_W { + RMX_W::new(self, 29) } } #[doc = "SCU Service Request Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrsetSpec; -impl crate::RegisterSpec for SrsetSpec { +pub struct SRSET_SPEC; +impl crate::RegisterSpec for SRSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srset::W`](W) writer structure"] -impl crate::Writable for SrsetSpec { +impl crate::Writable for SRSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRSET to value 0"] -impl crate::Resettable for SrsetSpec { +impl crate::Resettable for SRSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_interrupt/srstat.rs b/src/scu_interrupt/srstat.rs index aa654483..2e06ce98 100644 --- a/src/scu_interrupt/srstat.rs +++ b/src/scu_interrupt/srstat.rs @@ -1,897 +1,897 @@ #[doc = "Register `SRSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "WDT pre-warning Interrupt Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Prwarn { +pub enum PRWARN_A { #[doc = "0: Inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Prwarn) -> Self { + fn from(variant: PRWARN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PRWARN` reader - WDT pre-warning Interrupt Status"] -pub type PrwarnR = crate::BitReader; -impl PrwarnR { +pub type PRWARN_R = crate::BitReader; +impl PRWARN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Prwarn { + pub const fn variant(&self) -> PRWARN_A { match self.bits { - false => Prwarn::Value1, - true => Prwarn::Value2, + false => PRWARN_A::VALUE1, + true => PRWARN_A::VALUE2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prwarn::Value1 + *self == PRWARN_A::VALUE1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prwarn::Value2 + *self == PRWARN_A::VALUE2 } } #[doc = "Field `PI` reader - RTC Periodic Interrupt Status"] -pub type PiR = crate::BitReader; +pub type PI_R = crate::BitReader; #[doc = "Field `AI` reader - Alarm Interrupt Status"] -pub type AiR = crate::BitReader; +pub type AI_R = crate::BitReader; #[doc = "Field `DLROVR` reader - DLR Request Overrun Interrupt Status"] -pub type DlrovrR = crate::BitReader; +pub type DLROVR_R = crate::BitReader; #[doc = "LPACLR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpaccr { +pub enum LPACCR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpaccr) -> Self { + fn from(variant: LPACCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCR` reader - LPACLR Mirror Register Update Status"] -pub type LpaccrR = crate::BitReader; -impl LpaccrR { +pub type LPACCR_R = crate::BitReader; +impl LPACCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpaccr { + pub const fn variant(&self) -> LPACCR_A { match self.bits { - false => Lpaccr::Value1, - true => Lpaccr::Value2, + false => LPACCR_A::VALUE1, + true => LPACCR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpaccr::Value1 + *self == LPACCR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpaccr::Value2 + *self == LPACCR_A::VALUE2 } } #[doc = "LPACTH0 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth0 { +pub enum LPACTH0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth0) -> Self { + fn from(variant: LPACTH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH0` reader - LPACTH0 Mirror Register Update Status"] -pub type Lpacth0R = crate::BitReader; -impl Lpacth0R { +pub type LPACTH0_R = crate::BitReader; +impl LPACTH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth0 { + pub const fn variant(&self) -> LPACTH0_A { match self.bits { - false => Lpacth0::Value1, - true => Lpacth0::Value2, + false => LPACTH0_A::VALUE1, + true => LPACTH0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth0::Value1 + *self == LPACTH0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth0::Value2 + *self == LPACTH0_A::VALUE2 } } #[doc = "LPACTH1 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacth1 { +pub enum LPACTH1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacth1) -> Self { + fn from(variant: LPACTH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACTH1` reader - LPACTH1 Mirror Register Update Status"] -pub type Lpacth1R = crate::BitReader; -impl Lpacth1R { +pub type LPACTH1_R = crate::BitReader; +impl LPACTH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacth1 { + pub const fn variant(&self) -> LPACTH1_A { match self.bits { - false => Lpacth1::Value1, - true => Lpacth1::Value2, + false => LPACTH1_A::VALUE1, + true => LPACTH1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacth1::Value1 + *self == LPACTH1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacth1::Value2 + *self == LPACTH1_A::VALUE2 } } #[doc = "LPACST Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacst { +pub enum LPACST_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacst) -> Self { + fn from(variant: LPACST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACST` reader - LPACST Mirror Register Update Status"] -pub type LpacstR = crate::BitReader; -impl LpacstR { +pub type LPACST_R = crate::BitReader; +impl LPACST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacst { + pub const fn variant(&self) -> LPACST_A { match self.bits { - false => Lpacst::Value1, - true => Lpacst::Value2, + false => LPACST_A::VALUE1, + true => LPACST_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacst::Value1 + *self == LPACST_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacst::Value2 + *self == LPACST_A::VALUE2 } } #[doc = "LPACCLR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacclr { +pub enum LPACCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacclr) -> Self { + fn from(variant: LPACCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACCLR` reader - LPACCLR Mirror Register Update Status"] -pub type LpacclrR = crate::BitReader; -impl LpacclrR { +pub type LPACCLR_R = crate::BitReader; +impl LPACCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacclr { + pub const fn variant(&self) -> LPACCLR_A { match self.bits { - false => Lpacclr::Value1, - true => Lpacclr::Value2, + false => LPACCLR_A::VALUE1, + true => LPACCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacclr::Value1 + *self == LPACCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacclr::Value2 + *self == LPACCLR_A::VALUE2 } } #[doc = "LPACSET Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lpacset { +pub enum LPACSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lpacset) -> Self { + fn from(variant: LPACSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LPACSET` reader - LPACSET Mirror Register Update Status"] -pub type LpacsetR = crate::BitReader; -impl LpacsetR { +pub type LPACSET_R = crate::BitReader; +impl LPACSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lpacset { + pub const fn variant(&self) -> LPACSET_A { match self.bits { - false => Lpacset::Value1, - true => Lpacset::Value2, + false => LPACSET_A::VALUE1, + true => LPACSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lpacset::Value1 + *self == LPACSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lpacset::Value2 + *self == LPACSET_A::VALUE2 } } #[doc = "HINTST Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintst { +pub enum HINTST_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintst) -> Self { + fn from(variant: HINTST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTST` reader - HINTST Mirror Register Update Status"] -pub type HintstR = crate::BitReader; -impl HintstR { +pub type HINTST_R = crate::BitReader; +impl HINTST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintst { + pub const fn variant(&self) -> HINTST_A { match self.bits { - false => Hintst::Value1, - true => Hintst::Value2, + false => HINTST_A::VALUE1, + true => HINTST_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintst::Value1 + *self == HINTST_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintst::Value2 + *self == HINTST_A::VALUE2 } } #[doc = "HINTCLR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintclr { +pub enum HINTCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintclr) -> Self { + fn from(variant: HINTCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTCLR` reader - HINTCLR Mirror Register Update Status"] -pub type HintclrR = crate::BitReader; -impl HintclrR { +pub type HINTCLR_R = crate::BitReader; +impl HINTCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintclr { + pub const fn variant(&self) -> HINTCLR_A { match self.bits { - false => Hintclr::Value1, - true => Hintclr::Value2, + false => HINTCLR_A::VALUE1, + true => HINTCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintclr::Value1 + *self == HINTCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintclr::Value2 + *self == HINTCLR_A::VALUE2 } } #[doc = "HINTSET Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hintset { +pub enum HINTSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hintset) -> Self { + fn from(variant: HINTSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HINTSET` reader - HINTSET Mirror Register Update Status"] -pub type HintsetR = crate::BitReader; -impl HintsetR { +pub type HINTSET_R = crate::BitReader; +impl HINTSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hintset { + pub const fn variant(&self) -> HINTSET_A { match self.bits { - false => Hintset::Value1, - true => Hintset::Value2, + false => HINTSET_A::VALUE1, + true => HINTSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hintset::Value1 + *self == HINTSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hintset::Value2 + *self == HINTSET_A::VALUE2 } } #[doc = "HDCLR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdclr { +pub enum HDCLR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdclr) -> Self { + fn from(variant: HDCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCLR` reader - HDCLR Mirror Register Update Status"] -pub type HdclrR = crate::BitReader; -impl HdclrR { +pub type HDCLR_R = crate::BitReader; +impl HDCLR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdclr { + pub const fn variant(&self) -> HDCLR_A { match self.bits { - false => Hdclr::Value1, - true => Hdclr::Value2, + false => HDCLR_A::VALUE1, + true => HDCLR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdclr::Value1 + *self == HDCLR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdclr::Value2 + *self == HDCLR_A::VALUE2 } } #[doc = "HDSET Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdset { +pub enum HDSET_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdset) -> Self { + fn from(variant: HDSET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDSET` reader - HDSET Mirror Register Update Status"] -pub type HdsetR = crate::BitReader; -impl HdsetR { +pub type HDSET_R = crate::BitReader; +impl HDSET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdset { + pub const fn variant(&self) -> HDSET_A { match self.bits { - false => Hdset::Value1, - true => Hdset::Value2, + false => HDSET_A::VALUE1, + true => HDSET_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdset::Value1 + *self == HDSET_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdset::Value2 + *self == HDSET_A::VALUE2 } } #[doc = "HDCR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hdcr { +pub enum HDCR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hdcr) -> Self { + fn from(variant: HDCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HDCR` reader - HDCR Mirror Register Update Status"] -pub type HdcrR = crate::BitReader; -impl HdcrR { +pub type HDCR_R = crate::BitReader; +impl HDCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hdcr { + pub const fn variant(&self) -> HDCR_A { match self.bits { - false => Hdcr::Value1, - true => Hdcr::Value2, + false => HDCR_A::VALUE1, + true => HDCR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hdcr::Value1 + *self == HDCR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hdcr::Value2 + *self == HDCR_A::VALUE2 } } #[doc = "OSCSICTRL Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscsictrl { +pub enum OSCSICTRL_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscsictrl) -> Self { + fn from(variant: OSCSICTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Update Status"] -pub type OscsictrlR = crate::BitReader; -impl OscsictrlR { +pub type OSCSICTRL_R = crate::BitReader; +impl OSCSICTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscsictrl { + pub const fn variant(&self) -> OSCSICTRL_A { match self.bits { - false => Oscsictrl::Value1, - true => Oscsictrl::Value2, + false => OSCSICTRL_A::VALUE1, + true => OSCSICTRL_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscsictrl::Value1 + *self == OSCSICTRL_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscsictrl::Value2 + *self == OSCSICTRL_A::VALUE2 } } #[doc = "OSCULCTRL Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Osculctrl { +pub enum OSCULCTRL_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Osculctrl) -> Self { + fn from(variant: OSCULCTRL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Update Status"] -pub type OsculctrlR = crate::BitReader; -impl OsculctrlR { +pub type OSCULCTRL_R = crate::BitReader; +impl OSCULCTRL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Osculctrl { + pub const fn variant(&self) -> OSCULCTRL_A { match self.bits { - false => Osculctrl::Value1, - true => Osculctrl::Value2, + false => OSCULCTRL_A::VALUE1, + true => OSCULCTRL_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Osculctrl::Value1 + *self == OSCULCTRL_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Osculctrl::Value2 + *self == OSCULCTRL_A::VALUE2 } } #[doc = "RTC CTR Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcCtr { +pub enum RTC_CTR_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcCtr) -> Self { + fn from(variant: RTC_CTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Update Status"] -pub type RtcCtrR = crate::BitReader; -impl RtcCtrR { +pub type RTC_CTR_R = crate::BitReader; +impl RTC_CTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcCtr { + pub const fn variant(&self) -> RTC_CTR_A { match self.bits { - false => RtcCtr::Value1, - true => RtcCtr::Value2, + false => RTC_CTR_A::VALUE1, + true => RTC_CTR_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcCtr::Value1 + *self == RTC_CTR_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcCtr::Value2 + *self == RTC_CTR_A::VALUE2 } } #[doc = "RTC ATIM0 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim0 { +pub enum RTC_ATIM0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim0) -> Self { + fn from(variant: RTC_ATIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Update Status"] -pub type RtcAtim0R = crate::BitReader; -impl RtcAtim0R { +pub type RTC_ATIM0_R = crate::BitReader; +impl RTC_ATIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim0 { + pub const fn variant(&self) -> RTC_ATIM0_A { match self.bits { - false => RtcAtim0::Value1, - true => RtcAtim0::Value2, + false => RTC_ATIM0_A::VALUE1, + true => RTC_ATIM0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim0::Value1 + *self == RTC_ATIM0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim0::Value2 + *self == RTC_ATIM0_A::VALUE2 } } #[doc = "RTC ATIM1 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcAtim1 { +pub enum RTC_ATIM1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcAtim1) -> Self { + fn from(variant: RTC_ATIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Update Status"] -pub type RtcAtim1R = crate::BitReader; -impl RtcAtim1R { +pub type RTC_ATIM1_R = crate::BitReader; +impl RTC_ATIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcAtim1 { + pub const fn variant(&self) -> RTC_ATIM1_A { match self.bits { - false => RtcAtim1::Value1, - true => RtcAtim1::Value2, + false => RTC_ATIM1_A::VALUE1, + true => RTC_ATIM1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcAtim1::Value1 + *self == RTC_ATIM1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcAtim1::Value2 + *self == RTC_ATIM1_A::VALUE2 } } #[doc = "RTC TIM0 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim0 { +pub enum RTC_TIM0_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim0) -> Self { + fn from(variant: RTC_TIM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Update Status"] -pub type RtcTim0R = crate::BitReader; -impl RtcTim0R { +pub type RTC_TIM0_R = crate::BitReader; +impl RTC_TIM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim0 { + pub const fn variant(&self) -> RTC_TIM0_A { match self.bits { - false => RtcTim0::Value1, - true => RtcTim0::Value2, + false => RTC_TIM0_A::VALUE1, + true => RTC_TIM0_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim0::Value1 + *self == RTC_TIM0_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim0::Value2 + *self == RTC_TIM0_A::VALUE2 } } #[doc = "RTC TIM1 Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum RtcTim1 { +pub enum RTC_TIM1_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: RtcTim1) -> Self { + fn from(variant: RTC_TIM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Update Status"] -pub type RtcTim1R = crate::BitReader; -impl RtcTim1R { +pub type RTC_TIM1_R = crate::BitReader; +impl RTC_TIM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RtcTim1 { + pub const fn variant(&self) -> RTC_TIM1_A { match self.bits { - false => RtcTim1::Value1, - true => RtcTim1::Value2, + false => RTC_TIM1_A::VALUE1, + true => RTC_TIM1_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RtcTim1::Value1 + *self == RTC_TIM1_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RtcTim1::Value2 + *self == RTC_TIM1_A::VALUE2 } } #[doc = "Retention Memory Mirror Register Update Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rmx { +pub enum RMX_A { #[doc = "0: Not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Update completed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rmx) -> Self { + fn from(variant: RMX_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RMX` reader - Retention Memory Mirror Register Update Status"] -pub type RmxR = crate::BitReader; -impl RmxR { +pub type RMX_R = crate::BitReader; +impl RMX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rmx { + pub const fn variant(&self) -> RMX_A { match self.bits { - false => Rmx::Value1, - true => Rmx::Value2, + false => RMX_A::VALUE1, + true => RMX_A::VALUE2, } } #[doc = "Not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rmx::Value1 + *self == RMX_A::VALUE1 } #[doc = "Update completed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rmx::Value2 + *self == RMX_A::VALUE2 } } impl R { #[doc = "Bit 0 - WDT pre-warning Interrupt Status"] #[inline(always)] - pub fn prwarn(&self) -> PrwarnR { - PrwarnR::new((self.bits & 1) != 0) + pub fn prwarn(&self) -> PRWARN_R { + PRWARN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Status"] #[inline(always)] - pub fn pi(&self) -> PiR { - PiR::new(((self.bits >> 1) & 1) != 0) + pub fn pi(&self) -> PI_R { + PI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Alarm Interrupt Status"] #[inline(always)] - pub fn ai(&self) -> AiR { - AiR::new(((self.bits >> 2) & 1) != 0) + pub fn ai(&self) -> AI_R { + AI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Status"] #[inline(always)] - pub fn dlrovr(&self) -> DlrovrR { - DlrovrR::new(((self.bits >> 3) & 1) != 0) + pub fn dlrovr(&self) -> DLROVR_R { + DLROVR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - LPACLR Mirror Register Update Status"] #[inline(always)] - pub fn lpaccr(&self) -> LpaccrR { - LpaccrR::new(((self.bits >> 6) & 1) != 0) + pub fn lpaccr(&self) -> LPACCR_R { + LPACCR_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - LPACTH0 Mirror Register Update Status"] #[inline(always)] - pub fn lpacth0(&self) -> Lpacth0R { - Lpacth0R::new(((self.bits >> 7) & 1) != 0) + pub fn lpacth0(&self) -> LPACTH0_R { + LPACTH0_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - LPACTH1 Mirror Register Update Status"] #[inline(always)] - pub fn lpacth1(&self) -> Lpacth1R { - Lpacth1R::new(((self.bits >> 8) & 1) != 0) + pub fn lpacth1(&self) -> LPACTH1_R { + LPACTH1_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - LPACST Mirror Register Update Status"] #[inline(always)] - pub fn lpacst(&self) -> LpacstR { - LpacstR::new(((self.bits >> 9) & 1) != 0) + pub fn lpacst(&self) -> LPACST_R { + LPACST_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - LPACCLR Mirror Register Update Status"] #[inline(always)] - pub fn lpacclr(&self) -> LpacclrR { - LpacclrR::new(((self.bits >> 10) & 1) != 0) + pub fn lpacclr(&self) -> LPACCLR_R { + LPACCLR_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - LPACSET Mirror Register Update Status"] #[inline(always)] - pub fn lpacset(&self) -> LpacsetR { - LpacsetR::new(((self.bits >> 11) & 1) != 0) + pub fn lpacset(&self) -> LPACSET_R { + LPACSET_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - HINTST Mirror Register Update Status"] #[inline(always)] - pub fn hintst(&self) -> HintstR { - HintstR::new(((self.bits >> 12) & 1) != 0) + pub fn hintst(&self) -> HINTST_R { + HINTST_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - HINTCLR Mirror Register Update Status"] #[inline(always)] - pub fn hintclr(&self) -> HintclrR { - HintclrR::new(((self.bits >> 13) & 1) != 0) + pub fn hintclr(&self) -> HINTCLR_R { + HINTCLR_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - HINTSET Mirror Register Update Status"] #[inline(always)] - pub fn hintset(&self) -> HintsetR { - HintsetR::new(((self.bits >> 14) & 1) != 0) + pub fn hintset(&self) -> HINTSET_R { + HINTSET_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 17 - HDCLR Mirror Register Update Status"] #[inline(always)] - pub fn hdclr(&self) -> HdclrR { - HdclrR::new(((self.bits >> 17) & 1) != 0) + pub fn hdclr(&self) -> HDCLR_R { + HDCLR_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - HDSET Mirror Register Update Status"] #[inline(always)] - pub fn hdset(&self) -> HdsetR { - HdsetR::new(((self.bits >> 18) & 1) != 0) + pub fn hdset(&self) -> HDSET_R { + HDSET_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - HDCR Mirror Register Update Status"] #[inline(always)] - pub fn hdcr(&self) -> HdcrR { - HdcrR::new(((self.bits >> 19) & 1) != 0) + pub fn hdcr(&self) -> HDCR_R { + HDCR_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Status"] #[inline(always)] - pub fn oscsictrl(&self) -> OscsictrlR { - OscsictrlR::new(((self.bits >> 21) & 1) != 0) + pub fn oscsictrl(&self) -> OSCSICTRL_R { + OSCSICTRL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Status"] #[inline(always)] - pub fn osculctrl(&self) -> OsculctrlR { - OsculctrlR::new(((self.bits >> 23) & 1) != 0) + pub fn osculctrl(&self) -> OSCULCTRL_R { + OSCULCTRL_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Status"] #[inline(always)] - pub fn rtc_ctr(&self) -> RtcCtrR { - RtcCtrR::new(((self.bits >> 24) & 1) != 0) + pub fn rtc_ctr(&self) -> RTC_CTR_R { + RTC_CTR_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_atim0(&self) -> RtcAtim0R { - RtcAtim0R::new(((self.bits >> 25) & 1) != 0) + pub fn rtc_atim0(&self) -> RTC_ATIM0_R { + RTC_ATIM0_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_atim1(&self) -> RtcAtim1R { - RtcAtim1R::new(((self.bits >> 26) & 1) != 0) + pub fn rtc_atim1(&self) -> RTC_ATIM1_R { + RTC_ATIM1_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_tim0(&self) -> RtcTim0R { - RtcTim0R::new(((self.bits >> 27) & 1) != 0) + pub fn rtc_tim0(&self) -> RTC_TIM0_R { + RTC_TIM0_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Status"] #[inline(always)] - pub fn rtc_tim1(&self) -> RtcTim1R { - RtcTim1R::new(((self.bits >> 28) & 1) != 0) + pub fn rtc_tim1(&self) -> RTC_TIM1_R { + RTC_TIM1_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Status"] #[inline(always)] - pub fn rmx(&self) -> RmxR { - RmxR::new(((self.bits >> 29) & 1) != 0) + pub fn rmx(&self) -> RMX_R { + RMX_R::new(((self.bits >> 29) & 1) != 0) } } #[doc = "SCU Service Request Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`srstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrstatSpec; -impl crate::RegisterSpec for SrstatSpec { +pub struct SRSTAT_SPEC; +impl crate::RegisterSpec for SRSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`srstat::R`](R) reader structure"] -impl crate::Readable for SrstatSpec {} +impl crate::Readable for SRSTAT_SPEC {} #[doc = "`reset()` method sets SRSTAT to value 0"] -impl crate::Resettable for SrstatSpec { +impl crate::Resettable for SRSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_osc.rs b/src/scu_osc.rs index db54af4c..bb3d74fc 100644 --- a/src/scu_osc.rs +++ b/src/scu_osc.rs @@ -1,43 +1,40 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - oschpstat: Oschpstat, - oschpctrl: Oschpctrl, + oschpstat: OSCHPSTAT, + oschpctrl: OSCHPCTRL, _reserved2: [u8; 0x04], - clkcalconst: Clkcalconst, + clkcalconst: CLKCALCONST, } impl RegisterBlock { #[doc = "0x00 - OSC_HP Status Register"] #[inline(always)] - pub const fn oschpstat(&self) -> &Oschpstat { + pub const fn oschpstat(&self) -> &OSCHPSTAT { &self.oschpstat } #[doc = "0x04 - OSC_HP Control Register"] #[inline(always)] - pub const fn oschpctrl(&self) -> &Oschpctrl { + pub const fn oschpctrl(&self) -> &OSCHPCTRL { &self.oschpctrl } #[doc = "0x0c - Clock Calibration Constant Register"] #[inline(always)] - pub const fn clkcalconst(&self) -> &Clkcalconst { + pub const fn clkcalconst(&self) -> &CLKCALCONST { &self.clkcalconst } } #[doc = "OSCHPSTAT (r) register accessor: OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpstat`] module"] -#[doc(alias = "OSCHPSTAT")] -pub type Oschpstat = crate::Reg; +pub type OSCHPSTAT = crate::Reg; #[doc = "OSC_HP Status Register"] pub mod oschpstat; #[doc = "OSCHPCTRL (rw) register accessor: OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@oschpctrl`] module"] -#[doc(alias = "OSCHPCTRL")] -pub type Oschpctrl = crate::Reg; +pub type OSCHPCTRL = crate::Reg; #[doc = "OSC_HP Control Register"] pub mod oschpctrl; #[doc = "CLKCALCONST (rw) register accessor: Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkcalconst`] module"] -#[doc(alias = "CLKCALCONST")] -pub type Clkcalconst = crate::Reg; +pub type CLKCALCONST = crate::Reg; #[doc = "Clock Calibration Constant Register"] pub mod clkcalconst; diff --git a/src/scu_osc/clkcalconst.rs b/src/scu_osc/clkcalconst.rs index 75e330f5..e05ed253 100644 --- a/src/scu_osc/clkcalconst.rs +++ b/src/scu_osc/clkcalconst.rs @@ -1,40 +1,40 @@ #[doc = "Register `CLKCALCONST` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLKCALCONST` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CALIBCONST` reader - Clock Calibration Constant Value"] -pub type CalibconstR = crate::FieldReader; +pub type CALIBCONST_R = crate::FieldReader; #[doc = "Field `CALIBCONST` writer - Clock Calibration Constant Value"] -pub type CalibconstW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CALIBCONST_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - Clock Calibration Constant Value"] #[inline(always)] - pub fn calibconst(&self) -> CalibconstR { - CalibconstR::new((self.bits & 0x0f) as u8) + pub fn calibconst(&self) -> CALIBCONST_R { + CALIBCONST_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Clock Calibration Constant Value"] #[inline(always)] #[must_use] - pub fn calibconst(&mut self) -> CalibconstW { - CalibconstW::new(self, 0) + pub fn calibconst(&mut self) -> CALIBCONST_W { + CALIBCONST_W::new(self, 0) } } #[doc = "Clock Calibration Constant Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkcalconst::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkcalconst::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClkcalconstSpec; -impl crate::RegisterSpec for ClkcalconstSpec { +pub struct CLKCALCONST_SPEC; +impl crate::RegisterSpec for CLKCALCONST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clkcalconst::R`](R) reader structure"] -impl crate::Readable for ClkcalconstSpec {} +impl crate::Readable for CLKCALCONST_SPEC {} #[doc = "`write(|w| ..)` method takes [`clkcalconst::W`](W) writer structure"] -impl crate::Writable for ClkcalconstSpec { +impl crate::Writable for CLKCALCONST_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLKCALCONST to value 0"] -impl crate::Resettable for ClkcalconstSpec { +impl crate::Resettable for CLKCALCONST_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_osc/oschpctrl.rs b/src/scu_osc/oschpctrl.rs index 8d810fc0..f84de03c 100644 --- a/src/scu_osc/oschpctrl.rs +++ b/src/scu_osc/oschpctrl.rs @@ -1,174 +1,174 @@ #[doc = "Register `OSCHPCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OSCHPCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "XTAL1 Data Enable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum X1den { +pub enum X1DEN_A { #[doc = "0: Bit X1D is not updated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit X1D can be updated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: X1den) -> Self { + fn from(variant: X1DEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `X1DEN` reader - XTAL1 Data Enable"] -pub type X1denR = crate::BitReader; -impl X1denR { +pub type X1DEN_R = crate::BitReader; +impl X1DEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> X1den { + pub const fn variant(&self) -> X1DEN_A { match self.bits { - false => X1den::Value1, - true => X1den::Value2, + false => X1DEN_A::VALUE1, + true => X1DEN_A::VALUE2, } } #[doc = "Bit X1D is not updated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == X1den::Value1 + *self == X1DEN_A::VALUE1 } #[doc = "Bit X1D can be updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == X1den::Value2 + *self == X1DEN_A::VALUE2 } } #[doc = "Field `X1DEN` writer - XTAL1 Data Enable"] -pub type X1denW<'a, REG> = crate::BitWriter<'a, REG, X1den>; -impl<'a, REG> X1denW<'a, REG> +pub type X1DEN_W<'a, REG> = crate::BitWriter<'a, REG, X1DEN_A>; +impl<'a, REG> X1DEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit X1D is not updated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(X1den::Value1) + self.variant(X1DEN_A::VALUE1) } #[doc = "Bit X1D can be updated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(X1den::Value2) + self.variant(X1DEN_A::VALUE2) } } #[doc = "Shaper Bypass\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Shby { +pub enum SHBY_A { #[doc = "0: The shaper is not bypassed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The shaper is bypassed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Shby) -> Self { + fn from(variant: SHBY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SHBY` reader - Shaper Bypass"] -pub type ShbyR = crate::BitReader; -impl ShbyR { +pub type SHBY_R = crate::BitReader; +impl SHBY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Shby { + pub const fn variant(&self) -> SHBY_A { match self.bits { - false => Shby::Value1, - true => Shby::Value2, + false => SHBY_A::VALUE1, + true => SHBY_A::VALUE2, } } #[doc = "The shaper is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Shby::Value1 + *self == SHBY_A::VALUE1 } #[doc = "The shaper is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Shby::Value2 + *self == SHBY_A::VALUE2 } } #[doc = "Field `SHBY` writer - Shaper Bypass"] -pub type ShbyW<'a, REG> = crate::BitWriter<'a, REG, Shby>; -impl<'a, REG> ShbyW<'a, REG> +pub type SHBY_W<'a, REG> = crate::BitWriter<'a, REG, SHBY_A>; +impl<'a, REG> SHBY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The shaper is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Shby::Value1) + self.variant(SHBY_A::VALUE1) } #[doc = "The shaper is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Shby::Value2) + self.variant(SHBY_A::VALUE2) } } #[doc = "Oscillator Mode\n\nValue on reset: 3"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mode { +pub enum MODE_A { #[doc = "0: External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: OSC is disabled. The oscillator Power-Saving Mode is not entered."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: External Input Clock Mode and the oscillator Power-Saving Mode is entered"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: OSC is disabled. The oscillator Power-Saving Mode is entered."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mode) -> Self { + fn from(variant: MODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mode { +impl crate::FieldSpec for MODE_A { type Ux = u8; } -impl crate::IsEnum for Mode {} +impl crate::IsEnum for MODE_A {} #[doc = "Field `MODE` reader - Oscillator Mode"] -pub type ModeR = crate::FieldReader; -impl ModeR { +pub type MODE_R = crate::FieldReader; +impl MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mode { + pub const fn variant(&self) -> MODE_A { match self.bits { - 0 => Mode::Value1, - 1 => Mode::Value2, - 2 => Mode::Value3, - 3 => Mode::Value4, + 0 => MODE_A::VALUE1, + 1 => MODE_A::VALUE2, + 2 => MODE_A::VALUE3, + 3 => MODE_A::VALUE4, _ => unreachable!(), } } #[doc = "External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mode::Value1 + *self == MODE_A::VALUE1 } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mode::Value2 + *self == MODE_A::VALUE2 } #[doc = "External Input Clock Mode and the oscillator Power-Saving Mode is entered"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mode::Value3 + *self == MODE_A::VALUE3 } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is entered."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mode::Value4 + *self == MODE_A::VALUE4 } } #[doc = "Field `MODE` writer - Oscillator Mode"] -pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mode, crate::Safe>; -impl<'a, REG> ModeW<'a, REG> +pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE_A, crate::Safe>; +impl<'a, REG> MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -176,90 +176,90 @@ where #[doc = "External Crystal Mode and External Input Clock Mode. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mode::Value1) + self.variant(MODE_A::VALUE1) } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is not entered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mode::Value2) + self.variant(MODE_A::VALUE2) } #[doc = "External Input Clock Mode and the oscillator Power-Saving Mode is entered"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mode::Value3) + self.variant(MODE_A::VALUE3) } #[doc = "OSC is disabled. The oscillator Power-Saving Mode is entered."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mode::Value4) + self.variant(MODE_A::VALUE4) } } #[doc = "Field `OSCVAL` reader - OSC Frequency Value"] -pub type OscvalR = crate::FieldReader; +pub type OSCVAL_R = crate::FieldReader; #[doc = "Field `OSCVAL` writer - OSC Frequency Value"] -pub type OscvalW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type OSCVAL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - XTAL1 Data Enable"] #[inline(always)] - pub fn x1den(&self) -> X1denR { - X1denR::new((self.bits & 1) != 0) + pub fn x1den(&self) -> X1DEN_R { + X1DEN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Shaper Bypass"] #[inline(always)] - pub fn shby(&self) -> ShbyR { - ShbyR::new(((self.bits >> 1) & 1) != 0) + pub fn shby(&self) -> SHBY_R { + SHBY_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - pub fn mode(&self) -> ModeR { - ModeR::new(((self.bits >> 4) & 3) as u8) + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 16:19 - OSC Frequency Value"] #[inline(always)] - pub fn oscval(&self) -> OscvalR { - OscvalR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn oscval(&self) -> OSCVAL_R { + OSCVAL_R::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - XTAL1 Data Enable"] #[inline(always)] #[must_use] - pub fn x1den(&mut self) -> X1denW { - X1denW::new(self, 0) + pub fn x1den(&mut self) -> X1DEN_W { + X1DEN_W::new(self, 0) } #[doc = "Bit 1 - Shaper Bypass"] #[inline(always)] #[must_use] - pub fn shby(&mut self) -> ShbyW { - ShbyW::new(self, 1) + pub fn shby(&mut self) -> SHBY_W { + SHBY_W::new(self, 1) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> ModeW { - ModeW::new(self, 4) + pub fn mode(&mut self) -> MODE_W { + MODE_W::new(self, 4) } #[doc = "Bits 16:19 - OSC Frequency Value"] #[inline(always)] #[must_use] - pub fn oscval(&mut self) -> OscvalW { - OscvalW::new(self, 16) + pub fn oscval(&mut self) -> OSCVAL_W { + OSCVAL_W::new(self, 16) } } #[doc = "OSC_HP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`oschpctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OschpctrlSpec; -impl crate::RegisterSpec for OschpctrlSpec { +pub struct OSCHPCTRL_SPEC; +impl crate::RegisterSpec for OSCHPCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`oschpctrl::R`](R) reader structure"] -impl crate::Readable for OschpctrlSpec {} +impl crate::Readable for OSCHPCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`oschpctrl::W`](W) writer structure"] -impl crate::Writable for OschpctrlSpec { +impl crate::Writable for OSCHPCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OSCHPCTRL to value 0x33"] -impl crate::Resettable for OschpctrlSpec { +impl crate::Resettable for OSCHPCTRL_SPEC { const RESET_VALUE: u32 = 0x33; } diff --git a/src/scu_osc/oschpstat.rs b/src/scu_osc/oschpstat.rs index bf605cf6..62d71bc0 100644 --- a/src/scu_osc/oschpstat.rs +++ b/src/scu_osc/oschpstat.rs @@ -1,22 +1,22 @@ #[doc = "Register `OSCHPSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `X1D` reader - XTAL1 Data Value"] -pub type X1dR = crate::BitReader; +pub type X1D_R = crate::BitReader; impl R { #[doc = "Bit 0 - XTAL1 Data Value"] #[inline(always)] - pub fn x1d(&self) -> X1dR { - X1dR::new((self.bits & 1) != 0) + pub fn x1d(&self) -> X1D_R { + X1D_R::new((self.bits & 1) != 0) } } #[doc = "OSC_HP Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`oschpstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OschpstatSpec; -impl crate::RegisterSpec for OschpstatSpec { +pub struct OSCHPSTAT_SPEC; +impl crate::RegisterSpec for OSCHPSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`oschpstat::R`](R) reader structure"] -impl crate::Readable for OschpstatSpec {} +impl crate::Readable for OSCHPSTAT_SPEC {} #[doc = "`reset()` method sets OSCHPSTAT to value 0"] -impl crate::Resettable for OschpstatSpec { +impl crate::Resettable for OSCHPSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity.rs b/src/scu_parity.rs index aaa7e7c9..d41a122f 100644 --- a/src/scu_parity.rs +++ b/src/scu_parity.rs @@ -1,91 +1,84 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - peen: Peen, - mchkcon: Mchkcon, - pete: Pete, - persten: Persten, + peen: PEEN, + mchkcon: MCHKCON, + pete: PETE, + persten: PERSTEN, _reserved4: [u8; 0x04], - peflag: Peflag, - pmtpr: Pmtpr, - pmtsr: Pmtsr, + peflag: PEFLAG, + pmtpr: PMTPR, + pmtsr: PMTSR, } impl RegisterBlock { #[doc = "0x00 - Parity Error Enable Register"] #[inline(always)] - pub const fn peen(&self) -> &Peen { + pub const fn peen(&self) -> &PEEN { &self.peen } #[doc = "0x04 - Memory Checking Control Register"] #[inline(always)] - pub const fn mchkcon(&self) -> &Mchkcon { + pub const fn mchkcon(&self) -> &MCHKCON { &self.mchkcon } #[doc = "0x08 - Parity Error Trap Enable Register"] #[inline(always)] - pub const fn pete(&self) -> &Pete { + pub const fn pete(&self) -> &PETE { &self.pete } #[doc = "0x0c - Parity Error Reset Enable Register"] #[inline(always)] - pub const fn persten(&self) -> &Persten { + pub const fn persten(&self) -> &PERSTEN { &self.persten } #[doc = "0x14 - Parity Error Flag Register"] #[inline(always)] - pub const fn peflag(&self) -> &Peflag { + pub const fn peflag(&self) -> &PEFLAG { &self.peflag } #[doc = "0x18 - Parity Memory Test Pattern Register"] #[inline(always)] - pub const fn pmtpr(&self) -> &Pmtpr { + pub const fn pmtpr(&self) -> &PMTPR { &self.pmtpr } #[doc = "0x1c - Parity Memory Test Select Register"] #[inline(always)] - pub const fn pmtsr(&self) -> &Pmtsr { + pub const fn pmtsr(&self) -> &PMTSR { &self.pmtsr } } #[doc = "PEEN (rw) register accessor: Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peen`] module"] -#[doc(alias = "PEEN")] -pub type Peen = crate::Reg; +pub type PEEN = crate::Reg; #[doc = "Parity Error Enable Register"] pub mod peen; #[doc = "MCHKCON (rw) register accessor: Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mchkcon`] module"] -#[doc(alias = "MCHKCON")] -pub type Mchkcon = crate::Reg; +pub type MCHKCON = crate::Reg; #[doc = "Memory Checking Control Register"] pub mod mchkcon; #[doc = "PETE (rw) register accessor: Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pete`] module"] -#[doc(alias = "PETE")] -pub type Pete = crate::Reg; +pub type PETE = crate::Reg; #[doc = "Parity Error Trap Enable Register"] pub mod pete; #[doc = "PERSTEN (rw) register accessor: Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@persten`] module"] -#[doc(alias = "PERSTEN")] -pub type Persten = crate::Reg; +pub type PERSTEN = crate::Reg; #[doc = "Parity Error Reset Enable Register"] pub mod persten; #[doc = "PEFLAG (rw) register accessor: Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peflag`] module"] -#[doc(alias = "PEFLAG")] -pub type Peflag = crate::Reg; +pub type PEFLAG = crate::Reg; #[doc = "Parity Error Flag Register"] pub mod peflag; #[doc = "PMTPR (rw) register accessor: Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtpr`] module"] -#[doc(alias = "PMTPR")] -pub type Pmtpr = crate::Reg; +pub type PMTPR = crate::Reg; #[doc = "Parity Memory Test Pattern Register"] pub mod pmtpr; #[doc = "PMTSR (rw) register accessor: Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmtsr`] module"] -#[doc(alias = "PMTSR")] -pub type Pmtsr = crate::Reg; +pub type PMTSR = crate::Reg; #[doc = "Parity Memory Test Select Register"] pub mod pmtsr; diff --git a/src/scu_parity/mchkcon.rs b/src/scu_parity/mchkcon.rs index d9c7a7c9..94ee3d10 100644 --- a/src/scu_parity/mchkcon.rs +++ b/src/scu_parity/mchkcon.rs @@ -1,473 +1,473 @@ #[doc = "Register `MCHKCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `MCHKCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Select Memory Check for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selps { +pub enum SELPS_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selps) -> Self { + fn from(variant: SELPS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELPS` reader - Select Memory Check for PSRAM"] -pub type SelpsR = crate::BitReader; -impl SelpsR { +pub type SELPS_R = crate::BitReader; +impl SELPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selps { + pub const fn variant(&self) -> SELPS_A { match self.bits { - false => Selps::Value1, - true => Selps::Value2, + false => SELPS_A::VALUE1, + true => SELPS_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selps::Value1 + *self == SELPS_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selps::Value2 + *self == SELPS_A::VALUE2 } } #[doc = "Field `SELPS` writer - Select Memory Check for PSRAM"] -pub type SelpsW<'a, REG> = crate::BitWriter<'a, REG, Selps>; -impl<'a, REG> SelpsW<'a, REG> +pub type SELPS_W<'a, REG> = crate::BitWriter<'a, REG, SELPS_A>; +impl<'a, REG> SELPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selps::Value1) + self.variant(SELPS_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selps::Value2) + self.variant(SELPS_A::VALUE2) } } #[doc = "Select Memory Check for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selds1 { +pub enum SELDS1_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selds1) -> Self { + fn from(variant: SELDS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELDS1` reader - Select Memory Check for DSRAM1"] -pub type Selds1R = crate::BitReader; -impl Selds1R { +pub type SELDS1_R = crate::BitReader; +impl SELDS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selds1 { + pub const fn variant(&self) -> SELDS1_A { match self.bits { - false => Selds1::Value1, - true => Selds1::Value2, + false => SELDS1_A::VALUE1, + true => SELDS1_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selds1::Value1 + *self == SELDS1_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selds1::Value2 + *self == SELDS1_A::VALUE2 } } #[doc = "Field `SELDS1` writer - Select Memory Check for DSRAM1"] -pub type Selds1W<'a, REG> = crate::BitWriter<'a, REG, Selds1>; -impl<'a, REG> Selds1W<'a, REG> +pub type SELDS1_W<'a, REG> = crate::BitWriter<'a, REG, SELDS1_A>; +impl<'a, REG> SELDS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selds1::Value1) + self.variant(SELDS1_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selds1::Value2) + self.variant(SELDS1_A::VALUE2) } } #[doc = "Select Memory Check for USIC0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0dra { +pub enum USIC0DRA_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0dra) -> Self { + fn from(variant: USIC0DRA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0DRA` reader - Select Memory Check for USIC0"] -pub type Usic0draR = crate::BitReader; -impl Usic0draR { +pub type USIC0DRA_R = crate::BitReader; +impl USIC0DRA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic0dra { + pub const fn variant(&self) -> USIC0DRA_A { match self.bits { - false => Usic0dra::Value1, - true => Usic0dra::Value2, + false => USIC0DRA_A::VALUE1, + true => USIC0DRA_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic0dra::Value1 + *self == USIC0DRA_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic0dra::Value2 + *self == USIC0DRA_A::VALUE2 } } #[doc = "Field `USIC0DRA` writer - Select Memory Check for USIC0"] -pub type Usic0draW<'a, REG> = crate::BitWriter<'a, REG, Usic0dra>; -impl<'a, REG> Usic0draW<'a, REG> +pub type USIC0DRA_W<'a, REG> = crate::BitWriter<'a, REG, USIC0DRA_A>; +impl<'a, REG> USIC0DRA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic0dra::Value1) + self.variant(USIC0DRA_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic0dra::Value2) + self.variant(USIC0DRA_A::VALUE2) } } #[doc = "Select Memory Check for USIC1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1dra { +pub enum USIC1DRA_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1dra) -> Self { + fn from(variant: USIC1DRA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1DRA` reader - Select Memory Check for USIC1"] -pub type Usic1draR = crate::BitReader; -impl Usic1draR { +pub type USIC1DRA_R = crate::BitReader; +impl USIC1DRA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic1dra { + pub const fn variant(&self) -> USIC1DRA_A { match self.bits { - false => Usic1dra::Value1, - true => Usic1dra::Value2, + false => USIC1DRA_A::VALUE1, + true => USIC1DRA_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic1dra::Value1 + *self == USIC1DRA_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic1dra::Value2 + *self == USIC1DRA_A::VALUE2 } } #[doc = "Field `USIC1DRA` writer - Select Memory Check for USIC1"] -pub type Usic1draW<'a, REG> = crate::BitWriter<'a, REG, Usic1dra>; -impl<'a, REG> Usic1draW<'a, REG> +pub type USIC1DRA_W<'a, REG> = crate::BitWriter<'a, REG, USIC1DRA_A>; +impl<'a, REG> USIC1DRA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic1dra::Value1) + self.variant(USIC1DRA_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic1dra::Value2) + self.variant(USIC1DRA_A::VALUE2) } } #[doc = "Select Memory Check for MultiCAN\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcandra { +pub enum MCANDRA_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcandra) -> Self { + fn from(variant: MCANDRA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCANDRA` reader - Select Memory Check for MultiCAN"] -pub type McandraR = crate::BitReader; -impl McandraR { +pub type MCANDRA_R = crate::BitReader; +impl MCANDRA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcandra { + pub const fn variant(&self) -> MCANDRA_A { match self.bits { - false => Mcandra::Value1, - true => Mcandra::Value2, + false => MCANDRA_A::VALUE1, + true => MCANDRA_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcandra::Value1 + *self == MCANDRA_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcandra::Value2 + *self == MCANDRA_A::VALUE2 } } #[doc = "Field `MCANDRA` writer - Select Memory Check for MultiCAN"] -pub type McandraW<'a, REG> = crate::BitWriter<'a, REG, Mcandra>; -impl<'a, REG> McandraW<'a, REG> +pub type MCANDRA_W<'a, REG> = crate::BitWriter<'a, REG, MCANDRA_A>; +impl<'a, REG> MCANDRA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcandra::Value1) + self.variant(MCANDRA_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcandra::Value2) + self.variant(MCANDRA_A::VALUE2) } } #[doc = "Select Memory Check for PMU\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pprfdra { +pub enum PPRFDRA_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pprfdra) -> Self { + fn from(variant: PPRFDRA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPRFDRA` reader - Select Memory Check for PMU"] -pub type PprfdraR = crate::BitReader; -impl PprfdraR { +pub type PPRFDRA_R = crate::BitReader; +impl PPRFDRA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pprfdra { + pub const fn variant(&self) -> PPRFDRA_A { match self.bits { - false => Pprfdra::Value1, - true => Pprfdra::Value2, + false => PPRFDRA_A::VALUE1, + true => PPRFDRA_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pprfdra::Value1 + *self == PPRFDRA_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pprfdra::Value2 + *self == PPRFDRA_A::VALUE2 } } #[doc = "Field `PPRFDRA` writer - Select Memory Check for PMU"] -pub type PprfdraW<'a, REG> = crate::BitWriter<'a, REG, Pprfdra>; -impl<'a, REG> PprfdraW<'a, REG> +pub type PPRFDRA_W<'a, REG> = crate::BitWriter<'a, REG, PPRFDRA_A>; +impl<'a, REG> PPRFDRA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pprfdra::Value1) + self.variant(PPRFDRA_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pprfdra::Value2) + self.variant(PPRFDRA_A::VALUE2) } } #[doc = "Select Memory Check for USB SRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selusb { +pub enum SELUSB_A { #[doc = "0: Not selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selusb) -> Self { + fn from(variant: SELUSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELUSB` reader - Select Memory Check for USB SRAM"] -pub type SelusbR = crate::BitReader; -impl SelusbR { +pub type SELUSB_R = crate::BitReader; +impl SELUSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selusb { + pub const fn variant(&self) -> SELUSB_A { match self.bits { - false => Selusb::Value1, - true => Selusb::Value2, + false => SELUSB_A::VALUE1, + true => SELUSB_A::VALUE2, } } #[doc = "Not selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selusb::Value1 + *self == SELUSB_A::VALUE1 } #[doc = "Selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selusb::Value2 + *self == SELUSB_A::VALUE2 } } #[doc = "Field `SELUSB` writer - Select Memory Check for USB SRAM"] -pub type SelusbW<'a, REG> = crate::BitWriter<'a, REG, Selusb>; -impl<'a, REG> SelusbW<'a, REG> +pub type SELUSB_W<'a, REG> = crate::BitWriter<'a, REG, SELUSB_A>; +impl<'a, REG> SELUSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Not selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selusb::Value1) + self.variant(SELUSB_A::VALUE1) } #[doc = "Selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selusb::Value2) + self.variant(SELUSB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Select Memory Check for PSRAM"] #[inline(always)] - pub fn selps(&self) -> SelpsR { - SelpsR::new((self.bits & 1) != 0) + pub fn selps(&self) -> SELPS_R { + SELPS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Memory Check for DSRAM1"] #[inline(always)] - pub fn selds1(&self) -> Selds1R { - Selds1R::new(((self.bits >> 1) & 1) != 0) + pub fn selds1(&self) -> SELDS1_R { + SELDS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Select Memory Check for USIC0"] #[inline(always)] - pub fn usic0dra(&self) -> Usic0draR { - Usic0draR::new(((self.bits >> 8) & 1) != 0) + pub fn usic0dra(&self) -> USIC0DRA_R { + USIC0DRA_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Select Memory Check for USIC1"] #[inline(always)] - pub fn usic1dra(&self) -> Usic1draR { - Usic1draR::new(((self.bits >> 9) & 1) != 0) + pub fn usic1dra(&self) -> USIC1DRA_R { + USIC1DRA_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Select Memory Check for MultiCAN"] #[inline(always)] - pub fn mcandra(&self) -> McandraR { - McandraR::new(((self.bits >> 12) & 1) != 0) + pub fn mcandra(&self) -> MCANDRA_R { + MCANDRA_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Select Memory Check for PMU"] #[inline(always)] - pub fn pprfdra(&self) -> PprfdraR { - PprfdraR::new(((self.bits >> 13) & 1) != 0) + pub fn pprfdra(&self) -> PPRFDRA_R { + PPRFDRA_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Select Memory Check for USB SRAM"] #[inline(always)] - pub fn selusb(&self) -> SelusbR { - SelusbR::new(((self.bits >> 16) & 1) != 0) + pub fn selusb(&self) -> SELUSB_R { + SELUSB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Select Memory Check for PSRAM"] #[inline(always)] #[must_use] - pub fn selps(&mut self) -> SelpsW { - SelpsW::new(self, 0) + pub fn selps(&mut self) -> SELPS_W { + SELPS_W::new(self, 0) } #[doc = "Bit 1 - Select Memory Check for DSRAM1"] #[inline(always)] #[must_use] - pub fn selds1(&mut self) -> Selds1W { - Selds1W::new(self, 1) + pub fn selds1(&mut self) -> SELDS1_W { + SELDS1_W::new(self, 1) } #[doc = "Bit 8 - Select Memory Check for USIC0"] #[inline(always)] #[must_use] - pub fn usic0dra(&mut self) -> Usic0draW { - Usic0draW::new(self, 8) + pub fn usic0dra(&mut self) -> USIC0DRA_W { + USIC0DRA_W::new(self, 8) } #[doc = "Bit 9 - Select Memory Check for USIC1"] #[inline(always)] #[must_use] - pub fn usic1dra(&mut self) -> Usic1draW { - Usic1draW::new(self, 9) + pub fn usic1dra(&mut self) -> USIC1DRA_W { + USIC1DRA_W::new(self, 9) } #[doc = "Bit 12 - Select Memory Check for MultiCAN"] #[inline(always)] #[must_use] - pub fn mcandra(&mut self) -> McandraW { - McandraW::new(self, 12) + pub fn mcandra(&mut self) -> MCANDRA_W { + MCANDRA_W::new(self, 12) } #[doc = "Bit 13 - Select Memory Check for PMU"] #[inline(always)] #[must_use] - pub fn pprfdra(&mut self) -> PprfdraW { - PprfdraW::new(self, 13) + pub fn pprfdra(&mut self) -> PPRFDRA_W { + PPRFDRA_W::new(self, 13) } #[doc = "Bit 16 - Select Memory Check for USB SRAM"] #[inline(always)] #[must_use] - pub fn selusb(&mut self) -> SelusbW { - SelusbW::new(self, 16) + pub fn selusb(&mut self) -> SELUSB_W { + SELUSB_W::new(self, 16) } } #[doc = "Memory Checking Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mchkcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mchkcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct MchkconSpec; -impl crate::RegisterSpec for MchkconSpec { +pub struct MCHKCON_SPEC; +impl crate::RegisterSpec for MCHKCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`mchkcon::R`](R) reader structure"] -impl crate::Readable for MchkconSpec {} +impl crate::Readable for MCHKCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`mchkcon::W`](W) writer structure"] -impl crate::Writable for MchkconSpec { +impl crate::Writable for MCHKCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets MCHKCON to value 0"] -impl crate::Resettable for MchkconSpec { +impl crate::Resettable for MCHKCON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/peen.rs b/src/scu_parity/peen.rs index 8729db95..6a4c4cd0 100644 --- a/src/scu_parity/peen.rs +++ b/src/scu_parity/peen.rs @@ -1,473 +1,473 @@ #[doc = "Register `PEEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PEEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Parity Error Enable for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenps { +pub enum PEENPS_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenps) -> Self { + fn from(variant: PEENPS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENPS` reader - Parity Error Enable for PSRAM"] -pub type PeenpsR = crate::BitReader; -impl PeenpsR { +pub type PEENPS_R = crate::BitReader; +impl PEENPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenps { + pub const fn variant(&self) -> PEENPS_A { match self.bits { - false => Peenps::Value1, - true => Peenps::Value2, + false => PEENPS_A::VALUE1, + true => PEENPS_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenps::Value1 + *self == PEENPS_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenps::Value2 + *self == PEENPS_A::VALUE2 } } #[doc = "Field `PEENPS` writer - Parity Error Enable for PSRAM"] -pub type PeenpsW<'a, REG> = crate::BitWriter<'a, REG, Peenps>; -impl<'a, REG> PeenpsW<'a, REG> +pub type PEENPS_W<'a, REG> = crate::BitWriter<'a, REG, PEENPS_A>; +impl<'a, REG> PEENPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenps::Value1) + self.variant(PEENPS_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenps::Value2) + self.variant(PEENPS_A::VALUE2) } } #[doc = "Parity Error Enable for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peends1 { +pub enum PEENDS1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peends1) -> Self { + fn from(variant: PEENDS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENDS1` reader - Parity Error Enable for DSRAM1"] -pub type Peends1R = crate::BitReader; -impl Peends1R { +pub type PEENDS1_R = crate::BitReader; +impl PEENDS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peends1 { + pub const fn variant(&self) -> PEENDS1_A { match self.bits { - false => Peends1::Value1, - true => Peends1::Value2, + false => PEENDS1_A::VALUE1, + true => PEENDS1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peends1::Value1 + *self == PEENDS1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peends1::Value2 + *self == PEENDS1_A::VALUE2 } } #[doc = "Field `PEENDS1` writer - Parity Error Enable for DSRAM1"] -pub type Peends1W<'a, REG> = crate::BitWriter<'a, REG, Peends1>; -impl<'a, REG> Peends1W<'a, REG> +pub type PEENDS1_W<'a, REG> = crate::BitWriter<'a, REG, PEENDS1_A>; +impl<'a, REG> PEENDS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peends1::Value1) + self.variant(PEENDS1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peends1::Value2) + self.variant(PEENDS1_A::VALUE2) } } #[doc = "Parity Error Enable for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenu0 { +pub enum PEENU0_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenu0) -> Self { + fn from(variant: PEENU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENU0` reader - Parity Error Enable for USIC0 Memory"] -pub type Peenu0R = crate::BitReader; -impl Peenu0R { +pub type PEENU0_R = crate::BitReader; +impl PEENU0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenu0 { + pub const fn variant(&self) -> PEENU0_A { match self.bits { - false => Peenu0::Value1, - true => Peenu0::Value2, + false => PEENU0_A::VALUE1, + true => PEENU0_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenu0::Value1 + *self == PEENU0_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenu0::Value2 + *self == PEENU0_A::VALUE2 } } #[doc = "Field `PEENU0` writer - Parity Error Enable for USIC0 Memory"] -pub type Peenu0W<'a, REG> = crate::BitWriter<'a, REG, Peenu0>; -impl<'a, REG> Peenu0W<'a, REG> +pub type PEENU0_W<'a, REG> = crate::BitWriter<'a, REG, PEENU0_A>; +impl<'a, REG> PEENU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenu0::Value1) + self.variant(PEENU0_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenu0::Value2) + self.variant(PEENU0_A::VALUE2) } } #[doc = "Parity Error Enable for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenu1 { +pub enum PEENU1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenu1) -> Self { + fn from(variant: PEENU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENU1` reader - Parity Error Enable for USIC1 Memory"] -pub type Peenu1R = crate::BitReader; -impl Peenu1R { +pub type PEENU1_R = crate::BitReader; +impl PEENU1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenu1 { + pub const fn variant(&self) -> PEENU1_A { match self.bits { - false => Peenu1::Value1, - true => Peenu1::Value2, + false => PEENU1_A::VALUE1, + true => PEENU1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenu1::Value1 + *self == PEENU1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenu1::Value2 + *self == PEENU1_A::VALUE2 } } #[doc = "Field `PEENU1` writer - Parity Error Enable for USIC1 Memory"] -pub type Peenu1W<'a, REG> = crate::BitWriter<'a, REG, Peenu1>; -impl<'a, REG> Peenu1W<'a, REG> +pub type PEENU1_W<'a, REG> = crate::BitWriter<'a, REG, PEENU1_A>; +impl<'a, REG> PEENU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenu1::Value1) + self.variant(PEENU1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenu1::Value2) + self.variant(PEENU1_A::VALUE2) } } #[doc = "Parity Error Enable for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenmc { +pub enum PEENMC_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenmc) -> Self { + fn from(variant: PEENMC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENMC` reader - Parity Error Enable for MultiCAN Memory"] -pub type PeenmcR = crate::BitReader; -impl PeenmcR { +pub type PEENMC_R = crate::BitReader; +impl PEENMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenmc { + pub const fn variant(&self) -> PEENMC_A { match self.bits { - false => Peenmc::Value1, - true => Peenmc::Value2, + false => PEENMC_A::VALUE1, + true => PEENMC_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenmc::Value1 + *self == PEENMC_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenmc::Value2 + *self == PEENMC_A::VALUE2 } } #[doc = "Field `PEENMC` writer - Parity Error Enable for MultiCAN Memory"] -pub type PeenmcW<'a, REG> = crate::BitWriter<'a, REG, Peenmc>; -impl<'a, REG> PeenmcW<'a, REG> +pub type PEENMC_W<'a, REG> = crate::BitWriter<'a, REG, PEENMC_A>; +impl<'a, REG> PEENMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenmc::Value1) + self.variant(PEENMC_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenmc::Value2) + self.variant(PEENMC_A::VALUE2) } } #[doc = "Parity Error Enable for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenpprf { +pub enum PEENPPRF_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenpprf) -> Self { + fn from(variant: PEENPPRF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENPPRF` reader - Parity Error Enable for PMU Prefetch Memory"] -pub type PeenpprfR = crate::BitReader; -impl PeenpprfR { +pub type PEENPPRF_R = crate::BitReader; +impl PEENPPRF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenpprf { + pub const fn variant(&self) -> PEENPPRF_A { match self.bits { - false => Peenpprf::Value1, - true => Peenpprf::Value2, + false => PEENPPRF_A::VALUE1, + true => PEENPPRF_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenpprf::Value1 + *self == PEENPPRF_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenpprf::Value2 + *self == PEENPPRF_A::VALUE2 } } #[doc = "Field `PEENPPRF` writer - Parity Error Enable for PMU Prefetch Memory"] -pub type PeenpprfW<'a, REG> = crate::BitWriter<'a, REG, Peenpprf>; -impl<'a, REG> PeenpprfW<'a, REG> +pub type PEENPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PEENPPRF_A>; +impl<'a, REG> PEENPPRF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenpprf::Value1) + self.variant(PEENPPRF_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenpprf::Value2) + self.variant(PEENPPRF_A::VALUE2) } } #[doc = "Parity Error Enable for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peenusb { +pub enum PEENUSB_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peenusb) -> Self { + fn from(variant: PEENUSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEENUSB` reader - Parity Error Enable for USB Memory"] -pub type PeenusbR = crate::BitReader; -impl PeenusbR { +pub type PEENUSB_R = crate::BitReader; +impl PEENUSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peenusb { + pub const fn variant(&self) -> PEENUSB_A { match self.bits { - false => Peenusb::Value1, - true => Peenusb::Value2, + false => PEENUSB_A::VALUE1, + true => PEENUSB_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peenusb::Value1 + *self == PEENUSB_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peenusb::Value2 + *self == PEENUSB_A::VALUE2 } } #[doc = "Field `PEENUSB` writer - Parity Error Enable for USB Memory"] -pub type PeenusbW<'a, REG> = crate::BitWriter<'a, REG, Peenusb>; -impl<'a, REG> PeenusbW<'a, REG> +pub type PEENUSB_W<'a, REG> = crate::BitWriter<'a, REG, PEENUSB_A>; +impl<'a, REG> PEENUSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peenusb::Value1) + self.variant(PEENUSB_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peenusb::Value2) + self.variant(PEENUSB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Parity Error Enable for PSRAM"] #[inline(always)] - pub fn peenps(&self) -> PeenpsR { - PeenpsR::new((self.bits & 1) != 0) + pub fn peenps(&self) -> PEENPS_R { + PEENPS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Enable for DSRAM1"] #[inline(always)] - pub fn peends1(&self) -> Peends1R { - Peends1R::new(((self.bits >> 1) & 1) != 0) + pub fn peends1(&self) -> PEENDS1_R { + PEENDS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"] #[inline(always)] - pub fn peenu0(&self) -> Peenu0R { - Peenu0R::new(((self.bits >> 8) & 1) != 0) + pub fn peenu0(&self) -> PEENU0_R { + PEENU0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"] #[inline(always)] - pub fn peenu1(&self) -> Peenu1R { - Peenu1R::new(((self.bits >> 9) & 1) != 0) + pub fn peenu1(&self) -> PEENU1_R { + PEENU1_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"] #[inline(always)] - pub fn peenmc(&self) -> PeenmcR { - PeenmcR::new(((self.bits >> 12) & 1) != 0) + pub fn peenmc(&self) -> PEENMC_R { + PEENMC_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"] #[inline(always)] - pub fn peenpprf(&self) -> PeenpprfR { - PeenpprfR::new(((self.bits >> 13) & 1) != 0) + pub fn peenpprf(&self) -> PEENPPRF_R { + PEENPPRF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Enable for USB Memory"] #[inline(always)] - pub fn peenusb(&self) -> PeenusbR { - PeenusbR::new(((self.bits >> 16) & 1) != 0) + pub fn peenusb(&self) -> PEENUSB_R { + PEENUSB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Enable for PSRAM"] #[inline(always)] #[must_use] - pub fn peenps(&mut self) -> PeenpsW { - PeenpsW::new(self, 0) + pub fn peenps(&mut self) -> PEENPS_W { + PEENPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Enable for DSRAM1"] #[inline(always)] #[must_use] - pub fn peends1(&mut self) -> Peends1W { - Peends1W::new(self, 1) + pub fn peends1(&mut self) -> PEENDS1_W { + PEENDS1_W::new(self, 1) } #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn peenu0(&mut self) -> Peenu0W { - Peenu0W::new(self, 8) + pub fn peenu0(&mut self) -> PEENU0_W { + PEENU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn peenu1(&mut self) -> Peenu1W { - Peenu1W::new(self, 9) + pub fn peenu1(&mut self) -> PEENU1_W { + PEENU1_W::new(self, 9) } #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn peenmc(&mut self) -> PeenmcW { - PeenmcW::new(self, 12) + pub fn peenmc(&mut self) -> PEENMC_W { + PEENMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn peenpprf(&mut self) -> PeenpprfW { - PeenpprfW::new(self, 13) + pub fn peenpprf(&mut self) -> PEENPPRF_W { + PEENPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Enable for USB Memory"] #[inline(always)] #[must_use] - pub fn peenusb(&mut self) -> PeenusbW { - PeenusbW::new(self, 16) + pub fn peenusb(&mut self) -> PEENUSB_W { + PEENUSB_W::new(self, 16) } } #[doc = "Parity Error Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peen::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peen::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PeenSpec; -impl crate::RegisterSpec for PeenSpec { +pub struct PEEN_SPEC; +impl crate::RegisterSpec for PEEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`peen::R`](R) reader structure"] -impl crate::Readable for PeenSpec {} +impl crate::Readable for PEEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`peen::W`](W) writer structure"] -impl crate::Writable for PeenSpec { +impl crate::Writable for PEEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PEEN to value 0"] -impl crate::Resettable for PeenSpec { +impl crate::Resettable for PEEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/peflag.rs b/src/scu_parity/peflag.rs index 1ae8c1dd..f419cd30 100644 --- a/src/scu_parity/peflag.rs +++ b/src/scu_parity/peflag.rs @@ -1,473 +1,473 @@ #[doc = "Register `PEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PEFLAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Parity Error Flag for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefps { +pub enum PEFPS_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefps) -> Self { + fn from(variant: PEFPS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFPS` reader - Parity Error Flag for PSRAM"] -pub type PefpsR = crate::BitReader; -impl PefpsR { +pub type PEFPS_R = crate::BitReader; +impl PEFPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefps { + pub const fn variant(&self) -> PEFPS_A { match self.bits { - false => Pefps::Value1, - true => Pefps::Value2, + false => PEFPS_A::VALUE1, + true => PEFPS_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefps::Value1 + *self == PEFPS_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefps::Value2 + *self == PEFPS_A::VALUE2 } } #[doc = "Field `PEFPS` writer - Parity Error Flag for PSRAM"] -pub type PefpsW<'a, REG> = crate::BitWriter<'a, REG, Pefps>; -impl<'a, REG> PefpsW<'a, REG> +pub type PEFPS_W<'a, REG> = crate::BitWriter<'a, REG, PEFPS_A>; +impl<'a, REG> PEFPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefps::Value1) + self.variant(PEFPS_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefps::Value2) + self.variant(PEFPS_A::VALUE2) } } #[doc = "Parity Error Flag for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefds1 { +pub enum PEFDS1_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefds1) -> Self { + fn from(variant: PEFDS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFDS1` reader - Parity Error Flag for DSRAM1"] -pub type Pefds1R = crate::BitReader; -impl Pefds1R { +pub type PEFDS1_R = crate::BitReader; +impl PEFDS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefds1 { + pub const fn variant(&self) -> PEFDS1_A { match self.bits { - false => Pefds1::Value1, - true => Pefds1::Value2, + false => PEFDS1_A::VALUE1, + true => PEFDS1_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefds1::Value1 + *self == PEFDS1_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefds1::Value2 + *self == PEFDS1_A::VALUE2 } } #[doc = "Field `PEFDS1` writer - Parity Error Flag for DSRAM1"] -pub type Pefds1W<'a, REG> = crate::BitWriter<'a, REG, Pefds1>; -impl<'a, REG> Pefds1W<'a, REG> +pub type PEFDS1_W<'a, REG> = crate::BitWriter<'a, REG, PEFDS1_A>; +impl<'a, REG> PEFDS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefds1::Value1) + self.variant(PEFDS1_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefds1::Value2) + self.variant(PEFDS1_A::VALUE2) } } #[doc = "Parity Error Flag for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefu0 { +pub enum PEFU0_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefu0) -> Self { + fn from(variant: PEFU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFU0` reader - Parity Error Flag for USIC0 Memory"] -pub type Pefu0R = crate::BitReader; -impl Pefu0R { +pub type PEFU0_R = crate::BitReader; +impl PEFU0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefu0 { + pub const fn variant(&self) -> PEFU0_A { match self.bits { - false => Pefu0::Value1, - true => Pefu0::Value2, + false => PEFU0_A::VALUE1, + true => PEFU0_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefu0::Value1 + *self == PEFU0_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefu0::Value2 + *self == PEFU0_A::VALUE2 } } #[doc = "Field `PEFU0` writer - Parity Error Flag for USIC0 Memory"] -pub type Pefu0W<'a, REG> = crate::BitWriter<'a, REG, Pefu0>; -impl<'a, REG> Pefu0W<'a, REG> +pub type PEFU0_W<'a, REG> = crate::BitWriter<'a, REG, PEFU0_A>; +impl<'a, REG> PEFU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefu0::Value1) + self.variant(PEFU0_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefu0::Value2) + self.variant(PEFU0_A::VALUE2) } } #[doc = "Parity Error Flag for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefu1 { +pub enum PEFU1_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefu1) -> Self { + fn from(variant: PEFU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFU1` reader - Parity Error Flag for USIC1 Memory"] -pub type Pefu1R = crate::BitReader; -impl Pefu1R { +pub type PEFU1_R = crate::BitReader; +impl PEFU1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefu1 { + pub const fn variant(&self) -> PEFU1_A { match self.bits { - false => Pefu1::Value1, - true => Pefu1::Value2, + false => PEFU1_A::VALUE1, + true => PEFU1_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefu1::Value1 + *self == PEFU1_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefu1::Value2 + *self == PEFU1_A::VALUE2 } } #[doc = "Field `PEFU1` writer - Parity Error Flag for USIC1 Memory"] -pub type Pefu1W<'a, REG> = crate::BitWriter<'a, REG, Pefu1>; -impl<'a, REG> Pefu1W<'a, REG> +pub type PEFU1_W<'a, REG> = crate::BitWriter<'a, REG, PEFU1_A>; +impl<'a, REG> PEFU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefu1::Value1) + self.variant(PEFU1_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefu1::Value2) + self.variant(PEFU1_A::VALUE2) } } #[doc = "Parity Error Flag for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefmc { +pub enum PEFMC_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefmc) -> Self { + fn from(variant: PEFMC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFMC` reader - Parity Error Flag for MultiCAN Memory"] -pub type PefmcR = crate::BitReader; -impl PefmcR { +pub type PEFMC_R = crate::BitReader; +impl PEFMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefmc { + pub const fn variant(&self) -> PEFMC_A { match self.bits { - false => Pefmc::Value1, - true => Pefmc::Value2, + false => PEFMC_A::VALUE1, + true => PEFMC_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefmc::Value1 + *self == PEFMC_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefmc::Value2 + *self == PEFMC_A::VALUE2 } } #[doc = "Field `PEFMC` writer - Parity Error Flag for MultiCAN Memory"] -pub type PefmcW<'a, REG> = crate::BitWriter<'a, REG, Pefmc>; -impl<'a, REG> PefmcW<'a, REG> +pub type PEFMC_W<'a, REG> = crate::BitWriter<'a, REG, PEFMC_A>; +impl<'a, REG> PEFMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefmc::Value1) + self.variant(PEFMC_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefmc::Value2) + self.variant(PEFMC_A::VALUE2) } } #[doc = "Parity Error Flag for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pefpprf { +pub enum PEFPPRF_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pefpprf) -> Self { + fn from(variant: PEFPPRF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEFPPRF` reader - Parity Error Flag for PMU Prefetch Memory"] -pub type PefpprfR = crate::BitReader; -impl PefpprfR { +pub type PEFPPRF_R = crate::BitReader; +impl PEFPPRF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pefpprf { + pub const fn variant(&self) -> PEFPPRF_A { match self.bits { - false => Pefpprf::Value1, - true => Pefpprf::Value2, + false => PEFPPRF_A::VALUE1, + true => PEFPPRF_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pefpprf::Value1 + *self == PEFPPRF_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pefpprf::Value2 + *self == PEFPPRF_A::VALUE2 } } #[doc = "Field `PEFPPRF` writer - Parity Error Flag for PMU Prefetch Memory"] -pub type PefpprfW<'a, REG> = crate::BitWriter<'a, REG, Pefpprf>; -impl<'a, REG> PefpprfW<'a, REG> +pub type PEFPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PEFPPRF_A>; +impl<'a, REG> PEFPPRF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pefpprf::Value1) + self.variant(PEFPPRF_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pefpprf::Value2) + self.variant(PEFPPRF_A::VALUE2) } } #[doc = "Parity Error Flag for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peusb { +pub enum PEUSB_A { #[doc = "0: No parity error detected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity error detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peusb) -> Self { + fn from(variant: PEUSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PEUSB` reader - Parity Error Flag for USB Memory"] -pub type PeusbR = crate::BitReader; -impl PeusbR { +pub type PEUSB_R = crate::BitReader; +impl PEUSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peusb { + pub const fn variant(&self) -> PEUSB_A { match self.bits { - false => Peusb::Value1, - true => Peusb::Value2, + false => PEUSB_A::VALUE1, + true => PEUSB_A::VALUE2, } } #[doc = "No parity error detected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peusb::Value1 + *self == PEUSB_A::VALUE1 } #[doc = "Parity error detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peusb::Value2 + *self == PEUSB_A::VALUE2 } } #[doc = "Field `PEUSB` writer - Parity Error Flag for USB Memory"] -pub type PeusbW<'a, REG> = crate::BitWriter<'a, REG, Peusb>; -impl<'a, REG> PeusbW<'a, REG> +pub type PEUSB_W<'a, REG> = crate::BitWriter<'a, REG, PEUSB_A>; +impl<'a, REG> PEUSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No parity error detected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peusb::Value1) + self.variant(PEUSB_A::VALUE1) } #[doc = "Parity error detected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peusb::Value2) + self.variant(PEUSB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Parity Error Flag for PSRAM"] #[inline(always)] - pub fn pefps(&self) -> PefpsR { - PefpsR::new((self.bits & 1) != 0) + pub fn pefps(&self) -> PEFPS_R { + PEFPS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Flag for DSRAM1"] #[inline(always)] - pub fn pefds1(&self) -> Pefds1R { - Pefds1R::new(((self.bits >> 1) & 1) != 0) + pub fn pefds1(&self) -> PEFDS1_R { + PEFDS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"] #[inline(always)] - pub fn pefu0(&self) -> Pefu0R { - Pefu0R::new(((self.bits >> 8) & 1) != 0) + pub fn pefu0(&self) -> PEFU0_R { + PEFU0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"] #[inline(always)] - pub fn pefu1(&self) -> Pefu1R { - Pefu1R::new(((self.bits >> 9) & 1) != 0) + pub fn pefu1(&self) -> PEFU1_R { + PEFU1_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"] #[inline(always)] - pub fn pefmc(&self) -> PefmcR { - PefmcR::new(((self.bits >> 12) & 1) != 0) + pub fn pefmc(&self) -> PEFMC_R { + PEFMC_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"] #[inline(always)] - pub fn pefpprf(&self) -> PefpprfR { - PefpprfR::new(((self.bits >> 13) & 1) != 0) + pub fn pefpprf(&self) -> PEFPPRF_R { + PEFPPRF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Flag for USB Memory"] #[inline(always)] - pub fn peusb(&self) -> PeusbR { - PeusbR::new(((self.bits >> 16) & 1) != 0) + pub fn peusb(&self) -> PEUSB_R { + PEUSB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Flag for PSRAM"] #[inline(always)] #[must_use] - pub fn pefps(&mut self) -> PefpsW { - PefpsW::new(self, 0) + pub fn pefps(&mut self) -> PEFPS_W { + PEFPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Flag for DSRAM1"] #[inline(always)] #[must_use] - pub fn pefds1(&mut self) -> Pefds1W { - Pefds1W::new(self, 1) + pub fn pefds1(&mut self) -> PEFDS1_W { + PEFDS1_W::new(self, 1) } #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn pefu0(&mut self) -> Pefu0W { - Pefu0W::new(self, 8) + pub fn pefu0(&mut self) -> PEFU0_W { + PEFU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn pefu1(&mut self) -> Pefu1W { - Pefu1W::new(self, 9) + pub fn pefu1(&mut self) -> PEFU1_W { + PEFU1_W::new(self, 9) } #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn pefmc(&mut self) -> PefmcW { - PefmcW::new(self, 12) + pub fn pefmc(&mut self) -> PEFMC_W { + PEFMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn pefpprf(&mut self) -> PefpprfW { - PefpprfW::new(self, 13) + pub fn pefpprf(&mut self) -> PEFPPRF_W { + PEFPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Flag for USB Memory"] #[inline(always)] #[must_use] - pub fn peusb(&mut self) -> PeusbW { - PeusbW::new(self, 16) + pub fn peusb(&mut self) -> PEUSB_W { + PEUSB_W::new(self, 16) } } #[doc = "Parity Error Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PeflagSpec; -impl crate::RegisterSpec for PeflagSpec { +pub struct PEFLAG_SPEC; +impl crate::RegisterSpec for PEFLAG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`peflag::R`](R) reader structure"] -impl crate::Readable for PeflagSpec {} +impl crate::Readable for PEFLAG_SPEC {} #[doc = "`write(|w| ..)` method takes [`peflag::W`](W) writer structure"] -impl crate::Writable for PeflagSpec { +impl crate::Writable for PEFLAG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PEFLAG to value 0"] -impl crate::Resettable for PeflagSpec { +impl crate::Resettable for PEFLAG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/persten.rs b/src/scu_parity/persten.rs index 7160d027..6b0c234c 100644 --- a/src/scu_parity/persten.rs +++ b/src/scu_parity/persten.rs @@ -1,89 +1,89 @@ #[doc = "Register `PERSTEN` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PERSTEN` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System Reset Enable upon Parity Error Trap\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsen { +pub enum RSEN_A { #[doc = "0: Reset request disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset request enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsen) -> Self { + fn from(variant: RSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSEN` reader - System Reset Enable upon Parity Error Trap"] -pub type RsenR = crate::BitReader; -impl RsenR { +pub type RSEN_R = crate::BitReader; +impl RSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsen { + pub const fn variant(&self) -> RSEN_A { match self.bits { - false => Rsen::Value1, - true => Rsen::Value2, + false => RSEN_A::VALUE1, + true => RSEN_A::VALUE2, } } #[doc = "Reset request disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsen::Value1 + *self == RSEN_A::VALUE1 } #[doc = "Reset request enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsen::Value2 + *self == RSEN_A::VALUE2 } } #[doc = "Field `RSEN` writer - System Reset Enable upon Parity Error Trap"] -pub type RsenW<'a, REG> = crate::BitWriter<'a, REG, Rsen>; -impl<'a, REG> RsenW<'a, REG> +pub type RSEN_W<'a, REG> = crate::BitWriter<'a, REG, RSEN_A>; +impl<'a, REG> RSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Reset request disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsen::Value1) + self.variant(RSEN_A::VALUE1) } #[doc = "Reset request enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsen::Value2) + self.variant(RSEN_A::VALUE2) } } impl R { #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"] #[inline(always)] - pub fn rsen(&self) -> RsenR { - RsenR::new((self.bits & 1) != 0) + pub fn rsen(&self) -> RSEN_R { + RSEN_R::new((self.bits & 1) != 0) } } impl W { #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"] #[inline(always)] #[must_use] - pub fn rsen(&mut self) -> RsenW { - RsenW::new(self, 0) + pub fn rsen(&mut self) -> RSEN_W { + RSEN_W::new(self, 0) } } #[doc = "Parity Error Reset Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`persten::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`persten::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PerstenSpec; -impl crate::RegisterSpec for PerstenSpec { +pub struct PERSTEN_SPEC; +impl crate::RegisterSpec for PERSTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`persten::R`](R) reader structure"] -impl crate::Readable for PerstenSpec {} +impl crate::Readable for PERSTEN_SPEC {} #[doc = "`write(|w| ..)` method takes [`persten::W`](W) writer structure"] -impl crate::Writable for PerstenSpec { +impl crate::Writable for PERSTEN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PERSTEN to value 0"] -impl crate::Resettable for PerstenSpec { +impl crate::Resettable for PERSTEN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pete.rs b/src/scu_parity/pete.rs index 1f821e55..fbcbe6c8 100644 --- a/src/scu_parity/pete.rs +++ b/src/scu_parity/pete.rs @@ -1,473 +1,473 @@ #[doc = "Register `PETE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PETE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Parity Error Trap Enable for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peteps { +pub enum PETEPS_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peteps) -> Self { + fn from(variant: PETEPS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEPS` reader - Parity Error Trap Enable for PSRAM"] -pub type PetepsR = crate::BitReader; -impl PetepsR { +pub type PETEPS_R = crate::BitReader; +impl PETEPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peteps { + pub const fn variant(&self) -> PETEPS_A { match self.bits { - false => Peteps::Value1, - true => Peteps::Value2, + false => PETEPS_A::VALUE1, + true => PETEPS_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peteps::Value1 + *self == PETEPS_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peteps::Value2 + *self == PETEPS_A::VALUE2 } } #[doc = "Field `PETEPS` writer - Parity Error Trap Enable for PSRAM"] -pub type PetepsW<'a, REG> = crate::BitWriter<'a, REG, Peteps>; -impl<'a, REG> PetepsW<'a, REG> +pub type PETEPS_W<'a, REG> = crate::BitWriter<'a, REG, PETEPS_A>; +impl<'a, REG> PETEPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peteps::Value1) + self.variant(PETEPS_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peteps::Value2) + self.variant(PETEPS_A::VALUE2) } } #[doc = "Parity Error Trap Enable for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peteds1 { +pub enum PETEDS1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peteds1) -> Self { + fn from(variant: PETEDS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEDS1` reader - Parity Error Trap Enable for DSRAM1"] -pub type Peteds1R = crate::BitReader; -impl Peteds1R { +pub type PETEDS1_R = crate::BitReader; +impl PETEDS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peteds1 { + pub const fn variant(&self) -> PETEDS1_A { match self.bits { - false => Peteds1::Value1, - true => Peteds1::Value2, + false => PETEDS1_A::VALUE1, + true => PETEDS1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peteds1::Value1 + *self == PETEDS1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peteds1::Value2 + *self == PETEDS1_A::VALUE2 } } #[doc = "Field `PETEDS1` writer - Parity Error Trap Enable for DSRAM1"] -pub type Peteds1W<'a, REG> = crate::BitWriter<'a, REG, Peteds1>; -impl<'a, REG> Peteds1W<'a, REG> +pub type PETEDS1_W<'a, REG> = crate::BitWriter<'a, REG, PETEDS1_A>; +impl<'a, REG> PETEDS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peteds1::Value1) + self.variant(PETEDS1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peteds1::Value2) + self.variant(PETEDS1_A::VALUE2) } } #[doc = "Parity Error Trap Enable for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peteu0 { +pub enum PETEU0_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peteu0) -> Self { + fn from(variant: PETEU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEU0` reader - Parity Error Trap Enable for USIC0 Memory"] -pub type Peteu0R = crate::BitReader; -impl Peteu0R { +pub type PETEU0_R = crate::BitReader; +impl PETEU0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peteu0 { + pub const fn variant(&self) -> PETEU0_A { match self.bits { - false => Peteu0::Value1, - true => Peteu0::Value2, + false => PETEU0_A::VALUE1, + true => PETEU0_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peteu0::Value1 + *self == PETEU0_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peteu0::Value2 + *self == PETEU0_A::VALUE2 } } #[doc = "Field `PETEU0` writer - Parity Error Trap Enable for USIC0 Memory"] -pub type Peteu0W<'a, REG> = crate::BitWriter<'a, REG, Peteu0>; -impl<'a, REG> Peteu0W<'a, REG> +pub type PETEU0_W<'a, REG> = crate::BitWriter<'a, REG, PETEU0_A>; +impl<'a, REG> PETEU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peteu0::Value1) + self.variant(PETEU0_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peteu0::Value2) + self.variant(PETEU0_A::VALUE2) } } #[doc = "Parity Error Trap Enable for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peteu1 { +pub enum PETEU1_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peteu1) -> Self { + fn from(variant: PETEU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEU1` reader - Parity Error Trap Enable for USIC1 Memory"] -pub type Peteu1R = crate::BitReader; -impl Peteu1R { +pub type PETEU1_R = crate::BitReader; +impl PETEU1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peteu1 { + pub const fn variant(&self) -> PETEU1_A { match self.bits { - false => Peteu1::Value1, - true => Peteu1::Value2, + false => PETEU1_A::VALUE1, + true => PETEU1_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peteu1::Value1 + *self == PETEU1_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peteu1::Value2 + *self == PETEU1_A::VALUE2 } } #[doc = "Field `PETEU1` writer - Parity Error Trap Enable for USIC1 Memory"] -pub type Peteu1W<'a, REG> = crate::BitWriter<'a, REG, Peteu1>; -impl<'a, REG> Peteu1W<'a, REG> +pub type PETEU1_W<'a, REG> = crate::BitWriter<'a, REG, PETEU1_A>; +impl<'a, REG> PETEU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peteu1::Value1) + self.variant(PETEU1_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peteu1::Value2) + self.variant(PETEU1_A::VALUE2) } } #[doc = "Parity Error Trap Enable for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Petemc { +pub enum PETEMC_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Petemc) -> Self { + fn from(variant: PETEMC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEMC` reader - Parity Error Trap Enable for MultiCAN Memory"] -pub type PetemcR = crate::BitReader; -impl PetemcR { +pub type PETEMC_R = crate::BitReader; +impl PETEMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Petemc { + pub const fn variant(&self) -> PETEMC_A { match self.bits { - false => Petemc::Value1, - true => Petemc::Value2, + false => PETEMC_A::VALUE1, + true => PETEMC_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Petemc::Value1 + *self == PETEMC_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Petemc::Value2 + *self == PETEMC_A::VALUE2 } } #[doc = "Field `PETEMC` writer - Parity Error Trap Enable for MultiCAN Memory"] -pub type PetemcW<'a, REG> = crate::BitWriter<'a, REG, Petemc>; -impl<'a, REG> PetemcW<'a, REG> +pub type PETEMC_W<'a, REG> = crate::BitWriter<'a, REG, PETEMC_A>; +impl<'a, REG> PETEMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Petemc::Value1) + self.variant(PETEMC_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Petemc::Value2) + self.variant(PETEMC_A::VALUE2) } } #[doc = "Parity Error Trap Enable for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Petepprf { +pub enum PETEPPRF_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Petepprf) -> Self { + fn from(variant: PETEPPRF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEPPRF` reader - Parity Error Trap Enable for PMU Prefetch Memory"] -pub type PetepprfR = crate::BitReader; -impl PetepprfR { +pub type PETEPPRF_R = crate::BitReader; +impl PETEPPRF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Petepprf { + pub const fn variant(&self) -> PETEPPRF_A { match self.bits { - false => Petepprf::Value1, - true => Petepprf::Value2, + false => PETEPPRF_A::VALUE1, + true => PETEPPRF_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Petepprf::Value1 + *self == PETEPPRF_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Petepprf::Value2 + *self == PETEPPRF_A::VALUE2 } } #[doc = "Field `PETEPPRF` writer - Parity Error Trap Enable for PMU Prefetch Memory"] -pub type PetepprfW<'a, REG> = crate::BitWriter<'a, REG, Petepprf>; -impl<'a, REG> PetepprfW<'a, REG> +pub type PETEPPRF_W<'a, REG> = crate::BitWriter<'a, REG, PETEPPRF_A>; +impl<'a, REG> PETEPPRF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Petepprf::Value1) + self.variant(PETEPPRF_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Petepprf::Value2) + self.variant(PETEPPRF_A::VALUE2) } } #[doc = "Parity Error Trap Enable for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Peteusb { +pub enum PETEUSB_A { #[doc = "0: Disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Peteusb) -> Self { + fn from(variant: PETEUSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PETEUSB` reader - Parity Error Trap Enable for USB Memory"] -pub type PeteusbR = crate::BitReader; -impl PeteusbR { +pub type PETEUSB_R = crate::BitReader; +impl PETEUSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Peteusb { + pub const fn variant(&self) -> PETEUSB_A { match self.bits { - false => Peteusb::Value1, - true => Peteusb::Value2, + false => PETEUSB_A::VALUE1, + true => PETEUSB_A::VALUE2, } } #[doc = "Disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Peteusb::Value1 + *self == PETEUSB_A::VALUE1 } #[doc = "Enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Peteusb::Value2 + *self == PETEUSB_A::VALUE2 } } #[doc = "Field `PETEUSB` writer - Parity Error Trap Enable for USB Memory"] -pub type PeteusbW<'a, REG> = crate::BitWriter<'a, REG, Peteusb>; -impl<'a, REG> PeteusbW<'a, REG> +pub type PETEUSB_W<'a, REG> = crate::BitWriter<'a, REG, PETEUSB_A>; +impl<'a, REG> PETEUSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Peteusb::Value1) + self.variant(PETEUSB_A::VALUE1) } #[doc = "Enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Peteusb::Value2) + self.variant(PETEUSB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"] #[inline(always)] - pub fn peteps(&self) -> PetepsR { - PetepsR::new((self.bits & 1) != 0) + pub fn peteps(&self) -> PETEPS_R { + PETEPS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"] #[inline(always)] - pub fn peteds1(&self) -> Peteds1R { - Peteds1R::new(((self.bits >> 1) & 1) != 0) + pub fn peteds1(&self) -> PETEDS1_R { + PETEDS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"] #[inline(always)] - pub fn peteu0(&self) -> Peteu0R { - Peteu0R::new(((self.bits >> 8) & 1) != 0) + pub fn peteu0(&self) -> PETEU0_R { + PETEU0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"] #[inline(always)] - pub fn peteu1(&self) -> Peteu1R { - Peteu1R::new(((self.bits >> 9) & 1) != 0) + pub fn peteu1(&self) -> PETEU1_R { + PETEU1_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"] #[inline(always)] - pub fn petemc(&self) -> PetemcR { - PetemcR::new(((self.bits >> 12) & 1) != 0) + pub fn petemc(&self) -> PETEMC_R { + PETEMC_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"] #[inline(always)] - pub fn petepprf(&self) -> PetepprfR { - PetepprfR::new(((self.bits >> 13) & 1) != 0) + pub fn petepprf(&self) -> PETEPPRF_R { + PETEPPRF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"] #[inline(always)] - pub fn peteusb(&self) -> PeteusbR { - PeteusbR::new(((self.bits >> 16) & 1) != 0) + pub fn peteusb(&self) -> PETEUSB_R { + PETEUSB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"] #[inline(always)] #[must_use] - pub fn peteps(&mut self) -> PetepsW { - PetepsW::new(self, 0) + pub fn peteps(&mut self) -> PETEPS_W { + PETEPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"] #[inline(always)] #[must_use] - pub fn peteds1(&mut self) -> Peteds1W { - Peteds1W::new(self, 1) + pub fn peteds1(&mut self) -> PETEDS1_W { + PETEDS1_W::new(self, 1) } #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn peteu0(&mut self) -> Peteu0W { - Peteu0W::new(self, 8) + pub fn peteu0(&mut self) -> PETEU0_W { + PETEU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn peteu1(&mut self) -> Peteu1W { - Peteu1W::new(self, 9) + pub fn peteu1(&mut self) -> PETEU1_W { + PETEU1_W::new(self, 9) } #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn petemc(&mut self) -> PetemcW { - PetemcW::new(self, 12) + pub fn petemc(&mut self) -> PETEMC_W { + PETEMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn petepprf(&mut self) -> PetepprfW { - PetepprfW::new(self, 13) + pub fn petepprf(&mut self) -> PETEPPRF_W { + PETEPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"] #[inline(always)] #[must_use] - pub fn peteusb(&mut self) -> PeteusbW { - PeteusbW::new(self, 16) + pub fn peteusb(&mut self) -> PETEUSB_W { + PETEUSB_W::new(self, 16) } } #[doc = "Parity Error Trap Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pete::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pete::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PeteSpec; -impl crate::RegisterSpec for PeteSpec { +pub struct PETE_SPEC; +impl crate::RegisterSpec for PETE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pete::R`](R) reader structure"] -impl crate::Readable for PeteSpec {} +impl crate::Readable for PETE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pete::W`](W) writer structure"] -impl crate::Writable for PeteSpec { +impl crate::Writable for PETE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PETE to value 0"] -impl crate::Resettable for PeteSpec { +impl crate::Resettable for PETE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pmtpr.rs b/src/scu_parity/pmtpr.rs index 567eacd6..06d3001c 100644 --- a/src/scu_parity/pmtpr.rs +++ b/src/scu_parity/pmtpr.rs @@ -1,47 +1,47 @@ #[doc = "Register `PMTPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PMTPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `PWR` reader - Parity Write Values for Memory Test"] -pub type PwrR = crate::FieldReader; +pub type PWR_R = crate::FieldReader; #[doc = "Field `PWR` writer - Parity Write Values for Memory Test"] -pub type PwrW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type PWR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `PRD` reader - Parity Read Values for Memory Test"] -pub type PrdR = crate::FieldReader; +pub type PRD_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Parity Write Values for Memory Test"] #[inline(always)] - pub fn pwr(&self) -> PwrR { - PwrR::new((self.bits & 0xff) as u8) + pub fn pwr(&self) -> PWR_R { + PWR_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Parity Read Values for Memory Test"] #[inline(always)] - pub fn prd(&self) -> PrdR { - PrdR::new(((self.bits >> 8) & 0xff) as u8) + pub fn prd(&self) -> PRD_R { + PRD_R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Parity Write Values for Memory Test"] #[inline(always)] #[must_use] - pub fn pwr(&mut self) -> PwrW { - PwrW::new(self, 0) + pub fn pwr(&mut self) -> PWR_W { + PWR_W::new(self, 0) } } #[doc = "Parity Memory Test Pattern Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PmtprSpec; -impl crate::RegisterSpec for PmtprSpec { +pub struct PMTPR_SPEC; +impl crate::RegisterSpec for PMTPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pmtpr::R`](R) reader structure"] -impl crate::Readable for PmtprSpec {} +impl crate::Readable for PMTPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`pmtpr::W`](W) writer structure"] -impl crate::Writable for PmtprSpec { +impl crate::Writable for PMTPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMTPR to value 0"] -impl crate::Resettable for PmtprSpec { +impl crate::Resettable for PMTPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_parity/pmtsr.rs b/src/scu_parity/pmtsr.rs index 71fc600d..e15a460e 100644 --- a/src/scu_parity/pmtsr.rs +++ b/src/scu_parity/pmtsr.rs @@ -1,473 +1,473 @@ #[doc = "Register `PMTSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PMTSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Test Enable Control for PSRAM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mtenps { +pub enum MTENPS_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mtenps) -> Self { + fn from(variant: MTENPS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTENPS` reader - Test Enable Control for PSRAM"] -pub type MtenpsR = crate::BitReader; -impl MtenpsR { +pub type MTENPS_R = crate::BitReader; +impl MTENPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mtenps { + pub const fn variant(&self) -> MTENPS_A { match self.bits { - false => Mtenps::Value1, - true => Mtenps::Value2, + false => MTENPS_A::VALUE1, + true => MTENPS_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mtenps::Value1 + *self == MTENPS_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mtenps::Value2 + *self == MTENPS_A::VALUE2 } } #[doc = "Field `MTENPS` writer - Test Enable Control for PSRAM"] -pub type MtenpsW<'a, REG> = crate::BitWriter<'a, REG, Mtenps>; -impl<'a, REG> MtenpsW<'a, REG> +pub type MTENPS_W<'a, REG> = crate::BitWriter<'a, REG, MTENPS_A>; +impl<'a, REG> MTENPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtenps::Value1) + self.variant(MTENPS_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtenps::Value2) + self.variant(MTENPS_A::VALUE2) } } #[doc = "Test Enable Control for DSRAM1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mtends1 { +pub enum MTENDS1_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mtends1) -> Self { + fn from(variant: MTENDS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTENDS1` reader - Test Enable Control for DSRAM1"] -pub type Mtends1R = crate::BitReader; -impl Mtends1R { +pub type MTENDS1_R = crate::BitReader; +impl MTENDS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mtends1 { + pub const fn variant(&self) -> MTENDS1_A { match self.bits { - false => Mtends1::Value1, - true => Mtends1::Value2, + false => MTENDS1_A::VALUE1, + true => MTENDS1_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mtends1::Value1 + *self == MTENDS1_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mtends1::Value2 + *self == MTENDS1_A::VALUE2 } } #[doc = "Field `MTENDS1` writer - Test Enable Control for DSRAM1"] -pub type Mtends1W<'a, REG> = crate::BitWriter<'a, REG, Mtends1>; -impl<'a, REG> Mtends1W<'a, REG> +pub type MTENDS1_W<'a, REG> = crate::BitWriter<'a, REG, MTENDS1_A>; +impl<'a, REG> MTENDS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtends1::Value1) + self.variant(MTENDS1_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtends1::Value2) + self.variant(MTENDS1_A::VALUE2) } } #[doc = "Test Enable Control for USIC0 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mteu0 { +pub enum MTEU0_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mteu0) -> Self { + fn from(variant: MTEU0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTEU0` reader - Test Enable Control for USIC0 Memory"] -pub type Mteu0R = crate::BitReader; -impl Mteu0R { +pub type MTEU0_R = crate::BitReader; +impl MTEU0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mteu0 { + pub const fn variant(&self) -> MTEU0_A { match self.bits { - false => Mteu0::Value1, - true => Mteu0::Value2, + false => MTEU0_A::VALUE1, + true => MTEU0_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mteu0::Value1 + *self == MTEU0_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mteu0::Value2 + *self == MTEU0_A::VALUE2 } } #[doc = "Field `MTEU0` writer - Test Enable Control for USIC0 Memory"] -pub type Mteu0W<'a, REG> = crate::BitWriter<'a, REG, Mteu0>; -impl<'a, REG> Mteu0W<'a, REG> +pub type MTEU0_W<'a, REG> = crate::BitWriter<'a, REG, MTEU0_A>; +impl<'a, REG> MTEU0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mteu0::Value1) + self.variant(MTEU0_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mteu0::Value2) + self.variant(MTEU0_A::VALUE2) } } #[doc = "Test Enable Control for USIC1 Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mteu1 { +pub enum MTEU1_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mteu1) -> Self { + fn from(variant: MTEU1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTEU1` reader - Test Enable Control for USIC1 Memory"] -pub type Mteu1R = crate::BitReader; -impl Mteu1R { +pub type MTEU1_R = crate::BitReader; +impl MTEU1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mteu1 { + pub const fn variant(&self) -> MTEU1_A { match self.bits { - false => Mteu1::Value1, - true => Mteu1::Value2, + false => MTEU1_A::VALUE1, + true => MTEU1_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mteu1::Value1 + *self == MTEU1_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mteu1::Value2 + *self == MTEU1_A::VALUE2 } } #[doc = "Field `MTEU1` writer - Test Enable Control for USIC1 Memory"] -pub type Mteu1W<'a, REG> = crate::BitWriter<'a, REG, Mteu1>; -impl<'a, REG> Mteu1W<'a, REG> +pub type MTEU1_W<'a, REG> = crate::BitWriter<'a, REG, MTEU1_A>; +impl<'a, REG> MTEU1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mteu1::Value1) + self.variant(MTEU1_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mteu1::Value2) + self.variant(MTEU1_A::VALUE2) } } #[doc = "Test Enable Control for MultiCAN Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mtemc { +pub enum MTEMC_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mtemc) -> Self { + fn from(variant: MTEMC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTEMC` reader - Test Enable Control for MultiCAN Memory"] -pub type MtemcR = crate::BitReader; -impl MtemcR { +pub type MTEMC_R = crate::BitReader; +impl MTEMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mtemc { + pub const fn variant(&self) -> MTEMC_A { match self.bits { - false => Mtemc::Value1, - true => Mtemc::Value2, + false => MTEMC_A::VALUE1, + true => MTEMC_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mtemc::Value1 + *self == MTEMC_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mtemc::Value2 + *self == MTEMC_A::VALUE2 } } #[doc = "Field `MTEMC` writer - Test Enable Control for MultiCAN Memory"] -pub type MtemcW<'a, REG> = crate::BitWriter<'a, REG, Mtemc>; -impl<'a, REG> MtemcW<'a, REG> +pub type MTEMC_W<'a, REG> = crate::BitWriter<'a, REG, MTEMC_A>; +impl<'a, REG> MTEMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtemc::Value1) + self.variant(MTEMC_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtemc::Value2) + self.variant(MTEMC_A::VALUE2) } } #[doc = "Test Enable Control for PMU Prefetch Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mtepprf { +pub enum MTEPPRF_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mtepprf) -> Self { + fn from(variant: MTEPPRF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTEPPRF` reader - Test Enable Control for PMU Prefetch Memory"] -pub type MtepprfR = crate::BitReader; -impl MtepprfR { +pub type MTEPPRF_R = crate::BitReader; +impl MTEPPRF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mtepprf { + pub const fn variant(&self) -> MTEPPRF_A { match self.bits { - false => Mtepprf::Value1, - true => Mtepprf::Value2, + false => MTEPPRF_A::VALUE1, + true => MTEPPRF_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mtepprf::Value1 + *self == MTEPPRF_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mtepprf::Value2 + *self == MTEPPRF_A::VALUE2 } } #[doc = "Field `MTEPPRF` writer - Test Enable Control for PMU Prefetch Memory"] -pub type MtepprfW<'a, REG> = crate::BitWriter<'a, REG, Mtepprf>; -impl<'a, REG> MtepprfW<'a, REG> +pub type MTEPPRF_W<'a, REG> = crate::BitWriter<'a, REG, MTEPPRF_A>; +impl<'a, REG> MTEPPRF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtepprf::Value1) + self.variant(MTEPPRF_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtepprf::Value2) + self.variant(MTEPPRF_A::VALUE2) } } #[doc = "Test Enable Control for USB Memory\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mtusb { +pub enum MTUSB_A { #[doc = "0: Standard operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Parity bits under test"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mtusb) -> Self { + fn from(variant: MTUSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MTUSB` reader - Test Enable Control for USB Memory"] -pub type MtusbR = crate::BitReader; -impl MtusbR { +pub type MTUSB_R = crate::BitReader; +impl MTUSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mtusb { + pub const fn variant(&self) -> MTUSB_A { match self.bits { - false => Mtusb::Value1, - true => Mtusb::Value2, + false => MTUSB_A::VALUE1, + true => MTUSB_A::VALUE2, } } #[doc = "Standard operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mtusb::Value1 + *self == MTUSB_A::VALUE1 } #[doc = "Parity bits under test"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mtusb::Value2 + *self == MTUSB_A::VALUE2 } } #[doc = "Field `MTUSB` writer - Test Enable Control for USB Memory"] -pub type MtusbW<'a, REG> = crate::BitWriter<'a, REG, Mtusb>; -impl<'a, REG> MtusbW<'a, REG> +pub type MTUSB_W<'a, REG> = crate::BitWriter<'a, REG, MTUSB_A>; +impl<'a, REG> MTUSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtusb::Value1) + self.variant(MTUSB_A::VALUE1) } #[doc = "Parity bits under test"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtusb::Value2) + self.variant(MTUSB_A::VALUE2) } } impl R { #[doc = "Bit 0 - Test Enable Control for PSRAM"] #[inline(always)] - pub fn mtenps(&self) -> MtenpsR { - MtenpsR::new((self.bits & 1) != 0) + pub fn mtenps(&self) -> MTENPS_R { + MTENPS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Test Enable Control for DSRAM1"] #[inline(always)] - pub fn mtends1(&self) -> Mtends1R { - Mtends1R::new(((self.bits >> 1) & 1) != 0) + pub fn mtends1(&self) -> MTENDS1_R { + MTENDS1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"] #[inline(always)] - pub fn mteu0(&self) -> Mteu0R { - Mteu0R::new(((self.bits >> 8) & 1) != 0) + pub fn mteu0(&self) -> MTEU0_R { + MTEU0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"] #[inline(always)] - pub fn mteu1(&self) -> Mteu1R { - Mteu1R::new(((self.bits >> 9) & 1) != 0) + pub fn mteu1(&self) -> MTEU1_R { + MTEU1_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"] #[inline(always)] - pub fn mtemc(&self) -> MtemcR { - MtemcR::new(((self.bits >> 12) & 1) != 0) + pub fn mtemc(&self) -> MTEMC_R { + MTEMC_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"] #[inline(always)] - pub fn mtepprf(&self) -> MtepprfR { - MtepprfR::new(((self.bits >> 13) & 1) != 0) + pub fn mtepprf(&self) -> MTEPPRF_R { + MTEPPRF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 16 - Test Enable Control for USB Memory"] #[inline(always)] - pub fn mtusb(&self) -> MtusbR { - MtusbR::new(((self.bits >> 16) & 1) != 0) + pub fn mtusb(&self) -> MTUSB_R { + MTUSB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Test Enable Control for PSRAM"] #[inline(always)] #[must_use] - pub fn mtenps(&mut self) -> MtenpsW { - MtenpsW::new(self, 0) + pub fn mtenps(&mut self) -> MTENPS_W { + MTENPS_W::new(self, 0) } #[doc = "Bit 1 - Test Enable Control for DSRAM1"] #[inline(always)] #[must_use] - pub fn mtends1(&mut self) -> Mtends1W { - Mtends1W::new(self, 1) + pub fn mtends1(&mut self) -> MTENDS1_W { + MTENDS1_W::new(self, 1) } #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"] #[inline(always)] #[must_use] - pub fn mteu0(&mut self) -> Mteu0W { - Mteu0W::new(self, 8) + pub fn mteu0(&mut self) -> MTEU0_W { + MTEU0_W::new(self, 8) } #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"] #[inline(always)] #[must_use] - pub fn mteu1(&mut self) -> Mteu1W { - Mteu1W::new(self, 9) + pub fn mteu1(&mut self) -> MTEU1_W { + MTEU1_W::new(self, 9) } #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"] #[inline(always)] #[must_use] - pub fn mtemc(&mut self) -> MtemcW { - MtemcW::new(self, 12) + pub fn mtemc(&mut self) -> MTEMC_W { + MTEMC_W::new(self, 12) } #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"] #[inline(always)] #[must_use] - pub fn mtepprf(&mut self) -> MtepprfW { - MtepprfW::new(self, 13) + pub fn mtepprf(&mut self) -> MTEPPRF_W { + MTEPPRF_W::new(self, 13) } #[doc = "Bit 16 - Test Enable Control for USB Memory"] #[inline(always)] #[must_use] - pub fn mtusb(&mut self) -> MtusbW { - MtusbW::new(self, 16) + pub fn mtusb(&mut self) -> MTUSB_W { + MTUSB_W::new(self, 16) } } #[doc = "Parity Memory Test Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pmtsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pmtsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PmtsrSpec; -impl crate::RegisterSpec for PmtsrSpec { +pub struct PMTSR_SPEC; +impl crate::RegisterSpec for PMTSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pmtsr::R`](R) reader structure"] -impl crate::Readable for PmtsrSpec {} +impl crate::Readable for PMTSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`pmtsr::W`](W) writer structure"] -impl crate::Writable for PmtsrSpec { +impl crate::Writable for PMTSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PMTSR to value 0"] -impl crate::Resettable for PmtsrSpec { +impl crate::Resettable for PMTSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll.rs b/src/scu_pll.rs index 1b33bf26..d151e5e0 100644 --- a/src/scu_pll.rs +++ b/src/scu_pll.rs @@ -1,91 +1,84 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - pllstat: Pllstat, - pllcon0: Pllcon0, - pllcon1: Pllcon1, - pllcon2: Pllcon2, - usbpllstat: Usbpllstat, - usbpllcon: Usbpllcon, + pllstat: PLLSTAT, + pllcon0: PLLCON0, + pllcon1: PLLCON1, + pllcon2: PLLCON2, + usbpllstat: USBPLLSTAT, + usbpllcon: USBPLLCON, _reserved6: [u8; 0x10], - clkmxstat: Clkmxstat, + clkmxstat: CLKMXSTAT, } impl RegisterBlock { #[doc = "0x00 - PLL Status Register"] #[inline(always)] - pub const fn pllstat(&self) -> &Pllstat { + pub const fn pllstat(&self) -> &PLLSTAT { &self.pllstat } #[doc = "0x04 - PLL Configuration 0 Register"] #[inline(always)] - pub const fn pllcon0(&self) -> &Pllcon0 { + pub const fn pllcon0(&self) -> &PLLCON0 { &self.pllcon0 } #[doc = "0x08 - PLL Configuration 1 Register"] #[inline(always)] - pub const fn pllcon1(&self) -> &Pllcon1 { + pub const fn pllcon1(&self) -> &PLLCON1 { &self.pllcon1 } #[doc = "0x0c - PLL Configuration 2 Register"] #[inline(always)] - pub const fn pllcon2(&self) -> &Pllcon2 { + pub const fn pllcon2(&self) -> &PLLCON2 { &self.pllcon2 } #[doc = "0x10 - USB PLL Status Register"] #[inline(always)] - pub const fn usbpllstat(&self) -> &Usbpllstat { + pub const fn usbpllstat(&self) -> &USBPLLSTAT { &self.usbpllstat } #[doc = "0x14 - USB PLL Configuration Register"] #[inline(always)] - pub const fn usbpllcon(&self) -> &Usbpllcon { + pub const fn usbpllcon(&self) -> &USBPLLCON { &self.usbpllcon } #[doc = "0x28 - Clock Multiplexing Status Register"] #[inline(always)] - pub const fn clkmxstat(&self) -> &Clkmxstat { + pub const fn clkmxstat(&self) -> &CLKMXSTAT { &self.clkmxstat } } #[doc = "PLLSTAT (r) register accessor: PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllstat`] module"] -#[doc(alias = "PLLSTAT")] -pub type Pllstat = crate::Reg; +pub type PLLSTAT = crate::Reg; #[doc = "PLL Status Register"] pub mod pllstat; #[doc = "PLLCON0 (rw) register accessor: PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon0`] module"] -#[doc(alias = "PLLCON0")] -pub type Pllcon0 = crate::Reg; +pub type PLLCON0 = crate::Reg; #[doc = "PLL Configuration 0 Register"] pub mod pllcon0; #[doc = "PLLCON1 (rw) register accessor: PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon1`] module"] -#[doc(alias = "PLLCON1")] -pub type Pllcon1 = crate::Reg; +pub type PLLCON1 = crate::Reg; #[doc = "PLL Configuration 1 Register"] pub mod pllcon1; #[doc = "PLLCON2 (rw) register accessor: PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pllcon2`] module"] -#[doc(alias = "PLLCON2")] -pub type Pllcon2 = crate::Reg; +pub type PLLCON2 = crate::Reg; #[doc = "PLL Configuration 2 Register"] pub mod pllcon2; #[doc = "USBPLLSTAT (r) register accessor: USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllstat`] module"] -#[doc(alias = "USBPLLSTAT")] -pub type Usbpllstat = crate::Reg; +pub type USBPLLSTAT = crate::Reg; #[doc = "USB PLL Status Register"] pub mod usbpllstat; #[doc = "USBPLLCON (rw) register accessor: USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbpllcon`] module"] -#[doc(alias = "USBPLLCON")] -pub type Usbpllcon = crate::Reg; +pub type USBPLLCON = crate::Reg; #[doc = "USB PLL Configuration Register"] pub mod usbpllcon; #[doc = "CLKMXSTAT (r) register accessor: Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkmxstat`] module"] -#[doc(alias = "CLKMXSTAT")] -pub type Clkmxstat = crate::Reg; +pub type CLKMXSTAT = crate::Reg; #[doc = "Clock Multiplexing Status Register"] pub mod clkmxstat; diff --git a/src/scu_pll/clkmxstat.rs b/src/scu_pll/clkmxstat.rs index 5fc9bfd1..a6620392 100644 --- a/src/scu_pll/clkmxstat.rs +++ b/src/scu_pll/clkmxstat.rs @@ -1,62 +1,62 @@ #[doc = "Register `CLKMXSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Status of System clock multiplexing upon source switching\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sysclkmux { +pub enum SYSCLKMUX_A { #[doc = "1: fOFI clock active"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: fPLL clock active"] - Value2 = 2, + VALUE2 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sysclkmux) -> Self { + fn from(variant: SYSCLKMUX_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sysclkmux { +impl crate::FieldSpec for SYSCLKMUX_A { type Ux = u8; } -impl crate::IsEnum for Sysclkmux {} +impl crate::IsEnum for SYSCLKMUX_A {} #[doc = "Field `SYSCLKMUX` reader - Status of System clock multiplexing upon source switching"] -pub type SysclkmuxR = crate::FieldReader; -impl SysclkmuxR { +pub type SYSCLKMUX_R = crate::FieldReader; +impl SYSCLKMUX_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(Sysclkmux::Value1), - 2 => Some(Sysclkmux::Value2), + 1 => Some(SYSCLKMUX_A::VALUE1), + 2 => Some(SYSCLKMUX_A::VALUE2), _ => None, } } #[doc = "fOFI clock active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sysclkmux::Value1 + *self == SYSCLKMUX_A::VALUE1 } #[doc = "fPLL clock active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sysclkmux::Value2 + *self == SYSCLKMUX_A::VALUE2 } } impl R { #[doc = "Bits 0:1 - Status of System clock multiplexing upon source switching"] #[inline(always)] - pub fn sysclkmux(&self) -> SysclkmuxR { - SysclkmuxR::new((self.bits & 3) as u8) + pub fn sysclkmux(&self) -> SYSCLKMUX_R { + SYSCLKMUX_R::new((self.bits & 3) as u8) } } #[doc = "Clock Multiplexing Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkmxstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClkmxstatSpec; -impl crate::RegisterSpec for ClkmxstatSpec { +pub struct CLKMXSTAT_SPEC; +impl crate::RegisterSpec for CLKMXSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clkmxstat::R`](R) reader structure"] -impl crate::Readable for ClkmxstatSpec {} +impl crate::Readable for CLKMXSTAT_SPEC {} #[doc = "`reset()` method sets CLKMXSTAT to value 0"] -impl crate::Resettable for ClkmxstatSpec { +impl crate::Resettable for CLKMXSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll/pllcon0.rs b/src/scu_pll/pllcon0.rs index 4d527058..2c00a500 100644 --- a/src/scu_pll/pllcon0.rs +++ b/src/scu_pll/pllcon0.rs @@ -1,609 +1,609 @@ #[doc = "Register `PLLCON0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VCO Bypass\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcobyp { +pub enum VCOBYP_A { #[doc = "0: Normal operation, VCO is not bypassed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler Mode, VCO is bypassed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcobyp) -> Self { + fn from(variant: VCOBYP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOBYP` reader - VCO Bypass"] -pub type VcobypR = crate::BitReader; -impl VcobypR { +pub type VCOBYP_R = crate::BitReader; +impl VCOBYP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcobyp { + pub const fn variant(&self) -> VCOBYP_A { match self.bits { - false => Vcobyp::Value1, - true => Vcobyp::Value2, + false => VCOBYP_A::VALUE1, + true => VCOBYP_A::VALUE2, } } #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcobyp::Value1 + *self == VCOBYP_A::VALUE1 } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcobyp::Value2 + *self == VCOBYP_A::VALUE2 } } #[doc = "Field `VCOBYP` writer - VCO Bypass"] -pub type VcobypW<'a, REG> = crate::BitWriter<'a, REG, Vcobyp>; -impl<'a, REG> VcobypW<'a, REG> +pub type VCOBYP_W<'a, REG> = crate::BitWriter<'a, REG, VCOBYP_A>; +impl<'a, REG> VCOBYP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcobyp::Value1) + self.variant(VCOBYP_A::VALUE1) } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcobyp::Value2) + self.variant(VCOBYP_A::VALUE2) } } #[doc = "VCO Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcopwd { +pub enum VCOPWD_A { #[doc = "0: Normal behavior"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcopwd) -> Self { + fn from(variant: VCOPWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] -pub type VcopwdR = crate::BitReader; -impl VcopwdR { +pub type VCOPWD_R = crate::BitReader; +impl VCOPWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcopwd { + pub const fn variant(&self) -> VCOPWD_A { match self.bits { - false => Vcopwd::Value1, - true => Vcopwd::Value2, + false => VCOPWD_A::VALUE1, + true => VCOPWD_A::VALUE2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcopwd::Value1 + *self == VCOPWD_A::VALUE1 } #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcopwd::Value2 + *self == VCOPWD_A::VALUE2 } } #[doc = "Field `VCOPWD` writer - VCO Power Saving Mode"] -pub type VcopwdW<'a, REG> = crate::BitWriter<'a, REG, Vcopwd>; -impl<'a, REG> VcopwdW<'a, REG> +pub type VCOPWD_W<'a, REG> = crate::BitWriter<'a, REG, VCOPWD_A>; +impl<'a, REG> VCOPWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcopwd::Value1) + self.variant(VCOPWD_A::VALUE1) } #[doc = "The VCO is put into a Power Saving Mode and can no longer be used. Only the Bypass and Prescaler Mode are active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcopwd::Value2) + self.variant(VCOPWD_A::VALUE2) } } #[doc = "VCO Trim Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcotr { +pub enum VCOTR_A { #[doc = "0: VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcotr) -> Self { + fn from(variant: VCOTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOTR` reader - VCO Trim Control"] -pub type VcotrR = crate::BitReader; -impl VcotrR { +pub type VCOTR_R = crate::BitReader; +impl VCOTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcotr { + pub const fn variant(&self) -> VCOTR_A { match self.bits { - false => Vcotr::Value1, - true => Vcotr::Value2, + false => VCOTR_A::VALUE1, + true => VCOTR_A::VALUE2, } } #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcotr::Value1 + *self == VCOTR_A::VALUE1 } #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcotr::Value2 + *self == VCOTR_A::VALUE2 } } #[doc = "Field `VCOTR` writer - VCO Trim Control"] -pub type VcotrW<'a, REG> = crate::BitWriter<'a, REG, Vcotr>; -impl<'a, REG> VcotrW<'a, REG> +pub type VCOTR_W<'a, REG> = crate::BitWriter<'a, REG, VCOTR_A>; +impl<'a, REG> VCOTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "VCO bandwidth is operation in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcotr::Value1) + self.variant(VCOTR_A::VALUE1) } #[doc = "VCO bandwidth is operation in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcotr::Value2) + self.variant(VCOTR_A::VALUE2) } } #[doc = "Disconnect Oscillator from VCO\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Findis { +pub enum FINDIS_A { #[doc = "0: connect oscillator to the VCO part"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: disconnect oscillator from the VCO part."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Findis) -> Self { + fn from(variant: FINDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] -pub type FindisR = crate::BitReader; -impl FindisR { +pub type FINDIS_R = crate::BitReader; +impl FINDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Findis { + pub const fn variant(&self) -> FINDIS_A { match self.bits { - false => Findis::Value1, - true => Findis::Value2, + false => FINDIS_A::VALUE1, + true => FINDIS_A::VALUE2, } } #[doc = "connect oscillator to the VCO part"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Findis::Value1 + *self == FINDIS_A::VALUE1 } #[doc = "disconnect oscillator from the VCO part."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Findis::Value2 + *self == FINDIS_A::VALUE2 } } #[doc = "Field `FINDIS` writer - Disconnect Oscillator from VCO"] -pub type FindisW<'a, REG> = crate::BitWriter<'a, REG, Findis>; -impl<'a, REG> FindisW<'a, REG> +pub type FINDIS_W<'a, REG> = crate::BitWriter<'a, REG, FINDIS_A>; +impl<'a, REG> FINDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "connect oscillator to the VCO part"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Findis::Value1) + self.variant(FINDIS_A::VALUE1) } #[doc = "disconnect oscillator from the VCO part."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Findis::Value2) + self.variant(FINDIS_A::VALUE2) } } #[doc = "Oscillator Disconnect Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscdiscdis { +pub enum OSCDISCDIS_A { #[doc = "0: In case of a PLL loss-of-lock bit FINDIS is set"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: In case of a PLL loss-of-lock bit FINDIS is cleared"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscdiscdis) -> Self { + fn from(variant: OSCDISCDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] -pub type OscdiscdisR = crate::BitReader; -impl OscdiscdisR { +pub type OSCDISCDIS_R = crate::BitReader; +impl OSCDISCDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscdiscdis { + pub const fn variant(&self) -> OSCDISCDIS_A { match self.bits { - false => Oscdiscdis::Value1, - true => Oscdiscdis::Value2, + false => OSCDISCDIS_A::VALUE1, + true => OSCDISCDIS_A::VALUE2, } } #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscdiscdis::Value1 + *self == OSCDISCDIS_A::VALUE1 } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscdiscdis::Value2 + *self == OSCDISCDIS_A::VALUE2 } } #[doc = "Field `OSCDISCDIS` writer - Oscillator Disconnect Disable"] -pub type OscdiscdisW<'a, REG> = crate::BitWriter<'a, REG, Oscdiscdis>; -impl<'a, REG> OscdiscdisW<'a, REG> +pub type OSCDISCDIS_W<'a, REG> = crate::BitWriter<'a, REG, OSCDISCDIS_A>; +impl<'a, REG> OSCDISCDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscdiscdis::Value1) + self.variant(OSCDISCDIS_A::VALUE1) } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscdiscdis::Value2) + self.variant(OSCDISCDIS_A::VALUE2) } } #[doc = "PLL Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pllpwd { +pub enum PLLPWD_A { #[doc = "0: Normal behavior"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pllpwd) -> Self { + fn from(variant: PLLPWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] -pub type PllpwdR = crate::BitReader; -impl PllpwdR { +pub type PLLPWD_R = crate::BitReader; +impl PLLPWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pllpwd { + pub const fn variant(&self) -> PLLPWD_A { match self.bits { - false => Pllpwd::Value1, - true => Pllpwd::Value2, + false => PLLPWD_A::VALUE1, + true => PLLPWD_A::VALUE2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pllpwd::Value1 + *self == PLLPWD_A::VALUE1 } #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pllpwd::Value2 + *self == PLLPWD_A::VALUE2 } } #[doc = "Field `PLLPWD` writer - PLL Power Saving Mode"] -pub type PllpwdW<'a, REG> = crate::BitWriter<'a, REG, Pllpwd>; -impl<'a, REG> PllpwdW<'a, REG> +pub type PLLPWD_W<'a, REG> = crate::BitWriter<'a, REG, PLLPWD_A>; +impl<'a, REG> PLLPWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pllpwd::Value1) + self.variant(PLLPWD_A::VALUE1) } #[doc = "The complete PLL block is put into a Power Saving Mode and can no longer be used. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pllpwd::Value2) + self.variant(PLLPWD_A::VALUE2) } } #[doc = "Oscillator Watchdog Reset\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscres { +pub enum OSCRES_A { #[doc = "0: The Oscillator Watchdog of the PLL is not cleared and remains active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The Oscillator Watchdog of the PLL is cleared and restarted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscres) -> Self { + fn from(variant: OSCRES_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCRES` reader - Oscillator Watchdog Reset"] -pub type OscresR = crate::BitReader; -impl OscresR { +pub type OSCRES_R = crate::BitReader; +impl OSCRES_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscres { + pub const fn variant(&self) -> OSCRES_A { match self.bits { - false => Oscres::Value1, - true => Oscres::Value2, + false => OSCRES_A::VALUE1, + true => OSCRES_A::VALUE2, } } #[doc = "The Oscillator Watchdog of the PLL is not cleared and remains active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscres::Value1 + *self == OSCRES_A::VALUE1 } #[doc = "The Oscillator Watchdog of the PLL is cleared and restarted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscres::Value2 + *self == OSCRES_A::VALUE2 } } #[doc = "Field `OSCRES` writer - Oscillator Watchdog Reset"] -pub type OscresW<'a, REG> = crate::BitWriter<'a, REG, Oscres>; -impl<'a, REG> OscresW<'a, REG> +pub type OSCRES_W<'a, REG> = crate::BitWriter<'a, REG, OSCRES_A>; +impl<'a, REG> OSCRES_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The Oscillator Watchdog of the PLL is not cleared and remains active"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscres::Value1) + self.variant(OSCRES_A::VALUE1) } #[doc = "The Oscillator Watchdog of the PLL is cleared and restarted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscres::Value2) + self.variant(OSCRES_A::VALUE2) } } #[doc = "Field `RESLD` writer - Restart VCO Lock Detection"] -pub type ResldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Automatic Oscillator Calibration Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aotren { +pub enum AOTREN_A { #[doc = "0: Disable"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aotren) -> Self { + fn from(variant: AOTREN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AOTREN` reader - Automatic Oscillator Calibration Enable"] -pub type AotrenR = crate::BitReader; -impl AotrenR { +pub type AOTREN_R = crate::BitReader; +impl AOTREN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aotren { + pub const fn variant(&self) -> AOTREN_A { match self.bits { - false => Aotren::Value1, - true => Aotren::Value2, + false => AOTREN_A::VALUE1, + true => AOTREN_A::VALUE2, } } #[doc = "Disable"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aotren::Value1 + *self == AOTREN_A::VALUE1 } #[doc = "Enable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aotren::Value2 + *self == AOTREN_A::VALUE2 } } #[doc = "Field `AOTREN` writer - Automatic Oscillator Calibration Enable"] -pub type AotrenW<'a, REG> = crate::BitWriter<'a, REG, Aotren>; -impl<'a, REG> AotrenW<'a, REG> +pub type AOTREN_W<'a, REG> = crate::BitWriter<'a, REG, AOTREN_A>; +impl<'a, REG> AOTREN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disable"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aotren::Value1) + self.variant(AOTREN_A::VALUE1) } #[doc = "Enable"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aotren::Value2) + self.variant(AOTREN_A::VALUE2) } } #[doc = "Factory Oscillator Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fotr { +pub enum FOTR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Force fixed-value trimming"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fotr) -> Self { + fn from(variant: FOTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FOTR` reader - Factory Oscillator Calibration"] -pub type FotrR = crate::BitReader; -impl FotrR { +pub type FOTR_R = crate::BitReader; +impl FOTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fotr { + pub const fn variant(&self) -> FOTR_A { match self.bits { - false => Fotr::Value1, - true => Fotr::Value2, + false => FOTR_A::VALUE1, + true => FOTR_A::VALUE2, } } #[doc = "No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fotr::Value1 + *self == FOTR_A::VALUE1 } #[doc = "Force fixed-value trimming"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fotr::Value2 + *self == FOTR_A::VALUE2 } } #[doc = "Field `FOTR` writer - Factory Oscillator Calibration"] -pub type FotrW<'a, REG> = crate::BitWriter<'a, REG, Fotr>; -impl<'a, REG> FotrW<'a, REG> +pub type FOTR_W<'a, REG> = crate::BitWriter<'a, REG, FOTR_A>; +impl<'a, REG> FOTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fotr::Value1) + self.variant(FOTR_A::VALUE1) } #[doc = "Force fixed-value trimming"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fotr::Value2) + self.variant(FOTR_A::VALUE2) } } impl R { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - pub fn vcobyp(&self) -> VcobypR { - VcobypR::new((self.bits & 1) != 0) + pub fn vcobyp(&self) -> VCOBYP_R { + VCOBYP_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - pub fn vcopwd(&self) -> VcopwdR { - VcopwdR::new(((self.bits >> 1) & 1) != 0) + pub fn vcopwd(&self) -> VCOPWD_R { + VCOPWD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - pub fn vcotr(&self) -> VcotrR { - VcotrR::new(((self.bits >> 2) & 1) != 0) + pub fn vcotr(&self) -> VCOTR_R { + VCOTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - pub fn findis(&self) -> FindisR { - FindisR::new(((self.bits >> 4) & 1) != 0) + pub fn findis(&self) -> FINDIS_R { + FINDIS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - pub fn oscdiscdis(&self) -> OscdiscdisR { - OscdiscdisR::new(((self.bits >> 6) & 1) != 0) + pub fn oscdiscdis(&self) -> OSCDISCDIS_R { + OSCDISCDIS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - pub fn pllpwd(&self) -> PllpwdR { - PllpwdR::new(((self.bits >> 16) & 1) != 0) + pub fn pllpwd(&self) -> PLLPWD_R { + PLLPWD_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Oscillator Watchdog Reset"] #[inline(always)] - pub fn oscres(&self) -> OscresR { - OscresR::new(((self.bits >> 17) & 1) != 0) + pub fn oscres(&self) -> OSCRES_R { + OSCRES_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"] #[inline(always)] - pub fn aotren(&self) -> AotrenR { - AotrenR::new(((self.bits >> 19) & 1) != 0) + pub fn aotren(&self) -> AOTREN_R { + AOTREN_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Factory Oscillator Calibration"] #[inline(always)] - pub fn fotr(&self) -> FotrR { - FotrR::new(((self.bits >> 20) & 1) != 0) + pub fn fotr(&self) -> FOTR_R { + FOTR_R::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] #[must_use] - pub fn vcobyp(&mut self) -> VcobypW { - VcobypW::new(self, 0) + pub fn vcobyp(&mut self) -> VCOBYP_W { + VCOBYP_W::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] #[must_use] - pub fn vcopwd(&mut self) -> VcopwdW { - VcopwdW::new(self, 1) + pub fn vcopwd(&mut self) -> VCOPWD_W { + VCOPWD_W::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] #[must_use] - pub fn vcotr(&mut self) -> VcotrW { - VcotrW::new(self, 2) + pub fn vcotr(&mut self) -> VCOTR_W { + VCOTR_W::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] #[must_use] - pub fn findis(&mut self) -> FindisW { - FindisW::new(self, 4) + pub fn findis(&mut self) -> FINDIS_W { + FINDIS_W::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] #[must_use] - pub fn oscdiscdis(&mut self) -> OscdiscdisW { - OscdiscdisW::new(self, 6) + pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { + OSCDISCDIS_W::new(self, 6) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] #[must_use] - pub fn pllpwd(&mut self) -> PllpwdW { - PllpwdW::new(self, 16) + pub fn pllpwd(&mut self) -> PLLPWD_W { + PLLPWD_W::new(self, 16) } #[doc = "Bit 17 - Oscillator Watchdog Reset"] #[inline(always)] #[must_use] - pub fn oscres(&mut self) -> OscresW { - OscresW::new(self, 17) + pub fn oscres(&mut self) -> OSCRES_W { + OSCRES_W::new(self, 17) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] #[must_use] - pub fn resld(&mut self) -> ResldW { - ResldW::new(self, 18) + pub fn resld(&mut self) -> RESLD_W { + RESLD_W::new(self, 18) } #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"] #[inline(always)] #[must_use] - pub fn aotren(&mut self) -> AotrenW { - AotrenW::new(self, 19) + pub fn aotren(&mut self) -> AOTREN_W { + AOTREN_W::new(self, 19) } #[doc = "Bit 20 - Factory Oscillator Calibration"] #[inline(always)] #[must_use] - pub fn fotr(&mut self) -> FotrW { - FotrW::new(self, 20) + pub fn fotr(&mut self) -> FOTR_W { + FOTR_W::new(self, 20) } } #[doc = "PLL Configuration 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pllcon0Spec; -impl crate::RegisterSpec for Pllcon0Spec { +pub struct PLLCON0_SPEC; +impl crate::RegisterSpec for PLLCON0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pllcon0::R`](R) reader structure"] -impl crate::Readable for Pllcon0Spec {} +impl crate::Readable for PLLCON0_SPEC {} #[doc = "`write(|w| ..)` method takes [`pllcon0::W`](W) writer structure"] -impl crate::Writable for Pllcon0Spec { +impl crate::Writable for PLLCON0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON0 to value 0x0003_0003"] -impl crate::Resettable for Pllcon0Spec { +impl crate::Resettable for PLLCON0_SPEC { const RESET_VALUE: u32 = 0x0003_0003; } diff --git a/src/scu_pll/pllcon1.rs b/src/scu_pll/pllcon1.rs index a2aecb06..11e979ae 100644 --- a/src/scu_pll/pllcon1.rs +++ b/src/scu_pll/pllcon1.rs @@ -1,85 +1,85 @@ #[doc = "Register `PLLCON1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `K1DIV` reader - K1-Divider Value"] -pub type K1divR = crate::FieldReader; +pub type K1DIV_R = crate::FieldReader; #[doc = "Field `K1DIV` writer - K1-Divider Value"] -pub type K1divW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type K1DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `NDIV` reader - N-Divider Value"] -pub type NdivR = crate::FieldReader; +pub type NDIV_R = crate::FieldReader; #[doc = "Field `NDIV` writer - N-Divider Value"] -pub type NdivW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type NDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `K2DIV` reader - K2-Divider Value"] -pub type K2divR = crate::FieldReader; +pub type K2DIV_R = crate::FieldReader; #[doc = "Field `K2DIV` writer - K2-Divider Value"] -pub type K2divW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type K2DIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PDIV` reader - P-Divider Value"] -pub type PdivR = crate::FieldReader; +pub type PDIV_R = crate::FieldReader; #[doc = "Field `PDIV` writer - P-Divider Value"] -pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:6 - K1-Divider Value"] #[inline(always)] - pub fn k1div(&self) -> K1divR { - K1divR::new((self.bits & 0x7f) as u8) + pub fn k1div(&self) -> K1DIV_R { + K1DIV_R::new((self.bits & 0x7f) as u8) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - pub fn ndiv(&self) -> NdivR { - NdivR::new(((self.bits >> 8) & 0x7f) as u8) + pub fn ndiv(&self) -> NDIV_R { + NDIV_R::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bits 16:22 - K2-Divider Value"] #[inline(always)] - pub fn k2div(&self) -> K2divR { - K2divR::new(((self.bits >> 16) & 0x7f) as u8) + pub fn k2div(&self) -> K2DIV_R { + K2DIV_R::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - pub fn pdiv(&self) -> PdivR { - PdivR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pdiv(&self) -> PDIV_R { + PDIV_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:6 - K1-Divider Value"] #[inline(always)] #[must_use] - pub fn k1div(&mut self) -> K1divW { - K1divW::new(self, 0) + pub fn k1div(&mut self) -> K1DIV_W { + K1DIV_W::new(self, 0) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] #[must_use] - pub fn ndiv(&mut self) -> NdivW { - NdivW::new(self, 8) + pub fn ndiv(&mut self) -> NDIV_W { + NDIV_W::new(self, 8) } #[doc = "Bits 16:22 - K2-Divider Value"] #[inline(always)] #[must_use] - pub fn k2div(&mut self) -> K2divW { - K2divW::new(self, 16) + pub fn k2div(&mut self) -> K2DIV_W { + K2DIV_W::new(self, 16) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PdivW { - PdivW::new(self, 24) + pub fn pdiv(&mut self) -> PDIV_W { + PDIV_W::new(self, 24) } } #[doc = "PLL Configuration 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pllcon1Spec; -impl crate::RegisterSpec for Pllcon1Spec { +pub struct PLLCON1_SPEC; +impl crate::RegisterSpec for PLLCON1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pllcon1::R`](R) reader structure"] -impl crate::Readable for Pllcon1Spec {} +impl crate::Readable for PLLCON1_SPEC {} #[doc = "`write(|w| ..)` method takes [`pllcon1::W`](W) writer structure"] -impl crate::Writable for Pllcon1Spec { +impl crate::Writable for PLLCON1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON1 to value 0"] -impl crate::Resettable for Pllcon1Spec { +impl crate::Resettable for PLLCON1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_pll/pllcon2.rs b/src/scu_pll/pllcon2.rs index 3a449e05..3bd86b26 100644 --- a/src/scu_pll/pllcon2.rs +++ b/src/scu_pll/pllcon2.rs @@ -1,153 +1,153 @@ #[doc = "Register `PLLCON2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PLLCON2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "P-Divider Input Selection\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pinsel { +pub enum PINSEL_A { #[doc = "0: PLL external oscillator selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Backup clock fofi selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pinsel) -> Self { + fn from(variant: PINSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PINSEL` reader - P-Divider Input Selection"] -pub type PinselR = crate::BitReader; -impl PinselR { +pub type PINSEL_R = crate::BitReader; +impl PINSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pinsel { + pub const fn variant(&self) -> PINSEL_A { match self.bits { - false => Pinsel::Value1, - true => Pinsel::Value2, + false => PINSEL_A::VALUE1, + true => PINSEL_A::VALUE2, } } #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pinsel::Value1 + *self == PINSEL_A::VALUE1 } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pinsel::Value2 + *self == PINSEL_A::VALUE2 } } #[doc = "Field `PINSEL` writer - P-Divider Input Selection"] -pub type PinselW<'a, REG> = crate::BitWriter<'a, REG, Pinsel>; -impl<'a, REG> PinselW<'a, REG> +pub type PINSEL_W<'a, REG> = crate::BitWriter<'a, REG, PINSEL_A>; +impl<'a, REG> PINSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pinsel::Value1) + self.variant(PINSEL_A::VALUE1) } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pinsel::Value2) + self.variant(PINSEL_A::VALUE2) } } #[doc = "K1-Divider Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K1insel { +pub enum K1INSEL_A { #[doc = "0: PLL external oscillator selected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Backup clock fofi selected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K1insel) -> Self { + fn from(variant: K1INSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `K1INSEL` reader - K1-Divider Input Selection"] -pub type K1inselR = crate::BitReader; -impl K1inselR { +pub type K1INSEL_R = crate::BitReader; +impl K1INSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K1insel { + pub const fn variant(&self) -> K1INSEL_A { match self.bits { - false => K1insel::Value1, - true => K1insel::Value2, + false => K1INSEL_A::VALUE1, + true => K1INSEL_A::VALUE2, } } #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K1insel::Value1 + *self == K1INSEL_A::VALUE1 } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K1insel::Value2 + *self == K1INSEL_A::VALUE2 } } #[doc = "Field `K1INSEL` writer - K1-Divider Input Selection"] -pub type K1inselW<'a, REG> = crate::BitWriter<'a, REG, K1insel>; -impl<'a, REG> K1inselW<'a, REG> +pub type K1INSEL_W<'a, REG> = crate::BitWriter<'a, REG, K1INSEL_A>; +impl<'a, REG> K1INSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "PLL external oscillator selected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(K1insel::Value1) + self.variant(K1INSEL_A::VALUE1) } #[doc = "Backup clock fofi selected"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(K1insel::Value2) + self.variant(K1INSEL_A::VALUE2) } } impl R { #[doc = "Bit 0 - P-Divider Input Selection"] #[inline(always)] - pub fn pinsel(&self) -> PinselR { - PinselR::new((self.bits & 1) != 0) + pub fn pinsel(&self) -> PINSEL_R { + PINSEL_R::new((self.bits & 1) != 0) } #[doc = "Bit 8 - K1-Divider Input Selection"] #[inline(always)] - pub fn k1insel(&self) -> K1inselR { - K1inselR::new(((self.bits >> 8) & 1) != 0) + pub fn k1insel(&self) -> K1INSEL_R { + K1INSEL_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - P-Divider Input Selection"] #[inline(always)] #[must_use] - pub fn pinsel(&mut self) -> PinselW { - PinselW::new(self, 0) + pub fn pinsel(&mut self) -> PINSEL_W { + PINSEL_W::new(self, 0) } #[doc = "Bit 8 - K1-Divider Input Selection"] #[inline(always)] #[must_use] - pub fn k1insel(&mut self) -> K1inselW { - K1inselW::new(self, 8) + pub fn k1insel(&mut self) -> K1INSEL_W { + K1INSEL_W::new(self, 8) } } #[doc = "PLL Configuration 2 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllcon2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pllcon2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Pllcon2Spec; -impl crate::RegisterSpec for Pllcon2Spec { +pub struct PLLCON2_SPEC; +impl crate::RegisterSpec for PLLCON2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pllcon2::R`](R) reader structure"] -impl crate::Readable for Pllcon2Spec {} +impl crate::Readable for PLLCON2_SPEC {} #[doc = "`write(|w| ..)` method takes [`pllcon2::W`](W) writer structure"] -impl crate::Writable for Pllcon2Spec { +impl crate::Writable for PLLCON2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PLLCON2 to value 0x01"] -impl crate::Resettable for Pllcon2Spec { +impl crate::Resettable for PLLCON2_SPEC { const RESET_VALUE: u32 = 0x01; } diff --git a/src/scu_pll/pllstat.rs b/src/scu_pll/pllstat.rs index dd1c4090..853b5411 100644 --- a/src/scu_pll/pllstat.rs +++ b/src/scu_pll/pllstat.rs @@ -1,384 +1,384 @@ #[doc = "Register `PLLSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "VCO Bypass Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcobyst { +pub enum VCOBYST_A { #[doc = "0: Free-running / Normal Mode is entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler Mode is entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcobyst) -> Self { + fn from(variant: VCOBYST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOBYST` reader - VCO Bypass Status"] -pub type VcobystR = crate::BitReader; -impl VcobystR { +pub type VCOBYST_R = crate::BitReader; +impl VCOBYST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcobyst { + pub const fn variant(&self) -> VCOBYST_A { match self.bits { - false => Vcobyst::Value1, - true => Vcobyst::Value2, + false => VCOBYST_A::VALUE1, + true => VCOBYST_A::VALUE2, } } #[doc = "Free-running / Normal Mode is entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcobyst::Value1 + *self == VCOBYST_A::VALUE1 } #[doc = "Prescaler Mode is entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcobyst::Value2 + *self == VCOBYST_A::VALUE2 } } #[doc = "PLL Power-saving Mode Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pwdstat { +pub enum PWDSTAT_A { #[doc = "0: PLL Power-saving Mode was not entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PLL Power-saving Mode was entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pwdstat) -> Self { + fn from(variant: PWDSTAT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] -pub type PwdstatR = crate::BitReader; -impl PwdstatR { +pub type PWDSTAT_R = crate::BitReader; +impl PWDSTAT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pwdstat { + pub const fn variant(&self) -> PWDSTAT_A { match self.bits { - false => Pwdstat::Value1, - true => Pwdstat::Value2, + false => PWDSTAT_A::VALUE1, + true => PWDSTAT_A::VALUE2, } } #[doc = "PLL Power-saving Mode was not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pwdstat::Value1 + *self == PWDSTAT_A::VALUE1 } #[doc = "PLL Power-saving Mode was entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pwdstat::Value2 + *self == PWDSTAT_A::VALUE2 } } #[doc = "PLL LOCK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcolock { +pub enum VCOLOCK_A { #[doc = "0: PLL not locked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PLL locked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcolock) -> Self { + fn from(variant: VCOLOCK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOLOCK` reader - PLL LOCK Status"] -pub type VcolockR = crate::BitReader; -impl VcolockR { +pub type VCOLOCK_R = crate::BitReader; +impl VCOLOCK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcolock { + pub const fn variant(&self) -> VCOLOCK_A { match self.bits { - false => Vcolock::Value1, - true => Vcolock::Value2, + false => VCOLOCK_A::VALUE1, + true => VCOLOCK_A::VALUE2, } } #[doc = "PLL not locked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcolock::Value1 + *self == VCOLOCK_A::VALUE1 } #[doc = "PLL locked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcolock::Value2 + *self == VCOLOCK_A::VALUE2 } } #[doc = "K1 Divider Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K1rdy { +pub enum K1RDY_A { #[doc = "0: K1-Divider does not operate with the new value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: K1-Divider operate with the new value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K1rdy) -> Self { + fn from(variant: K1RDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `K1RDY` reader - K1 Divider Ready Status"] -pub type K1rdyR = crate::BitReader; -impl K1rdyR { +pub type K1RDY_R = crate::BitReader; +impl K1RDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K1rdy { + pub const fn variant(&self) -> K1RDY_A { match self.bits { - false => K1rdy::Value1, - true => K1rdy::Value2, + false => K1RDY_A::VALUE1, + true => K1RDY_A::VALUE2, } } #[doc = "K1-Divider does not operate with the new value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K1rdy::Value1 + *self == K1RDY_A::VALUE1 } #[doc = "K1-Divider operate with the new value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K1rdy::Value2 + *self == K1RDY_A::VALUE2 } } #[doc = "K2 Divider Ready Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum K2rdy { +pub enum K2RDY_A { #[doc = "0: K2-Divider does not operate with the new value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: K2-Divider operate with the new value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: K2rdy) -> Self { + fn from(variant: K2RDY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `K2RDY` reader - K2 Divider Ready Status"] -pub type K2rdyR = crate::BitReader; -impl K2rdyR { +pub type K2RDY_R = crate::BitReader; +impl K2RDY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> K2rdy { + pub const fn variant(&self) -> K2RDY_A { match self.bits { - false => K2rdy::Value1, - true => K2rdy::Value2, + false => K2RDY_A::VALUE1, + true => K2RDY_A::VALUE2, } } #[doc = "K2-Divider does not operate with the new value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == K2rdy::Value1 + *self == K2RDY_A::VALUE1 } #[doc = "K2-Divider operate with the new value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == K2rdy::Value2 + *self == K2RDY_A::VALUE2 } } #[doc = "Bypass Mode Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum By { +pub enum BY_A { #[doc = "0: Bypass Mode is not entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bypass Mode is entered. Input fOSC is selected as output fPLL."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: By) -> Self { + fn from(variant: BY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BY` reader - Bypass Mode Status"] -pub type ByR = crate::BitReader; -impl ByR { +pub type BY_R = crate::BitReader; +impl BY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> By { + pub const fn variant(&self) -> BY_A { match self.bits { - false => By::Value1, - true => By::Value2, + false => BY_A::VALUE1, + true => BY_A::VALUE2, } } #[doc = "Bypass Mode is not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == By::Value1 + *self == BY_A::VALUE1 } #[doc = "Bypass Mode is entered. Input fOSC is selected as output fPLL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == By::Value2 + *self == BY_A::VALUE2 } } #[doc = "Oscillator for PLL Valid Low Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Plllv { +pub enum PLLLV_A { #[doc = "0: The OSC frequency is not usable. Frequency fREF is too low."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The OSC frequency is usable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Plllv) -> Self { + fn from(variant: PLLLV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLLV` reader - Oscillator for PLL Valid Low Status Bit"] -pub type PlllvR = crate::BitReader; -impl PlllvR { +pub type PLLLV_R = crate::BitReader; +impl PLLLV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Plllv { + pub const fn variant(&self) -> PLLLV_A { match self.bits { - false => Plllv::Value1, - true => Plllv::Value2, + false => PLLLV_A::VALUE1, + true => PLLLV_A::VALUE2, } } #[doc = "The OSC frequency is not usable. Frequency fREF is too low."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Plllv::Value1 + *self == PLLLV_A::VALUE1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Plllv::Value2 + *self == PLLLV_A::VALUE2 } } #[doc = "Oscillator for PLL Valid High Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pllhv { +pub enum PLLHV_A { #[doc = "0: The OSC frequency is not usable. Frequency fOSC is too high."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The OSC frequency is usable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pllhv) -> Self { + fn from(variant: PLLHV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLHV` reader - Oscillator for PLL Valid High Status Bit"] -pub type PllhvR = crate::BitReader; -impl PllhvR { +pub type PLLHV_R = crate::BitReader; +impl PLLHV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pllhv { + pub const fn variant(&self) -> PLLHV_A { match self.bits { - false => Pllhv::Value1, - true => Pllhv::Value2, + false => PLLHV_A::VALUE1, + true => PLLHV_A::VALUE2, } } #[doc = "The OSC frequency is not usable. Frequency fOSC is too high."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pllhv::Value1 + *self == PLLHV_A::VALUE1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pllhv::Value2 + *self == PLLHV_A::VALUE2 } } #[doc = "Oscillator for PLL Valid Spike Status Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pllsp { +pub enum PLLSP_A { #[doc = "0: The OSC frequency is not usable. Spikes are detected that disturb a locked operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The OSC frequency is usable"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pllsp) -> Self { + fn from(variant: PLLSP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLSP` reader - Oscillator for PLL Valid Spike Status Bit"] -pub type PllspR = crate::BitReader; -impl PllspR { +pub type PLLSP_R = crate::BitReader; +impl PLLSP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pllsp { + pub const fn variant(&self) -> PLLSP_A { match self.bits { - false => Pllsp::Value1, - true => Pllsp::Value2, + false => PLLSP_A::VALUE1, + true => PLLSP_A::VALUE2, } } #[doc = "The OSC frequency is not usable. Spikes are detected that disturb a locked operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pllsp::Value1 + *self == PLLSP_A::VALUE1 } #[doc = "The OSC frequency is usable"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pllsp::Value2 + *self == PLLSP_A::VALUE2 } } impl R { #[doc = "Bit 0 - VCO Bypass Status"] #[inline(always)] - pub fn vcobyst(&self) -> VcobystR { - VcobystR::new((self.bits & 1) != 0) + pub fn vcobyst(&self) -> VCOBYST_R { + VCOBYST_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - PLL Power-saving Mode Status"] #[inline(always)] - pub fn pwdstat(&self) -> PwdstatR { - PwdstatR::new(((self.bits >> 1) & 1) != 0) + pub fn pwdstat(&self) -> PWDSTAT_R { + PWDSTAT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PLL LOCK Status"] #[inline(always)] - pub fn vcolock(&self) -> VcolockR { - VcolockR::new(((self.bits >> 2) & 1) != 0) + pub fn vcolock(&self) -> VCOLOCK_R { + VCOLOCK_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - K1 Divider Ready Status"] #[inline(always)] - pub fn k1rdy(&self) -> K1rdyR { - K1rdyR::new(((self.bits >> 4) & 1) != 0) + pub fn k1rdy(&self) -> K1RDY_R { + K1RDY_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - K2 Divider Ready Status"] #[inline(always)] - pub fn k2rdy(&self) -> K2rdyR { - K2rdyR::new(((self.bits >> 5) & 1) != 0) + pub fn k2rdy(&self) -> K2RDY_R { + K2RDY_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Bypass Mode Status"] #[inline(always)] - pub fn by(&self) -> ByR { - ByR::new(((self.bits >> 6) & 1) != 0) + pub fn by(&self) -> BY_R { + BY_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Oscillator for PLL Valid Low Status Bit"] #[inline(always)] - pub fn plllv(&self) -> PlllvR { - PlllvR::new(((self.bits >> 7) & 1) != 0) + pub fn plllv(&self) -> PLLLV_R { + PLLLV_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Oscillator for PLL Valid High Status Bit"] #[inline(always)] - pub fn pllhv(&self) -> PllhvR { - PllhvR::new(((self.bits >> 8) & 1) != 0) + pub fn pllhv(&self) -> PLLHV_R { + PLLHV_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Oscillator for PLL Valid Spike Status Bit"] #[inline(always)] - pub fn pllsp(&self) -> PllspR { - PllspR::new(((self.bits >> 9) & 1) != 0) + pub fn pllsp(&self) -> PLLSP_R { + PLLSP_R::new(((self.bits >> 9) & 1) != 0) } } #[doc = "PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PllstatSpec; -impl crate::RegisterSpec for PllstatSpec { +pub struct PLLSTAT_SPEC; +impl crate::RegisterSpec for PLLSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pllstat::R`](R) reader structure"] -impl crate::Readable for PllstatSpec {} +impl crate::Readable for PLLSTAT_SPEC {} #[doc = "`reset()` method sets PLLSTAT to value 0x02"] -impl crate::Resettable for PllstatSpec { +impl crate::Resettable for PLLSTAT_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/scu_pll/usbpllcon.rs b/src/scu_pll/usbpllcon.rs index 434b03a7..c69f1777 100644 --- a/src/scu_pll/usbpllcon.rs +++ b/src/scu_pll/usbpllcon.rs @@ -1,447 +1,447 @@ #[doc = "Register `USBPLLCON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `USBPLLCON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VCO Bypass\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcobyp { +pub enum VCOBYP_A { #[doc = "0: Normal operation, VCO is not bypassed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler Mode, VCO is bypassed"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcobyp) -> Self { + fn from(variant: VCOBYP_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOBYP` reader - VCO Bypass"] -pub type VcobypR = crate::BitReader; -impl VcobypR { +pub type VCOBYP_R = crate::BitReader; +impl VCOBYP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcobyp { + pub const fn variant(&self) -> VCOBYP_A { match self.bits { - false => Vcobyp::Value1, - true => Vcobyp::Value2, + false => VCOBYP_A::VALUE1, + true => VCOBYP_A::VALUE2, } } #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcobyp::Value1 + *self == VCOBYP_A::VALUE1 } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcobyp::Value2 + *self == VCOBYP_A::VALUE2 } } #[doc = "Field `VCOBYP` writer - VCO Bypass"] -pub type VcobypW<'a, REG> = crate::BitWriter<'a, REG, Vcobyp>; -impl<'a, REG> VcobypW<'a, REG> +pub type VCOBYP_W<'a, REG> = crate::BitWriter<'a, REG, VCOBYP_A>; +impl<'a, REG> VCOBYP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation, VCO is not bypassed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcobyp::Value1) + self.variant(VCOBYP_A::VALUE1) } #[doc = "Prescaler Mode, VCO is bypassed"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcobyp::Value2) + self.variant(VCOBYP_A::VALUE2) } } #[doc = "VCO Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcopwd { +pub enum VCOPWD_A { #[doc = "0: Normal behavior"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The VCO is put into a Power Saving Mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcopwd) -> Self { + fn from(variant: VCOPWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOPWD` reader - VCO Power Saving Mode"] -pub type VcopwdR = crate::BitReader; -impl VcopwdR { +pub type VCOPWD_R = crate::BitReader; +impl VCOPWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcopwd { + pub const fn variant(&self) -> VCOPWD_A { match self.bits { - false => Vcopwd::Value1, - true => Vcopwd::Value2, + false => VCOPWD_A::VALUE1, + true => VCOPWD_A::VALUE2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcopwd::Value1 + *self == VCOPWD_A::VALUE1 } #[doc = "The VCO is put into a Power Saving Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcopwd::Value2 + *self == VCOPWD_A::VALUE2 } } #[doc = "Field `VCOPWD` writer - VCO Power Saving Mode"] -pub type VcopwdW<'a, REG> = crate::BitWriter<'a, REG, Vcopwd>; -impl<'a, REG> VcopwdW<'a, REG> +pub type VCOPWD_W<'a, REG> = crate::BitWriter<'a, REG, VCOPWD_A>; +impl<'a, REG> VCOPWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcopwd::Value1) + self.variant(VCOPWD_A::VALUE1) } #[doc = "The VCO is put into a Power Saving Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcopwd::Value2) + self.variant(VCOPWD_A::VALUE2) } } #[doc = "VCO Trim Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcotr { +pub enum VCOTR_A { #[doc = "0: VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcotr) -> Self { + fn from(variant: VCOTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOTR` reader - VCO Trim Control"] -pub type VcotrR = crate::BitReader; -impl VcotrR { +pub type VCOTR_R = crate::BitReader; +impl VCOTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcotr { + pub const fn variant(&self) -> VCOTR_A { match self.bits { - false => Vcotr::Value1, - true => Vcotr::Value2, + false => VCOTR_A::VALUE1, + true => VCOTR_A::VALUE2, } } #[doc = "VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcotr::Value1 + *self == VCOTR_A::VALUE1 } #[doc = "VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcotr::Value2 + *self == VCOTR_A::VALUE2 } } #[doc = "Field `VCOTR` writer - VCO Trim Control"] -pub type VcotrW<'a, REG> = crate::BitWriter<'a, REG, Vcotr>; -impl<'a, REG> VcotrW<'a, REG> +pub type VCOTR_W<'a, REG> = crate::BitWriter<'a, REG, VCOTR_A>; +impl<'a, REG> VCOTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "VCO bandwidth is operating in the normal range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vcotr::Value1) + self.variant(VCOTR_A::VALUE1) } #[doc = "VCO bandwidth is operating in the test range. VCO output frequency is between 260 and 520 MHz for a input frequency between 8 and 16 MHz."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vcotr::Value2) + self.variant(VCOTR_A::VALUE2) } } #[doc = "Disconnect Oscillator from VCO\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Findis { +pub enum FINDIS_A { #[doc = "0: Connect oscillator to the VCO part"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disconnect oscillator from the VCO part."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Findis) -> Self { + fn from(variant: FINDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FINDIS` reader - Disconnect Oscillator from VCO"] -pub type FindisR = crate::BitReader; -impl FindisR { +pub type FINDIS_R = crate::BitReader; +impl FINDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Findis { + pub const fn variant(&self) -> FINDIS_A { match self.bits { - false => Findis::Value1, - true => Findis::Value2, + false => FINDIS_A::VALUE1, + true => FINDIS_A::VALUE2, } } #[doc = "Connect oscillator to the VCO part"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Findis::Value1 + *self == FINDIS_A::VALUE1 } #[doc = "Disconnect oscillator from the VCO part."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Findis::Value2 + *self == FINDIS_A::VALUE2 } } #[doc = "Field `FINDIS` writer - Disconnect Oscillator from VCO"] -pub type FindisW<'a, REG> = crate::BitWriter<'a, REG, Findis>; -impl<'a, REG> FindisW<'a, REG> +pub type FINDIS_W<'a, REG> = crate::BitWriter<'a, REG, FINDIS_A>; +impl<'a, REG> FINDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Connect oscillator to the VCO part"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Findis::Value1) + self.variant(FINDIS_A::VALUE1) } #[doc = "Disconnect oscillator from the VCO part."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Findis::Value2) + self.variant(FINDIS_A::VALUE2) } } #[doc = "Oscillator Disconnect Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Oscdiscdis { +pub enum OSCDISCDIS_A { #[doc = "0: In case of a PLL loss-of-lock bit FINDIS is set"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: In case of a PLL loss-of-lock bit FINDIS is cleared"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Oscdiscdis) -> Self { + fn from(variant: OSCDISCDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OSCDISCDIS` reader - Oscillator Disconnect Disable"] -pub type OscdiscdisR = crate::BitReader; -impl OscdiscdisR { +pub type OSCDISCDIS_R = crate::BitReader; +impl OSCDISCDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Oscdiscdis { + pub const fn variant(&self) -> OSCDISCDIS_A { match self.bits { - false => Oscdiscdis::Value1, - true => Oscdiscdis::Value2, + false => OSCDISCDIS_A::VALUE1, + true => OSCDISCDIS_A::VALUE2, } } #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Oscdiscdis::Value1 + *self == OSCDISCDIS_A::VALUE1 } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Oscdiscdis::Value2 + *self == OSCDISCDIS_A::VALUE2 } } #[doc = "Field `OSCDISCDIS` writer - Oscillator Disconnect Disable"] -pub type OscdiscdisW<'a, REG> = crate::BitWriter<'a, REG, Oscdiscdis>; -impl<'a, REG> OscdiscdisW<'a, REG> +pub type OSCDISCDIS_W<'a, REG> = crate::BitWriter<'a, REG, OSCDISCDIS_A>; +impl<'a, REG> OSCDISCDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "In case of a PLL loss-of-lock bit FINDIS is set"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Oscdiscdis::Value1) + self.variant(OSCDISCDIS_A::VALUE1) } #[doc = "In case of a PLL loss-of-lock bit FINDIS is cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Oscdiscdis::Value2) + self.variant(OSCDISCDIS_A::VALUE2) } } #[doc = "Field `NDIV` reader - N-Divider Value"] -pub type NdivR = crate::FieldReader; +pub type NDIV_R = crate::FieldReader; #[doc = "Field `NDIV` writer - N-Divider Value"] -pub type NdivW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type NDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "PLL Power Saving Mode\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pllpwd { +pub enum PLLPWD_A { #[doc = "0: Normal behavior"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pllpwd) -> Self { + fn from(variant: PLLPWD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PLLPWD` reader - PLL Power Saving Mode"] -pub type PllpwdR = crate::BitReader; -impl PllpwdR { +pub type PLLPWD_R = crate::BitReader; +impl PLLPWD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pllpwd { + pub const fn variant(&self) -> PLLPWD_A { match self.bits { - false => Pllpwd::Value1, - true => Pllpwd::Value2, + false => PLLPWD_A::VALUE1, + true => PLLPWD_A::VALUE2, } } #[doc = "Normal behavior"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pllpwd::Value1 + *self == PLLPWD_A::VALUE1 } #[doc = "The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pllpwd::Value2 + *self == PLLPWD_A::VALUE2 } } #[doc = "Field `PLLPWD` writer - PLL Power Saving Mode"] -pub type PllpwdW<'a, REG> = crate::BitWriter<'a, REG, Pllpwd>; -impl<'a, REG> PllpwdW<'a, REG> +pub type PLLPWD_W<'a, REG> = crate::BitWriter<'a, REG, PLLPWD_A>; +impl<'a, REG> PLLPWD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal behavior"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pllpwd::Value1) + self.variant(PLLPWD_A::VALUE1) } #[doc = "The complete PLL block is put into a Power Saving Mode. Only the Bypass Mode is active if previously selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pllpwd::Value2) + self.variant(PLLPWD_A::VALUE2) } } #[doc = "Field `RESLD` writer - Restart VCO Lock Detection"] -pub type ResldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RESLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PDIV` reader - P-Divider Value"] -pub type PdivR = crate::FieldReader; +pub type PDIV_R = crate::FieldReader; #[doc = "Field `PDIV` writer - P-Divider Value"] -pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - pub fn vcobyp(&self) -> VcobypR { - VcobypR::new((self.bits & 1) != 0) + pub fn vcobyp(&self) -> VCOBYP_R { + VCOBYP_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - pub fn vcopwd(&self) -> VcopwdR { - VcopwdR::new(((self.bits >> 1) & 1) != 0) + pub fn vcopwd(&self) -> VCOPWD_R { + VCOPWD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - pub fn vcotr(&self) -> VcotrR { - VcotrR::new(((self.bits >> 2) & 1) != 0) + pub fn vcotr(&self) -> VCOTR_R { + VCOTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - pub fn findis(&self) -> FindisR { - FindisR::new(((self.bits >> 4) & 1) != 0) + pub fn findis(&self) -> FINDIS_R { + FINDIS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - pub fn oscdiscdis(&self) -> OscdiscdisR { - OscdiscdisR::new(((self.bits >> 6) & 1) != 0) + pub fn oscdiscdis(&self) -> OSCDISCDIS_R { + OSCDISCDIS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - pub fn ndiv(&self) -> NdivR { - NdivR::new(((self.bits >> 8) & 0x7f) as u8) + pub fn ndiv(&self) -> NDIV_R { + NDIV_R::new(((self.bits >> 8) & 0x7f) as u8) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - pub fn pllpwd(&self) -> PllpwdR { - PllpwdR::new(((self.bits >> 16) & 1) != 0) + pub fn pllpwd(&self) -> PLLPWD_R { + PLLPWD_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - pub fn pdiv(&self) -> PdivR { - PdivR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn pdiv(&self) -> PDIV_R { + PDIV_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] #[must_use] - pub fn vcobyp(&mut self) -> VcobypW { - VcobypW::new(self, 0) + pub fn vcobyp(&mut self) -> VCOBYP_W { + VCOBYP_W::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] #[must_use] - pub fn vcopwd(&mut self) -> VcopwdW { - VcopwdW::new(self, 1) + pub fn vcopwd(&mut self) -> VCOPWD_W { + VCOPWD_W::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] #[must_use] - pub fn vcotr(&mut self) -> VcotrW { - VcotrW::new(self, 2) + pub fn vcotr(&mut self) -> VCOTR_W { + VCOTR_W::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] #[must_use] - pub fn findis(&mut self) -> FindisW { - FindisW::new(self, 4) + pub fn findis(&mut self) -> FINDIS_W { + FINDIS_W::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] #[must_use] - pub fn oscdiscdis(&mut self) -> OscdiscdisW { - OscdiscdisW::new(self, 6) + pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { + OSCDISCDIS_W::new(self, 6) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] #[must_use] - pub fn ndiv(&mut self) -> NdivW { - NdivW::new(self, 8) + pub fn ndiv(&mut self) -> NDIV_W { + NDIV_W::new(self, 8) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] #[must_use] - pub fn pllpwd(&mut self) -> PllpwdW { - PllpwdW::new(self, 16) + pub fn pllpwd(&mut self) -> PLLPWD_W { + PLLPWD_W::new(self, 16) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] #[must_use] - pub fn resld(&mut self) -> ResldW { - ResldW::new(self, 18) + pub fn resld(&mut self) -> RESLD_W { + RESLD_W::new(self, 18) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PdivW { - PdivW::new(self, 24) + pub fn pdiv(&mut self) -> PDIV_W { + PDIV_W::new(self, 24) } } #[doc = "USB PLL Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllcon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbpllcon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct UsbpllconSpec; -impl crate::RegisterSpec for UsbpllconSpec { +pub struct USBPLLCON_SPEC; +impl crate::RegisterSpec for USBPLLCON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`usbpllcon::R`](R) reader structure"] -impl crate::Readable for UsbpllconSpec {} +impl crate::Readable for USBPLLCON_SPEC {} #[doc = "`write(|w| ..)` method takes [`usbpllcon::W`](W) writer structure"] -impl crate::Writable for UsbpllconSpec { +impl crate::Writable for USBPLLCON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets USBPLLCON to value 0x0001_0003"] -impl crate::Resettable for UsbpllconSpec { +impl crate::Resettable for USBPLLCON_SPEC { const RESET_VALUE: u32 = 0x0001_0003; } diff --git a/src/scu_pll/usbpllstat.rs b/src/scu_pll/usbpllstat.rs index 7ffca5ff..c09cff09 100644 --- a/src/scu_pll/usbpllstat.rs +++ b/src/scu_pll/usbpllstat.rs @@ -1,220 +1,220 @@ #[doc = "Register `USBPLLSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "VCO Bypass Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcobyst { +pub enum VCOBYST_A { #[doc = "0: Normal Mode is entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Prescaler Mode is entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcobyst) -> Self { + fn from(variant: VCOBYST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOBYST` reader - VCO Bypass Status"] -pub type VcobystR = crate::BitReader; -impl VcobystR { +pub type VCOBYST_R = crate::BitReader; +impl VCOBYST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcobyst { + pub const fn variant(&self) -> VCOBYST_A { match self.bits { - false => Vcobyst::Value1, - true => Vcobyst::Value2, + false => VCOBYST_A::VALUE1, + true => VCOBYST_A::VALUE2, } } #[doc = "Normal Mode is entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcobyst::Value1 + *self == VCOBYST_A::VALUE1 } #[doc = "Prescaler Mode is entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcobyst::Value2 + *self == VCOBYST_A::VALUE2 } } #[doc = "PLL Power-saving Mode Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pwdstat { +pub enum PWDSTAT_A { #[doc = "0: PLL Power-saving Mode was not entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PLL Power-saving Mode was entered"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pwdstat) -> Self { + fn from(variant: PWDSTAT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PWDSTAT` reader - PLL Power-saving Mode Status"] -pub type PwdstatR = crate::BitReader; -impl PwdstatR { +pub type PWDSTAT_R = crate::BitReader; +impl PWDSTAT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pwdstat { + pub const fn variant(&self) -> PWDSTAT_A { match self.bits { - false => Pwdstat::Value1, - true => Pwdstat::Value2, + false => PWDSTAT_A::VALUE1, + true => PWDSTAT_A::VALUE2, } } #[doc = "PLL Power-saving Mode was not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pwdstat::Value1 + *self == PWDSTAT_A::VALUE1 } #[doc = "PLL Power-saving Mode was entered"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pwdstat::Value2 + *self == PWDSTAT_A::VALUE2 } } #[doc = "PLL VCO Lock Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcolock { +pub enum VCOLOCK_A { #[doc = "0: The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcolock) -> Self { + fn from(variant: VCOLOCK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOLOCK` reader - PLL VCO Lock Status"] -pub type VcolockR = crate::BitReader; -impl VcolockR { +pub type VCOLOCK_R = crate::BitReader; +impl VCOLOCK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcolock { + pub const fn variant(&self) -> VCOLOCK_A { match self.bits { - false => Vcolock::Value1, - true => Vcolock::Value2, + false => VCOLOCK_A::VALUE1, + true => VCOLOCK_A::VALUE2, } } #[doc = "The frequency difference of fREF and fDIV is greater than allowed. The VCO part of the PLL can not lock on a target frequency."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcolock::Value1 + *self == VCOLOCK_A::VALUE1 } #[doc = "The frequency difference of fREF and fDIV is small enough to enable a stable VCO operation"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcolock::Value2 + *self == VCOLOCK_A::VALUE2 } } #[doc = "Bypass Mode Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum By { +pub enum BY_A { #[doc = "0: Bypass Mode is not entered"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bypass Mode is entered. Input fOSC is selected as output fPLL."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: By) -> Self { + fn from(variant: BY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BY` reader - Bypass Mode Status"] -pub type ByR = crate::BitReader; -impl ByR { +pub type BY_R = crate::BitReader; +impl BY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> By { + pub const fn variant(&self) -> BY_A { match self.bits { - false => By::Value1, - true => By::Value2, + false => BY_A::VALUE1, + true => BY_A::VALUE2, } } #[doc = "Bypass Mode is not entered"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == By::Value1 + *self == BY_A::VALUE1 } #[doc = "Bypass Mode is entered. Input fOSC is selected as output fPLL."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == By::Value2 + *self == BY_A::VALUE2 } } #[doc = "PLL LOCK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vcolocked { +pub enum VCOLOCKED_A { #[doc = "0: PLL not locked"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: PLL locked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vcolocked) -> Self { + fn from(variant: VCOLOCKED_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VCOLOCKED` reader - PLL LOCK Status"] -pub type VcolockedR = crate::BitReader; -impl VcolockedR { +pub type VCOLOCKED_R = crate::BitReader; +impl VCOLOCKED_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vcolocked { + pub const fn variant(&self) -> VCOLOCKED_A { match self.bits { - false => Vcolocked::Value1, - true => Vcolocked::Value2, + false => VCOLOCKED_A::VALUE1, + true => VCOLOCKED_A::VALUE2, } } #[doc = "PLL not locked"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vcolocked::Value1 + *self == VCOLOCKED_A::VALUE1 } #[doc = "PLL locked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vcolocked::Value2 + *self == VCOLOCKED_A::VALUE2 } } impl R { #[doc = "Bit 0 - VCO Bypass Status"] #[inline(always)] - pub fn vcobyst(&self) -> VcobystR { - VcobystR::new((self.bits & 1) != 0) + pub fn vcobyst(&self) -> VCOBYST_R { + VCOBYST_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - PLL Power-saving Mode Status"] #[inline(always)] - pub fn pwdstat(&self) -> PwdstatR { - PwdstatR::new(((self.bits >> 1) & 1) != 0) + pub fn pwdstat(&self) -> PWDSTAT_R { + PWDSTAT_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - PLL VCO Lock Status"] #[inline(always)] - pub fn vcolock(&self) -> VcolockR { - VcolockR::new(((self.bits >> 2) & 1) != 0) + pub fn vcolock(&self) -> VCOLOCK_R { + VCOLOCK_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 6 - Bypass Mode Status"] #[inline(always)] - pub fn by(&self) -> ByR { - ByR::new(((self.bits >> 6) & 1) != 0) + pub fn by(&self) -> BY_R { + BY_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - PLL LOCK Status"] #[inline(always)] - pub fn vcolocked(&self) -> VcolockedR { - VcolockedR::new(((self.bits >> 7) & 1) != 0) + pub fn vcolocked(&self) -> VCOLOCKED_R { + VCOLOCKED_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "USB PLL Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbpllstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct UsbpllstatSpec; -impl crate::RegisterSpec for UsbpllstatSpec { +pub struct USBPLLSTAT_SPEC; +impl crate::RegisterSpec for USBPLLSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`usbpllstat::R`](R) reader structure"] -impl crate::Readable for UsbpllstatSpec {} +impl crate::Readable for USBPLLSTAT_SPEC {} #[doc = "`reset()` method sets USBPLLSTAT to value 0x02"] -impl crate::Resettable for UsbpllstatSpec { +impl crate::Resettable for USBPLLSTAT_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/scu_power.rs b/src/scu_power.rs index fac3d873..e5afe814 100644 --- a/src/scu_power.rs +++ b/src/scu_power.rs @@ -1,80 +1,74 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - pwrstat: Pwrstat, - pwrset: Pwrset, - pwrclr: Pwrclr, + pwrstat: PWRSTAT, + pwrset: PWRSET, + pwrclr: PWRCLR, _reserved3: [u8; 0x04], - evrstat: Evrstat, - evrvadcstat: Evrvadcstat, + evrstat: EVRSTAT, + evrvadcstat: EVRVADCSTAT, _reserved5: [u8; 0x14], - pwrmon: Pwrmon, + pwrmon: PWRMON, } impl RegisterBlock { #[doc = "0x00 - PCU Status Register"] #[inline(always)] - pub const fn pwrstat(&self) -> &Pwrstat { + pub const fn pwrstat(&self) -> &PWRSTAT { &self.pwrstat } #[doc = "0x04 - PCU Set Control Register"] #[inline(always)] - pub const fn pwrset(&self) -> &Pwrset { + pub const fn pwrset(&self) -> &PWRSET { &self.pwrset } #[doc = "0x08 - PCU Clear Control Register"] #[inline(always)] - pub const fn pwrclr(&self) -> &Pwrclr { + pub const fn pwrclr(&self) -> &PWRCLR { &self.pwrclr } #[doc = "0x10 - EVR Status Register"] #[inline(always)] - pub const fn evrstat(&self) -> &Evrstat { + pub const fn evrstat(&self) -> &EVRSTAT { &self.evrstat } #[doc = "0x14 - EVR VADC Status Register"] #[inline(always)] - pub const fn evrvadcstat(&self) -> &Evrvadcstat { + pub const fn evrvadcstat(&self) -> &EVRVADCSTAT { &self.evrvadcstat } #[doc = "0x2c - Power Monitor Control"] #[inline(always)] - pub const fn pwrmon(&self) -> &Pwrmon { + pub const fn pwrmon(&self) -> &PWRMON { &self.pwrmon } } #[doc = "PWRSTAT (r) register accessor: PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrstat`] module"] -#[doc(alias = "PWRSTAT")] -pub type Pwrstat = crate::Reg; +pub type PWRSTAT = crate::Reg; #[doc = "PCU Status Register"] pub mod pwrstat; #[doc = "PWRSET (w) register accessor: PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrset`] module"] -#[doc(alias = "PWRSET")] -pub type Pwrset = crate::Reg; +pub type PWRSET = crate::Reg; #[doc = "PCU Set Control Register"] pub mod pwrset; #[doc = "PWRCLR (w) register accessor: PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrclr`] module"] -#[doc(alias = "PWRCLR")] -pub type Pwrclr = crate::Reg; +pub type PWRCLR = crate::Reg; #[doc = "PCU Clear Control Register"] pub mod pwrclr; #[doc = "EVRSTAT (r) register accessor: EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrstat`] module"] -#[doc(alias = "EVRSTAT")] -pub type Evrstat = crate::Reg; +pub type EVRSTAT = crate::Reg; #[doc = "EVR Status Register"] pub mod evrstat; #[doc = "EVRVADCSTAT (r) register accessor: EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@evrvadcstat`] module"] -#[doc(alias = "EVRVADCSTAT")] -pub type Evrvadcstat = crate::Reg; +pub type EVRVADCSTAT = crate::Reg; #[doc = "EVR VADC Status Register"] pub mod evrvadcstat; #[doc = "PWRMON (rw) register accessor: Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwrmon`] module"] -#[doc(alias = "PWRMON")] -pub type Pwrmon = crate::Reg; +pub type PWRMON = crate::Reg; #[doc = "Power Monitor Control"] pub mod pwrmon; diff --git a/src/scu_power/evrstat.rs b/src/scu_power/evrstat.rs index 0c108b49..7bb47ef5 100644 --- a/src/scu_power/evrstat.rs +++ b/src/scu_power/evrstat.rs @@ -1,56 +1,56 @@ #[doc = "Register `EVRSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Regulator Overvoltage for 1.3 V\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ov13 { +pub enum OV13_A { #[doc = "0: No overvoltage condition"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Regulator is in overvoltage"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ov13) -> Self { + fn from(variant: OV13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `OV13` reader - Regulator Overvoltage for 1.3 V"] -pub type Ov13R = crate::BitReader; -impl Ov13R { +pub type OV13_R = crate::BitReader; +impl OV13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ov13 { + pub const fn variant(&self) -> OV13_A { match self.bits { - false => Ov13::Value1, - true => Ov13::Value2, + false => OV13_A::VALUE1, + true => OV13_A::VALUE2, } } #[doc = "No overvoltage condition"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ov13::Value1 + *self == OV13_A::VALUE1 } #[doc = "Regulator is in overvoltage"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ov13::Value2 + *self == OV13_A::VALUE2 } } impl R { #[doc = "Bit 1 - Regulator Overvoltage for 1.3 V"] #[inline(always)] - pub fn ov13(&self) -> Ov13R { - Ov13R::new(((self.bits >> 1) & 1) != 0) + pub fn ov13(&self) -> OV13_R { + OV13_R::new(((self.bits >> 1) & 1) != 0) } } #[doc = "EVR Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EvrstatSpec; -impl crate::RegisterSpec for EvrstatSpec { +pub struct EVRSTAT_SPEC; +impl crate::RegisterSpec for EVRSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`evrstat::R`](R) reader structure"] -impl crate::Readable for EvrstatSpec {} +impl crate::Readable for EVRSTAT_SPEC {} #[doc = "`reset()` method sets EVRSTAT to value 0"] -impl crate::Resettable for EvrstatSpec { +impl crate::Resettable for EVRSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/evrvadcstat.rs b/src/scu_power/evrvadcstat.rs index 77cc8eca..15ae2e09 100644 --- a/src/scu_power/evrvadcstat.rs +++ b/src/scu_power/evrvadcstat.rs @@ -1,29 +1,29 @@ #[doc = "Register `EVRVADCSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `VADC13V` reader - VADC 1.3 V Conversion Result"] -pub type Vadc13vR = crate::FieldReader; +pub type VADC13V_R = crate::FieldReader; #[doc = "Field `VADC33V` reader - VADC 3.3 V Conversion Result"] -pub type Vadc33vR = crate::FieldReader; +pub type VADC33V_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - VADC 1.3 V Conversion Result"] #[inline(always)] - pub fn vadc13v(&self) -> Vadc13vR { - Vadc13vR::new((self.bits & 0xff) as u8) + pub fn vadc13v(&self) -> VADC13V_R { + VADC13V_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - VADC 3.3 V Conversion Result"] #[inline(always)] - pub fn vadc33v(&self) -> Vadc33vR { - Vadc33vR::new(((self.bits >> 8) & 0xff) as u8) + pub fn vadc33v(&self) -> VADC33V_R { + VADC33V_R::new(((self.bits >> 8) & 0xff) as u8) } } #[doc = "EVR VADC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`evrvadcstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EvrvadcstatSpec; -impl crate::RegisterSpec for EvrvadcstatSpec { +pub struct EVRVADCSTAT_SPEC; +impl crate::RegisterSpec for EVRVADCSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`evrvadcstat::R`](R) reader structure"] -impl crate::Readable for EvrvadcstatSpec {} +impl crate::Readable for EVRVADCSTAT_SPEC {} #[doc = "`reset()` method sets EVRVADCSTAT to value 0"] -impl crate::Resettable for EvrvadcstatSpec { +impl crate::Resettable for EVRVADCSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrclr.rs b/src/scu_power/pwrclr.rs index f978a6b8..87754895 100644 --- a/src/scu_power/pwrclr.rs +++ b/src/scu_power/pwrclr.rs @@ -1,130 +1,130 @@ #[doc = "Register `PWRCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Disable Hibernate Domain\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hib { +pub enum HIB_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable Hibernate domain"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hib) -> Self { + fn from(variant: HIB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIB` writer - Clear Disable Hibernate Domain"] -pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; -impl<'a, REG> HibW<'a, REG> +pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_A>; +impl<'a, REG> HIB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hib::Value1) + self.variant(HIB_A::VALUE1) } #[doc = "Disable Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hib::Value2) + self.variant(HIB_A::VALUE2) } } #[doc = "Clear USB PHY Transceiver Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbphypdq { +pub enum USBPHYPDQ_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Power-down"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbphypdq) -> Self { + fn from(variant: USBPHYPDQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPHYPDQ` writer - Clear USB PHY Transceiver Disable"] -pub type UsbphypdqW<'a, REG> = crate::BitWriter<'a, REG, Usbphypdq>; -impl<'a, REG> UsbphypdqW<'a, REG> +pub type USBPHYPDQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPHYPDQ_A>; +impl<'a, REG> USBPHYPDQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbphypdq::Value1) + self.variant(USBPHYPDQ_A::VALUE1) } #[doc = "Power-down"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbphypdq::Value2) + self.variant(USBPHYPDQ_A::VALUE2) } } #[doc = "Clear USB Weak Pull-Up at PADN Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbpuwq { +pub enum USBPUWQ_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbpuwq) -> Self { + fn from(variant: USBPUWQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPUWQ` writer - Clear USB Weak Pull-Up at PADN Enable"] -pub type UsbpuwqW<'a, REG> = crate::BitWriter<'a, REG, Usbpuwq>; -impl<'a, REG> UsbpuwqW<'a, REG> +pub type USBPUWQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPUWQ_A>; +impl<'a, REG> USBPUWQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbpuwq::Value1) + self.variant(USBPUWQ_A::VALUE1) } #[doc = "Pull-up active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbpuwq::Value2) + self.variant(USBPUWQ_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Disable Hibernate Domain"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HibW { - HibW::new(self, 0) + pub fn hib(&mut self) -> HIB_W { + HIB_W::new(self, 0) } #[doc = "Bit 16 - Clear USB PHY Transceiver Disable"] #[inline(always)] #[must_use] - pub fn usbphypdq(&mut self) -> UsbphypdqW { - UsbphypdqW::new(self, 16) + pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { + USBPHYPDQ_W::new(self, 16) } #[doc = "Bit 18 - Clear USB Weak Pull-Up at PADN Enable"] #[inline(always)] #[must_use] - pub fn usbpuwq(&mut self) -> UsbpuwqW { - UsbpuwqW::new(self, 18) + pub fn usbpuwq(&mut self) -> USBPUWQ_W { + USBPUWQ_W::new(self, 18) } } #[doc = "PCU Clear Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PwrclrSpec; -impl crate::RegisterSpec for PwrclrSpec { +pub struct PWRCLR_SPEC; +impl crate::RegisterSpec for PWRCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pwrclr::W`](W) writer structure"] -impl crate::Writable for PwrclrSpec { +impl crate::Writable for PWRCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRCLR to value 0"] -impl crate::Resettable for PwrclrSpec { +impl crate::Resettable for PWRCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrmon.rs b/src/scu_power/pwrmon.rs index b4cfe761..34326846 100644 --- a/src/scu_power/pwrmon.rs +++ b/src/scu_power/pwrmon.rs @@ -1,70 +1,70 @@ #[doc = "Register `PWRMON` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PWRMON` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `THRS` reader - Threshold"] -pub type ThrsR = crate::FieldReader; +pub type THRS_R = crate::FieldReader; #[doc = "Field `THRS` writer - Threshold"] -pub type ThrsW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type THRS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `INTV` reader - Interval"] -pub type IntvR = crate::FieldReader; +pub type INTV_R = crate::FieldReader; #[doc = "Field `INTV` writer - Interval"] -pub type IntvW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type INTV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `ENB` reader - Enable"] -pub type EnbR = crate::BitReader; +pub type ENB_R = crate::BitReader; #[doc = "Field `ENB` writer - Enable"] -pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:7 - Threshold"] #[inline(always)] - pub fn thrs(&self) -> ThrsR { - ThrsR::new((self.bits & 0xff) as u8) + pub fn thrs(&self) -> THRS_R { + THRS_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Interval"] #[inline(always)] - pub fn intv(&self) -> IntvR { - IntvR::new(((self.bits >> 8) & 0xff) as u8) + pub fn intv(&self) -> INTV_R { + INTV_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 16 - Enable"] #[inline(always)] - pub fn enb(&self) -> EnbR { - EnbR::new(((self.bits >> 16) & 1) != 0) + pub fn enb(&self) -> ENB_R { + ENB_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:7 - Threshold"] #[inline(always)] #[must_use] - pub fn thrs(&mut self) -> ThrsW { - ThrsW::new(self, 0) + pub fn thrs(&mut self) -> THRS_W { + THRS_W::new(self, 0) } #[doc = "Bits 8:15 - Interval"] #[inline(always)] #[must_use] - pub fn intv(&mut self) -> IntvW { - IntvW::new(self, 8) + pub fn intv(&mut self) -> INTV_W { + INTV_W::new(self, 8) } #[doc = "Bit 16 - Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> EnbW { - EnbW::new(self, 16) + pub fn enb(&mut self) -> ENB_W { + ENB_W::new(self, 16) } } #[doc = "Power Monitor Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrmon::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrmon::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PwrmonSpec; -impl crate::RegisterSpec for PwrmonSpec { +pub struct PWRMON_SPEC; +impl crate::RegisterSpec for PWRMON_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pwrmon::R`](R) reader structure"] -impl crate::Readable for PwrmonSpec {} +impl crate::Readable for PWRMON_SPEC {} #[doc = "`write(|w| ..)` method takes [`pwrmon::W`](W) writer structure"] -impl crate::Writable for PwrmonSpec { +impl crate::Writable for PWRMON_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRMON to value 0"] -impl crate::Resettable for PwrmonSpec { +impl crate::Resettable for PWRMON_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrset.rs b/src/scu_power/pwrset.rs index 54231147..95d0f2fd 100644 --- a/src/scu_power/pwrset.rs +++ b/src/scu_power/pwrset.rs @@ -1,130 +1,130 @@ #[doc = "Register `PWRSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Set Hibernate Domain Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hib { +pub enum HIB_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable Hibernate domain"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hib) -> Self { + fn from(variant: HIB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIB` writer - Set Hibernate Domain Enable"] -pub type HibW<'a, REG> = crate::BitWriter<'a, REG, Hib>; -impl<'a, REG> HibW<'a, REG> +pub type HIB_W<'a, REG> = crate::BitWriter<'a, REG, HIB_A>; +impl<'a, REG> HIB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hib::Value1) + self.variant(HIB_A::VALUE1) } #[doc = "Enable Hibernate domain"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hib::Value2) + self.variant(HIB_A::VALUE2) } } #[doc = "Set USB PHY Transceiver Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbphypdq { +pub enum USBPHYPDQ_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbphypdq) -> Self { + fn from(variant: USBPHYPDQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPHYPDQ` writer - Set USB PHY Transceiver Disable"] -pub type UsbphypdqW<'a, REG> = crate::BitWriter<'a, REG, Usbphypdq>; -impl<'a, REG> UsbphypdqW<'a, REG> +pub type USBPHYPDQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPHYPDQ_A>; +impl<'a, REG> USBPHYPDQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbphypdq::Value1) + self.variant(USBPHYPDQ_A::VALUE1) } #[doc = "Active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbphypdq::Value2) + self.variant(USBPHYPDQ_A::VALUE2) } } #[doc = "Set USB Weak Pull-Up at PADN Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbpuwq { +pub enum USBPUWQ_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up not active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbpuwq) -> Self { + fn from(variant: USBPUWQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPUWQ` writer - Set USB Weak Pull-Up at PADN Enable"] -pub type UsbpuwqW<'a, REG> = crate::BitWriter<'a, REG, Usbpuwq>; -impl<'a, REG> UsbpuwqW<'a, REG> +pub type USBPUWQ_W<'a, REG> = crate::BitWriter<'a, REG, USBPUWQ_A>; +impl<'a, REG> USBPUWQ_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbpuwq::Value1) + self.variant(USBPUWQ_A::VALUE1) } #[doc = "Pull-up not active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbpuwq::Value2) + self.variant(USBPUWQ_A::VALUE2) } } impl W { #[doc = "Bit 0 - Set Hibernate Domain Enable"] #[inline(always)] #[must_use] - pub fn hib(&mut self) -> HibW { - HibW::new(self, 0) + pub fn hib(&mut self) -> HIB_W { + HIB_W::new(self, 0) } #[doc = "Bit 16 - Set USB PHY Transceiver Disable"] #[inline(always)] #[must_use] - pub fn usbphypdq(&mut self) -> UsbphypdqW { - UsbphypdqW::new(self, 16) + pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { + USBPHYPDQ_W::new(self, 16) } #[doc = "Bit 18 - Set USB Weak Pull-Up at PADN Enable"] #[inline(always)] #[must_use] - pub fn usbpuwq(&mut self) -> UsbpuwqW { - UsbpuwqW::new(self, 18) + pub fn usbpuwq(&mut self) -> USBPUWQ_W { + USBPUWQ_W::new(self, 18) } } #[doc = "PCU Set Control Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pwrset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PwrsetSpec; -impl crate::RegisterSpec for PwrsetSpec { +pub struct PWRSET_SPEC; +impl crate::RegisterSpec for PWRSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pwrset::W`](W) writer structure"] -impl crate::Writable for PwrsetSpec { +impl crate::Writable for PWRSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PWRSET to value 0"] -impl crate::Resettable for PwrsetSpec { +impl crate::Resettable for PWRSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_power/pwrstat.rs b/src/scu_power/pwrstat.rs index 95479991..90b5c239 100644 --- a/src/scu_power/pwrstat.rs +++ b/src/scu_power/pwrstat.rs @@ -1,138 +1,138 @@ #[doc = "Register `PWRSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Hibernate Domain Enable Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hiben { +pub enum HIBEN_A { #[doc = "0: Inactive"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hiben) -> Self { + fn from(variant: HIBEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBEN` reader - Hibernate Domain Enable Status"] -pub type HibenR = crate::BitReader; -impl HibenR { +pub type HIBEN_R = crate::BitReader; +impl HIBEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hiben { + pub const fn variant(&self) -> HIBEN_A { match self.bits { - false => Hiben::Value1, - true => Hiben::Value2, + false => HIBEN_A::VALUE1, + true => HIBEN_A::VALUE2, } } #[doc = "Inactive"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hiben::Value1 + *self == HIBEN_A::VALUE1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hiben::Value2 + *self == HIBEN_A::VALUE2 } } #[doc = "USB PHY Transceiver State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbphypdq { +pub enum USBPHYPDQ_A { #[doc = "0: Power-down"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbphypdq) -> Self { + fn from(variant: USBPHYPDQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPHYPDQ` reader - USB PHY Transceiver State"] -pub type UsbphypdqR = crate::BitReader; -impl UsbphypdqR { +pub type USBPHYPDQ_R = crate::BitReader; +impl USBPHYPDQ_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbphypdq { + pub const fn variant(&self) -> USBPHYPDQ_A { match self.bits { - false => Usbphypdq::Value1, - true => Usbphypdq::Value2, + false => USBPHYPDQ_A::VALUE1, + true => USBPHYPDQ_A::VALUE2, } } #[doc = "Power-down"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbphypdq::Value1 + *self == USBPHYPDQ_A::VALUE1 } #[doc = "Active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbphypdq::Value2 + *self == USBPHYPDQ_A::VALUE2 } } #[doc = "USB Weak Pull-Up at PADN State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbpuwq { +pub enum USBPUWQ_A { #[doc = "0: Pull-up active"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pull-up not active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbpuwq) -> Self { + fn from(variant: USBPUWQ_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBPUWQ` reader - USB Weak Pull-Up at PADN State"] -pub type UsbpuwqR = crate::BitReader; -impl UsbpuwqR { +pub type USBPUWQ_R = crate::BitReader; +impl USBPUWQ_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbpuwq { + pub const fn variant(&self) -> USBPUWQ_A { match self.bits { - false => Usbpuwq::Value1, - true => Usbpuwq::Value2, + false => USBPUWQ_A::VALUE1, + true => USBPUWQ_A::VALUE2, } } #[doc = "Pull-up active"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbpuwq::Value1 + *self == USBPUWQ_A::VALUE1 } #[doc = "Pull-up not active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbpuwq::Value2 + *self == USBPUWQ_A::VALUE2 } } impl R { #[doc = "Bit 0 - Hibernate Domain Enable Status"] #[inline(always)] - pub fn hiben(&self) -> HibenR { - HibenR::new((self.bits & 1) != 0) + pub fn hiben(&self) -> HIBEN_R { + HIBEN_R::new((self.bits & 1) != 0) } #[doc = "Bit 16 - USB PHY Transceiver State"] #[inline(always)] - pub fn usbphypdq(&self) -> UsbphypdqR { - UsbphypdqR::new(((self.bits >> 16) & 1) != 0) + pub fn usbphypdq(&self) -> USBPHYPDQ_R { + USBPHYPDQ_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 18 - USB Weak Pull-Up at PADN State"] #[inline(always)] - pub fn usbpuwq(&self) -> UsbpuwqR { - UsbpuwqR::new(((self.bits >> 18) & 1) != 0) + pub fn usbpuwq(&self) -> USBPUWQ_R { + USBPUWQ_R::new(((self.bits >> 18) & 1) != 0) } } #[doc = "PCU Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pwrstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PwrstatSpec; -impl crate::RegisterSpec for PwrstatSpec { +pub struct PWRSTAT_SPEC; +impl crate::RegisterSpec for PWRSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pwrstat::R`](R) reader structure"] -impl crate::Readable for PwrstatSpec {} +impl crate::Readable for PWRSTAT_SPEC {} #[doc = "`reset()` method sets PWRSTAT to value 0"] -impl crate::Resettable for PwrstatSpec { +impl crate::Resettable for PWRSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset.rs b/src/scu_reset.rs index 82a863ec..83876399 100644 --- a/src/scu_reset.rs +++ b/src/scu_reset.rs @@ -1,150 +1,138 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - rststat: Rststat, - rstset: Rstset, - rstclr: Rstclr, - prstat0: Prstat0, - prset0: Prset0, - prclr0: Prclr0, - prstat1: Prstat1, - prset1: Prset1, - prclr1: Prclr1, - prstat2: Prstat2, - prset2: Prset2, - prclr2: Prclr2, + rststat: RSTSTAT, + rstset: RSTSET, + rstclr: RSTCLR, + prstat0: PRSTAT0, + prset0: PRSET0, + prclr0: PRCLR0, + prstat1: PRSTAT1, + prset1: PRSET1, + prclr1: PRCLR1, + prstat2: PRSTAT2, + prset2: PRSET2, + prclr2: PRCLR2, } impl RegisterBlock { #[doc = "0x00 - RCU Reset Status"] #[inline(always)] - pub const fn rststat(&self) -> &Rststat { + pub const fn rststat(&self) -> &RSTSTAT { &self.rststat } #[doc = "0x04 - RCU Reset Set Register"] #[inline(always)] - pub const fn rstset(&self) -> &Rstset { + pub const fn rstset(&self) -> &RSTSET { &self.rstset } #[doc = "0x08 - RCU Reset Clear Register"] #[inline(always)] - pub const fn rstclr(&self) -> &Rstclr { + pub const fn rstclr(&self) -> &RSTCLR { &self.rstclr } #[doc = "0x0c - RCU Peripheral 0 Reset Status"] #[inline(always)] - pub const fn prstat0(&self) -> &Prstat0 { + pub const fn prstat0(&self) -> &PRSTAT0 { &self.prstat0 } #[doc = "0x10 - RCU Peripheral 0 Reset Set"] #[inline(always)] - pub const fn prset0(&self) -> &Prset0 { + pub const fn prset0(&self) -> &PRSET0 { &self.prset0 } #[doc = "0x14 - RCU Peripheral 0 Reset Clear"] #[inline(always)] - pub const fn prclr0(&self) -> &Prclr0 { + pub const fn prclr0(&self) -> &PRCLR0 { &self.prclr0 } #[doc = "0x18 - RCU Peripheral 1 Reset Status"] #[inline(always)] - pub const fn prstat1(&self) -> &Prstat1 { + pub const fn prstat1(&self) -> &PRSTAT1 { &self.prstat1 } #[doc = "0x1c - RCU Peripheral 1 Reset Set"] #[inline(always)] - pub const fn prset1(&self) -> &Prset1 { + pub const fn prset1(&self) -> &PRSET1 { &self.prset1 } #[doc = "0x20 - RCU Peripheral 1 Reset Clear"] #[inline(always)] - pub const fn prclr1(&self) -> &Prclr1 { + pub const fn prclr1(&self) -> &PRCLR1 { &self.prclr1 } #[doc = "0x24 - RCU Peripheral 2 Reset Status"] #[inline(always)] - pub const fn prstat2(&self) -> &Prstat2 { + pub const fn prstat2(&self) -> &PRSTAT2 { &self.prstat2 } #[doc = "0x28 - RCU Peripheral 2 Reset Set"] #[inline(always)] - pub const fn prset2(&self) -> &Prset2 { + pub const fn prset2(&self) -> &PRSET2 { &self.prset2 } #[doc = "0x2c - RCU Peripheral 2 Reset Clear"] #[inline(always)] - pub const fn prclr2(&self) -> &Prclr2 { + pub const fn prclr2(&self) -> &PRCLR2 { &self.prclr2 } } #[doc = "RSTSTAT (r) register accessor: RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rststat`] module"] -#[doc(alias = "RSTSTAT")] -pub type Rststat = crate::Reg; +pub type RSTSTAT = crate::Reg; #[doc = "RCU Reset Status"] pub mod rststat; #[doc = "RSTSET (w) register accessor: RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstset`] module"] -#[doc(alias = "RSTSET")] -pub type Rstset = crate::Reg; +pub type RSTSET = crate::Reg; #[doc = "RCU Reset Set Register"] pub mod rstset; #[doc = "RSTCLR (w) register accessor: RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rstclr`] module"] -#[doc(alias = "RSTCLR")] -pub type Rstclr = crate::Reg; +pub type RSTCLR = crate::Reg; #[doc = "RCU Reset Clear Register"] pub mod rstclr; #[doc = "PRSTAT0 (r) register accessor: RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat0`] module"] -#[doc(alias = "PRSTAT0")] -pub type Prstat0 = crate::Reg; +pub type PRSTAT0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Status"] pub mod prstat0; #[doc = "PRSET0 (w) register accessor: RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset0`] module"] -#[doc(alias = "PRSET0")] -pub type Prset0 = crate::Reg; +pub type PRSET0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Set"] pub mod prset0; #[doc = "PRCLR0 (w) register accessor: RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr0`] module"] -#[doc(alias = "PRCLR0")] -pub type Prclr0 = crate::Reg; +pub type PRCLR0 = crate::Reg; #[doc = "RCU Peripheral 0 Reset Clear"] pub mod prclr0; #[doc = "PRSTAT1 (r) register accessor: RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat1`] module"] -#[doc(alias = "PRSTAT1")] -pub type Prstat1 = crate::Reg; +pub type PRSTAT1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Status"] pub mod prstat1; #[doc = "PRSET1 (w) register accessor: RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset1`] module"] -#[doc(alias = "PRSET1")] -pub type Prset1 = crate::Reg; +pub type PRSET1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Set"] pub mod prset1; #[doc = "PRCLR1 (w) register accessor: RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr1`] module"] -#[doc(alias = "PRCLR1")] -pub type Prclr1 = crate::Reg; +pub type PRCLR1 = crate::Reg; #[doc = "RCU Peripheral 1 Reset Clear"] pub mod prclr1; #[doc = "PRSTAT2 (r) register accessor: RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prstat2`] module"] -#[doc(alias = "PRSTAT2")] -pub type Prstat2 = crate::Reg; +pub type PRSTAT2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Status"] pub mod prstat2; #[doc = "PRSET2 (w) register accessor: RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prset2`] module"] -#[doc(alias = "PRSET2")] -pub type Prset2 = crate::Reg; +pub type PRSET2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Set"] pub mod prset2; #[doc = "PRCLR2 (w) register accessor: RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@prclr2`] module"] -#[doc(alias = "PRCLR2")] -pub type Prclr2 = crate::Reg; +pub type PRCLR2 = crate::Reg; #[doc = "RCU Peripheral 2 Reset Clear"] pub mod prclr2; diff --git a/src/scu_reset/prclr0.rs b/src/scu_reset/prclr0.rs index 57af1fb2..cf76c69f 100644 --- a/src/scu_reset/prclr0.rs +++ b/src/scu_reset/prclr0.rs @@ -1,315 +1,315 @@ #[doc = "Register `PRCLR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadcrs { +pub enum VADCRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadcrs) -> Self { + fn from(variant: VADCRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADCRS` writer - VADC Reset Clear"] -pub type VadcrsW<'a, REG> = crate::BitWriter<'a, REG, Vadcrs>; -impl<'a, REG> VadcrsW<'a, REG> +pub type VADCRS_W<'a, REG> = crate::BitWriter<'a, REG, VADCRS_A>; +impl<'a, REG> VADCRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vadcrs::Value1) + self.variant(VADCRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vadcrs::Value2) + self.variant(VADCRS_A::VALUE2) } } #[doc = "CCU40 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40rs { +pub enum CCU40RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40rs) -> Self { + fn from(variant: CCU40RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40RS` writer - CCU40 Reset Clear"] -pub type Ccu40rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu40rs>; -impl<'a, REG> Ccu40rsW<'a, REG> +pub type CCU40RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU40RS_A>; +impl<'a, REG> CCU40RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu40rs::Value1) + self.variant(CCU40RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu40rs::Value2) + self.variant(CCU40RS_A::VALUE2) } } #[doc = "CCU41 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41rs { +pub enum CCU41RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41rs) -> Self { + fn from(variant: CCU41RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41RS` writer - CCU41 Reset Clear"] -pub type Ccu41rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu41rs>; -impl<'a, REG> Ccu41rsW<'a, REG> +pub type CCU41RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU41RS_A>; +impl<'a, REG> CCU41RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu41rs::Value1) + self.variant(CCU41RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu41rs::Value2) + self.variant(CCU41RS_A::VALUE2) } } #[doc = "CCU80 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80rs { +pub enum CCU80RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80rs) -> Self { + fn from(variant: CCU80RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80RS` writer - CCU80 Reset Clear"] -pub type Ccu80rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu80rs>; -impl<'a, REG> Ccu80rsW<'a, REG> +pub type CCU80RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU80RS_A>; +impl<'a, REG> CCU80RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu80rs::Value1) + self.variant(CCU80RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu80rs::Value2) + self.variant(CCU80RS_A::VALUE2) } } #[doc = "POSIF0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0rs { +pub enum POSIF0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0rs) -> Self { + fn from(variant: POSIF0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0RS` writer - POSIF0 Reset Clear"] -pub type Posif0rsW<'a, REG> = crate::BitWriter<'a, REG, Posif0rs>; -impl<'a, REG> Posif0rsW<'a, REG> +pub type POSIF0RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0RS_A>; +impl<'a, REG> POSIF0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posif0rs::Value1) + self.variant(POSIF0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posif0rs::Value2) + self.variant(POSIF0RS_A::VALUE2) } } #[doc = "USIC0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0rs { +pub enum USIC0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0rs) -> Self { + fn from(variant: USIC0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0RS` writer - USIC0 Reset Clear"] -pub type Usic0rsW<'a, REG> = crate::BitWriter<'a, REG, Usic0rs>; -impl<'a, REG> Usic0rsW<'a, REG> +pub type USIC0RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC0RS_A>; +impl<'a, REG> USIC0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic0rs::Value1) + self.variant(USIC0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic0rs::Value2) + self.variant(USIC0RS_A::VALUE2) } } #[doc = "ERU1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1rs { +pub enum ERU1RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1rs) -> Self { + fn from(variant: ERU1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1RS` writer - ERU1 Reset Clear"] -pub type Eru1rsW<'a, REG> = crate::BitWriter<'a, REG, Eru1rs>; -impl<'a, REG> Eru1rsW<'a, REG> +pub type ERU1RS_W<'a, REG> = crate::BitWriter<'a, REG, ERU1RS_A>; +impl<'a, REG> ERU1RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru1rs::Value1) + self.variant(ERU1RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru1rs::Value2) + self.variant(ERU1RS_A::VALUE2) } } #[doc = "HRPWM0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0rs { +pub enum HRPWM0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0rs) -> Self { + fn from(variant: HRPWM0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0RS` writer - HRPWM0 Reset Clear"] -pub type Hrpwm0rsW<'a, REG> = crate::BitWriter<'a, REG, Hrpwm0rs>; -impl<'a, REG> Hrpwm0rsW<'a, REG> +pub type HRPWM0RS_W<'a, REG> = crate::BitWriter<'a, REG, HRPWM0RS_A>; +impl<'a, REG> HRPWM0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrpwm0rs::Value1) + self.variant(HRPWM0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrpwm0rs::Value2) + self.variant(HRPWM0RS_A::VALUE2) } } impl W { #[doc = "Bit 0 - VADC Reset Clear"] #[inline(always)] #[must_use] - pub fn vadcrs(&mut self) -> VadcrsW { - VadcrsW::new(self, 0) + pub fn vadcrs(&mut self) -> VADCRS_W { + VADCRS_W::new(self, 0) } #[doc = "Bit 2 - CCU40 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu40rs(&mut self) -> Ccu40rsW { - Ccu40rsW::new(self, 2) + pub fn ccu40rs(&mut self) -> CCU40RS_W { + CCU40RS_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu41rs(&mut self) -> Ccu41rsW { - Ccu41rsW::new(self, 3) + pub fn ccu41rs(&mut self) -> CCU41RS_W { + CCU41RS_W::new(self, 3) } #[doc = "Bit 7 - CCU80 Reset Clear"] #[inline(always)] #[must_use] - pub fn ccu80rs(&mut self) -> Ccu80rsW { - Ccu80rsW::new(self, 7) + pub fn ccu80rs(&mut self) -> CCU80RS_W { + CCU80RS_W::new(self, 7) } #[doc = "Bit 9 - POSIF0 Reset Clear"] #[inline(always)] #[must_use] - pub fn posif0rs(&mut self) -> Posif0rsW { - Posif0rsW::new(self, 9) + pub fn posif0rs(&mut self) -> POSIF0RS_W { + POSIF0RS_W::new(self, 9) } #[doc = "Bit 11 - USIC0 Reset Clear"] #[inline(always)] #[must_use] - pub fn usic0rs(&mut self) -> Usic0rsW { - Usic0rsW::new(self, 11) + pub fn usic0rs(&mut self) -> USIC0RS_W { + USIC0RS_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Clear"] #[inline(always)] #[must_use] - pub fn eru1rs(&mut self) -> Eru1rsW { - Eru1rsW::new(self, 16) + pub fn eru1rs(&mut self) -> ERU1RS_W { + ERU1RS_W::new(self, 16) } #[doc = "Bit 23 - HRPWM0 Reset Clear"] #[inline(always)] #[must_use] - pub fn hrpwm0rs(&mut self) -> Hrpwm0rsW { - Hrpwm0rsW::new(self, 23) + pub fn hrpwm0rs(&mut self) -> HRPWM0RS_W { + HRPWM0RS_W::new(self, 23) } } #[doc = "RCU Peripheral 0 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prclr0Spec; -impl crate::RegisterSpec for Prclr0Spec { +pub struct PRCLR0_SPEC; +impl crate::RegisterSpec for PRCLR0_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr0::W`](W) writer structure"] -impl crate::Writable for Prclr0Spec { +impl crate::Writable for PRCLR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR0 to value 0"] -impl crate::Resettable for Prclr0Spec { +impl crate::Resettable for PRCLR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prclr1.rs b/src/scu_reset/prclr1.rs index 2a80b257..0df1a909 100644 --- a/src/scu_reset/prclr1.rs +++ b/src/scu_reset/prclr1.rs @@ -1,204 +1,204 @@ #[doc = "Register `PRCLR1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "LEDTS Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0rs { +pub enum LEDTSCU0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0rs) -> Self { + fn from(variant: LEDTSCU0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0RS` writer - LEDTS Reset Clear"] -pub type Ledtscu0rsW<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0rs>; -impl<'a, REG> Ledtscu0rsW<'a, REG> +pub type LEDTSCU0RS_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0RS_A>; +impl<'a, REG> LEDTSCU0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ledtscu0rs::Value1) + self.variant(LEDTSCU0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ledtscu0rs::Value2) + self.variant(LEDTSCU0RS_A::VALUE2) } } #[doc = "MultiCAN Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0rs { +pub enum MCAN0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0rs) -> Self { + fn from(variant: MCAN0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0RS` writer - MultiCAN Reset Clear"] -pub type Mcan0rsW<'a, REG> = crate::BitWriter<'a, REG, Mcan0rs>; -impl<'a, REG> Mcan0rsW<'a, REG> +pub type MCAN0RS_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0RS_A>; +impl<'a, REG> MCAN0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcan0rs::Value1) + self.variant(MCAN0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcan0rs::Value2) + self.variant(MCAN0RS_A::VALUE2) } } #[doc = "DAC Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dacrs { +pub enum DACRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dacrs) -> Self { + fn from(variant: DACRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DACRS` writer - DAC Reset Clear"] -pub type DacrsW<'a, REG> = crate::BitWriter<'a, REG, Dacrs>; -impl<'a, REG> DacrsW<'a, REG> +pub type DACRS_W<'a, REG> = crate::BitWriter<'a, REG, DACRS_A>; +impl<'a, REG> DACRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dacrs::Value1) + self.variant(DACRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dacrs::Value2) + self.variant(DACRS_A::VALUE2) } } #[doc = "USIC1 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1rs { +pub enum USIC1RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1rs) -> Self { + fn from(variant: USIC1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1RS` writer - USIC1 Reset Clear"] -pub type Usic1rsW<'a, REG> = crate::BitWriter<'a, REG, Usic1rs>; -impl<'a, REG> Usic1rsW<'a, REG> +pub type USIC1RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC1RS_A>; +impl<'a, REG> USIC1RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic1rs::Value1) + self.variant(USIC1RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic1rs::Value2) + self.variant(USIC1RS_A::VALUE2) } } #[doc = "PORTS Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pportsrs { +pub enum PPORTSRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pportsrs) -> Self { + fn from(variant: PPORTSRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTSRS` writer - PORTS Reset Clear"] -pub type PportsrsW<'a, REG> = crate::BitWriter<'a, REG, Pportsrs>; -impl<'a, REG> PportsrsW<'a, REG> +pub type PPORTSRS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTSRS_A>; +impl<'a, REG> PPORTSRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pportsrs::Value1) + self.variant(PPORTSRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pportsrs::Value2) + self.variant(PPORTSRS_A::VALUE2) } } impl W { #[doc = "Bit 3 - LEDTS Reset Clear"] #[inline(always)] #[must_use] - pub fn ledtscu0rs(&mut self) -> Ledtscu0rsW { - Ledtscu0rsW::new(self, 3) + pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { + LEDTSCU0RS_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Clear"] #[inline(always)] #[must_use] - pub fn mcan0rs(&mut self) -> Mcan0rsW { - Mcan0rsW::new(self, 4) + pub fn mcan0rs(&mut self) -> MCAN0RS_W { + MCAN0RS_W::new(self, 4) } #[doc = "Bit 5 - DAC Reset Clear"] #[inline(always)] #[must_use] - pub fn dacrs(&mut self) -> DacrsW { - DacrsW::new(self, 5) + pub fn dacrs(&mut self) -> DACRS_W { + DACRS_W::new(self, 5) } #[doc = "Bit 7 - USIC1 Reset Clear"] #[inline(always)] #[must_use] - pub fn usic1rs(&mut self) -> Usic1rsW { - Usic1rsW::new(self, 7) + pub fn usic1rs(&mut self) -> USIC1RS_W { + USIC1RS_W::new(self, 7) } #[doc = "Bit 9 - PORTS Reset Clear"] #[inline(always)] #[must_use] - pub fn pportsrs(&mut self) -> PportsrsW { - PportsrsW::new(self, 9) + pub fn pportsrs(&mut self) -> PPORTSRS_W { + PPORTSRS_W::new(self, 9) } } #[doc = "RCU Peripheral 1 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prclr1Spec; -impl crate::RegisterSpec for Prclr1Spec { +pub struct PRCLR1_SPEC; +impl crate::RegisterSpec for PRCLR1_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr1::W`](W) writer structure"] -impl crate::Writable for Prclr1Spec { +impl crate::Writable for PRCLR1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR1 to value 0"] -impl crate::Resettable for Prclr1Spec { +impl crate::Resettable for PRCLR1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prclr2.rs b/src/scu_reset/prclr2.rs index 5ec80d1f..948e6832 100644 --- a/src/scu_reset/prclr2.rs +++ b/src/scu_reset/prclr2.rs @@ -1,167 +1,167 @@ #[doc = "Register `PRCLR2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtrs { +pub enum WDTRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtrs) -> Self { + fn from(variant: WDTRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTRS` writer - WDT Reset Clear"] -pub type WdtrsW<'a, REG> = crate::BitWriter<'a, REG, Wdtrs>; -impl<'a, REG> WdtrsW<'a, REG> +pub type WDTRS_W<'a, REG> = crate::BitWriter<'a, REG, WDTRS_A>; +impl<'a, REG> WDTRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtrs::Value1) + self.variant(WDTRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtrs::Value2) + self.variant(WDTRS_A::VALUE2) } } #[doc = "DMA0 Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0rs { +pub enum DMA0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0rs) -> Self { + fn from(variant: DMA0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0RS` writer - DMA0 Reset Clear"] -pub type Dma0rsW<'a, REG> = crate::BitWriter<'a, REG, Dma0rs>; -impl<'a, REG> Dma0rsW<'a, REG> +pub type DMA0RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA0RS_A>; +impl<'a, REG> DMA0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dma0rs::Value1) + self.variant(DMA0RS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dma0rs::Value2) + self.variant(DMA0RS_A::VALUE2) } } #[doc = "FCE Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcers { +pub enum FCERS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcers) -> Self { + fn from(variant: FCERS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCERS` writer - FCE Reset Clear"] -pub type FcersW<'a, REG> = crate::BitWriter<'a, REG, Fcers>; -impl<'a, REG> FcersW<'a, REG> +pub type FCERS_W<'a, REG> = crate::BitWriter<'a, REG, FCERS_A>; +impl<'a, REG> FCERS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fcers::Value1) + self.variant(FCERS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fcers::Value2) + self.variant(FCERS_A::VALUE2) } } #[doc = "USB Reset Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbrs { +pub enum USBRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbrs) -> Self { + fn from(variant: USBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBRS` writer - USB Reset Clear"] -pub type UsbrsW<'a, REG> = crate::BitWriter<'a, REG, Usbrs>; -impl<'a, REG> UsbrsW<'a, REG> +pub type USBRS_W<'a, REG> = crate::BitWriter<'a, REG, USBRS_A>; +impl<'a, REG> USBRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbrs::Value1) + self.variant(USBRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbrs::Value2) + self.variant(USBRS_A::VALUE2) } } impl W { #[doc = "Bit 1 - WDT Reset Clear"] #[inline(always)] #[must_use] - pub fn wdtrs(&mut self) -> WdtrsW { - WdtrsW::new(self, 1) + pub fn wdtrs(&mut self) -> WDTRS_W { + WDTRS_W::new(self, 1) } #[doc = "Bit 4 - DMA0 Reset Clear"] #[inline(always)] #[must_use] - pub fn dma0rs(&mut self) -> Dma0rsW { - Dma0rsW::new(self, 4) + pub fn dma0rs(&mut self) -> DMA0RS_W { + DMA0RS_W::new(self, 4) } #[doc = "Bit 6 - FCE Reset Clear"] #[inline(always)] #[must_use] - pub fn fcers(&mut self) -> FcersW { - FcersW::new(self, 6) + pub fn fcers(&mut self) -> FCERS_W { + FCERS_W::new(self, 6) } #[doc = "Bit 7 - USB Reset Clear"] #[inline(always)] #[must_use] - pub fn usbrs(&mut self) -> UsbrsW { - UsbrsW::new(self, 7) + pub fn usbrs(&mut self) -> USBRS_W { + USBRS_W::new(self, 7) } } #[doc = "RCU Peripheral 2 Reset Clear\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prclr2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prclr2Spec; -impl crate::RegisterSpec for Prclr2Spec { +pub struct PRCLR2_SPEC; +impl crate::RegisterSpec for PRCLR2_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prclr2::W`](W) writer structure"] -impl crate::Writable for Prclr2Spec { +impl crate::Writable for PRCLR2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRCLR2 to value 0"] -impl crate::Resettable for Prclr2Spec { +impl crate::Resettable for PRCLR2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset0.rs b/src/scu_reset/prset0.rs index 541daa4b..605cb365 100644 --- a/src/scu_reset/prset0.rs +++ b/src/scu_reset/prset0.rs @@ -1,315 +1,315 @@ #[doc = "Register `PRSET0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "VADC Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadcrs { +pub enum VADCRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadcrs) -> Self { + fn from(variant: VADCRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADCRS` writer - VADC Reset Assert"] -pub type VadcrsW<'a, REG> = crate::BitWriter<'a, REG, Vadcrs>; -impl<'a, REG> VadcrsW<'a, REG> +pub type VADCRS_W<'a, REG> = crate::BitWriter<'a, REG, VADCRS_A>; +impl<'a, REG> VADCRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vadcrs::Value1) + self.variant(VADCRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vadcrs::Value2) + self.variant(VADCRS_A::VALUE2) } } #[doc = "CCU40 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40rs { +pub enum CCU40RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40rs) -> Self { + fn from(variant: CCU40RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40RS` writer - CCU40 Reset Assert"] -pub type Ccu40rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu40rs>; -impl<'a, REG> Ccu40rsW<'a, REG> +pub type CCU40RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU40RS_A>; +impl<'a, REG> CCU40RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu40rs::Value1) + self.variant(CCU40RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu40rs::Value2) + self.variant(CCU40RS_A::VALUE2) } } #[doc = "CCU41 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41rs { +pub enum CCU41RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41rs) -> Self { + fn from(variant: CCU41RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41RS` writer - CCU41 Reset Assert"] -pub type Ccu41rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu41rs>; -impl<'a, REG> Ccu41rsW<'a, REG> +pub type CCU41RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU41RS_A>; +impl<'a, REG> CCU41RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu41rs::Value1) + self.variant(CCU41RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu41rs::Value2) + self.variant(CCU41RS_A::VALUE2) } } #[doc = "CCU80 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80rs { +pub enum CCU80RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80rs) -> Self { + fn from(variant: CCU80RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80RS` writer - CCU80 Reset Assert"] -pub type Ccu80rsW<'a, REG> = crate::BitWriter<'a, REG, Ccu80rs>; -impl<'a, REG> Ccu80rsW<'a, REG> +pub type CCU80RS_W<'a, REG> = crate::BitWriter<'a, REG, CCU80RS_A>; +impl<'a, REG> CCU80RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ccu80rs::Value1) + self.variant(CCU80RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ccu80rs::Value2) + self.variant(CCU80RS_A::VALUE2) } } #[doc = "POSIF0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0rs { +pub enum POSIF0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0rs) -> Self { + fn from(variant: POSIF0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0RS` writer - POSIF0 Reset Assert"] -pub type Posif0rsW<'a, REG> = crate::BitWriter<'a, REG, Posif0rs>; -impl<'a, REG> Posif0rsW<'a, REG> +pub type POSIF0RS_W<'a, REG> = crate::BitWriter<'a, REG, POSIF0RS_A>; +impl<'a, REG> POSIF0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Posif0rs::Value1) + self.variant(POSIF0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Posif0rs::Value2) + self.variant(POSIF0RS_A::VALUE2) } } #[doc = "USIC0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0rs { +pub enum USIC0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0rs) -> Self { + fn from(variant: USIC0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0RS` writer - USIC0 Reset Assert"] -pub type Usic0rsW<'a, REG> = crate::BitWriter<'a, REG, Usic0rs>; -impl<'a, REG> Usic0rsW<'a, REG> +pub type USIC0RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC0RS_A>; +impl<'a, REG> USIC0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic0rs::Value1) + self.variant(USIC0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic0rs::Value2) + self.variant(USIC0RS_A::VALUE2) } } #[doc = "ERU1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1rs { +pub enum ERU1RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1rs) -> Self { + fn from(variant: ERU1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1RS` writer - ERU1 Reset Assert"] -pub type Eru1rsW<'a, REG> = crate::BitWriter<'a, REG, Eru1rs>; -impl<'a, REG> Eru1rsW<'a, REG> +pub type ERU1RS_W<'a, REG> = crate::BitWriter<'a, REG, ERU1RS_A>; +impl<'a, REG> ERU1RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eru1rs::Value1) + self.variant(ERU1RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eru1rs::Value2) + self.variant(ERU1RS_A::VALUE2) } } #[doc = "HRPWM0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0rs { +pub enum HRPWM0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0rs) -> Self { + fn from(variant: HRPWM0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0RS` writer - HRPWM0 Reset Assert"] -pub type Hrpwm0rsW<'a, REG> = crate::BitWriter<'a, REG, Hrpwm0rs>; -impl<'a, REG> Hrpwm0rsW<'a, REG> +pub type HRPWM0RS_W<'a, REG> = crate::BitWriter<'a, REG, HRPWM0RS_A>; +impl<'a, REG> HRPWM0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hrpwm0rs::Value1) + self.variant(HRPWM0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hrpwm0rs::Value2) + self.variant(HRPWM0RS_A::VALUE2) } } impl W { #[doc = "Bit 0 - VADC Reset Assert"] #[inline(always)] #[must_use] - pub fn vadcrs(&mut self) -> VadcrsW { - VadcrsW::new(self, 0) + pub fn vadcrs(&mut self) -> VADCRS_W { + VADCRS_W::new(self, 0) } #[doc = "Bit 2 - CCU40 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu40rs(&mut self) -> Ccu40rsW { - Ccu40rsW::new(self, 2) + pub fn ccu40rs(&mut self) -> CCU40RS_W { + CCU40RS_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu41rs(&mut self) -> Ccu41rsW { - Ccu41rsW::new(self, 3) + pub fn ccu41rs(&mut self) -> CCU41RS_W { + CCU41RS_W::new(self, 3) } #[doc = "Bit 7 - CCU80 Reset Assert"] #[inline(always)] #[must_use] - pub fn ccu80rs(&mut self) -> Ccu80rsW { - Ccu80rsW::new(self, 7) + pub fn ccu80rs(&mut self) -> CCU80RS_W { + CCU80RS_W::new(self, 7) } #[doc = "Bit 9 - POSIF0 Reset Assert"] #[inline(always)] #[must_use] - pub fn posif0rs(&mut self) -> Posif0rsW { - Posif0rsW::new(self, 9) + pub fn posif0rs(&mut self) -> POSIF0RS_W { + POSIF0RS_W::new(self, 9) } #[doc = "Bit 11 - USIC0 Reset Assert"] #[inline(always)] #[must_use] - pub fn usic0rs(&mut self) -> Usic0rsW { - Usic0rsW::new(self, 11) + pub fn usic0rs(&mut self) -> USIC0RS_W { + USIC0RS_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Assert"] #[inline(always)] #[must_use] - pub fn eru1rs(&mut self) -> Eru1rsW { - Eru1rsW::new(self, 16) + pub fn eru1rs(&mut self) -> ERU1RS_W { + ERU1RS_W::new(self, 16) } #[doc = "Bit 23 - HRPWM0 Reset Assert"] #[inline(always)] #[must_use] - pub fn hrpwm0rs(&mut self) -> Hrpwm0rsW { - Hrpwm0rsW::new(self, 23) + pub fn hrpwm0rs(&mut self) -> HRPWM0RS_W { + HRPWM0RS_W::new(self, 23) } } #[doc = "RCU Peripheral 0 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prset0Spec; -impl crate::RegisterSpec for Prset0Spec { +pub struct PRSET0_SPEC; +impl crate::RegisterSpec for PRSET0_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset0::W`](W) writer structure"] -impl crate::Writable for Prset0Spec { +impl crate::Writable for PRSET0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET0 to value 0"] -impl crate::Resettable for Prset0Spec { +impl crate::Resettable for PRSET0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset1.rs b/src/scu_reset/prset1.rs index e5d09b1e..141ef14b 100644 --- a/src/scu_reset/prset1.rs +++ b/src/scu_reset/prset1.rs @@ -1,204 +1,204 @@ #[doc = "Register `PRSET1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "LEDTS Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0rs { +pub enum LEDTSCU0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0rs) -> Self { + fn from(variant: LEDTSCU0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0RS` writer - LEDTS Reset Assert"] -pub type Ledtscu0rsW<'a, REG> = crate::BitWriter<'a, REG, Ledtscu0rs>; -impl<'a, REG> Ledtscu0rsW<'a, REG> +pub type LEDTSCU0RS_W<'a, REG> = crate::BitWriter<'a, REG, LEDTSCU0RS_A>; +impl<'a, REG> LEDTSCU0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ledtscu0rs::Value1) + self.variant(LEDTSCU0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ledtscu0rs::Value2) + self.variant(LEDTSCU0RS_A::VALUE2) } } #[doc = "MultiCAN Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0rs { +pub enum MCAN0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0rs) -> Self { + fn from(variant: MCAN0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0RS` writer - MultiCAN Reset Assert"] -pub type Mcan0rsW<'a, REG> = crate::BitWriter<'a, REG, Mcan0rs>; -impl<'a, REG> Mcan0rsW<'a, REG> +pub type MCAN0RS_W<'a, REG> = crate::BitWriter<'a, REG, MCAN0RS_A>; +impl<'a, REG> MCAN0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mcan0rs::Value1) + self.variant(MCAN0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mcan0rs::Value2) + self.variant(MCAN0RS_A::VALUE2) } } #[doc = "DAC Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dacrs { +pub enum DACRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dacrs) -> Self { + fn from(variant: DACRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DACRS` writer - DAC Reset Assert"] -pub type DacrsW<'a, REG> = crate::BitWriter<'a, REG, Dacrs>; -impl<'a, REG> DacrsW<'a, REG> +pub type DACRS_W<'a, REG> = crate::BitWriter<'a, REG, DACRS_A>; +impl<'a, REG> DACRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dacrs::Value1) + self.variant(DACRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dacrs::Value2) + self.variant(DACRS_A::VALUE2) } } #[doc = "USIC1 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1rs { +pub enum USIC1RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1rs) -> Self { + fn from(variant: USIC1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1RS` writer - USIC1 Reset Assert"] -pub type Usic1rsW<'a, REG> = crate::BitWriter<'a, REG, Usic1rs>; -impl<'a, REG> Usic1rsW<'a, REG> +pub type USIC1RS_W<'a, REG> = crate::BitWriter<'a, REG, USIC1RS_A>; +impl<'a, REG> USIC1RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usic1rs::Value1) + self.variant(USIC1RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usic1rs::Value2) + self.variant(USIC1RS_A::VALUE2) } } #[doc = "PORTS Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pportsrs { +pub enum PPORTSRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pportsrs) -> Self { + fn from(variant: PPORTSRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTSRS` writer - PORTS Reset Assert"] -pub type PportsrsW<'a, REG> = crate::BitWriter<'a, REG, Pportsrs>; -impl<'a, REG> PportsrsW<'a, REG> +pub type PPORTSRS_W<'a, REG> = crate::BitWriter<'a, REG, PPORTSRS_A>; +impl<'a, REG> PPORTSRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pportsrs::Value1) + self.variant(PPORTSRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pportsrs::Value2) + self.variant(PPORTSRS_A::VALUE2) } } impl W { #[doc = "Bit 3 - LEDTS Reset Assert"] #[inline(always)] #[must_use] - pub fn ledtscu0rs(&mut self) -> Ledtscu0rsW { - Ledtscu0rsW::new(self, 3) + pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { + LEDTSCU0RS_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Assert"] #[inline(always)] #[must_use] - pub fn mcan0rs(&mut self) -> Mcan0rsW { - Mcan0rsW::new(self, 4) + pub fn mcan0rs(&mut self) -> MCAN0RS_W { + MCAN0RS_W::new(self, 4) } #[doc = "Bit 5 - DAC Reset Assert"] #[inline(always)] #[must_use] - pub fn dacrs(&mut self) -> DacrsW { - DacrsW::new(self, 5) + pub fn dacrs(&mut self) -> DACRS_W { + DACRS_W::new(self, 5) } #[doc = "Bit 7 - USIC1 Reset Assert"] #[inline(always)] #[must_use] - pub fn usic1rs(&mut self) -> Usic1rsW { - Usic1rsW::new(self, 7) + pub fn usic1rs(&mut self) -> USIC1RS_W { + USIC1RS_W::new(self, 7) } #[doc = "Bit 9 - PORTS Reset Assert"] #[inline(always)] #[must_use] - pub fn pportsrs(&mut self) -> PportsrsW { - PportsrsW::new(self, 9) + pub fn pportsrs(&mut self) -> PPORTSRS_W { + PPORTSRS_W::new(self, 9) } } #[doc = "RCU Peripheral 1 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prset1Spec; -impl crate::RegisterSpec for Prset1Spec { +pub struct PRSET1_SPEC; +impl crate::RegisterSpec for PRSET1_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset1::W`](W) writer structure"] -impl crate::Writable for Prset1Spec { +impl crate::Writable for PRSET1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET1 to value 0"] -impl crate::Resettable for Prset1Spec { +impl crate::Resettable for PRSET1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prset2.rs b/src/scu_reset/prset2.rs index 46bb2d73..6704fed0 100644 --- a/src/scu_reset/prset2.rs +++ b/src/scu_reset/prset2.rs @@ -1,167 +1,167 @@ #[doc = "Register `PRSET2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WDT Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtrs { +pub enum WDTRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtrs) -> Self { + fn from(variant: WDTRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTRS` writer - WDT Reset Assert"] -pub type WdtrsW<'a, REG> = crate::BitWriter<'a, REG, Wdtrs>; -impl<'a, REG> WdtrsW<'a, REG> +pub type WDTRS_W<'a, REG> = crate::BitWriter<'a, REG, WDTRS_A>; +impl<'a, REG> WDTRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wdtrs::Value1) + self.variant(WDTRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wdtrs::Value2) + self.variant(WDTRS_A::VALUE2) } } #[doc = "DMA0 Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0rs { +pub enum DMA0RS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0rs) -> Self { + fn from(variant: DMA0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0RS` writer - DMA0 Reset Assert"] -pub type Dma0rsW<'a, REG> = crate::BitWriter<'a, REG, Dma0rs>; -impl<'a, REG> Dma0rsW<'a, REG> +pub type DMA0RS_W<'a, REG> = crate::BitWriter<'a, REG, DMA0RS_A>; +impl<'a, REG> DMA0RS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dma0rs::Value1) + self.variant(DMA0RS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dma0rs::Value2) + self.variant(DMA0RS_A::VALUE2) } } #[doc = "FCE Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcers { +pub enum FCERS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcers) -> Self { + fn from(variant: FCERS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCERS` writer - FCE Reset Assert"] -pub type FcersW<'a, REG> = crate::BitWriter<'a, REG, Fcers>; -impl<'a, REG> FcersW<'a, REG> +pub type FCERS_W<'a, REG> = crate::BitWriter<'a, REG, FCERS_A>; +impl<'a, REG> FCERS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fcers::Value1) + self.variant(FCERS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fcers::Value2) + self.variant(FCERS_A::VALUE2) } } #[doc = "USB Reset Assert\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbrs { +pub enum USBRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbrs) -> Self { + fn from(variant: USBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBRS` writer - USB Reset Assert"] -pub type UsbrsW<'a, REG> = crate::BitWriter<'a, REG, Usbrs>; -impl<'a, REG> UsbrsW<'a, REG> +pub type USBRS_W<'a, REG> = crate::BitWriter<'a, REG, USBRS_A>; +impl<'a, REG> USBRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Usbrs::Value1) + self.variant(USBRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Usbrs::Value2) + self.variant(USBRS_A::VALUE2) } } impl W { #[doc = "Bit 1 - WDT Reset Assert"] #[inline(always)] #[must_use] - pub fn wdtrs(&mut self) -> WdtrsW { - WdtrsW::new(self, 1) + pub fn wdtrs(&mut self) -> WDTRS_W { + WDTRS_W::new(self, 1) } #[doc = "Bit 4 - DMA0 Reset Assert"] #[inline(always)] #[must_use] - pub fn dma0rs(&mut self) -> Dma0rsW { - Dma0rsW::new(self, 4) + pub fn dma0rs(&mut self) -> DMA0RS_W { + DMA0RS_W::new(self, 4) } #[doc = "Bit 6 - FCE Reset Assert"] #[inline(always)] #[must_use] - pub fn fcers(&mut self) -> FcersW { - FcersW::new(self, 6) + pub fn fcers(&mut self) -> FCERS_W { + FCERS_W::new(self, 6) } #[doc = "Bit 7 - USB Reset Assert"] #[inline(always)] #[must_use] - pub fn usbrs(&mut self) -> UsbrsW { - UsbrsW::new(self, 7) + pub fn usbrs(&mut self) -> USBRS_W { + USBRS_W::new(self, 7) } } #[doc = "RCU Peripheral 2 Reset Set\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`prset2::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prset2Spec; -impl crate::RegisterSpec for Prset2Spec { +pub struct PRSET2_SPEC; +impl crate::RegisterSpec for PRSET2_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`prset2::W`](W) writer structure"] -impl crate::Writable for Prset2Spec { +impl crate::Writable for PRSET2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PRSET2 to value 0"] -impl crate::Resettable for Prset2Spec { +impl crate::Resettable for PRSET2_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/prstat0.rs b/src/scu_reset/prstat0.rs index 8a8e952f..a5843545 100644 --- a/src/scu_reset/prstat0.rs +++ b/src/scu_reset/prstat0.rs @@ -1,343 +1,343 @@ #[doc = "Register `PRSTAT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "VADC Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vadcrs { +pub enum VADCRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vadcrs) -> Self { + fn from(variant: VADCRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VADCRS` reader - VADC Reset Status"] -pub type VadcrsR = crate::BitReader; -impl VadcrsR { +pub type VADCRS_R = crate::BitReader; +impl VADCRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vadcrs { + pub const fn variant(&self) -> VADCRS_A { match self.bits { - false => Vadcrs::Value1, - true => Vadcrs::Value2, + false => VADCRS_A::VALUE1, + true => VADCRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vadcrs::Value1 + *self == VADCRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vadcrs::Value2 + *self == VADCRS_A::VALUE2 } } #[doc = "CCU40 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu40rs { +pub enum CCU40RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu40rs) -> Self { + fn from(variant: CCU40RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU40RS` reader - CCU40 Reset Status"] -pub type Ccu40rsR = crate::BitReader; -impl Ccu40rsR { +pub type CCU40RS_R = crate::BitReader; +impl CCU40RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu40rs { + pub const fn variant(&self) -> CCU40RS_A { match self.bits { - false => Ccu40rs::Value1, - true => Ccu40rs::Value2, + false => CCU40RS_A::VALUE1, + true => CCU40RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu40rs::Value1 + *self == CCU40RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu40rs::Value2 + *self == CCU40RS_A::VALUE2 } } #[doc = "CCU41 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu41rs { +pub enum CCU41RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu41rs) -> Self { + fn from(variant: CCU41RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU41RS` reader - CCU41 Reset Status"] -pub type Ccu41rsR = crate::BitReader; -impl Ccu41rsR { +pub type CCU41RS_R = crate::BitReader; +impl CCU41RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu41rs { + pub const fn variant(&self) -> CCU41RS_A { match self.bits { - false => Ccu41rs::Value1, - true => Ccu41rs::Value2, + false => CCU41RS_A::VALUE1, + true => CCU41RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu41rs::Value1 + *self == CCU41RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu41rs::Value2 + *self == CCU41RS_A::VALUE2 } } #[doc = "CCU80 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ccu80rs { +pub enum CCU80RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ccu80rs) -> Self { + fn from(variant: CCU80RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CCU80RS` reader - CCU80 Reset Status"] -pub type Ccu80rsR = crate::BitReader; -impl Ccu80rsR { +pub type CCU80RS_R = crate::BitReader; +impl CCU80RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ccu80rs { + pub const fn variant(&self) -> CCU80RS_A { match self.bits { - false => Ccu80rs::Value1, - true => Ccu80rs::Value2, + false => CCU80RS_A::VALUE1, + true => CCU80RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ccu80rs::Value1 + *self == CCU80RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ccu80rs::Value2 + *self == CCU80RS_A::VALUE2 } } #[doc = "POSIF0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Posif0rs { +pub enum POSIF0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Posif0rs) -> Self { + fn from(variant: POSIF0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `POSIF0RS` reader - POSIF0 Reset Status"] -pub type Posif0rsR = crate::BitReader; -impl Posif0rsR { +pub type POSIF0RS_R = crate::BitReader; +impl POSIF0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Posif0rs { + pub const fn variant(&self) -> POSIF0RS_A { match self.bits { - false => Posif0rs::Value1, - true => Posif0rs::Value2, + false => POSIF0RS_A::VALUE1, + true => POSIF0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Posif0rs::Value1 + *self == POSIF0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Posif0rs::Value2 + *self == POSIF0RS_A::VALUE2 } } #[doc = "USIC0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic0rs { +pub enum USIC0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic0rs) -> Self { + fn from(variant: USIC0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC0RS` reader - USIC0 Reset Status"] -pub type Usic0rsR = crate::BitReader; -impl Usic0rsR { +pub type USIC0RS_R = crate::BitReader; +impl USIC0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic0rs { + pub const fn variant(&self) -> USIC0RS_A { match self.bits { - false => Usic0rs::Value1, - true => Usic0rs::Value2, + false => USIC0RS_A::VALUE1, + true => USIC0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic0rs::Value1 + *self == USIC0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic0rs::Value2 + *self == USIC0RS_A::VALUE2 } } #[doc = "ERU1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eru1rs { +pub enum ERU1RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eru1rs) -> Self { + fn from(variant: ERU1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERU1RS` reader - ERU1 Reset Status"] -pub type Eru1rsR = crate::BitReader; -impl Eru1rsR { +pub type ERU1RS_R = crate::BitReader; +impl ERU1RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eru1rs { + pub const fn variant(&self) -> ERU1RS_A { match self.bits { - false => Eru1rs::Value1, - true => Eru1rs::Value2, + false => ERU1RS_A::VALUE1, + true => ERU1RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eru1rs::Value1 + *self == ERU1RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eru1rs::Value2 + *self == ERU1RS_A::VALUE2 } } #[doc = "HRPWM0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hrpwm0rs { +pub enum HRPWM0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hrpwm0rs) -> Self { + fn from(variant: HRPWM0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HRPWM0RS` reader - HRPWM0 Reset Status"] -pub type Hrpwm0rsR = crate::BitReader; -impl Hrpwm0rsR { +pub type HRPWM0RS_R = crate::BitReader; +impl HRPWM0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hrpwm0rs { + pub const fn variant(&self) -> HRPWM0RS_A { match self.bits { - false => Hrpwm0rs::Value1, - true => Hrpwm0rs::Value2, + false => HRPWM0RS_A::VALUE1, + true => HRPWM0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hrpwm0rs::Value1 + *self == HRPWM0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hrpwm0rs::Value2 + *self == HRPWM0RS_A::VALUE2 } } impl R { #[doc = "Bit 0 - VADC Reset Status"] #[inline(always)] - pub fn vadcrs(&self) -> VadcrsR { - VadcrsR::new((self.bits & 1) != 0) + pub fn vadcrs(&self) -> VADCRS_R { + VADCRS_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - CCU40 Reset Status"] #[inline(always)] - pub fn ccu40rs(&self) -> Ccu40rsR { - Ccu40rsR::new(((self.bits >> 2) & 1) != 0) + pub fn ccu40rs(&self) -> CCU40RS_R { + CCU40RS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - CCU41 Reset Status"] #[inline(always)] - pub fn ccu41rs(&self) -> Ccu41rsR { - Ccu41rsR::new(((self.bits >> 3) & 1) != 0) + pub fn ccu41rs(&self) -> CCU41RS_R { + CCU41RS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 7 - CCU80 Reset Status"] #[inline(always)] - pub fn ccu80rs(&self) -> Ccu80rsR { - Ccu80rsR::new(((self.bits >> 7) & 1) != 0) + pub fn ccu80rs(&self) -> CCU80RS_R { + CCU80RS_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - POSIF0 Reset Status"] #[inline(always)] - pub fn posif0rs(&self) -> Posif0rsR { - Posif0rsR::new(((self.bits >> 9) & 1) != 0) + pub fn posif0rs(&self) -> POSIF0RS_R { + POSIF0RS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - USIC0 Reset Status"] #[inline(always)] - pub fn usic0rs(&self) -> Usic0rsR { - Usic0rsR::new(((self.bits >> 11) & 1) != 0) + pub fn usic0rs(&self) -> USIC0RS_R { + USIC0RS_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - ERU1 Reset Status"] #[inline(always)] - pub fn eru1rs(&self) -> Eru1rsR { - Eru1rsR::new(((self.bits >> 16) & 1) != 0) + pub fn eru1rs(&self) -> ERU1RS_R { + ERU1RS_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 23 - HRPWM0 Reset Status"] #[inline(always)] - pub fn hrpwm0rs(&self) -> Hrpwm0rsR { - Hrpwm0rsR::new(((self.bits >> 23) & 1) != 0) + pub fn hrpwm0rs(&self) -> HRPWM0RS_R { + HRPWM0RS_R::new(((self.bits >> 23) & 1) != 0) } } #[doc = "RCU Peripheral 0 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prstat0Spec; -impl crate::RegisterSpec for Prstat0Spec { +pub struct PRSTAT0_SPEC; +impl crate::RegisterSpec for PRSTAT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prstat0::R`](R) reader structure"] -impl crate::Readable for Prstat0Spec {} +impl crate::Readable for PRSTAT0_SPEC {} #[doc = "`reset()` method sets PRSTAT0 to value 0x0081_0a8d"] -impl crate::Resettable for Prstat0Spec { +impl crate::Resettable for PRSTAT0_SPEC { const RESET_VALUE: u32 = 0x0081_0a8d; } diff --git a/src/scu_reset/prstat1.rs b/src/scu_reset/prstat1.rs index 4e078270..0f19d567 100644 --- a/src/scu_reset/prstat1.rs +++ b/src/scu_reset/prstat1.rs @@ -1,220 +1,220 @@ #[doc = "Register `PRSTAT1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "LEDTS Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ledtscu0rs { +pub enum LEDTSCU0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ledtscu0rs) -> Self { + fn from(variant: LEDTSCU0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LEDTSCU0RS` reader - LEDTS Reset Status"] -pub type Ledtscu0rsR = crate::BitReader; -impl Ledtscu0rsR { +pub type LEDTSCU0RS_R = crate::BitReader; +impl LEDTSCU0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ledtscu0rs { + pub const fn variant(&self) -> LEDTSCU0RS_A { match self.bits { - false => Ledtscu0rs::Value1, - true => Ledtscu0rs::Value2, + false => LEDTSCU0RS_A::VALUE1, + true => LEDTSCU0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ledtscu0rs::Value1 + *self == LEDTSCU0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ledtscu0rs::Value2 + *self == LEDTSCU0RS_A::VALUE2 } } #[doc = "MultiCAN Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mcan0rs { +pub enum MCAN0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mcan0rs) -> Self { + fn from(variant: MCAN0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCAN0RS` reader - MultiCAN Reset Status"] -pub type Mcan0rsR = crate::BitReader; -impl Mcan0rsR { +pub type MCAN0RS_R = crate::BitReader; +impl MCAN0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mcan0rs { + pub const fn variant(&self) -> MCAN0RS_A { match self.bits { - false => Mcan0rs::Value1, - true => Mcan0rs::Value2, + false => MCAN0RS_A::VALUE1, + true => MCAN0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mcan0rs::Value1 + *self == MCAN0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mcan0rs::Value2 + *self == MCAN0RS_A::VALUE2 } } #[doc = "DAC Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dacrs { +pub enum DACRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dacrs) -> Self { + fn from(variant: DACRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DACRS` reader - DAC Reset Status"] -pub type DacrsR = crate::BitReader; -impl DacrsR { +pub type DACRS_R = crate::BitReader; +impl DACRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dacrs { + pub const fn variant(&self) -> DACRS_A { match self.bits { - false => Dacrs::Value1, - true => Dacrs::Value2, + false => DACRS_A::VALUE1, + true => DACRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dacrs::Value1 + *self == DACRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dacrs::Value2 + *self == DACRS_A::VALUE2 } } #[doc = "USIC1 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usic1rs { +pub enum USIC1RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usic1rs) -> Self { + fn from(variant: USIC1RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USIC1RS` reader - USIC1 Reset Status"] -pub type Usic1rsR = crate::BitReader; -impl Usic1rsR { +pub type USIC1RS_R = crate::BitReader; +impl USIC1RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usic1rs { + pub const fn variant(&self) -> USIC1RS_A { match self.bits { - false => Usic1rs::Value1, - true => Usic1rs::Value2, + false => USIC1RS_A::VALUE1, + true => USIC1RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usic1rs::Value1 + *self == USIC1RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usic1rs::Value2 + *self == USIC1RS_A::VALUE2 } } #[doc = "PORTS Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pportsrs { +pub enum PPORTSRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pportsrs) -> Self { + fn from(variant: PPORTSRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPORTSRS` reader - PORTS Reset Status"] -pub type PportsrsR = crate::BitReader; -impl PportsrsR { +pub type PPORTSRS_R = crate::BitReader; +impl PPORTSRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pportsrs { + pub const fn variant(&self) -> PPORTSRS_A { match self.bits { - false => Pportsrs::Value1, - true => Pportsrs::Value2, + false => PPORTSRS_A::VALUE1, + true => PPORTSRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pportsrs::Value1 + *self == PPORTSRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pportsrs::Value2 + *self == PPORTSRS_A::VALUE2 } } impl R { #[doc = "Bit 3 - LEDTS Reset Status"] #[inline(always)] - pub fn ledtscu0rs(&self) -> Ledtscu0rsR { - Ledtscu0rsR::new(((self.bits >> 3) & 1) != 0) + pub fn ledtscu0rs(&self) -> LEDTSCU0RS_R { + LEDTSCU0RS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - MultiCAN Reset Status"] #[inline(always)] - pub fn mcan0rs(&self) -> Mcan0rsR { - Mcan0rsR::new(((self.bits >> 4) & 1) != 0) + pub fn mcan0rs(&self) -> MCAN0RS_R { + MCAN0RS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - DAC Reset Status"] #[inline(always)] - pub fn dacrs(&self) -> DacrsR { - DacrsR::new(((self.bits >> 5) & 1) != 0) + pub fn dacrs(&self) -> DACRS_R { + DACRS_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - USIC1 Reset Status"] #[inline(always)] - pub fn usic1rs(&self) -> Usic1rsR { - Usic1rsR::new(((self.bits >> 7) & 1) != 0) + pub fn usic1rs(&self) -> USIC1RS_R { + USIC1RS_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - PORTS Reset Status"] #[inline(always)] - pub fn pportsrs(&self) -> PportsrsR { - PportsrsR::new(((self.bits >> 9) & 1) != 0) + pub fn pportsrs(&self) -> PPORTSRS_R { + PPORTSRS_R::new(((self.bits >> 9) & 1) != 0) } } #[doc = "RCU Peripheral 1 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prstat1Spec; -impl crate::RegisterSpec for Prstat1Spec { +pub struct PRSTAT1_SPEC; +impl crate::RegisterSpec for PRSTAT1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prstat1::R`](R) reader structure"] -impl crate::Readable for Prstat1Spec {} +impl crate::Readable for PRSTAT1_SPEC {} #[doc = "`reset()` method sets PRSTAT1 to value 0xb8"] -impl crate::Resettable for Prstat1Spec { +impl crate::Resettable for PRSTAT1_SPEC { const RESET_VALUE: u32 = 0xb8; } diff --git a/src/scu_reset/prstat2.rs b/src/scu_reset/prstat2.rs index 67e40625..c7f47a47 100644 --- a/src/scu_reset/prstat2.rs +++ b/src/scu_reset/prstat2.rs @@ -1,179 +1,179 @@ #[doc = "Register `PRSTAT2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "WDT Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wdtrs { +pub enum WDTRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wdtrs) -> Self { + fn from(variant: WDTRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WDTRS` reader - WDT Reset Status"] -pub type WdtrsR = crate::BitReader; -impl WdtrsR { +pub type WDTRS_R = crate::BitReader; +impl WDTRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wdtrs { + pub const fn variant(&self) -> WDTRS_A { match self.bits { - false => Wdtrs::Value1, - true => Wdtrs::Value2, + false => WDTRS_A::VALUE1, + true => WDTRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wdtrs::Value1 + *self == WDTRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wdtrs::Value2 + *self == WDTRS_A::VALUE2 } } #[doc = "DMA0 Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dma0rs { +pub enum DMA0RS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dma0rs) -> Self { + fn from(variant: DMA0RS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMA0RS` reader - DMA0 Reset Status"] -pub type Dma0rsR = crate::BitReader; -impl Dma0rsR { +pub type DMA0RS_R = crate::BitReader; +impl DMA0RS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dma0rs { + pub const fn variant(&self) -> DMA0RS_A { match self.bits { - false => Dma0rs::Value1, - true => Dma0rs::Value2, + false => DMA0RS_A::VALUE1, + true => DMA0RS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dma0rs::Value1 + *self == DMA0RS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dma0rs::Value2 + *self == DMA0RS_A::VALUE2 } } #[doc = "FCE Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcers { +pub enum FCERS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcers) -> Self { + fn from(variant: FCERS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCERS` reader - FCE Reset Status"] -pub type FcersR = crate::BitReader; -impl FcersR { +pub type FCERS_R = crate::BitReader; +impl FCERS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcers { + pub const fn variant(&self) -> FCERS_A { match self.bits { - false => Fcers::Value1, - true => Fcers::Value2, + false => FCERS_A::VALUE1, + true => FCERS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcers::Value1 + *self == FCERS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcers::Value2 + *self == FCERS_A::VALUE2 } } #[doc = "USB Reset Status\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Usbrs { +pub enum USBRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Usbrs) -> Self { + fn from(variant: USBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `USBRS` reader - USB Reset Status"] -pub type UsbrsR = crate::BitReader; -impl UsbrsR { +pub type USBRS_R = crate::BitReader; +impl USBRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Usbrs { + pub const fn variant(&self) -> USBRS_A { match self.bits { - false => Usbrs::Value1, - true => Usbrs::Value2, + false => USBRS_A::VALUE1, + true => USBRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Usbrs::Value1 + *self == USBRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Usbrs::Value2 + *self == USBRS_A::VALUE2 } } impl R { #[doc = "Bit 1 - WDT Reset Status"] #[inline(always)] - pub fn wdtrs(&self) -> WdtrsR { - WdtrsR::new(((self.bits >> 1) & 1) != 0) + pub fn wdtrs(&self) -> WDTRS_R { + WDTRS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - DMA0 Reset Status"] #[inline(always)] - pub fn dma0rs(&self) -> Dma0rsR { - Dma0rsR::new(((self.bits >> 4) & 1) != 0) + pub fn dma0rs(&self) -> DMA0RS_R { + DMA0RS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - FCE Reset Status"] #[inline(always)] - pub fn fcers(&self) -> FcersR { - FcersR::new(((self.bits >> 6) & 1) != 0) + pub fn fcers(&self) -> FCERS_R { + FCERS_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - USB Reset Status"] #[inline(always)] - pub fn usbrs(&self) -> UsbrsR { - UsbrsR::new(((self.bits >> 7) & 1) != 0) + pub fn usbrs(&self) -> USBRS_R { + USBRS_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "RCU Peripheral 2 Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`prstat2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Prstat2Spec; -impl crate::RegisterSpec for Prstat2Spec { +pub struct PRSTAT2_SPEC; +impl crate::RegisterSpec for PRSTAT2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`prstat2::R`](R) reader structure"] -impl crate::Readable for Prstat2Spec {} +impl crate::Readable for PRSTAT2_SPEC {} #[doc = "`reset()` method sets PRSTAT2 to value 0xd2"] -impl crate::Resettable for Prstat2Spec { +impl crate::Resettable for PRSTAT2_SPEC { const RESET_VALUE: u32 = 0xd2; } diff --git a/src/scu_reset/rstclr.rs b/src/scu_reset/rstclr.rs index 850efbd9..9341951c 100644 --- a/src/scu_reset/rstclr.rs +++ b/src/scu_reset/rstclr.rs @@ -1,167 +1,167 @@ #[doc = "Register `RSTCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsclr { +pub enum RSCLR_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clears field RSTSTAT.RSTSTAT"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsclr) -> Self { + fn from(variant: RSCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSCLR` writer - Clear Reset Status"] -pub type RsclrW<'a, REG> = crate::BitWriter<'a, REG, Rsclr>; -impl<'a, REG> RsclrW<'a, REG> +pub type RSCLR_W<'a, REG> = crate::BitWriter<'a, REG, RSCLR_A>; +impl<'a, REG> RSCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsclr::Value1) + self.variant(RSCLR_A::VALUE1) } #[doc = "Clears field RSTSTAT.RSTSTAT"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsclr::Value2) + self.variant(RSCLR_A::VALUE2) } } #[doc = "Clear Hibernate Wake-up Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibwk { +pub enum HIBWK_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibwk) -> Self { + fn from(variant: HIBWK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBWK` writer - Clear Hibernate Wake-up Reset Status"] -pub type HibwkW<'a, REG> = crate::BitWriter<'a, REG, Hibwk>; -impl<'a, REG> HibwkW<'a, REG> +pub type HIBWK_W<'a, REG> = crate::BitWriter<'a, REG, HIBWK_A>; +impl<'a, REG> HIBWK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibwk::Value1) + self.variant(HIBWK_A::VALUE1) } #[doc = "De-assert reset status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibwk::Value2) + self.variant(HIBWK_A::VALUE2) } } #[doc = "Clear Hibernate Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibrs { +pub enum HIBRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: De-assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibrs) -> Self { + fn from(variant: HIBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBRS` writer - Clear Hibernate Reset"] -pub type HibrsW<'a, REG> = crate::BitWriter<'a, REG, Hibrs>; -impl<'a, REG> HibrsW<'a, REG> +pub type HIBRS_W<'a, REG> = crate::BitWriter<'a, REG, HIBRS_A>; +impl<'a, REG> HIBRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibrs::Value1) + self.variant(HIBRS_A::VALUE1) } #[doc = "De-assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibrs::Value2) + self.variant(HIBRS_A::VALUE2) } } #[doc = "Enable Lockup Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lcken { +pub enum LCKEN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Disable reset when Lockup gets asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lcken) -> Self { + fn from(variant: LCKEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LCKEN` writer - Enable Lockup Reset"] -pub type LckenW<'a, REG> = crate::BitWriter<'a, REG, Lcken>; -impl<'a, REG> LckenW<'a, REG> +pub type LCKEN_W<'a, REG> = crate::BitWriter<'a, REG, LCKEN_A>; +impl<'a, REG> LCKEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lcken::Value1) + self.variant(LCKEN_A::VALUE1) } #[doc = "Disable reset when Lockup gets asserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lcken::Value2) + self.variant(LCKEN_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Reset Status"] #[inline(always)] #[must_use] - pub fn rsclr(&mut self) -> RsclrW { - RsclrW::new(self, 0) + pub fn rsclr(&mut self) -> RSCLR_W { + RSCLR_W::new(self, 0) } #[doc = "Bit 8 - Clear Hibernate Wake-up Reset Status"] #[inline(always)] #[must_use] - pub fn hibwk(&mut self) -> HibwkW { - HibwkW::new(self, 8) + pub fn hibwk(&mut self) -> HIBWK_W { + HIBWK_W::new(self, 8) } #[doc = "Bit 9 - Clear Hibernate Reset"] #[inline(always)] #[must_use] - pub fn hibrs(&mut self) -> HibrsW { - HibrsW::new(self, 9) + pub fn hibrs(&mut self) -> HIBRS_W { + HIBRS_W::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] #[must_use] - pub fn lcken(&mut self) -> LckenW { - LckenW::new(self, 10) + pub fn lcken(&mut self) -> LCKEN_W { + LCKEN_W::new(self, 10) } } #[doc = "RCU Reset Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RstclrSpec; -impl crate::RegisterSpec for RstclrSpec { +pub struct RSTCLR_SPEC; +impl crate::RegisterSpec for RSTCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rstclr::W`](W) writer structure"] -impl crate::Writable for RstclrSpec { +impl crate::Writable for RSTCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTCLR to value 0"] -impl crate::Resettable for RstclrSpec { +impl crate::Resettable for RSTCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/rstset.rs b/src/scu_reset/rstset.rs index fa009026..fb9ad5d4 100644 --- a/src/scu_reset/rstset.rs +++ b/src/scu_reset/rstset.rs @@ -1,130 +1,130 @@ #[doc = "Register `RSTSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Set Hibernate Wake-up Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibwk { +pub enum HIBWK_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset status bit"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibwk) -> Self { + fn from(variant: HIBWK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBWK` writer - Set Hibernate Wake-up Reset Status"] -pub type HibwkW<'a, REG> = crate::BitWriter<'a, REG, Hibwk>; -impl<'a, REG> HibwkW<'a, REG> +pub type HIBWK_W<'a, REG> = crate::BitWriter<'a, REG, HIBWK_A>; +impl<'a, REG> HIBWK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibwk::Value1) + self.variant(HIBWK_A::VALUE1) } #[doc = "Assert reset status bit"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibwk::Value2) + self.variant(HIBWK_A::VALUE2) } } #[doc = "Set Hibernate Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibrs { +pub enum HIBRS_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Assert reset"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibrs) -> Self { + fn from(variant: HIBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBRS` writer - Set Hibernate Reset"] -pub type HibrsW<'a, REG> = crate::BitWriter<'a, REG, Hibrs>; -impl<'a, REG> HibrsW<'a, REG> +pub type HIBRS_W<'a, REG> = crate::BitWriter<'a, REG, HIBRS_A>; +impl<'a, REG> HIBRS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hibrs::Value1) + self.variant(HIBRS_A::VALUE1) } #[doc = "Assert reset"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hibrs::Value2) + self.variant(HIBRS_A::VALUE2) } } #[doc = "Enable Lockup Reset\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lcken { +pub enum LCKEN_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Enable reset when Lockup gets asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lcken) -> Self { + fn from(variant: LCKEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LCKEN` writer - Enable Lockup Reset"] -pub type LckenW<'a, REG> = crate::BitWriter<'a, REG, Lcken>; -impl<'a, REG> LckenW<'a, REG> +pub type LCKEN_W<'a, REG> = crate::BitWriter<'a, REG, LCKEN_A>; +impl<'a, REG> LCKEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lcken::Value1) + self.variant(LCKEN_A::VALUE1) } #[doc = "Enable reset when Lockup gets asserted"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lcken::Value2) + self.variant(LCKEN_A::VALUE2) } } impl W { #[doc = "Bit 8 - Set Hibernate Wake-up Reset Status"] #[inline(always)] #[must_use] - pub fn hibwk(&mut self) -> HibwkW { - HibwkW::new(self, 8) + pub fn hibwk(&mut self) -> HIBWK_W { + HIBWK_W::new(self, 8) } #[doc = "Bit 9 - Set Hibernate Reset"] #[inline(always)] #[must_use] - pub fn hibrs(&mut self) -> HibrsW { - HibrsW::new(self, 9) + pub fn hibrs(&mut self) -> HIBRS_W { + HIBRS_W::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] #[must_use] - pub fn lcken(&mut self) -> LckenW { - LckenW::new(self, 10) + pub fn lcken(&mut self) -> LCKEN_W { + LCKEN_W::new(self, 10) } } #[doc = "RCU Reset Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rstset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RstsetSpec; -impl crate::RegisterSpec for RstsetSpec { +pub struct RSTSET_SPEC; +impl crate::RegisterSpec for RSTSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`rstset::W`](W) writer structure"] -impl crate::Writable for RstsetSpec { +impl crate::Writable for RSTSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RSTSET to value 0"] -impl crate::Resettable for RstsetSpec { +impl crate::Resettable for RSTSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_reset/rststat.rs b/src/scu_reset/rststat.rs index 6ae378e9..2d0b060e 100644 --- a/src/scu_reset/rststat.rs +++ b/src/scu_reset/rststat.rs @@ -1,225 +1,225 @@ #[doc = "Register `RSTSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Reset Status Information\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rststat { +pub enum RSTSTAT_A { #[doc = "1: PORST reset"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: SWD reset"] - Value2 = 2, + VALUE2 = 2, #[doc = "4: PV reset"] - Value3 = 4, + VALUE3 = 4, #[doc = "8: CPU system reset"] - Value4 = 8, + VALUE4 = 8, #[doc = "16: CPU lockup reset"] - Value5 = 16, + VALUE5 = 16, #[doc = "32: WDT reset"] - Value6 = 32, + VALUE6 = 32, #[doc = "128: Parity Error reset"] - Value8 = 128, + VALUE8 = 128, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rststat) -> Self { + fn from(variant: RSTSTAT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rststat { +impl crate::FieldSpec for RSTSTAT_A { type Ux = u8; } -impl crate::IsEnum for Rststat {} +impl crate::IsEnum for RSTSTAT_A {} #[doc = "Field `RSTSTAT` reader - Reset Status Information"] -pub type RststatR = crate::FieldReader; -impl RststatR { +pub type RSTSTAT_R = crate::FieldReader; +impl RSTSTAT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(Rststat::Value1), - 2 => Some(Rststat::Value2), - 4 => Some(Rststat::Value3), - 8 => Some(Rststat::Value4), - 16 => Some(Rststat::Value5), - 32 => Some(Rststat::Value6), - 128 => Some(Rststat::Value8), + 1 => Some(RSTSTAT_A::VALUE1), + 2 => Some(RSTSTAT_A::VALUE2), + 4 => Some(RSTSTAT_A::VALUE3), + 8 => Some(RSTSTAT_A::VALUE4), + 16 => Some(RSTSTAT_A::VALUE5), + 32 => Some(RSTSTAT_A::VALUE6), + 128 => Some(RSTSTAT_A::VALUE8), _ => None, } } #[doc = "PORST reset"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rststat::Value1 + *self == RSTSTAT_A::VALUE1 } #[doc = "SWD reset"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rststat::Value2 + *self == RSTSTAT_A::VALUE2 } #[doc = "PV reset"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rststat::Value3 + *self == RSTSTAT_A::VALUE3 } #[doc = "CPU system reset"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rststat::Value4 + *self == RSTSTAT_A::VALUE4 } #[doc = "CPU lockup reset"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Rststat::Value5 + *self == RSTSTAT_A::VALUE5 } #[doc = "WDT reset"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Rststat::Value6 + *self == RSTSTAT_A::VALUE6 } #[doc = "Parity Error reset"] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Rststat::Value8 + *self == RSTSTAT_A::VALUE8 } } #[doc = "Hibernate Wake-up Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibwk { +pub enum HIBWK_A { #[doc = "0: No Wake-up"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wake-up event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibwk) -> Self { + fn from(variant: HIBWK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBWK` reader - Hibernate Wake-up Status"] -pub type HibwkR = crate::BitReader; -impl HibwkR { +pub type HIBWK_R = crate::BitReader; +impl HIBWK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hibwk { + pub const fn variant(&self) -> HIBWK_A { match self.bits { - false => Hibwk::Value1, - true => Hibwk::Value2, + false => HIBWK_A::VALUE1, + true => HIBWK_A::VALUE2, } } #[doc = "No Wake-up"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibwk::Value1 + *self == HIBWK_A::VALUE1 } #[doc = "Wake-up event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibwk::Value2 + *self == HIBWK_A::VALUE2 } } #[doc = "Hibernate Reset Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hibrs { +pub enum HIBRS_A { #[doc = "0: Reset de-asserted"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset asserted"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hibrs) -> Self { + fn from(variant: HIBRS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HIBRS` reader - Hibernate Reset Status"] -pub type HibrsR = crate::BitReader; -impl HibrsR { +pub type HIBRS_R = crate::BitReader; +impl HIBRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hibrs { + pub const fn variant(&self) -> HIBRS_A { match self.bits { - false => Hibrs::Value1, - true => Hibrs::Value2, + false => HIBRS_A::VALUE1, + true => HIBRS_A::VALUE2, } } #[doc = "Reset de-asserted"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hibrs::Value1 + *self == HIBRS_A::VALUE1 } #[doc = "Reset asserted"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hibrs::Value2 + *self == HIBRS_A::VALUE2 } } #[doc = "Enable Lockup Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lcken { +pub enum LCKEN_A { #[doc = "0: Reset by Lockup disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Reset by Lockup enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lcken) -> Self { + fn from(variant: LCKEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LCKEN` reader - Enable Lockup Status"] -pub type LckenR = crate::BitReader; -impl LckenR { +pub type LCKEN_R = crate::BitReader; +impl LCKEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lcken { + pub const fn variant(&self) -> LCKEN_A { match self.bits { - false => Lcken::Value1, - true => Lcken::Value2, + false => LCKEN_A::VALUE1, + true => LCKEN_A::VALUE2, } } #[doc = "Reset by Lockup disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lcken::Value1 + *self == LCKEN_A::VALUE1 } #[doc = "Reset by Lockup enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lcken::Value2 + *self == LCKEN_A::VALUE2 } } impl R { #[doc = "Bits 0:7 - Reset Status Information"] #[inline(always)] - pub fn rststat(&self) -> RststatR { - RststatR::new((self.bits & 0xff) as u8) + pub fn rststat(&self) -> RSTSTAT_R { + RSTSTAT_R::new((self.bits & 0xff) as u8) } #[doc = "Bit 8 - Hibernate Wake-up Status"] #[inline(always)] - pub fn hibwk(&self) -> HibwkR { - HibwkR::new(((self.bits >> 8) & 1) != 0) + pub fn hibwk(&self) -> HIBWK_R { + HIBWK_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Hibernate Reset Status"] #[inline(always)] - pub fn hibrs(&self) -> HibrsR { - HibrsR::new(((self.bits >> 9) & 1) != 0) + pub fn hibrs(&self) -> HIBRS_R { + HIBRS_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Enable Lockup Status"] #[inline(always)] - pub fn lcken(&self) -> LckenR { - LckenR::new(((self.bits >> 10) & 1) != 0) + pub fn lcken(&self) -> LCKEN_R { + LCKEN_R::new(((self.bits >> 10) & 1) != 0) } } #[doc = "RCU Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rststat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RststatSpec; -impl crate::RegisterSpec for RststatSpec { +pub struct RSTSTAT_SPEC; +impl crate::RegisterSpec for RSTSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rststat::R`](R) reader structure"] -impl crate::Readable for RststatSpec {} +impl crate::Readable for RSTSTAT_SPEC {} #[doc = "`reset()` method sets RSTSTAT to value 0"] -impl crate::Resettable for RststatSpec { +impl crate::Resettable for RSTSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap.rs b/src/scu_trap.rs index b3c3761f..aec65ec1 100644 --- a/src/scu_trap.rs +++ b/src/scu_trap.rs @@ -1,66 +1,61 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - trapstat: Trapstat, - trapraw: Trapraw, - trapdis: Trapdis, - trapclr: Trapclr, - trapset: Trapset, + trapstat: TRAPSTAT, + trapraw: TRAPRAW, + trapdis: TRAPDIS, + trapclr: TRAPCLR, + trapset: TRAPSET, } impl RegisterBlock { #[doc = "0x00 - Trap Status Register"] #[inline(always)] - pub const fn trapstat(&self) -> &Trapstat { + pub const fn trapstat(&self) -> &TRAPSTAT { &self.trapstat } #[doc = "0x04 - Trap Raw Status Register"] #[inline(always)] - pub const fn trapraw(&self) -> &Trapraw { + pub const fn trapraw(&self) -> &TRAPRAW { &self.trapraw } #[doc = "0x08 - Trap Disable Register"] #[inline(always)] - pub const fn trapdis(&self) -> &Trapdis { + pub const fn trapdis(&self) -> &TRAPDIS { &self.trapdis } #[doc = "0x0c - Trap Clear Register"] #[inline(always)] - pub const fn trapclr(&self) -> &Trapclr { + pub const fn trapclr(&self) -> &TRAPCLR { &self.trapclr } #[doc = "0x10 - Trap Set Register"] #[inline(always)] - pub const fn trapset(&self) -> &Trapset { + pub const fn trapset(&self) -> &TRAPSET { &self.trapset } } #[doc = "TRAPSTAT (r) register accessor: Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapstat`] module"] -#[doc(alias = "TRAPSTAT")] -pub type Trapstat = crate::Reg; +pub type TRAPSTAT = crate::Reg; #[doc = "Trap Status Register"] pub mod trapstat; #[doc = "TRAPRAW (r) register accessor: Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapraw`] module"] -#[doc(alias = "TRAPRAW")] -pub type Trapraw = crate::Reg; +pub type TRAPRAW = crate::Reg; #[doc = "Trap Raw Status Register"] pub mod trapraw; #[doc = "TRAPDIS (rw) register accessor: Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapdis`] module"] -#[doc(alias = "TRAPDIS")] -pub type Trapdis = crate::Reg; +pub type TRAPDIS = crate::Reg; #[doc = "Trap Disable Register"] pub mod trapdis; #[doc = "TRAPCLR (w) register accessor: Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapclr`] module"] -#[doc(alias = "TRAPCLR")] -pub type Trapclr = crate::Reg; +pub type TRAPCLR = crate::Reg; #[doc = "Trap Clear Register"] pub mod trapclr; #[doc = "TRAPSET (w) register accessor: Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trapset`] module"] -#[doc(alias = "TRAPSET")] -pub type Trapset = crate::Reg; +pub type TRAPSET = crate::Reg; #[doc = "Trap Set Register"] pub mod trapset; diff --git a/src/scu_trap/trapclr.rs b/src/scu_trap/trapclr.rs index 55c0fccf..7c6a7c9d 100644 --- a/src/scu_trap/trapclr.rs +++ b/src/scu_trap/trapclr.rs @@ -1,389 +1,389 @@ #[doc = "Register `TRAPCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System OSC WDT Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Soscwdgt { +pub enum SOSCWDGT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Soscwdgt) -> Self { + fn from(variant: SOSCWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` writer - System OSC WDT Trap Clear"] -pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; -impl<'a, REG> SoscwdgtW<'a, REG> +pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_A>; +impl<'a, REG> SOSCWDGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value1) + self.variant(SOSCWDGT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value2) + self.variant(SOSCWDGT_A::VALUE2) } } #[doc = "System VCO Lock Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Svcolckt { +pub enum SVCOLCKT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Svcolckt) -> Self { + fn from(variant: SVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Clear"] -pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; -impl<'a, REG> SvcolcktW<'a, REG> +pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_A>; +impl<'a, REG> SVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value1) + self.variant(SVCOLCKT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value2) + self.variant(SVCOLCKT_A::VALUE2) } } #[doc = "USB VCO Lock Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Uvcolckt { +pub enum UVCOLCKT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Uvcolckt) -> Self { + fn from(variant: UVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Clear"] -pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; -impl<'a, REG> UvcolcktW<'a, REG> +pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_A>; +impl<'a, REG> UVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value1) + self.variant(UVCOLCKT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value2) + self.variant(UVCOLCKT_A::VALUE2) } } #[doc = "Parity Error Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pet { +pub enum PET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pet) -> Self { + fn from(variant: PET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` writer - Parity Error Trap Clear"] -pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; -impl<'a, REG> PetW<'a, REG> +pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_A>; +impl<'a, REG> PET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pet::Value1) + self.variant(PET_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pet::Value2) + self.variant(PET_A::VALUE2) } } #[doc = "Brown Out Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brwnt { +pub enum BRWNT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brwnt) -> Self { + fn from(variant: BRWNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Clear"] -pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; -impl<'a, REG> BrwntW<'a, REG> +pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_A>; +impl<'a, REG> BRWNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brwnt::Value1) + self.variant(BRWNT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brwnt::Value2) + self.variant(BRWNT_A::VALUE2) } } #[doc = "OSC_ULP WDG Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdgt { +pub enum ULPWDGT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdgt) -> Self { + fn from(variant: ULPWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGT` writer - OSC_ULP WDG Trap Clear"] -pub type UlpwdgtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgt>; -impl<'a, REG> UlpwdgtW<'a, REG> +pub type ULPWDGT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGT_A>; +impl<'a, REG> ULPWDGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdgt::Value1) + self.variant(ULPWDGT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdgt::Value2) + self.variant(ULPWDGT_A::VALUE2) } } #[doc = "Peripheral Bridge 0 Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr0t { +pub enum BWERR0T_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr0t) -> Self { + fn from(variant: BWERR0T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Clear"] -pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; -impl<'a, REG> Bwerr0tW<'a, REG> +pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_A>; +impl<'a, REG> BWERR0T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value1) + self.variant(BWERR0T_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value2) + self.variant(BWERR0T_A::VALUE2) } } #[doc = "Peripheral Bridge 1 Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr1t { +pub enum BWERR1T_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr1t) -> Self { + fn from(variant: BWERR1T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Clear"] -pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; -impl<'a, REG> Bwerr1tW<'a, REG> +pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_A>; +impl<'a, REG> BWERR1T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value1) + self.variant(BWERR1T_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value2) + self.variant(BWERR1T_A::VALUE2) } } #[doc = "Die Temperature Too High Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Temphit { +pub enum TEMPHIT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Temphit) -> Self { + fn from(variant: TEMPHIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPHIT` writer - Die Temperature Too High Trap Clear"] -pub type TemphitW<'a, REG> = crate::BitWriter<'a, REG, Temphit>; -impl<'a, REG> TemphitW<'a, REG> +pub type TEMPHIT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPHIT_A>; +impl<'a, REG> TEMPHIT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Temphit::Value1) + self.variant(TEMPHIT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Temphit::Value2) + self.variant(TEMPHIT_A::VALUE2) } } #[doc = "Die Temperature Too Low Trap Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Templot { +pub enum TEMPLOT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Templot) -> Self { + fn from(variant: TEMPLOT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPLOT` writer - Die Temperature Too Low Trap Clear"] -pub type TemplotW<'a, REG> = crate::BitWriter<'a, REG, Templot>; -impl<'a, REG> TemplotW<'a, REG> +pub type TEMPLOT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPLOT_A>; +impl<'a, REG> TEMPLOT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Templot::Value1) + self.variant(TEMPLOT_A::VALUE1) } #[doc = "Clear trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Templot::Value2) + self.variant(TEMPLOT_A::VALUE2) } } impl W { #[doc = "Bit 0 - System OSC WDT Trap Clear"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SoscwdgtW { - SoscwdgtW::new(self, 0) + pub fn soscwdgt(&mut self) -> SOSCWDGT_W { + SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Clear"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SvcolcktW { - SvcolcktW::new(self, 2) + pub fn svcolckt(&mut self) -> SVCOLCKT_W { + SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Clear"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UvcolcktW { - UvcolcktW::new(self, 3) + pub fn uvcolckt(&mut self) -> UVCOLCKT_W { + UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Clear"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PetW { - PetW::new(self, 4) + pub fn pet(&mut self) -> PET_W { + PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Clear"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BrwntW { - BrwntW::new(self, 5) + pub fn brwnt(&mut self) -> BRWNT_W { + BRWNT_W::new(self, 5) } #[doc = "Bit 6 - OSC_ULP WDG Trap Clear"] #[inline(always)] #[must_use] - pub fn ulpwdgt(&mut self) -> UlpwdgtW { - UlpwdgtW::new(self, 6) + pub fn ulpwdgt(&mut self) -> ULPWDGT_W { + ULPWDGT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Clear"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> Bwerr0tW { - Bwerr0tW::new(self, 7) + pub fn bwerr0t(&mut self) -> BWERR0T_W { + BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Clear"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> Bwerr1tW { - Bwerr1tW::new(self, 8) + pub fn bwerr1t(&mut self) -> BWERR1T_W { + BWERR1T_W::new(self, 8) } #[doc = "Bit 12 - Die Temperature Too High Trap Clear"] #[inline(always)] #[must_use] - pub fn temphit(&mut self) -> TemphitW { - TemphitW::new(self, 12) + pub fn temphit(&mut self) -> TEMPHIT_W { + TEMPHIT_W::new(self, 12) } #[doc = "Bit 13 - Die Temperature Too Low Trap Clear"] #[inline(always)] #[must_use] - pub fn templot(&mut self) -> TemplotW { - TemplotW::new(self, 13) + pub fn templot(&mut self) -> TEMPLOT_W { + TEMPLOT_W::new(self, 13) } } #[doc = "Trap Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrapclrSpec; -impl crate::RegisterSpec for TrapclrSpec { +pub struct TRAPCLR_SPEC; +impl crate::RegisterSpec for TRAPCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trapclr::W`](W) writer structure"] -impl crate::Writable for TrapclrSpec { +impl crate::Writable for TRAPCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPCLR to value 0"] -impl crate::Resettable for TrapclrSpec { +impl crate::Resettable for TRAPCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapdis.rs b/src/scu_trap/trapdis.rs index f97860b7..9a106da9 100644 --- a/src/scu_trap/trapdis.rs +++ b/src/scu_trap/trapdis.rs @@ -1,665 +1,665 @@ #[doc = "Register `TRAPDIS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRAPDIS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System OSC WDT Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Soscwdgt { +pub enum SOSCWDGT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Soscwdgt) -> Self { + fn from(variant: SOSCWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` reader - System OSC WDT Trap Disable"] -pub type SoscwdgtR = crate::BitReader; -impl SoscwdgtR { +pub type SOSCWDGT_R = crate::BitReader; +impl SOSCWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Soscwdgt { + pub const fn variant(&self) -> SOSCWDGT_A { match self.bits { - false => Soscwdgt::Value1, - true => Soscwdgt::Value2, + false => SOSCWDGT_A::VALUE1, + true => SOSCWDGT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Soscwdgt::Value1 + *self == SOSCWDGT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Soscwdgt::Value2 + *self == SOSCWDGT_A::VALUE2 } } #[doc = "Field `SOSCWDGT` writer - System OSC WDT Trap Disable"] -pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; -impl<'a, REG> SoscwdgtW<'a, REG> +pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_A>; +impl<'a, REG> SOSCWDGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value1) + self.variant(SOSCWDGT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value2) + self.variant(SOSCWDGT_A::VALUE2) } } #[doc = "System VCO Lock Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Svcolckt { +pub enum SVCOLCKT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Svcolckt) -> Self { + fn from(variant: SVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Disable"] -pub type SvcolcktR = crate::BitReader; -impl SvcolcktR { +pub type SVCOLCKT_R = crate::BitReader; +impl SVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Svcolckt { + pub const fn variant(&self) -> SVCOLCKT_A { match self.bits { - false => Svcolckt::Value1, - true => Svcolckt::Value2, + false => SVCOLCKT_A::VALUE1, + true => SVCOLCKT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svcolckt::Value1 + *self == SVCOLCKT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svcolckt::Value2 + *self == SVCOLCKT_A::VALUE2 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Disable"] -pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; -impl<'a, REG> SvcolcktW<'a, REG> +pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_A>; +impl<'a, REG> SVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value1) + self.variant(SVCOLCKT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value2) + self.variant(SVCOLCKT_A::VALUE2) } } #[doc = "USB VCO Lock Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Uvcolckt { +pub enum UVCOLCKT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Uvcolckt) -> Self { + fn from(variant: UVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Disable"] -pub type UvcolcktR = crate::BitReader; -impl UvcolcktR { +pub type UVCOLCKT_R = crate::BitReader; +impl UVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Uvcolckt { + pub const fn variant(&self) -> UVCOLCKT_A { match self.bits { - false => Uvcolckt::Value1, - true => Uvcolckt::Value2, + false => UVCOLCKT_A::VALUE1, + true => UVCOLCKT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Uvcolckt::Value1 + *self == UVCOLCKT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Uvcolckt::Value2 + *self == UVCOLCKT_A::VALUE2 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Disable"] -pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; -impl<'a, REG> UvcolcktW<'a, REG> +pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_A>; +impl<'a, REG> UVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value1) + self.variant(UVCOLCKT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value2) + self.variant(UVCOLCKT_A::VALUE2) } } #[doc = "Parity Error Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pet { +pub enum PET_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pet) -> Self { + fn from(variant: PET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` reader - Parity Error Trap Disable"] -pub type PetR = crate::BitReader; -impl PetR { +pub type PET_R = crate::BitReader; +impl PET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pet { + pub const fn variant(&self) -> PET_A { match self.bits { - false => Pet::Value1, - true => Pet::Value2, + false => PET_A::VALUE1, + true => PET_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pet::Value1 + *self == PET_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pet::Value2 + *self == PET_A::VALUE2 } } #[doc = "Field `PET` writer - Parity Error Trap Disable"] -pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; -impl<'a, REG> PetW<'a, REG> +pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_A>; +impl<'a, REG> PET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pet::Value1) + self.variant(PET_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pet::Value2) + self.variant(PET_A::VALUE2) } } #[doc = "Brown Out Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brwnt { +pub enum BRWNT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brwnt) -> Self { + fn from(variant: BRWNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` reader - Brown Out Trap Disable"] -pub type BrwntR = crate::BitReader; -impl BrwntR { +pub type BRWNT_R = crate::BitReader; +impl BRWNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brwnt { + pub const fn variant(&self) -> BRWNT_A { match self.bits { - false => Brwnt::Value1, - true => Brwnt::Value2, + false => BRWNT_A::VALUE1, + true => BRWNT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brwnt::Value1 + *self == BRWNT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brwnt::Value2 + *self == BRWNT_A::VALUE2 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Disable"] -pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; -impl<'a, REG> BrwntW<'a, REG> +pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_A>; +impl<'a, REG> BRWNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brwnt::Value1) + self.variant(BRWNT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brwnt::Value2) + self.variant(BRWNT_A::VALUE2) } } #[doc = "Wake-up Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdgt { +pub enum ULPWDGT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdgt) -> Self { + fn from(variant: ULPWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGT` reader - Wake-up Trap Disable"] -pub type UlpwdgtR = crate::BitReader; -impl UlpwdgtR { +pub type ULPWDGT_R = crate::BitReader; +impl ULPWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ulpwdgt { + pub const fn variant(&self) -> ULPWDGT_A { match self.bits { - false => Ulpwdgt::Value1, - true => Ulpwdgt::Value2, + false => ULPWDGT_A::VALUE1, + true => ULPWDGT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ulpwdgt::Value1 + *self == ULPWDGT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ulpwdgt::Value2 + *self == ULPWDGT_A::VALUE2 } } #[doc = "Field `ULPWDGT` writer - Wake-up Trap Disable"] -pub type UlpwdgtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdgt>; -impl<'a, REG> UlpwdgtW<'a, REG> +pub type ULPWDGT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDGT_A>; +impl<'a, REG> ULPWDGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdgt::Value1) + self.variant(ULPWDGT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdgt::Value2) + self.variant(ULPWDGT_A::VALUE2) } } #[doc = "Peripheral Bridge 0 Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr0t { +pub enum BWERR0T_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr0t) -> Self { + fn from(variant: BWERR0T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Disable"] -pub type Bwerr0tR = crate::BitReader; -impl Bwerr0tR { +pub type BWERR0T_R = crate::BitReader; +impl BWERR0T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr0t { + pub const fn variant(&self) -> BWERR0T_A { match self.bits { - false => Bwerr0t::Value1, - true => Bwerr0t::Value2, + false => BWERR0T_A::VALUE1, + true => BWERR0T_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr0t::Value1 + *self == BWERR0T_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr0t::Value2 + *self == BWERR0T_A::VALUE2 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Disable"] -pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; -impl<'a, REG> Bwerr0tW<'a, REG> +pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_A>; +impl<'a, REG> BWERR0T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value1) + self.variant(BWERR0T_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value2) + self.variant(BWERR0T_A::VALUE2) } } #[doc = "Peripheral Bridge 1 Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr1t { +pub enum BWERR1T_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr1t) -> Self { + fn from(variant: BWERR1T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Disable"] -pub type Bwerr1tR = crate::BitReader; -impl Bwerr1tR { +pub type BWERR1T_R = crate::BitReader; +impl BWERR1T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr1t { + pub const fn variant(&self) -> BWERR1T_A { match self.bits { - false => Bwerr1t::Value1, - true => Bwerr1t::Value2, + false => BWERR1T_A::VALUE1, + true => BWERR1T_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr1t::Value1 + *self == BWERR1T_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr1t::Value2 + *self == BWERR1T_A::VALUE2 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Disable"] -pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; -impl<'a, REG> Bwerr1tW<'a, REG> +pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_A>; +impl<'a, REG> BWERR1T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value1) + self.variant(BWERR1T_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value2) + self.variant(BWERR1T_A::VALUE2) } } #[doc = "Die Temperature Too High Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Temphit { +pub enum TEMPHIT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Temphit) -> Self { + fn from(variant: TEMPHIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPHIT` reader - Die Temperature Too High Trap Disable"] -pub type TemphitR = crate::BitReader; -impl TemphitR { +pub type TEMPHIT_R = crate::BitReader; +impl TEMPHIT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Temphit { + pub const fn variant(&self) -> TEMPHIT_A { match self.bits { - false => Temphit::Value1, - true => Temphit::Value2, + false => TEMPHIT_A::VALUE1, + true => TEMPHIT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Temphit::Value1 + *self == TEMPHIT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Temphit::Value2 + *self == TEMPHIT_A::VALUE2 } } #[doc = "Field `TEMPHIT` writer - Die Temperature Too High Trap Disable"] -pub type TemphitW<'a, REG> = crate::BitWriter<'a, REG, Temphit>; -impl<'a, REG> TemphitW<'a, REG> +pub type TEMPHIT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPHIT_A>; +impl<'a, REG> TEMPHIT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Temphit::Value1) + self.variant(TEMPHIT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Temphit::Value2) + self.variant(TEMPHIT_A::VALUE2) } } #[doc = "Die Temperature Too Low Trap Disable\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Templot { +pub enum TEMPLOT_A { #[doc = "0: Trap request enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trap request disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Templot) -> Self { + fn from(variant: TEMPLOT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPLOT` reader - Die Temperature Too Low Trap Disable"] -pub type TemplotR = crate::BitReader; -impl TemplotR { +pub type TEMPLOT_R = crate::BitReader; +impl TEMPLOT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Templot { + pub const fn variant(&self) -> TEMPLOT_A { match self.bits { - false => Templot::Value1, - true => Templot::Value2, + false => TEMPLOT_A::VALUE1, + true => TEMPLOT_A::VALUE2, } } #[doc = "Trap request enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Templot::Value1 + *self == TEMPLOT_A::VALUE1 } #[doc = "Trap request disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Templot::Value2 + *self == TEMPLOT_A::VALUE2 } } #[doc = "Field `TEMPLOT` writer - Die Temperature Too Low Trap Disable"] -pub type TemplotW<'a, REG> = crate::BitWriter<'a, REG, Templot>; -impl<'a, REG> TemplotW<'a, REG> +pub type TEMPLOT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPLOT_A>; +impl<'a, REG> TEMPLOT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trap request enabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Templot::Value1) + self.variant(TEMPLOT_A::VALUE1) } #[doc = "Trap request disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Templot::Value2) + self.variant(TEMPLOT_A::VALUE2) } } impl R { #[doc = "Bit 0 - System OSC WDT Trap Disable"] #[inline(always)] - pub fn soscwdgt(&self) -> SoscwdgtR { - SoscwdgtR::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SOSCWDGT_R { + SOSCWDGT_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Disable"] #[inline(always)] - pub fn svcolckt(&self) -> SvcolcktR { - SvcolcktR::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SVCOLCKT_R { + SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Disable"] #[inline(always)] - pub fn uvcolckt(&self) -> UvcolcktR { - UvcolcktR::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UVCOLCKT_R { + UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Disable"] #[inline(always)] - pub fn pet(&self) -> PetR { - PetR::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PET_R { + PET_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Disable"] #[inline(always)] - pub fn brwnt(&self) -> BrwntR { - BrwntR::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BRWNT_R { + BRWNT_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Wake-up Trap Disable"] #[inline(always)] - pub fn ulpwdgt(&self) -> UlpwdgtR { - UlpwdgtR::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> ULPWDGT_R { + ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"] #[inline(always)] - pub fn bwerr0t(&self) -> Bwerr0tR { - Bwerr0tR::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> BWERR0T_R { + BWERR0T_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"] #[inline(always)] - pub fn bwerr1t(&self) -> Bwerr1tR { - Bwerr1tR::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> BWERR1T_R { + BWERR1T_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - Die Temperature Too High Trap Disable"] #[inline(always)] - pub fn temphit(&self) -> TemphitR { - TemphitR::new(((self.bits >> 12) & 1) != 0) + pub fn temphit(&self) -> TEMPHIT_R { + TEMPHIT_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Die Temperature Too Low Trap Disable"] #[inline(always)] - pub fn templot(&self) -> TemplotR { - TemplotR::new(((self.bits >> 13) & 1) != 0) + pub fn templot(&self) -> TEMPLOT_R { + TEMPLOT_R::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - System OSC WDT Trap Disable"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SoscwdgtW { - SoscwdgtW::new(self, 0) + pub fn soscwdgt(&mut self) -> SOSCWDGT_W { + SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Disable"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SvcolcktW { - SvcolcktW::new(self, 2) + pub fn svcolckt(&mut self) -> SVCOLCKT_W { + SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Disable"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UvcolcktW { - UvcolcktW::new(self, 3) + pub fn uvcolckt(&mut self) -> UVCOLCKT_W { + UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Disable"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PetW { - PetW::new(self, 4) + pub fn pet(&mut self) -> PET_W { + PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Disable"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BrwntW { - BrwntW::new(self, 5) + pub fn brwnt(&mut self) -> BRWNT_W { + BRWNT_W::new(self, 5) } #[doc = "Bit 6 - Wake-up Trap Disable"] #[inline(always)] #[must_use] - pub fn ulpwdgt(&mut self) -> UlpwdgtW { - UlpwdgtW::new(self, 6) + pub fn ulpwdgt(&mut self) -> ULPWDGT_W { + ULPWDGT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> Bwerr0tW { - Bwerr0tW::new(self, 7) + pub fn bwerr0t(&mut self) -> BWERR0T_W { + BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> Bwerr1tW { - Bwerr1tW::new(self, 8) + pub fn bwerr1t(&mut self) -> BWERR1T_W { + BWERR1T_W::new(self, 8) } #[doc = "Bit 12 - Die Temperature Too High Trap Disable"] #[inline(always)] #[must_use] - pub fn temphit(&mut self) -> TemphitW { - TemphitW::new(self, 12) + pub fn temphit(&mut self) -> TEMPHIT_W { + TEMPHIT_W::new(self, 12) } #[doc = "Bit 13 - Die Temperature Too Low Trap Disable"] #[inline(always)] #[must_use] - pub fn templot(&mut self) -> TemplotW { - TemplotW::new(self, 13) + pub fn templot(&mut self) -> TEMPLOT_W { + TEMPLOT_W::new(self, 13) } } #[doc = "Trap Disable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrapdisSpec; -impl crate::RegisterSpec for TrapdisSpec { +pub struct TRAPDIS_SPEC; +impl crate::RegisterSpec for TRAPDIS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`trapdis::R`](R) reader structure"] -impl crate::Readable for TrapdisSpec {} +impl crate::Readable for TRAPDIS_SPEC {} #[doc = "`write(|w| ..)` method takes [`trapdis::W`](W) writer structure"] -impl crate::Writable for TrapdisSpec { +impl crate::Writable for TRAPDIS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPDIS to value 0x31ff"] -impl crate::Resettable for TrapdisSpec { +impl crate::Resettable for TRAPDIS_SPEC { const RESET_VALUE: u32 = 0x31ff; } diff --git a/src/scu_trap/trapraw.rs b/src/scu_trap/trapraw.rs index 12614224..85aaff21 100644 --- a/src/scu_trap/trapraw.rs +++ b/src/scu_trap/trapraw.rs @@ -1,425 +1,425 @@ #[doc = "Register `TRAPRAW` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "System OSC WDT Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Soscwdgt { +pub enum SOSCWDGT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Soscwdgt) -> Self { + fn from(variant: SOSCWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` reader - System OSC WDT Trap Raw Status"] -pub type SoscwdgtR = crate::BitReader; -impl SoscwdgtR { +pub type SOSCWDGT_R = crate::BitReader; +impl SOSCWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Soscwdgt { + pub const fn variant(&self) -> SOSCWDGT_A { match self.bits { - false => Soscwdgt::Value1, - true => Soscwdgt::Value2, + false => SOSCWDGT_A::VALUE1, + true => SOSCWDGT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Soscwdgt::Value1 + *self == SOSCWDGT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Soscwdgt::Value2 + *self == SOSCWDGT_A::VALUE2 } } #[doc = "System VCO Lock Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Svcolckt { +pub enum SVCOLCKT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Svcolckt) -> Self { + fn from(variant: SVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Raw Status"] -pub type SvcolcktR = crate::BitReader; -impl SvcolcktR { +pub type SVCOLCKT_R = crate::BitReader; +impl SVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Svcolckt { + pub const fn variant(&self) -> SVCOLCKT_A { match self.bits { - false => Svcolckt::Value1, - true => Svcolckt::Value2, + false => SVCOLCKT_A::VALUE1, + true => SVCOLCKT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svcolckt::Value1 + *self == SVCOLCKT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svcolckt::Value2 + *self == SVCOLCKT_A::VALUE2 } } #[doc = "USB VCO Lock Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Uvcolckt { +pub enum UVCOLCKT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Uvcolckt) -> Self { + fn from(variant: UVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Raw Status"] -pub type UvcolcktR = crate::BitReader; -impl UvcolcktR { +pub type UVCOLCKT_R = crate::BitReader; +impl UVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Uvcolckt { + pub const fn variant(&self) -> UVCOLCKT_A { match self.bits { - false => Uvcolckt::Value1, - true => Uvcolckt::Value2, + false => UVCOLCKT_A::VALUE1, + true => UVCOLCKT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Uvcolckt::Value1 + *self == UVCOLCKT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Uvcolckt::Value2 + *self == UVCOLCKT_A::VALUE2 } } #[doc = "Parity Error Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pet { +pub enum PET_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pet) -> Self { + fn from(variant: PET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` reader - Parity Error Trap Raw Status"] -pub type PetR = crate::BitReader; -impl PetR { +pub type PET_R = crate::BitReader; +impl PET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pet { + pub const fn variant(&self) -> PET_A { match self.bits { - false => Pet::Value1, - true => Pet::Value2, + false => PET_A::VALUE1, + true => PET_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pet::Value1 + *self == PET_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pet::Value2 + *self == PET_A::VALUE2 } } #[doc = "Brown Out Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brwnt { +pub enum BRWNT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brwnt) -> Self { + fn from(variant: BRWNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` reader - Brown Out Trap Raw Status"] -pub type BrwntR = crate::BitReader; -impl BrwntR { +pub type BRWNT_R = crate::BitReader; +impl BRWNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brwnt { + pub const fn variant(&self) -> BRWNT_A { match self.bits { - false => Brwnt::Value1, - true => Brwnt::Value2, + false => BRWNT_A::VALUE1, + true => BRWNT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brwnt::Value1 + *self == BRWNT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brwnt::Value2 + *self == BRWNT_A::VALUE2 } } #[doc = "OSC_ULP WDG Trap RAW Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdgt { +pub enum ULPWDGT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdgt) -> Self { + fn from(variant: ULPWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGT` reader - OSC_ULP WDG Trap RAW Status"] -pub type UlpwdgtR = crate::BitReader; -impl UlpwdgtR { +pub type ULPWDGT_R = crate::BitReader; +impl ULPWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ulpwdgt { + pub const fn variant(&self) -> ULPWDGT_A { match self.bits { - false => Ulpwdgt::Value1, - true => Ulpwdgt::Value2, + false => ULPWDGT_A::VALUE1, + true => ULPWDGT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ulpwdgt::Value1 + *self == ULPWDGT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ulpwdgt::Value2 + *self == ULPWDGT_A::VALUE2 } } #[doc = "Peripheral Bridge 0 Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr0t { +pub enum BWERR0T_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr0t) -> Self { + fn from(variant: BWERR0T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Raw Status"] -pub type Bwerr0tR = crate::BitReader; -impl Bwerr0tR { +pub type BWERR0T_R = crate::BitReader; +impl BWERR0T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr0t { + pub const fn variant(&self) -> BWERR0T_A { match self.bits { - false => Bwerr0t::Value1, - true => Bwerr0t::Value2, + false => BWERR0T_A::VALUE1, + true => BWERR0T_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr0t::Value1 + *self == BWERR0T_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr0t::Value2 + *self == BWERR0T_A::VALUE2 } } #[doc = "Peripheral Bridge 1 Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr1t { +pub enum BWERR1T_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr1t) -> Self { + fn from(variant: BWERR1T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Raw Status"] -pub type Bwerr1tR = crate::BitReader; -impl Bwerr1tR { +pub type BWERR1T_R = crate::BitReader; +impl BWERR1T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr1t { + pub const fn variant(&self) -> BWERR1T_A { match self.bits { - false => Bwerr1t::Value1, - true => Bwerr1t::Value2, + false => BWERR1T_A::VALUE1, + true => BWERR1T_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr1t::Value1 + *self == BWERR1T_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr1t::Value2 + *self == BWERR1T_A::VALUE2 } } #[doc = "Die Temperature Too High Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Temphit { +pub enum TEMPHIT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Temphit) -> Self { + fn from(variant: TEMPHIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPHIT` reader - Die Temperature Too High Trap Raw Status"] -pub type TemphitR = crate::BitReader; -impl TemphitR { +pub type TEMPHIT_R = crate::BitReader; +impl TEMPHIT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Temphit { + pub const fn variant(&self) -> TEMPHIT_A { match self.bits { - false => Temphit::Value1, - true => Temphit::Value2, + false => TEMPHIT_A::VALUE1, + true => TEMPHIT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Temphit::Value1 + *self == TEMPHIT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Temphit::Value2 + *self == TEMPHIT_A::VALUE2 } } #[doc = "Die Temperature Too Low Trap Raw Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Templot { +pub enum TEMPLOT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Templot) -> Self { + fn from(variant: TEMPLOT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPLOT` reader - Die Temperature Too Low Trap Raw Status"] -pub type TemplotR = crate::BitReader; -impl TemplotR { +pub type TEMPLOT_R = crate::BitReader; +impl TEMPLOT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Templot { + pub const fn variant(&self) -> TEMPLOT_A { match self.bits { - false => Templot::Value1, - true => Templot::Value2, + false => TEMPLOT_A::VALUE1, + true => TEMPLOT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Templot::Value1 + *self == TEMPLOT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Templot::Value2 + *self == TEMPLOT_A::VALUE2 } } impl R { #[doc = "Bit 0 - System OSC WDT Trap Raw Status"] #[inline(always)] - pub fn soscwdgt(&self) -> SoscwdgtR { - SoscwdgtR::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SOSCWDGT_R { + SOSCWDGT_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Raw Status"] #[inline(always)] - pub fn svcolckt(&self) -> SvcolcktR { - SvcolcktR::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SVCOLCKT_R { + SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Raw Status"] #[inline(always)] - pub fn uvcolckt(&self) -> UvcolcktR { - UvcolcktR::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UVCOLCKT_R { + UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Raw Status"] #[inline(always)] - pub fn pet(&self) -> PetR { - PetR::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PET_R { + PET_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Raw Status"] #[inline(always)] - pub fn brwnt(&self) -> BrwntR { - BrwntR::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BRWNT_R { + BRWNT_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - OSC_ULP WDG Trap RAW Status"] #[inline(always)] - pub fn ulpwdgt(&self) -> UlpwdgtR { - UlpwdgtR::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> ULPWDGT_R { + ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Raw Status"] #[inline(always)] - pub fn bwerr0t(&self) -> Bwerr0tR { - Bwerr0tR::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> BWERR0T_R { + BWERR0T_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Raw Status"] #[inline(always)] - pub fn bwerr1t(&self) -> Bwerr1tR { - Bwerr1tR::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> BWERR1T_R { + BWERR1T_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - Die Temperature Too High Trap Raw Status"] #[inline(always)] - pub fn temphit(&self) -> TemphitR { - TemphitR::new(((self.bits >> 12) & 1) != 0) + pub fn temphit(&self) -> TEMPHIT_R { + TEMPHIT_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Die Temperature Too Low Trap Raw Status"] #[inline(always)] - pub fn templot(&self) -> TemplotR { - TemplotR::new(((self.bits >> 13) & 1) != 0) + pub fn templot(&self) -> TEMPLOT_R { + TEMPLOT_R::new(((self.bits >> 13) & 1) != 0) } } #[doc = "Trap Raw Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapraw::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TraprawSpec; -impl crate::RegisterSpec for TraprawSpec { +pub struct TRAPRAW_SPEC; +impl crate::RegisterSpec for TRAPRAW_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`trapraw::R`](R) reader structure"] -impl crate::Readable for TraprawSpec {} +impl crate::Readable for TRAPRAW_SPEC {} #[doc = "`reset()` method sets TRAPRAW to value 0"] -impl crate::Resettable for TraprawSpec { +impl crate::Resettable for TRAPRAW_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapset.rs b/src/scu_trap/trapset.rs index a0950d41..77df893c 100644 --- a/src/scu_trap/trapset.rs +++ b/src/scu_trap/trapset.rs @@ -1,389 +1,389 @@ #[doc = "Register `TRAPSET` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "System OSC WDT Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Soscwdgt { +pub enum SOSCWDGT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Soscwdgt) -> Self { + fn from(variant: SOSCWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` writer - System OSC WDT Trap Set"] -pub type SoscwdgtW<'a, REG> = crate::BitWriter<'a, REG, Soscwdgt>; -impl<'a, REG> SoscwdgtW<'a, REG> +pub type SOSCWDGT_W<'a, REG> = crate::BitWriter<'a, REG, SOSCWDGT_A>; +impl<'a, REG> SOSCWDGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value1) + self.variant(SOSCWDGT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Soscwdgt::Value2) + self.variant(SOSCWDGT_A::VALUE2) } } #[doc = "System VCO Lock Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Svcolckt { +pub enum SVCOLCKT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Svcolckt) -> Self { + fn from(variant: SVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` writer - System VCO Lock Trap Set"] -pub type SvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Svcolckt>; -impl<'a, REG> SvcolcktW<'a, REG> +pub type SVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, SVCOLCKT_A>; +impl<'a, REG> SVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value1) + self.variant(SVCOLCKT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Svcolckt::Value2) + self.variant(SVCOLCKT_A::VALUE2) } } #[doc = "USB VCO Lock Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Uvcolckt { +pub enum UVCOLCKT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Uvcolckt) -> Self { + fn from(variant: UVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` writer - USB VCO Lock Trap Set"] -pub type UvcolcktW<'a, REG> = crate::BitWriter<'a, REG, Uvcolckt>; -impl<'a, REG> UvcolcktW<'a, REG> +pub type UVCOLCKT_W<'a, REG> = crate::BitWriter<'a, REG, UVCOLCKT_A>; +impl<'a, REG> UVCOLCKT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value1) + self.variant(UVCOLCKT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Uvcolckt::Value2) + self.variant(UVCOLCKT_A::VALUE2) } } #[doc = "Parity Error Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pet { +pub enum PET_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pet) -> Self { + fn from(variant: PET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` writer - Parity Error Trap Set"] -pub type PetW<'a, REG> = crate::BitWriter<'a, REG, Pet>; -impl<'a, REG> PetW<'a, REG> +pub type PET_W<'a, REG> = crate::BitWriter<'a, REG, PET_A>; +impl<'a, REG> PET_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pet::Value1) + self.variant(PET_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pet::Value2) + self.variant(PET_A::VALUE2) } } #[doc = "Brown Out Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brwnt { +pub enum BRWNT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brwnt) -> Self { + fn from(variant: BRWNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` writer - Brown Out Trap Set"] -pub type BrwntW<'a, REG> = crate::BitWriter<'a, REG, Brwnt>; -impl<'a, REG> BrwntW<'a, REG> +pub type BRWNT_W<'a, REG> = crate::BitWriter<'a, REG, BRWNT_A>; +impl<'a, REG> BRWNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brwnt::Value1) + self.variant(BRWNT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brwnt::Value2) + self.variant(BRWNT_A::VALUE2) } } #[doc = "OSC_ULP WDG Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdt { +pub enum ULPWDT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdt) -> Self { + fn from(variant: ULPWDT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDT` writer - OSC_ULP WDG Trap Set"] -pub type UlpwdtW<'a, REG> = crate::BitWriter<'a, REG, Ulpwdt>; -impl<'a, REG> UlpwdtW<'a, REG> +pub type ULPWDT_W<'a, REG> = crate::BitWriter<'a, REG, ULPWDT_A>; +impl<'a, REG> ULPWDT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ulpwdt::Value1) + self.variant(ULPWDT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ulpwdt::Value2) + self.variant(ULPWDT_A::VALUE2) } } #[doc = "Peripheral Bridge 0 Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr0t { +pub enum BWERR0T_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr0t) -> Self { + fn from(variant: BWERR0T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` writer - Peripheral Bridge 0 Trap Set"] -pub type Bwerr0tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr0t>; -impl<'a, REG> Bwerr0tW<'a, REG> +pub type BWERR0T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR0T_A>; +impl<'a, REG> BWERR0T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value1) + self.variant(BWERR0T_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr0t::Value2) + self.variant(BWERR0T_A::VALUE2) } } #[doc = "Peripheral Bridge 1 Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr1t { +pub enum BWERR1T_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr1t) -> Self { + fn from(variant: BWERR1T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` writer - Peripheral Bridge 1 Trap Set"] -pub type Bwerr1tW<'a, REG> = crate::BitWriter<'a, REG, Bwerr1t>; -impl<'a, REG> Bwerr1tW<'a, REG> +pub type BWERR1T_W<'a, REG> = crate::BitWriter<'a, REG, BWERR1T_A>; +impl<'a, REG> BWERR1T_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value1) + self.variant(BWERR1T_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwerr1t::Value2) + self.variant(BWERR1T_A::VALUE2) } } #[doc = "Die Temperature Too High Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Temphit { +pub enum TEMPHIT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Temphit) -> Self { + fn from(variant: TEMPHIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPHIT` writer - Die Temperature Too High Trap Set"] -pub type TemphitW<'a, REG> = crate::BitWriter<'a, REG, Temphit>; -impl<'a, REG> TemphitW<'a, REG> +pub type TEMPHIT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPHIT_A>; +impl<'a, REG> TEMPHIT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Temphit::Value1) + self.variant(TEMPHIT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Temphit::Value2) + self.variant(TEMPHIT_A::VALUE2) } } #[doc = "Die Temperature Too Low Trap Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Templot { +pub enum TEMPLOT_A { #[doc = "0: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Templot) -> Self { + fn from(variant: TEMPLOT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPLOT` writer - Die Temperature Too Low Trap Set"] -pub type TemplotW<'a, REG> = crate::BitWriter<'a, REG, Templot>; -impl<'a, REG> TemplotW<'a, REG> +pub type TEMPLOT_W<'a, REG> = crate::BitWriter<'a, REG, TEMPLOT_A>; +impl<'a, REG> TEMPLOT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Templot::Value1) + self.variant(TEMPLOT_A::VALUE1) } #[doc = "Set trap request"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Templot::Value2) + self.variant(TEMPLOT_A::VALUE2) } } impl W { #[doc = "Bit 0 - System OSC WDT Trap Set"] #[inline(always)] #[must_use] - pub fn soscwdgt(&mut self) -> SoscwdgtW { - SoscwdgtW::new(self, 0) + pub fn soscwdgt(&mut self) -> SOSCWDGT_W { + SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Set"] #[inline(always)] #[must_use] - pub fn svcolckt(&mut self) -> SvcolcktW { - SvcolcktW::new(self, 2) + pub fn svcolckt(&mut self) -> SVCOLCKT_W { + SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Set"] #[inline(always)] #[must_use] - pub fn uvcolckt(&mut self) -> UvcolcktW { - UvcolcktW::new(self, 3) + pub fn uvcolckt(&mut self) -> UVCOLCKT_W { + UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Set"] #[inline(always)] #[must_use] - pub fn pet(&mut self) -> PetW { - PetW::new(self, 4) + pub fn pet(&mut self) -> PET_W { + PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Set"] #[inline(always)] #[must_use] - pub fn brwnt(&mut self) -> BrwntW { - BrwntW::new(self, 5) + pub fn brwnt(&mut self) -> BRWNT_W { + BRWNT_W::new(self, 5) } #[doc = "Bit 6 - OSC_ULP WDG Trap Set"] #[inline(always)] #[must_use] - pub fn ulpwdt(&mut self) -> UlpwdtW { - UlpwdtW::new(self, 6) + pub fn ulpwdt(&mut self) -> ULPWDT_W { + ULPWDT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Set"] #[inline(always)] #[must_use] - pub fn bwerr0t(&mut self) -> Bwerr0tW { - Bwerr0tW::new(self, 7) + pub fn bwerr0t(&mut self) -> BWERR0T_W { + BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Set"] #[inline(always)] #[must_use] - pub fn bwerr1t(&mut self) -> Bwerr1tW { - Bwerr1tW::new(self, 8) + pub fn bwerr1t(&mut self) -> BWERR1T_W { + BWERR1T_W::new(self, 8) } #[doc = "Bit 12 - Die Temperature Too High Trap Set"] #[inline(always)] #[must_use] - pub fn temphit(&mut self) -> TemphitW { - TemphitW::new(self, 12) + pub fn temphit(&mut self) -> TEMPHIT_W { + TEMPHIT_W::new(self, 12) } #[doc = "Bit 13 - Die Temperature Too Low Trap Set"] #[inline(always)] #[must_use] - pub fn templot(&mut self) -> TemplotW { - TemplotW::new(self, 13) + pub fn templot(&mut self) -> TEMPLOT_W { + TEMPLOT_W::new(self, 13) } } #[doc = "Trap Set Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trapset::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrapsetSpec; -impl crate::RegisterSpec for TrapsetSpec { +pub struct TRAPSET_SPEC; +impl crate::RegisterSpec for TRAPSET_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trapset::W`](W) writer structure"] -impl crate::Writable for TrapsetSpec { +impl crate::Writable for TRAPSET_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRAPSET to value 0"] -impl crate::Resettable for TrapsetSpec { +impl crate::Resettable for TRAPSET_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/scu_trap/trapstat.rs b/src/scu_trap/trapstat.rs index c048bd0a..75f33225 100644 --- a/src/scu_trap/trapstat.rs +++ b/src/scu_trap/trapstat.rs @@ -1,425 +1,425 @@ #[doc = "Register `TRAPSTAT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "System OSC WDT Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Soscwdgt { +pub enum SOSCWDGT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Soscwdgt) -> Self { + fn from(variant: SOSCWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOSCWDGT` reader - System OSC WDT Trap Status"] -pub type SoscwdgtR = crate::BitReader; -impl SoscwdgtR { +pub type SOSCWDGT_R = crate::BitReader; +impl SOSCWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Soscwdgt { + pub const fn variant(&self) -> SOSCWDGT_A { match self.bits { - false => Soscwdgt::Value1, - true => Soscwdgt::Value2, + false => SOSCWDGT_A::VALUE1, + true => SOSCWDGT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Soscwdgt::Value1 + *self == SOSCWDGT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Soscwdgt::Value2 + *self == SOSCWDGT_A::VALUE2 } } #[doc = "System VCO Lock Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Svcolckt { +pub enum SVCOLCKT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Svcolckt) -> Self { + fn from(variant: SVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SVCOLCKT` reader - System VCO Lock Trap Status"] -pub type SvcolcktR = crate::BitReader; -impl SvcolcktR { +pub type SVCOLCKT_R = crate::BitReader; +impl SVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Svcolckt { + pub const fn variant(&self) -> SVCOLCKT_A { match self.bits { - false => Svcolckt::Value1, - true => Svcolckt::Value2, + false => SVCOLCKT_A::VALUE1, + true => SVCOLCKT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Svcolckt::Value1 + *self == SVCOLCKT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Svcolckt::Value2 + *self == SVCOLCKT_A::VALUE2 } } #[doc = "USB VCO Lock Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Uvcolckt { +pub enum UVCOLCKT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Uvcolckt) -> Self { + fn from(variant: UVCOLCKT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `UVCOLCKT` reader - USB VCO Lock Trap Status"] -pub type UvcolcktR = crate::BitReader; -impl UvcolcktR { +pub type UVCOLCKT_R = crate::BitReader; +impl UVCOLCKT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Uvcolckt { + pub const fn variant(&self) -> UVCOLCKT_A { match self.bits { - false => Uvcolckt::Value1, - true => Uvcolckt::Value2, + false => UVCOLCKT_A::VALUE1, + true => UVCOLCKT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Uvcolckt::Value1 + *self == UVCOLCKT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Uvcolckt::Value2 + *self == UVCOLCKT_A::VALUE2 } } #[doc = "Parity Error Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pet { +pub enum PET_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pet) -> Self { + fn from(variant: PET_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PET` reader - Parity Error Trap Status"] -pub type PetR = crate::BitReader; -impl PetR { +pub type PET_R = crate::BitReader; +impl PET_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pet { + pub const fn variant(&self) -> PET_A { match self.bits { - false => Pet::Value1, - true => Pet::Value2, + false => PET_A::VALUE1, + true => PET_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pet::Value1 + *self == PET_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pet::Value2 + *self == PET_A::VALUE2 } } #[doc = "Brown Out Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brwnt { +pub enum BRWNT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brwnt) -> Self { + fn from(variant: BRWNT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRWNT` reader - Brown Out Trap Status"] -pub type BrwntR = crate::BitReader; -impl BrwntR { +pub type BRWNT_R = crate::BitReader; +impl BRWNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brwnt { + pub const fn variant(&self) -> BRWNT_A { match self.bits { - false => Brwnt::Value1, - true => Brwnt::Value2, + false => BRWNT_A::VALUE1, + true => BRWNT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brwnt::Value1 + *self == BRWNT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brwnt::Value2 + *self == BRWNT_A::VALUE2 } } #[doc = "OSC_ULP WDG Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ulpwdgt { +pub enum ULPWDGT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ulpwdgt) -> Self { + fn from(variant: ULPWDGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ULPWDGT` reader - OSC_ULP WDG Trap Status"] -pub type UlpwdgtR = crate::BitReader; -impl UlpwdgtR { +pub type ULPWDGT_R = crate::BitReader; +impl ULPWDGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ulpwdgt { + pub const fn variant(&self) -> ULPWDGT_A { match self.bits { - false => Ulpwdgt::Value1, - true => Ulpwdgt::Value2, + false => ULPWDGT_A::VALUE1, + true => ULPWDGT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ulpwdgt::Value1 + *self == ULPWDGT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ulpwdgt::Value2 + *self == ULPWDGT_A::VALUE2 } } #[doc = "Peripheral Bridge 0 Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr0t { +pub enum BWERR0T_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr0t) -> Self { + fn from(variant: BWERR0T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR0T` reader - Peripheral Bridge 0 Trap Status"] -pub type Bwerr0tR = crate::BitReader; -impl Bwerr0tR { +pub type BWERR0T_R = crate::BitReader; +impl BWERR0T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr0t { + pub const fn variant(&self) -> BWERR0T_A { match self.bits { - false => Bwerr0t::Value1, - true => Bwerr0t::Value2, + false => BWERR0T_A::VALUE1, + true => BWERR0T_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr0t::Value1 + *self == BWERR0T_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr0t::Value2 + *self == BWERR0T_A::VALUE2 } } #[doc = "Peripheral Bridge 1 Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwerr1t { +pub enum BWERR1T_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwerr1t) -> Self { + fn from(variant: BWERR1T_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWERR1T` reader - Peripheral Bridge 1 Trap Status"] -pub type Bwerr1tR = crate::BitReader; -impl Bwerr1tR { +pub type BWERR1T_R = crate::BitReader; +impl BWERR1T_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwerr1t { + pub const fn variant(&self) -> BWERR1T_A { match self.bits { - false => Bwerr1t::Value1, - true => Bwerr1t::Value2, + false => BWERR1T_A::VALUE1, + true => BWERR1T_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwerr1t::Value1 + *self == BWERR1T_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwerr1t::Value2 + *self == BWERR1T_A::VALUE2 } } #[doc = "Die Temperature Too High Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Temphit { +pub enum TEMPHIT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Temphit) -> Self { + fn from(variant: TEMPHIT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPHIT` reader - Die Temperature Too High Trap Status"] -pub type TemphitR = crate::BitReader; -impl TemphitR { +pub type TEMPHIT_R = crate::BitReader; +impl TEMPHIT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Temphit { + pub const fn variant(&self) -> TEMPHIT_A { match self.bits { - false => Temphit::Value1, - true => Temphit::Value2, + false => TEMPHIT_A::VALUE1, + true => TEMPHIT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Temphit::Value1 + *self == TEMPHIT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Temphit::Value2 + *self == TEMPHIT_A::VALUE2 } } #[doc = "Die Temperature Too Low Trap Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Templot { +pub enum TEMPLOT_A { #[doc = "0: No pending trap request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Pending trap request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Templot) -> Self { + fn from(variant: TEMPLOT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPLOT` reader - Die Temperature Too Low Trap Status"] -pub type TemplotR = crate::BitReader; -impl TemplotR { +pub type TEMPLOT_R = crate::BitReader; +impl TEMPLOT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Templot { + pub const fn variant(&self) -> TEMPLOT_A { match self.bits { - false => Templot::Value1, - true => Templot::Value2, + false => TEMPLOT_A::VALUE1, + true => TEMPLOT_A::VALUE2, } } #[doc = "No pending trap request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Templot::Value1 + *self == TEMPLOT_A::VALUE1 } #[doc = "Pending trap request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Templot::Value2 + *self == TEMPLOT_A::VALUE2 } } impl R { #[doc = "Bit 0 - System OSC WDT Trap Status"] #[inline(always)] - pub fn soscwdgt(&self) -> SoscwdgtR { - SoscwdgtR::new((self.bits & 1) != 0) + pub fn soscwdgt(&self) -> SOSCWDGT_R { + SOSCWDGT_R::new((self.bits & 1) != 0) } #[doc = "Bit 2 - System VCO Lock Trap Status"] #[inline(always)] - pub fn svcolckt(&self) -> SvcolcktR { - SvcolcktR::new(((self.bits >> 2) & 1) != 0) + pub fn svcolckt(&self) -> SVCOLCKT_R { + SVCOLCKT_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - USB VCO Lock Trap Status"] #[inline(always)] - pub fn uvcolckt(&self) -> UvcolcktR { - UvcolcktR::new(((self.bits >> 3) & 1) != 0) + pub fn uvcolckt(&self) -> UVCOLCKT_R { + UVCOLCKT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Trap Status"] #[inline(always)] - pub fn pet(&self) -> PetR { - PetR::new(((self.bits >> 4) & 1) != 0) + pub fn pet(&self) -> PET_R { + PET_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Brown Out Trap Status"] #[inline(always)] - pub fn brwnt(&self) -> BrwntR { - BrwntR::new(((self.bits >> 5) & 1) != 0) + pub fn brwnt(&self) -> BRWNT_R { + BRWNT_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - OSC_ULP WDG Trap Status"] #[inline(always)] - pub fn ulpwdgt(&self) -> UlpwdgtR { - UlpwdgtR::new(((self.bits >> 6) & 1) != 0) + pub fn ulpwdgt(&self) -> ULPWDGT_R { + ULPWDGT_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Status"] #[inline(always)] - pub fn bwerr0t(&self) -> Bwerr0tR { - Bwerr0tR::new(((self.bits >> 7) & 1) != 0) + pub fn bwerr0t(&self) -> BWERR0T_R { + BWERR0T_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Status"] #[inline(always)] - pub fn bwerr1t(&self) -> Bwerr1tR { - Bwerr1tR::new(((self.bits >> 8) & 1) != 0) + pub fn bwerr1t(&self) -> BWERR1T_R { + BWERR1T_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 12 - Die Temperature Too High Trap Status"] #[inline(always)] - pub fn temphit(&self) -> TemphitR { - TemphitR::new(((self.bits >> 12) & 1) != 0) + pub fn temphit(&self) -> TEMPHIT_R { + TEMPHIT_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Die Temperature Too Low Trap Status"] #[inline(always)] - pub fn templot(&self) -> TemplotR { - TemplotR::new(((self.bits >> 13) & 1) != 0) + pub fn templot(&self) -> TEMPLOT_R { + TEMPLOT_R::new(((self.bits >> 13) & 1) != 0) } } #[doc = "Trap Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trapstat::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrapstatSpec; -impl crate::RegisterSpec for TrapstatSpec { +pub struct TRAPSTAT_SPEC; +impl crate::RegisterSpec for TRAPSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`trapstat::R`](R) reader structure"] -impl crate::Readable for TrapstatSpec {} +impl crate::Readable for TRAPSTAT_SPEC {} #[doc = "`reset()` method sets TRAPSTAT to value 0"] -impl crate::Resettable for TrapstatSpec { +impl crate::Resettable for TRAPSTAT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0.rs b/src/usb0.rs index 52890964..74fe296d 100644 --- a/src/usb0.rs +++ b/src/usb0.rs @@ -2,350 +2,322 @@ #[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x08], - gahbcfg: Gahbcfg, - gusbcfg: Gusbcfg, - grstctl: Grstctl, - gintsts: Gintsts, - gintmsk: Gintmsk, - grxstsr: Grxstsr, - grxstsp: Grxstsp, - grxfsiz: Grxfsiz, - gnptxfsiz: Gnptxfsiz, + gahbcfg: GAHBCFG, + gusbcfg: GUSBCFG, + grstctl: GRSTCTL, + gintsts: GINTSTS, + gintmsk: GINTMSK, + grxstsr: GRXSTSR, + grxstsp: GRXSTSP, + grxfsiz: GRXFSIZ, + gnptxfsiz: GNPTXFSIZ, _reserved9: [u8; 0x10], - guid: Guid, + guid: GUID, _reserved10: [u8; 0x1c], - gdfifocfg: Gdfifocfg, + gdfifocfg: GDFIFOCFG, _reserved11: [u8; 0xa4], - dieptxf1: Dieptxf1, - dieptxf2: Dieptxf2, - dieptxf3: Dieptxf3, - dieptxf4: Dieptxf4, - dieptxf5: Dieptxf5, - dieptxf6: Dieptxf6, + dieptxf1: DIEPTXF1, + dieptxf2: DIEPTXF2, + dieptxf3: DIEPTXF3, + dieptxf4: DIEPTXF4, + dieptxf5: DIEPTXF5, + dieptxf6: DIEPTXF6, _reserved17: [u8; 0x06e4], - dcfg: Dcfg, - dctl: Dctl, - dsts: Dsts, + dcfg: DCFG, + dctl: DCTL, + dsts: DSTS, _reserved20: [u8; 0x04], - diepmsk: Diepmsk, - doepmsk: Doepmsk, - daint: Daint, - daintmsk: Daintmsk, + diepmsk: DIEPMSK, + doepmsk: DOEPMSK, + daint: DAINT, + daintmsk: DAINTMSK, _reserved24: [u8; 0x08], - dvbusdis: Dvbusdis, - dvbuspulse: Dvbuspulse, + dvbusdis: DVBUSDIS, + dvbuspulse: DVBUSPULSE, _reserved26: [u8; 0x04], - diepempmsk: Diepempmsk, + diepempmsk: DIEPEMPMSK, _reserved27: [u8; 0x05c8], - pcgcctl: Pcgcctl, + pcgcctl: PCGCCTL, } impl RegisterBlock { #[doc = "0x08 - AHB Configuration Register"] #[inline(always)] - pub const fn gahbcfg(&self) -> &Gahbcfg { + pub const fn gahbcfg(&self) -> &GAHBCFG { &self.gahbcfg } #[doc = "0x0c - USB Configuration Register"] #[inline(always)] - pub const fn gusbcfg(&self) -> &Gusbcfg { + pub const fn gusbcfg(&self) -> &GUSBCFG { &self.gusbcfg } #[doc = "0x10 - Reset Register"] #[inline(always)] - pub const fn grstctl(&self) -> &Grstctl { + pub const fn grstctl(&self) -> &GRSTCTL { &self.grstctl } #[doc = "0x14 - Interrupt Register"] #[inline(always)] - pub const fn gintsts(&self) -> &Gintsts { + pub const fn gintsts(&self) -> &GINTSTS { &self.gintsts } #[doc = "0x18 - Interrupt Mask Register"] #[inline(always)] - pub const fn gintmsk(&self) -> &Gintmsk { + pub const fn gintmsk(&self) -> &GINTMSK { &self.gintmsk } #[doc = "0x1c - Receive Status Debug Read Register"] #[inline(always)] - pub const fn grxstsr(&self) -> &Grxstsr { + pub const fn grxstsr(&self) -> &GRXSTSR { &self.grxstsr } #[doc = "0x20 - Receive Status Read and Pop Register"] #[inline(always)] - pub const fn grxstsp(&self) -> &Grxstsp { + pub const fn grxstsp(&self) -> &GRXSTSP { &self.grxstsp } #[doc = "0x24 - Receive FIFO Size Register"] #[inline(always)] - pub const fn grxfsiz(&self) -> &Grxfsiz { + pub const fn grxfsiz(&self) -> &GRXFSIZ { &self.grxfsiz } #[doc = "0x28 - Non-Periodic Transmit FIFO Size Register"] #[inline(always)] - pub const fn gnptxfsiz(&self) -> &Gnptxfsiz { + pub const fn gnptxfsiz(&self) -> &GNPTXFSIZ { &self.gnptxfsiz } #[doc = "0x3c - USB Module Identification Register"] #[inline(always)] - pub const fn guid(&self) -> &Guid { + pub const fn guid(&self) -> &GUID { &self.guid } #[doc = "0x5c - Global DFIFO Software Config Register"] #[inline(always)] - pub const fn gdfifocfg(&self) -> &Gdfifocfg { + pub const fn gdfifocfg(&self) -> &GDFIFOCFG { &self.gdfifocfg } #[doc = "0x104 - Device IN Endpoint 1 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf1(&self) -> &Dieptxf1 { + pub const fn dieptxf1(&self) -> &DIEPTXF1 { &self.dieptxf1 } #[doc = "0x108 - Device IN Endpoint 2 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf2(&self) -> &Dieptxf2 { + pub const fn dieptxf2(&self) -> &DIEPTXF2 { &self.dieptxf2 } #[doc = "0x10c - Device IN Endpoint 3 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf3(&self) -> &Dieptxf3 { + pub const fn dieptxf3(&self) -> &DIEPTXF3 { &self.dieptxf3 } #[doc = "0x110 - Device IN Endpoint 4 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf4(&self) -> &Dieptxf4 { + pub const fn dieptxf4(&self) -> &DIEPTXF4 { &self.dieptxf4 } #[doc = "0x114 - Device IN Endpoint 5 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf5(&self) -> &Dieptxf5 { + pub const fn dieptxf5(&self) -> &DIEPTXF5 { &self.dieptxf5 } #[doc = "0x118 - Device IN Endpoint 6 Transmit FIFO Size Register"] #[inline(always)] - pub const fn dieptxf6(&self) -> &Dieptxf6 { + pub const fn dieptxf6(&self) -> &DIEPTXF6 { &self.dieptxf6 } #[doc = "0x800 - Device Configuration Register"] #[inline(always)] - pub const fn dcfg(&self) -> &Dcfg { + pub const fn dcfg(&self) -> &DCFG { &self.dcfg } #[doc = "0x804 - Device Control Register"] #[inline(always)] - pub const fn dctl(&self) -> &Dctl { + pub const fn dctl(&self) -> &DCTL { &self.dctl } #[doc = "0x808 - Device Status Register"] #[inline(always)] - pub const fn dsts(&self) -> &Dsts { + pub const fn dsts(&self) -> &DSTS { &self.dsts } #[doc = "0x810 - Device IN Endpoint Common Interrupt Mask Register"] #[inline(always)] - pub const fn diepmsk(&self) -> &Diepmsk { + pub const fn diepmsk(&self) -> &DIEPMSK { &self.diepmsk } #[doc = "0x814 - Device OUT Endpoint Common Interrupt Mask Register"] #[inline(always)] - pub const fn doepmsk(&self) -> &Doepmsk { + pub const fn doepmsk(&self) -> &DOEPMSK { &self.doepmsk } #[doc = "0x818 - Device All Endpoints Interrupt Register"] #[inline(always)] - pub const fn daint(&self) -> &Daint { + pub const fn daint(&self) -> &DAINT { &self.daint } #[doc = "0x81c - Device All Endpoints Interrupt Mask Register"] #[inline(always)] - pub const fn daintmsk(&self) -> &Daintmsk { + pub const fn daintmsk(&self) -> &DAINTMSK { &self.daintmsk } #[doc = "0x828 - Device VBUS Discharge Time Register"] #[inline(always)] - pub const fn dvbusdis(&self) -> &Dvbusdis { + pub const fn dvbusdis(&self) -> &DVBUSDIS { &self.dvbusdis } #[doc = "0x82c - Device VBUS Pulsing Time Register"] #[inline(always)] - pub const fn dvbuspulse(&self) -> &Dvbuspulse { + pub const fn dvbuspulse(&self) -> &DVBUSPULSE { &self.dvbuspulse } #[doc = "0x834 - Device IN Endpoint FIFO Empty Interrupt Mask Register"] #[inline(always)] - pub const fn diepempmsk(&self) -> &Diepempmsk { + pub const fn diepempmsk(&self) -> &DIEPEMPMSK { &self.diepempmsk } #[doc = "0xe00 - Power and Clock Gating Control Register"] #[inline(always)] - pub const fn pcgcctl(&self) -> &Pcgcctl { + pub const fn pcgcctl(&self) -> &PCGCCTL { &self.pcgcctl } } #[doc = "GAHBCFG (rw) register accessor: AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gahbcfg`] module"] -#[doc(alias = "GAHBCFG")] -pub type Gahbcfg = crate::Reg; +pub type GAHBCFG = crate::Reg; #[doc = "AHB Configuration Register"] pub mod gahbcfg; #[doc = "GUSBCFG (rw) register accessor: USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gusbcfg`] module"] -#[doc(alias = "GUSBCFG")] -pub type Gusbcfg = crate::Reg; +pub type GUSBCFG = crate::Reg; #[doc = "USB Configuration Register"] pub mod gusbcfg; #[doc = "GRSTCTL (rw) register accessor: Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grstctl`] module"] -#[doc(alias = "GRSTCTL")] -pub type Grstctl = crate::Reg; +pub type GRSTCTL = crate::Reg; #[doc = "Reset Register"] pub mod grstctl; #[doc = "GINTSTS (rw) register accessor: Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintsts`] module"] -#[doc(alias = "GINTSTS")] -pub type Gintsts = crate::Reg; +pub type GINTSTS = crate::Reg; #[doc = "Interrupt Register"] pub mod gintsts; #[doc = "GINTMSK (rw) register accessor: Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gintmsk`] module"] -#[doc(alias = "GINTMSK")] -pub type Gintmsk = crate::Reg; +pub type GINTMSK = crate::Reg; #[doc = "Interrupt Mask Register"] pub mod gintmsk; #[doc = "GRXSTSR (r) register accessor: Receive Status Debug Read Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsr`] module"] -#[doc(alias = "GRXSTSR")] -pub type Grxstsr = crate::Reg; +pub type GRXSTSR = crate::Reg; #[doc = "Receive Status Debug Read Register"] pub mod grxstsr; #[doc = "GRXSTSP (r) register accessor: Receive Status Read and Pop Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxstsp`] module"] -#[doc(alias = "GRXSTSP")] -pub type Grxstsp = crate::Reg; +pub type GRXSTSP = crate::Reg; #[doc = "Receive Status Read and Pop Register"] pub mod grxstsp; #[doc = "GRXFSIZ (rw) register accessor: Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@grxfsiz`] module"] -#[doc(alias = "GRXFSIZ")] -pub type Grxfsiz = crate::Reg; +pub type GRXFSIZ = crate::Reg; #[doc = "Receive FIFO Size Register"] pub mod grxfsiz; #[doc = "GNPTXFSIZ (rw) register accessor: Non-Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gnptxfsiz`] module"] -#[doc(alias = "GNPTXFSIZ")] -pub type Gnptxfsiz = crate::Reg; +pub type GNPTXFSIZ = crate::Reg; #[doc = "Non-Periodic Transmit FIFO Size Register"] pub mod gnptxfsiz; #[doc = "GUID (rw) register accessor: USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@guid`] module"] -#[doc(alias = "GUID")] -pub type Guid = crate::Reg; +pub type GUID = crate::Reg; #[doc = "USB Module Identification Register"] pub mod guid; #[doc = "GDFIFOCFG (rw) register accessor: Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdfifocfg`] module"] -#[doc(alias = "GDFIFOCFG")] -pub type Gdfifocfg = crate::Reg; +pub type GDFIFOCFG = crate::Reg; #[doc = "Global DFIFO Software Config Register"] pub mod gdfifocfg; #[doc = "DIEPTXF1 (rw) register accessor: Device IN Endpoint 1 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf1`] module"] -#[doc(alias = "DIEPTXF1")] -pub type Dieptxf1 = crate::Reg; +pub type DIEPTXF1 = crate::Reg; #[doc = "Device IN Endpoint 1 Transmit FIFO Size Register"] pub mod dieptxf1; #[doc = "DIEPTXF2 (rw) register accessor: Device IN Endpoint 2 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf2`] module"] -#[doc(alias = "DIEPTXF2")] -pub type Dieptxf2 = crate::Reg; +pub type DIEPTXF2 = crate::Reg; #[doc = "Device IN Endpoint 2 Transmit FIFO Size Register"] pub mod dieptxf2; #[doc = "DIEPTXF3 (rw) register accessor: Device IN Endpoint 3 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf3`] module"] -#[doc(alias = "DIEPTXF3")] -pub type Dieptxf3 = crate::Reg; +pub type DIEPTXF3 = crate::Reg; #[doc = "Device IN Endpoint 3 Transmit FIFO Size Register"] pub mod dieptxf3; #[doc = "DIEPTXF4 (rw) register accessor: Device IN Endpoint 4 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf4`] module"] -#[doc(alias = "DIEPTXF4")] -pub type Dieptxf4 = crate::Reg; +pub type DIEPTXF4 = crate::Reg; #[doc = "Device IN Endpoint 4 Transmit FIFO Size Register"] pub mod dieptxf4; #[doc = "DIEPTXF5 (rw) register accessor: Device IN Endpoint 5 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf5`] module"] -#[doc(alias = "DIEPTXF5")] -pub type Dieptxf5 = crate::Reg; +pub type DIEPTXF5 = crate::Reg; #[doc = "Device IN Endpoint 5 Transmit FIFO Size Register"] pub mod dieptxf5; #[doc = "DIEPTXF6 (rw) register accessor: Device IN Endpoint 6 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptxf6`] module"] -#[doc(alias = "DIEPTXF6")] -pub type Dieptxf6 = crate::Reg; +pub type DIEPTXF6 = crate::Reg; #[doc = "Device IN Endpoint 6 Transmit FIFO Size Register"] pub mod dieptxf6; #[doc = "DCFG (rw) register accessor: Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`] module"] -#[doc(alias = "DCFG")] -pub type Dcfg = crate::Reg; +pub type DCFG = crate::Reg; #[doc = "Device Configuration Register"] pub mod dcfg; #[doc = "DCTL (rw) register accessor: Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dctl`] module"] -#[doc(alias = "DCTL")] -pub type Dctl = crate::Reg; +pub type DCTL = crate::Reg; #[doc = "Device Control Register"] pub mod dctl; #[doc = "DSTS (r) register accessor: Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dsts`] module"] -#[doc(alias = "DSTS")] -pub type Dsts = crate::Reg; +pub type DSTS = crate::Reg; #[doc = "Device Status Register"] pub mod dsts; #[doc = "DIEPMSK (rw) register accessor: Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepmsk`] module"] -#[doc(alias = "DIEPMSK")] -pub type Diepmsk = crate::Reg; +pub type DIEPMSK = crate::Reg; #[doc = "Device IN Endpoint Common Interrupt Mask Register"] pub mod diepmsk; #[doc = "DOEPMSK (rw) register accessor: Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepmsk`] module"] -#[doc(alias = "DOEPMSK")] -pub type Doepmsk = crate::Reg; +pub type DOEPMSK = crate::Reg; #[doc = "Device OUT Endpoint Common Interrupt Mask Register"] pub mod doepmsk; #[doc = "DAINT (r) register accessor: Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daint`] module"] -#[doc(alias = "DAINT")] -pub type Daint = crate::Reg; +pub type DAINT = crate::Reg; #[doc = "Device All Endpoints Interrupt Register"] pub mod daint; #[doc = "DAINTMSK (rw) register accessor: Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@daintmsk`] module"] -#[doc(alias = "DAINTMSK")] -pub type Daintmsk = crate::Reg; +pub type DAINTMSK = crate::Reg; #[doc = "Device All Endpoints Interrupt Mask Register"] pub mod daintmsk; #[doc = "DVBUSDIS (rw) register accessor: Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbusdis`] module"] -#[doc(alias = "DVBUSDIS")] -pub type Dvbusdis = crate::Reg; +pub type DVBUSDIS = crate::Reg; #[doc = "Device VBUS Discharge Time Register"] pub mod dvbusdis; #[doc = "DVBUSPULSE (rw) register accessor: Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dvbuspulse`] module"] -#[doc(alias = "DVBUSPULSE")] -pub type Dvbuspulse = crate::Reg; +pub type DVBUSPULSE = crate::Reg; #[doc = "Device VBUS Pulsing Time Register"] pub mod dvbuspulse; #[doc = "DIEPEMPMSK (rw) register accessor: Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepempmsk`] module"] -#[doc(alias = "DIEPEMPMSK")] -pub type Diepempmsk = crate::Reg; +pub type DIEPEMPMSK = crate::Reg; #[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register"] pub mod diepempmsk; #[doc = "PCGCCTL (rw) register accessor: Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgcctl`] module"] -#[doc(alias = "PCGCCTL")] -pub type Pcgcctl = crate::Reg; +pub type PCGCCTL = crate::Reg; #[doc = "Power and Clock Gating Control Register"] pub mod pcgcctl; diff --git a/src/usb0/daint.rs b/src/usb0/daint.rs index 510ba933..60bbb06d 100644 --- a/src/usb0/daint.rs +++ b/src/usb0/daint.rs @@ -1,29 +1,29 @@ #[doc = "Register `DAINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `InEpInt` reader - IN Endpoint Interrupt Bits"] -pub type InEpIntR = crate::FieldReader; +pub type IN_EP_INT_R = crate::FieldReader; #[doc = "Field `OutEPInt` reader - OUT Endpoint Interrupt Bits"] -pub type OutEpintR = crate::FieldReader; +pub type OUT_EPINT_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - IN Endpoint Interrupt Bits"] #[inline(always)] - pub fn in_ep_int(&self) -> InEpIntR { - InEpIntR::new((self.bits & 0xffff) as u16) + pub fn in_ep_int(&self) -> IN_EP_INT_R { + IN_EP_INT_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - OUT Endpoint Interrupt Bits"] #[inline(always)] - pub fn out_epint(&self) -> OutEpintR { - OutEpintR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn out_epint(&self) -> OUT_EPINT_R { + OUT_EPINT_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Device All Endpoints Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daint::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DaintSpec; -impl crate::RegisterSpec for DaintSpec { +pub struct DAINT_SPEC; +impl crate::RegisterSpec for DAINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`daint::R`](R) reader structure"] -impl crate::Readable for DaintSpec {} +impl crate::Readable for DAINT_SPEC {} #[doc = "`reset()` method sets DAINT to value 0"] -impl crate::Resettable for DaintSpec { +impl crate::Resettable for DAINT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/daintmsk.rs b/src/usb0/daintmsk.rs index 5bc8a1fb..f636c84e 100644 --- a/src/usb0/daintmsk.rs +++ b/src/usb0/daintmsk.rs @@ -1,55 +1,55 @@ #[doc = "Register `DAINTMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DAINTMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `InEpMsk` reader - IN EP Interrupt Mask Bits"] -pub type InEpMskR = crate::FieldReader; +pub type IN_EP_MSK_R = crate::FieldReader; #[doc = "Field `InEpMsk` writer - IN EP Interrupt Mask Bits"] -pub type InEpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type IN_EP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `OutEpMsk` reader - OUT EP Interrupt Mask Bits"] -pub type OutEpMskR = crate::FieldReader; +pub type OUT_EP_MSK_R = crate::FieldReader; #[doc = "Field `OutEpMsk` writer - OUT EP Interrupt Mask Bits"] -pub type OutEpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type OUT_EP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"] #[inline(always)] - pub fn in_ep_msk(&self) -> InEpMskR { - InEpMskR::new((self.bits & 0xffff) as u16) + pub fn in_ep_msk(&self) -> IN_EP_MSK_R { + IN_EP_MSK_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"] #[inline(always)] - pub fn out_ep_msk(&self) -> OutEpMskR { - OutEpMskR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn out_ep_msk(&self) -> OUT_EP_MSK_R { + OUT_EP_MSK_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn in_ep_msk(&mut self) -> InEpMskW { - InEpMskW::new(self, 0) + pub fn in_ep_msk(&mut self) -> IN_EP_MSK_W { + IN_EP_MSK_W::new(self, 0) } #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn out_ep_msk(&mut self) -> OutEpMskW { - OutEpMskW::new(self, 16) + pub fn out_ep_msk(&mut self) -> OUT_EP_MSK_W { + OUT_EP_MSK_W::new(self, 16) } } #[doc = "Device All Endpoints Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`daintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`daintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DaintmskSpec; -impl crate::RegisterSpec for DaintmskSpec { +pub struct DAINTMSK_SPEC; +impl crate::RegisterSpec for DAINTMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`daintmsk::R`](R) reader structure"] -impl crate::Readable for DaintmskSpec {} +impl crate::Readable for DAINTMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`daintmsk::W`](W) writer structure"] -impl crate::Writable for DaintmskSpec { +impl crate::Writable for DAINTMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DAINTMSK to value 0"] -impl crate::Resettable for DaintmskSpec { +impl crate::Resettable for DAINTMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dcfg.rs b/src/usb0/dcfg.rs index f23b7d4e..6718391f 100644 --- a/src/usb0/dcfg.rs +++ b/src/usb0/dcfg.rs @@ -1,44 +1,44 @@ #[doc = "Register `DCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Device Speed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum DevSpd { +pub enum DEV_SPD_A { #[doc = "3: Full speed (USB 1.1 transceiver clock is 48 MHz)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: DevSpd) -> Self { + fn from(variant: DEV_SPD_A) -> Self { variant as _ } } -impl crate::FieldSpec for DevSpd { +impl crate::FieldSpec for DEV_SPD_A { type Ux = u8; } -impl crate::IsEnum for DevSpd {} +impl crate::IsEnum for DEV_SPD_A {} #[doc = "Field `DevSpd` reader - Device Speed"] -pub type DevSpdR = crate::FieldReader; -impl DevSpdR { +pub type DEV_SPD_R = crate::FieldReader; +impl DEV_SPD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(DevSpd::Value4), + 3 => Some(DEV_SPD_A::VALUE4), _ => None, } } #[doc = "Full speed (USB 1.1 transceiver clock is 48 MHz)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == DevSpd::Value4 + *self == DEV_SPD_A::VALUE4 } } #[doc = "Field `DevSpd` writer - Device Speed"] -pub type DevSpdW<'a, REG> = crate::FieldWriter<'a, REG, 2, DevSpd>; -impl<'a, REG> DevSpdW<'a, REG> +pub type DEV_SPD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DEV_SPD_A>; +impl<'a, REG> DEV_SPD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -46,127 +46,127 @@ where #[doc = "Full speed (USB 1.1 transceiver clock is 48 MHz)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(DevSpd::Value4) + self.variant(DEV_SPD_A::VALUE4) } } #[doc = "Non-Zero-Length Status OUT Handshake\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NzstsOuthshk { +pub enum NZSTS_OUTHSHK_A { #[doc = "1: Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] - Value1 = 1, + VALUE1 = 1, #[doc = "0: Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] - Value2 = 0, + VALUE2 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NzstsOuthshk) -> Self { + fn from(variant: NZSTS_OUTHSHK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NZStsOUTHShk` reader - Non-Zero-Length Status OUT Handshake"] -pub type NzstsOuthshkR = crate::BitReader; -impl NzstsOuthshkR { +pub type NZSTS_OUTHSHK_R = crate::BitReader; +impl NZSTS_OUTHSHK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NzstsOuthshk { + pub const fn variant(&self) -> NZSTS_OUTHSHK_A { match self.bits { - true => NzstsOuthshk::Value1, - false => NzstsOuthshk::Value2, + true => NZSTS_OUTHSHK_A::VALUE1, + false => NZSTS_OUTHSHK_A::VALUE2, } } #[doc = "Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NzstsOuthshk::Value1 + *self == NZSTS_OUTHSHK_A::VALUE1 } #[doc = "Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NzstsOuthshk::Value2 + *self == NZSTS_OUTHSHK_A::VALUE2 } } #[doc = "Field `NZStsOUTHShk` writer - Non-Zero-Length Status OUT Handshake"] -pub type NzstsOuthshkW<'a, REG> = crate::BitWriter<'a, REG, NzstsOuthshk>; -impl<'a, REG> NzstsOuthshkW<'a, REG> +pub type NZSTS_OUTHSHK_W<'a, REG> = crate::BitWriter<'a, REG, NZSTS_OUTHSHK_A>; +impl<'a, REG> NZSTS_OUTHSHK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NzstsOuthshk::Value1) + self.variant(NZSTS_OUTHSHK_A::VALUE1) } #[doc = "Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the Device Endpoint Control register."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NzstsOuthshk::Value2) + self.variant(NZSTS_OUTHSHK_A::VALUE2) } } #[doc = "Field `DevAddr` reader - Device Address"] -pub type DevAddrR = crate::FieldReader; +pub type DEV_ADDR_R = crate::FieldReader; #[doc = "Field `DevAddr` writer - Device Address"] -pub type DevAddrW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type DEV_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Periodic Frame Interval\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PerFrInt { +pub enum PER_FR_INT_A { #[doc = "0: 80% of the frame interval"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 85%"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 90%"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 95%"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PerFrInt) -> Self { + fn from(variant: PER_FR_INT_A) -> Self { variant as _ } } -impl crate::FieldSpec for PerFrInt { +impl crate::FieldSpec for PER_FR_INT_A { type Ux = u8; } -impl crate::IsEnum for PerFrInt {} +impl crate::IsEnum for PER_FR_INT_A {} #[doc = "Field `PerFrInt` reader - Periodic Frame Interval"] -pub type PerFrIntR = crate::FieldReader; -impl PerFrIntR { +pub type PER_FR_INT_R = crate::FieldReader; +impl PER_FR_INT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> PerFrInt { + pub const fn variant(&self) -> PER_FR_INT_A { match self.bits { - 0 => PerFrInt::Value1, - 1 => PerFrInt::Value2, - 2 => PerFrInt::Value3, - 3 => PerFrInt::Value4, + 0 => PER_FR_INT_A::VALUE1, + 1 => PER_FR_INT_A::VALUE2, + 2 => PER_FR_INT_A::VALUE3, + 3 => PER_FR_INT_A::VALUE4, _ => unreachable!(), } } #[doc = "80% of the frame interval"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PerFrInt::Value1 + *self == PER_FR_INT_A::VALUE1 } #[doc = "85%"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PerFrInt::Value2 + *self == PER_FR_INT_A::VALUE2 } #[doc = "90%"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PerFrInt::Value3 + *self == PER_FR_INT_A::VALUE3 } #[doc = "95%"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PerFrInt::Value4 + *self == PER_FR_INT_A::VALUE4 } } #[doc = "Field `PerFrInt` writer - Periodic Frame Interval"] -pub type PerFrIntW<'a, REG> = crate::FieldWriter<'a, REG, 2, PerFrInt, crate::Safe>; -impl<'a, REG> PerFrIntW<'a, REG> +pub type PER_FR_INT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PER_FR_INT_A, crate::Safe>; +impl<'a, REG> PER_FR_INT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -174,81 +174,81 @@ where #[doc = "80% of the frame interval"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PerFrInt::Value1) + self.variant(PER_FR_INT_A::VALUE1) } #[doc = "85%"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PerFrInt::Value2) + self.variant(PER_FR_INT_A::VALUE2) } #[doc = "90%"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PerFrInt::Value3) + self.variant(PER_FR_INT_A::VALUE3) } #[doc = "95%"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(PerFrInt::Value4) + self.variant(PER_FR_INT_A::VALUE4) } } #[doc = "Field `DescDMA` reader - Enable Scatter/Gather DMA in Device mode."] -pub type DescDmaR = crate::BitReader; +pub type DESC_DMA_R = crate::BitReader; #[doc = "Field `DescDMA` writer - Enable Scatter/Gather DMA in Device mode."] -pub type DescDmaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DESC_DMA_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Periodic Scheduling Interval\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PerSchIntvl { +pub enum PER_SCH_INTVL_A { #[doc = "0: 25% of frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 50% of frame."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 75% of frame."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PerSchIntvl) -> Self { + fn from(variant: PER_SCH_INTVL_A) -> Self { variant as _ } } -impl crate::FieldSpec for PerSchIntvl { +impl crate::FieldSpec for PER_SCH_INTVL_A { type Ux = u8; } -impl crate::IsEnum for PerSchIntvl {} +impl crate::IsEnum for PER_SCH_INTVL_A {} #[doc = "Field `PerSchIntvl` reader - Periodic Scheduling Interval"] -pub type PerSchIntvlR = crate::FieldReader; -impl PerSchIntvlR { +pub type PER_SCH_INTVL_R = crate::FieldReader; +impl PER_SCH_INTVL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(PerSchIntvl::Value1), - 1 => Some(PerSchIntvl::Value2), - 2 => Some(PerSchIntvl::Value3), + 0 => Some(PER_SCH_INTVL_A::VALUE1), + 1 => Some(PER_SCH_INTVL_A::VALUE2), + 2 => Some(PER_SCH_INTVL_A::VALUE3), _ => None, } } #[doc = "25% of frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PerSchIntvl::Value1 + *self == PER_SCH_INTVL_A::VALUE1 } #[doc = "50% of frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PerSchIntvl::Value2 + *self == PER_SCH_INTVL_A::VALUE2 } #[doc = "75% of frame."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PerSchIntvl::Value3 + *self == PER_SCH_INTVL_A::VALUE3 } } #[doc = "Field `PerSchIntvl` writer - Periodic Scheduling Interval"] -pub type PerSchIntvlW<'a, REG> = crate::FieldWriter<'a, REG, 2, PerSchIntvl>; -impl<'a, REG> PerSchIntvlW<'a, REG> +pub type PER_SCH_INTVL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PER_SCH_INTVL_A>; +impl<'a, REG> PER_SCH_INTVL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -256,103 +256,103 @@ where #[doc = "25% of frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(PerSchIntvl::Value1) + self.variant(PER_SCH_INTVL_A::VALUE1) } #[doc = "50% of frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(PerSchIntvl::Value2) + self.variant(PER_SCH_INTVL_A::VALUE2) } #[doc = "75% of frame."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(PerSchIntvl::Value3) + self.variant(PER_SCH_INTVL_A::VALUE3) } } impl R { #[doc = "Bits 0:1 - Device Speed"] #[inline(always)] - pub fn dev_spd(&self) -> DevSpdR { - DevSpdR::new((self.bits & 3) as u8) + pub fn dev_spd(&self) -> DEV_SPD_R { + DEV_SPD_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"] #[inline(always)] - pub fn nzsts_outhshk(&self) -> NzstsOuthshkR { - NzstsOuthshkR::new(((self.bits >> 2) & 1) != 0) + pub fn nzsts_outhshk(&self) -> NZSTS_OUTHSHK_R { + NZSTS_OUTHSHK_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 4:10 - Device Address"] #[inline(always)] - pub fn dev_addr(&self) -> DevAddrR { - DevAddrR::new(((self.bits >> 4) & 0x7f) as u8) + pub fn dev_addr(&self) -> DEV_ADDR_R { + DEV_ADDR_R::new(((self.bits >> 4) & 0x7f) as u8) } #[doc = "Bits 11:12 - Periodic Frame Interval"] #[inline(always)] - pub fn per_fr_int(&self) -> PerFrIntR { - PerFrIntR::new(((self.bits >> 11) & 3) as u8) + pub fn per_fr_int(&self) -> PER_FR_INT_R { + PER_FR_INT_R::new(((self.bits >> 11) & 3) as u8) } #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."] #[inline(always)] - pub fn desc_dma(&self) -> DescDmaR { - DescDmaR::new(((self.bits >> 23) & 1) != 0) + pub fn desc_dma(&self) -> DESC_DMA_R { + DESC_DMA_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bits 24:25 - Periodic Scheduling Interval"] #[inline(always)] - pub fn per_sch_intvl(&self) -> PerSchIntvlR { - PerSchIntvlR::new(((self.bits >> 24) & 3) as u8) + pub fn per_sch_intvl(&self) -> PER_SCH_INTVL_R { + PER_SCH_INTVL_R::new(((self.bits >> 24) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Device Speed"] #[inline(always)] #[must_use] - pub fn dev_spd(&mut self) -> DevSpdW { - DevSpdW::new(self, 0) + pub fn dev_spd(&mut self) -> DEV_SPD_W { + DEV_SPD_W::new(self, 0) } #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"] #[inline(always)] #[must_use] - pub fn nzsts_outhshk(&mut self) -> NzstsOuthshkW { - NzstsOuthshkW::new(self, 2) + pub fn nzsts_outhshk(&mut self) -> NZSTS_OUTHSHK_W { + NZSTS_OUTHSHK_W::new(self, 2) } #[doc = "Bits 4:10 - Device Address"] #[inline(always)] #[must_use] - pub fn dev_addr(&mut self) -> DevAddrW { - DevAddrW::new(self, 4) + pub fn dev_addr(&mut self) -> DEV_ADDR_W { + DEV_ADDR_W::new(self, 4) } #[doc = "Bits 11:12 - Periodic Frame Interval"] #[inline(always)] #[must_use] - pub fn per_fr_int(&mut self) -> PerFrIntW { - PerFrIntW::new(self, 11) + pub fn per_fr_int(&mut self) -> PER_FR_INT_W { + PER_FR_INT_W::new(self, 11) } #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."] #[inline(always)] #[must_use] - pub fn desc_dma(&mut self) -> DescDmaW { - DescDmaW::new(self, 23) + pub fn desc_dma(&mut self) -> DESC_DMA_W { + DESC_DMA_W::new(self, 23) } #[doc = "Bits 24:25 - Periodic Scheduling Interval"] #[inline(always)] #[must_use] - pub fn per_sch_intvl(&mut self) -> PerSchIntvlW { - PerSchIntvlW::new(self, 24) + pub fn per_sch_intvl(&mut self) -> PER_SCH_INTVL_W { + PER_SCH_INTVL_W::new(self, 24) } } #[doc = "Device Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DcfgSpec; -impl crate::RegisterSpec for DcfgSpec { +pub struct DCFG_SPEC; +impl crate::RegisterSpec for DCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dcfg::R`](R) reader structure"] -impl crate::Readable for DcfgSpec {} +impl crate::Readable for DCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`dcfg::W`](W) writer structure"] -impl crate::Writable for DcfgSpec { +impl crate::Writable for DCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DCFG to value 0x0820_0000"] -impl crate::Resettable for DcfgSpec { +impl crate::Resettable for DCFG_SPEC { const RESET_VALUE: u32 = 0x0820_0000; } diff --git a/src/usb0/dctl.rs b/src/usb0/dctl.rs index 4fea8f88..a2fb7c03 100644 --- a/src/usb0/dctl.rs +++ b/src/usb0/dctl.rs @@ -1,205 +1,205 @@ #[doc = "Register `DCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RmtWkUpSig` reader - Remote Wakeup Signaling"] -pub type RmtWkUpSigR = crate::BitReader; +pub type RMT_WK_UP_SIG_R = crate::BitReader; #[doc = "Field `RmtWkUpSig` writer - Remote Wakeup Signaling"] -pub type RmtWkUpSigW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RMT_WK_UP_SIG_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Soft Disconnect\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum SftDiscon { +pub enum SFT_DISCON_A { #[doc = "0: Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core drives a device disconnect event to the USB host."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: SftDiscon) -> Self { + fn from(variant: SFT_DISCON_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SftDiscon` reader - Soft Disconnect"] -pub type SftDisconR = crate::BitReader; -impl SftDisconR { +pub type SFT_DISCON_R = crate::BitReader; +impl SFT_DISCON_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> SftDiscon { + pub const fn variant(&self) -> SFT_DISCON_A { match self.bits { - false => SftDiscon::Value1, - true => SftDiscon::Value2, + false => SFT_DISCON_A::VALUE1, + true => SFT_DISCON_A::VALUE2, } } #[doc = "Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == SftDiscon::Value1 + *self == SFT_DISCON_A::VALUE1 } #[doc = "The core drives a device disconnect event to the USB host."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == SftDiscon::Value2 + *self == SFT_DISCON_A::VALUE2 } } #[doc = "Field `SftDiscon` writer - Soft Disconnect"] -pub type SftDisconW<'a, REG> = crate::BitWriter<'a, REG, SftDiscon>; -impl<'a, REG> SftDisconW<'a, REG> +pub type SFT_DISCON_W<'a, REG> = crate::BitWriter<'a, REG, SFT_DISCON_A>; +impl<'a, REG> SFT_DISCON_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation. When this bit is cleared after a soft disconnect, the core drives a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(SftDiscon::Value1) + self.variant(SFT_DISCON_A::VALUE1) } #[doc = "The core drives a device disconnect event to the USB host."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(SftDiscon::Value2) + self.variant(SFT_DISCON_A::VALUE2) } } #[doc = "Global Non-periodic IN NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GnpinnakSts { +pub enum GNPINNAK_STS_A { #[doc = "0: A handshake is sent out based on the data availability in the transmit FIFO."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GnpinnakSts) -> Self { + fn from(variant: GNPINNAK_STS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GNPINNakSts` reader - Global Non-periodic IN NAK Status"] -pub type GnpinnakStsR = crate::BitReader; -impl GnpinnakStsR { +pub type GNPINNAK_STS_R = crate::BitReader; +impl GNPINNAK_STS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GnpinnakSts { + pub const fn variant(&self) -> GNPINNAK_STS_A { match self.bits { - false => GnpinnakSts::Value1, - true => GnpinnakSts::Value2, + false => GNPINNAK_STS_A::VALUE1, + true => GNPINNAK_STS_A::VALUE2, } } #[doc = "A handshake is sent out based on the data availability in the transmit FIFO."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GnpinnakSts::Value1 + *self == GNPINNAK_STS_A::VALUE1 } #[doc = "A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GnpinnakSts::Value2 + *self == GNPINNAK_STS_A::VALUE2 } } #[doc = "Global OUT NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GoutnakSts { +pub enum GOUTNAK_STS_A { #[doc = "0: A handshake is sent based on the FIFO Status and the NAK and STALL bit settings."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GoutnakSts) -> Self { + fn from(variant: GOUTNAK_STS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GOUTNakSts` reader - Global OUT NAK Status"] -pub type GoutnakStsR = crate::BitReader; -impl GoutnakStsR { +pub type GOUTNAK_STS_R = crate::BitReader; +impl GOUTNAK_STS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GoutnakSts { + pub const fn variant(&self) -> GOUTNAK_STS_A { match self.bits { - false => GoutnakSts::Value1, - true => GoutnakSts::Value2, + false => GOUTNAK_STS_A::VALUE1, + true => GOUTNAK_STS_A::VALUE2, } } #[doc = "A handshake is sent based on the FIFO Status and the NAK and STALL bit settings."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GoutnakSts::Value1 + *self == GOUTNAK_STS_A::VALUE1 } #[doc = "No data is written to the RxFIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GoutnakSts::Value2 + *self == GOUTNAK_STS_A::VALUE2 } } #[doc = "Field `SGNPInNak` writer - Set Global Non-periodic IN NAK"] -pub type SgnpinNakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SGNPIN_NAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGNPInNak` writer - Clear Global Non-periodic IN NAK"] -pub type CgnpinNakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CGNPIN_NAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SGOUTNak` writer - Set Global OUT NAK"] -pub type SgoutnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SGOUTNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CGOUTNak` writer - Clear Global OUT NAK"] -pub type CgoutnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CGOUTNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Global Multi Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Gmc { +pub enum GMC_A { #[doc = "0: Invalid."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 1 packet."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 2 packets."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 3 packets."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Gmc) -> Self { + fn from(variant: GMC_A) -> Self { variant as _ } } -impl crate::FieldSpec for Gmc { +impl crate::FieldSpec for GMC_A { type Ux = u8; } -impl crate::IsEnum for Gmc {} +impl crate::IsEnum for GMC_A {} #[doc = "Field `GMC` reader - Global Multi Count"] -pub type GmcR = crate::FieldReader; -impl GmcR { +pub type GMC_R = crate::FieldReader; +impl GMC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Gmc { + pub const fn variant(&self) -> GMC_A { match self.bits { - 0 => Gmc::Value1, - 1 => Gmc::Value2, - 2 => Gmc::Value3, - 3 => Gmc::Value4, + 0 => GMC_A::VALUE1, + 1 => GMC_A::VALUE2, + 2 => GMC_A::VALUE3, + 3 => GMC_A::VALUE4, _ => unreachable!(), } } #[doc = "Invalid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Gmc::Value1 + *self == GMC_A::VALUE1 } #[doc = "1 packet."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Gmc::Value2 + *self == GMC_A::VALUE2 } #[doc = "2 packets."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Gmc::Value3 + *self == GMC_A::VALUE3 } #[doc = "3 packets."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Gmc::Value4 + *self == GMC_A::VALUE4 } } #[doc = "Field `GMC` writer - Global Multi Count"] -pub type GmcW<'a, REG> = crate::FieldWriter<'a, REG, 2, Gmc, crate::Safe>; -impl<'a, REG> GmcW<'a, REG> +pub type GMC_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GMC_A, crate::Safe>; +impl<'a, REG> GMC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -207,252 +207,252 @@ where #[doc = "Invalid."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gmc::Value1) + self.variant(GMC_A::VALUE1) } #[doc = "1 packet."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gmc::Value2) + self.variant(GMC_A::VALUE2) } #[doc = "2 packets."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Gmc::Value3) + self.variant(GMC_A::VALUE3) } #[doc = "3 packets."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Gmc::Value4) + self.variant(GMC_A::VALUE4) } } #[doc = "Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum IgnrFrmNum { +pub enum IGNR_FRM_NUM_A { #[doc = "0: Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: IgnrFrmNum) -> Self { + fn from(variant: IGNR_FRM_NUM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IgnrFrmNum` reader - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] -pub type IgnrFrmNumR = crate::BitReader; -impl IgnrFrmNumR { +pub type IGNR_FRM_NUM_R = crate::BitReader; +impl IGNR_FRM_NUM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> IgnrFrmNum { + pub const fn variant(&self) -> IGNR_FRM_NUM_A { match self.bits { - false => IgnrFrmNum::Value1, - true => IgnrFrmNum::Value2, + false => IGNR_FRM_NUM_A::VALUE1, + true => IGNR_FRM_NUM_A::VALUE2, } } #[doc = "Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IgnrFrmNum::Value1 + *self == IGNR_FRM_NUM_A::VALUE1 } #[doc = "Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IgnrFrmNum::Value2 + *self == IGNR_FRM_NUM_A::VALUE2 } } #[doc = "Field `IgnrFrmNum` writer - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] -pub type IgnrFrmNumW<'a, REG> = crate::BitWriter<'a, REG, IgnrFrmNum>; -impl<'a, REG> IgnrFrmNumW<'a, REG> +pub type IGNR_FRM_NUM_W<'a, REG> = crate::BitWriter<'a, REG, IGNR_FRM_NUM_A>; +impl<'a, REG> IGNR_FRM_NUM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Scatter/Gather enabled: The core transmits the packets only in the frame number in which they are intended to be transmitted. Scatter/Gather disabled: Periodic transfer interrupt feature is disabled; the application must program transfers for periodic endpoints every frame"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(IgnrFrmNum::Value1) + self.variant(IGNR_FRM_NUM_A::VALUE1) } #[doc = "Scatter/Gather enabled: The core ignores the frame number, sending packets immediately as the packets are ready. Scatter/Gather disabled: Periodic transfer interrupt feature is enabled; the application can program transfers for multiple frames for periodic endpoints."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(IgnrFrmNum::Value2) + self.variant(IGNR_FRM_NUM_A::VALUE2) } } #[doc = "Field `NakOnBble` reader - Set NAK automatically on babble"] -pub type NakOnBbleR = crate::BitReader; +pub type NAK_ON_BBLE_R = crate::BitReader; #[doc = "Field `NakOnBble` writer - Set NAK automatically on babble"] -pub type NakOnBbleW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NAK_ON_BBLE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Enable continue on BNA\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EnContOnBna { +pub enum EN_CONT_ON_BNA_A { #[doc = "0: After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EnContOnBna) -> Self { + fn from(variant: EN_CONT_ON_BNA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EnContOnBNA` reader - Enable continue on BNA"] -pub type EnContOnBnaR = crate::BitReader; -impl EnContOnBnaR { +pub type EN_CONT_ON_BNA_R = crate::BitReader; +impl EN_CONT_ON_BNA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EnContOnBna { + pub const fn variant(&self) -> EN_CONT_ON_BNA_A { match self.bits { - false => EnContOnBna::Value1, - true => EnContOnBna::Value2, + false => EN_CONT_ON_BNA_A::VALUE1, + true => EN_CONT_ON_BNA_A::VALUE2, } } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EnContOnBna::Value1 + *self == EN_CONT_ON_BNA_A::VALUE1 } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EnContOnBna::Value2 + *self == EN_CONT_ON_BNA_A::VALUE2 } } #[doc = "Field `EnContOnBNA` writer - Enable continue on BNA"] -pub type EnContOnBnaW<'a, REG> = crate::BitWriter<'a, REG, EnContOnBna>; -impl<'a, REG> EnContOnBnaW<'a, REG> +pub type EN_CONT_ON_BNA_W<'a, REG> = crate::BitWriter<'a, REG, EN_CONT_ON_BNA_A>; +impl<'a, REG> EN_CONT_ON_BNA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the DOEPDMA descriptor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(EnContOnBna::Value1) + self.variant(EN_CONT_ON_BNA_A::VALUE1) } #[doc = "After receiving BNA interrupt, the core disables the endpoint. When the endpoint is re-enabled by the application, the core starts processing from the descriptor that received the BNA interrupt."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(EnContOnBna::Value2) + self.variant(EN_CONT_ON_BNA_A::VALUE2) } } impl R { #[doc = "Bit 0 - Remote Wakeup Signaling"] #[inline(always)] - pub fn rmt_wk_up_sig(&self) -> RmtWkUpSigR { - RmtWkUpSigR::new((self.bits & 1) != 0) + pub fn rmt_wk_up_sig(&self) -> RMT_WK_UP_SIG_R { + RMT_WK_UP_SIG_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Soft Disconnect"] #[inline(always)] - pub fn sft_discon(&self) -> SftDisconR { - SftDisconR::new(((self.bits >> 1) & 1) != 0) + pub fn sft_discon(&self) -> SFT_DISCON_R { + SFT_DISCON_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Global Non-periodic IN NAK Status"] #[inline(always)] - pub fn gnpinnak_sts(&self) -> GnpinnakStsR { - GnpinnakStsR::new(((self.bits >> 2) & 1) != 0) + pub fn gnpinnak_sts(&self) -> GNPINNAK_STS_R { + GNPINNAK_STS_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Global OUT NAK Status"] #[inline(always)] - pub fn goutnak_sts(&self) -> GoutnakStsR { - GoutnakStsR::new(((self.bits >> 3) & 1) != 0) + pub fn goutnak_sts(&self) -> GOUTNAK_STS_R { + GOUTNAK_STS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 13:14 - Global Multi Count"] #[inline(always)] - pub fn gmc(&self) -> GmcR { - GmcR::new(((self.bits >> 13) & 3) as u8) + pub fn gmc(&self) -> GMC_R { + GMC_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] #[inline(always)] - pub fn ignr_frm_num(&self) -> IgnrFrmNumR { - IgnrFrmNumR::new(((self.bits >> 15) & 1) != 0) + pub fn ignr_frm_num(&self) -> IGNR_FRM_NUM_R { + IGNR_FRM_NUM_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Set NAK automatically on babble"] #[inline(always)] - pub fn nak_on_bble(&self) -> NakOnBbleR { - NakOnBbleR::new(((self.bits >> 16) & 1) != 0) + pub fn nak_on_bble(&self) -> NAK_ON_BBLE_R { + NAK_ON_BBLE_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Enable continue on BNA"] #[inline(always)] - pub fn en_cont_on_bna(&self) -> EnContOnBnaR { - EnContOnBnaR::new(((self.bits >> 17) & 1) != 0) + pub fn en_cont_on_bna(&self) -> EN_CONT_ON_BNA_R { + EN_CONT_ON_BNA_R::new(((self.bits >> 17) & 1) != 0) } } impl W { #[doc = "Bit 0 - Remote Wakeup Signaling"] #[inline(always)] #[must_use] - pub fn rmt_wk_up_sig(&mut self) -> RmtWkUpSigW { - RmtWkUpSigW::new(self, 0) + pub fn rmt_wk_up_sig(&mut self) -> RMT_WK_UP_SIG_W { + RMT_WK_UP_SIG_W::new(self, 0) } #[doc = "Bit 1 - Soft Disconnect"] #[inline(always)] #[must_use] - pub fn sft_discon(&mut self) -> SftDisconW { - SftDisconW::new(self, 1) + pub fn sft_discon(&mut self) -> SFT_DISCON_W { + SFT_DISCON_W::new(self, 1) } #[doc = "Bit 7 - Set Global Non-periodic IN NAK"] #[inline(always)] #[must_use] - pub fn sgnpin_nak(&mut self) -> SgnpinNakW { - SgnpinNakW::new(self, 7) + pub fn sgnpin_nak(&mut self) -> SGNPIN_NAK_W { + SGNPIN_NAK_W::new(self, 7) } #[doc = "Bit 8 - Clear Global Non-periodic IN NAK"] #[inline(always)] #[must_use] - pub fn cgnpin_nak(&mut self) -> CgnpinNakW { - CgnpinNakW::new(self, 8) + pub fn cgnpin_nak(&mut self) -> CGNPIN_NAK_W { + CGNPIN_NAK_W::new(self, 8) } #[doc = "Bit 9 - Set Global OUT NAK"] #[inline(always)] #[must_use] - pub fn sgoutnak(&mut self) -> SgoutnakW { - SgoutnakW::new(self, 9) + pub fn sgoutnak(&mut self) -> SGOUTNAK_W { + SGOUTNAK_W::new(self, 9) } #[doc = "Bit 10 - Clear Global OUT NAK"] #[inline(always)] #[must_use] - pub fn cgoutnak(&mut self) -> CgoutnakW { - CgoutnakW::new(self, 10) + pub fn cgoutnak(&mut self) -> CGOUTNAK_W { + CGOUTNAK_W::new(self, 10) } #[doc = "Bits 13:14 - Global Multi Count"] #[inline(always)] #[must_use] - pub fn gmc(&mut self) -> GmcW { - GmcW::new(self, 13) + pub fn gmc(&mut self) -> GMC_W { + GMC_W::new(self, 13) } #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] #[inline(always)] #[must_use] - pub fn ignr_frm_num(&mut self) -> IgnrFrmNumW { - IgnrFrmNumW::new(self, 15) + pub fn ignr_frm_num(&mut self) -> IGNR_FRM_NUM_W { + IGNR_FRM_NUM_W::new(self, 15) } #[doc = "Bit 16 - Set NAK automatically on babble"] #[inline(always)] #[must_use] - pub fn nak_on_bble(&mut self) -> NakOnBbleW { - NakOnBbleW::new(self, 16) + pub fn nak_on_bble(&mut self) -> NAK_ON_BBLE_W { + NAK_ON_BBLE_W::new(self, 16) } #[doc = "Bit 17 - Enable continue on BNA"] #[inline(always)] #[must_use] - pub fn en_cont_on_bna(&mut self) -> EnContOnBnaW { - EnContOnBnaW::new(self, 17) + pub fn en_cont_on_bna(&mut self) -> EN_CONT_ON_BNA_W { + EN_CONT_ON_BNA_W::new(self, 17) } } #[doc = "Device Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DctlSpec; -impl crate::RegisterSpec for DctlSpec { +pub struct DCTL_SPEC; +impl crate::RegisterSpec for DCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dctl::R`](R) reader structure"] -impl crate::Readable for DctlSpec {} +impl crate::Readable for DCTL_SPEC {} #[doc = "`write(|w| ..)` method takes [`dctl::W`](W) writer structure"] -impl crate::Writable for DctlSpec { +impl crate::Writable for DCTL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DCTL to value 0x02"] -impl crate::Resettable for DctlSpec { +impl crate::Resettable for DCTL_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/usb0/diepempmsk.rs b/src/usb0/diepempmsk.rs index 28a99142..df3e9c8d 100644 --- a/src/usb0/diepempmsk.rs +++ b/src/usb0/diepempmsk.rs @@ -1,40 +1,40 @@ #[doc = "Register `DIEPEMPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPEMPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `InEpTxfEmpMsk` reader - IN EP Tx FIFO Empty Interrupt Mask Bits"] -pub type InEpTxfEmpMskR = crate::FieldReader; +pub type IN_EP_TXF_EMP_MSK_R = crate::FieldReader; #[doc = "Field `InEpTxfEmpMsk` writer - IN EP Tx FIFO Empty Interrupt Mask Bits"] -pub type InEpTxfEmpMskW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type IN_EP_TXF_EMP_MSK_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"] #[inline(always)] - pub fn in_ep_txf_emp_msk(&self) -> InEpTxfEmpMskR { - InEpTxfEmpMskR::new((self.bits & 0xffff) as u16) + pub fn in_ep_txf_emp_msk(&self) -> IN_EP_TXF_EMP_MSK_R { + IN_EP_TXF_EMP_MSK_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"] #[inline(always)] #[must_use] - pub fn in_ep_txf_emp_msk(&mut self) -> InEpTxfEmpMskW { - InEpTxfEmpMskW::new(self, 0) + pub fn in_ep_txf_emp_msk(&mut self) -> IN_EP_TXF_EMP_MSK_W { + IN_EP_TXF_EMP_MSK_W::new(self, 0) } } #[doc = "Device IN Endpoint FIFO Empty Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepempmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepempmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepempmskSpec; -impl crate::RegisterSpec for DiepempmskSpec { +pub struct DIEPEMPMSK_SPEC; +impl crate::RegisterSpec for DIEPEMPMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepempmsk::R`](R) reader structure"] -impl crate::Readable for DiepempmskSpec {} +impl crate::Readable for DIEPEMPMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepempmsk::W`](W) writer structure"] -impl crate::Writable for DiepempmskSpec { +impl crate::Writable for DIEPEMPMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPEMPMSK to value 0"] -impl crate::Resettable for DiepempmskSpec { +impl crate::Resettable for DIEPEMPMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/diepmsk.rs b/src/usb0/diepmsk.rs index 215aaa1b..fe3ff1db 100644 --- a/src/usb0/diepmsk.rs +++ b/src/usb0/diepmsk.rs @@ -1,160 +1,160 @@ #[doc = "Register `DIEPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferComplMsk` reader - Transfer Completed Interrupt Mask"] -pub type XferComplMskR = crate::BitReader; +pub type XFER_COMPL_MSK_R = crate::BitReader; #[doc = "Field `XferComplMsk` writer - Transfer Completed Interrupt Mask"] -pub type XferComplMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbldMsk` reader - Endpoint Disabled Interrupt Mask"] -pub type EpdisbldMskR = crate::BitReader; +pub type EPDISBLD_MSK_R = crate::BitReader; #[doc = "Field `EPDisbldMsk` writer - Endpoint Disabled Interrupt Mask"] -pub type EpdisbldMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErrMsk` reader - AHB Error Mask"] -pub type AhberrMskR = crate::BitReader; +pub type AHBERR_MSK_R = crate::BitReader; #[doc = "Field `AHBErrMsk` writer - AHB Error Mask"] -pub type AhberrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUTMsk` reader - Timeout Condition Mask"] -pub type TimeOutmskR = crate::BitReader; +pub type TIME_OUTMSK_R = crate::BitReader; #[doc = "Field `TimeOUTMsk` writer - Timeout Condition Mask"] -pub type TimeOutmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TIME_OUTMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmpMsk` reader - IN Token Received When TxFIFO Empty Mask"] -pub type IntknTxfempMskR = crate::BitReader; +pub type INTKN_TXFEMP_MSK_R = crate::BitReader; #[doc = "Field `INTknTXFEmpMsk` writer - IN Token Received When TxFIFO Empty Mask"] -pub type IntknTxfempMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INTKN_TXFEMP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEffMsk` reader - IN Endpoint NAK Effective Mask"] -pub type InepnakEffMskR = crate::BitReader; +pub type INEPNAK_EFF_MSK_R = crate::BitReader; #[doc = "Field `INEPNakEffMsk` writer - IN Endpoint NAK Effective Mask"] -pub type InepnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INEPNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxfifoUndrnMsk` reader - Fifo Underrun Mask"] -pub type TxfifoUndrnMskR = crate::BitReader; +pub type TXFIFO_UNDRN_MSK_R = crate::BitReader; #[doc = "Field `TxfifoUndrnMsk` writer - Fifo Underrun Mask"] -pub type TxfifoUndrnMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TXFIFO_UNDRN_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAInIntrMsk` reader - BNA Interrupt Mask"] -pub type BnainIntrMskR = crate::BitReader; +pub type BNAIN_INTR_MSK_R = crate::BitReader; #[doc = "Field `BNAInIntrMsk` writer - BNA Interrupt Mask"] -pub type BnainIntrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNAIN_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKMsk` reader - NAK interrupt Mask"] -pub type NakmskR = crate::BitReader; +pub type NAKMSK_R = crate::BitReader; #[doc = "Field `NAKMsk` writer - NAK interrupt Mask"] -pub type NakmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NAKMSK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - pub fn xfer_compl_msk(&self) -> XferComplMskR { - XferComplMskR::new((self.bits & 1) != 0) + pub fn xfer_compl_msk(&self) -> XFER_COMPL_MSK_R { + XFER_COMPL_MSK_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - pub fn epdisbld_msk(&self) -> EpdisbldMskR { - EpdisbldMskR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld_msk(&self) -> EPDISBLD_MSK_R { + EPDISBLD_MSK_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] - pub fn ahberr_msk(&self) -> AhberrMskR { - AhberrMskR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr_msk(&self) -> AHBERR_MSK_R { + AHBERR_MSK_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition Mask"] #[inline(always)] - pub fn time_outmsk(&self) -> TimeOutmskR { - TimeOutmskR::new(((self.bits >> 3) & 1) != 0) + pub fn time_outmsk(&self) -> TIME_OUTMSK_R { + TIME_OUTMSK_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"] #[inline(always)] - pub fn intkn_txfemp_msk(&self) -> IntknTxfempMskR { - IntknTxfempMskR::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp_msk(&self) -> INTKN_TXFEMP_MSK_R { + INTKN_TXFEMP_MSK_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"] #[inline(always)] - pub fn inepnak_eff_msk(&self) -> InepnakEffMskR { - InepnakEffMskR::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff_msk(&self) -> INEPNAK_EFF_MSK_R { + INEPNAK_EFF_MSK_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Fifo Underrun Mask"] #[inline(always)] - pub fn txfifo_undrn_msk(&self) -> TxfifoUndrnMskR { - TxfifoUndrnMskR::new(((self.bits >> 8) & 1) != 0) + pub fn txfifo_undrn_msk(&self) -> TXFIFO_UNDRN_MSK_R { + TXFIFO_UNDRN_MSK_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - BNA Interrupt Mask"] #[inline(always)] - pub fn bnain_intr_msk(&self) -> BnainIntrMskR { - BnainIntrMskR::new(((self.bits >> 9) & 1) != 0) + pub fn bnain_intr_msk(&self) -> BNAIN_INTR_MSK_R { + BNAIN_INTR_MSK_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt Mask"] #[inline(always)] - pub fn nakmsk(&self) -> NakmskR { - NakmskR::new(((self.bits >> 13) & 1) != 0) + pub fn nakmsk(&self) -> NAKMSK_R { + NAKMSK_R::new(((self.bits >> 13) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] #[must_use] - pub fn xfer_compl_msk(&mut self) -> XferComplMskW { - XferComplMskW::new(self, 0) + pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { + XFER_COMPL_MSK_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] #[must_use] - pub fn epdisbld_msk(&mut self) -> EpdisbldMskW { - EpdisbldMskW::new(self, 1) + pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { + EPDISBLD_MSK_W::new(self, 1) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] #[must_use] - pub fn ahberr_msk(&mut self) -> AhberrMskW { - AhberrMskW::new(self, 2) + pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { + AHBERR_MSK_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition Mask"] #[inline(always)] #[must_use] - pub fn time_outmsk(&mut self) -> TimeOutmskW { - TimeOutmskW::new(self, 3) + pub fn time_outmsk(&mut self) -> TIME_OUTMSK_W { + TIME_OUTMSK_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"] #[inline(always)] #[must_use] - pub fn intkn_txfemp_msk(&mut self) -> IntknTxfempMskW { - IntknTxfempMskW::new(self, 4) + pub fn intkn_txfemp_msk(&mut self) -> INTKN_TXFEMP_MSK_W { + INTKN_TXFEMP_MSK_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn inepnak_eff_msk(&mut self) -> InepnakEffMskW { - InepnakEffMskW::new(self, 6) + pub fn inepnak_eff_msk(&mut self) -> INEPNAK_EFF_MSK_W { + INEPNAK_EFF_MSK_W::new(self, 6) } #[doc = "Bit 8 - Fifo Underrun Mask"] #[inline(always)] #[must_use] - pub fn txfifo_undrn_msk(&mut self) -> TxfifoUndrnMskW { - TxfifoUndrnMskW::new(self, 8) + pub fn txfifo_undrn_msk(&mut self) -> TXFIFO_UNDRN_MSK_W { + TXFIFO_UNDRN_MSK_W::new(self, 8) } #[doc = "Bit 9 - BNA Interrupt Mask"] #[inline(always)] #[must_use] - pub fn bnain_intr_msk(&mut self) -> BnainIntrMskW { - BnainIntrMskW::new(self, 9) + pub fn bnain_intr_msk(&mut self) -> BNAIN_INTR_MSK_W { + BNAIN_INTR_MSK_W::new(self, 9) } #[doc = "Bit 13 - NAK interrupt Mask"] #[inline(always)] #[must_use] - pub fn nakmsk(&mut self) -> NakmskW { - NakmskW::new(self, 13) + pub fn nakmsk(&mut self) -> NAKMSK_W { + NAKMSK_W::new(self, 13) } } #[doc = "Device IN Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepmskSpec; -impl crate::RegisterSpec for DiepmskSpec { +pub struct DIEPMSK_SPEC; +impl crate::RegisterSpec for DIEPMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepmsk::R`](R) reader structure"] -impl crate::Readable for DiepmskSpec {} +impl crate::Readable for DIEPMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepmsk::W`](W) writer structure"] -impl crate::Writable for DiepmskSpec { +impl crate::Writable for DIEPMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPMSK to value 0"] -impl crate::Resettable for DiepmskSpec { +impl crate::Resettable for DIEPMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dieptxf1.rs b/src/usb0/dieptxf1.rs index 31e4854b..19d0dc03 100644 --- a/src/usb0/dieptxf1.rs +++ b/src/usb0/dieptxf1.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 1 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf1Spec; -impl crate::RegisterSpec for Dieptxf1Spec { +pub struct DIEPTXF1_SPEC; +impl crate::RegisterSpec for DIEPTXF1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf1::R`](R) reader structure"] -impl crate::Readable for Dieptxf1Spec {} +impl crate::Readable for DIEPTXF1_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf1::W`](W) writer structure"] -impl crate::Writable for Dieptxf1Spec { +impl crate::Writable for DIEPTXF1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF1 to value 0x0100_012a"] -impl crate::Resettable for Dieptxf1Spec { +impl crate::Resettable for DIEPTXF1_SPEC { const RESET_VALUE: u32 = 0x0100_012a; } diff --git a/src/usb0/dieptxf2.rs b/src/usb0/dieptxf2.rs index 0b1b9d6f..d7c78f30 100644 --- a/src/usb0/dieptxf2.rs +++ b/src/usb0/dieptxf2.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF2` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF2` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 2 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf2::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf2::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf2Spec; -impl crate::RegisterSpec for Dieptxf2Spec { +pub struct DIEPTXF2_SPEC; +impl crate::RegisterSpec for DIEPTXF2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf2::R`](R) reader structure"] -impl crate::Readable for Dieptxf2Spec {} +impl crate::Readable for DIEPTXF2_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf2::W`](W) writer structure"] -impl crate::Writable for Dieptxf2Spec { +impl crate::Writable for DIEPTXF2_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF2 to value 0x0100_022a"] -impl crate::Resettable for Dieptxf2Spec { +impl crate::Resettable for DIEPTXF2_SPEC { const RESET_VALUE: u32 = 0x0100_022a; } diff --git a/src/usb0/dieptxf3.rs b/src/usb0/dieptxf3.rs index 474e81c4..63ab6094 100644 --- a/src/usb0/dieptxf3.rs +++ b/src/usb0/dieptxf3.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF3` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF3` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 3 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf3::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf3::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf3Spec; -impl crate::RegisterSpec for Dieptxf3Spec { +pub struct DIEPTXF3_SPEC; +impl crate::RegisterSpec for DIEPTXF3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf3::R`](R) reader structure"] -impl crate::Readable for Dieptxf3Spec {} +impl crate::Readable for DIEPTXF3_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf3::W`](W) writer structure"] -impl crate::Writable for Dieptxf3Spec { +impl crate::Writable for DIEPTXF3_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF3 to value 0x0100_032a"] -impl crate::Resettable for Dieptxf3Spec { +impl crate::Resettable for DIEPTXF3_SPEC { const RESET_VALUE: u32 = 0x0100_032a; } diff --git a/src/usb0/dieptxf4.rs b/src/usb0/dieptxf4.rs index 37ed29f4..bdc1273e 100644 --- a/src/usb0/dieptxf4.rs +++ b/src/usb0/dieptxf4.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF4` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF4` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 4 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf4::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf4::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf4Spec; -impl crate::RegisterSpec for Dieptxf4Spec { +pub struct DIEPTXF4_SPEC; +impl crate::RegisterSpec for DIEPTXF4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf4::R`](R) reader structure"] -impl crate::Readable for Dieptxf4Spec {} +impl crate::Readable for DIEPTXF4_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf4::W`](W) writer structure"] -impl crate::Writable for Dieptxf4Spec { +impl crate::Writable for DIEPTXF4_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF4 to value 0x0100_042a"] -impl crate::Resettable for Dieptxf4Spec { +impl crate::Resettable for DIEPTXF4_SPEC { const RESET_VALUE: u32 = 0x0100_042a; } diff --git a/src/usb0/dieptxf5.rs b/src/usb0/dieptxf5.rs index fcc9d7e0..26c08a45 100644 --- a/src/usb0/dieptxf5.rs +++ b/src/usb0/dieptxf5.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF5` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF5` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 5 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf5::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf5Spec; -impl crate::RegisterSpec for Dieptxf5Spec { +pub struct DIEPTXF5_SPEC; +impl crate::RegisterSpec for DIEPTXF5_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf5::R`](R) reader structure"] -impl crate::Readable for Dieptxf5Spec {} +impl crate::Readable for DIEPTXF5_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf5::W`](W) writer structure"] -impl crate::Writable for Dieptxf5Spec { +impl crate::Writable for DIEPTXF5_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF5 to value 0x0100_052a"] -impl crate::Resettable for Dieptxf5Spec { +impl crate::Resettable for DIEPTXF5_SPEC { const RESET_VALUE: u32 = 0x0100_052a; } diff --git a/src/usb0/dieptxf6.rs b/src/usb0/dieptxf6.rs index c6002ec2..82122633 100644 --- a/src/usb0/dieptxf6.rs +++ b/src/usb0/dieptxf6.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTXF6` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTXF6` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPnTxFStAddr` reader - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrR = crate::FieldReader; +pub type INEPN_TX_FST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPnTxFStAddr` writer - IN Endpoint FIFOn Transmit RAM Start Address"] -pub type InepnTxFstAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPnTxFDep` reader - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepR = crate::FieldReader; +pub type INEPN_TX_FDEP_R = crate::FieldReader; #[doc = "Field `INEPnTxFDep` writer - IN Endpoint TxFIFO Depth"] -pub type InepnTxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPN_TX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - pub fn inepn_tx_fst_addr(&self) -> InepnTxFstAddrR { - InepnTxFstAddrR::new((self.bits & 0xffff) as u16) + pub fn inepn_tx_fst_addr(&self) -> INEPN_TX_FST_ADDR_R { + INEPN_TX_FST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - pub fn inepn_tx_fdep(&self) -> InepnTxFdepR { - InepnTxFdepR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn inepn_tx_fdep(&self) -> INEPN_TX_FDEP_R { + INEPN_TX_FDEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn inepn_tx_fst_addr(&mut self) -> InepnTxFstAddrW { - InepnTxFstAddrW::new(self, 0) + pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { + INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] #[must_use] - pub fn inepn_tx_fdep(&mut self) -> InepnTxFdepW { - InepnTxFdepW::new(self, 16) + pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { + INEPN_TX_FDEP_W::new(self, 16) } } #[doc = "Device IN Endpoint 6 Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptxf6::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptxf6::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptxf6Spec; -impl crate::RegisterSpec for Dieptxf6Spec { +pub struct DIEPTXF6_SPEC; +impl crate::RegisterSpec for DIEPTXF6_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptxf6::R`](R) reader structure"] -impl crate::Readable for Dieptxf6Spec {} +impl crate::Readable for DIEPTXF6_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptxf6::W`](W) writer structure"] -impl crate::Writable for Dieptxf6Spec { +impl crate::Writable for DIEPTXF6_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTXF6 to value 0x0100_062a"] -impl crate::Resettable for Dieptxf6Spec { +impl crate::Resettable for DIEPTXF6_SPEC { const RESET_VALUE: u32 = 0x0100_062a; } diff --git a/src/usb0/doepmsk.rs b/src/usb0/doepmsk.rs index 7b3c2fc7..e1d53228 100644 --- a/src/usb0/doepmsk.rs +++ b/src/usb0/doepmsk.rs @@ -1,190 +1,190 @@ #[doc = "Register `DOEPMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferComplMsk` reader - Transfer Completed Interrupt Mask"] -pub type XferComplMskR = crate::BitReader; +pub type XFER_COMPL_MSK_R = crate::BitReader; #[doc = "Field `XferComplMsk` writer - Transfer Completed Interrupt Mask"] -pub type XferComplMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbldMsk` reader - Endpoint Disabled Interrupt Mask"] -pub type EpdisbldMskR = crate::BitReader; +pub type EPDISBLD_MSK_R = crate::BitReader; #[doc = "Field `EPDisbldMsk` writer - Endpoint Disabled Interrupt Mask"] -pub type EpdisbldMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErrMsk` reader - AHB Error"] -pub type AhberrMskR = crate::BitReader; +pub type AHBERR_MSK_R = crate::BitReader; #[doc = "Field `AHBErrMsk` writer - AHB Error"] -pub type AhberrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUPMsk` reader - SETUP Phase Done Mask"] -pub type SetUpmskR = crate::BitReader; +pub type SET_UPMSK_R = crate::BitReader; #[doc = "Field `SetUPMsk` writer - SETUP Phase Done Mask"] -pub type SetUpmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_UPMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdisMsk` reader - OUT Token Received when Endpoint Disabled Mask"] -pub type OuttknEpdisMskR = crate::BitReader; +pub type OUTTKN_EPDIS_MSK_R = crate::BitReader; #[doc = "Field `OUTTknEPdisMsk` writer - OUT Token Received when Endpoint Disabled Mask"] -pub type OuttknEpdisMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OUTTKN_EPDIS_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received Mask"] -pub type Back2backSetupR = crate::BitReader; +pub type BACK2BACK_SETUP_R = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received Mask"] -pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OutPktErrMsk` reader - OUT Packet Error Mask"] -pub type OutPktErrMskR = crate::BitReader; +pub type OUT_PKT_ERR_MSK_R = crate::BitReader; #[doc = "Field `OutPktErrMsk` writer - OUT Packet Error Mask"] -pub type OutPktErrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OUT_PKT_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BnaOutIntrMsk` reader - BNA interrupt Mask"] -pub type BnaOutIntrMskR = crate::BitReader; +pub type BNA_OUT_INTR_MSK_R = crate::BitReader; #[doc = "Field `BnaOutIntrMsk` writer - BNA interrupt Mask"] -pub type BnaOutIntrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNA_OUT_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrMsk` reader - Babble Interrupt Mask"] -pub type BbleErrMskR = crate::BitReader; +pub type BBLE_ERR_MSK_R = crate::BitReader; #[doc = "Field `BbleErrMsk` writer - Babble Interrupt Mask"] -pub type BbleErrMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BBLE_ERR_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKMsk` reader - NAK Interrupt Mask"] -pub type NakmskR = crate::BitReader; +pub type NAKMSK_R = crate::BitReader; #[doc = "Field `NAKMsk` writer - NAK Interrupt Mask"] -pub type NakmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NAKMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETMsk` reader - NYET Interrupt Mask"] -pub type NyetmskR = crate::BitReader; +pub type NYETMSK_R = crate::BitReader; #[doc = "Field `NYETMsk` writer - NYET Interrupt Mask"] -pub type NyetmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NYETMSK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - pub fn xfer_compl_msk(&self) -> XferComplMskR { - XferComplMskR::new((self.bits & 1) != 0) + pub fn xfer_compl_msk(&self) -> XFER_COMPL_MSK_R { + XFER_COMPL_MSK_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - pub fn epdisbld_msk(&self) -> EpdisbldMskR { - EpdisbldMskR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld_msk(&self) -> EPDISBLD_MSK_R { + EPDISBLD_MSK_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr_msk(&self) -> AhberrMskR { - AhberrMskR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr_msk(&self) -> AHBERR_MSK_R { + AHBERR_MSK_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done Mask"] #[inline(always)] - pub fn set_upmsk(&self) -> SetUpmskR { - SetUpmskR::new(((self.bits >> 3) & 1) != 0) + pub fn set_upmsk(&self) -> SET_UPMSK_R { + SET_UPMSK_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"] #[inline(always)] - pub fn outtkn_epdis_msk(&self) -> OuttknEpdisMskR { - OuttknEpdisMskR::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis_msk(&self) -> OUTTKN_EPDIS_MSK_R { + OUTTKN_EPDIS_MSK_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"] #[inline(always)] - pub fn back2back_setup(&self) -> Back2backSetupR { - Back2backSetupR::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { + BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - OUT Packet Error Mask"] #[inline(always)] - pub fn out_pkt_err_msk(&self) -> OutPktErrMskR { - OutPktErrMskR::new(((self.bits >> 8) & 1) != 0) + pub fn out_pkt_err_msk(&self) -> OUT_PKT_ERR_MSK_R { + OUT_PKT_ERR_MSK_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - BNA interrupt Mask"] #[inline(always)] - pub fn bna_out_intr_msk(&self) -> BnaOutIntrMskR { - BnaOutIntrMskR::new(((self.bits >> 9) & 1) != 0) + pub fn bna_out_intr_msk(&self) -> BNA_OUT_INTR_MSK_R { + BNA_OUT_INTR_MSK_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 12 - Babble Interrupt Mask"] #[inline(always)] - pub fn bble_err_msk(&self) -> BbleErrMskR { - BbleErrMskR::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_msk(&self) -> BBLE_ERR_MSK_R { + BBLE_ERR_MSK_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK Interrupt Mask"] #[inline(always)] - pub fn nakmsk(&self) -> NakmskR { - NakmskR::new(((self.bits >> 13) & 1) != 0) + pub fn nakmsk(&self) -> NAKMSK_R { + NAKMSK_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET Interrupt Mask"] #[inline(always)] - pub fn nyetmsk(&self) -> NyetmskR { - NyetmskR::new(((self.bits >> 14) & 1) != 0) + pub fn nyetmsk(&self) -> NYETMSK_R { + NYETMSK_R::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] #[must_use] - pub fn xfer_compl_msk(&mut self) -> XferComplMskW { - XferComplMskW::new(self, 0) + pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { + XFER_COMPL_MSK_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] #[must_use] - pub fn epdisbld_msk(&mut self) -> EpdisbldMskW { - EpdisbldMskW::new(self, 1) + pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { + EPDISBLD_MSK_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr_msk(&mut self) -> AhberrMskW { - AhberrMskW::new(self, 2) + pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { + AHBERR_MSK_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done Mask"] #[inline(always)] #[must_use] - pub fn set_upmsk(&mut self) -> SetUpmskW { - SetUpmskW::new(self, 3) + pub fn set_upmsk(&mut self) -> SET_UPMSK_W { + SET_UPMSK_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"] #[inline(always)] #[must_use] - pub fn outtkn_epdis_msk(&mut self) -> OuttknEpdisMskW { - OuttknEpdisMskW::new(self, 4) + pub fn outtkn_epdis_msk(&mut self) -> OUTTKN_EPDIS_MSK_W { + OUTTKN_EPDIS_MSK_W::new(self, 4) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> Back2backSetupW { - Back2backSetupW::new(self, 6) + pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { + BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 8 - OUT Packet Error Mask"] #[inline(always)] #[must_use] - pub fn out_pkt_err_msk(&mut self) -> OutPktErrMskW { - OutPktErrMskW::new(self, 8) + pub fn out_pkt_err_msk(&mut self) -> OUT_PKT_ERR_MSK_W { + OUT_PKT_ERR_MSK_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt Mask"] #[inline(always)] #[must_use] - pub fn bna_out_intr_msk(&mut self) -> BnaOutIntrMskW { - BnaOutIntrMskW::new(self, 9) + pub fn bna_out_intr_msk(&mut self) -> BNA_OUT_INTR_MSK_W { + BNA_OUT_INTR_MSK_W::new(self, 9) } #[doc = "Bit 12 - Babble Interrupt Mask"] #[inline(always)] #[must_use] - pub fn bble_err_msk(&mut self) -> BbleErrMskW { - BbleErrMskW::new(self, 12) + pub fn bble_err_msk(&mut self) -> BBLE_ERR_MSK_W { + BBLE_ERR_MSK_W::new(self, 12) } #[doc = "Bit 13 - NAK Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nakmsk(&mut self) -> NakmskW { - NakmskW::new(self, 13) + pub fn nakmsk(&mut self) -> NAKMSK_W { + NAKMSK_W::new(self, 13) } #[doc = "Bit 14 - NYET Interrupt Mask"] #[inline(always)] #[must_use] - pub fn nyetmsk(&mut self) -> NyetmskW { - NyetmskW::new(self, 14) + pub fn nyetmsk(&mut self) -> NYETMSK_W { + NYETMSK_W::new(self, 14) } } #[doc = "Device OUT Endpoint Common Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepmskSpec; -impl crate::RegisterSpec for DoepmskSpec { +pub struct DOEPMSK_SPEC; +impl crate::RegisterSpec for DOEPMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepmsk::R`](R) reader structure"] -impl crate::Readable for DoepmskSpec {} +impl crate::Readable for DOEPMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepmsk::W`](W) writer structure"] -impl crate::Writable for DoepmskSpec { +impl crate::Writable for DOEPMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPMSK to value 0"] -impl crate::Resettable for DoepmskSpec { +impl crate::Resettable for DOEPMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/dsts.rs b/src/usb0/dsts.rs index d8afc860..d4417448 100644 --- a/src/usb0/dsts.rs +++ b/src/usb0/dsts.rs @@ -1,75 +1,75 @@ #[doc = "Register `DSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `SuspSts` reader - Suspend Status"] -pub type SuspStsR = crate::BitReader; +pub type SUSP_STS_R = crate::BitReader; #[doc = "Enumerated Speed\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum EnumSpd { +pub enum ENUM_SPD_A { #[doc = "3: Full speed (PHY clock is running at 48 MHz)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: EnumSpd) -> Self { + fn from(variant: ENUM_SPD_A) -> Self { variant as _ } } -impl crate::FieldSpec for EnumSpd { +impl crate::FieldSpec for ENUM_SPD_A { type Ux = u8; } -impl crate::IsEnum for EnumSpd {} +impl crate::IsEnum for ENUM_SPD_A {} #[doc = "Field `EnumSpd` reader - Enumerated Speed"] -pub type EnumSpdR = crate::FieldReader; -impl EnumSpdR { +pub type ENUM_SPD_R = crate::FieldReader; +impl ENUM_SPD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 3 => Some(EnumSpd::Value4), + 3 => Some(ENUM_SPD_A::VALUE4), _ => None, } } #[doc = "Full speed (PHY clock is running at 48 MHz)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == EnumSpd::Value4 + *self == ENUM_SPD_A::VALUE4 } } #[doc = "Field `ErrticErr` reader - Erratic Error"] -pub type ErrticErrR = crate::BitReader; +pub type ERRTIC_ERR_R = crate::BitReader; #[doc = "Field `SOFFN` reader - Frame Number of the Received SOF"] -pub type SoffnR = crate::FieldReader; +pub type SOFFN_R = crate::FieldReader; impl R { #[doc = "Bit 0 - Suspend Status"] #[inline(always)] - pub fn susp_sts(&self) -> SuspStsR { - SuspStsR::new((self.bits & 1) != 0) + pub fn susp_sts(&self) -> SUSP_STS_R { + SUSP_STS_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:2 - Enumerated Speed"] #[inline(always)] - pub fn enum_spd(&self) -> EnumSpdR { - EnumSpdR::new(((self.bits >> 1) & 3) as u8) + pub fn enum_spd(&self) -> ENUM_SPD_R { + ENUM_SPD_R::new(((self.bits >> 1) & 3) as u8) } #[doc = "Bit 3 - Erratic Error"] #[inline(always)] - pub fn errtic_err(&self) -> ErrticErrR { - ErrticErrR::new(((self.bits >> 3) & 1) != 0) + pub fn errtic_err(&self) -> ERRTIC_ERR_R { + ERRTIC_ERR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 8:21 - Frame Number of the Received SOF"] #[inline(always)] - pub fn soffn(&self) -> SoffnR { - SoffnR::new(((self.bits >> 8) & 0x3fff) as u16) + pub fn soffn(&self) -> SOFFN_R { + SOFFN_R::new(((self.bits >> 8) & 0x3fff) as u16) } } #[doc = "Device Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DstsSpec; -impl crate::RegisterSpec for DstsSpec { +pub struct DSTS_SPEC; +impl crate::RegisterSpec for DSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dsts::R`](R) reader structure"] -impl crate::Readable for DstsSpec {} +impl crate::Readable for DSTS_SPEC {} #[doc = "`reset()` method sets DSTS to value 0x02"] -impl crate::Resettable for DstsSpec { +impl crate::Resettable for DSTS_SPEC { const RESET_VALUE: u32 = 0x02; } diff --git a/src/usb0/dvbusdis.rs b/src/usb0/dvbusdis.rs index f085c704..a0bc914f 100644 --- a/src/usb0/dvbusdis.rs +++ b/src/usb0/dvbusdis.rs @@ -1,40 +1,40 @@ #[doc = "Register `DVBUSDIS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DVBUSDIS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DVBUSDis` reader - Device Vbus Discharge Time"] -pub type DvbusdisR = crate::FieldReader; +pub type DVBUSDIS_R = crate::FieldReader; #[doc = "Field `DVBUSDis` writer - Device Vbus Discharge Time"] -pub type DvbusdisW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type DVBUSDIS_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Device Vbus Discharge Time"] #[inline(always)] - pub fn dvbusdis(&self) -> DvbusdisR { - DvbusdisR::new((self.bits & 0xffff) as u16) + pub fn dvbusdis(&self) -> DVBUSDIS_R { + DVBUSDIS_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Device Vbus Discharge Time"] #[inline(always)] #[must_use] - pub fn dvbusdis(&mut self) -> DvbusdisW { - DvbusdisW::new(self, 0) + pub fn dvbusdis(&mut self) -> DVBUSDIS_W { + DVBUSDIS_W::new(self, 0) } } #[doc = "Device VBUS Discharge Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbusdis::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbusdis::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DvbusdisSpec; -impl crate::RegisterSpec for DvbusdisSpec { +pub struct DVBUSDIS_SPEC; +impl crate::RegisterSpec for DVBUSDIS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dvbusdis::R`](R) reader structure"] -impl crate::Readable for DvbusdisSpec {} +impl crate::Readable for DVBUSDIS_SPEC {} #[doc = "`write(|w| ..)` method takes [`dvbusdis::W`](W) writer structure"] -impl crate::Writable for DvbusdisSpec { +impl crate::Writable for DVBUSDIS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DVBUSDIS to value 0x17d7"] -impl crate::Resettable for DvbusdisSpec { +impl crate::Resettable for DVBUSDIS_SPEC { const RESET_VALUE: u32 = 0x17d7; } diff --git a/src/usb0/dvbuspulse.rs b/src/usb0/dvbuspulse.rs index 8bbd4e63..52659d2b 100644 --- a/src/usb0/dvbuspulse.rs +++ b/src/usb0/dvbuspulse.rs @@ -1,40 +1,40 @@ #[doc = "Register `DVBUSPULSE` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DVBUSPULSE` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DVBUSPulse` reader - Device Vbus Pulsing Time"] -pub type DvbuspulseR = crate::FieldReader; +pub type DVBUSPULSE_R = crate::FieldReader; #[doc = "Field `DVBUSPulse` writer - Device Vbus Pulsing Time"] -pub type DvbuspulseW<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type DVBUSPULSE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Device Vbus Pulsing Time"] #[inline(always)] - pub fn dvbuspulse(&self) -> DvbuspulseR { - DvbuspulseR::new((self.bits & 0x0fff) as u16) + pub fn dvbuspulse(&self) -> DVBUSPULSE_R { + DVBUSPULSE_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Device Vbus Pulsing Time"] #[inline(always)] #[must_use] - pub fn dvbuspulse(&mut self) -> DvbuspulseW { - DvbuspulseW::new(self, 0) + pub fn dvbuspulse(&mut self) -> DVBUSPULSE_W { + DVBUSPULSE_W::new(self, 0) } } #[doc = "Device VBUS Pulsing Time Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dvbuspulse::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dvbuspulse::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DvbuspulseSpec; -impl crate::RegisterSpec for DvbuspulseSpec { +pub struct DVBUSPULSE_SPEC; +impl crate::RegisterSpec for DVBUSPULSE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dvbuspulse::R`](R) reader structure"] -impl crate::Readable for DvbuspulseSpec {} +impl crate::Readable for DVBUSPULSE_SPEC {} #[doc = "`write(|w| ..)` method takes [`dvbuspulse::W`](W) writer structure"] -impl crate::Writable for DvbuspulseSpec { +impl crate::Writable for DVBUSPULSE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DVBUSPULSE to value 0x05b8"] -impl crate::Resettable for DvbuspulseSpec { +impl crate::Resettable for DVBUSPULSE_SPEC { const RESET_VALUE: u32 = 0x05b8; } diff --git a/src/usb0/gahbcfg.rs b/src/usb0/gahbcfg.rs index 1e4165de..f8a3a7e6 100644 --- a/src/usb0/gahbcfg.rs +++ b/src/usb0/gahbcfg.rs @@ -1,129 +1,129 @@ #[doc = "Register `GAHBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GAHBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Global Interrupt Mask\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum GlblIntrMsk { +pub enum GLBL_INTR_MSK_A { #[doc = "0: Mask the interrupt assertion to the application."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Unmask the interrupt assertion to the application."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: GlblIntrMsk) -> Self { + fn from(variant: GLBL_INTR_MSK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GlblIntrMsk` reader - Global Interrupt Mask"] -pub type GlblIntrMskR = crate::BitReader; -impl GlblIntrMskR { +pub type GLBL_INTR_MSK_R = crate::BitReader; +impl GLBL_INTR_MSK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> GlblIntrMsk { + pub const fn variant(&self) -> GLBL_INTR_MSK_A { match self.bits { - false => GlblIntrMsk::Value1, - true => GlblIntrMsk::Value2, + false => GLBL_INTR_MSK_A::VALUE1, + true => GLBL_INTR_MSK_A::VALUE2, } } #[doc = "Mask the interrupt assertion to the application."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == GlblIntrMsk::Value1 + *self == GLBL_INTR_MSK_A::VALUE1 } #[doc = "Unmask the interrupt assertion to the application."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == GlblIntrMsk::Value2 + *self == GLBL_INTR_MSK_A::VALUE2 } } #[doc = "Field `GlblIntrMsk` writer - Global Interrupt Mask"] -pub type GlblIntrMskW<'a, REG> = crate::BitWriter<'a, REG, GlblIntrMsk>; -impl<'a, REG> GlblIntrMskW<'a, REG> +pub type GLBL_INTR_MSK_W<'a, REG> = crate::BitWriter<'a, REG, GLBL_INTR_MSK_A>; +impl<'a, REG> GLBL_INTR_MSK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Mask the interrupt assertion to the application."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(GlblIntrMsk::Value1) + self.variant(GLBL_INTR_MSK_A::VALUE1) } #[doc = "Unmask the interrupt assertion to the application."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(GlblIntrMsk::Value2) + self.variant(GLBL_INTR_MSK_A::VALUE2) } } #[doc = "Burst Length/Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum HbstLen { +pub enum HBST_LEN_A { #[doc = "0: Single"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: INCR"] - Value2 = 1, + VALUE2 = 1, #[doc = "3: INCR4"] - Value3 = 3, + VALUE3 = 3, #[doc = "5: INCR8"] - Value4 = 5, + VALUE4 = 5, #[doc = "7: INCR16"] - Value5 = 7, + VALUE5 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: HbstLen) -> Self { + fn from(variant: HBST_LEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for HbstLen { +impl crate::FieldSpec for HBST_LEN_A { type Ux = u8; } -impl crate::IsEnum for HbstLen {} +impl crate::IsEnum for HBST_LEN_A {} #[doc = "Field `HBstLen` reader - Burst Length/Type"] -pub type HbstLenR = crate::FieldReader; -impl HbstLenR { +pub type HBST_LEN_R = crate::FieldReader; +impl HBST_LEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(HbstLen::Value1), - 1 => Some(HbstLen::Value2), - 3 => Some(HbstLen::Value3), - 5 => Some(HbstLen::Value4), - 7 => Some(HbstLen::Value5), + 0 => Some(HBST_LEN_A::VALUE1), + 1 => Some(HBST_LEN_A::VALUE2), + 3 => Some(HBST_LEN_A::VALUE3), + 5 => Some(HBST_LEN_A::VALUE4), + 7 => Some(HBST_LEN_A::VALUE5), _ => None, } } #[doc = "Single"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == HbstLen::Value1 + *self == HBST_LEN_A::VALUE1 } #[doc = "INCR"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == HbstLen::Value2 + *self == HBST_LEN_A::VALUE2 } #[doc = "INCR4"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == HbstLen::Value3 + *self == HBST_LEN_A::VALUE3 } #[doc = "INCR8"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == HbstLen::Value4 + *self == HBST_LEN_A::VALUE4 } #[doc = "INCR16"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == HbstLen::Value5 + *self == HBST_LEN_A::VALUE5 } } #[doc = "Field `HBstLen` writer - Burst Length/Type"] -pub type HbstLenW<'a, REG> = crate::FieldWriter<'a, REG, 4, HbstLen>; -impl<'a, REG> HbstLenW<'a, REG> +pub type HBST_LEN_W<'a, REG> = crate::FieldWriter<'a, REG, 4, HBST_LEN_A>; +impl<'a, REG> HBST_LEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -131,261 +131,261 @@ where #[doc = "Single"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(HbstLen::Value1) + self.variant(HBST_LEN_A::VALUE1) } #[doc = "INCR"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(HbstLen::Value2) + self.variant(HBST_LEN_A::VALUE2) } #[doc = "INCR4"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(HbstLen::Value3) + self.variant(HBST_LEN_A::VALUE3) } #[doc = "INCR8"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(HbstLen::Value4) + self.variant(HBST_LEN_A::VALUE4) } #[doc = "INCR16"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(HbstLen::Value5) + self.variant(HBST_LEN_A::VALUE5) } } #[doc = "DMA Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dmaen { +pub enum DMAEN_A { #[doc = "0: Core operates in Slave mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Core operates in a DMA mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dmaen) -> Self { + fn from(variant: DMAEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DMAEn` reader - DMA Enable"] -pub type DmaenR = crate::BitReader; -impl DmaenR { +pub type DMAEN_R = crate::BitReader; +impl DMAEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dmaen { + pub const fn variant(&self) -> DMAEN_A { match self.bits { - false => Dmaen::Value1, - true => Dmaen::Value2, + false => DMAEN_A::VALUE1, + true => DMAEN_A::VALUE2, } } #[doc = "Core operates in Slave mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dmaen::Value1 + *self == DMAEN_A::VALUE1 } #[doc = "Core operates in a DMA mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dmaen::Value2 + *self == DMAEN_A::VALUE2 } } #[doc = "Field `DMAEn` writer - DMA Enable"] -pub type DmaenW<'a, REG> = crate::BitWriter<'a, REG, Dmaen>; -impl<'a, REG> DmaenW<'a, REG> +pub type DMAEN_W<'a, REG> = crate::BitWriter<'a, REG, DMAEN_A>; +impl<'a, REG> DMAEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Core operates in Slave mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dmaen::Value1) + self.variant(DMAEN_A::VALUE1) } #[doc = "Core operates in a DMA mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dmaen::Value2) + self.variant(DMAEN_A::VALUE2) } } #[doc = "Non-Periodic TxFIFO Empty Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum NptxFempLvl { +pub enum NPTX_FEMP_LVL_A { #[doc = "0: DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: NptxFempLvl) -> Self { + fn from(variant: NPTX_FEMP_LVL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NPTxFEmpLvl` reader - Non-Periodic TxFIFO Empty Level"] -pub type NptxFempLvlR = crate::BitReader; -impl NptxFempLvlR { +pub type NPTX_FEMP_LVL_R = crate::BitReader; +impl NPTX_FEMP_LVL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> NptxFempLvl { + pub const fn variant(&self) -> NPTX_FEMP_LVL_A { match self.bits { - false => NptxFempLvl::Value1, - true => NptxFempLvl::Value2, + false => NPTX_FEMP_LVL_A::VALUE1, + true => NPTX_FEMP_LVL_A::VALUE2, } } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == NptxFempLvl::Value1 + *self == NPTX_FEMP_LVL_A::VALUE1 } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == NptxFempLvl::Value2 + *self == NPTX_FEMP_LVL_A::VALUE2 } } #[doc = "Field `NPTxFEmpLvl` writer - Non-Periodic TxFIFO Empty Level"] -pub type NptxFempLvlW<'a, REG> = crate::BitWriter<'a, REG, NptxFempLvl>; -impl<'a, REG> NptxFempLvlW<'a, REG> +pub type NPTX_FEMP_LVL_W<'a, REG> = crate::BitWriter<'a, REG, NPTX_FEMP_LVL_A>; +impl<'a, REG> NPTX_FEMP_LVL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is half empty"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(NptxFempLvl::Value1) + self.variant(NPTX_FEMP_LVL_A::VALUE1) } #[doc = "DIEPINTx.TxFEmp interrupt indicates that the IN Endpoint TxFIFO is completely empty"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(NptxFempLvl::Value2) + self.variant(NPTX_FEMP_LVL_A::VALUE2) } } #[doc = "AHB Single Support\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ahbsingle { +pub enum AHBSINGLE_A { #[doc = "0: The remaining data in a transfer is sent using INCR burst size. This is the default mode."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The remaining data in a transfer is sent using single burst size."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ahbsingle) -> Self { + fn from(variant: AHBSINGLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AHBSingle` reader - AHB Single Support"] -pub type AhbsingleR = crate::BitReader; -impl AhbsingleR { +pub type AHBSINGLE_R = crate::BitReader; +impl AHBSINGLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ahbsingle { + pub const fn variant(&self) -> AHBSINGLE_A { match self.bits { - false => Ahbsingle::Value1, - true => Ahbsingle::Value2, + false => AHBSINGLE_A::VALUE1, + true => AHBSINGLE_A::VALUE2, } } #[doc = "The remaining data in a transfer is sent using INCR burst size. This is the default mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ahbsingle::Value1 + *self == AHBSINGLE_A::VALUE1 } #[doc = "The remaining data in a transfer is sent using single burst size."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ahbsingle::Value2 + *self == AHBSINGLE_A::VALUE2 } } #[doc = "Field `AHBSingle` writer - AHB Single Support"] -pub type AhbsingleW<'a, REG> = crate::BitWriter<'a, REG, Ahbsingle>; -impl<'a, REG> AhbsingleW<'a, REG> +pub type AHBSINGLE_W<'a, REG> = crate::BitWriter<'a, REG, AHBSINGLE_A>; +impl<'a, REG> AHBSINGLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The remaining data in a transfer is sent using INCR burst size. This is the default mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ahbsingle::Value1) + self.variant(AHBSINGLE_A::VALUE1) } #[doc = "The remaining data in a transfer is sent using single burst size."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ahbsingle::Value2) + self.variant(AHBSINGLE_A::VALUE2) } } impl R { #[doc = "Bit 0 - Global Interrupt Mask"] #[inline(always)] - pub fn glbl_intr_msk(&self) -> GlblIntrMskR { - GlblIntrMskR::new((self.bits & 1) != 0) + pub fn glbl_intr_msk(&self) -> GLBL_INTR_MSK_R { + GLBL_INTR_MSK_R::new((self.bits & 1) != 0) } #[doc = "Bits 1:4 - Burst Length/Type"] #[inline(always)] - pub fn hbst_len(&self) -> HbstLenR { - HbstLenR::new(((self.bits >> 1) & 0x0f) as u8) + pub fn hbst_len(&self) -> HBST_LEN_R { + HBST_LEN_R::new(((self.bits >> 1) & 0x0f) as u8) } #[doc = "Bit 5 - DMA Enable"] #[inline(always)] - pub fn dmaen(&self) -> DmaenR { - DmaenR::new(((self.bits >> 5) & 1) != 0) + pub fn dmaen(&self) -> DMAEN_R { + DMAEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"] #[inline(always)] - pub fn nptx_femp_lvl(&self) -> NptxFempLvlR { - NptxFempLvlR::new(((self.bits >> 7) & 1) != 0) + pub fn nptx_femp_lvl(&self) -> NPTX_FEMP_LVL_R { + NPTX_FEMP_LVL_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 23 - AHB Single Support"] #[inline(always)] - pub fn ahbsingle(&self) -> AhbsingleR { - AhbsingleR::new(((self.bits >> 23) & 1) != 0) + pub fn ahbsingle(&self) -> AHBSINGLE_R { + AHBSINGLE_R::new(((self.bits >> 23) & 1) != 0) } } impl W { #[doc = "Bit 0 - Global Interrupt Mask"] #[inline(always)] #[must_use] - pub fn glbl_intr_msk(&mut self) -> GlblIntrMskW { - GlblIntrMskW::new(self, 0) + pub fn glbl_intr_msk(&mut self) -> GLBL_INTR_MSK_W { + GLBL_INTR_MSK_W::new(self, 0) } #[doc = "Bits 1:4 - Burst Length/Type"] #[inline(always)] #[must_use] - pub fn hbst_len(&mut self) -> HbstLenW { - HbstLenW::new(self, 1) + pub fn hbst_len(&mut self) -> HBST_LEN_W { + HBST_LEN_W::new(self, 1) } #[doc = "Bit 5 - DMA Enable"] #[inline(always)] #[must_use] - pub fn dmaen(&mut self) -> DmaenW { - DmaenW::new(self, 5) + pub fn dmaen(&mut self) -> DMAEN_W { + DMAEN_W::new(self, 5) } #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"] #[inline(always)] #[must_use] - pub fn nptx_femp_lvl(&mut self) -> NptxFempLvlW { - NptxFempLvlW::new(self, 7) + pub fn nptx_femp_lvl(&mut self) -> NPTX_FEMP_LVL_W { + NPTX_FEMP_LVL_W::new(self, 7) } #[doc = "Bit 23 - AHB Single Support"] #[inline(always)] #[must_use] - pub fn ahbsingle(&mut self) -> AhbsingleW { - AhbsingleW::new(self, 23) + pub fn ahbsingle(&mut self) -> AHBSINGLE_W { + AHBSINGLE_W::new(self, 23) } } #[doc = "AHB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gahbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gahbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GahbcfgSpec; -impl crate::RegisterSpec for GahbcfgSpec { +pub struct GAHBCFG_SPEC; +impl crate::RegisterSpec for GAHBCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gahbcfg::R`](R) reader structure"] -impl crate::Readable for GahbcfgSpec {} +impl crate::Readable for GAHBCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`gahbcfg::W`](W) writer structure"] -impl crate::Writable for GahbcfgSpec { +impl crate::Writable for GAHBCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GAHBCFG to value 0"] -impl crate::Resettable for GahbcfgSpec { +impl crate::Resettable for GAHBCFG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/gdfifocfg.rs b/src/usb0/gdfifocfg.rs index c33dd908..5d66e790 100644 --- a/src/usb0/gdfifocfg.rs +++ b/src/usb0/gdfifocfg.rs @@ -1,55 +1,55 @@ #[doc = "Register `GDFIFOCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GDFIFOCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `GDFIFOCfg` reader - GDFIFOCfg"] -pub type GdfifocfgR = crate::FieldReader; +pub type GDFIFOCFG_R = crate::FieldReader; #[doc = "Field `GDFIFOCfg` writer - GDFIFOCfg"] -pub type GdfifocfgW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type GDFIFOCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `EPInfoBaseAddr` reader - EPInfoBaseAddr"] -pub type EpinfoBaseAddrR = crate::FieldReader; +pub type EPINFO_BASE_ADDR_R = crate::FieldReader; #[doc = "Field `EPInfoBaseAddr` writer - EPInfoBaseAddr"] -pub type EpinfoBaseAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type EPINFO_BASE_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - GDFIFOCfg"] #[inline(always)] - pub fn gdfifocfg(&self) -> GdfifocfgR { - GdfifocfgR::new((self.bits & 0xffff) as u16) + pub fn gdfifocfg(&self) -> GDFIFOCFG_R { + GDFIFOCFG_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - EPInfoBaseAddr"] #[inline(always)] - pub fn epinfo_base_addr(&self) -> EpinfoBaseAddrR { - EpinfoBaseAddrR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn epinfo_base_addr(&self) -> EPINFO_BASE_ADDR_R { + EPINFO_BASE_ADDR_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - GDFIFOCfg"] #[inline(always)] #[must_use] - pub fn gdfifocfg(&mut self) -> GdfifocfgW { - GdfifocfgW::new(self, 0) + pub fn gdfifocfg(&mut self) -> GDFIFOCFG_W { + GDFIFOCFG_W::new(self, 0) } #[doc = "Bits 16:31 - EPInfoBaseAddr"] #[inline(always)] #[must_use] - pub fn epinfo_base_addr(&mut self) -> EpinfoBaseAddrW { - EpinfoBaseAddrW::new(self, 16) + pub fn epinfo_base_addr(&mut self) -> EPINFO_BASE_ADDR_W { + EPINFO_BASE_ADDR_W::new(self, 16) } } #[doc = "Global DFIFO Software Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdfifocfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdfifocfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GdfifocfgSpec; -impl crate::RegisterSpec for GdfifocfgSpec { +pub struct GDFIFOCFG_SPEC; +impl crate::RegisterSpec for GDFIFOCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gdfifocfg::R`](R) reader structure"] -impl crate::Readable for GdfifocfgSpec {} +impl crate::Readable for GDFIFOCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`gdfifocfg::W`](W) writer structure"] -impl crate::Writable for GdfifocfgSpec { +impl crate::Writable for GDFIFOCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GDFIFOCFG to value 0x027a_02b2"] -impl crate::Resettable for GdfifocfgSpec { +impl crate::Resettable for GDFIFOCFG_SPEC { const RESET_VALUE: u32 = 0x027a_02b2; } diff --git a/src/usb0/gintmsk.rs b/src/usb0/gintmsk.rs index 7308a3e4..9234bc0a 100644 --- a/src/usb0/gintmsk.rs +++ b/src/usb0/gintmsk.rs @@ -1,250 +1,250 @@ #[doc = "Register `GINTMSK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTMSK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SofMsk` reader - Start of Frame Mask"] -pub type SofMskR = crate::BitReader; +pub type SOF_MSK_R = crate::BitReader; #[doc = "Field `SofMsk` writer - Start of Frame Mask"] -pub type SofMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SOF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvlMsk` reader - Receive FIFO Non-Empty Mask"] -pub type RxFlvlMskR = crate::BitReader; +pub type RX_FLVL_MSK_R = crate::BitReader; #[doc = "Field `RxFLvlMsk` writer - Receive FIFO Non-Empty Mask"] -pub type RxFlvlMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RX_FLVL_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GINNakEffMsk` reader - Global Non-periodic IN NAK Effective Mask"] -pub type GinnakEffMskR = crate::BitReader; +pub type GINNAK_EFF_MSK_R = crate::BitReader; #[doc = "Field `GINNakEffMsk` writer - Global Non-periodic IN NAK Effective Mask"] -pub type GinnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type GINNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GOUTNakEffMsk` reader - Global OUT NAK Effective Mask"] -pub type GoutnakEffMskR = crate::BitReader; +pub type GOUTNAK_EFF_MSK_R = crate::BitReader; #[doc = "Field `GOUTNakEffMsk` writer - Global OUT NAK Effective Mask"] -pub type GoutnakEffMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type GOUTNAK_EFF_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ErlySuspMsk` reader - Early Suspend Mask"] -pub type ErlySuspMskR = crate::BitReader; +pub type ERLY_SUSP_MSK_R = crate::BitReader; #[doc = "Field `ErlySuspMsk` writer - Early Suspend Mask"] -pub type ErlySuspMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ERLY_SUSP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSuspMsk` reader - USB Suspend Mask"] -pub type UsbsuspMskR = crate::BitReader; +pub type USBSUSP_MSK_R = crate::BitReader; #[doc = "Field `USBSuspMsk` writer - USB Suspend Mask"] -pub type UsbsuspMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBSUSP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRstMsk` reader - USB Reset Mask"] -pub type UsbrstMskR = crate::BitReader; +pub type USBRST_MSK_R = crate::BitReader; #[doc = "Field `USBRstMsk` writer - USB Reset Mask"] -pub type UsbrstMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBRST_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EnumDoneMsk` reader - Enumeration Done Mask"] -pub type EnumDoneMskR = crate::BitReader; +pub type ENUM_DONE_MSK_R = crate::BitReader; #[doc = "Field `EnumDoneMsk` writer - Enumeration Done Mask"] -pub type EnumDoneMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENUM_DONE_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOOutDropMsk` reader - Isochronous OUT Packet Dropped Interrupt Mask"] -pub type IsooutDropMskR = crate::BitReader; +pub type ISOOUT_DROP_MSK_R = crate::BitReader; #[doc = "Field `ISOOutDropMsk` writer - Isochronous OUT Packet Dropped Interrupt Mask"] -pub type IsooutDropMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ISOOUT_DROP_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPFMsk` reader - End of Periodic Frame Interrupt Mask"] -pub type EopfmskR = crate::BitReader; +pub type EOPFMSK_R = crate::BitReader; #[doc = "Field `EOPFMsk` writer - End of Periodic Frame Interrupt Mask"] -pub type EopfmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EOPFMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPIntMsk` reader - IN Endpoints Interrupt Mask"] -pub type IepintMskR = crate::BitReader; +pub type IEPINT_MSK_R = crate::BitReader; #[doc = "Field `IEPIntMsk` writer - IN Endpoints Interrupt Mask"] -pub type IepintMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type IEPINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OEPIntMsk` reader - OUT Endpoints Interrupt Mask"] -pub type OepintMskR = crate::BitReader; +pub type OEPINT_MSK_R = crate::BitReader; #[doc = "Field `OEPIntMsk` writer - OUT Endpoints Interrupt Mask"] -pub type OepintMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OEPINT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incompISOINMsk` reader - Incomplete Isochronous IN Transfer Mask"] -pub type IncompIsoinmskR = crate::BitReader; +pub type INCOMP_ISOINMSK_R = crate::BitReader; #[doc = "Field `incompISOINMsk` writer - Incomplete Isochronous IN Transfer Mask"] -pub type IncompIsoinmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INCOMP_ISOINMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incomplSOOUTMsk` reader - Incomplete Isochronous OUT Transfer Mask"] -pub type IncomplSooutmskR = crate::BitReader; +pub type INCOMPL_SOOUTMSK_R = crate::BitReader; #[doc = "Field `incomplSOOUTMsk` writer - Incomplete Isochronous OUT Transfer Mask"] -pub type IncomplSooutmskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INCOMPL_SOOUTMSK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpIntMsk` reader - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WkUpIntMskR = crate::BitReader; +pub type WK_UP_INT_MSK_R = crate::BitReader; #[doc = "Field `WkUpIntMsk` writer - Resume/Remote Wakeup Detected Interrupt Mask"] -pub type WkUpIntMskW<'a, REG> = crate::BitWriter<'a, REG>; +pub type WK_UP_INT_MSK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] - pub fn sof_msk(&self) -> SofMskR { - SofMskR::new(((self.bits >> 3) & 1) != 0) + pub fn sof_msk(&self) -> SOF_MSK_R { + SOF_MSK_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] - pub fn rx_flvl_msk(&self) -> RxFlvlMskR { - RxFlvlMskR::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl_msk(&self) -> RX_FLVL_MSK_R { + RX_FLVL_MSK_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"] #[inline(always)] - pub fn ginnak_eff_msk(&self) -> GinnakEffMskR { - GinnakEffMskR::new(((self.bits >> 6) & 1) != 0) + pub fn ginnak_eff_msk(&self) -> GINNAK_EFF_MSK_R { + GINNAK_EFF_MSK_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Global OUT NAK Effective Mask"] #[inline(always)] - pub fn goutnak_eff_msk(&self) -> GoutnakEffMskR { - GoutnakEffMskR::new(((self.bits >> 7) & 1) != 0) + pub fn goutnak_eff_msk(&self) -> GOUTNAK_EFF_MSK_R { + GOUTNAK_EFF_MSK_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Early Suspend Mask"] #[inline(always)] - pub fn erly_susp_msk(&self) -> ErlySuspMskR { - ErlySuspMskR::new(((self.bits >> 10) & 1) != 0) + pub fn erly_susp_msk(&self) -> ERLY_SUSP_MSK_R { + ERLY_SUSP_MSK_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USB Suspend Mask"] #[inline(always)] - pub fn usbsusp_msk(&self) -> UsbsuspMskR { - UsbsuspMskR::new(((self.bits >> 11) & 1) != 0) + pub fn usbsusp_msk(&self) -> USBSUSP_MSK_R { + USBSUSP_MSK_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - USB Reset Mask"] #[inline(always)] - pub fn usbrst_msk(&self) -> UsbrstMskR { - UsbrstMskR::new(((self.bits >> 12) & 1) != 0) + pub fn usbrst_msk(&self) -> USBRST_MSK_R { + USBRST_MSK_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enumeration Done Mask"] #[inline(always)] - pub fn enum_done_msk(&self) -> EnumDoneMskR { - EnumDoneMskR::new(((self.bits >> 13) & 1) != 0) + pub fn enum_done_msk(&self) -> ENUM_DONE_MSK_R { + ENUM_DONE_MSK_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"] #[inline(always)] - pub fn isoout_drop_msk(&self) -> IsooutDropMskR { - IsooutDropMskR::new(((self.bits >> 14) & 1) != 0) + pub fn isoout_drop_msk(&self) -> ISOOUT_DROP_MSK_R { + ISOOUT_DROP_MSK_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"] #[inline(always)] - pub fn eopfmsk(&self) -> EopfmskR { - EopfmskR::new(((self.bits >> 15) & 1) != 0) + pub fn eopfmsk(&self) -> EOPFMSK_R { + EOPFMSK_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 18 - IN Endpoints Interrupt Mask"] #[inline(always)] - pub fn iepint_msk(&self) -> IepintMskR { - IepintMskR::new(((self.bits >> 18) & 1) != 0) + pub fn iepint_msk(&self) -> IEPINT_MSK_R { + IEPINT_MSK_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"] #[inline(always)] - pub fn oepint_msk(&self) -> OepintMskR { - OepintMskR::new(((self.bits >> 19) & 1) != 0) + pub fn oepint_msk(&self) -> OEPINT_MSK_R { + OEPINT_MSK_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"] #[inline(always)] - pub fn incomp_isoinmsk(&self) -> IncompIsoinmskR { - IncompIsoinmskR::new(((self.bits >> 20) & 1) != 0) + pub fn incomp_isoinmsk(&self) -> INCOMP_ISOINMSK_R { + INCOMP_ISOINMSK_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"] #[inline(always)] - pub fn incompl_sooutmsk(&self) -> IncomplSooutmskR { - IncomplSooutmskR::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_sooutmsk(&self) -> INCOMPL_SOOUTMSK_R { + INCOMPL_SOOUTMSK_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] - pub fn wk_up_int_msk(&self) -> WkUpIntMskR { - WkUpIntMskR::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int_msk(&self) -> WK_UP_INT_MSK_R { + WK_UP_INT_MSK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] #[must_use] - pub fn sof_msk(&mut self) -> SofMskW { - SofMskW::new(self, 3) + pub fn sof_msk(&mut self) -> SOF_MSK_W { + SOF_MSK_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] #[must_use] - pub fn rx_flvl_msk(&mut self) -> RxFlvlMskW { - RxFlvlMskW::new(self, 4) + pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W { + RX_FLVL_MSK_W::new(self, 4) } #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn ginnak_eff_msk(&mut self) -> GinnakEffMskW { - GinnakEffMskW::new(self, 6) + pub fn ginnak_eff_msk(&mut self) -> GINNAK_EFF_MSK_W { + GINNAK_EFF_MSK_W::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK Effective Mask"] #[inline(always)] #[must_use] - pub fn goutnak_eff_msk(&mut self) -> GoutnakEffMskW { - GoutnakEffMskW::new(self, 7) + pub fn goutnak_eff_msk(&mut self) -> GOUTNAK_EFF_MSK_W { + GOUTNAK_EFF_MSK_W::new(self, 7) } #[doc = "Bit 10 - Early Suspend Mask"] #[inline(always)] #[must_use] - pub fn erly_susp_msk(&mut self) -> ErlySuspMskW { - ErlySuspMskW::new(self, 10) + pub fn erly_susp_msk(&mut self) -> ERLY_SUSP_MSK_W { + ERLY_SUSP_MSK_W::new(self, 10) } #[doc = "Bit 11 - USB Suspend Mask"] #[inline(always)] #[must_use] - pub fn usbsusp_msk(&mut self) -> UsbsuspMskW { - UsbsuspMskW::new(self, 11) + pub fn usbsusp_msk(&mut self) -> USBSUSP_MSK_W { + USBSUSP_MSK_W::new(self, 11) } #[doc = "Bit 12 - USB Reset Mask"] #[inline(always)] #[must_use] - pub fn usbrst_msk(&mut self) -> UsbrstMskW { - UsbrstMskW::new(self, 12) + pub fn usbrst_msk(&mut self) -> USBRST_MSK_W { + USBRST_MSK_W::new(self, 12) } #[doc = "Bit 13 - Enumeration Done Mask"] #[inline(always)] #[must_use] - pub fn enum_done_msk(&mut self) -> EnumDoneMskW { - EnumDoneMskW::new(self, 13) + pub fn enum_done_msk(&mut self) -> ENUM_DONE_MSK_W { + ENUM_DONE_MSK_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"] #[inline(always)] #[must_use] - pub fn isoout_drop_msk(&mut self) -> IsooutDropMskW { - IsooutDropMskW::new(self, 14) + pub fn isoout_drop_msk(&mut self) -> ISOOUT_DROP_MSK_W { + ISOOUT_DROP_MSK_W::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"] #[inline(always)] #[must_use] - pub fn eopfmsk(&mut self) -> EopfmskW { - EopfmskW::new(self, 15) + pub fn eopfmsk(&mut self) -> EOPFMSK_W { + EOPFMSK_W::new(self, 15) } #[doc = "Bit 18 - IN Endpoints Interrupt Mask"] #[inline(always)] #[must_use] - pub fn iepint_msk(&mut self) -> IepintMskW { - IepintMskW::new(self, 18) + pub fn iepint_msk(&mut self) -> IEPINT_MSK_W { + IEPINT_MSK_W::new(self, 18) } #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"] #[inline(always)] #[must_use] - pub fn oepint_msk(&mut self) -> OepintMskW { - OepintMskW::new(self, 19) + pub fn oepint_msk(&mut self) -> OEPINT_MSK_W { + OEPINT_MSK_W::new(self, 19) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"] #[inline(always)] #[must_use] - pub fn incomp_isoinmsk(&mut self) -> IncompIsoinmskW { - IncompIsoinmskW::new(self, 20) + pub fn incomp_isoinmsk(&mut self) -> INCOMP_ISOINMSK_W { + INCOMP_ISOINMSK_W::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"] #[inline(always)] #[must_use] - pub fn incompl_sooutmsk(&mut self) -> IncomplSooutmskW { - IncomplSooutmskW::new(self, 21) + pub fn incompl_sooutmsk(&mut self) -> INCOMPL_SOOUTMSK_W { + INCOMPL_SOOUTMSK_W::new(self, 21) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] #[must_use] - pub fn wk_up_int_msk(&mut self) -> WkUpIntMskW { - WkUpIntMskW::new(self, 31) + pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W { + WK_UP_INT_MSK_W::new(self, 31) } } #[doc = "Interrupt Mask Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintmsk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintmsk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GintmskSpec; -impl crate::RegisterSpec for GintmskSpec { +pub struct GINTMSK_SPEC; +impl crate::RegisterSpec for GINTMSK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gintmsk::R`](R) reader structure"] -impl crate::Readable for GintmskSpec {} +impl crate::Readable for GINTMSK_SPEC {} #[doc = "`write(|w| ..)` method takes [`gintmsk::W`](W) writer structure"] -impl crate::Writable for GintmskSpec { +impl crate::Writable for GINTMSK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTMSK to value 0"] -impl crate::Resettable for GintmskSpec { +impl crate::Resettable for GINTMSK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/gintsts.rs b/src/usb0/gintsts.rs index 20283a88..3e89d334 100644 --- a/src/usb0/gintsts.rs +++ b/src/usb0/gintsts.rs @@ -1,244 +1,244 @@ #[doc = "Register `GINTSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GINTSTS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Current Mode of Operation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum CurMod { +pub enum CUR_MOD_A { #[doc = "0: Device mode"] - Value1 = 0, + VALUE1 = 0, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: CurMod) -> Self { + fn from(variant: CUR_MOD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CurMod` reader - Current Mode of Operation"] -pub type CurModR = crate::BitReader; -impl CurModR { +pub type CUR_MOD_R = crate::BitReader; +impl CUR_MOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - false => Some(CurMod::Value1), + false => Some(CUR_MOD_A::VALUE1), _ => None, } } #[doc = "Device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == CurMod::Value1 + *self == CUR_MOD_A::VALUE1 } } #[doc = "Field `Sof` reader - Start of Frame"] -pub type SofR = crate::BitReader; +pub type SOF_R = crate::BitReader; #[doc = "Field `Sof` writer - Start of Frame"] -pub type SofW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFLvl` reader - RxFIFO Non-Empty"] -pub type RxFlvlR = crate::BitReader; +pub type RX_FLVL_R = crate::BitReader; #[doc = "Field `GINNakEff` reader - Global IN Non-Periodic NAK Effective"] -pub type GinnakEffR = crate::BitReader; +pub type GINNAK_EFF_R = crate::BitReader; #[doc = "Field `GOUTNakEff` reader - Global OUT NAK Effective"] -pub type GoutnakEffR = crate::BitReader; +pub type GOUTNAK_EFF_R = crate::BitReader; #[doc = "Field `ErlySusp` reader - Early Suspend"] -pub type ErlySuspR = crate::BitReader; +pub type ERLY_SUSP_R = crate::BitReader; #[doc = "Field `ErlySusp` writer - Early Suspend"] -pub type ErlySuspW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ERLY_SUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBSusp` reader - USB Suspend"] -pub type UsbsuspR = crate::BitReader; +pub type USBSUSP_R = crate::BitReader; #[doc = "Field `USBSusp` writer - USB Suspend"] -pub type UsbsuspW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBSUSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `USBRst` reader - USB Reset"] -pub type UsbrstR = crate::BitReader; +pub type USBRST_R = crate::BitReader; #[doc = "Field `USBRst` writer - USB Reset"] -pub type UsbrstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBRST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EnumDone` reader - Enumeration Done"] -pub type EnumDoneR = crate::BitReader; +pub type ENUM_DONE_R = crate::BitReader; #[doc = "Field `EnumDone` writer - Enumeration Done"] -pub type EnumDoneW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENUM_DONE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ISOOutDrop` reader - Isochronous OUT Packet Dropped Interrupt"] -pub type IsooutDropR = crate::BitReader; +pub type ISOOUT_DROP_R = crate::BitReader; #[doc = "Field `ISOOutDrop` writer - Isochronous OUT Packet Dropped Interrupt"] -pub type IsooutDropW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ISOOUT_DROP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EOPF` reader - End of Periodic Frame Interrupt"] -pub type EopfR = crate::BitReader; +pub type EOPF_R = crate::BitReader; #[doc = "Field `EOPF` writer - End of Periodic Frame Interrupt"] -pub type EopfW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EOPF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `IEPInt` reader - IN Endpoints Interrupt"] -pub type IepintR = crate::BitReader; +pub type IEPINT_R = crate::BitReader; #[doc = "Field `OEPInt` reader - OUT Endpoints Interrupt"] -pub type OepintR = crate::BitReader; +pub type OEPINT_R = crate::BitReader; #[doc = "Field `incompISOIN` reader - Incomplete Isochronous IN Transfer"] -pub type IncompIsoinR = crate::BitReader; +pub type INCOMP_ISOIN_R = crate::BitReader; #[doc = "Field `incompISOIN` writer - Incomplete Isochronous IN Transfer"] -pub type IncompIsoinW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INCOMP_ISOIN_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `incomplSOOUT` reader - Incomplete Isochronous OUT Transfer"] -pub type IncomplSooutR = crate::BitReader; +pub type INCOMPL_SOOUT_R = crate::BitReader; #[doc = "Field `incomplSOOUT` writer - Incomplete Isochronous OUT Transfer"] -pub type IncomplSooutW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INCOMPL_SOOUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `WkUpInt` reader - Resume/Remote Wakeup Detected Interrupt"] -pub type WkUpIntR = crate::BitReader; +pub type WK_UP_INT_R = crate::BitReader; #[doc = "Field `WkUpInt` writer - Resume/Remote Wakeup Detected Interrupt"] -pub type WkUpIntW<'a, REG> = crate::BitWriter<'a, REG>; +pub type WK_UP_INT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Current Mode of Operation"] #[inline(always)] - pub fn cur_mod(&self) -> CurModR { - CurModR::new((self.bits & 1) != 0) + pub fn cur_mod(&self) -> CUR_MOD_R { + CUR_MOD_R::new((self.bits & 1) != 0) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] - pub fn sof(&self) -> SofR { - SofR::new(((self.bits >> 3) & 1) != 0) + pub fn sof(&self) -> SOF_R { + SOF_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - RxFIFO Non-Empty"] #[inline(always)] - pub fn rx_flvl(&self) -> RxFlvlR { - RxFlvlR::new(((self.bits >> 4) & 1) != 0) + pub fn rx_flvl(&self) -> RX_FLVL_R { + RX_FLVL_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - Global IN Non-Periodic NAK Effective"] #[inline(always)] - pub fn ginnak_eff(&self) -> GinnakEffR { - GinnakEffR::new(((self.bits >> 6) & 1) != 0) + pub fn ginnak_eff(&self) -> GINNAK_EFF_R { + GINNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Global OUT NAK Effective"] #[inline(always)] - pub fn goutnak_eff(&self) -> GoutnakEffR { - GoutnakEffR::new(((self.bits >> 7) & 1) != 0) + pub fn goutnak_eff(&self) -> GOUTNAK_EFF_R { + GOUTNAK_EFF_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 10 - Early Suspend"] #[inline(always)] - pub fn erly_susp(&self) -> ErlySuspR { - ErlySuspR::new(((self.bits >> 10) & 1) != 0) + pub fn erly_susp(&self) -> ERLY_SUSP_R { + ERLY_SUSP_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - USB Suspend"] #[inline(always)] - pub fn usbsusp(&self) -> UsbsuspR { - UsbsuspR::new(((self.bits >> 11) & 1) != 0) + pub fn usbsusp(&self) -> USBSUSP_R { + USBSUSP_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - USB Reset"] #[inline(always)] - pub fn usbrst(&self) -> UsbrstR { - UsbrstR::new(((self.bits >> 12) & 1) != 0) + pub fn usbrst(&self) -> USBRST_R { + USBRST_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Enumeration Done"] #[inline(always)] - pub fn enum_done(&self) -> EnumDoneR { - EnumDoneR::new(((self.bits >> 13) & 1) != 0) + pub fn enum_done(&self) -> ENUM_DONE_R { + ENUM_DONE_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"] #[inline(always)] - pub fn isoout_drop(&self) -> IsooutDropR { - IsooutDropR::new(((self.bits >> 14) & 1) != 0) + pub fn isoout_drop(&self) -> ISOOUT_DROP_R { + ISOOUT_DROP_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - End of Periodic Frame Interrupt"] #[inline(always)] - pub fn eopf(&self) -> EopfR { - EopfR::new(((self.bits >> 15) & 1) != 0) + pub fn eopf(&self) -> EOPF_R { + EOPF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 18 - IN Endpoints Interrupt"] #[inline(always)] - pub fn iepint(&self) -> IepintR { - IepintR::new(((self.bits >> 18) & 1) != 0) + pub fn iepint(&self) -> IEPINT_R { + IEPINT_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - OUT Endpoints Interrupt"] #[inline(always)] - pub fn oepint(&self) -> OepintR { - OepintR::new(((self.bits >> 19) & 1) != 0) + pub fn oepint(&self) -> OEPINT_R { + OEPINT_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"] #[inline(always)] - pub fn incomp_isoin(&self) -> IncompIsoinR { - IncompIsoinR::new(((self.bits >> 20) & 1) != 0) + pub fn incomp_isoin(&self) -> INCOMP_ISOIN_R { + INCOMP_ISOIN_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"] #[inline(always)] - pub fn incompl_soout(&self) -> IncomplSooutR { - IncomplSooutR::new(((self.bits >> 21) & 1) != 0) + pub fn incompl_soout(&self) -> INCOMPL_SOOUT_R { + INCOMPL_SOOUT_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] - pub fn wk_up_int(&self) -> WkUpIntR { - WkUpIntR::new(((self.bits >> 31) & 1) != 0) + pub fn wk_up_int(&self) -> WK_UP_INT_R { + WK_UP_INT_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 3 - Start of Frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SofW { - SofW::new(self, 3) + pub fn sof(&mut self) -> SOF_W { + SOF_W::new(self, 3) } #[doc = "Bit 10 - Early Suspend"] #[inline(always)] #[must_use] - pub fn erly_susp(&mut self) -> ErlySuspW { - ErlySuspW::new(self, 10) + pub fn erly_susp(&mut self) -> ERLY_SUSP_W { + ERLY_SUSP_W::new(self, 10) } #[doc = "Bit 11 - USB Suspend"] #[inline(always)] #[must_use] - pub fn usbsusp(&mut self) -> UsbsuspW { - UsbsuspW::new(self, 11) + pub fn usbsusp(&mut self) -> USBSUSP_W { + USBSUSP_W::new(self, 11) } #[doc = "Bit 12 - USB Reset"] #[inline(always)] #[must_use] - pub fn usbrst(&mut self) -> UsbrstW { - UsbrstW::new(self, 12) + pub fn usbrst(&mut self) -> USBRST_W { + USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration Done"] #[inline(always)] #[must_use] - pub fn enum_done(&mut self) -> EnumDoneW { - EnumDoneW::new(self, 13) + pub fn enum_done(&mut self) -> ENUM_DONE_W { + ENUM_DONE_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"] #[inline(always)] #[must_use] - pub fn isoout_drop(&mut self) -> IsooutDropW { - IsooutDropW::new(self, 14) + pub fn isoout_drop(&mut self) -> ISOOUT_DROP_W { + ISOOUT_DROP_W::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt"] #[inline(always)] #[must_use] - pub fn eopf(&mut self) -> EopfW { - EopfW::new(self, 15) + pub fn eopf(&mut self) -> EOPF_W { + EOPF_W::new(self, 15) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"] #[inline(always)] #[must_use] - pub fn incomp_isoin(&mut self) -> IncompIsoinW { - IncompIsoinW::new(self, 20) + pub fn incomp_isoin(&mut self) -> INCOMP_ISOIN_W { + INCOMP_ISOIN_W::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"] #[inline(always)] #[must_use] - pub fn incompl_soout(&mut self) -> IncomplSooutW { - IncomplSooutW::new(self, 21) + pub fn incompl_soout(&mut self) -> INCOMPL_SOOUT_W { + INCOMPL_SOOUT_W::new(self, 21) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] #[must_use] - pub fn wk_up_int(&mut self) -> WkUpIntW { - WkUpIntW::new(self, 31) + pub fn wk_up_int(&mut self) -> WK_UP_INT_W { + WK_UP_INT_W::new(self, 31) } } #[doc = "Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gintsts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gintsts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GintstsSpec; -impl crate::RegisterSpec for GintstsSpec { +pub struct GINTSTS_SPEC; +impl crate::RegisterSpec for GINTSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gintsts::R`](R) reader structure"] -impl crate::Readable for GintstsSpec {} +impl crate::Readable for GINTSTS_SPEC {} #[doc = "`write(|w| ..)` method takes [`gintsts::W`](W) writer structure"] -impl crate::Writable for GintstsSpec { +impl crate::Writable for GINTSTS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GINTSTS to value 0x1400_0020"] -impl crate::Resettable for GintstsSpec { +impl crate::Resettable for GINTSTS_SPEC { const RESET_VALUE: u32 = 0x1400_0020; } diff --git a/src/usb0/gnptxfsiz.rs b/src/usb0/gnptxfsiz.rs index 017b445b..51430835 100644 --- a/src/usb0/gnptxfsiz.rs +++ b/src/usb0/gnptxfsiz.rs @@ -1,55 +1,55 @@ #[doc = "Register `GNPTXFSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GNPTXFSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `INEPTxF0StAddr` reader - IN Endpoint FIFO0 Transmit RAM Start Address"] -pub type IneptxF0stAddrR = crate::FieldReader; +pub type INEPTX_F0ST_ADDR_R = crate::FieldReader; #[doc = "Field `INEPTxF0StAddr` writer - IN Endpoint FIFO0 Transmit RAM Start Address"] -pub type IneptxF0stAddrW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPTX_F0ST_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `INEPTxF0Dep` reader - IN Endpoint TxFIFO 0 Depth"] -pub type IneptxF0depR = crate::FieldReader; +pub type INEPTX_F0DEP_R = crate::FieldReader; #[doc = "Field `INEPTxF0Dep` writer - IN Endpoint TxFIFO 0 Depth"] -pub type IneptxF0depW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type INEPTX_F0DEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"] #[inline(always)] - pub fn ineptx_f0st_addr(&self) -> IneptxF0stAddrR { - IneptxF0stAddrR::new((self.bits & 0xffff) as u16) + pub fn ineptx_f0st_addr(&self) -> INEPTX_F0ST_ADDR_R { + INEPTX_F0ST_ADDR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"] #[inline(always)] - pub fn ineptx_f0dep(&self) -> IneptxF0depR { - IneptxF0depR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn ineptx_f0dep(&self) -> INEPTX_F0DEP_R { + INEPTX_F0DEP_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"] #[inline(always)] #[must_use] - pub fn ineptx_f0st_addr(&mut self) -> IneptxF0stAddrW { - IneptxF0stAddrW::new(self, 0) + pub fn ineptx_f0st_addr(&mut self) -> INEPTX_F0ST_ADDR_W { + INEPTX_F0ST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"] #[inline(always)] #[must_use] - pub fn ineptx_f0dep(&mut self) -> IneptxF0depW { - IneptxF0depW::new(self, 16) + pub fn ineptx_f0dep(&mut self) -> INEPTX_F0DEP_W { + INEPTX_F0DEP_W::new(self, 16) } } #[doc = "Non-Periodic Transmit FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gnptxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gnptxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GnptxfsizSpec; -impl crate::RegisterSpec for GnptxfsizSpec { +pub struct GNPTXFSIZ_SPEC; +impl crate::RegisterSpec for GNPTXFSIZ_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gnptxfsiz::R`](R) reader structure"] -impl crate::Readable for GnptxfsizSpec {} +impl crate::Readable for GNPTXFSIZ_SPEC {} #[doc = "`write(|w| ..)` method takes [`gnptxfsiz::W`](W) writer structure"] -impl crate::Writable for GnptxfsizSpec { +impl crate::Writable for GNPTXFSIZ_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GNPTXFSIZ to value 0x0010_011a"] -impl crate::Resettable for GnptxfsizSpec { +impl crate::Resettable for GNPTXFSIZ_SPEC { const RESET_VALUE: u32 = 0x0010_011a; } diff --git a/src/usb0/grstctl.rs b/src/usb0/grstctl.rs index 1109d198..5881239c 100644 --- a/src/usb0/grstctl.rs +++ b/src/usb0/grstctl.rs @@ -1,88 +1,88 @@ #[doc = "Register `GRSTCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GRSTCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CSftRst` reader - Core Soft Reset"] -pub type CsftRstR = crate::BitReader; +pub type CSFT_RST_R = crate::BitReader; #[doc = "Field `CSftRst` writer - Core Soft Reset"] -pub type CsftRstW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CSFT_RST_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `RxFFlsh` reader - RxFIFO Flush"] -pub type RxFflshR = crate::BitReader; +pub type RX_FFLSH_R = crate::BitReader; #[doc = "Field `RxFFlsh` writer - RxFIFO Flush"] -pub type RxFflshW<'a, REG> = crate::BitWriter<'a, REG>; +pub type RX_FFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFFlsh` reader - TxFIFO Flush"] -pub type TxFflshR = crate::BitReader; +pub type TX_FFLSH_R = crate::BitReader; #[doc = "Field `TxFFlsh` writer - TxFIFO Flush"] -pub type TxFflshW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TX_FFLSH_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "TxFIFO Number\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum TxFnum { +pub enum TX_FNUM_A { #[doc = "0: Tx FIFO 0 flush in device mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Tx FIFO 1 flush in device mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Tx FIFO 2 flush in device mode"] - Value3 = 2, + VALUE3 = 2, #[doc = "15: Tx FIFO 15 flush in device mode"] - Value4 = 15, + VALUE4 = 15, #[doc = "16: Flush all the transmit FIFOs in device or host mode."] - Value5 = 16, + VALUE5 = 16, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: TxFnum) -> Self { + fn from(variant: TX_FNUM_A) -> Self { variant as _ } } -impl crate::FieldSpec for TxFnum { +impl crate::FieldSpec for TX_FNUM_A { type Ux = u8; } -impl crate::IsEnum for TxFnum {} +impl crate::IsEnum for TX_FNUM_A {} #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; -impl TxFnumR { +pub type TX_FNUM_R = crate::FieldReader; +impl TX_FNUM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(TxFnum::Value1), - 1 => Some(TxFnum::Value2), - 2 => Some(TxFnum::Value3), - 15 => Some(TxFnum::Value4), - 16 => Some(TxFnum::Value5), + 0 => Some(TX_FNUM_A::VALUE1), + 1 => Some(TX_FNUM_A::VALUE2), + 2 => Some(TX_FNUM_A::VALUE3), + 15 => Some(TX_FNUM_A::VALUE4), + 16 => Some(TX_FNUM_A::VALUE5), _ => None, } } #[doc = "Tx FIFO 0 flush in device mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TxFnum::Value1 + *self == TX_FNUM_A::VALUE1 } #[doc = "Tx FIFO 1 flush in device mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TxFnum::Value2 + *self == TX_FNUM_A::VALUE2 } #[doc = "Tx FIFO 2 flush in device mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == TxFnum::Value3 + *self == TX_FNUM_A::VALUE3 } #[doc = "Tx FIFO 15 flush in device mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == TxFnum::Value4 + *self == TX_FNUM_A::VALUE4 } #[doc = "Flush all the transmit FIFOs in device or host mode."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == TxFnum::Value5 + *self == TX_FNUM_A::VALUE5 } } #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 5, TxFnum>; -impl<'a, REG> TxFnumW<'a, REG> +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 5, TX_FNUM_A>; +impl<'a, REG> TX_FNUM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -90,105 +90,105 @@ where #[doc = "Tx FIFO 0 flush in device mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TxFnum::Value1) + self.variant(TX_FNUM_A::VALUE1) } #[doc = "Tx FIFO 1 flush in device mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TxFnum::Value2) + self.variant(TX_FNUM_A::VALUE2) } #[doc = "Tx FIFO 2 flush in device mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(TxFnum::Value3) + self.variant(TX_FNUM_A::VALUE3) } #[doc = "Tx FIFO 15 flush in device mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(TxFnum::Value4) + self.variant(TX_FNUM_A::VALUE4) } #[doc = "Flush all the transmit FIFOs in device or host mode."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(TxFnum::Value5) + self.variant(TX_FNUM_A::VALUE5) } } #[doc = "Field `DMAReq` reader - DMA Request Signal"] -pub type DmareqR = crate::BitReader; +pub type DMAREQ_R = crate::BitReader; #[doc = "Field `AHBIdle` reader - AHB Master Idle"] -pub type AhbidleR = crate::BitReader; +pub type AHBIDLE_R = crate::BitReader; impl R { #[doc = "Bit 0 - Core Soft Reset"] #[inline(always)] - pub fn csft_rst(&self) -> CsftRstR { - CsftRstR::new((self.bits & 1) != 0) + pub fn csft_rst(&self) -> CSFT_RST_R { + CSFT_RST_R::new((self.bits & 1) != 0) } #[doc = "Bit 4 - RxFIFO Flush"] #[inline(always)] - pub fn rx_fflsh(&self) -> RxFflshR { - RxFflshR::new(((self.bits >> 4) & 1) != 0) + pub fn rx_fflsh(&self) -> RX_FFLSH_R { + RX_FFLSH_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - TxFIFO Flush"] #[inline(always)] - pub fn tx_fflsh(&self) -> TxFflshR { - TxFflshR::new(((self.bits >> 5) & 1) != 0) + pub fn tx_fflsh(&self) -> TX_FFLSH_R { + TX_FFLSH_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bits 6:10 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 6) & 0x1f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 6) & 0x1f) as u8) } #[doc = "Bit 30 - DMA Request Signal"] #[inline(always)] - pub fn dmareq(&self) -> DmareqR { - DmareqR::new(((self.bits >> 30) & 1) != 0) + pub fn dmareq(&self) -> DMAREQ_R { + DMAREQ_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - AHB Master Idle"] #[inline(always)] - pub fn ahbidle(&self) -> AhbidleR { - AhbidleR::new(((self.bits >> 31) & 1) != 0) + pub fn ahbidle(&self) -> AHBIDLE_R { + AHBIDLE_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Core Soft Reset"] #[inline(always)] #[must_use] - pub fn csft_rst(&mut self) -> CsftRstW { - CsftRstW::new(self, 0) + pub fn csft_rst(&mut self) -> CSFT_RST_W { + CSFT_RST_W::new(self, 0) } #[doc = "Bit 4 - RxFIFO Flush"] #[inline(always)] #[must_use] - pub fn rx_fflsh(&mut self) -> RxFflshW { - RxFflshW::new(self, 4) + pub fn rx_fflsh(&mut self) -> RX_FFLSH_W { + RX_FFLSH_W::new(self, 4) } #[doc = "Bit 5 - TxFIFO Flush"] #[inline(always)] #[must_use] - pub fn tx_fflsh(&mut self) -> TxFflshW { - TxFflshW::new(self, 5) + pub fn tx_fflsh(&mut self) -> TX_FFLSH_W { + TX_FFLSH_W::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 6) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 6) } } #[doc = "Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grstctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grstctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GrstctlSpec; -impl crate::RegisterSpec for GrstctlSpec { +pub struct GRSTCTL_SPEC; +impl crate::RegisterSpec for GRSTCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`grstctl::R`](R) reader structure"] -impl crate::Readable for GrstctlSpec {} +impl crate::Readable for GRSTCTL_SPEC {} #[doc = "`write(|w| ..)` method takes [`grstctl::W`](W) writer structure"] -impl crate::Writable for GrstctlSpec { +impl crate::Writable for GRSTCTL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRSTCTL to value 0x1000_0000"] -impl crate::Resettable for GrstctlSpec { +impl crate::Resettable for GRSTCTL_SPEC { const RESET_VALUE: u32 = 0x1000_0000; } diff --git a/src/usb0/grxfsiz.rs b/src/usb0/grxfsiz.rs index 05b2ef45..41f7e159 100644 --- a/src/usb0/grxfsiz.rs +++ b/src/usb0/grxfsiz.rs @@ -1,40 +1,40 @@ #[doc = "Register `GRXFSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GRXFSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RxFDep` reader - RxFIFO Depth"] -pub type RxFdepR = crate::FieldReader; +pub type RX_FDEP_R = crate::FieldReader; #[doc = "Field `RxFDep` writer - RxFIFO Depth"] -pub type RxFdepW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type RX_FDEP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - RxFIFO Depth"] #[inline(always)] - pub fn rx_fdep(&self) -> RxFdepR { - RxFdepR::new((self.bits & 0xffff) as u16) + pub fn rx_fdep(&self) -> RX_FDEP_R { + RX_FDEP_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - RxFIFO Depth"] #[inline(always)] #[must_use] - pub fn rx_fdep(&mut self) -> RxFdepW { - RxFdepW::new(self, 0) + pub fn rx_fdep(&mut self) -> RX_FDEP_W { + RX_FDEP_W::new(self, 0) } } #[doc = "Receive FIFO Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxfsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`grxfsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GrxfsizSpec; -impl crate::RegisterSpec for GrxfsizSpec { +pub struct GRXFSIZ_SPEC; +impl crate::RegisterSpec for GRXFSIZ_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`grxfsiz::R`](R) reader structure"] -impl crate::Readable for GrxfsizSpec {} +impl crate::Readable for GRXFSIZ_SPEC {} #[doc = "`write(|w| ..)` method takes [`grxfsiz::W`](W) writer structure"] -impl crate::Writable for GrxfsizSpec { +impl crate::Writable for GRXFSIZ_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GRXFSIZ to value 0x011a"] -impl crate::Resettable for GrxfsizSpec { +impl crate::Resettable for GRXFSIZ_SPEC { const RESET_VALUE: u32 = 0x011a; } diff --git a/src/usb0/grxstsp.rs b/src/usb0/grxstsp.rs index ff6f0f0b..233dc8ea 100644 --- a/src/usb0/grxstsp.rs +++ b/src/usb0/grxstsp.rs @@ -1,170 +1,170 @@ #[doc = "Register `GRXSTSP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `EPNum` reader - Endpoint Number"] -pub type EpnumR = crate::FieldReader; +pub type EPNUM_R = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BcntR = crate::FieldReader; +pub type BCNT_R = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dpid { +pub enum DPID_A { #[doc = "0: DATA0"] - Value1 = 0, + VALUE1 = 0, #[doc = "2: DATA1"] - Value2 = 2, + VALUE2 = 2, #[doc = "1: DATA2"] - Value3 = 1, + VALUE3 = 1, #[doc = "3: MDATA"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dpid) -> Self { + fn from(variant: DPID_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dpid { +impl crate::FieldSpec for DPID_A { type Ux = u8; } -impl crate::IsEnum for Dpid {} +impl crate::IsEnum for DPID_A {} #[doc = "Field `DPID` reader - Data PID"] -pub type DpidR = crate::FieldReader; -impl DpidR { +pub type DPID_R = crate::FieldReader; +impl DPID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpid { + pub const fn variant(&self) -> DPID_A { match self.bits { - 0 => Dpid::Value1, - 2 => Dpid::Value2, - 1 => Dpid::Value3, - 3 => Dpid::Value4, + 0 => DPID_A::VALUE1, + 2 => DPID_A::VALUE2, + 1 => DPID_A::VALUE3, + 3 => DPID_A::VALUE4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpid::Value1 + *self == DPID_A::VALUE1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpid::Value2 + *self == DPID_A::VALUE2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dpid::Value3 + *self == DPID_A::VALUE3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dpid::Value4 + *self == DPID_A::VALUE4 } } #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PktSts { +pub enum PKT_STS_A { #[doc = "1: Global OUT NAK (triggers an interrupt)"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: OUT data packet received"] - Value2 = 2, + VALUE2 = 2, #[doc = "3: OUT transfer completed (triggers an interrupt)"] - Value3 = 3, + VALUE3 = 3, #[doc = "4: SETUP transaction completed (triggers an interrupt)"] - Value4 = 4, + VALUE4 = 4, #[doc = "6: SETUP data packet received"] - Value5 = 6, + VALUE5 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PktSts) -> Self { + fn from(variant: PKT_STS_A) -> Self { variant as _ } } -impl crate::FieldSpec for PktSts { +impl crate::FieldSpec for PKT_STS_A { type Ux = u8; } -impl crate::IsEnum for PktSts {} +impl crate::IsEnum for PKT_STS_A {} #[doc = "Field `PktSts` reader - Packet Status"] -pub type PktStsR = crate::FieldReader; -impl PktStsR { +pub type PKT_STS_R = crate::FieldReader; +impl PKT_STS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PktSts::Value1), - 2 => Some(PktSts::Value2), - 3 => Some(PktSts::Value3), - 4 => Some(PktSts::Value4), - 6 => Some(PktSts::Value5), + 1 => Some(PKT_STS_A::VALUE1), + 2 => Some(PKT_STS_A::VALUE2), + 3 => Some(PKT_STS_A::VALUE3), + 4 => Some(PKT_STS_A::VALUE4), + 6 => Some(PKT_STS_A::VALUE5), _ => None, } } #[doc = "Global OUT NAK (triggers an interrupt)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PktSts::Value1 + *self == PKT_STS_A::VALUE1 } #[doc = "OUT data packet received"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PktSts::Value2 + *self == PKT_STS_A::VALUE2 } #[doc = "OUT transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PktSts::Value3 + *self == PKT_STS_A::VALUE3 } #[doc = "SETUP transaction completed (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PktSts::Value4 + *self == PKT_STS_A::VALUE4 } #[doc = "SETUP data packet received"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PktSts::Value5 + *self == PKT_STS_A::VALUE5 } } #[doc = "Field `FN` reader - Frame Number"] -pub type FnR = crate::FieldReader; +pub type FN_R = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Endpoint Number"] #[inline(always)] - pub fn epnum(&self) -> EpnumR { - EpnumR::new((self.bits & 0x0f) as u8) + pub fn epnum(&self) -> EPNUM_R { + EPNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BcntR { - BcntR::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BCNT_R { + BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DpidR { - DpidR::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DPID_R { + DPID_R::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PktStsR { - PktStsR::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PKT_STS_R { + PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) } #[doc = "Bits 21:24 - Frame Number"] #[inline(always)] - pub fn fn_(&self) -> FnR { - FnR::new(((self.bits >> 21) & 0x0f) as u8) + pub fn fn_(&self) -> FN_R { + FN_R::new(((self.bits >> 21) & 0x0f) as u8) } } #[doc = "Receive Status Read and Pop Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsp::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GrxstspSpec; -impl crate::RegisterSpec for GrxstspSpec { +pub struct GRXSTSP_SPEC; +impl crate::RegisterSpec for GRXSTSP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`grxstsp::R`](R) reader structure"] -impl crate::Readable for GrxstspSpec {} +impl crate::Readable for GRXSTSP_SPEC {} #[doc = "`reset()` method sets GRXSTSP to value 0"] -impl crate::Resettable for GrxstspSpec { +impl crate::Resettable for GRXSTSP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/grxstsr.rs b/src/usb0/grxstsr.rs index 3dedb93c..1e4b5075 100644 --- a/src/usb0/grxstsr.rs +++ b/src/usb0/grxstsr.rs @@ -1,170 +1,170 @@ #[doc = "Register `GRXSTSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `EPNum` reader - Endpoint Number"] -pub type EpnumR = crate::FieldReader; +pub type EPNUM_R = crate::FieldReader; #[doc = "Field `BCnt` reader - Byte Count"] -pub type BcntR = crate::FieldReader; +pub type BCNT_R = crate::FieldReader; #[doc = "Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dpid { +pub enum DPID_A { #[doc = "0: DATA0"] - Value1 = 0, + VALUE1 = 0, #[doc = "2: DATA1"] - Value2 = 2, + VALUE2 = 2, #[doc = "1: DATA2"] - Value3 = 1, + VALUE3 = 1, #[doc = "3: MDATA"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dpid) -> Self { + fn from(variant: DPID_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dpid { +impl crate::FieldSpec for DPID_A { type Ux = u8; } -impl crate::IsEnum for Dpid {} +impl crate::IsEnum for DPID_A {} #[doc = "Field `DPID` reader - Data PID"] -pub type DpidR = crate::FieldReader; -impl DpidR { +pub type DPID_R = crate::FieldReader; +impl DPID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpid { + pub const fn variant(&self) -> DPID_A { match self.bits { - 0 => Dpid::Value1, - 2 => Dpid::Value2, - 1 => Dpid::Value3, - 3 => Dpid::Value4, + 0 => DPID_A::VALUE1, + 2 => DPID_A::VALUE2, + 1 => DPID_A::VALUE3, + 3 => DPID_A::VALUE4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpid::Value1 + *self == DPID_A::VALUE1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpid::Value2 + *self == DPID_A::VALUE2 } #[doc = "DATA2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dpid::Value3 + *self == DPID_A::VALUE3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dpid::Value4 + *self == DPID_A::VALUE4 } } #[doc = "Packet Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum PktSts { +pub enum PKT_STS_A { #[doc = "1: Global OUT NAK (triggers an interrupt)"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: OUT data packet received"] - Value2 = 2, + VALUE2 = 2, #[doc = "3: OUT transfer completed (triggers an interrupt)"] - Value3 = 3, + VALUE3 = 3, #[doc = "4: SETUP transaction completed (triggers an interrupt)"] - Value4 = 4, + VALUE4 = 4, #[doc = "6: SETUP data packet received"] - Value5 = 6, + VALUE5 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: PktSts) -> Self { + fn from(variant: PKT_STS_A) -> Self { variant as _ } } -impl crate::FieldSpec for PktSts { +impl crate::FieldSpec for PKT_STS_A { type Ux = u8; } -impl crate::IsEnum for PktSts {} +impl crate::IsEnum for PKT_STS_A {} #[doc = "Field `PktSts` reader - Packet Status"] -pub type PktStsR = crate::FieldReader; -impl PktStsR { +pub type PKT_STS_R = crate::FieldReader; +impl PKT_STS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(PktSts::Value1), - 2 => Some(PktSts::Value2), - 3 => Some(PktSts::Value3), - 4 => Some(PktSts::Value4), - 6 => Some(PktSts::Value5), + 1 => Some(PKT_STS_A::VALUE1), + 2 => Some(PKT_STS_A::VALUE2), + 3 => Some(PKT_STS_A::VALUE3), + 4 => Some(PKT_STS_A::VALUE4), + 6 => Some(PKT_STS_A::VALUE5), _ => None, } } #[doc = "Global OUT NAK (triggers an interrupt)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == PktSts::Value1 + *self == PKT_STS_A::VALUE1 } #[doc = "OUT data packet received"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == PktSts::Value2 + *self == PKT_STS_A::VALUE2 } #[doc = "OUT transfer completed (triggers an interrupt)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == PktSts::Value3 + *self == PKT_STS_A::VALUE3 } #[doc = "SETUP transaction completed (triggers an interrupt)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == PktSts::Value4 + *self == PKT_STS_A::VALUE4 } #[doc = "SETUP data packet received"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == PktSts::Value5 + *self == PKT_STS_A::VALUE5 } } #[doc = "Field `FN` reader - Frame Number"] -pub type FnR = crate::FieldReader; +pub type FN_R = crate::FieldReader; impl R { #[doc = "Bits 0:3 - Endpoint Number"] #[inline(always)] - pub fn epnum(&self) -> EpnumR { - EpnumR::new((self.bits & 0x0f) as u8) + pub fn epnum(&self) -> EPNUM_R { + EPNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte Count"] #[inline(always)] - pub fn bcnt(&self) -> BcntR { - BcntR::new(((self.bits >> 4) & 0x07ff) as u16) + pub fn bcnt(&self) -> BCNT_R { + BCNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] - pub fn dpid(&self) -> DpidR { - DpidR::new(((self.bits >> 15) & 3) as u8) + pub fn dpid(&self) -> DPID_R { + DPID_R::new(((self.bits >> 15) & 3) as u8) } #[doc = "Bits 17:20 - Packet Status"] #[inline(always)] - pub fn pkt_sts(&self) -> PktStsR { - PktStsR::new(((self.bits >> 17) & 0x0f) as u8) + pub fn pkt_sts(&self) -> PKT_STS_R { + PKT_STS_R::new(((self.bits >> 17) & 0x0f) as u8) } #[doc = "Bits 21:24 - Frame Number"] #[inline(always)] - pub fn fn_(&self) -> FnR { - FnR::new(((self.bits >> 21) & 0x0f) as u8) + pub fn fn_(&self) -> FN_R { + FN_R::new(((self.bits >> 21) & 0x0f) as u8) } } #[doc = "Receive Status Debug Read Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`grxstsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GrxstsrSpec; -impl crate::RegisterSpec for GrxstsrSpec { +pub struct GRXSTSR_SPEC; +impl crate::RegisterSpec for GRXSTSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`grxstsr::R`](R) reader structure"] -impl crate::Readable for GrxstsrSpec {} +impl crate::Readable for GRXSTSR_SPEC {} #[doc = "`reset()` method sets GRXSTSR to value 0"] -impl crate::Resettable for GrxstsrSpec { +impl crate::Resettable for GRXSTSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0/guid.rs b/src/usb0/guid.rs index 62c75318..929d40ca 100644 --- a/src/usb0/guid.rs +++ b/src/usb0/guid.rs @@ -1,70 +1,70 @@ #[doc = "Register `GUID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GUID` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_REV` writer - Module Revision"] -pub type ModRevW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type MOD_REV_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` writer - Module Type"] -pub type ModTypeW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type MOD_TYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` writer - Module Number"] -pub type ModNumberW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type MOD_NUMBER_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] #[must_use] - pub fn mod_rev(&mut self) -> ModRevW { - ModRevW::new(self, 0) + pub fn mod_rev(&mut self) -> MOD_REV_W { + MOD_REV_W::new(self, 0) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] #[must_use] - pub fn mod_type(&mut self) -> ModTypeW { - ModTypeW::new(self, 8) + pub fn mod_type(&mut self) -> MOD_TYPE_W { + MOD_TYPE_W::new(self, 8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] #[must_use] - pub fn mod_number(&mut self) -> ModNumberW { - ModNumberW::new(self, 16) + pub fn mod_number(&mut self) -> MOD_NUMBER_W { + MOD_NUMBER_W::new(self, 16) } } #[doc = "USB Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`guid::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`guid::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GuidSpec; -impl crate::RegisterSpec for GuidSpec { +pub struct GUID_SPEC; +impl crate::RegisterSpec for GUID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`guid::R`](R) reader structure"] -impl crate::Readable for GuidSpec {} +impl crate::Readable for GUID_SPEC {} #[doc = "`write(|w| ..)` method takes [`guid::W`](W) writer structure"] -impl crate::Writable for GuidSpec { +impl crate::Writable for GUID_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GUID to value 0x00b1_c000"] -impl crate::Resettable for GuidSpec { +impl crate::Resettable for GUID_SPEC { const RESET_VALUE: u32 = 0x00b1_c000; } diff --git a/src/usb0/gusbcfg.rs b/src/usb0/gusbcfg.rs index 4c80212c..f13f0edb 100644 --- a/src/usb0/gusbcfg.rs +++ b/src/usb0/gusbcfg.rs @@ -1,232 +1,232 @@ #[doc = "Register `GUSBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GUSBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TOutCal` reader - FS Timeout Calibration"] -pub type ToutCalR = crate::FieldReader; +pub type TOUT_CAL_R = crate::FieldReader; #[doc = "Field `TOutCal` writer - FS Timeout Calibration"] -pub type ToutCalW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TOUT_CAL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "USB 1.1 Full-Speed Serial Transceiver Select\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Physel { +pub enum PHYSEL_A { #[doc = "1: USB 1.1 full-speed serial transceiver"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Physel) -> Self { + fn from(variant: PHYSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PHYSel` reader - USB 1.1 Full-Speed Serial Transceiver Select"] -pub type PhyselR = crate::BitReader; -impl PhyselR { +pub type PHYSEL_R = crate::BitReader; +impl PHYSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - true => Some(Physel::Value2), + true => Some(PHYSEL_A::VALUE2), _ => None, } } #[doc = "USB 1.1 full-speed serial transceiver"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Physel::Value2 + *self == PHYSEL_A::VALUE2 } } #[doc = "Field `USBTrdTim` reader - USB Turnaround Time"] -pub type UsbtrdTimR = crate::FieldReader; +pub type USBTRD_TIM_R = crate::FieldReader; #[doc = "Field `USBTrdTim` writer - USB Turnaround Time"] -pub type UsbtrdTimW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type USBTRD_TIM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Tx End Delay\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum TxEndDelay { +pub enum TX_END_DELAY_A { #[doc = "0: Normal mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Introduce Tx end delay timers"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: TxEndDelay) -> Self { + fn from(variant: TX_END_DELAY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TxEndDelay` reader - Tx End Delay"] -pub type TxEndDelayR = crate::BitReader; -impl TxEndDelayR { +pub type TX_END_DELAY_R = crate::BitReader; +impl TX_END_DELAY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> TxEndDelay { + pub const fn variant(&self) -> TX_END_DELAY_A { match self.bits { - false => TxEndDelay::Value1, - true => TxEndDelay::Value2, + false => TX_END_DELAY_A::VALUE1, + true => TX_END_DELAY_A::VALUE2, } } #[doc = "Normal mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == TxEndDelay::Value1 + *self == TX_END_DELAY_A::VALUE1 } #[doc = "Introduce Tx end delay timers"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == TxEndDelay::Value2 + *self == TX_END_DELAY_A::VALUE2 } } #[doc = "Field `TxEndDelay` writer - Tx End Delay"] -pub type TxEndDelayW<'a, REG> = crate::BitWriter<'a, REG, TxEndDelay>; -impl<'a, REG> TxEndDelayW<'a, REG> +pub type TX_END_DELAY_W<'a, REG> = crate::BitWriter<'a, REG, TX_END_DELAY_A>; +impl<'a, REG> TX_END_DELAY_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(TxEndDelay::Value1) + self.variant(TX_END_DELAY_A::VALUE1) } #[doc = "Introduce Tx end delay timers"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(TxEndDelay::Value2) + self.variant(TX_END_DELAY_A::VALUE2) } } #[doc = "Force Device Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum ForceDevMode { +pub enum FORCE_DEV_MODE_A { #[doc = "0: Normal Mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Force Device Mode"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: ForceDevMode) -> Self { + fn from(variant: FORCE_DEV_MODE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ForceDevMode` reader - Force Device Mode"] -pub type ForceDevModeR = crate::BitReader; -impl ForceDevModeR { +pub type FORCE_DEV_MODE_R = crate::BitReader; +impl FORCE_DEV_MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> ForceDevMode { + pub const fn variant(&self) -> FORCE_DEV_MODE_A { match self.bits { - false => ForceDevMode::Value1, - true => ForceDevMode::Value2, + false => FORCE_DEV_MODE_A::VALUE1, + true => FORCE_DEV_MODE_A::VALUE2, } } #[doc = "Normal Mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == ForceDevMode::Value1 + *self == FORCE_DEV_MODE_A::VALUE1 } #[doc = "Force Device Mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == ForceDevMode::Value2 + *self == FORCE_DEV_MODE_A::VALUE2 } } #[doc = "Field `ForceDevMode` writer - Force Device Mode"] -pub type ForceDevModeW<'a, REG> = crate::BitWriter<'a, REG, ForceDevMode>; -impl<'a, REG> ForceDevModeW<'a, REG> +pub type FORCE_DEV_MODE_W<'a, REG> = crate::BitWriter<'a, REG, FORCE_DEV_MODE_A>; +impl<'a, REG> FORCE_DEV_MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal Mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(ForceDevMode::Value1) + self.variant(FORCE_DEV_MODE_A::VALUE1) } #[doc = "Force Device Mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(ForceDevMode::Value2) + self.variant(FORCE_DEV_MODE_A::VALUE2) } } #[doc = "Field `CTP` reader - Corrupt Tx packet"] -pub type CtpR = crate::BitReader; +pub type CTP_R = crate::BitReader; #[doc = "Field `CTP` writer - Corrupt Tx packet"] -pub type CtpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTP_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:2 - FS Timeout Calibration"] #[inline(always)] - pub fn tout_cal(&self) -> ToutCalR { - ToutCalR::new((self.bits & 7) as u8) + pub fn tout_cal(&self) -> TOUT_CAL_R { + TOUT_CAL_R::new((self.bits & 7) as u8) } #[doc = "Bit 6 - USB 1.1 Full-Speed Serial Transceiver Select"] #[inline(always)] - pub fn physel(&self) -> PhyselR { - PhyselR::new(((self.bits >> 6) & 1) != 0) + pub fn physel(&self) -> PHYSEL_R { + PHYSEL_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bits 10:13 - USB Turnaround Time"] #[inline(always)] - pub fn usbtrd_tim(&self) -> UsbtrdTimR { - UsbtrdTimR::new(((self.bits >> 10) & 0x0f) as u8) + pub fn usbtrd_tim(&self) -> USBTRD_TIM_R { + USBTRD_TIM_R::new(((self.bits >> 10) & 0x0f) as u8) } #[doc = "Bit 28 - Tx End Delay"] #[inline(always)] - pub fn tx_end_delay(&self) -> TxEndDelayR { - TxEndDelayR::new(((self.bits >> 28) & 1) != 0) + pub fn tx_end_delay(&self) -> TX_END_DELAY_R { + TX_END_DELAY_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Force Device Mode"] #[inline(always)] - pub fn force_dev_mode(&self) -> ForceDevModeR { - ForceDevModeR::new(((self.bits >> 30) & 1) != 0) + pub fn force_dev_mode(&self) -> FORCE_DEV_MODE_R { + FORCE_DEV_MODE_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] - pub fn ctp(&self) -> CtpR { - CtpR::new(((self.bits >> 31) & 1) != 0) + pub fn ctp(&self) -> CTP_R { + CTP_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - FS Timeout Calibration"] #[inline(always)] #[must_use] - pub fn tout_cal(&mut self) -> ToutCalW { - ToutCalW::new(self, 0) + pub fn tout_cal(&mut self) -> TOUT_CAL_W { + TOUT_CAL_W::new(self, 0) } #[doc = "Bits 10:13 - USB Turnaround Time"] #[inline(always)] #[must_use] - pub fn usbtrd_tim(&mut self) -> UsbtrdTimW { - UsbtrdTimW::new(self, 10) + pub fn usbtrd_tim(&mut self) -> USBTRD_TIM_W { + USBTRD_TIM_W::new(self, 10) } #[doc = "Bit 28 - Tx End Delay"] #[inline(always)] #[must_use] - pub fn tx_end_delay(&mut self) -> TxEndDelayW { - TxEndDelayW::new(self, 28) + pub fn tx_end_delay(&mut self) -> TX_END_DELAY_W { + TX_END_DELAY_W::new(self, 28) } #[doc = "Bit 30 - Force Device Mode"] #[inline(always)] #[must_use] - pub fn force_dev_mode(&mut self) -> ForceDevModeW { - ForceDevModeW::new(self, 30) + pub fn force_dev_mode(&mut self) -> FORCE_DEV_MODE_W { + FORCE_DEV_MODE_W::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] #[must_use] - pub fn ctp(&mut self) -> CtpW { - CtpW::new(self, 31) + pub fn ctp(&mut self) -> CTP_W { + CTP_W::new(self, 31) } } #[doc = "USB Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gusbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gusbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GusbcfgSpec; -impl crate::RegisterSpec for GusbcfgSpec { +pub struct GUSBCFG_SPEC; +impl crate::RegisterSpec for GUSBCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`gusbcfg::R`](R) reader structure"] -impl crate::Readable for GusbcfgSpec {} +impl crate::Readable for GUSBCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`gusbcfg::W`](W) writer structure"] -impl crate::Writable for GusbcfgSpec { +impl crate::Writable for GUSBCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GUSBCFG to value 0x1440"] -impl crate::Resettable for GusbcfgSpec { +impl crate::Resettable for GUSBCFG_SPEC { const RESET_VALUE: u32 = 0x1440; } diff --git a/src/usb0/pcgcctl.rs b/src/usb0/pcgcctl.rs index 7693b57d..e1290ddc 100644 --- a/src/usb0/pcgcctl.rs +++ b/src/usb0/pcgcctl.rs @@ -1,55 +1,55 @@ #[doc = "Register `PCGCCTL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCGCCTL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `StopPclk` reader - Stop Pclk"] -pub type StopPclkR = crate::BitReader; +pub type STOP_PCLK_R = crate::BitReader; #[doc = "Field `StopPclk` writer - Stop Pclk"] -pub type StopPclkW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STOP_PCLK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `GateHclk` reader - Gate Hclk"] -pub type GateHclkR = crate::BitReader; +pub type GATE_HCLK_R = crate::BitReader; #[doc = "Field `GateHclk` writer - Gate Hclk"] -pub type GateHclkW<'a, REG> = crate::BitWriter<'a, REG>; +pub type GATE_HCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Stop Pclk"] #[inline(always)] - pub fn stop_pclk(&self) -> StopPclkR { - StopPclkR::new((self.bits & 1) != 0) + pub fn stop_pclk(&self) -> STOP_PCLK_R { + STOP_PCLK_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Gate Hclk"] #[inline(always)] - pub fn gate_hclk(&self) -> GateHclkR { - GateHclkR::new(((self.bits >> 1) & 1) != 0) + pub fn gate_hclk(&self) -> GATE_HCLK_R { + GATE_HCLK_R::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Stop Pclk"] #[inline(always)] #[must_use] - pub fn stop_pclk(&mut self) -> StopPclkW { - StopPclkW::new(self, 0) + pub fn stop_pclk(&mut self) -> STOP_PCLK_W { + STOP_PCLK_W::new(self, 0) } #[doc = "Bit 1 - Gate Hclk"] #[inline(always)] #[must_use] - pub fn gate_hclk(&mut self) -> GateHclkW { - GateHclkW::new(self, 1) + pub fn gate_hclk(&mut self) -> GATE_HCLK_W { + GATE_HCLK_W::new(self, 1) } } #[doc = "Power and Clock Gating Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgcctl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgcctl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcgcctlSpec; -impl crate::RegisterSpec for PcgcctlSpec { +pub struct PCGCCTL_SPEC; +impl crate::RegisterSpec for PCGCCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcgcctl::R`](R) reader structure"] -impl crate::Readable for PcgcctlSpec {} +impl crate::Readable for PCGCCTL_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcgcctl::W`](W) writer structure"] -impl crate::Writable for PcgcctlSpec { +impl crate::Writable for PCGCCTL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCGCCTL to value 0x0100"] -impl crate::Resettable for PcgcctlSpec { +impl crate::Resettable for PCGCCTL_SPEC { const RESET_VALUE: u32 = 0x0100; } diff --git a/src/usb0_ep0.rs b/src/usb0_ep0.rs index d53fe5f4..12238d60 100644 --- a/src/usb0_ep0.rs +++ b/src/usb0_ep0.rs @@ -1,144 +1,133 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - diepctl0: Diepctl0, + diepctl0: DIEPCTL0, _reserved1: [u8; 0x04], - diepint0: Diepint0, + diepint0: DIEPINT0, _reserved2: [u8; 0x04], - dieptsiz0: Dieptsiz0, - diepdma0: Diepdma0, - dtxfsts0: Dtxfsts0, - diepdmab0: Diepdmab0, + dieptsiz0: DIEPTSIZ0, + diepdma0: DIEPDMA0, + dtxfsts0: DTXFSTS0, + diepdmab0: DIEPDMAB0, _reserved6: [u8; 0x01e0], - doepctl0: Doepctl0, + doepctl0: DOEPCTL0, _reserved7: [u8; 0x04], - doepint0: Doepint0, + doepint0: DOEPINT0, _reserved8: [u8; 0x04], - doeptsiz0: Doeptsiz0, - doepdma0: Doepdma0, + doeptsiz0: DOEPTSIZ0, + doepdma0: DOEPDMA0, _reserved10: [u8; 0x04], - doepdmab0: Doepdmab0, + doepdmab0: DOEPDMAB0, } impl RegisterBlock { #[doc = "0x00 - Device Control IN Endpoint Control Register"] #[inline(always)] - pub const fn diepctl0(&self) -> &Diepctl0 { + pub const fn diepctl0(&self) -> &DIEPCTL0 { &self.diepctl0 } #[doc = "0x08 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn diepint0(&self) -> &Diepint0 { + pub const fn diepint0(&self) -> &DIEPINT0 { &self.diepint0 } #[doc = "0x10 - Device IN Endpoint Transfer Size Register"] #[inline(always)] - pub const fn dieptsiz0(&self) -> &Dieptsiz0 { + pub const fn dieptsiz0(&self) -> &DIEPTSIZ0 { &self.dieptsiz0 } #[doc = "0x14 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn diepdma0(&self) -> &Diepdma0 { + pub const fn diepdma0(&self) -> &DIEPDMA0 { &self.diepdma0 } #[doc = "0x18 - Device IN Endpoint Transmit FIFO Status Register"] #[inline(always)] - pub const fn dtxfsts0(&self) -> &Dtxfsts0 { + pub const fn dtxfsts0(&self) -> &DTXFSTS0 { &self.dtxfsts0 } #[doc = "0x1c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn diepdmab0(&self) -> &Diepdmab0 { + pub const fn diepdmab0(&self) -> &DIEPDMAB0 { &self.diepdmab0 } #[doc = "0x200 - Device Control OUT Endpoint Control Register"] #[inline(always)] - pub const fn doepctl0(&self) -> &Doepctl0 { + pub const fn doepctl0(&self) -> &DOEPCTL0 { &self.doepctl0 } #[doc = "0x208 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn doepint0(&self) -> &Doepint0 { + pub const fn doepint0(&self) -> &DOEPINT0 { &self.doepint0 } #[doc = "0x210 - Device OUT Endpoint Transfer Size Register"] #[inline(always)] - pub const fn doeptsiz0(&self) -> &Doeptsiz0 { + pub const fn doeptsiz0(&self) -> &DOEPTSIZ0 { &self.doeptsiz0 } #[doc = "0x214 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn doepdma0(&self) -> &Doepdma0 { + pub const fn doepdma0(&self) -> &DOEPDMA0 { &self.doepdma0 } #[doc = "0x21c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn doepdmab0(&self) -> &Doepdmab0 { + pub const fn doepdmab0(&self) -> &DOEPDMAB0 { &self.doepdmab0 } } #[doc = "DIEPCTL0 (rw) register accessor: Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl0`] module"] -#[doc(alias = "DIEPCTL0")] -pub type Diepctl0 = crate::Reg; +pub type DIEPCTL0 = crate::Reg; #[doc = "Device Control IN Endpoint Control Register"] pub mod diepctl0; #[doc = "DIEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint0`] module"] -#[doc(alias = "DIEPINT0")] -pub type Diepint0 = crate::Reg; +pub type DIEPINT0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint0; #[doc = "DIEPTSIZ0 (rw) register accessor: Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz0`] module"] -#[doc(alias = "DIEPTSIZ0")] -pub type Dieptsiz0 = crate::Reg; +pub type DIEPTSIZ0 = crate::Reg; #[doc = "Device IN Endpoint Transfer Size Register"] pub mod dieptsiz0; #[doc = "DIEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma0`] module"] -#[doc(alias = "DIEPDMA0")] -pub type Diepdma0 = crate::Reg; +pub type DIEPDMA0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma0; #[doc = "DTXFSTS0 (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts0`] module"] -#[doc(alias = "DTXFSTS0")] -pub type Dtxfsts0 = crate::Reg; +pub type DTXFSTS0 = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts0; #[doc = "DIEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab0`] module"] -#[doc(alias = "DIEPDMAB0")] -pub type Diepdmab0 = crate::Reg; +pub type DIEPDMAB0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab0; #[doc = "DOEPCTL0 (rw) register accessor: Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl0`] module"] -#[doc(alias = "DOEPCTL0")] -pub type Doepctl0 = crate::Reg; +pub type DOEPCTL0 = crate::Reg; #[doc = "Device Control OUT Endpoint Control Register"] pub mod doepctl0; #[doc = "DOEPINT0 (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint0`] module"] -#[doc(alias = "DOEPINT0")] -pub type Doepint0 = crate::Reg; +pub type DOEPINT0 = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint0; #[doc = "DOEPTSIZ0 (rw) register accessor: Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz0`] module"] -#[doc(alias = "DOEPTSIZ0")] -pub type Doeptsiz0 = crate::Reg; +pub type DOEPTSIZ0 = crate::Reg; #[doc = "Device OUT Endpoint Transfer Size Register"] pub mod doeptsiz0; #[doc = "DOEPDMA0 (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma0`] module"] -#[doc(alias = "DOEPDMA0")] -pub type Doepdma0 = crate::Reg; +pub type DOEPDMA0 = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma0; #[doc = "DOEPDMAB0 (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab0`] module"] -#[doc(alias = "DOEPDMAB0")] -pub type Doepdmab0 = crate::Reg; +pub type DOEPDMAB0 = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod doepdmab0; diff --git a/src/usb0_ep0/diepctl0.rs b/src/usb0_ep0/diepctl0.rs index c7ce7067..c940b89f 100644 --- a/src/usb0_ep0/diepctl0.rs +++ b/src/usb0_ep0/diepctl0.rs @@ -1,68 +1,68 @@ #[doc = "Register `DIEPCTL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Maximum Packet Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mps { +pub enum MPS_A { #[doc = "0: 64 bytes"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 32 bytes"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 16 bytes"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 8 bytes"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mps) -> Self { + fn from(variant: MPS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mps { +impl crate::FieldSpec for MPS_A { type Ux = u8; } -impl crate::IsEnum for Mps {} +impl crate::IsEnum for MPS_A {} #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; -impl MpsR { +pub type MPS_R = crate::FieldReader; +impl MPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mps { + pub const fn variant(&self) -> MPS_A { match self.bits { - 0 => Mps::Value1, - 1 => Mps::Value2, - 2 => Mps::Value3, - 3 => Mps::Value4, + 0 => MPS_A::VALUE1, + 1 => MPS_A::VALUE2, + 2 => MPS_A::VALUE3, + 3 => MPS_A::VALUE4, _ => unreachable!(), } } #[doc = "64 bytes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mps::Value1 + *self == MPS_A::VALUE1 } #[doc = "32 bytes"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mps::Value2 + *self == MPS_A::VALUE2 } #[doc = "16 bytes"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mps::Value3 + *self == MPS_A::VALUE3 } #[doc = "8 bytes"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mps::Value4 + *self == MPS_A::VALUE4 } } #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mps, crate::Safe>; -impl<'a, REG> MpsW<'a, REG> +pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MPS_A, crate::Safe>; +impl<'a, REG> MPS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,184 +70,184 @@ where #[doc = "64 bytes"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mps::Value1) + self.variant(MPS_A::VALUE1) } #[doc = "32 bytes"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mps::Value2) + self.variant(MPS_A::VALUE2) } #[doc = "16 bytes"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mps::Value3) + self.variant(MPS_A::VALUE3) } #[doc = "8 bytes"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mps::Value4) + self.variant(MPS_A::VALUE4) } } #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; +pub type EPTYPE_R = crate::FieldReader; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; +pub type TX_FNUM_R = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 3) as u8) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 3) as u8) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MpsW { - MpsW::new(self, 0) + pub fn mps(&mut self) -> MPS_W { + MPS_W::new(self, 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 22) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EpdisW { - EpdisW::new(self, 30) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Control IN Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Diepctl0Spec; -impl crate::RegisterSpec for Diepctl0Spec { +pub struct DIEPCTL0_SPEC; +impl crate::RegisterSpec for DIEPCTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepctl0::R`](R) reader structure"] -impl crate::Readable for Diepctl0Spec {} +impl crate::Readable for DIEPCTL0_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepctl0::W`](W) writer structure"] -impl crate::Writable for Diepctl0Spec { +impl crate::Writable for DIEPCTL0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL0 to value 0x8000"] -impl crate::Resettable for Diepctl0Spec { +impl crate::Resettable for DIEPCTL0_SPEC { const RESET_VALUE: u32 = 0x8000; } diff --git a/src/usb0_ep0/diepdma0.rs b/src/usb0_ep0/diepdma0.rs index 6ef5824c..ee7e2c5e 100644 --- a/src/usb0_ep0/diepdma0.rs +++ b/src/usb0_ep0/diepdma0.rs @@ -1,40 +1,40 @@ #[doc = "Register `DIEPDMA0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPDMA0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DmaaddrR = crate::FieldReader; +pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DmaaddrR { - DmaaddrR::new(self.bits) + pub fn dmaaddr(&self) -> DMAADDR_R { + DMAADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DmaaddrW { - DmaaddrW::new(self, 0) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Diepdma0Spec; -impl crate::RegisterSpec for Diepdma0Spec { +pub struct DIEPDMA0_SPEC; +impl crate::RegisterSpec for DIEPDMA0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepdma0::R`](R) reader structure"] -impl crate::Readable for Diepdma0Spec {} +impl crate::Readable for DIEPDMA0_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepdma0::W`](W) writer structure"] -impl crate::Writable for Diepdma0Spec { +impl crate::Writable for DIEPDMA0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPDMA0 to value 0"] -impl crate::Resettable for Diepdma0Spec { +impl crate::Resettable for DIEPDMA0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/diepdmab0.rs b/src/usb0_ep0/diepdmab0.rs index 3766f468..c5414cf9 100644 --- a/src/usb0_ep0/diepdmab0.rs +++ b/src/usb0_ep0/diepdmab0.rs @@ -1,22 +1,22 @@ #[doc = "Register `DIEPDMAB0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DmabufferAddrR = crate::FieldReader; +pub type DMABUFFER_ADDR_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DmabufferAddrR { - DmabufferAddrR::new(self.bits) + pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { + DMABUFFER_ADDR_R::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Diepdmab0Spec; -impl crate::RegisterSpec for Diepdmab0Spec { +pub struct DIEPDMAB0_SPEC; +impl crate::RegisterSpec for DIEPDMAB0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepdmab0::R`](R) reader structure"] -impl crate::Readable for Diepdmab0Spec {} +impl crate::Readable for DIEPDMAB0_SPEC {} #[doc = "`reset()` method sets DIEPDMAB0 to value 0"] -impl crate::Resettable for Diepdmab0Spec { +impl crate::Resettable for DIEPDMAB0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/diepint0.rs b/src/usb0_ep0/diepint0.rs index 859a2cb0..d548a005 100644 --- a/src/usb0_ep0/diepint0.rs +++ b/src/usb0_ep0/diepint0.rs @@ -1,137 +1,137 @@ #[doc = "Register `DIEPINT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPINT0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XferComplR = crate::BitReader; +pub type XFER_COMPL_R = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EpdisbldR = crate::BitReader; +pub type EPDISBLD_R = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AhberrR = crate::BitReader; +pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUT` reader - Timeout Condition"] -pub type TimeOutR = crate::BitReader; +pub type TIME_OUT_R = crate::BitReader; #[doc = "Field `TimeOUT` writer - Timeout Condition"] -pub type TimeOutW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TIME_OUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmp` reader - IN Token Received When TxFIFO is Empty"] -pub type IntknTxfempR = crate::BitReader; +pub type INTKN_TXFEMP_R = crate::BitReader; #[doc = "Field `INTknTXFEmp` writer - IN Token Received When TxFIFO is Empty"] -pub type IntknTxfempW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INTKN_TXFEMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEff` reader - IN Endpoint NAK Effective"] -pub type InepnakEffR = crate::BitReader; +pub type INEPNAK_EFF_R = crate::BitReader; #[doc = "Field `INEPNakEff` writer - IN Endpoint NAK Effective"] -pub type InepnakEffW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INEPNAK_EFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFEmp` reader - Transmit FIFO Empty"] -pub type TxFempR = crate::BitReader; +pub type TX_FEMP_R = crate::BitReader; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrR = crate::BitReader; +pub type BNAINTR_R = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XferComplR { - XferComplR::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XFER_COMPL_R { + XFER_COMPL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EpdisbldR { - EpdisbldR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EPDISBLD_R { + EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AhberrR { - AhberrR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AHBERR_R { + AHBERR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - pub fn time_out(&self) -> TimeOutR { - TimeOutR::new(((self.bits >> 3) & 1) != 0) + pub fn time_out(&self) -> TIME_OUT_R { + TIME_OUT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - pub fn intkn_txfemp(&self) -> IntknTxfempR { - IntknTxfempR::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp(&self) -> INTKN_TXFEMP_R { + INTKN_TXFEMP_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - pub fn inepnak_eff(&self) -> InepnakEffR { - InepnakEffR::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff(&self) -> INEPNAK_EFF_R { + INEPNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Empty"] #[inline(always)] - pub fn tx_femp(&self) -> TxFempR { - TxFempR::new(((self.bits >> 7) & 1) != 0) + pub fn tx_femp(&self) -> TX_FEMP_R { + TX_FEMP_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BnaintrR { - BnaintrR::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BNAINTR_R { + BNAINTR_R::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XferComplW { - XferComplW::new(self, 0) + pub fn xfer_compl(&mut self) -> XFER_COMPL_W { + XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EpdisbldW { - EpdisbldW::new(self, 1) + pub fn epdisbld(&mut self) -> EPDISBLD_W { + EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AhberrW { - AhberrW::new(self, 2) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] #[must_use] - pub fn time_out(&mut self) -> TimeOutW { - TimeOutW::new(self, 3) + pub fn time_out(&mut self) -> TIME_OUT_W { + TIME_OUT_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] #[must_use] - pub fn intkn_txfemp(&mut self) -> IntknTxfempW { - IntknTxfempW::new(self, 4) + pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { + INTKN_TXFEMP_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] #[must_use] - pub fn inepnak_eff(&mut self) -> InepnakEffW { - InepnakEffW::new(self, 6) + pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { + INEPNAK_EFF_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BnaintrW { - BnaintrW::new(self, 9) + pub fn bnaintr(&mut self) -> BNAINTR_W { + BNAINTR_W::new(self, 9) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Diepint0Spec; -impl crate::RegisterSpec for Diepint0Spec { +pub struct DIEPINT0_SPEC; +impl crate::RegisterSpec for DIEPINT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepint0::R`](R) reader structure"] -impl crate::Readable for Diepint0Spec {} +impl crate::Readable for DIEPINT0_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepint0::W`](W) writer structure"] -impl crate::Writable for Diepint0Spec { +impl crate::Writable for DIEPINT0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPINT0 to value 0x80"] -impl crate::Resettable for Diepint0Spec { +impl crate::Resettable for DIEPINT0_SPEC { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep0/dieptsiz0.rs b/src/usb0_ep0/dieptsiz0.rs index 0c40c6d1..9a478f5d 100644 --- a/src/usb0_ep0/dieptsiz0.rs +++ b/src/usb0_ep0/dieptsiz0.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTSIZ0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTSIZ0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XferSizeR = crate::FieldReader; +pub type XFER_SIZE_R = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PktCntR = crate::FieldReader; +pub type PKT_CNT_R = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; impl R { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XferSizeR { - XferSizeR::new((self.bits & 0x7f) as u8) + pub fn xfer_size(&self) -> XFER_SIZE_R { + XFER_SIZE_R::new((self.bits & 0x7f) as u8) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PktCntR { - PktCntR::new(((self.bits >> 19) & 3) as u8) + pub fn pkt_cnt(&self) -> PKT_CNT_R { + PKT_CNT_R::new(((self.bits >> 19) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XferSizeW { - XferSizeW::new(self, 0) + pub fn xfer_size(&mut self) -> XFER_SIZE_W { + XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PktCntW { - PktCntW::new(self, 19) + pub fn pkt_cnt(&mut self) -> PKT_CNT_W { + PKT_CNT_W::new(self, 19) } } #[doc = "Device IN Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dieptsiz0Spec; -impl crate::RegisterSpec for Dieptsiz0Spec { +pub struct DIEPTSIZ0_SPEC; +impl crate::RegisterSpec for DIEPTSIZ0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptsiz0::R`](R) reader structure"] -impl crate::Readable for Dieptsiz0Spec {} +impl crate::Readable for DIEPTSIZ0_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptsiz0::W`](W) writer structure"] -impl crate::Writable for Dieptsiz0Spec { +impl crate::Writable for DIEPTSIZ0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTSIZ0 to value 0"] -impl crate::Resettable for Dieptsiz0Spec { +impl crate::Resettable for DIEPTSIZ0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepctl0.rs b/src/usb0_ep0/doepctl0.rs index de265418..90abc27a 100644 --- a/src/usb0_ep0/doepctl0.rs +++ b/src/usb0_ep0/doepctl0.rs @@ -1,211 +1,211 @@ #[doc = "Register `DOEPCTL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Maximum Packet Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mps { +pub enum MPS_A { #[doc = "0: 64 bytes"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 32 bytes"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 16 bytes"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 8 bytes"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mps) -> Self { + fn from(variant: MPS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mps { +impl crate::FieldSpec for MPS_A { type Ux = u8; } -impl crate::IsEnum for Mps {} +impl crate::IsEnum for MPS_A {} #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; -impl MpsR { +pub type MPS_R = crate::FieldReader; +impl MPS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mps { + pub const fn variant(&self) -> MPS_A { match self.bits { - 0 => Mps::Value1, - 1 => Mps::Value2, - 2 => Mps::Value3, - 3 => Mps::Value4, + 0 => MPS_A::VALUE1, + 1 => MPS_A::VALUE2, + 2 => MPS_A::VALUE3, + 3 => MPS_A::VALUE4, _ => unreachable!(), } } #[doc = "64 bytes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mps::Value1 + *self == MPS_A::VALUE1 } #[doc = "32 bytes"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mps::Value2 + *self == MPS_A::VALUE2 } #[doc = "16 bytes"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mps::Value3 + *self == MPS_A::VALUE3 } #[doc = "8 bytes"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mps::Value4 + *self == MPS_A::VALUE4 } } #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; +pub type EPTYPE_R = crate::FieldReader; #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SnpR = crate::BitReader; +pub type SNP_R = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 3) as u8) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 3) as u8) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SnpR { - SnpR::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SNP_R { + SNP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SnpW { - SnpW::new(self, 20) + pub fn snp(&mut self) -> SNP_W { + SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Control OUT Endpoint Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Doepctl0Spec; -impl crate::RegisterSpec for Doepctl0Spec { +pub struct DOEPCTL0_SPEC; +impl crate::RegisterSpec for DOEPCTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepctl0::R`](R) reader structure"] -impl crate::Readable for Doepctl0Spec {} +impl crate::Readable for DOEPCTL0_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepctl0::W`](W) writer structure"] -impl crate::Writable for Doepctl0Spec { +impl crate::Writable for DOEPCTL0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL0 to value 0x8000"] -impl crate::Resettable for Doepctl0Spec { +impl crate::Resettable for DOEPCTL0_SPEC { const RESET_VALUE: u32 = 0x8000; } diff --git a/src/usb0_ep0/doepdma0.rs b/src/usb0_ep0/doepdma0.rs index 85908df8..5d9b0ae8 100644 --- a/src/usb0_ep0/doepdma0.rs +++ b/src/usb0_ep0/doepdma0.rs @@ -1,40 +1,40 @@ #[doc = "Register `DOEPDMA0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPDMA0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DmaaddrR = crate::FieldReader; +pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DmaaddrR { - DmaaddrR::new(self.bits) + pub fn dmaaddr(&self) -> DMAADDR_R { + DMAADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DmaaddrW { - DmaaddrW::new(self, 0) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma0::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Doepdma0Spec; -impl crate::RegisterSpec for Doepdma0Spec { +pub struct DOEPDMA0_SPEC; +impl crate::RegisterSpec for DOEPDMA0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepdma0::R`](R) reader structure"] -impl crate::Readable for Doepdma0Spec {} +impl crate::Readable for DOEPDMA0_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepdma0::W`](W) writer structure"] -impl crate::Writable for Doepdma0Spec { +impl crate::Writable for DOEPDMA0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPDMA0 to value 0"] -impl crate::Resettable for Doepdma0Spec { +impl crate::Resettable for DOEPDMA0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepdmab0.rs b/src/usb0_ep0/doepdmab0.rs index 9629e6ed..ce04ff38 100644 --- a/src/usb0_ep0/doepdmab0.rs +++ b/src/usb0_ep0/doepdmab0.rs @@ -1,22 +1,22 @@ #[doc = "Register `DOEPDMAB0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DmabufferAddrR = crate::FieldReader; +pub type DMABUFFER_ADDR_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DmabufferAddrR { - DmabufferAddrR::new(self.bits) + pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { + DMABUFFER_ADDR_R::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Doepdmab0Spec; -impl crate::RegisterSpec for Doepdmab0Spec { +pub struct DOEPDMAB0_SPEC; +impl crate::RegisterSpec for DOEPDMAB0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepdmab0::R`](R) reader structure"] -impl crate::Readable for Doepdmab0Spec {} +impl crate::Readable for DOEPDMAB0_SPEC {} #[doc = "`reset()` method sets DOEPDMAB0 to value 0"] -impl crate::Resettable for Doepdmab0Spec { +impl crate::Resettable for DOEPDMAB0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/doepint0.rs b/src/usb0_ep0/doepint0.rs index e57bfdab..e3fe2eb1 100644 --- a/src/usb0_ep0/doepint0.rs +++ b/src/usb0_ep0/doepint0.rs @@ -1,205 +1,205 @@ #[doc = "Register `DOEPINT0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPINT0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XferComplR = crate::BitReader; +pub type XFER_COMPL_R = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EpdisbldR = crate::BitReader; +pub type EPDISBLD_R = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AhberrR = crate::BitReader; +pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUp` reader - SETUP Phase Done"] -pub type SetUpR = crate::BitReader; +pub type SET_UP_R = crate::BitReader; #[doc = "Field `SetUp` writer - SETUP Phase Done"] -pub type SetUpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_UP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdis` reader - OUT Token Received When Endpoint Disabled"] -pub type OuttknEpdisR = crate::BitReader; +pub type OUTTKN_EPDIS_R = crate::BitReader; #[doc = "Field `OUTTknEPdis` writer - OUT Token Received When Endpoint Disabled"] -pub type OuttknEpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OUTTKN_EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `StsPhseRcvd` reader - Status Phase Received For Control Write"] -pub type StsPhseRcvdR = crate::BitReader; +pub type STS_PHSE_RCVD_R = crate::BitReader; #[doc = "Field `StsPhseRcvd` writer - Status Phase Received For Control Write"] -pub type StsPhseRcvdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STS_PHSE_RCVD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received"] -pub type Back2backSetupR = crate::BitReader; +pub type BACK2BACK_SETUP_R = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received"] -pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrR = crate::BitReader; +pub type BNAINTR_R = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PktDrpSts` reader - Packet Dropped Status"] -pub type PktDrpStsR = crate::BitReader; +pub type PKT_DRP_STS_R = crate::BitReader; #[doc = "Field `PktDrpSts` writer - Packet Dropped Status"] -pub type PktDrpStsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PKT_DRP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrIntrpt` reader - BbleErr (Babble Error) interrupt"] -pub type BbleErrIntrptR = crate::BitReader; +pub type BBLE_ERR_INTRPT_R = crate::BitReader; #[doc = "Field `BbleErrIntrpt` writer - BbleErr (Babble Error) interrupt"] -pub type BbleErrIntrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BBLE_ERR_INTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKIntrpt` reader - NAK interrupt"] -pub type NakintrptR = crate::BitReader; +pub type NAKINTRPT_R = crate::BitReader; #[doc = "Field `NAKIntrpt` writer - NAK interrupt"] -pub type NakintrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NAKINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETIntrpt` reader - NYET interrupt"] -pub type NyetintrptR = crate::BitReader; +pub type NYETINTRPT_R = crate::BitReader; #[doc = "Field `NYETIntrpt` writer - NYET interrupt"] -pub type NyetintrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NYETINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XferComplR { - XferComplR::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XFER_COMPL_R { + XFER_COMPL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EpdisbldR { - EpdisbldR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EPDISBLD_R { + EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AhberrR { - AhberrR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AHBERR_R { + AHBERR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - pub fn set_up(&self) -> SetUpR { - SetUpR::new(((self.bits >> 3) & 1) != 0) + pub fn set_up(&self) -> SET_UP_R { + SET_UP_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - pub fn outtkn_epdis(&self) -> OuttknEpdisR { - OuttknEpdisR::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis(&self) -> OUTTKN_EPDIS_R { + OUTTKN_EPDIS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - pub fn sts_phse_rcvd(&self) -> StsPhseRcvdR { - StsPhseRcvdR::new(((self.bits >> 5) & 1) != 0) + pub fn sts_phse_rcvd(&self) -> STS_PHSE_RCVD_R { + STS_PHSE_RCVD_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - pub fn back2back_setup(&self) -> Back2backSetupR { - Back2backSetupR::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { + BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BnaintrR { - BnaintrR::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BNAINTR_R { + BNAINTR_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - pub fn pkt_drp_sts(&self) -> PktDrpStsR { - PktDrpStsR::new(((self.bits >> 11) & 1) != 0) + pub fn pkt_drp_sts(&self) -> PKT_DRP_STS_R { + PKT_DRP_STS_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - pub fn bble_err_intrpt(&self) -> BbleErrIntrptR { - BbleErrIntrptR::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_intrpt(&self) -> BBLE_ERR_INTRPT_R { + BBLE_ERR_INTRPT_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - pub fn nakintrpt(&self) -> NakintrptR { - NakintrptR::new(((self.bits >> 13) & 1) != 0) + pub fn nakintrpt(&self) -> NAKINTRPT_R { + NAKINTRPT_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - pub fn nyetintrpt(&self) -> NyetintrptR { - NyetintrptR::new(((self.bits >> 14) & 1) != 0) + pub fn nyetintrpt(&self) -> NYETINTRPT_R { + NYETINTRPT_R::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XferComplW { - XferComplW::new(self, 0) + pub fn xfer_compl(&mut self) -> XFER_COMPL_W { + XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EpdisbldW { - EpdisbldW::new(self, 1) + pub fn epdisbld(&mut self) -> EPDISBLD_W { + EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AhberrW { - AhberrW::new(self, 2) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] #[must_use] - pub fn set_up(&mut self) -> SetUpW { - SetUpW::new(self, 3) + pub fn set_up(&mut self) -> SET_UP_W { + SET_UP_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] #[must_use] - pub fn outtkn_epdis(&mut self) -> OuttknEpdisW { - OuttknEpdisW::new(self, 4) + pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { + OUTTKN_EPDIS_W::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] #[must_use] - pub fn sts_phse_rcvd(&mut self) -> StsPhseRcvdW { - StsPhseRcvdW::new(self, 5) + pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { + STS_PHSE_RCVD_W::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> Back2backSetupW { - Back2backSetupW::new(self, 6) + pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { + BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BnaintrW { - BnaintrW::new(self, 9) + pub fn bnaintr(&mut self) -> BNAINTR_W { + BNAINTR_W::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] #[must_use] - pub fn pkt_drp_sts(&mut self) -> PktDrpStsW { - PktDrpStsW::new(self, 11) + pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { + PKT_DRP_STS_W::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] #[must_use] - pub fn bble_err_intrpt(&mut self) -> BbleErrIntrptW { - BbleErrIntrptW::new(self, 12) + pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { + BBLE_ERR_INTRPT_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nakintrpt(&mut self) -> NakintrptW { - NakintrptW::new(self, 13) + pub fn nakintrpt(&mut self) -> NAKINTRPT_W { + NAKINTRPT_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyetintrpt(&mut self) -> NyetintrptW { - NyetintrptW::new(self, 14) + pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { + NYETINTRPT_W::new(self, 14) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Doepint0Spec; -impl crate::RegisterSpec for Doepint0Spec { +pub struct DOEPINT0_SPEC; +impl crate::RegisterSpec for DOEPINT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepint0::R`](R) reader structure"] -impl crate::Readable for Doepint0Spec {} +impl crate::Readable for DOEPINT0_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepint0::W`](W) writer structure"] -impl crate::Writable for Doepint0Spec { +impl crate::Writable for DOEPINT0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPINT0 to value 0x80"] -impl crate::Resettable for Doepint0Spec { +impl crate::Resettable for DOEPINT0_SPEC { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep0/doeptsiz0.rs b/src/usb0_ep0/doeptsiz0.rs index e80931b5..04000399 100644 --- a/src/usb0_ep0/doeptsiz0.rs +++ b/src/usb0_ep0/doeptsiz0.rs @@ -1,68 +1,68 @@ #[doc = "Register `DOEPTSIZ0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XferSizeR = crate::FieldReader; +pub type XFER_SIZE_R = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 7>; +pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 7>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PktCntR = crate::FieldReader; +pub type PKT_CNT_R = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "SETUP Packet Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Supcnt { +pub enum SUPCNT_A { #[doc = "1: 1 packet"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: 2 packets"] - Value2 = 2, + VALUE2 = 2, #[doc = "3: 3 packets"] - Value3 = 3, + VALUE3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Supcnt) -> Self { + fn from(variant: SUPCNT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Supcnt { +impl crate::FieldSpec for SUPCNT_A { type Ux = u8; } -impl crate::IsEnum for Supcnt {} +impl crate::IsEnum for SUPCNT_A {} #[doc = "Field `SUPCnt` reader - SETUP Packet Count"] -pub type SupcntR = crate::FieldReader; -impl SupcntR { +pub type SUPCNT_R = crate::FieldReader; +impl SUPCNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(Supcnt::Value1), - 2 => Some(Supcnt::Value2), - 3 => Some(Supcnt::Value3), + 1 => Some(SUPCNT_A::VALUE1), + 2 => Some(SUPCNT_A::VALUE2), + 3 => Some(SUPCNT_A::VALUE3), _ => None, } } #[doc = "1 packet"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Supcnt::Value1 + *self == SUPCNT_A::VALUE1 } #[doc = "2 packets"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Supcnt::Value2 + *self == SUPCNT_A::VALUE2 } #[doc = "3 packets"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Supcnt::Value3 + *self == SUPCNT_A::VALUE3 } } #[doc = "Field `SUPCnt` writer - SETUP Packet Count"] -pub type SupcntW<'a, REG> = crate::FieldWriter<'a, REG, 2, Supcnt>; -impl<'a, REG> SupcntW<'a, REG> +pub type SUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SUPCNT_A>; +impl<'a, REG> SUPCNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,70 +70,70 @@ where #[doc = "1 packet"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Supcnt::Value1) + self.variant(SUPCNT_A::VALUE1) } #[doc = "2 packets"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Supcnt::Value2) + self.variant(SUPCNT_A::VALUE2) } #[doc = "3 packets"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Supcnt::Value3) + self.variant(SUPCNT_A::VALUE3) } } impl R { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XferSizeR { - XferSizeR::new((self.bits & 0x7f) as u8) + pub fn xfer_size(&self) -> XFER_SIZE_R { + XFER_SIZE_R::new((self.bits & 0x7f) as u8) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PktCntR { - PktCntR::new(((self.bits >> 19) & 3) as u8) + pub fn pkt_cnt(&self) -> PKT_CNT_R { + PKT_CNT_R::new(((self.bits >> 19) & 3) as u8) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] - pub fn supcnt(&self) -> SupcntR { - SupcntR::new(((self.bits >> 29) & 3) as u8) + pub fn supcnt(&self) -> SUPCNT_R { + SUPCNT_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XferSizeW { - XferSizeW::new(self, 0) + pub fn xfer_size(&mut self) -> XFER_SIZE_W { + XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PktCntW { - PktCntW::new(self, 19) + pub fn pkt_cnt(&mut self) -> PKT_CNT_W { + PKT_CNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] #[must_use] - pub fn supcnt(&mut self) -> SupcntW { - SupcntW::new(self, 29) + pub fn supcnt(&mut self) -> SUPCNT_W { + SUPCNT_W::new(self, 29) } } #[doc = "Device OUT Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Doeptsiz0Spec; -impl crate::RegisterSpec for Doeptsiz0Spec { +pub struct DOEPTSIZ0_SPEC; +impl crate::RegisterSpec for DOEPTSIZ0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz0::R`](R) reader structure"] -impl crate::Readable for Doeptsiz0Spec {} +impl crate::Readable for DOEPTSIZ0_SPEC {} #[doc = "`write(|w| ..)` method takes [`doeptsiz0::W`](W) writer structure"] -impl crate::Writable for Doeptsiz0Spec { +impl crate::Writable for DOEPTSIZ0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ0 to value 0"] -impl crate::Resettable for Doeptsiz0Spec { +impl crate::Resettable for DOEPTSIZ0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep0/dtxfsts0.rs b/src/usb0_ep0/dtxfsts0.rs index ad7b91ed..704576fe 100644 --- a/src/usb0_ep0/dtxfsts0.rs +++ b/src/usb0_ep0/dtxfsts0.rs @@ -1,70 +1,70 @@ #[doc = "Register `DTXFSTS0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "IN Endpoint TxFIFO Space Avail\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum IneptxFspcAvail { +pub enum INEPTX_FSPC_AVAIL_A { #[doc = "0: Endpoint TxFIFO is full"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 1 word available"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 2 words available"] - Value3 = 2, + VALUE3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: IneptxFspcAvail) -> Self { + fn from(variant: INEPTX_FSPC_AVAIL_A) -> Self { variant as _ } } -impl crate::FieldSpec for IneptxFspcAvail { +impl crate::FieldSpec for INEPTX_FSPC_AVAIL_A { type Ux = u16; } -impl crate::IsEnum for IneptxFspcAvail {} +impl crate::IsEnum for INEPTX_FSPC_AVAIL_A {} #[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] -pub type IneptxFspcAvailR = crate::FieldReader; -impl IneptxFspcAvailR { +pub type INEPTX_FSPC_AVAIL_R = crate::FieldReader; +impl INEPTX_FSPC_AVAIL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(IneptxFspcAvail::Value1), - 1 => Some(IneptxFspcAvail::Value2), - 2 => Some(IneptxFspcAvail::Value3), + 0 => Some(INEPTX_FSPC_AVAIL_A::VALUE1), + 1 => Some(INEPTX_FSPC_AVAIL_A::VALUE2), + 2 => Some(INEPTX_FSPC_AVAIL_A::VALUE3), _ => None, } } #[doc = "Endpoint TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IneptxFspcAvail::Value1 + *self == INEPTX_FSPC_AVAIL_A::VALUE1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IneptxFspcAvail::Value2 + *self == INEPTX_FSPC_AVAIL_A::VALUE2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == IneptxFspcAvail::Value3 + *self == INEPTX_FSPC_AVAIL_A::VALUE3 } } impl R { #[doc = "Bits 0:15 - IN Endpoint TxFIFO Space Avail"] #[inline(always)] - pub fn ineptx_fspc_avail(&self) -> IneptxFspcAvailR { - IneptxFspcAvailR::new((self.bits & 0xffff) as u16) + pub fn ineptx_fspc_avail(&self) -> INEPTX_FSPC_AVAIL_R { + INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) } } #[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dtxfsts0Spec; -impl crate::RegisterSpec for Dtxfsts0Spec { +pub struct DTXFSTS0_SPEC; +impl crate::RegisterSpec for DTXFSTS0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtxfsts0::R`](R) reader structure"] -impl crate::Readable for Dtxfsts0Spec {} +impl crate::Readable for DTXFSTS0_SPEC {} #[doc = "`reset()` method sets DTXFSTS0 to value 0"] -impl crate::Resettable for Dtxfsts0Spec { +impl crate::Resettable for DTXFSTS0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1.rs b/src/usb0_ep1.rs index b6baef37..9d5a4e6f 100644 --- a/src/usb0_ep1.rs +++ b/src/usb0_ep1.rs @@ -3,175 +3,161 @@ pub struct RegisterBlock { _reserved_0_diepctl: [u8; 0x04], _reserved1: [u8; 0x04], - diepint: Diepint, + diepint: DIEPINT, _reserved2: [u8; 0x04], - dieptsiz: Dieptsiz, - diepdma: Diepdma, - dtxfsts: Dtxfsts, - diepdmab: Diepdmab, + dieptsiz: DIEPTSIZ, + diepdma: DIEPDMA, + dtxfsts: DTXFSTS, + diepdmab: DIEPDMAB, _reserved6: [u8; 0x01e0], _reserved_6_doepctl: [u8; 0x04], _reserved7: [u8; 0x04], - doepint: Doepint, + doepint: DOEPINT, _reserved8: [u8; 0x04], _reserved_8_doeptsiz: [u8; 0x04], - doepdma: Doepdma, + doepdma: DOEPDMA, _reserved10: [u8; 0x04], - doepdmab: Doepdmab, + doepdmab: DOEPDMAB, } impl RegisterBlock { #[doc = "0x00 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] - pub const fn diepctl_intbulk(&self) -> &DiepctlIntbulk { + pub const fn diepctl_intbulk(&self) -> &DIEPCTL_INTBULK { unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x00 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] - pub const fn diepctl_isocont(&self) -> &DiepctlIsocont { + pub const fn diepctl_isocont(&self) -> &DIEPCTL_ISOCONT { unsafe { &*(self as *const Self).cast::().add(0).cast() } } #[doc = "0x08 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn diepint(&self) -> &Diepint { + pub const fn diepint(&self) -> &DIEPINT { &self.diepint } #[doc = "0x10 - Device Endpoint Transfer Size Register"] #[inline(always)] - pub const fn dieptsiz(&self) -> &Dieptsiz { + pub const fn dieptsiz(&self) -> &DIEPTSIZ { &self.dieptsiz } #[doc = "0x14 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn diepdma(&self) -> &Diepdma { + pub const fn diepdma(&self) -> &DIEPDMA { &self.diepdma } #[doc = "0x18 - Device IN Endpoint Transmit FIFO Status Register"] #[inline(always)] - pub const fn dtxfsts(&self) -> &Dtxfsts { + pub const fn dtxfsts(&self) -> &DTXFSTS { &self.dtxfsts } #[doc = "0x1c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn diepdmab(&self) -> &Diepdmab { + pub const fn diepdmab(&self) -> &DIEPDMAB { &self.diepdmab } #[doc = "0x200 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] - pub const fn doepctl_intbulk(&self) -> &DoepctlIntbulk { + pub const fn doepctl_intbulk(&self) -> &DOEPCTL_INTBULK { unsafe { &*(self as *const Self).cast::().add(512).cast() } } #[doc = "0x200 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] - pub const fn doepctl_isocont(&self) -> &DoepctlIsocont { + pub const fn doepctl_isocont(&self) -> &DOEPCTL_ISOCONT { unsafe { &*(self as *const Self).cast::().add(512).cast() } } #[doc = "0x208 - Device Endpoint Interrupt Register"] #[inline(always)] - pub const fn doepint(&self) -> &Doepint { + pub const fn doepint(&self) -> &DOEPINT { &self.doepint } #[doc = "0x210 - Device Endpoint Transfer Size Register \\[CONT\\]"] #[inline(always)] - pub const fn doeptsiz_control(&self) -> &DoeptsizControl { + pub const fn doeptsiz_control(&self) -> &DOEPTSIZ_CONTROL { unsafe { &*(self as *const Self).cast::().add(528).cast() } } #[doc = "0x210 - Device Endpoint Transfer Size Register \\[ISO\\]"] #[inline(always)] - pub const fn doeptsiz_iso(&self) -> &DoeptsizIso { + pub const fn doeptsiz_iso(&self) -> &DOEPTSIZ_ISO { unsafe { &*(self as *const Self).cast::().add(528).cast() } } #[doc = "0x214 - Device Endpoint DMA Address Register"] #[inline(always)] - pub const fn doepdma(&self) -> &Doepdma { + pub const fn doepdma(&self) -> &DOEPDMA { &self.doepdma } #[doc = "0x21c - Device Endpoint DMA Buffer Address Register"] #[inline(always)] - pub const fn doepdmab(&self) -> &Doepdmab { + pub const fn doepdmab(&self) -> &DOEPDMAB { &self.doepdmab } } #[doc = "DIEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_isocont`] module"] -#[doc(alias = "DIEPCTL_ISOCONT")] -pub type DiepctlIsocont = crate::Reg; +pub type DIEPCTL_ISOCONT = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod diepctl_isocont; #[doc = "DIEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepctl_intbulk`] module"] -#[doc(alias = "DIEPCTL_INTBULK")] -pub type DiepctlIntbulk = crate::Reg; +pub type DIEPCTL_INTBULK = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod diepctl_intbulk; #[doc = "DIEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepint`] module"] -#[doc(alias = "DIEPINT")] -pub type Diepint = crate::Reg; +pub type DIEPINT = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod diepint; #[doc = "DIEPTSIZ (rw) register accessor: Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dieptsiz`] module"] -#[doc(alias = "DIEPTSIZ")] -pub type Dieptsiz = crate::Reg; +pub type DIEPTSIZ = crate::Reg; #[doc = "Device Endpoint Transfer Size Register"] pub mod dieptsiz; #[doc = "DIEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdma`] module"] -#[doc(alias = "DIEPDMA")] -pub type Diepdma = crate::Reg; +pub type DIEPDMA = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod diepdma; #[doc = "DTXFSTS (r) register accessor: Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dtxfsts`] module"] -#[doc(alias = "DTXFSTS")] -pub type Dtxfsts = crate::Reg; +pub type DTXFSTS = crate::Reg; #[doc = "Device IN Endpoint Transmit FIFO Status Register"] pub mod dtxfsts; #[doc = "DIEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@diepdmab`] module"] -#[doc(alias = "DIEPDMAB")] -pub type Diepdmab = crate::Reg; +pub type DIEPDMAB = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod diepdmab; #[doc = "DOEPCTL_ISOCONT (rw) register accessor: Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_isocont`] module"] -#[doc(alias = "DOEPCTL_ISOCONT")] -pub type DoepctlIsocont = crate::Reg; +pub type DOEPCTL_ISOCONT = crate::Reg; #[doc = "Device Endpoint Control Register \\[ISOCONT\\]"] pub mod doepctl_isocont; #[doc = "DOEPCTL_INTBULK (rw) register accessor: Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepctl_intbulk`] module"] -#[doc(alias = "DOEPCTL_INTBULK")] -pub type DoepctlIntbulk = crate::Reg; +pub type DOEPCTL_INTBULK = crate::Reg; #[doc = "Device Endpoint Control Register \\[INTBULK\\]"] pub mod doepctl_intbulk; #[doc = "DOEPINT (rw) register accessor: Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepint`] module"] -#[doc(alias = "DOEPINT")] -pub type Doepint = crate::Reg; +pub type DOEPINT = crate::Reg; #[doc = "Device Endpoint Interrupt Register"] pub mod doepint; #[doc = "DOEPTSIZ_ISO (rw) register accessor: Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_iso`] module"] -#[doc(alias = "DOEPTSIZ_ISO")] -pub type DoeptsizIso = crate::Reg; +pub type DOEPTSIZ_ISO = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[ISO\\]"] pub mod doeptsiz_iso; #[doc = "DOEPTSIZ_CONTROL (rw) register accessor: Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doeptsiz_control`] module"] -#[doc(alias = "DOEPTSIZ_CONTROL")] -pub type DoeptsizControl = crate::Reg; +pub type DOEPTSIZ_CONTROL = crate::Reg; #[doc = "Device Endpoint Transfer Size Register \\[CONT\\]"] pub mod doeptsiz_control; #[doc = "DOEPDMA (rw) register accessor: Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdma`] module"] -#[doc(alias = "DOEPDMA")] -pub type Doepdma = crate::Reg; +pub type DOEPDMA = crate::Reg; #[doc = "Device Endpoint DMA Address Register"] pub mod doepdma; #[doc = "DOEPDMAB (r) register accessor: Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@doepdmab`] module"] -#[doc(alias = "DOEPDMAB")] -pub type Doepdmab = crate::Reg; +pub type DOEPDMAB = crate::Reg; #[doc = "Device Endpoint DMA Buffer Address Register"] pub mod doepdmab; diff --git a/src/usb0_ep1/diepctl_intbulk.rs b/src/usb0_ep1/diepctl_intbulk.rs index df2adeea..59edd3b0 100644 --- a/src/usb0_ep1/diepctl_intbulk.rs +++ b/src/usb0_ep1/diepctl_intbulk.rs @@ -1,148 +1,148 @@ #[doc = "Register `DIEPCTL_INTBULK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL_INTBULK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; +pub type MPS_R = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Endpoint Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpid { +pub enum DPID_A { #[doc = "0: DATA0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DATA1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpid) -> Self { + fn from(variant: DPID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPID` reader - Endpoint Data PID"] -pub type DpidR = crate::BitReader; -impl DpidR { +pub type DPID_R = crate::BitReader; +impl DPID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpid { + pub const fn variant(&self) -> DPID_A { match self.bits { - false => Dpid::Value1, - true => Dpid::Value2, + false => DPID_A::VALUE1, + true => DPID_A::VALUE2, } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpid::Value1 + *self == DPID_A::VALUE1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpid::Value2 + *self == DPID_A::VALUE2 } } #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Eptype { +pub enum EPTYPE_A { #[doc = "0: Control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Isochronous"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bulk"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Interrupt"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Eptype) -> Self { + fn from(variant: EPTYPE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Eptype { +impl crate::FieldSpec for EPTYPE_A { type Ux = u8; } -impl crate::IsEnum for Eptype {} +impl crate::IsEnum for EPTYPE_A {} #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; -impl EptypeR { +pub type EPTYPE_R = crate::FieldReader; +impl EPTYPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eptype { + pub const fn variant(&self) -> EPTYPE_A { match self.bits { - 0 => Eptype::Value1, - 1 => Eptype::Value2, - 2 => Eptype::Value3, - 3 => Eptype::Value4, + 0 => EPTYPE_A::VALUE1, + 1 => EPTYPE_A::VALUE2, + 2 => EPTYPE_A::VALUE3, + 3 => EPTYPE_A::VALUE4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eptype::Value1 + *self == EPTYPE_A::VALUE1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eptype::Value2 + *self == EPTYPE_A::VALUE2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Eptype::Value3 + *self == EPTYPE_A::VALUE3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Eptype::Value4 + *self == EPTYPE_A::VALUE4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EptypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Eptype, crate::Safe>; -impl<'a, REG> EptypeW<'a, REG> +pub type EPTYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EPTYPE_A, crate::Safe>; +impl<'a, REG> EPTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -150,192 +150,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eptype::Value1) + self.variant(EPTYPE_A::VALUE1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eptype::Value2) + self.variant(EPTYPE_A::VALUE2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Eptype::Value3) + self.variant(EPTYPE_A::VALUE3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Eptype::Value4) + self.variant(EPTYPE_A::VALUE4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SnpR = crate::BitReader; +pub type SNP_R = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; +pub type TX_FNUM_R = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD0PID` writer - Set DATA0 PID"] -pub type SetD0pidW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_D0PID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD1PID` writer - 29 Set DATA1 PID"] -pub type SetD1pidW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_D1PID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Endpoint Data PID"] #[inline(always)] - pub fn dpid(&self) -> DpidR { - DpidR::new(((self.bits >> 16) & 1) != 0) + pub fn dpid(&self) -> DPID_R { + DPID_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SnpR { - SnpR::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SNP_R { + SNP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MpsW { - MpsW::new(self, 0) + pub fn mps(&mut self) -> MPS_W { + MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> UsbactEpW { - UsbactEpW::new(self, 15) + pub fn usbact_ep(&mut self) -> USBACT_EP_W { + USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EptypeW { - EptypeW::new(self, 18) + pub fn eptype(&mut self) -> EPTYPE_W { + EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SnpW { - SnpW::new(self, 20) + pub fn snp(&mut self) -> SNP_W { + SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 22) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn set_d0pid(&mut self) -> SetD0pidW { - SetD0pidW::new(self, 28) + pub fn set_d0pid(&mut self) -> SET_D0PID_W { + SET_D0PID_W::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] #[must_use] - pub fn set_d1pid(&mut self) -> SetD1pidW { - SetD1pidW::new(self, 29) + pub fn set_d1pid(&mut self) -> SET_D1PID_W { + SET_D1PID_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EpdisW { - EpdisW::new(self, 30) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepctlIntbulkSpec; -impl crate::RegisterSpec for DiepctlIntbulkSpec { +pub struct DIEPCTL_INTBULK_SPEC; +impl crate::RegisterSpec for DIEPCTL_INTBULK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepctl_intbulk::R`](R) reader structure"] -impl crate::Readable for DiepctlIntbulkSpec {} +impl crate::Readable for DIEPCTL_INTBULK_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepctl_intbulk::W`](W) writer structure"] -impl crate::Writable for DiepctlIntbulkSpec { +impl crate::Writable for DIEPCTL_INTBULK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL_INTBULK to value 0"] -impl crate::Resettable for DiepctlIntbulkSpec { +impl crate::Resettable for DIEPCTL_INTBULK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepctl_isocont.rs b/src/usb0_ep1/diepctl_isocont.rs index 0d2ccf5c..993454ff 100644 --- a/src/usb0_ep1/diepctl_isocont.rs +++ b/src/usb0_ep1/diepctl_isocont.rs @@ -1,148 +1,148 @@ #[doc = "Register `DIEPCTL_ISOCONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPCTL_ISOCONT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; +pub type MPS_R = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Even/Odd Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EoFrNum { +pub enum EO_FR_NUM_A { #[doc = "0: Even frame"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Odd rame"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EoFrNum) -> Self { + fn from(variant: EO_FR_NUM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] -pub type EoFrNumR = crate::BitReader; -impl EoFrNumR { +pub type EO_FR_NUM_R = crate::BitReader; +impl EO_FR_NUM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EoFrNum { + pub const fn variant(&self) -> EO_FR_NUM_A { match self.bits { - false => EoFrNum::Value1, - true => EoFrNum::Value2, + false => EO_FR_NUM_A::VALUE1, + true => EO_FR_NUM_A::VALUE2, } } #[doc = "Even frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EoFrNum::Value1 + *self == EO_FR_NUM_A::VALUE1 } #[doc = "Odd rame"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EoFrNum::Value2 + *self == EO_FR_NUM_A::VALUE2 } } #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Eptype { +pub enum EPTYPE_A { #[doc = "0: Control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Isochronous"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bulk"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Interrupt"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Eptype) -> Self { + fn from(variant: EPTYPE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Eptype { +impl crate::FieldSpec for EPTYPE_A { type Ux = u8; } -impl crate::IsEnum for Eptype {} +impl crate::IsEnum for EPTYPE_A {} #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; -impl EptypeR { +pub type EPTYPE_R = crate::FieldReader; +impl EPTYPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eptype { + pub const fn variant(&self) -> EPTYPE_A { match self.bits { - 0 => Eptype::Value1, - 1 => Eptype::Value2, - 2 => Eptype::Value3, - 3 => Eptype::Value4, + 0 => EPTYPE_A::VALUE1, + 1 => EPTYPE_A::VALUE2, + 2 => EPTYPE_A::VALUE3, + 3 => EPTYPE_A::VALUE4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eptype::Value1 + *self == EPTYPE_A::VALUE1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eptype::Value2 + *self == EPTYPE_A::VALUE2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Eptype::Value3 + *self == EPTYPE_A::VALUE3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Eptype::Value4 + *self == EPTYPE_A::VALUE4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EptypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Eptype, crate::Safe>; -impl<'a, REG> EptypeW<'a, REG> +pub type EPTYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EPTYPE_A, crate::Safe>; +impl<'a, REG> EPTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -150,192 +150,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eptype::Value1) + self.variant(EPTYPE_A::VALUE1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eptype::Value2) + self.variant(EPTYPE_A::VALUE2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Eptype::Value3) + self.variant(EPTYPE_A::VALUE3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Eptype::Value4) + self.variant(EPTYPE_A::VALUE4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SnpR = crate::BitReader; +pub type SNP_R = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; +pub type TX_FNUM_R = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetEvenFr` writer - In non-Scatter/Gather DMA mode: Set Even frame"] -pub type SetEvenFrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_EVEN_FR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetOddFr` writer - Set Odd frame"] -pub type SetOddFrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_ODD_FR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Even/Odd Frame"] #[inline(always)] - pub fn eo_fr_num(&self) -> EoFrNumR { - EoFrNumR::new(((self.bits >> 16) & 1) != 0) + pub fn eo_fr_num(&self) -> EO_FR_NUM_R { + EO_FR_NUM_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SnpR { - SnpR::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SNP_R { + SNP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MpsW { - MpsW::new(self, 0) + pub fn mps(&mut self) -> MPS_W { + MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> UsbactEpW { - UsbactEpW::new(self, 15) + pub fn usbact_ep(&mut self) -> USBACT_EP_W { + USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EptypeW { - EptypeW::new(self, 18) + pub fn eptype(&mut self) -> EPTYPE_W { + EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SnpW { - SnpW::new(self, 20) + pub fn snp(&mut self) -> SNP_W { + SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 22) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] #[must_use] - pub fn set_even_fr(&mut self) -> SetEvenFrW { - SetEvenFrW::new(self, 28) + pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { + SET_EVEN_FR_W::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] #[must_use] - pub fn set_odd_fr(&mut self) -> SetOddFrW { - SetOddFrW::new(self, 29) + pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { + SET_ODD_FR_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EpdisW { - EpdisW::new(self, 30) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepctlIsocontSpec; -impl crate::RegisterSpec for DiepctlIsocontSpec { +pub struct DIEPCTL_ISOCONT_SPEC; +impl crate::RegisterSpec for DIEPCTL_ISOCONT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepctl_isocont::R`](R) reader structure"] -impl crate::Readable for DiepctlIsocontSpec {} +impl crate::Readable for DIEPCTL_ISOCONT_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepctl_isocont::W`](W) writer structure"] -impl crate::Writable for DiepctlIsocontSpec { +impl crate::Writable for DIEPCTL_ISOCONT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPCTL_ISOCONT to value 0"] -impl crate::Resettable for DiepctlIsocontSpec { +impl crate::Resettable for DIEPCTL_ISOCONT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepdma.rs b/src/usb0_ep1/diepdma.rs index 64b8a622..b9fb78f1 100644 --- a/src/usb0_ep1/diepdma.rs +++ b/src/usb0_ep1/diepdma.rs @@ -1,40 +1,40 @@ #[doc = "Register `DIEPDMA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPDMA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DmaaddrR = crate::FieldReader; +pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DmaaddrR { - DmaaddrR::new(self.bits) + pub fn dmaaddr(&self) -> DMAADDR_R { + DMAADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DmaaddrW { - DmaaddrW::new(self, 0) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepdmaSpec; -impl crate::RegisterSpec for DiepdmaSpec { +pub struct DIEPDMA_SPEC; +impl crate::RegisterSpec for DIEPDMA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepdma::R`](R) reader structure"] -impl crate::Readable for DiepdmaSpec {} +impl crate::Readable for DIEPDMA_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepdma::W`](W) writer structure"] -impl crate::Writable for DiepdmaSpec { +impl crate::Writable for DIEPDMA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPDMA to value 0"] -impl crate::Resettable for DiepdmaSpec { +impl crate::Resettable for DIEPDMA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepdmab.rs b/src/usb0_ep1/diepdmab.rs index e20e43b7..a695cd8f 100644 --- a/src/usb0_ep1/diepdmab.rs +++ b/src/usb0_ep1/diepdmab.rs @@ -1,22 +1,22 @@ #[doc = "Register `DIEPDMAB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DmabufferAddrR = crate::FieldReader; +pub type DMABUFFER_ADDR_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DmabufferAddrR { - DmabufferAddrR::new(self.bits) + pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { + DMABUFFER_ADDR_R::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepdmabSpec; -impl crate::RegisterSpec for DiepdmabSpec { +pub struct DIEPDMAB_SPEC; +impl crate::RegisterSpec for DIEPDMAB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepdmab::R`](R) reader structure"] -impl crate::Readable for DiepdmabSpec {} +impl crate::Readable for DIEPDMAB_SPEC {} #[doc = "`reset()` method sets DIEPDMAB to value 0"] -impl crate::Resettable for DiepdmabSpec { +impl crate::Resettable for DIEPDMAB_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/diepint.rs b/src/usb0_ep1/diepint.rs index e3232e1e..47b66d8e 100644 --- a/src/usb0_ep1/diepint.rs +++ b/src/usb0_ep1/diepint.rs @@ -1,137 +1,137 @@ #[doc = "Register `DIEPINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XferComplR = crate::BitReader; +pub type XFER_COMPL_R = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EpdisbldR = crate::BitReader; +pub type EPDISBLD_R = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AhberrR = crate::BitReader; +pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TimeOUT` reader - Timeout Condition"] -pub type TimeOutR = crate::BitReader; +pub type TIME_OUT_R = crate::BitReader; #[doc = "Field `TimeOUT` writer - Timeout Condition"] -pub type TimeOutW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TIME_OUT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INTknTXFEmp` reader - IN Token Received When TxFIFO is Empty"] -pub type IntknTxfempR = crate::BitReader; +pub type INTKN_TXFEMP_R = crate::BitReader; #[doc = "Field `INTknTXFEmp` writer - IN Token Received When TxFIFO is Empty"] -pub type IntknTxfempW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INTKN_TXFEMP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `INEPNakEff` reader - IN Endpoint NAK Effective"] -pub type InepnakEffR = crate::BitReader; +pub type INEPNAK_EFF_R = crate::BitReader; #[doc = "Field `INEPNakEff` writer - IN Endpoint NAK Effective"] -pub type InepnakEffW<'a, REG> = crate::BitWriter<'a, REG>; +pub type INEPNAK_EFF_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFEmp` reader - Transmit FIFO Empty"] -pub type TxFempR = crate::BitReader; +pub type TX_FEMP_R = crate::BitReader; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrR = crate::BitReader; +pub type BNAINTR_R = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XferComplR { - XferComplR::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XFER_COMPL_R { + XFER_COMPL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EpdisbldR { - EpdisbldR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EPDISBLD_R { + EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AhberrR { - AhberrR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AHBERR_R { + AHBERR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - pub fn time_out(&self) -> TimeOutR { - TimeOutR::new(((self.bits >> 3) & 1) != 0) + pub fn time_out(&self) -> TIME_OUT_R { + TIME_OUT_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - pub fn intkn_txfemp(&self) -> IntknTxfempR { - IntknTxfempR::new(((self.bits >> 4) & 1) != 0) + pub fn intkn_txfemp(&self) -> INTKN_TXFEMP_R { + INTKN_TXFEMP_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - pub fn inepnak_eff(&self) -> InepnakEffR { - InepnakEffR::new(((self.bits >> 6) & 1) != 0) + pub fn inepnak_eff(&self) -> INEPNAK_EFF_R { + INEPNAK_EFF_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Empty"] #[inline(always)] - pub fn tx_femp(&self) -> TxFempR { - TxFempR::new(((self.bits >> 7) & 1) != 0) + pub fn tx_femp(&self) -> TX_FEMP_R { + TX_FEMP_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BnaintrR { - BnaintrR::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BNAINTR_R { + BNAINTR_R::new(((self.bits >> 9) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XferComplW { - XferComplW::new(self, 0) + pub fn xfer_compl(&mut self) -> XFER_COMPL_W { + XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EpdisbldW { - EpdisbldW::new(self, 1) + pub fn epdisbld(&mut self) -> EPDISBLD_W { + EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AhberrW { - AhberrW::new(self, 2) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] #[must_use] - pub fn time_out(&mut self) -> TimeOutW { - TimeOutW::new(self, 3) + pub fn time_out(&mut self) -> TIME_OUT_W { + TIME_OUT_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] #[must_use] - pub fn intkn_txfemp(&mut self) -> IntknTxfempW { - IntknTxfempW::new(self, 4) + pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { + INTKN_TXFEMP_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] #[must_use] - pub fn inepnak_eff(&mut self) -> InepnakEffW { - InepnakEffW::new(self, 6) + pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { + INEPNAK_EFF_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BnaintrW { - BnaintrW::new(self, 9) + pub fn bnaintr(&mut self) -> BNAINTR_W { + BNAINTR_W::new(self, 9) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`diepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`diepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DiepintSpec; -impl crate::RegisterSpec for DiepintSpec { +pub struct DIEPINT_SPEC; +impl crate::RegisterSpec for DIEPINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`diepint::R`](R) reader structure"] -impl crate::Readable for DiepintSpec {} +impl crate::Readable for DIEPINT_SPEC {} #[doc = "`write(|w| ..)` method takes [`diepint::W`](W) writer structure"] -impl crate::Writable for DiepintSpec { +impl crate::Writable for DIEPINT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPINT to value 0x80"] -impl crate::Resettable for DiepintSpec { +impl crate::Resettable for DIEPINT_SPEC { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep1/dieptsiz.rs b/src/usb0_ep1/dieptsiz.rs index d05d69cd..78f6d4fe 100644 --- a/src/usb0_ep1/dieptsiz.rs +++ b/src/usb0_ep1/dieptsiz.rs @@ -1,55 +1,55 @@ #[doc = "Register `DIEPTSIZ` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DIEPTSIZ` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XferSizeR = crate::FieldReader; +pub type XFER_SIZE_R = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PktCntR = crate::FieldReader; +pub type PKT_CNT_R = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XferSizeR { - XferSizeR::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XFER_SIZE_R { + XFER_SIZE_R::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PktCntR { - PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PKT_CNT_R { + PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XferSizeW { - XferSizeW::new(self, 0) + pub fn xfer_size(&mut self) -> XFER_SIZE_W { + XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PktCntW { - PktCntW::new(self, 19) + pub fn pkt_cnt(&mut self) -> PKT_CNT_W { + PKT_CNT_W::new(self, 19) } } #[doc = "Device Endpoint Transfer Size Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dieptsiz::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dieptsiz::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DieptsizSpec; -impl crate::RegisterSpec for DieptsizSpec { +pub struct DIEPTSIZ_SPEC; +impl crate::RegisterSpec for DIEPTSIZ_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dieptsiz::R`](R) reader structure"] -impl crate::Readable for DieptsizSpec {} +impl crate::Readable for DIEPTSIZ_SPEC {} #[doc = "`write(|w| ..)` method takes [`dieptsiz::W`](W) writer structure"] -impl crate::Writable for DieptsizSpec { +impl crate::Writable for DIEPTSIZ_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DIEPTSIZ to value 0"] -impl crate::Resettable for DieptsizSpec { +impl crate::Resettable for DIEPTSIZ_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepctl_intbulk.rs b/src/usb0_ep1/doepctl_intbulk.rs index 06bf2bc7..f7eb0649 100644 --- a/src/usb0_ep1/doepctl_intbulk.rs +++ b/src/usb0_ep1/doepctl_intbulk.rs @@ -1,148 +1,148 @@ #[doc = "Register `DOEPCTL_INTBULK` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL_INTBULK` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; +pub type MPS_R = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Endpoint Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpid { +pub enum DPID_A { #[doc = "0: DATA0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DATA1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpid) -> Self { + fn from(variant: DPID_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPID` reader - Endpoint Data PID"] -pub type DpidR = crate::BitReader; -impl DpidR { +pub type DPID_R = crate::BitReader; +impl DPID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpid { + pub const fn variant(&self) -> DPID_A { match self.bits { - false => Dpid::Value1, - true => Dpid::Value2, + false => DPID_A::VALUE1, + true => DPID_A::VALUE2, } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpid::Value1 + *self == DPID_A::VALUE1 } #[doc = "DATA1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpid::Value2 + *self == DPID_A::VALUE2 } } #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Eptype { +pub enum EPTYPE_A { #[doc = "0: Control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Isochronous"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bulk"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Interrupt"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Eptype) -> Self { + fn from(variant: EPTYPE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Eptype { +impl crate::FieldSpec for EPTYPE_A { type Ux = u8; } -impl crate::IsEnum for Eptype {} +impl crate::IsEnum for EPTYPE_A {} #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; -impl EptypeR { +pub type EPTYPE_R = crate::FieldReader; +impl EPTYPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eptype { + pub const fn variant(&self) -> EPTYPE_A { match self.bits { - 0 => Eptype::Value1, - 1 => Eptype::Value2, - 2 => Eptype::Value3, - 3 => Eptype::Value4, + 0 => EPTYPE_A::VALUE1, + 1 => EPTYPE_A::VALUE2, + 2 => EPTYPE_A::VALUE3, + 3 => EPTYPE_A::VALUE4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eptype::Value1 + *self == EPTYPE_A::VALUE1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eptype::Value2 + *self == EPTYPE_A::VALUE2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Eptype::Value3 + *self == EPTYPE_A::VALUE3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Eptype::Value4 + *self == EPTYPE_A::VALUE4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EptypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Eptype, crate::Safe>; -impl<'a, REG> EptypeW<'a, REG> +pub type EPTYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EPTYPE_A, crate::Safe>; +impl<'a, REG> EPTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -150,192 +150,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eptype::Value1) + self.variant(EPTYPE_A::VALUE1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eptype::Value2) + self.variant(EPTYPE_A::VALUE2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Eptype::Value3) + self.variant(EPTYPE_A::VALUE3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Eptype::Value4) + self.variant(EPTYPE_A::VALUE4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SnpR = crate::BitReader; +pub type SNP_R = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; +pub type TX_FNUM_R = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD0PID` writer - Set DATA0 PID"] -pub type SetD0pidW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_D0PID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetD1PID` writer - 29 Set DATA1 PID"] -pub type SetD1pidW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_D1PID_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Endpoint Data PID"] #[inline(always)] - pub fn dpid(&self) -> DpidR { - DpidR::new(((self.bits >> 16) & 1) != 0) + pub fn dpid(&self) -> DPID_R { + DPID_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SnpR { - SnpR::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SNP_R { + SNP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MpsW { - MpsW::new(self, 0) + pub fn mps(&mut self) -> MPS_W { + MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> UsbactEpW { - UsbactEpW::new(self, 15) + pub fn usbact_ep(&mut self) -> USBACT_EP_W { + USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EptypeW { - EptypeW::new(self, 18) + pub fn eptype(&mut self) -> EPTYPE_W { + EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SnpW { - SnpW::new(self, 20) + pub fn snp(&mut self) -> SNP_W { + SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 22) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] #[must_use] - pub fn set_d0pid(&mut self) -> SetD0pidW { - SetD0pidW::new(self, 28) + pub fn set_d0pid(&mut self) -> SET_D0PID_W { + SET_D0PID_W::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] #[must_use] - pub fn set_d1pid(&mut self) -> SetD1pidW { - SetD1pidW::new(self, 29) + pub fn set_d1pid(&mut self) -> SET_D1PID_W { + SET_D1PID_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EpdisW { - EpdisW::new(self, 30) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[INTBULK\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_intbulk::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_intbulk::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepctlIntbulkSpec; -impl crate::RegisterSpec for DoepctlIntbulkSpec { +pub struct DOEPCTL_INTBULK_SPEC; +impl crate::RegisterSpec for DOEPCTL_INTBULK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepctl_intbulk::R`](R) reader structure"] -impl crate::Readable for DoepctlIntbulkSpec {} +impl crate::Readable for DOEPCTL_INTBULK_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepctl_intbulk::W`](W) writer structure"] -impl crate::Writable for DoepctlIntbulkSpec { +impl crate::Writable for DOEPCTL_INTBULK_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL_INTBULK to value 0"] -impl crate::Resettable for DoepctlIntbulkSpec { +impl crate::Resettable for DOEPCTL_INTBULK_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepctl_isocont.rs b/src/usb0_ep1/doepctl_isocont.rs index 8e278577..01f0e2a9 100644 --- a/src/usb0_ep1/doepctl_isocont.rs +++ b/src/usb0_ep1/doepctl_isocont.rs @@ -1,148 +1,148 @@ #[doc = "Register `DOEPCTL_ISOCONT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPCTL_ISOCONT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `MPS` reader - Maximum Packet Size"] -pub type MpsR = crate::FieldReader; +pub type MPS_R = crate::FieldReader; #[doc = "Field `MPS` writer - Maximum Packet Size"] -pub type MpsW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; +pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>; #[doc = "Field `USBActEP` reader - USB Active Endpoint"] -pub type UsbactEpR = crate::BitReader; +pub type USBACT_EP_R = crate::BitReader; #[doc = "Field `USBActEP` writer - USB Active Endpoint"] -pub type UsbactEpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type USBACT_EP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Even/Odd Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum EoFrNum { +pub enum EO_FR_NUM_A { #[doc = "0: Even frame"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Odd rame"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: EoFrNum) -> Self { + fn from(variant: EO_FR_NUM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EO_FrNum` reader - Even/Odd Frame"] -pub type EoFrNumR = crate::BitReader; -impl EoFrNumR { +pub type EO_FR_NUM_R = crate::BitReader; +impl EO_FR_NUM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> EoFrNum { + pub const fn variant(&self) -> EO_FR_NUM_A { match self.bits { - false => EoFrNum::Value1, - true => EoFrNum::Value2, + false => EO_FR_NUM_A::VALUE1, + true => EO_FR_NUM_A::VALUE2, } } #[doc = "Even frame"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == EoFrNum::Value1 + *self == EO_FR_NUM_A::VALUE1 } #[doc = "Odd rame"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == EoFrNum::Value2 + *self == EO_FR_NUM_A::VALUE2 } } #[doc = "NAK Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Naksts { +pub enum NAKSTS_A { #[doc = "0: The core is transmitting non-NAK handshakes based on the FIFO status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The core is transmitting NAK handshakes on this endpoint."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Naksts) -> Self { + fn from(variant: NAKSTS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NAKSts` reader - NAK Status"] -pub type NakstsR = crate::BitReader; -impl NakstsR { +pub type NAKSTS_R = crate::BitReader; +impl NAKSTS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Naksts { + pub const fn variant(&self) -> NAKSTS_A { match self.bits { - false => Naksts::Value1, - true => Naksts::Value2, + false => NAKSTS_A::VALUE1, + true => NAKSTS_A::VALUE2, } } #[doc = "The core is transmitting non-NAK handshakes based on the FIFO status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Naksts::Value1 + *self == NAKSTS_A::VALUE1 } #[doc = "The core is transmitting NAK handshakes on this endpoint."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Naksts::Value2 + *self == NAKSTS_A::VALUE2 } } #[doc = "Endpoint Type\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Eptype { +pub enum EPTYPE_A { #[doc = "0: Control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Isochronous"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bulk"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Interrupt"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Eptype) -> Self { + fn from(variant: EPTYPE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Eptype { +impl crate::FieldSpec for EPTYPE_A { type Ux = u8; } -impl crate::IsEnum for Eptype {} +impl crate::IsEnum for EPTYPE_A {} #[doc = "Field `EPType` reader - Endpoint Type"] -pub type EptypeR = crate::FieldReader; -impl EptypeR { +pub type EPTYPE_R = crate::FieldReader; +impl EPTYPE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eptype { + pub const fn variant(&self) -> EPTYPE_A { match self.bits { - 0 => Eptype::Value1, - 1 => Eptype::Value2, - 2 => Eptype::Value3, - 3 => Eptype::Value4, + 0 => EPTYPE_A::VALUE1, + 1 => EPTYPE_A::VALUE2, + 2 => EPTYPE_A::VALUE3, + 3 => EPTYPE_A::VALUE4, _ => unreachable!(), } } #[doc = "Control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eptype::Value1 + *self == EPTYPE_A::VALUE1 } #[doc = "Isochronous"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eptype::Value2 + *self == EPTYPE_A::VALUE2 } #[doc = "Bulk"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Eptype::Value3 + *self == EPTYPE_A::VALUE3 } #[doc = "Interrupt"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Eptype::Value4 + *self == EPTYPE_A::VALUE4 } } #[doc = "Field `EPType` writer - Endpoint Type"] -pub type EptypeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Eptype, crate::Safe>; -impl<'a, REG> EptypeW<'a, REG> +pub type EPTYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EPTYPE_A, crate::Safe>; +impl<'a, REG> EPTYPE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -150,192 +150,192 @@ where #[doc = "Control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eptype::Value1) + self.variant(EPTYPE_A::VALUE1) } #[doc = "Isochronous"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eptype::Value2) + self.variant(EPTYPE_A::VALUE2) } #[doc = "Bulk"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Eptype::Value3) + self.variant(EPTYPE_A::VALUE3) } #[doc = "Interrupt"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Eptype::Value4) + self.variant(EPTYPE_A::VALUE4) } } #[doc = "Field `Snp` reader - Snoop Mode"] -pub type SnpR = crate::BitReader; +pub type SNP_R = crate::BitReader; #[doc = "Field `Snp` writer - Snoop Mode"] -pub type SnpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Stall` reader - STALL Handshake"] -pub type StallR = crate::BitReader; +pub type STALL_R = crate::BitReader; #[doc = "Field `Stall` writer - STALL Handshake"] -pub type StallW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `TxFNum` reader - TxFIFO Number"] -pub type TxFnumR = crate::FieldReader; +pub type TX_FNUM_R = crate::FieldReader; #[doc = "Field `TxFNum` writer - TxFIFO Number"] -pub type TxFnumW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type TX_FNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `CNAK` writer - Clear NAK"] -pub type CnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SNAK` writer - Set NAK"] -pub type SnakW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetEvenFr` writer - In non-Scatter/Gather DMA mode: Set Even frame"] -pub type SetEvenFrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_EVEN_FR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetOddFr` writer - Set Odd frame"] -pub type SetOddFrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_ODD_FR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDis` reader - Endpoint Disable"] -pub type EpdisR = crate::BitReader; +pub type EPDIS_R = crate::BitReader; #[doc = "Field `EPDis` writer - Endpoint Disable"] -pub type EpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPEna` reader - Endpoint Enable"] -pub type EpenaR = crate::BitReader; +pub type EPENA_R = crate::BitReader; #[doc = "Field `EPEna` writer - Endpoint Enable"] -pub type EpenaW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - pub fn mps(&self) -> MpsR { - MpsR::new((self.bits & 0x07ff) as u16) + pub fn mps(&self) -> MPS_R { + MPS_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - pub fn usbact_ep(&self) -> UsbactEpR { - UsbactEpR::new(((self.bits >> 15) & 1) != 0) + pub fn usbact_ep(&self) -> USBACT_EP_R { + USBACT_EP_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Even/Odd Frame"] #[inline(always)] - pub fn eo_fr_num(&self) -> EoFrNumR { - EoFrNumR::new(((self.bits >> 16) & 1) != 0) + pub fn eo_fr_num(&self) -> EO_FR_NUM_R { + EO_FR_NUM_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - NAK Status"] #[inline(always)] - pub fn naksts(&self) -> NakstsR { - NakstsR::new(((self.bits >> 17) & 1) != 0) + pub fn naksts(&self) -> NAKSTS_R { + NAKSTS_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - pub fn eptype(&self) -> EptypeR { - EptypeR::new(((self.bits >> 18) & 3) as u8) + pub fn eptype(&self) -> EPTYPE_R { + EPTYPE_R::new(((self.bits >> 18) & 3) as u8) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - pub fn snp(&self) -> SnpR { - SnpR::new(((self.bits >> 20) & 1) != 0) + pub fn snp(&self) -> SNP_R { + SNP_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - pub fn stall(&self) -> StallR { - StallR::new(((self.bits >> 21) & 1) != 0) + pub fn stall(&self) -> STALL_R { + STALL_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - pub fn tx_fnum(&self) -> TxFnumR { - TxFnumR::new(((self.bits >> 22) & 0x0f) as u8) + pub fn tx_fnum(&self) -> TX_FNUM_R { + TX_FNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - pub fn epdis(&self) -> EpdisR { - EpdisR::new(((self.bits >> 30) & 1) != 0) + pub fn epdis(&self) -> EPDIS_R { + EPDIS_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - pub fn epena(&self) -> EpenaR { - EpenaR::new(((self.bits >> 31) & 1) != 0) + pub fn epena(&self) -> EPENA_R { + EPENA_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] #[must_use] - pub fn mps(&mut self) -> MpsW { - MpsW::new(self, 0) + pub fn mps(&mut self) -> MPS_W { + MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] #[must_use] - pub fn usbact_ep(&mut self) -> UsbactEpW { - UsbactEpW::new(self, 15) + pub fn usbact_ep(&mut self) -> USBACT_EP_W { + USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] #[must_use] - pub fn eptype(&mut self) -> EptypeW { - EptypeW::new(self, 18) + pub fn eptype(&mut self) -> EPTYPE_W { + EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] #[must_use] - pub fn snp(&mut self) -> SnpW { - SnpW::new(self, 20) + pub fn snp(&mut self) -> SNP_W { + SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] #[must_use] - pub fn stall(&mut self) -> StallW { - StallW::new(self, 21) + pub fn stall(&mut self) -> STALL_W { + STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] #[must_use] - pub fn tx_fnum(&mut self) -> TxFnumW { - TxFnumW::new(self, 22) + pub fn tx_fnum(&mut self) -> TX_FNUM_W { + TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] #[must_use] - pub fn cnak(&mut self) -> CnakW { - CnakW::new(self, 26) + pub fn cnak(&mut self) -> CNAK_W { + CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] #[must_use] - pub fn snak(&mut self) -> SnakW { - SnakW::new(self, 27) + pub fn snak(&mut self) -> SNAK_W { + SNAK_W::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] #[must_use] - pub fn set_even_fr(&mut self) -> SetEvenFrW { - SetEvenFrW::new(self, 28) + pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { + SET_EVEN_FR_W::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] #[must_use] - pub fn set_odd_fr(&mut self) -> SetOddFrW { - SetOddFrW::new(self, 29) + pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { + SET_ODD_FR_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] #[must_use] - pub fn epdis(&mut self) -> EpdisW { - EpdisW::new(self, 30) + pub fn epdis(&mut self) -> EPDIS_W { + EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] #[must_use] - pub fn epena(&mut self) -> EpenaW { - EpenaW::new(self, 31) + pub fn epena(&mut self) -> EPENA_W { + EPENA_W::new(self, 31) } } #[doc = "Device Endpoint Control Register \\[ISOCONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl_isocont::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl_isocont::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepctlIsocontSpec; -impl crate::RegisterSpec for DoepctlIsocontSpec { +pub struct DOEPCTL_ISOCONT_SPEC; +impl crate::RegisterSpec for DOEPCTL_ISOCONT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepctl_isocont::R`](R) reader structure"] -impl crate::Readable for DoepctlIsocontSpec {} +impl crate::Readable for DOEPCTL_ISOCONT_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepctl_isocont::W`](W) writer structure"] -impl crate::Writable for DoepctlIsocontSpec { +impl crate::Writable for DOEPCTL_ISOCONT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPCTL_ISOCONT to value 0"] -impl crate::Resettable for DoepctlIsocontSpec { +impl crate::Resettable for DOEPCTL_ISOCONT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepdma.rs b/src/usb0_ep1/doepdma.rs index e1c7b47c..72ce65ee 100644 --- a/src/usb0_ep1/doepdma.rs +++ b/src/usb0_ep1/doepdma.rs @@ -1,40 +1,40 @@ #[doc = "Register `DOEPDMA` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPDMA` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DMAAddr` reader - DMA Address"] -pub type DmaaddrR = crate::FieldReader; +pub type DMAADDR_R = crate::FieldReader; #[doc = "Field `DMAAddr` writer - DMA Address"] -pub type DmaaddrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type DMAADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - pub fn dmaaddr(&self) -> DmaaddrR { - DmaaddrR::new(self.bits) + pub fn dmaaddr(&self) -> DMAADDR_R { + DMAADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] #[must_use] - pub fn dmaaddr(&mut self) -> DmaaddrW { - DmaaddrW::new(self, 0) + pub fn dmaaddr(&mut self) -> DMAADDR_W { + DMAADDR_W::new(self, 0) } } #[doc = "Device Endpoint DMA Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdma::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepdma::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepdmaSpec; -impl crate::RegisterSpec for DoepdmaSpec { +pub struct DOEPDMA_SPEC; +impl crate::RegisterSpec for DOEPDMA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepdma::R`](R) reader structure"] -impl crate::Readable for DoepdmaSpec {} +impl crate::Readable for DOEPDMA_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepdma::W`](W) writer structure"] -impl crate::Writable for DoepdmaSpec { +impl crate::Writable for DOEPDMA_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPDMA to value 0"] -impl crate::Resettable for DoepdmaSpec { +impl crate::Resettable for DOEPDMA_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepdmab.rs b/src/usb0_ep1/doepdmab.rs index 541bef6e..64581ece 100644 --- a/src/usb0_ep1/doepdmab.rs +++ b/src/usb0_ep1/doepdmab.rs @@ -1,22 +1,22 @@ #[doc = "Register `DOEPDMAB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DMABufferAddr` reader - DMA Buffer Address"] -pub type DmabufferAddrR = crate::FieldReader; +pub type DMABUFFER_ADDR_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - DMA Buffer Address"] #[inline(always)] - pub fn dmabuffer_addr(&self) -> DmabufferAddrR { - DmabufferAddrR::new(self.bits) + pub fn dmabuffer_addr(&self) -> DMABUFFER_ADDR_R { + DMABUFFER_ADDR_R::new(self.bits) } } #[doc = "Device Endpoint DMA Buffer Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepdmab::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepdmabSpec; -impl crate::RegisterSpec for DoepdmabSpec { +pub struct DOEPDMAB_SPEC; +impl crate::RegisterSpec for DOEPDMAB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepdmab::R`](R) reader structure"] -impl crate::Readable for DoepdmabSpec {} +impl crate::Readable for DOEPDMAB_SPEC {} #[doc = "`reset()` method sets DOEPDMAB to value 0"] -impl crate::Resettable for DoepdmabSpec { +impl crate::Resettable for DOEPDMAB_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doepint.rs b/src/usb0_ep1/doepint.rs index caccbf38..85392a4c 100644 --- a/src/usb0_ep1/doepint.rs +++ b/src/usb0_ep1/doepint.rs @@ -1,205 +1,205 @@ #[doc = "Register `DOEPINT` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPINT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferCompl` reader - Transfer Completed Interrupt"] -pub type XferComplR = crate::BitReader; +pub type XFER_COMPL_R = crate::BitReader; #[doc = "Field `XferCompl` writer - Transfer Completed Interrupt"] -pub type XferComplW<'a, REG> = crate::BitWriter<'a, REG>; +pub type XFER_COMPL_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `EPDisbld` reader - Endpoint Disabled Interrupt"] -pub type EpdisbldR = crate::BitReader; +pub type EPDISBLD_R = crate::BitReader; #[doc = "Field `EPDisbld` writer - Endpoint Disabled Interrupt"] -pub type EpdisbldW<'a, REG> = crate::BitWriter<'a, REG>; +pub type EPDISBLD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `AHBErr` reader - AHB Error"] -pub type AhberrR = crate::BitReader; +pub type AHBERR_R = crate::BitReader; #[doc = "Field `AHBErr` writer - AHB Error"] -pub type AhberrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type AHBERR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SetUp` reader - SETUP Phase Done"] -pub type SetUpR = crate::BitReader; +pub type SET_UP_R = crate::BitReader; #[doc = "Field `SetUp` writer - SETUP Phase Done"] -pub type SetUpW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SET_UP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `OUTTknEPdis` reader - OUT Token Received When Endpoint Disabled"] -pub type OuttknEpdisR = crate::BitReader; +pub type OUTTKN_EPDIS_R = crate::BitReader; #[doc = "Field `OUTTknEPdis` writer - OUT Token Received When Endpoint Disabled"] -pub type OuttknEpdisW<'a, REG> = crate::BitWriter<'a, REG>; +pub type OUTTKN_EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `StsPhseRcvd` reader - Status Phase Received For Control Write"] -pub type StsPhseRcvdR = crate::BitReader; +pub type STS_PHSE_RCVD_R = crate::BitReader; #[doc = "Field `StsPhseRcvd` writer - Status Phase Received For Control Write"] -pub type StsPhseRcvdW<'a, REG> = crate::BitWriter<'a, REG>; +pub type STS_PHSE_RCVD_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `Back2BackSETup` reader - Back-to-Back SETUP Packets Received"] -pub type Back2backSetupR = crate::BitReader; +pub type BACK2BACK_SETUP_R = crate::BitReader; #[doc = "Field `Back2BackSETup` writer - Back-to-Back SETUP Packets Received"] -pub type Back2backSetupW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BACK2BACK_SETUP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BNAIntr` reader - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrR = crate::BitReader; +pub type BNAINTR_R = crate::BitReader; #[doc = "Field `BNAIntr` writer - BNA (Buffer Not Available) Interrupt"] -pub type BnaintrW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BNAINTR_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PktDrpSts` reader - Packet Dropped Status"] -pub type PktDrpStsR = crate::BitReader; +pub type PKT_DRP_STS_R = crate::BitReader; #[doc = "Field `PktDrpSts` writer - Packet Dropped Status"] -pub type PktDrpStsW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PKT_DRP_STS_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `BbleErrIntrpt` reader - BbleErr (Babble Error) interrupt"] -pub type BbleErrIntrptR = crate::BitReader; +pub type BBLE_ERR_INTRPT_R = crate::BitReader; #[doc = "Field `BbleErrIntrpt` writer - BbleErr (Babble Error) interrupt"] -pub type BbleErrIntrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type BBLE_ERR_INTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NAKIntrpt` reader - NAK interrupt"] -pub type NakintrptR = crate::BitReader; +pub type NAKINTRPT_R = crate::BitReader; #[doc = "Field `NAKIntrpt` writer - NAK interrupt"] -pub type NakintrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NAKINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `NYETIntrpt` reader - NYET interrupt"] -pub type NyetintrptR = crate::BitReader; +pub type NYETINTRPT_R = crate::BitReader; #[doc = "Field `NYETIntrpt` writer - NYET interrupt"] -pub type NyetintrptW<'a, REG> = crate::BitWriter<'a, REG>; +pub type NYETINTRPT_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - pub fn xfer_compl(&self) -> XferComplR { - XferComplR::new((self.bits & 1) != 0) + pub fn xfer_compl(&self) -> XFER_COMPL_R { + XFER_COMPL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - pub fn epdisbld(&self) -> EpdisbldR { - EpdisbldR::new(((self.bits >> 1) & 1) != 0) + pub fn epdisbld(&self) -> EPDISBLD_R { + EPDISBLD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - pub fn ahberr(&self) -> AhberrR { - AhberrR::new(((self.bits >> 2) & 1) != 0) + pub fn ahberr(&self) -> AHBERR_R { + AHBERR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - pub fn set_up(&self) -> SetUpR { - SetUpR::new(((self.bits >> 3) & 1) != 0) + pub fn set_up(&self) -> SET_UP_R { + SET_UP_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - pub fn outtkn_epdis(&self) -> OuttknEpdisR { - OuttknEpdisR::new(((self.bits >> 4) & 1) != 0) + pub fn outtkn_epdis(&self) -> OUTTKN_EPDIS_R { + OUTTKN_EPDIS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - pub fn sts_phse_rcvd(&self) -> StsPhseRcvdR { - StsPhseRcvdR::new(((self.bits >> 5) & 1) != 0) + pub fn sts_phse_rcvd(&self) -> STS_PHSE_RCVD_R { + STS_PHSE_RCVD_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - pub fn back2back_setup(&self) -> Back2backSetupR { - Back2backSetupR::new(((self.bits >> 6) & 1) != 0) + pub fn back2back_setup(&self) -> BACK2BACK_SETUP_R { + BACK2BACK_SETUP_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - pub fn bnaintr(&self) -> BnaintrR { - BnaintrR::new(((self.bits >> 9) & 1) != 0) + pub fn bnaintr(&self) -> BNAINTR_R { + BNAINTR_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - pub fn pkt_drp_sts(&self) -> PktDrpStsR { - PktDrpStsR::new(((self.bits >> 11) & 1) != 0) + pub fn pkt_drp_sts(&self) -> PKT_DRP_STS_R { + PKT_DRP_STS_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - pub fn bble_err_intrpt(&self) -> BbleErrIntrptR { - BbleErrIntrptR::new(((self.bits >> 12) & 1) != 0) + pub fn bble_err_intrpt(&self) -> BBLE_ERR_INTRPT_R { + BBLE_ERR_INTRPT_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - pub fn nakintrpt(&self) -> NakintrptR { - NakintrptR::new(((self.bits >> 13) & 1) != 0) + pub fn nakintrpt(&self) -> NAKINTRPT_R { + NAKINTRPT_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - pub fn nyetintrpt(&self) -> NyetintrptR { - NyetintrptR::new(((self.bits >> 14) & 1) != 0) + pub fn nyetintrpt(&self) -> NYETINTRPT_R { + NYETINTRPT_R::new(((self.bits >> 14) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] #[must_use] - pub fn xfer_compl(&mut self) -> XferComplW { - XferComplW::new(self, 0) + pub fn xfer_compl(&mut self) -> XFER_COMPL_W { + XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] #[must_use] - pub fn epdisbld(&mut self) -> EpdisbldW { - EpdisbldW::new(self, 1) + pub fn epdisbld(&mut self) -> EPDISBLD_W { + EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] #[must_use] - pub fn ahberr(&mut self) -> AhberrW { - AhberrW::new(self, 2) + pub fn ahberr(&mut self) -> AHBERR_W { + AHBERR_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] #[must_use] - pub fn set_up(&mut self) -> SetUpW { - SetUpW::new(self, 3) + pub fn set_up(&mut self) -> SET_UP_W { + SET_UP_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] #[must_use] - pub fn outtkn_epdis(&mut self) -> OuttknEpdisW { - OuttknEpdisW::new(self, 4) + pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { + OUTTKN_EPDIS_W::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] #[must_use] - pub fn sts_phse_rcvd(&mut self) -> StsPhseRcvdW { - StsPhseRcvdW::new(self, 5) + pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { + STS_PHSE_RCVD_W::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] #[must_use] - pub fn back2back_setup(&mut self) -> Back2backSetupW { - Back2backSetupW::new(self, 6) + pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { + BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] #[must_use] - pub fn bnaintr(&mut self) -> BnaintrW { - BnaintrW::new(self, 9) + pub fn bnaintr(&mut self) -> BNAINTR_W { + BNAINTR_W::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] #[must_use] - pub fn pkt_drp_sts(&mut self) -> PktDrpStsW { - PktDrpStsW::new(self, 11) + pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { + PKT_DRP_STS_W::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] #[must_use] - pub fn bble_err_intrpt(&mut self) -> BbleErrIntrptW { - BbleErrIntrptW::new(self, 12) + pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { + BBLE_ERR_INTRPT_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] #[must_use] - pub fn nakintrpt(&mut self) -> NakintrptW { - NakintrptW::new(self, 13) + pub fn nakintrpt(&mut self) -> NAKINTRPT_W { + NAKINTRPT_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] #[must_use] - pub fn nyetintrpt(&mut self) -> NyetintrptW { - NyetintrptW::new(self, 14) + pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { + NYETINTRPT_W::new(self, 14) } } #[doc = "Device Endpoint Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepint::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepint::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoepintSpec; -impl crate::RegisterSpec for DoepintSpec { +pub struct DOEPINT_SPEC; +impl crate::RegisterSpec for DOEPINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doepint::R`](R) reader structure"] -impl crate::Readable for DoepintSpec {} +impl crate::Readable for DOEPINT_SPEC {} #[doc = "`write(|w| ..)` method takes [`doepint::W`](W) writer structure"] -impl crate::Writable for DoepintSpec { +impl crate::Writable for DOEPINT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPINT to value 0x80"] -impl crate::Resettable for DoepintSpec { +impl crate::Resettable for DOEPINT_SPEC { const RESET_VALUE: u32 = 0x80; } diff --git a/src/usb0_ep1/doeptsiz_control.rs b/src/usb0_ep1/doeptsiz_control.rs index fc4efd38..223b8892 100644 --- a/src/usb0_ep1/doeptsiz_control.rs +++ b/src/usb0_ep1/doeptsiz_control.rs @@ -1,68 +1,68 @@ #[doc = "Register `DOEPTSIZ_CONTROL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ_CONTROL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XferSizeR = crate::FieldReader; +pub type XFER_SIZE_R = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PktCntR = crate::FieldReader; +pub type PKT_CNT_R = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "SETUP Packet Count\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Supcnt { +pub enum SUPCNT_A { #[doc = "1: 1 packet"] - Value1 = 1, + VALUE1 = 1, #[doc = "2: 2 packets"] - Value2 = 2, + VALUE2 = 2, #[doc = "3: 3 packets"] - Value3 = 3, + VALUE3 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Supcnt) -> Self { + fn from(variant: SUPCNT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Supcnt { +impl crate::FieldSpec for SUPCNT_A { type Ux = u8; } -impl crate::IsEnum for Supcnt {} +impl crate::IsEnum for SUPCNT_A {} #[doc = "Field `SUPCnt` reader - SETUP Packet Count"] -pub type SupcntR = crate::FieldReader; -impl SupcntR { +pub type SUPCNT_R = crate::FieldReader; +impl SUPCNT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 1 => Some(Supcnt::Value1), - 2 => Some(Supcnt::Value2), - 3 => Some(Supcnt::Value3), + 1 => Some(SUPCNT_A::VALUE1), + 2 => Some(SUPCNT_A::VALUE2), + 3 => Some(SUPCNT_A::VALUE3), _ => None, } } #[doc = "1 packet"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Supcnt::Value1 + *self == SUPCNT_A::VALUE1 } #[doc = "2 packets"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Supcnt::Value2 + *self == SUPCNT_A::VALUE2 } #[doc = "3 packets"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Supcnt::Value3 + *self == SUPCNT_A::VALUE3 } } #[doc = "Field `SUPCnt` writer - SETUP Packet Count"] -pub type SupcntW<'a, REG> = crate::FieldWriter<'a, REG, 2, Supcnt>; -impl<'a, REG> SupcntW<'a, REG> +pub type SUPCNT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SUPCNT_A>; +impl<'a, REG> SUPCNT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,70 +70,70 @@ where #[doc = "1 packet"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Supcnt::Value1) + self.variant(SUPCNT_A::VALUE1) } #[doc = "2 packets"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Supcnt::Value2) + self.variant(SUPCNT_A::VALUE2) } #[doc = "3 packets"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Supcnt::Value3) + self.variant(SUPCNT_A::VALUE3) } } impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XferSizeR { - XferSizeR::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XFER_SIZE_R { + XFER_SIZE_R::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PktCntR { - PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PKT_CNT_R { + PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] - pub fn supcnt(&self) -> SupcntR { - SupcntR::new(((self.bits >> 29) & 3) as u8) + pub fn supcnt(&self) -> SUPCNT_R { + SUPCNT_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XferSizeW { - XferSizeW::new(self, 0) + pub fn xfer_size(&mut self) -> XFER_SIZE_W { + XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PktCntW { - PktCntW::new(self, 19) + pub fn pkt_cnt(&mut self) -> PKT_CNT_W { + PKT_CNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] #[must_use] - pub fn supcnt(&mut self) -> SupcntW { - SupcntW::new(self, 29) + pub fn supcnt(&mut self) -> SUPCNT_W { + SUPCNT_W::new(self, 29) } } #[doc = "Device Endpoint Transfer Size Register \\[CONT\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoeptsizControlSpec; -impl crate::RegisterSpec for DoeptsizControlSpec { +pub struct DOEPTSIZ_CONTROL_SPEC; +impl crate::RegisterSpec for DOEPTSIZ_CONTROL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz_control::R`](R) reader structure"] -impl crate::Readable for DoeptsizControlSpec {} +impl crate::Readable for DOEPTSIZ_CONTROL_SPEC {} #[doc = "`write(|w| ..)` method takes [`doeptsiz_control::W`](W) writer structure"] -impl crate::Writable for DoeptsizControlSpec { +impl crate::Writable for DOEPTSIZ_CONTROL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ_CONTROL to value 0"] -impl crate::Resettable for DoeptsizControlSpec { +impl crate::Resettable for DOEPTSIZ_CONTROL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/doeptsiz_iso.rs b/src/usb0_ep1/doeptsiz_iso.rs index d9ee503f..b5a2cf7e 100644 --- a/src/usb0_ep1/doeptsiz_iso.rs +++ b/src/usb0_ep1/doeptsiz_iso.rs @@ -1,118 +1,118 @@ #[doc = "Register `DOEPTSIZ_ISO` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DOEPTSIZ_ISO` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `XferSize` reader - Transfer Size"] -pub type XferSizeR = crate::FieldReader; +pub type XFER_SIZE_R = crate::FieldReader; #[doc = "Field `XferSize` writer - Transfer Size"] -pub type XferSizeW<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; +pub type XFER_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 19, u32>; #[doc = "Field `PktCnt` reader - Packet Count"] -pub type PktCntR = crate::FieldReader; +pub type PKT_CNT_R = crate::FieldReader; #[doc = "Field `PktCnt` writer - Packet Count"] -pub type PktCntW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PKT_CNT_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Received Data PID\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum RxDpid { +pub enum RX_DPID_A { #[doc = "0: DATA0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DATA2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: DATA1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: MDATA"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: RxDpid) -> Self { + fn from(variant: RX_DPID_A) -> Self { variant as _ } } -impl crate::FieldSpec for RxDpid { +impl crate::FieldSpec for RX_DPID_A { type Ux = u8; } -impl crate::IsEnum for RxDpid {} +impl crate::IsEnum for RX_DPID_A {} #[doc = "Field `RxDPID` reader - Received Data PID"] -pub type RxDpidR = crate::FieldReader; -impl RxDpidR { +pub type RX_DPID_R = crate::FieldReader; +impl RX_DPID_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> RxDpid { + pub const fn variant(&self) -> RX_DPID_A { match self.bits { - 0 => RxDpid::Value1, - 1 => RxDpid::Value2, - 2 => RxDpid::Value3, - 3 => RxDpid::Value4, + 0 => RX_DPID_A::VALUE1, + 1 => RX_DPID_A::VALUE2, + 2 => RX_DPID_A::VALUE3, + 3 => RX_DPID_A::VALUE4, _ => unreachable!(), } } #[doc = "DATA0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == RxDpid::Value1 + *self == RX_DPID_A::VALUE1 } #[doc = "DATA2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == RxDpid::Value2 + *self == RX_DPID_A::VALUE2 } #[doc = "DATA1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == RxDpid::Value3 + *self == RX_DPID_A::VALUE3 } #[doc = "MDATA"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == RxDpid::Value4 + *self == RX_DPID_A::VALUE4 } } impl R { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - pub fn xfer_size(&self) -> XferSizeR { - XferSizeR::new(self.bits & 0x0007_ffff) + pub fn xfer_size(&self) -> XFER_SIZE_R { + XFER_SIZE_R::new(self.bits & 0x0007_ffff) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - pub fn pkt_cnt(&self) -> PktCntR { - PktCntR::new(((self.bits >> 19) & 0x03ff) as u16) + pub fn pkt_cnt(&self) -> PKT_CNT_R { + PKT_CNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Received Data PID"] #[inline(always)] - pub fn rx_dpid(&self) -> RxDpidR { - RxDpidR::new(((self.bits >> 29) & 3) as u8) + pub fn rx_dpid(&self) -> RX_DPID_R { + RX_DPID_R::new(((self.bits >> 29) & 3) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] #[must_use] - pub fn xfer_size(&mut self) -> XferSizeW { - XferSizeW::new(self, 0) + pub fn xfer_size(&mut self) -> XFER_SIZE_W { + XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] #[must_use] - pub fn pkt_cnt(&mut self) -> PktCntW { - PktCntW::new(self, 19) + pub fn pkt_cnt(&mut self) -> PKT_CNT_W { + PKT_CNT_W::new(self, 19) } } #[doc = "Device Endpoint Transfer Size Register \\[ISO\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doeptsiz_iso::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doeptsiz_iso::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DoeptsizIsoSpec; -impl crate::RegisterSpec for DoeptsizIsoSpec { +pub struct DOEPTSIZ_ISO_SPEC; +impl crate::RegisterSpec for DOEPTSIZ_ISO_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`doeptsiz_iso::R`](R) reader structure"] -impl crate::Readable for DoeptsizIsoSpec {} +impl crate::Readable for DOEPTSIZ_ISO_SPEC {} #[doc = "`write(|w| ..)` method takes [`doeptsiz_iso::W`](W) writer structure"] -impl crate::Writable for DoeptsizIsoSpec { +impl crate::Writable for DOEPTSIZ_ISO_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DOEPTSIZ_ISO to value 0"] -impl crate::Resettable for DoeptsizIsoSpec { +impl crate::Resettable for DOEPTSIZ_ISO_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usb0_ep1/dtxfsts.rs b/src/usb0_ep1/dtxfsts.rs index 5703b6cf..23ba9fd9 100644 --- a/src/usb0_ep1/dtxfsts.rs +++ b/src/usb0_ep1/dtxfsts.rs @@ -1,70 +1,70 @@ #[doc = "Register `DTXFSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "IN Endpoint TxFIFO Space Avail\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u16)] -pub enum IneptxFspcAvail { +pub enum INEPTX_FSPC_AVAIL_A { #[doc = "0: Endpoint TxFIFO is full"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 1 word available"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 2 words available"] - Value3 = 2, + VALUE3 = 2, } -impl From for u16 { +impl From for u16 { #[inline(always)] - fn from(variant: IneptxFspcAvail) -> Self { + fn from(variant: INEPTX_FSPC_AVAIL_A) -> Self { variant as _ } } -impl crate::FieldSpec for IneptxFspcAvail { +impl crate::FieldSpec for INEPTX_FSPC_AVAIL_A { type Ux = u16; } -impl crate::IsEnum for IneptxFspcAvail {} +impl crate::IsEnum for INEPTX_FSPC_AVAIL_A {} #[doc = "Field `INEPTxFSpcAvail` reader - IN Endpoint TxFIFO Space Avail"] -pub type IneptxFspcAvailR = crate::FieldReader; -impl IneptxFspcAvailR { +pub type INEPTX_FSPC_AVAIL_R = crate::FieldReader; +impl INEPTX_FSPC_AVAIL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(IneptxFspcAvail::Value1), - 1 => Some(IneptxFspcAvail::Value2), - 2 => Some(IneptxFspcAvail::Value3), + 0 => Some(INEPTX_FSPC_AVAIL_A::VALUE1), + 1 => Some(INEPTX_FSPC_AVAIL_A::VALUE2), + 2 => Some(INEPTX_FSPC_AVAIL_A::VALUE3), _ => None, } } #[doc = "Endpoint TxFIFO is full"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == IneptxFspcAvail::Value1 + *self == INEPTX_FSPC_AVAIL_A::VALUE1 } #[doc = "1 word available"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == IneptxFspcAvail::Value2 + *self == INEPTX_FSPC_AVAIL_A::VALUE2 } #[doc = "2 words available"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == IneptxFspcAvail::Value3 + *self == INEPTX_FSPC_AVAIL_A::VALUE3 } } impl R { #[doc = "Bits 0:15 - IN Endpoint TxFIFO Space Avail"] #[inline(always)] - pub fn ineptx_fspc_avail(&self) -> IneptxFspcAvailR { - IneptxFspcAvailR::new((self.bits & 0xffff) as u16) + pub fn ineptx_fspc_avail(&self) -> INEPTX_FSPC_AVAIL_R { + INEPTX_FSPC_AVAIL_R::new((self.bits & 0xffff) as u16) } } #[doc = "Device IN Endpoint Transmit FIFO Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dtxfsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct DtxfstsSpec; -impl crate::RegisterSpec for DtxfstsSpec { +pub struct DTXFSTS_SPEC; +impl crate::RegisterSpec for DTXFSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dtxfsts::R`](R) reader structure"] -impl crate::Readable for DtxfstsSpec {} +impl crate::Readable for DTXFSTS_SPEC {} #[doc = "`reset()` method sets DTXFSTS to value 0"] -impl crate::Resettable for DtxfstsSpec { +impl crate::Resettable for DTXFSTS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0.rs b/src/usic0.rs index a91d172a..66eb60aa 100644 --- a/src/usic0.rs +++ b/src/usic0.rs @@ -1,18 +1,17 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, + id: ID, } impl RegisterBlock { #[doc = "0x00 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } } #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; diff --git a/src/usic0/id.rs b/src/usic0/id.rs index 43631964..f44473c6 100644 --- a/src/usic0/id.rs +++ b/src/usic0/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision Number"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number Value"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision Number"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number Value"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00aa_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00aa_c000; } diff --git a/src/usic0_ch0.rs b/src/usic0_ch0.rs index 2bc3e40c..704a8592 100644 --- a/src/usic0_ch0.rs +++ b/src/usic0_ch0.rs @@ -2,541 +2,505 @@ #[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x04], - ccfg: Ccfg, + ccfg: CCFG, _reserved1: [u8; 0x04], - kscfg: Kscfg, - fdr: Fdr, - brg: Brg, - inpr: Inpr, - dx0cr: Dx0cr, - dx1cr: Dx1cr, - dx2cr: Dx2cr, - dx3cr: Dx3cr, - dx4cr: Dx4cr, - dx5cr: Dx5cr, - sctr: Sctr, - tcsr: Tcsr, + kscfg: KSCFG, + fdr: FDR, + brg: BRG, + inpr: INPR, + dx0cr: DX0CR, + dx1cr: DX1CR, + dx2cr: DX2CR, + dx3cr: DX3CR, + dx4cr: DX4CR, + dx5cr: DX5CR, + sctr: SCTR, + tcsr: TCSR, _reserved_13_pcr: [u8; 0x04], - ccr: Ccr, - cmtr: Cmtr, + ccr: CCR, + cmtr: CMTR, _reserved_16_psr: [u8; 0x04], - pscr: Pscr, - rbufsr: Rbufsr, - rbuf: Rbuf, - rbufd: Rbufd, - rbuf0: Rbuf0, - rbuf1: Rbuf1, - rbuf01sr: Rbuf01sr, - fmr: Fmr, + pscr: PSCR, + rbufsr: RBUFSR, + rbuf: RBUF, + rbufd: RBUFD, + rbuf0: RBUF0, + rbuf1: RBUF1, + rbuf01sr: RBUF01SR, + fmr: FMR, _reserved25: [u8; 0x14], - tbuf: [Tbuf; 32], - byp: Byp, - bypcr: Bypcr, - tbctr: Tbctr, - rbctr: Rbctr, - trbptr: Trbptr, - trbsr: Trbsr, - trbscr: Trbscr, - outr: Outr, - outdr: Outdr, + tbuf: [TBUF; 32], + byp: BYP, + bypcr: BYPCR, + tbctr: TBCTR, + rbctr: RBCTR, + trbptr: TRBPTR, + trbsr: TRBSR, + trbscr: TRBSCR, + outr: OUTR, + outdr: OUTDR, _reserved35: [u8; 0x5c], - in_: [In; 32], + in_: [IN; 32], } impl RegisterBlock { #[doc = "0x04 - Channel Configuration Register"] #[inline(always)] - pub const fn ccfg(&self) -> &Ccfg { + pub const fn ccfg(&self) -> &CCFG { &self.ccfg } #[doc = "0x0c - Kernel State Configuration Register"] #[inline(always)] - pub const fn kscfg(&self) -> &Kscfg { + pub const fn kscfg(&self) -> &KSCFG { &self.kscfg } #[doc = "0x10 - Fractional Divider Register"] #[inline(always)] - pub const fn fdr(&self) -> &Fdr { + pub const fn fdr(&self) -> &FDR { &self.fdr } #[doc = "0x14 - Baud Rate Generator Register"] #[inline(always)] - pub const fn brg(&self) -> &Brg { + pub const fn brg(&self) -> &BRG { &self.brg } #[doc = "0x18 - Interrupt Node Pointer Register"] #[inline(always)] - pub const fn inpr(&self) -> &Inpr { + pub const fn inpr(&self) -> &INPR { &self.inpr } #[doc = "0x1c - Input Control Register 0"] #[inline(always)] - pub const fn dx0cr(&self) -> &Dx0cr { + pub const fn dx0cr(&self) -> &DX0CR { &self.dx0cr } #[doc = "0x20 - Input Control Register 1"] #[inline(always)] - pub const fn dx1cr(&self) -> &Dx1cr { + pub const fn dx1cr(&self) -> &DX1CR { &self.dx1cr } #[doc = "0x24 - Input Control Register 2"] #[inline(always)] - pub const fn dx2cr(&self) -> &Dx2cr { + pub const fn dx2cr(&self) -> &DX2CR { &self.dx2cr } #[doc = "0x28 - Input Control Register 3"] #[inline(always)] - pub const fn dx3cr(&self) -> &Dx3cr { + pub const fn dx3cr(&self) -> &DX3CR { &self.dx3cr } #[doc = "0x2c - Input Control Register 4"] #[inline(always)] - pub const fn dx4cr(&self) -> &Dx4cr { + pub const fn dx4cr(&self) -> &DX4CR { &self.dx4cr } #[doc = "0x30 - Input Control Register 5"] #[inline(always)] - pub const fn dx5cr(&self) -> &Dx5cr { + pub const fn dx5cr(&self) -> &DX5CR { &self.dx5cr } #[doc = "0x34 - Shift Control Register"] #[inline(always)] - pub const fn sctr(&self) -> &Sctr { + pub const fn sctr(&self) -> &SCTR { &self.sctr } #[doc = "0x38 - Transmit Control/Status Register"] #[inline(always)] - pub const fn tcsr(&self) -> &Tcsr { + pub const fn tcsr(&self) -> &TCSR { &self.tcsr } #[doc = "0x3c - Protocol Control Register \\[IIS Mode\\]"] #[inline(always)] - pub const fn pcr_iismode(&self) -> &PcrIismode { + pub const fn pcr_iismode(&self) -> &PCR_IISMODE { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[IIC Mode\\]"] #[inline(always)] - pub const fn pcr_iicmode(&self) -> &PcrIicmode { + pub const fn pcr_iicmode(&self) -> &PCR_IICMODE { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[SSC Mode\\]"] #[inline(always)] - pub const fn pcr_sscmode(&self) -> &PcrSscmode { + pub const fn pcr_sscmode(&self) -> &PCR_SSCMODE { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[ASC Mode\\]"] #[inline(always)] - pub const fn pcr_ascmode(&self) -> &PcrAscmode { + pub const fn pcr_ascmode(&self) -> &PCR_ASCMODE { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register"] #[inline(always)] - pub const fn pcr(&self) -> &Pcr { + pub const fn pcr(&self) -> &PCR { unsafe { &*(self as *const Self).cast::().add(60).cast() } } #[doc = "0x40 - Channel Control Register"] #[inline(always)] - pub const fn ccr(&self) -> &Ccr { + pub const fn ccr(&self) -> &CCR { &self.ccr } #[doc = "0x44 - Capture Mode Timer Register"] #[inline(always)] - pub const fn cmtr(&self) -> &Cmtr { + pub const fn cmtr(&self) -> &CMTR { &self.cmtr } #[doc = "0x48 - Protocol Status Register \\[IIS Mode\\]"] #[inline(always)] - pub const fn psr_iismode(&self) -> &PsrIismode { + pub const fn psr_iismode(&self) -> &PSR_IISMODE { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[IIC Mode\\]"] #[inline(always)] - pub const fn psr_iicmode(&self) -> &PsrIicmode { + pub const fn psr_iicmode(&self) -> &PSR_IICMODE { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[SSC Mode\\]"] #[inline(always)] - pub const fn psr_sscmode(&self) -> &PsrSscmode { + pub const fn psr_sscmode(&self) -> &PSR_SSCMODE { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[ASC Mode\\]"] #[inline(always)] - pub const fn psr_ascmode(&self) -> &PsrAscmode { + pub const fn psr_ascmode(&self) -> &PSR_ASCMODE { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register"] #[inline(always)] - pub const fn psr(&self) -> &Psr { + pub const fn psr(&self) -> &PSR { unsafe { &*(self as *const Self).cast::().add(72).cast() } } #[doc = "0x4c - Protocol Status Clear Register"] #[inline(always)] - pub const fn pscr(&self) -> &Pscr { + pub const fn pscr(&self) -> &PSCR { &self.pscr } #[doc = "0x50 - Receiver Buffer Status Register"] #[inline(always)] - pub const fn rbufsr(&self) -> &Rbufsr { + pub const fn rbufsr(&self) -> &RBUFSR { &self.rbufsr } #[doc = "0x54 - Receiver Buffer Register"] #[inline(always)] - pub const fn rbuf(&self) -> &Rbuf { + pub const fn rbuf(&self) -> &RBUF { &self.rbuf } #[doc = "0x58 - Receiver Buffer Register for Debugger"] #[inline(always)] - pub const fn rbufd(&self) -> &Rbufd { + pub const fn rbufd(&self) -> &RBUFD { &self.rbufd } #[doc = "0x5c - Receiver Buffer Register 0"] #[inline(always)] - pub const fn rbuf0(&self) -> &Rbuf0 { + pub const fn rbuf0(&self) -> &RBUF0 { &self.rbuf0 } #[doc = "0x60 - Receiver Buffer Register 1"] #[inline(always)] - pub const fn rbuf1(&self) -> &Rbuf1 { + pub const fn rbuf1(&self) -> &RBUF1 { &self.rbuf1 } #[doc = "0x64 - Receiver Buffer 01 Status Register"] #[inline(always)] - pub const fn rbuf01sr(&self) -> &Rbuf01sr { + pub const fn rbuf01sr(&self) -> &RBUF01SR { &self.rbuf01sr } #[doc = "0x68 - Flag Modification Register"] #[inline(always)] - pub const fn fmr(&self) -> &Fmr { + pub const fn fmr(&self) -> &FMR { &self.fmr } #[doc = "0x80..0x100 - Transmit Buffer"] #[inline(always)] - pub const fn tbuf(&self, n: usize) -> &Tbuf { + pub const fn tbuf(&self, n: usize) -> &TBUF { &self.tbuf[n] } #[doc = "Iterator for array of:"] #[doc = "0x80..0x100 - Transmit Buffer"] #[inline(always)] - pub fn tbuf_iter(&self) -> impl Iterator { + pub fn tbuf_iter(&self) -> impl Iterator { self.tbuf.iter() } #[doc = "0x100 - Bypass Data Register"] #[inline(always)] - pub const fn byp(&self) -> &Byp { + pub const fn byp(&self) -> &BYP { &self.byp } #[doc = "0x104 - Bypass Control Register"] #[inline(always)] - pub const fn bypcr(&self) -> &Bypcr { + pub const fn bypcr(&self) -> &BYPCR { &self.bypcr } #[doc = "0x108 - Transmitter Buffer Control Register"] #[inline(always)] - pub const fn tbctr(&self) -> &Tbctr { + pub const fn tbctr(&self) -> &TBCTR { &self.tbctr } #[doc = "0x10c - Receiver Buffer Control Register"] #[inline(always)] - pub const fn rbctr(&self) -> &Rbctr { + pub const fn rbctr(&self) -> &RBCTR { &self.rbctr } #[doc = "0x110 - Transmit/Receive Buffer Pointer Register"] #[inline(always)] - pub const fn trbptr(&self) -> &Trbptr { + pub const fn trbptr(&self) -> &TRBPTR { &self.trbptr } #[doc = "0x114 - Transmit/Receive Buffer Status Register"] #[inline(always)] - pub const fn trbsr(&self) -> &Trbsr { + pub const fn trbsr(&self) -> &TRBSR { &self.trbsr } #[doc = "0x118 - Transmit/Receive Buffer Status Clear Register"] #[inline(always)] - pub const fn trbscr(&self) -> &Trbscr { + pub const fn trbscr(&self) -> &TRBSCR { &self.trbscr } #[doc = "0x11c - Receiver Buffer Output Register"] #[inline(always)] - pub const fn outr(&self) -> &Outr { + pub const fn outr(&self) -> &OUTR { &self.outr } #[doc = "0x120 - Receiver Buffer Output Register L for Debugger"] #[inline(always)] - pub const fn outdr(&self) -> &Outdr { + pub const fn outdr(&self) -> &OUTDR { &self.outdr } #[doc = "0x180..0x200 - Transmit FIFO Buffer"] #[inline(always)] - pub const fn in_(&self, n: usize) -> &In { + pub const fn in_(&self, n: usize) -> &IN { &self.in_[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x200 - Transmit FIFO Buffer"] #[inline(always)] - pub fn in__iter(&self) -> impl Iterator { + pub fn in__iter(&self) -> impl Iterator { self.in_.iter() } } #[doc = "CCFG (r) register accessor: Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccfg`] module"] -#[doc(alias = "CCFG")] -pub type Ccfg = crate::Reg; +pub type CCFG = crate::Reg; #[doc = "Channel Configuration Register"] pub mod ccfg; #[doc = "KSCFG (rw) register accessor: Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@kscfg`] module"] -#[doc(alias = "KSCFG")] -pub type Kscfg = crate::Reg; +pub type KSCFG = crate::Reg; #[doc = "Kernel State Configuration Register"] pub mod kscfg; #[doc = "FDR (rw) register accessor: Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fdr`] module"] -#[doc(alias = "FDR")] -pub type Fdr = crate::Reg; +pub type FDR = crate::Reg; #[doc = "Fractional Divider Register"] pub mod fdr; #[doc = "BRG (rw) register accessor: Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brg`] module"] -#[doc(alias = "BRG")] -pub type Brg = crate::Reg; +pub type BRG = crate::Reg; #[doc = "Baud Rate Generator Register"] pub mod brg; #[doc = "INPR (rw) register accessor: Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@inpr`] module"] -#[doc(alias = "INPR")] -pub type Inpr = crate::Reg; +pub type INPR = crate::Reg; #[doc = "Interrupt Node Pointer Register"] pub mod inpr; #[doc = "DX0CR (rw) register accessor: Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx0cr`] module"] -#[doc(alias = "DX0CR")] -pub type Dx0cr = crate::Reg; +pub type DX0CR = crate::Reg; #[doc = "Input Control Register 0"] pub mod dx0cr; #[doc = "DX1CR (rw) register accessor: Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx1cr`] module"] -#[doc(alias = "DX1CR")] -pub type Dx1cr = crate::Reg; +pub type DX1CR = crate::Reg; #[doc = "Input Control Register 1"] pub mod dx1cr; #[doc = "DX2CR (rw) register accessor: Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx2cr`] module"] -#[doc(alias = "DX2CR")] -pub type Dx2cr = crate::Reg; +pub type DX2CR = crate::Reg; #[doc = "Input Control Register 2"] pub mod dx2cr; #[doc = "DX3CR (rw) register accessor: Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx3cr`] module"] -#[doc(alias = "DX3CR")] -pub type Dx3cr = crate::Reg; +pub type DX3CR = crate::Reg; #[doc = "Input Control Register 3"] pub mod dx3cr; #[doc = "DX4CR (rw) register accessor: Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx4cr`] module"] -#[doc(alias = "DX4CR")] -pub type Dx4cr = crate::Reg; +pub type DX4CR = crate::Reg; #[doc = "Input Control Register 4"] pub mod dx4cr; #[doc = "DX5CR (rw) register accessor: Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dx5cr`] module"] -#[doc(alias = "DX5CR")] -pub type Dx5cr = crate::Reg; +pub type DX5CR = crate::Reg; #[doc = "Input Control Register 5"] pub mod dx5cr; #[doc = "SCTR (rw) register accessor: Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sctr`] module"] -#[doc(alias = "SCTR")] -pub type Sctr = crate::Reg; +pub type SCTR = crate::Reg; #[doc = "Shift Control Register"] pub mod sctr; #[doc = "TCSR (rw) register accessor: Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcsr`] module"] -#[doc(alias = "TCSR")] -pub type Tcsr = crate::Reg; +pub type TCSR = crate::Reg; #[doc = "Transmit Control/Status Register"] pub mod tcsr; #[doc = "PCR (rw) register accessor: Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`] module"] -#[doc(alias = "PCR")] -pub type Pcr = crate::Reg; +pub type PCR = crate::Reg; #[doc = "Protocol Control Register"] pub mod pcr; #[doc = "PCR_ASCMode (rw) register accessor: Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_ascmode`] module"] #[doc(alias = "PCR_ASCMode")] -pub type PcrAscmode = crate::Reg; +pub type PCR_ASCMODE = crate::Reg; #[doc = "Protocol Control Register \\[ASC Mode\\]"] pub mod pcr_ascmode; #[doc = "PCR_SSCMode (rw) register accessor: Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_sscmode`] module"] #[doc(alias = "PCR_SSCMode")] -pub type PcrSscmode = crate::Reg; +pub type PCR_SSCMODE = crate::Reg; #[doc = "Protocol Control Register \\[SSC Mode\\]"] pub mod pcr_sscmode; #[doc = "PCR_IICMode (rw) register accessor: Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iicmode`] module"] #[doc(alias = "PCR_IICMode")] -pub type PcrIicmode = crate::Reg; +pub type PCR_IICMODE = crate::Reg; #[doc = "Protocol Control Register \\[IIC Mode\\]"] pub mod pcr_iicmode; #[doc = "PCR_IISMode (rw) register accessor: Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr_iismode`] module"] #[doc(alias = "PCR_IISMode")] -pub type PcrIismode = crate::Reg; +pub type PCR_IISMODE = crate::Reg; #[doc = "Protocol Control Register \\[IIS Mode\\]"] pub mod pcr_iismode; #[doc = "CCR (rw) register accessor: Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"] -#[doc(alias = "CCR")] -pub type Ccr = crate::Reg; +pub type CCR = crate::Reg; #[doc = "Channel Control Register"] pub mod ccr; #[doc = "CMTR (rw) register accessor: Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmtr`] module"] -#[doc(alias = "CMTR")] -pub type Cmtr = crate::Reg; +pub type CMTR = crate::Reg; #[doc = "Capture Mode Timer Register"] pub mod cmtr; #[doc = "PSR (rw) register accessor: Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr`] module"] -#[doc(alias = "PSR")] -pub type Psr = crate::Reg; +pub type PSR = crate::Reg; #[doc = "Protocol Status Register"] pub mod psr; #[doc = "PSR_ASCMode (rw) register accessor: Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_ascmode`] module"] #[doc(alias = "PSR_ASCMode")] -pub type PsrAscmode = crate::Reg; +pub type PSR_ASCMODE = crate::Reg; #[doc = "Protocol Status Register \\[ASC Mode\\]"] pub mod psr_ascmode; #[doc = "PSR_SSCMode (rw) register accessor: Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_sscmode`] module"] #[doc(alias = "PSR_SSCMode")] -pub type PsrSscmode = crate::Reg; +pub type PSR_SSCMODE = crate::Reg; #[doc = "Protocol Status Register \\[SSC Mode\\]"] pub mod psr_sscmode; #[doc = "PSR_IICMode (rw) register accessor: Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iicmode`] module"] #[doc(alias = "PSR_IICMode")] -pub type PsrIicmode = crate::Reg; +pub type PSR_IICMODE = crate::Reg; #[doc = "Protocol Status Register \\[IIC Mode\\]"] pub mod psr_iicmode; #[doc = "PSR_IISMode (rw) register accessor: Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psr_iismode`] module"] #[doc(alias = "PSR_IISMode")] -pub type PsrIismode = crate::Reg; +pub type PSR_IISMODE = crate::Reg; #[doc = "Protocol Status Register \\[IIS Mode\\]"] pub mod psr_iismode; #[doc = "PSCR (w) register accessor: Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pscr`] module"] -#[doc(alias = "PSCR")] -pub type Pscr = crate::Reg; +pub type PSCR = crate::Reg; #[doc = "Protocol Status Clear Register"] pub mod pscr; #[doc = "RBUFSR (r) register accessor: Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufsr`] module"] -#[doc(alias = "RBUFSR")] -pub type Rbufsr = crate::Reg; +pub type RBUFSR = crate::Reg; #[doc = "Receiver Buffer Status Register"] pub mod rbufsr; #[doc = "RBUF (r) register accessor: Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf`] module"] -#[doc(alias = "RBUF")] -pub type Rbuf = crate::Reg; +pub type RBUF = crate::Reg; #[doc = "Receiver Buffer Register"] pub mod rbuf; #[doc = "RBUFD (r) register accessor: Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbufd`] module"] -#[doc(alias = "RBUFD")] -pub type Rbufd = crate::Reg; +pub type RBUFD = crate::Reg; #[doc = "Receiver Buffer Register for Debugger"] pub mod rbufd; #[doc = "RBUF0 (r) register accessor: Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf0`] module"] -#[doc(alias = "RBUF0")] -pub type Rbuf0 = crate::Reg; +pub type RBUF0 = crate::Reg; #[doc = "Receiver Buffer Register 0"] pub mod rbuf0; #[doc = "RBUF1 (r) register accessor: Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf1`] module"] -#[doc(alias = "RBUF1")] -pub type Rbuf1 = crate::Reg; +pub type RBUF1 = crate::Reg; #[doc = "Receiver Buffer Register 1"] pub mod rbuf1; #[doc = "RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbuf01sr`] module"] -#[doc(alias = "RBUF01SR")] -pub type Rbuf01sr = crate::Reg; +pub type RBUF01SR = crate::Reg; #[doc = "Receiver Buffer 01 Status Register"] pub mod rbuf01sr; #[doc = "FMR (w) register accessor: Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fmr`] module"] -#[doc(alias = "FMR")] -pub type Fmr = crate::Reg; +pub type FMR = crate::Reg; #[doc = "Flag Modification Register"] pub mod fmr; #[doc = "TBUF (rw) register accessor: Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbuf`] module"] -#[doc(alias = "TBUF")] -pub type Tbuf = crate::Reg; +pub type TBUF = crate::Reg; #[doc = "Transmit Buffer"] pub mod tbuf; #[doc = "BYP (rw) register accessor: Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@byp`] module"] -#[doc(alias = "BYP")] -pub type Byp = crate::Reg; +pub type BYP = crate::Reg; #[doc = "Bypass Data Register"] pub mod byp; #[doc = "BYPCR (rw) register accessor: Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bypcr`] module"] -#[doc(alias = "BYPCR")] -pub type Bypcr = crate::Reg; +pub type BYPCR = crate::Reg; #[doc = "Bypass Control Register"] pub mod bypcr; #[doc = "TBCTR (rw) register accessor: Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tbctr`] module"] -#[doc(alias = "TBCTR")] -pub type Tbctr = crate::Reg; +pub type TBCTR = crate::Reg; #[doc = "Transmitter Buffer Control Register"] pub mod tbctr; #[doc = "RBCTR (rw) register accessor: Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rbctr`] module"] -#[doc(alias = "RBCTR")] -pub type Rbctr = crate::Reg; +pub type RBCTR = crate::Reg; #[doc = "Receiver Buffer Control Register"] pub mod rbctr; #[doc = "TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbptr`] module"] -#[doc(alias = "TRBPTR")] -pub type Trbptr = crate::Reg; +pub type TRBPTR = crate::Reg; #[doc = "Transmit/Receive Buffer Pointer Register"] pub mod trbptr; #[doc = "TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbsr`] module"] -#[doc(alias = "TRBSR")] -pub type Trbsr = crate::Reg; +pub type TRBSR = crate::Reg; #[doc = "Transmit/Receive Buffer Status Register"] pub mod trbsr; #[doc = "TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trbscr`] module"] -#[doc(alias = "TRBSCR")] -pub type Trbscr = crate::Reg; +pub type TRBSCR = crate::Reg; #[doc = "Transmit/Receive Buffer Status Clear Register"] pub mod trbscr; #[doc = "OUTR (r) register accessor: Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outr`] module"] -#[doc(alias = "OUTR")] -pub type Outr = crate::Reg; +pub type OUTR = crate::Reg; #[doc = "Receiver Buffer Output Register"] pub mod outr; #[doc = "OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outdr`] module"] -#[doc(alias = "OUTDR")] -pub type Outdr = crate::Reg; +pub type OUTDR = crate::Reg; #[doc = "Receiver Buffer Output Register L for Debugger"] pub mod outdr; #[doc = "IN (w) register accessor: Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`] module"] -#[doc(alias = "IN")] -pub type In = crate::Reg; +pub type IN = crate::Reg; #[doc = "Transmit FIFO Buffer"] pub mod in_; diff --git a/src/usic0_ch0/brg.rs b/src/usic0_ch0/brg.rs index db88c501..a857ad5e 100644 --- a/src/usic0_ch0/brg.rs +++ b/src/usic0_ch0/brg.rs @@ -1,60 +1,60 @@ #[doc = "Register `BRG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clock Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Clksel { +pub enum CLKSEL_A { #[doc = "0: The fractional divider frequency fFD is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "2: The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Clksel) -> Self { + fn from(variant: CLKSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Clksel { +impl crate::FieldSpec for CLKSEL_A { type Ux = u8; } -impl crate::IsEnum for Clksel {} +impl crate::IsEnum for CLKSEL_A {} #[doc = "Field `CLKSEL` reader - Clock Selection"] -pub type ClkselR = crate::FieldReader; -impl ClkselR { +pub type CLKSEL_R = crate::FieldReader; +impl CLKSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Clksel::Value1), - 2 => Some(Clksel::Value3), - 3 => Some(Clksel::Value4), + 0 => Some(CLKSEL_A::VALUE1), + 2 => Some(CLKSEL_A::VALUE3), + 3 => Some(CLKSEL_A::VALUE4), _ => None, } } #[doc = "The fractional divider frequency fFD is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Clksel::Value1 + *self == CLKSEL_A::VALUE1 } #[doc = "The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Clksel::Value3 + *self == CLKSEL_A::VALUE3 } #[doc = "Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Clksel::Value4 + *self == CLKSEL_A::VALUE4 } } #[doc = "Field `CLKSEL` writer - Clock Selection"] -pub type ClkselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Clksel>; -impl<'a, REG> ClkselW<'a, REG> +pub type CLKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CLKSEL_A>; +impl<'a, REG> CLKSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,186 +62,186 @@ where #[doc = "The fractional divider frequency fFD is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clksel::Value1) + self.variant(CLKSEL_A::VALUE1) } #[doc = "The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Clksel::Value3) + self.variant(CLKSEL_A::VALUE3) } #[doc = "Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Clksel::Value4) + self.variant(CLKSEL_A::VALUE4) } } #[doc = "Timing Measurement Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tmen { +pub enum TMEN_A { #[doc = "0: Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tmen) -> Self { + fn from(variant: TMEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TMEN` reader - Timing Measurement Enable"] -pub type TmenR = crate::BitReader; -impl TmenR { +pub type TMEN_R = crate::BitReader; +impl TMEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tmen { + pub const fn variant(&self) -> TMEN_A { match self.bits { - false => Tmen::Value1, - true => Tmen::Value2, + false => TMEN_A::VALUE1, + true => TMEN_A::VALUE2, } } #[doc = "Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tmen::Value1 + *self == TMEN_A::VALUE1 } #[doc = "Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tmen::Value2 + *self == TMEN_A::VALUE2 } } #[doc = "Field `TMEN` writer - Timing Measurement Enable"] -pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; -impl<'a, REG> TmenW<'a, REG> +pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; +impl<'a, REG> TMEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Timing measurement is disabled: The trigger signals DX0T and DX1T are ignored."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tmen::Value1) + self.variant(TMEN_A::VALUE1) } #[doc = "Timing measurement is enabled: The 10-bit counter is incremented by 1 with fPPP and stops counting when reaching its maximum value. If one of the trigger signals DX0T or DX1T become active, the counter value is captured into bit field CTV, the counter is cleared and a transmit shift event is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tmen::Value2) + self.variant(TMEN_A::VALUE2) } } #[doc = "Enable 2:1 Divider for fPPP\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pppen { +pub enum PPPEN_A { #[doc = "0: The 2:1 divider for fPPP is disabled. fPPP = fPIN"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pppen) -> Self { + fn from(variant: PPPEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PPPEN` reader - Enable 2:1 Divider for fPPP"] -pub type PppenR = crate::BitReader; -impl PppenR { +pub type PPPEN_R = crate::BitReader; +impl PPPEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pppen { + pub const fn variant(&self) -> PPPEN_A { match self.bits { - false => Pppen::Value1, - true => Pppen::Value2, + false => PPPEN_A::VALUE1, + true => PPPEN_A::VALUE2, } } #[doc = "The 2:1 divider for fPPP is disabled. fPPP = fPIN"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pppen::Value1 + *self == PPPEN_A::VALUE1 } #[doc = "The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pppen::Value2 + *self == PPPEN_A::VALUE2 } } #[doc = "Field `PPPEN` writer - Enable 2:1 Divider for fPPP"] -pub type PppenW<'a, REG> = crate::BitWriter<'a, REG, Pppen>; -impl<'a, REG> PppenW<'a, REG> +pub type PPPEN_W<'a, REG> = crate::BitWriter<'a, REG, PPPEN_A>; +impl<'a, REG> PPPEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The 2:1 divider for fPPP is disabled. fPPP = fPIN"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pppen::Value1) + self.variant(PPPEN_A::VALUE1) } #[doc = "The 2:1 divider for fPPP is enabled. fPPP = fMCLK = fPIN / 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pppen::Value2) + self.variant(PPPEN_A::VALUE2) } } #[doc = "Input Selection for CTQ\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ctqsel { +pub enum CTQSEL_A { #[doc = "0: fCTQIN = fPDIV"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCTQIN = fPPP"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fCTQIN = fSCLK"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: fCTQIN = fMCLK"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ctqsel) -> Self { + fn from(variant: CTQSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ctqsel { +impl crate::FieldSpec for CTQSEL_A { type Ux = u8; } -impl crate::IsEnum for Ctqsel {} +impl crate::IsEnum for CTQSEL_A {} #[doc = "Field `CTQSEL` reader - Input Selection for CTQ"] -pub type CtqselR = crate::FieldReader; -impl CtqselR { +pub type CTQSEL_R = crate::FieldReader; +impl CTQSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ctqsel { + pub const fn variant(&self) -> CTQSEL_A { match self.bits { - 0 => Ctqsel::Value1, - 1 => Ctqsel::Value2, - 2 => Ctqsel::Value3, - 3 => Ctqsel::Value4, + 0 => CTQSEL_A::VALUE1, + 1 => CTQSEL_A::VALUE2, + 2 => CTQSEL_A::VALUE3, + 3 => CTQSEL_A::VALUE4, _ => unreachable!(), } } #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ctqsel::Value1 + *self == CTQSEL_A::VALUE1 } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ctqsel::Value2 + *self == CTQSEL_A::VALUE2 } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ctqsel::Value3 + *self == CTQSEL_A::VALUE3 } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ctqsel::Value4 + *self == CTQSEL_A::VALUE4 } } #[doc = "Field `CTQSEL` writer - Input Selection for CTQ"] -pub type CtqselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Ctqsel, crate::Safe>; -impl<'a, REG> CtqselW<'a, REG> +pub type CTQSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CTQSEL_A, crate::Safe>; +impl<'a, REG> CTQSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -249,203 +249,203 @@ where #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctqsel::Value1) + self.variant(CTQSEL_A::VALUE1) } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctqsel::Value2) + self.variant(CTQSEL_A::VALUE2) } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ctqsel::Value3) + self.variant(CTQSEL_A::VALUE3) } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ctqsel::Value4) + self.variant(CTQSEL_A::VALUE4) } } #[doc = "Field `PCTQ` reader - Pre-Divider for Time Quanta Counter"] -pub type PctqR = crate::FieldReader; +pub type PCTQ_R = crate::FieldReader; #[doc = "Field `PCTQ` writer - Pre-Divider for Time Quanta Counter"] -pub type PctqW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PCTQ_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DCTQ` reader - Denominator for Time Quanta Counter"] -pub type DctqR = crate::FieldReader; +pub type DCTQ_R = crate::FieldReader; #[doc = "Field `DCTQ` writer - Denominator for Time Quanta Counter"] -pub type DctqW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DCTQ_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `PDIV` reader - Divider Mode: Divider Factor to Generate fPDIV"] -pub type PdivR = crate::FieldReader; +pub type PDIV_R = crate::FieldReader; #[doc = "Field `PDIV` writer - Divider Mode: Divider Factor to Generate fPDIV"] -pub type PdivW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type PDIV_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Shift Clock Output Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sclkosel { +pub enum SCLKOSEL_A { #[doc = "0: SCLK from the baud rate generator is selected as the SCLKOUT input source."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sclkosel) -> Self { + fn from(variant: SCLKOSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCLKOSEL` reader - Shift Clock Output Select"] -pub type SclkoselR = crate::BitReader; -impl SclkoselR { +pub type SCLKOSEL_R = crate::BitReader; +impl SCLKOSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sclkosel { + pub const fn variant(&self) -> SCLKOSEL_A { match self.bits { - false => Sclkosel::Value1, - true => Sclkosel::Value2, + false => SCLKOSEL_A::VALUE1, + true => SCLKOSEL_A::VALUE2, } } #[doc = "SCLK from the baud rate generator is selected as the SCLKOUT input source."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sclkosel::Value1 + *self == SCLKOSEL_A::VALUE1 } #[doc = "The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sclkosel::Value2 + *self == SCLKOSEL_A::VALUE2 } } #[doc = "Field `SCLKOSEL` writer - Shift Clock Output Select"] -pub type SclkoselW<'a, REG> = crate::BitWriter<'a, REG, Sclkosel>; -impl<'a, REG> SclkoselW<'a, REG> +pub type SCLKOSEL_W<'a, REG> = crate::BitWriter<'a, REG, SCLKOSEL_A>; +impl<'a, REG> SCLKOSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SCLK from the baud rate generator is selected as the SCLKOUT input source."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sclkosel::Value1) + self.variant(SCLKOSEL_A::VALUE1) } #[doc = "The transmit shift clock from DX1 input stage is selected as the SCLKOUT input source."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sclkosel::Value2) + self.variant(SCLKOSEL_A::VALUE2) } } #[doc = "Master Clock Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mclkcfg { +pub enum MCLKCFG_A { #[doc = "0: The passive level is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The passive level is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mclkcfg) -> Self { + fn from(variant: MCLKCFG_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCLKCFG` reader - Master Clock Configuration"] -pub type MclkcfgR = crate::BitReader; -impl MclkcfgR { +pub type MCLKCFG_R = crate::BitReader; +impl MCLKCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mclkcfg { + pub const fn variant(&self) -> MCLKCFG_A { match self.bits { - false => Mclkcfg::Value1, - true => Mclkcfg::Value2, + false => MCLKCFG_A::VALUE1, + true => MCLKCFG_A::VALUE2, } } #[doc = "The passive level is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mclkcfg::Value1 + *self == MCLKCFG_A::VALUE1 } #[doc = "The passive level is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mclkcfg::Value2 + *self == MCLKCFG_A::VALUE2 } } #[doc = "Field `MCLKCFG` writer - Master Clock Configuration"] -pub type MclkcfgW<'a, REG> = crate::BitWriter<'a, REG, Mclkcfg>; -impl<'a, REG> MclkcfgW<'a, REG> +pub type MCLKCFG_W<'a, REG> = crate::BitWriter<'a, REG, MCLKCFG_A>; +impl<'a, REG> MCLKCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The passive level is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mclkcfg::Value1) + self.variant(MCLKCFG_A::VALUE1) } #[doc = "The passive level is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mclkcfg::Value2) + self.variant(MCLKCFG_A::VALUE2) } } #[doc = "Shift Clock Output Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sclkcfg { +pub enum SCLKCFG_A { #[doc = "0: The passive level is 0 and the delay is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The passive level is 1 and the delay is disabled."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The passive level is 0 and the delay is enabled."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The passive level is 1 and the delay is enabled."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sclkcfg) -> Self { + fn from(variant: SCLKCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sclkcfg { +impl crate::FieldSpec for SCLKCFG_A { type Ux = u8; } -impl crate::IsEnum for Sclkcfg {} +impl crate::IsEnum for SCLKCFG_A {} #[doc = "Field `SCLKCFG` reader - Shift Clock Output Configuration"] -pub type SclkcfgR = crate::FieldReader; -impl SclkcfgR { +pub type SCLKCFG_R = crate::FieldReader; +impl SCLKCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sclkcfg { + pub const fn variant(&self) -> SCLKCFG_A { match self.bits { - 0 => Sclkcfg::Value1, - 1 => Sclkcfg::Value2, - 2 => Sclkcfg::Value3, - 3 => Sclkcfg::Value4, + 0 => SCLKCFG_A::VALUE1, + 1 => SCLKCFG_A::VALUE2, + 2 => SCLKCFG_A::VALUE3, + 3 => SCLKCFG_A::VALUE4, _ => unreachable!(), } } #[doc = "The passive level is 0 and the delay is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sclkcfg::Value1 + *self == SCLKCFG_A::VALUE1 } #[doc = "The passive level is 1 and the delay is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sclkcfg::Value2 + *self == SCLKCFG_A::VALUE2 } #[doc = "The passive level is 0 and the delay is enabled."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sclkcfg::Value3 + *self == SCLKCFG_A::VALUE3 } #[doc = "The passive level is 1 and the delay is enabled."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sclkcfg::Value4 + *self == SCLKCFG_A::VALUE4 } } #[doc = "Field `SCLKCFG` writer - Shift Clock Output Configuration"] -pub type SclkcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sclkcfg, crate::Safe>; -impl<'a, REG> SclkcfgW<'a, REG> +pub type SCLKCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, SCLKCFG_A, crate::Safe>; +impl<'a, REG> SCLKCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -453,152 +453,152 @@ where #[doc = "The passive level is 0 and the delay is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sclkcfg::Value1) + self.variant(SCLKCFG_A::VALUE1) } #[doc = "The passive level is 1 and the delay is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sclkcfg::Value2) + self.variant(SCLKCFG_A::VALUE2) } #[doc = "The passive level is 0 and the delay is enabled."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sclkcfg::Value3) + self.variant(SCLKCFG_A::VALUE3) } #[doc = "The passive level is 1 and the delay is enabled."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Sclkcfg::Value4) + self.variant(SCLKCFG_A::VALUE4) } } impl R { #[doc = "Bits 0:1 - Clock Selection"] #[inline(always)] - pub fn clksel(&self) -> ClkselR { - ClkselR::new((self.bits & 3) as u8) + pub fn clksel(&self) -> CLKSEL_R { + CLKSEL_R::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Timing Measurement Enable"] #[inline(always)] - pub fn tmen(&self) -> TmenR { - TmenR::new(((self.bits >> 3) & 1) != 0) + pub fn tmen(&self) -> TMEN_R { + TMEN_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"] #[inline(always)] - pub fn pppen(&self) -> PppenR { - PppenR::new(((self.bits >> 4) & 1) != 0) + pub fn pppen(&self) -> PPPEN_R { + PPPEN_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 6:7 - Input Selection for CTQ"] #[inline(always)] - pub fn ctqsel(&self) -> CtqselR { - CtqselR::new(((self.bits >> 6) & 3) as u8) + pub fn ctqsel(&self) -> CTQSEL_R { + CTQSEL_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"] #[inline(always)] - pub fn pctq(&self) -> PctqR { - PctqR::new(((self.bits >> 8) & 3) as u8) + pub fn pctq(&self) -> PCTQ_R { + PCTQ_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"] #[inline(always)] - pub fn dctq(&self) -> DctqR { - DctqR::new(((self.bits >> 10) & 0x1f) as u8) + pub fn dctq(&self) -> DCTQ_R { + DCTQ_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"] #[inline(always)] - pub fn pdiv(&self) -> PdivR { - PdivR::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn pdiv(&self) -> PDIV_R { + PDIV_R::new(((self.bits >> 16) & 0x03ff) as u16) } #[doc = "Bit 28 - Shift Clock Output Select"] #[inline(always)] - pub fn sclkosel(&self) -> SclkoselR { - SclkoselR::new(((self.bits >> 28) & 1) != 0) + pub fn sclkosel(&self) -> SCLKOSEL_R { + SCLKOSEL_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Master Clock Configuration"] #[inline(always)] - pub fn mclkcfg(&self) -> MclkcfgR { - MclkcfgR::new(((self.bits >> 29) & 1) != 0) + pub fn mclkcfg(&self) -> MCLKCFG_R { + MCLKCFG_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bits 30:31 - Shift Clock Output Configuration"] #[inline(always)] - pub fn sclkcfg(&self) -> SclkcfgR { - SclkcfgR::new(((self.bits >> 30) & 3) as u8) + pub fn sclkcfg(&self) -> SCLKCFG_R { + SCLKCFG_R::new(((self.bits >> 30) & 3) as u8) } } impl W { #[doc = "Bits 0:1 - Clock Selection"] #[inline(always)] #[must_use] - pub fn clksel(&mut self) -> ClkselW { - ClkselW::new(self, 0) + pub fn clksel(&mut self) -> CLKSEL_W { + CLKSEL_W::new(self, 0) } #[doc = "Bit 3 - Timing Measurement Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TmenW { - TmenW::new(self, 3) + pub fn tmen(&mut self) -> TMEN_W { + TMEN_W::new(self, 3) } #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"] #[inline(always)] #[must_use] - pub fn pppen(&mut self) -> PppenW { - PppenW::new(self, 4) + pub fn pppen(&mut self) -> PPPEN_W { + PPPEN_W::new(self, 4) } #[doc = "Bits 6:7 - Input Selection for CTQ"] #[inline(always)] #[must_use] - pub fn ctqsel(&mut self) -> CtqselW { - CtqselW::new(self, 6) + pub fn ctqsel(&mut self) -> CTQSEL_W { + CTQSEL_W::new(self, 6) } #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"] #[inline(always)] #[must_use] - pub fn pctq(&mut self) -> PctqW { - PctqW::new(self, 8) + pub fn pctq(&mut self) -> PCTQ_W { + PCTQ_W::new(self, 8) } #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"] #[inline(always)] #[must_use] - pub fn dctq(&mut self) -> DctqW { - DctqW::new(self, 10) + pub fn dctq(&mut self) -> DCTQ_W { + DCTQ_W::new(self, 10) } #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"] #[inline(always)] #[must_use] - pub fn pdiv(&mut self) -> PdivW { - PdivW::new(self, 16) + pub fn pdiv(&mut self) -> PDIV_W { + PDIV_W::new(self, 16) } #[doc = "Bit 28 - Shift Clock Output Select"] #[inline(always)] #[must_use] - pub fn sclkosel(&mut self) -> SclkoselW { - SclkoselW::new(self, 28) + pub fn sclkosel(&mut self) -> SCLKOSEL_W { + SCLKOSEL_W::new(self, 28) } #[doc = "Bit 29 - Master Clock Configuration"] #[inline(always)] #[must_use] - pub fn mclkcfg(&mut self) -> MclkcfgW { - MclkcfgW::new(self, 29) + pub fn mclkcfg(&mut self) -> MCLKCFG_W { + MCLKCFG_W::new(self, 29) } #[doc = "Bits 30:31 - Shift Clock Output Configuration"] #[inline(always)] #[must_use] - pub fn sclkcfg(&mut self) -> SclkcfgW { - SclkcfgW::new(self, 30) + pub fn sclkcfg(&mut self) -> SCLKCFG_W { + SCLKCFG_W::new(self, 30) } } #[doc = "Baud Rate Generator Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BrgSpec; -impl crate::RegisterSpec for BrgSpec { +pub struct BRG_SPEC; +impl crate::RegisterSpec for BRG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`brg::R`](R) reader structure"] -impl crate::Readable for BrgSpec {} +impl crate::Readable for BRG_SPEC {} #[doc = "`write(|w| ..)` method takes [`brg::W`](W) writer structure"] -impl crate::Writable for BrgSpec { +impl crate::Writable for BRG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRG to value 0"] -impl crate::Resettable for BrgSpec { +impl crate::Resettable for BRG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/byp.rs b/src/usic0_ch0/byp.rs index 4b45e1a9..de0463f6 100644 --- a/src/usic0_ch0/byp.rs +++ b/src/usic0_ch0/byp.rs @@ -1,40 +1,40 @@ #[doc = "Register `BYP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BYP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BDATA` reader - Bypass Data"] -pub type BdataR = crate::FieldReader; +pub type BDATA_R = crate::FieldReader; #[doc = "Field `BDATA` writer - Bypass Data"] -pub type BdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type BDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Bypass Data"] #[inline(always)] - pub fn bdata(&self) -> BdataR { - BdataR::new((self.bits & 0xffff) as u16) + pub fn bdata(&self) -> BDATA_R { + BDATA_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Bypass Data"] #[inline(always)] #[must_use] - pub fn bdata(&mut self) -> BdataW { - BdataW::new(self, 0) + pub fn bdata(&mut self) -> BDATA_W { + BDATA_W::new(self, 0) } } #[doc = "Bypass Data Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`byp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`byp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BypSpec; -impl crate::RegisterSpec for BypSpec { +pub struct BYP_SPEC; +impl crate::RegisterSpec for BYP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`byp::R`](R) reader structure"] -impl crate::Readable for BypSpec {} +impl crate::Readable for BYP_SPEC {} #[doc = "`write(|w| ..)` method takes [`byp::W`](W) writer structure"] -impl crate::Writable for BypSpec { +impl crate::Writable for BYP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BYP to value 0"] -impl crate::Resettable for BypSpec { +impl crate::Resettable for BYP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/bypcr.rs b/src/usic0_ch0/bypcr.rs index 11c6c992..e285ecaa 100644 --- a/src/usic0_ch0/bypcr.rs +++ b/src/usic0_ch0/bypcr.rs @@ -1,125 +1,125 @@ #[doc = "Register `BYPCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BYPCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BWLE` reader - Bypass Word Length"] -pub type BwleR = crate::FieldReader; +pub type BWLE_R = crate::FieldReader; #[doc = "Field `BWLE` writer - Bypass Word Length"] -pub type BwleW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type BWLE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Bypass Data Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bdssm { +pub enum BDSSM_A { #[doc = "0: The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bdssm) -> Self { + fn from(variant: BDSSM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BDSSM` reader - Bypass Data Single Shot Mode"] -pub type BdssmR = crate::BitReader; -impl BdssmR { +pub type BDSSM_R = crate::BitReader; +impl BDSSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bdssm { + pub const fn variant(&self) -> BDSSM_A { match self.bits { - false => Bdssm::Value1, - true => Bdssm::Value2, + false => BDSSM_A::VALUE1, + true => BDSSM_A::VALUE2, } } #[doc = "The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bdssm::Value1 + *self == BDSSM_A::VALUE1 } #[doc = "The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bdssm::Value2 + *self == BDSSM_A::VALUE2 } } #[doc = "Field `BDSSM` writer - Bypass Data Single Shot Mode"] -pub type BdssmW<'a, REG> = crate::BitWriter<'a, REG, Bdssm>; -impl<'a, REG> BdssmW<'a, REG> +pub type BDSSM_W<'a, REG> = crate::BitWriter<'a, REG, BDSSM_A>; +impl<'a, REG> BDSSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The bypass data is still considered as valid after it has been loaded into TBUF. The loading of the data into TBUF does not clear BDV."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bdssm::Value1) + self.variant(BDSSM_A::VALUE1) } #[doc = "The bypass data is considered as invalid after it has been loaded into TBUF. The loading of the data into TBUF clears BDV."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bdssm::Value2) + self.variant(BDSSM_A::VALUE2) } } #[doc = "Bypass Data Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bden { +pub enum BDEN_A { #[doc = "0: The transfer of bypass data is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bden) -> Self { + fn from(variant: BDEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bden { +impl crate::FieldSpec for BDEN_A { type Ux = u8; } -impl crate::IsEnum for Bden {} +impl crate::IsEnum for BDEN_A {} #[doc = "Field `BDEN` reader - Bypass Data Enable"] -pub type BdenR = crate::FieldReader; -impl BdenR { +pub type BDEN_R = crate::FieldReader; +impl BDEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bden { + pub const fn variant(&self) -> BDEN_A { match self.bits { - 0 => Bden::Value1, - 1 => Bden::Value2, - 2 => Bden::Value3, - 3 => Bden::Value4, + 0 => BDEN_A::VALUE1, + 1 => BDEN_A::VALUE2, + 2 => BDEN_A::VALUE3, + 3 => BDEN_A::VALUE4, _ => unreachable!(), } } #[doc = "The transfer of bypass data is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bden::Value1 + *self == BDEN_A::VALUE1 } #[doc = "The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bden::Value2 + *self == BDEN_A::VALUE2 } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bden::Value3 + *self == BDEN_A::VALUE3 } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bden::Value4 + *self == BDEN_A::VALUE4 } } #[doc = "Field `BDEN` writer - Bypass Data Enable"] -pub type BdenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bden, crate::Safe>; -impl<'a, REG> BdenW<'a, REG> +pub type BDEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BDEN_A, crate::Safe>; +impl<'a, REG> BDEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -127,274 +127,274 @@ where #[doc = "The transfer of bypass data is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bden::Value1) + self.variant(BDEN_A::VALUE1) } #[doc = "The transfer of bypass data to TBUF is possible. Bypass data will be transferred to TBUF according to its priority if BDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bden::Value2) + self.variant(BDEN_A::VALUE2) } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 0."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bden::Value3) + self.variant(BDEN_A::VALUE3) } #[doc = "Gated bypass data transfer is enabled. Bypass data will be transferred to TBUF according to its priority if BDV = 1 and while DX2S = 1."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bden::Value4) + self.variant(BDEN_A::VALUE4) } } #[doc = "Bypass Data Valid Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bdvtr { +pub enum BDVTR_A { #[doc = "0: Bit BDV is not influenced by DX2T."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit BDV is set if DX2T is active."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bdvtr) -> Self { + fn from(variant: BDVTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BDVTR` reader - Bypass Data Valid Trigger"] -pub type BdvtrR = crate::BitReader; -impl BdvtrR { +pub type BDVTR_R = crate::BitReader; +impl BDVTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bdvtr { + pub const fn variant(&self) -> BDVTR_A { match self.bits { - false => Bdvtr::Value1, - true => Bdvtr::Value2, + false => BDVTR_A::VALUE1, + true => BDVTR_A::VALUE2, } } #[doc = "Bit BDV is not influenced by DX2T."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bdvtr::Value1 + *self == BDVTR_A::VALUE1 } #[doc = "Bit BDV is set if DX2T is active."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bdvtr::Value2 + *self == BDVTR_A::VALUE2 } } #[doc = "Field `BDVTR` writer - Bypass Data Valid Trigger"] -pub type BdvtrW<'a, REG> = crate::BitWriter<'a, REG, Bdvtr>; -impl<'a, REG> BdvtrW<'a, REG> +pub type BDVTR_W<'a, REG> = crate::BitWriter<'a, REG, BDVTR_A>; +impl<'a, REG> BDVTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit BDV is not influenced by DX2T."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bdvtr::Value1) + self.variant(BDVTR_A::VALUE1) } #[doc = "Bit BDV is set if DX2T is active."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bdvtr::Value2) + self.variant(BDVTR_A::VALUE2) } } #[doc = "Bypass Priority\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bprio { +pub enum BPRIO_A { #[doc = "0: The transmit FIFO data has a higher priority than the bypass data."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bypass data has a higher priority than the transmit FIFO data."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bprio) -> Self { + fn from(variant: BPRIO_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BPRIO` reader - Bypass Priority"] -pub type BprioR = crate::BitReader; -impl BprioR { +pub type BPRIO_R = crate::BitReader; +impl BPRIO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bprio { + pub const fn variant(&self) -> BPRIO_A { match self.bits { - false => Bprio::Value1, - true => Bprio::Value2, + false => BPRIO_A::VALUE1, + true => BPRIO_A::VALUE2, } } #[doc = "The transmit FIFO data has a higher priority than the bypass data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bprio::Value1 + *self == BPRIO_A::VALUE1 } #[doc = "The bypass data has a higher priority than the transmit FIFO data."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bprio::Value2 + *self == BPRIO_A::VALUE2 } } #[doc = "Field `BPRIO` writer - Bypass Priority"] -pub type BprioW<'a, REG> = crate::BitWriter<'a, REG, Bprio>; -impl<'a, REG> BprioW<'a, REG> +pub type BPRIO_W<'a, REG> = crate::BitWriter<'a, REG, BPRIO_A>; +impl<'a, REG> BPRIO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit FIFO data has a higher priority than the bypass data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bprio::Value1) + self.variant(BPRIO_A::VALUE1) } #[doc = "The bypass data has a higher priority than the transmit FIFO data."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bprio::Value2) + self.variant(BPRIO_A::VALUE2) } } #[doc = "Bypass Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bdv { +pub enum BDV_A { #[doc = "0: The bypass data is not valid."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bypass data is valid."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bdv) -> Self { + fn from(variant: BDV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BDV` reader - Bypass Data Valid"] -pub type BdvR = crate::BitReader; -impl BdvR { +pub type BDV_R = crate::BitReader; +impl BDV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bdv { + pub const fn variant(&self) -> BDV_A { match self.bits { - false => Bdv::Value1, - true => Bdv::Value2, + false => BDV_A::VALUE1, + true => BDV_A::VALUE2, } } #[doc = "The bypass data is not valid."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bdv::Value1 + *self == BDV_A::VALUE1 } #[doc = "The bypass data is valid."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bdv::Value2 + *self == BDV_A::VALUE2 } } #[doc = "Field `BSELO` reader - Bypass Select Outputs"] -pub type BseloR = crate::FieldReader; +pub type BSELO_R = crate::FieldReader; #[doc = "Field `BSELO` writer - Bypass Select Outputs"] -pub type BseloW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type BSELO_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `BHPC` reader - Bypass Hardware Port Control"] -pub type BhpcR = crate::FieldReader; +pub type BHPC_R = crate::FieldReader; #[doc = "Field `BHPC` writer - Bypass Hardware Port Control"] -pub type BhpcW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type BHPC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:3 - Bypass Word Length"] #[inline(always)] - pub fn bwle(&self) -> BwleR { - BwleR::new((self.bits & 0x0f) as u8) + pub fn bwle(&self) -> BWLE_R { + BWLE_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 8 - Bypass Data Single Shot Mode"] #[inline(always)] - pub fn bdssm(&self) -> BdssmR { - BdssmR::new(((self.bits >> 8) & 1) != 0) + pub fn bdssm(&self) -> BDSSM_R { + BDSSM_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 10:11 - Bypass Data Enable"] #[inline(always)] - pub fn bden(&self) -> BdenR { - BdenR::new(((self.bits >> 10) & 3) as u8) + pub fn bden(&self) -> BDEN_R { + BDEN_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 12 - Bypass Data Valid Trigger"] #[inline(always)] - pub fn bdvtr(&self) -> BdvtrR { - BdvtrR::new(((self.bits >> 12) & 1) != 0) + pub fn bdvtr(&self) -> BDVTR_R { + BDVTR_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Bypass Priority"] #[inline(always)] - pub fn bprio(&self) -> BprioR { - BprioR::new(((self.bits >> 13) & 1) != 0) + pub fn bprio(&self) -> BPRIO_R { + BPRIO_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 15 - Bypass Data Valid"] #[inline(always)] - pub fn bdv(&self) -> BdvR { - BdvR::new(((self.bits >> 15) & 1) != 0) + pub fn bdv(&self) -> BDV_R { + BDV_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:20 - Bypass Select Outputs"] #[inline(always)] - pub fn bselo(&self) -> BseloR { - BseloR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn bselo(&self) -> BSELO_R { + BSELO_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 21:23 - Bypass Hardware Port Control"] #[inline(always)] - pub fn bhpc(&self) -> BhpcR { - BhpcR::new(((self.bits >> 21) & 7) as u8) + pub fn bhpc(&self) -> BHPC_R { + BHPC_R::new(((self.bits >> 21) & 7) as u8) } } impl W { #[doc = "Bits 0:3 - Bypass Word Length"] #[inline(always)] #[must_use] - pub fn bwle(&mut self) -> BwleW { - BwleW::new(self, 0) + pub fn bwle(&mut self) -> BWLE_W { + BWLE_W::new(self, 0) } #[doc = "Bit 8 - Bypass Data Single Shot Mode"] #[inline(always)] #[must_use] - pub fn bdssm(&mut self) -> BdssmW { - BdssmW::new(self, 8) + pub fn bdssm(&mut self) -> BDSSM_W { + BDSSM_W::new(self, 8) } #[doc = "Bits 10:11 - Bypass Data Enable"] #[inline(always)] #[must_use] - pub fn bden(&mut self) -> BdenW { - BdenW::new(self, 10) + pub fn bden(&mut self) -> BDEN_W { + BDEN_W::new(self, 10) } #[doc = "Bit 12 - Bypass Data Valid Trigger"] #[inline(always)] #[must_use] - pub fn bdvtr(&mut self) -> BdvtrW { - BdvtrW::new(self, 12) + pub fn bdvtr(&mut self) -> BDVTR_W { + BDVTR_W::new(self, 12) } #[doc = "Bit 13 - Bypass Priority"] #[inline(always)] #[must_use] - pub fn bprio(&mut self) -> BprioW { - BprioW::new(self, 13) + pub fn bprio(&mut self) -> BPRIO_W { + BPRIO_W::new(self, 13) } #[doc = "Bits 16:20 - Bypass Select Outputs"] #[inline(always)] #[must_use] - pub fn bselo(&mut self) -> BseloW { - BseloW::new(self, 16) + pub fn bselo(&mut self) -> BSELO_W { + BSELO_W::new(self, 16) } #[doc = "Bits 21:23 - Bypass Hardware Port Control"] #[inline(always)] #[must_use] - pub fn bhpc(&mut self) -> BhpcW { - BhpcW::new(self, 21) + pub fn bhpc(&mut self) -> BHPC_W { + BHPC_W::new(self, 21) } } #[doc = "Bypass Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bypcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bypcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BypcrSpec; -impl crate::RegisterSpec for BypcrSpec { +pub struct BYPCR_SPEC; +impl crate::RegisterSpec for BYPCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bypcr::R`](R) reader structure"] -impl crate::Readable for BypcrSpec {} +impl crate::Readable for BYPCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`bypcr::W`](W) writer structure"] -impl crate::Writable for BypcrSpec { +impl crate::Writable for BYPCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BYPCR to value 0"] -impl crate::Resettable for BypcrSpec { +impl crate::Resettable for BYPCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/ccfg.rs b/src/usic0_ch0/ccfg.rs index f3224e74..3a7d2025 100644 --- a/src/usic0_ch0/ccfg.rs +++ b/src/usic0_ch0/ccfg.rs @@ -1,261 +1,261 @@ #[doc = "Register `CCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "SSC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ssc { +pub enum SSC_A { #[doc = "0: The SSC protocol is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The SSC protocol is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ssc) -> Self { + fn from(variant: SSC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SSC` reader - SSC Protocol Available"] -pub type SscR = crate::BitReader; -impl SscR { +pub type SSC_R = crate::BitReader; +impl SSC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ssc { + pub const fn variant(&self) -> SSC_A { match self.bits { - false => Ssc::Value1, - true => Ssc::Value2, + false => SSC_A::VALUE1, + true => SSC_A::VALUE2, } } #[doc = "The SSC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ssc::Value1 + *self == SSC_A::VALUE1 } #[doc = "The SSC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ssc::Value2 + *self == SSC_A::VALUE2 } } #[doc = "ASC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Asc { +pub enum ASC_A { #[doc = "0: The ASC protocol is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The ASC protocol is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Asc) -> Self { + fn from(variant: ASC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASC` reader - ASC Protocol Available"] -pub type AscR = crate::BitReader; -impl AscR { +pub type ASC_R = crate::BitReader; +impl ASC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Asc { + pub const fn variant(&self) -> ASC_A { match self.bits { - false => Asc::Value1, - true => Asc::Value2, + false => ASC_A::VALUE1, + true => ASC_A::VALUE2, } } #[doc = "The ASC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Asc::Value1 + *self == ASC_A::VALUE1 } #[doc = "The ASC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Asc::Value2 + *self == ASC_A::VALUE2 } } #[doc = "IIC Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Iic { +pub enum IIC_A { #[doc = "0: The IIC protocol is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The IIC protocol is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Iic) -> Self { + fn from(variant: IIC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IIC` reader - IIC Protocol Available"] -pub type IicR = crate::BitReader; -impl IicR { +pub type IIC_R = crate::BitReader; +impl IIC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Iic { + pub const fn variant(&self) -> IIC_A { match self.bits { - false => Iic::Value1, - true => Iic::Value2, + false => IIC_A::VALUE1, + true => IIC_A::VALUE2, } } #[doc = "The IIC protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Iic::Value1 + *self == IIC_A::VALUE1 } #[doc = "The IIC protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Iic::Value2 + *self == IIC_A::VALUE2 } } #[doc = "IIS Protocol Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Iis { +pub enum IIS_A { #[doc = "0: The IIS protocol is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The IIS protocol is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Iis) -> Self { + fn from(variant: IIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IIS` reader - IIS Protocol Available"] -pub type IisR = crate::BitReader; -impl IisR { +pub type IIS_R = crate::BitReader; +impl IIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Iis { + pub const fn variant(&self) -> IIS_A { match self.bits { - false => Iis::Value1, - true => Iis::Value2, + false => IIS_A::VALUE1, + true => IIS_A::VALUE2, } } #[doc = "The IIS protocol is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Iis::Value1 + *self == IIS_A::VALUE1 } #[doc = "The IIS protocol is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Iis::Value2 + *self == IIS_A::VALUE2 } } #[doc = "Receive FIFO Buffer Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rb { +pub enum RB_A { #[doc = "0: A receive FIFO buffer is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive FIFO buffer is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rb) -> Self { + fn from(variant: RB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RB` reader - Receive FIFO Buffer Available"] -pub type RbR = crate::BitReader; -impl RbR { +pub type RB_R = crate::BitReader; +impl RB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rb { + pub const fn variant(&self) -> RB_A { match self.bits { - false => Rb::Value1, - true => Rb::Value2, + false => RB_A::VALUE1, + true => RB_A::VALUE2, } } #[doc = "A receive FIFO buffer is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rb::Value1 + *self == RB_A::VALUE1 } #[doc = "A receive FIFO buffer is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rb::Value2 + *self == RB_A::VALUE2 } } #[doc = "Transmit FIFO Buffer Available\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tb { +pub enum TB_A { #[doc = "0: A transmit FIFO buffer is not available."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit FIFO buffer is available."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tb) -> Self { + fn from(variant: TB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TB` reader - Transmit FIFO Buffer Available"] -pub type TbR = crate::BitReader; -impl TbR { +pub type TB_R = crate::BitReader; +impl TB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tb { + pub const fn variant(&self) -> TB_A { match self.bits { - false => Tb::Value1, - true => Tb::Value2, + false => TB_A::VALUE1, + true => TB_A::VALUE2, } } #[doc = "A transmit FIFO buffer is not available."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tb::Value1 + *self == TB_A::VALUE1 } #[doc = "A transmit FIFO buffer is available."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tb::Value2 + *self == TB_A::VALUE2 } } impl R { #[doc = "Bit 0 - SSC Protocol Available"] #[inline(always)] - pub fn ssc(&self) -> SscR { - SscR::new((self.bits & 1) != 0) + pub fn ssc(&self) -> SSC_R { + SSC_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - ASC Protocol Available"] #[inline(always)] - pub fn asc(&self) -> AscR { - AscR::new(((self.bits >> 1) & 1) != 0) + pub fn asc(&self) -> ASC_R { + ASC_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - IIC Protocol Available"] #[inline(always)] - pub fn iic(&self) -> IicR { - IicR::new(((self.bits >> 2) & 1) != 0) + pub fn iic(&self) -> IIC_R { + IIC_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - IIS Protocol Available"] #[inline(always)] - pub fn iis(&self) -> IisR { - IisR::new(((self.bits >> 3) & 1) != 0) + pub fn iis(&self) -> IIS_R { + IIS_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 6 - Receive FIFO Buffer Available"] #[inline(always)] - pub fn rb(&self) -> RbR { - RbR::new(((self.bits >> 6) & 1) != 0) + pub fn rb(&self) -> RB_R { + RB_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit FIFO Buffer Available"] #[inline(always)] - pub fn tb(&self) -> TbR { - TbR::new(((self.bits >> 7) & 1) != 0) + pub fn tb(&self) -> TB_R { + TB_R::new(((self.bits >> 7) & 1) != 0) } } #[doc = "Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccfg::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcfgSpec; -impl crate::RegisterSpec for CcfgSpec { +pub struct CCFG_SPEC; +impl crate::RegisterSpec for CCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ccfg::R`](R) reader structure"] -impl crate::Readable for CcfgSpec {} +impl crate::Readable for CCFG_SPEC {} #[doc = "`reset()` method sets CCFG to value 0xcf"] -impl crate::Resettable for CcfgSpec { +impl crate::Resettable for CCFG_SPEC { const RESET_VALUE: u32 = 0xcf; } diff --git a/src/usic0_ch0/ccr.rs b/src/usic0_ch0/ccr.rs index ec1de605..6e1eddfa 100644 --- a/src/usic0_ch0/ccr.rs +++ b/src/usic0_ch0/ccr.rs @@ -1,76 +1,76 @@ #[doc = "Register `CCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mode { +pub enum MODE_A { #[doc = "0: The USIC channel is disabled. All protocol-related state machines are set to an idle state."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The SSC (SPI) protocol is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The ASC (SCI, UART) protocol is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The IIS protocol is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The IIC protocol is selected."] - Value5 = 4, + VALUE5 = 4, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mode) -> Self { + fn from(variant: MODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mode { +impl crate::FieldSpec for MODE_A { type Ux = u8; } -impl crate::IsEnum for Mode {} +impl crate::IsEnum for MODE_A {} #[doc = "Field `MODE` reader - Operating Mode"] -pub type ModeR = crate::FieldReader; -impl ModeR { +pub type MODE_R = crate::FieldReader; +impl MODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Mode::Value1), - 1 => Some(Mode::Value2), - 2 => Some(Mode::Value3), - 3 => Some(Mode::Value4), - 4 => Some(Mode::Value5), + 0 => Some(MODE_A::VALUE1), + 1 => Some(MODE_A::VALUE2), + 2 => Some(MODE_A::VALUE3), + 3 => Some(MODE_A::VALUE4), + 4 => Some(MODE_A::VALUE5), _ => None, } } #[doc = "The USIC channel is disabled. All protocol-related state machines are set to an idle state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mode::Value1 + *self == MODE_A::VALUE1 } #[doc = "The SSC (SPI) protocol is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mode::Value2 + *self == MODE_A::VALUE2 } #[doc = "The ASC (SCI, UART) protocol is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Mode::Value3 + *self == MODE_A::VALUE3 } #[doc = "The IIS protocol is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Mode::Value4 + *self == MODE_A::VALUE4 } #[doc = "The IIC protocol is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Mode::Value5 + *self == MODE_A::VALUE5 } } #[doc = "Field `MODE` writer - Operating Mode"] -pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 4, Mode>; -impl<'a, REG> ModeW<'a, REG> +pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, MODE_A>; +impl<'a, REG> MODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,92 +78,92 @@ where #[doc = "The USIC channel is disabled. All protocol-related state machines are set to an idle state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mode::Value1) + self.variant(MODE_A::VALUE1) } #[doc = "The SSC (SPI) protocol is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mode::Value2) + self.variant(MODE_A::VALUE2) } #[doc = "The ASC (SCI, UART) protocol is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mode::Value3) + self.variant(MODE_A::VALUE3) } #[doc = "The IIS protocol is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Mode::Value4) + self.variant(MODE_A::VALUE4) } #[doc = "The IIC protocol is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Mode::Value5) + self.variant(MODE_A::VALUE5) } } #[doc = "Hardware Port Control Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Hpcen { +pub enum HPCEN_A { #[doc = "0: The hardware port control is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The hardware port control is enabled for DX0 and DOUT0."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Hpcen) -> Self { + fn from(variant: HPCEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Hpcen { +impl crate::FieldSpec for HPCEN_A { type Ux = u8; } -impl crate::IsEnum for Hpcen {} +impl crate::IsEnum for HPCEN_A {} #[doc = "Field `HPCEN` reader - Hardware Port Control Enable"] -pub type HpcenR = crate::FieldReader; -impl HpcenR { +pub type HPCEN_R = crate::FieldReader; +impl HPCEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hpcen { + pub const fn variant(&self) -> HPCEN_A { match self.bits { - 0 => Hpcen::Value1, - 1 => Hpcen::Value2, - 2 => Hpcen::Value3, - 3 => Hpcen::Value4, + 0 => HPCEN_A::VALUE1, + 1 => HPCEN_A::VALUE2, + 2 => HPCEN_A::VALUE3, + 3 => HPCEN_A::VALUE4, _ => unreachable!(), } } #[doc = "The hardware port control is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hpcen::Value1 + *self == HPCEN_A::VALUE1 } #[doc = "The hardware port control is enabled for DX0 and DOUT0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hpcen::Value2 + *self == HPCEN_A::VALUE2 } #[doc = "The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Hpcen::Value3 + *self == HPCEN_A::VALUE3 } #[doc = "The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Hpcen::Value4 + *self == HPCEN_A::VALUE4 } } #[doc = "Field `HPCEN` writer - Hardware Port Control Enable"] -pub type HpcenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Hpcen, crate::Safe>; -impl<'a, REG> HpcenW<'a, REG> +pub type HPCEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, HPCEN_A, crate::Safe>; +impl<'a, REG> HPCEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -171,78 +171,78 @@ where #[doc = "The hardware port control is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hpcen::Value1) + self.variant(HPCEN_A::VALUE1) } #[doc = "The hardware port control is enabled for DX0 and DOUT0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hpcen::Value2) + self.variant(HPCEN_A::VALUE2) } #[doc = "The hardware port control is enabled for DX3, DX0 and DOUT\\[1:0\\]."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Hpcen::Value3) + self.variant(HPCEN_A::VALUE3) } #[doc = "The hardware port control is enabled for DX0, DX\\[5:3\\] and DOUT\\[3:0\\]."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Hpcen::Value4) + self.variant(HPCEN_A::VALUE4) } } #[doc = "Parity Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pm { +pub enum PM_A { #[doc = "0: The parity generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "2: Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pm) -> Self { + fn from(variant: PM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pm { +impl crate::FieldSpec for PM_A { type Ux = u8; } -impl crate::IsEnum for Pm {} +impl crate::IsEnum for PM_A {} #[doc = "Field `PM` reader - Parity Mode"] -pub type PmR = crate::FieldReader; -impl PmR { +pub type PM_R = crate::FieldReader; +impl PM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pm::Value1), - 2 => Some(Pm::Value3), - 3 => Some(Pm::Value4), + 0 => Some(PM_A::VALUE1), + 2 => Some(PM_A::VALUE3), + 3 => Some(PM_A::VALUE4), _ => None, } } #[doc = "The parity generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pm::Value1 + *self == PM_A::VALUE1 } #[doc = "Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pm::Value3 + *self == PM_A::VALUE3 } #[doc = "Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pm::Value4 + *self == PM_A::VALUE4 } } #[doc = "Field `PM` writer - Parity Mode"] -pub type PmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Pm>; -impl<'a, REG> PmW<'a, REG> +pub type PM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PM_A>; +impl<'a, REG> PM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -250,518 +250,518 @@ where #[doc = "The parity generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pm::Value1) + self.variant(PM_A::VALUE1) } #[doc = "Even parity is selected (parity bit = 1 on odd number of 1s in data, parity bit = 0 on even number of 1s in data)."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pm::Value3) + self.variant(PM_A::VALUE3) } #[doc = "Odd parity is selected (parity bit = 0 on odd number of 1s in data, parity bit = 1 on even number of 1s in data)."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pm::Value4) + self.variant(PM_A::VALUE4) } } #[doc = "Receiver Start Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsien { +pub enum RSIEN_A { #[doc = "0: The receiver start interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsien) -> Self { + fn from(variant: RSIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIEN` reader - Receiver Start Interrupt Enable"] -pub type RsienR = crate::BitReader; -impl RsienR { +pub type RSIEN_R = crate::BitReader; +impl RSIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsien { + pub const fn variant(&self) -> RSIEN_A { match self.bits { - false => Rsien::Value1, - true => Rsien::Value2, + false => RSIEN_A::VALUE1, + true => RSIEN_A::VALUE2, } } #[doc = "The receiver start interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsien::Value1 + *self == RSIEN_A::VALUE1 } #[doc = "The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsien::Value2 + *self == RSIEN_A::VALUE2 } } #[doc = "Field `RSIEN` writer - Receiver Start Interrupt Enable"] -pub type RsienW<'a, REG> = crate::BitWriter<'a, REG, Rsien>; -impl<'a, REG> RsienW<'a, REG> +pub type RSIEN_W<'a, REG> = crate::BitWriter<'a, REG, RSIEN_A>; +impl<'a, REG> RSIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receiver start interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsien::Value1) + self.variant(RSIEN_A::VALUE1) } #[doc = "The receiver start interrupt is enabled. In case of a receiver start event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsien::Value2) + self.variant(RSIEN_A::VALUE2) } } #[doc = "Data Lost Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlien { +pub enum DLIEN_A { #[doc = "0: The data lost interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlien) -> Self { + fn from(variant: DLIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIEN` reader - Data Lost Interrupt Enable"] -pub type DlienR = crate::BitReader; -impl DlienR { +pub type DLIEN_R = crate::BitReader; +impl DLIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlien { + pub const fn variant(&self) -> DLIEN_A { match self.bits { - false => Dlien::Value1, - true => Dlien::Value2, + false => DLIEN_A::VALUE1, + true => DLIEN_A::VALUE2, } } #[doc = "The data lost interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlien::Value1 + *self == DLIEN_A::VALUE1 } #[doc = "The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlien::Value2 + *self == DLIEN_A::VALUE2 } } #[doc = "Field `DLIEN` writer - Data Lost Interrupt Enable"] -pub type DlienW<'a, REG> = crate::BitWriter<'a, REG, Dlien>; -impl<'a, REG> DlienW<'a, REG> +pub type DLIEN_W<'a, REG> = crate::BitWriter<'a, REG, DLIEN_A>; +impl<'a, REG> DLIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data lost interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlien::Value1) + self.variant(DLIEN_A::VALUE1) } #[doc = "The data lost interrupt is enabled. In case of a data lost event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlien::Value2) + self.variant(DLIEN_A::VALUE2) } } #[doc = "Transmit Shift Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsien { +pub enum TSIEN_A { #[doc = "0: The transmit shift interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsien) -> Self { + fn from(variant: TSIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIEN` reader - Transmit Shift Interrupt Enable"] -pub type TsienR = crate::BitReader; -impl TsienR { +pub type TSIEN_R = crate::BitReader; +impl TSIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsien { + pub const fn variant(&self) -> TSIEN_A { match self.bits { - false => Tsien::Value1, - true => Tsien::Value2, + false => TSIEN_A::VALUE1, + true => TSIEN_A::VALUE2, } } #[doc = "The transmit shift interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsien::Value1 + *self == TSIEN_A::VALUE1 } #[doc = "The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsien::Value2 + *self == TSIEN_A::VALUE2 } } #[doc = "Field `TSIEN` writer - Transmit Shift Interrupt Enable"] -pub type TsienW<'a, REG> = crate::BitWriter<'a, REG, Tsien>; -impl<'a, REG> TsienW<'a, REG> +pub type TSIEN_W<'a, REG> = crate::BitWriter<'a, REG, TSIEN_A>; +impl<'a, REG> TSIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit shift interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsien::Value1) + self.variant(TSIEN_A::VALUE1) } #[doc = "The transmit shift interrupt is enabled. In case of a transmit shift interrupt event, the service request output SRx indicated by INPR.TSINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsien::Value2) + self.variant(TSIEN_A::VALUE2) } } #[doc = "Transmit Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbien { +pub enum TBIEN_A { #[doc = "0: The transmit buffer interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbien) -> Self { + fn from(variant: TBIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIEN` reader - Transmit Buffer Interrupt Enable"] -pub type TbienR = crate::BitReader; -impl TbienR { +pub type TBIEN_R = crate::BitReader; +impl TBIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbien { + pub const fn variant(&self) -> TBIEN_A { match self.bits { - false => Tbien::Value1, - true => Tbien::Value2, + false => TBIEN_A::VALUE1, + true => TBIEN_A::VALUE2, } } #[doc = "The transmit buffer interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbien::Value1 + *self == TBIEN_A::VALUE1 } #[doc = "The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbien::Value2 + *self == TBIEN_A::VALUE2 } } #[doc = "Field `TBIEN` writer - Transmit Buffer Interrupt Enable"] -pub type TbienW<'a, REG> = crate::BitWriter<'a, REG, Tbien>; -impl<'a, REG> TbienW<'a, REG> +pub type TBIEN_W<'a, REG> = crate::BitWriter<'a, REG, TBIEN_A>; +impl<'a, REG> TBIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit buffer interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbien::Value1) + self.variant(TBIEN_A::VALUE1) } #[doc = "The transmit buffer interrupt is enabled. In case of a transmit buffer event, the service request output SRx indicated by INPR.TBINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbien::Value2) + self.variant(TBIEN_A::VALUE2) } } #[doc = "Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rien { +pub enum RIEN_A { #[doc = "0: The receive interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rien) -> Self { + fn from(variant: RIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIEN` reader - Receive Interrupt Enable"] -pub type RienR = crate::BitReader; -impl RienR { +pub type RIEN_R = crate::BitReader; +impl RIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rien { + pub const fn variant(&self) -> RIEN_A { match self.bits { - false => Rien::Value1, - true => Rien::Value2, + false => RIEN_A::VALUE1, + true => RIEN_A::VALUE2, } } #[doc = "The receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rien::Value1 + *self == RIEN_A::VALUE1 } #[doc = "The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rien::Value2 + *self == RIEN_A::VALUE2 } } #[doc = "Field `RIEN` writer - Receive Interrupt Enable"] -pub type RienW<'a, REG> = crate::BitWriter<'a, REG, Rien>; -impl<'a, REG> RienW<'a, REG> +pub type RIEN_W<'a, REG> = crate::BitWriter<'a, REG, RIEN_A>; +impl<'a, REG> RIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rien::Value1) + self.variant(RIEN_A::VALUE1) } #[doc = "The receive interrupt is enabled. In case of a receive event, the service request output SRx indicated by INPR.RINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rien::Value2) + self.variant(RIEN_A::VALUE2) } } #[doc = "Alternative Receive Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aien { +pub enum AIEN_A { #[doc = "0: The alternative receive interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aien) -> Self { + fn from(variant: AIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIEN` reader - Alternative Receive Interrupt Enable"] -pub type AienR = crate::BitReader; -impl AienR { +pub type AIEN_R = crate::BitReader; +impl AIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aien { + pub const fn variant(&self) -> AIEN_A { match self.bits { - false => Aien::Value1, - true => Aien::Value2, + false => AIEN_A::VALUE1, + true => AIEN_A::VALUE2, } } #[doc = "The alternative receive interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aien::Value1 + *self == AIEN_A::VALUE1 } #[doc = "The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aien::Value2 + *self == AIEN_A::VALUE2 } } #[doc = "Field `AIEN` writer - Alternative Receive Interrupt Enable"] -pub type AienW<'a, REG> = crate::BitWriter<'a, REG, Aien>; -impl<'a, REG> AienW<'a, REG> +pub type AIEN_W<'a, REG> = crate::BitWriter<'a, REG, AIEN_A>; +impl<'a, REG> AIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The alternative receive interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aien::Value1) + self.variant(AIEN_A::VALUE1) } #[doc = "The alternative receive interrupt is enabled. In case of an alternative receive event, the service request output SRx indicated by INPR.AINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aien::Value2) + self.variant(AIEN_A::VALUE2) } } #[doc = "Baud Rate Generator Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgien { +pub enum BRGIEN_A { #[doc = "0: The baud rate generator interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgien) -> Self { + fn from(variant: BRGIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIEN` reader - Baud Rate Generator Interrupt Enable"] -pub type BrgienR = crate::BitReader; -impl BrgienR { +pub type BRGIEN_R = crate::BitReader; +impl BRGIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgien { + pub const fn variant(&self) -> BRGIEN_A { match self.bits { - false => Brgien::Value1, - true => Brgien::Value2, + false => BRGIEN_A::VALUE1, + true => BRGIEN_A::VALUE2, } } #[doc = "The baud rate generator interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgien::Value1 + *self == BRGIEN_A::VALUE1 } #[doc = "The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgien::Value2 + *self == BRGIEN_A::VALUE2 } } #[doc = "Field `BRGIEN` writer - Baud Rate Generator Interrupt Enable"] -pub type BrgienW<'a, REG> = crate::BitWriter<'a, REG, Brgien>; -impl<'a, REG> BrgienW<'a, REG> +pub type BRGIEN_W<'a, REG> = crate::BitWriter<'a, REG, BRGIEN_A>; +impl<'a, REG> BRGIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The baud rate generator interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgien::Value1) + self.variant(BRGIEN_A::VALUE1) } #[doc = "The baud rate generator interrupt is enabled. In case of a baud rate generator event, the service request output SRx indicated by INPR.PINP is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgien::Value2) + self.variant(BRGIEN_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - Operating Mode"] #[inline(always)] - pub fn mode(&self) -> ModeR { - ModeR::new((self.bits & 0x0f) as u8) + pub fn mode(&self) -> MODE_R { + MODE_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 6:7 - Hardware Port Control Enable"] #[inline(always)] - pub fn hpcen(&self) -> HpcenR { - HpcenR::new(((self.bits >> 6) & 3) as u8) + pub fn hpcen(&self) -> HPCEN_R { + HPCEN_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Parity Mode"] #[inline(always)] - pub fn pm(&self) -> PmR { - PmR::new(((self.bits >> 8) & 3) as u8) + pub fn pm(&self) -> PM_R { + PM_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Receiver Start Interrupt Enable"] #[inline(always)] - pub fn rsien(&self) -> RsienR { - RsienR::new(((self.bits >> 10) & 1) != 0) + pub fn rsien(&self) -> RSIEN_R { + RSIEN_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Interrupt Enable"] #[inline(always)] - pub fn dlien(&self) -> DlienR { - DlienR::new(((self.bits >> 11) & 1) != 0) + pub fn dlien(&self) -> DLIEN_R { + DLIEN_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Interrupt Enable"] #[inline(always)] - pub fn tsien(&self) -> TsienR { - TsienR::new(((self.bits >> 12) & 1) != 0) + pub fn tsien(&self) -> TSIEN_R { + TSIEN_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"] #[inline(always)] - pub fn tbien(&self) -> TbienR { - TbienR::new(((self.bits >> 13) & 1) != 0) + pub fn tbien(&self) -> TBIEN_R { + TBIEN_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Interrupt Enable"] #[inline(always)] - pub fn rien(&self) -> RienR { - RienR::new(((self.bits >> 14) & 1) != 0) + pub fn rien(&self) -> RIEN_R { + RIEN_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Interrupt Enable"] #[inline(always)] - pub fn aien(&self) -> AienR { - AienR::new(((self.bits >> 15) & 1) != 0) + pub fn aien(&self) -> AIEN_R { + AIEN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"] #[inline(always)] - pub fn brgien(&self) -> BrgienR { - BrgienR::new(((self.bits >> 16) & 1) != 0) + pub fn brgien(&self) -> BRGIEN_R { + BRGIEN_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Operating Mode"] #[inline(always)] #[must_use] - pub fn mode(&mut self) -> ModeW { - ModeW::new(self, 0) + pub fn mode(&mut self) -> MODE_W { + MODE_W::new(self, 0) } #[doc = "Bits 6:7 - Hardware Port Control Enable"] #[inline(always)] #[must_use] - pub fn hpcen(&mut self) -> HpcenW { - HpcenW::new(self, 6) + pub fn hpcen(&mut self) -> HPCEN_W { + HPCEN_W::new(self, 6) } #[doc = "Bits 8:9 - Parity Mode"] #[inline(always)] #[must_use] - pub fn pm(&mut self) -> PmW { - PmW::new(self, 8) + pub fn pm(&mut self) -> PM_W { + PM_W::new(self, 8) } #[doc = "Bit 10 - Receiver Start Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rsien(&mut self) -> RsienW { - RsienW::new(self, 10) + pub fn rsien(&mut self) -> RSIEN_W { + RSIEN_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dlien(&mut self) -> DlienW { - DlienW::new(self, 11) + pub fn dlien(&mut self) -> DLIEN_W { + DLIEN_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tsien(&mut self) -> TsienW { - TsienW::new(self, 12) + pub fn tsien(&mut self) -> TSIEN_W { + TSIEN_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tbien(&mut self) -> TbienW { - TbienW::new(self, 13) + pub fn tbien(&mut self) -> TBIEN_W { + TBIEN_W::new(self, 13) } #[doc = "Bit 14 - Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rien(&mut self) -> RienW { - RienW::new(self, 14) + pub fn rien(&mut self) -> RIEN_W { + RIEN_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Interrupt Enable"] #[inline(always)] #[must_use] - pub fn aien(&mut self) -> AienW { - AienW::new(self, 15) + pub fn aien(&mut self) -> AIEN_W { + AIEN_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"] #[inline(always)] #[must_use] - pub fn brgien(&mut self) -> BrgienW { - BrgienW::new(self, 16) + pub fn brgien(&mut self) -> BRGIEN_W { + BRGIEN_W::new(self, 16) } } #[doc = "Channel Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CcrSpec; -impl crate::RegisterSpec for CcrSpec { +pub struct CCR_SPEC; +impl crate::RegisterSpec for CCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ccr::R`](R) reader structure"] -impl crate::Readable for CcrSpec {} +impl crate::Readable for CCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ccr::W`](W) writer structure"] -impl crate::Writable for CcrSpec { +impl crate::Writable for CCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CCR to value 0"] -impl crate::Resettable for CcrSpec { +impl crate::Resettable for CCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/cmtr.rs b/src/usic0_ch0/cmtr.rs index 330db222..124ccaec 100644 --- a/src/usic0_ch0/cmtr.rs +++ b/src/usic0_ch0/cmtr.rs @@ -1,40 +1,40 @@ #[doc = "Register `CMTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CMTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CTV` reader - Captured Timer Value"] -pub type CtvR = crate::FieldReader; +pub type CTV_R = crate::FieldReader; #[doc = "Field `CTV` writer - Captured Timer Value"] -pub type CtvW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type CTV_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; impl R { #[doc = "Bits 0:9 - Captured Timer Value"] #[inline(always)] - pub fn ctv(&self) -> CtvR { - CtvR::new((self.bits & 0x03ff) as u16) + pub fn ctv(&self) -> CTV_R { + CTV_R::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Captured Timer Value"] #[inline(always)] #[must_use] - pub fn ctv(&mut self) -> CtvW { - CtvW::new(self, 0) + pub fn ctv(&mut self) -> CTV_W { + CTV_W::new(self, 0) } } #[doc = "Capture Mode Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmtr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmtr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CmtrSpec; -impl crate::RegisterSpec for CmtrSpec { +pub struct CMTR_SPEC; +impl crate::RegisterSpec for CMTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cmtr::R`](R) reader structure"] -impl crate::Readable for CmtrSpec {} +impl crate::Readable for CMTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`cmtr::W`](W) writer structure"] -impl crate::Writable for CmtrSpec { +impl crate::Writable for CMTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CMTR to value 0"] -impl crate::Resettable for CmtrSpec { +impl crate::Resettable for CMTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx0cr.rs b/src/usic0_ch0/dx0cr.rs index febcf288..e1e524aa 100644 --- a/src/usic0_ch0/dx0cr.rs +++ b/src/usic0_ch0/dx0cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX0CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX0CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DXnA is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DXnB is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DXnC is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DXnD is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DXnE is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DXnF is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DXnG is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,370 +102,370 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DXnT."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DXnT."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DXnT."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -473,160 +473,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DXnS is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DXnS is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx0cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx0cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx0crSpec; -impl crate::RegisterSpec for Dx0crSpec { +pub struct DX0CR_SPEC; +impl crate::RegisterSpec for DX0CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx0cr::R`](R) reader structure"] -impl crate::Readable for Dx0crSpec {} +impl crate::Readable for DX0CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx0cr::W`](W) writer structure"] -impl crate::Writable for Dx0crSpec { +impl crate::Writable for DX0CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX0CR to value 0"] -impl crate::Resettable for Dx0crSpec { +impl crate::Resettable for DX0CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx1cr.rs b/src/usic0_ch0/dx1cr.rs index 795b13d2..6bbf07e3 100644 --- a/src/usic0_ch0/dx1cr.rs +++ b/src/usic0_ch0/dx1cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX1CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX1CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DX1A is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DX1B is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DX1C is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DX1D is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DX1E is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DX1F is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DX1G is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DX1A is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DX1B is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DX1C is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DX1D is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DX1E is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DX1F is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DX1G is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,423 +102,423 @@ where #[doc = "The data input DX1A is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DX1B is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DX1C is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DX1D is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DX1E is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DX1F is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DX1G is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Delay Compensation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcen { +pub enum DCEN_A { #[doc = "0: The receive shift clock is dependent on INSW selection."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcen) -> Self { + fn from(variant: DCEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCEN` reader - Delay Compensation Enable"] -pub type DcenR = crate::BitReader; -impl DcenR { +pub type DCEN_R = crate::BitReader; +impl DCEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcen { + pub const fn variant(&self) -> DCEN_A { match self.bits { - false => Dcen::Value1, - true => Dcen::Value2, + false => DCEN_A::VALUE1, + true => DCEN_A::VALUE2, } } #[doc = "The receive shift clock is dependent on INSW selection."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcen::Value1 + *self == DCEN_A::VALUE1 } #[doc = "The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcen::Value2 + *self == DCEN_A::VALUE2 } } #[doc = "Field `DCEN` writer - Delay Compensation Enable"] -pub type DcenW<'a, REG> = crate::BitWriter<'a, REG, Dcen>; -impl<'a, REG> DcenW<'a, REG> +pub type DCEN_W<'a, REG> = crate::BitWriter<'a, REG, DCEN_A>; +impl<'a, REG> DCEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive shift clock is dependent on INSW selection."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcen::Value1) + self.variant(DCEN_A::VALUE1) } #[doc = "The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcen::Value2) + self.variant(DCEN_A::VALUE2) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DX1T."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DX1T."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DX1T."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DX1T."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DX1T."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DX1T."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -526,171 +526,171 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DX1T."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DX1T."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DX1T."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DX1S is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DX1S is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DX1S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DX1S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 3 - Delay Compensation Enable"] #[inline(always)] - pub fn dcen(&self) -> DcenR { - DcenR::new(((self.bits >> 3) & 1) != 0) + pub fn dcen(&self) -> DCEN_R { + DCEN_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 3 - Delay Compensation Enable"] #[inline(always)] #[must_use] - pub fn dcen(&mut self) -> DcenW { - DcenW::new(self, 3) + pub fn dcen(&mut self) -> DCEN_W { + DCEN_W::new(self, 3) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx1cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx1cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx1crSpec; -impl crate::RegisterSpec for Dx1crSpec { +pub struct DX1CR_SPEC; +impl crate::RegisterSpec for DX1CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx1cr::R`](R) reader structure"] -impl crate::Readable for Dx1crSpec {} +impl crate::Readable for DX1CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx1cr::W`](W) writer structure"] -impl crate::Writable for Dx1crSpec { +impl crate::Writable for DX1CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX1CR to value 0"] -impl crate::Resettable for Dx1crSpec { +impl crate::Resettable for DX1CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx2cr.rs b/src/usic0_ch0/dx2cr.rs index d12e92f0..a424d7b0 100644 --- a/src/usic0_ch0/dx2cr.rs +++ b/src/usic0_ch0/dx2cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX2CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX2CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DXnA is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DXnB is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DXnC is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DXnD is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DXnE is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DXnF is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DXnG is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,370 +102,370 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DXnT."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DXnT."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DXnT."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -473,160 +473,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DXnS is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DXnS is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx2cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx2cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx2crSpec; -impl crate::RegisterSpec for Dx2crSpec { +pub struct DX2CR_SPEC; +impl crate::RegisterSpec for DX2CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx2cr::R`](R) reader structure"] -impl crate::Readable for Dx2crSpec {} +impl crate::Readable for DX2CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx2cr::W`](W) writer structure"] -impl crate::Writable for Dx2crSpec { +impl crate::Writable for DX2CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX2CR to value 0"] -impl crate::Resettable for Dx2crSpec { +impl crate::Resettable for DX2CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx3cr.rs b/src/usic0_ch0/dx3cr.rs index 1122a157..56e2658c 100644 --- a/src/usic0_ch0/dx3cr.rs +++ b/src/usic0_ch0/dx3cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX3CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX3CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DXnA is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DXnB is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DXnC is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DXnD is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DXnE is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DXnF is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DXnG is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,370 +102,370 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DXnT."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DXnT."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DXnT."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -473,160 +473,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DXnS is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DXnS is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx3cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx3cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx3crSpec; -impl crate::RegisterSpec for Dx3crSpec { +pub struct DX3CR_SPEC; +impl crate::RegisterSpec for DX3CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx3cr::R`](R) reader structure"] -impl crate::Readable for Dx3crSpec {} +impl crate::Readable for DX3CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx3cr::W`](W) writer structure"] -impl crate::Writable for Dx3crSpec { +impl crate::Writable for DX3CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX3CR to value 0"] -impl crate::Resettable for Dx3crSpec { +impl crate::Resettable for DX3CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx4cr.rs b/src/usic0_ch0/dx4cr.rs index 2da25064..320de599 100644 --- a/src/usic0_ch0/dx4cr.rs +++ b/src/usic0_ch0/dx4cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX4CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX4CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DXnA is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DXnB is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DXnC is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DXnD is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DXnE is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DXnF is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DXnG is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,370 +102,370 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DXnT."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DXnT."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DXnT."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -473,160 +473,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DXnS is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DXnS is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx4cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx4cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx4crSpec; -impl crate::RegisterSpec for Dx4crSpec { +pub struct DX4CR_SPEC; +impl crate::RegisterSpec for DX4CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx4cr::R`](R) reader structure"] -impl crate::Readable for Dx4crSpec {} +impl crate::Readable for DX4CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx4cr::W`](W) writer structure"] -impl crate::Writable for Dx4crSpec { +impl crate::Writable for DX4CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX4CR to value 0"] -impl crate::Resettable for Dx4crSpec { +impl crate::Resettable for DX4CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/dx5cr.rs b/src/usic0_ch0/dx5cr.rs index 30bf0808..53577e37 100644 --- a/src/usic0_ch0/dx5cr.rs +++ b/src/usic0_ch0/dx5cr.rs @@ -1,100 +1,100 @@ #[doc = "Register `DX5CR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `DX5CR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Selection for Input Signal\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsel { +pub enum DSEL_A { #[doc = "0: The data input DXnA is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data input DXnB is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The data input DXnC is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The data input DXnD is selected."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The data input DXnE is selected."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The data input DXnF is selected."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The data input DXnG is selected."] - Value7 = 6, + VALUE7 = 6, #[doc = "7: The data input is always 1."] - Value8 = 7, + VALUE8 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsel) -> Self { + fn from(variant: DSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsel { +impl crate::FieldSpec for DSEL_A { type Ux = u8; } -impl crate::IsEnum for Dsel {} +impl crate::IsEnum for DSEL_A {} #[doc = "Field `DSEL` reader - Data Selection for Input Signal"] -pub type DselR = crate::FieldReader; -impl DselR { +pub type DSEL_R = crate::FieldReader; +impl DSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsel { + pub const fn variant(&self) -> DSEL_A { match self.bits { - 0 => Dsel::Value1, - 1 => Dsel::Value2, - 2 => Dsel::Value3, - 3 => Dsel::Value4, - 4 => Dsel::Value5, - 5 => Dsel::Value6, - 6 => Dsel::Value7, - 7 => Dsel::Value8, + 0 => DSEL_A::VALUE1, + 1 => DSEL_A::VALUE2, + 2 => DSEL_A::VALUE3, + 3 => DSEL_A::VALUE4, + 4 => DSEL_A::VALUE5, + 5 => DSEL_A::VALUE6, + 6 => DSEL_A::VALUE7, + 7 => DSEL_A::VALUE8, _ => unreachable!(), } } #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsel::Value1 + *self == DSEL_A::VALUE1 } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsel::Value2 + *self == DSEL_A::VALUE2 } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsel::Value3 + *self == DSEL_A::VALUE3 } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsel::Value4 + *self == DSEL_A::VALUE4 } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Dsel::Value5 + *self == DSEL_A::VALUE5 } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Dsel::Value6 + *self == DSEL_A::VALUE6 } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Dsel::Value7 + *self == DSEL_A::VALUE7 } #[doc = "The data input is always 1."] #[inline(always)] pub fn is_value8(&self) -> bool { - *self == Dsel::Value8 + *self == DSEL_A::VALUE8 } } #[doc = "Field `DSEL` writer - Data Selection for Input Signal"] -pub type DselW<'a, REG> = crate::FieldWriter<'a, REG, 3, Dsel, crate::Safe>; -impl<'a, REG> DselW<'a, REG> +pub type DSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DSEL_A, crate::Safe>; +impl<'a, REG> DSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -102,370 +102,370 @@ where #[doc = "The data input DXnA is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsel::Value1) + self.variant(DSEL_A::VALUE1) } #[doc = "The data input DXnB is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsel::Value2) + self.variant(DSEL_A::VALUE2) } #[doc = "The data input DXnC is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsel::Value3) + self.variant(DSEL_A::VALUE3) } #[doc = "The data input DXnD is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsel::Value4) + self.variant(DSEL_A::VALUE4) } #[doc = "The data input DXnE is selected."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Dsel::Value5) + self.variant(DSEL_A::VALUE5) } #[doc = "The data input DXnF is selected."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Dsel::Value6) + self.variant(DSEL_A::VALUE6) } #[doc = "The data input DXnG is selected."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Dsel::Value7) + self.variant(DSEL_A::VALUE7) } #[doc = "The data input is always 1."] #[inline(always)] pub fn value8(self) -> &'a mut crate::W { - self.variant(Dsel::Value8) + self.variant(DSEL_A::VALUE8) } } #[doc = "Input Switch\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Insw { +pub enum INSW_A { #[doc = "0: The input of the data shift unit is controlled by the protocol pre-processor."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Insw) -> Self { + fn from(variant: INSW_A) -> Self { variant as u8 != 0 } } #[doc = "Field `INSW` reader - Input Switch"] -pub type InswR = crate::BitReader; -impl InswR { +pub type INSW_R = crate::BitReader; +impl INSW_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Insw { + pub const fn variant(&self) -> INSW_A { match self.bits { - false => Insw::Value1, - true => Insw::Value2, + false => INSW_A::VALUE1, + true => INSW_A::VALUE2, } } #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Insw::Value1 + *self == INSW_A::VALUE1 } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Insw::Value2 + *self == INSW_A::VALUE2 } } #[doc = "Field `INSW` writer - Input Switch"] -pub type InswW<'a, REG> = crate::BitWriter<'a, REG, Insw>; -impl<'a, REG> InswW<'a, REG> +pub type INSW_W<'a, REG> = crate::BitWriter<'a, REG, INSW_A>; +impl<'a, REG> INSW_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input of the data shift unit is controlled by the protocol pre-processor."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Insw::Value1) + self.variant(INSW_A::VALUE1) } #[doc = "The input of the data shift unit is connected to the selected data input line. This setting is used if the signals are directly derived from an input pin without treatment by the protocol pre-processor."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Insw::Value2) + self.variant(INSW_A::VALUE2) } } #[doc = "Digital Filter Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dfen { +pub enum DFEN_A { #[doc = "0: The input signal is not digitally filtered."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is digitally filtered."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dfen) -> Self { + fn from(variant: DFEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DFEN` reader - Digital Filter Enable"] -pub type DfenR = crate::BitReader; -impl DfenR { +pub type DFEN_R = crate::BitReader; +impl DFEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dfen { + pub const fn variant(&self) -> DFEN_A { match self.bits { - false => Dfen::Value1, - true => Dfen::Value2, + false => DFEN_A::VALUE1, + true => DFEN_A::VALUE2, } } #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dfen::Value1 + *self == DFEN_A::VALUE1 } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dfen::Value2 + *self == DFEN_A::VALUE2 } } #[doc = "Field `DFEN` writer - Digital Filter Enable"] -pub type DfenW<'a, REG> = crate::BitWriter<'a, REG, Dfen>; -impl<'a, REG> DfenW<'a, REG> +pub type DFEN_W<'a, REG> = crate::BitWriter<'a, REG, DFEN_A>; +impl<'a, REG> DFEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not digitally filtered."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dfen::Value1) + self.variant(DFEN_A::VALUE1) } #[doc = "The input signal is digitally filtered."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dfen::Value2) + self.variant(DFEN_A::VALUE2) } } #[doc = "Data Synchronization Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dsen { +pub enum DSEN_A { #[doc = "0: The un-synchronized signal can be taken as input for the data shift unit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The synchronized signal can be taken as input for the data shift unit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dsen) -> Self { + fn from(variant: DSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DSEN` reader - Data Synchronization Enable"] -pub type DsenR = crate::BitReader; -impl DsenR { +pub type DSEN_R = crate::BitReader; +impl DSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dsen { + pub const fn variant(&self) -> DSEN_A { match self.bits { - false => Dsen::Value1, - true => Dsen::Value2, + false => DSEN_A::VALUE1, + true => DSEN_A::VALUE2, } } #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsen::Value1 + *self == DSEN_A::VALUE1 } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dsen::Value2 + *self == DSEN_A::VALUE2 } } #[doc = "Field `DSEN` writer - Data Synchronization Enable"] -pub type DsenW<'a, REG> = crate::BitWriter<'a, REG, Dsen>; -impl<'a, REG> DsenW<'a, REG> +pub type DSEN_W<'a, REG> = crate::BitWriter<'a, REG, DSEN_A>; +impl<'a, REG> DSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The un-synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsen::Value1) + self.variant(DSEN_A::VALUE1) } #[doc = "The synchronized signal can be taken as input for the data shift unit."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dsen::Value2) + self.variant(DSEN_A::VALUE2) } } #[doc = "Data Polarity for DXn\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpol { +pub enum DPOL_A { #[doc = "0: The input signal is not inverted."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The input signal is inverted."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpol) -> Self { + fn from(variant: DPOL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPOL` reader - Data Polarity for DXn"] -pub type DpolR = crate::BitReader; -impl DpolR { +pub type DPOL_R = crate::BitReader; +impl DPOL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpol { + pub const fn variant(&self) -> DPOL_A { match self.bits { - false => Dpol::Value1, - true => Dpol::Value2, + false => DPOL_A::VALUE1, + true => DPOL_A::VALUE2, } } #[doc = "The input signal is not inverted."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpol::Value1 + *self == DPOL_A::VALUE1 } #[doc = "The input signal is inverted."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpol::Value2 + *self == DPOL_A::VALUE2 } } #[doc = "Field `DPOL` writer - Data Polarity for DXn"] -pub type DpolW<'a, REG> = crate::BitWriter<'a, REG, Dpol>; -impl<'a, REG> DpolW<'a, REG> +pub type DPOL_W<'a, REG> = crate::BitWriter<'a, REG, DPOL_A>; +impl<'a, REG> DPOL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The input signal is not inverted."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpol::Value1) + self.variant(DPOL_A::VALUE1) } #[doc = "The input signal is inverted."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpol::Value2) + self.variant(DPOL_A::VALUE2) } } #[doc = "Sampling Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sfsel { +pub enum SFSEL_A { #[doc = "0: The sampling frequency is fPB."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The sampling frequency is fFD."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sfsel) -> Self { + fn from(variant: SFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SFSEL` reader - Sampling Frequency Selection"] -pub type SfselR = crate::BitReader; -impl SfselR { +pub type SFSEL_R = crate::BitReader; +impl SFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sfsel { + pub const fn variant(&self) -> SFSEL_A { match self.bits { - false => Sfsel::Value1, - true => Sfsel::Value2, + false => SFSEL_A::VALUE1, + true => SFSEL_A::VALUE2, } } #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sfsel::Value1 + *self == SFSEL_A::VALUE1 } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sfsel::Value2 + *self == SFSEL_A::VALUE2 } } #[doc = "Field `SFSEL` writer - Sampling Frequency Selection"] -pub type SfselW<'a, REG> = crate::BitWriter<'a, REG, Sfsel>; -impl<'a, REG> SfselW<'a, REG> +pub type SFSEL_W<'a, REG> = crate::BitWriter<'a, REG, SFSEL_A>; +impl<'a, REG> SFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The sampling frequency is fPB."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sfsel::Value1) + self.variant(SFSEL_A::VALUE1) } #[doc = "The sampling frequency is fFD."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sfsel::Value2) + self.variant(SFSEL_A::VALUE2) } } #[doc = "Combination Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cm { +pub enum CM_A { #[doc = "0: The trigger activation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A rising edge activates DXnT."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A falling edge activates DXnT."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Both edges activate DXnT."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cm) -> Self { + fn from(variant: CM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cm { +impl crate::FieldSpec for CM_A { type Ux = u8; } -impl crate::IsEnum for Cm {} +impl crate::IsEnum for CM_A {} #[doc = "Field `CM` reader - Combination Mode"] -pub type CmR = crate::FieldReader; -impl CmR { +pub type CM_R = crate::FieldReader; +impl CM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cm { + pub const fn variant(&self) -> CM_A { match self.bits { - 0 => Cm::Value1, - 1 => Cm::Value2, - 2 => Cm::Value3, - 3 => Cm::Value4, + 0 => CM_A::VALUE1, + 1 => CM_A::VALUE2, + 2 => CM_A::VALUE3, + 3 => CM_A::VALUE4, _ => unreachable!(), } } #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cm::Value1 + *self == CM_A::VALUE1 } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cm::Value2 + *self == CM_A::VALUE2 } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cm::Value3 + *self == CM_A::VALUE3 } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cm::Value4 + *self == CM_A::VALUE4 } } #[doc = "Field `CM` writer - Combination Mode"] -pub type CmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cm, crate::Safe>; -impl<'a, REG> CmW<'a, REG> +pub type CM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CM_A, crate::Safe>; +impl<'a, REG> CM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -473,160 +473,160 @@ where #[doc = "The trigger activation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cm::Value1) + self.variant(CM_A::VALUE1) } #[doc = "A rising edge activates DXnT."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cm::Value2) + self.variant(CM_A::VALUE2) } #[doc = "A falling edge activates DXnT."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cm::Value3) + self.variant(CM_A::VALUE3) } #[doc = "Both edges activate DXnT."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cm::Value4) + self.variant(CM_A::VALUE4) } } #[doc = "Synchronized Data Value\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dxs { +pub enum DXS_A { #[doc = "0: The current value of DXnS is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The current value of DXnS is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dxs) -> Self { + fn from(variant: DXS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DXS` reader - Synchronized Data Value"] -pub type DxsR = crate::BitReader; -impl DxsR { +pub type DXS_R = crate::BitReader; +impl DXS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dxs { + pub const fn variant(&self) -> DXS_A { match self.bits { - false => Dxs::Value1, - true => Dxs::Value2, + false => DXS_A::VALUE1, + true => DXS_A::VALUE2, } } #[doc = "The current value of DXnS is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dxs::Value1 + *self == DXS_A::VALUE1 } #[doc = "The current value of DXnS is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dxs::Value2 + *self == DXS_A::VALUE2 } } impl R { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - pub fn dsel(&self) -> DselR { - DselR::new((self.bits & 7) as u8) + pub fn dsel(&self) -> DSEL_R { + DSEL_R::new((self.bits & 7) as u8) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - pub fn insw(&self) -> InswR { - InswR::new(((self.bits >> 4) & 1) != 0) + pub fn insw(&self) -> INSW_R { + INSW_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - pub fn dfen(&self) -> DfenR { - DfenR::new(((self.bits >> 5) & 1) != 0) + pub fn dfen(&self) -> DFEN_R { + DFEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - pub fn dsen(&self) -> DsenR { - DsenR::new(((self.bits >> 6) & 1) != 0) + pub fn dsen(&self) -> DSEN_R { + DSEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - pub fn dpol(&self) -> DpolR { - DpolR::new(((self.bits >> 8) & 1) != 0) + pub fn dpol(&self) -> DPOL_R { + DPOL_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - pub fn sfsel(&self) -> SfselR { - SfselR::new(((self.bits >> 9) & 1) != 0) + pub fn sfsel(&self) -> SFSEL_R { + SFSEL_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - pub fn cm(&self) -> CmR { - CmR::new(((self.bits >> 10) & 3) as u8) + pub fn cm(&self) -> CM_R { + CM_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 15 - Synchronized Data Value"] #[inline(always)] - pub fn dxs(&self) -> DxsR { - DxsR::new(((self.bits >> 15) & 1) != 0) + pub fn dxs(&self) -> DXS_R { + DXS_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] #[must_use] - pub fn dsel(&mut self) -> DselW { - DselW::new(self, 0) + pub fn dsel(&mut self) -> DSEL_W { + DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] #[must_use] - pub fn insw(&mut self) -> InswW { - InswW::new(self, 4) + pub fn insw(&mut self) -> INSW_W { + INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] #[must_use] - pub fn dfen(&mut self) -> DfenW { - DfenW::new(self, 5) + pub fn dfen(&mut self) -> DFEN_W { + DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] #[must_use] - pub fn dsen(&mut self) -> DsenW { - DsenW::new(self, 6) + pub fn dsen(&mut self) -> DSEN_W { + DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] #[must_use] - pub fn dpol(&mut self) -> DpolW { - DpolW::new(self, 8) + pub fn dpol(&mut self) -> DPOL_W { + DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] #[must_use] - pub fn sfsel(&mut self) -> SfselW { - SfselW::new(self, 9) + pub fn sfsel(&mut self) -> SFSEL_W { + SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] #[must_use] - pub fn cm(&mut self) -> CmW { - CmW::new(self, 10) + pub fn cm(&mut self) -> CM_W { + CM_W::new(self, 10) } } #[doc = "Input Control Register 5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dx5cr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dx5cr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Dx5crSpec; -impl crate::RegisterSpec for Dx5crSpec { +pub struct DX5CR_SPEC; +impl crate::RegisterSpec for DX5CR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`dx5cr::R`](R) reader structure"] -impl crate::Readable for Dx5crSpec {} +impl crate::Readable for DX5CR_SPEC {} #[doc = "`write(|w| ..)` method takes [`dx5cr::W`](W) writer structure"] -impl crate::Writable for Dx5crSpec { +impl crate::Writable for DX5CR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets DX5CR to value 0"] -impl crate::Resettable for Dx5crSpec { +impl crate::Resettable for DX5CR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/fdr.rs b/src/usic0_ch0/fdr.rs index 2a642f2d..ef6e4510 100644 --- a/src/usic0_ch0/fdr.rs +++ b/src/usic0_ch0/fdr.rs @@ -1,72 +1,72 @@ #[doc = "Register `FDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `FDR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STEP` reader - Step Value"] -pub type StepR = crate::FieldReader; +pub type STEP_R = crate::FieldReader; #[doc = "Field `STEP` writer - Step Value"] -pub type StepW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type STEP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "Divider Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dm { +pub enum DM_A { #[doc = "0: The divider is switched off, fFD = 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Normal divider mode selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Fractional divider mode selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The divider is switched off, fFD = 0."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dm) -> Self { + fn from(variant: DM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dm { +impl crate::FieldSpec for DM_A { type Ux = u8; } -impl crate::IsEnum for Dm {} +impl crate::IsEnum for DM_A {} #[doc = "Field `DM` reader - Divider Mode"] -pub type DmR = crate::FieldReader; -impl DmR { +pub type DM_R = crate::FieldReader; +impl DM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dm { + pub const fn variant(&self) -> DM_A { match self.bits { - 0 => Dm::Value1, - 1 => Dm::Value2, - 2 => Dm::Value3, - 3 => Dm::Value4, + 0 => DM_A::VALUE1, + 1 => DM_A::VALUE2, + 2 => DM_A::VALUE3, + 3 => DM_A::VALUE4, _ => unreachable!(), } } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dm::Value1 + *self == DM_A::VALUE1 } #[doc = "Normal divider mode selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dm::Value2 + *self == DM_A::VALUE2 } #[doc = "Fractional divider mode selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dm::Value3 + *self == DM_A::VALUE3 } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dm::Value4 + *self == DM_A::VALUE4 } } #[doc = "Field `DM` writer - Divider Mode"] -pub type DmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dm, crate::Safe>; -impl<'a, REG> DmW<'a, REG> +pub type DM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DM_A, crate::Safe>; +impl<'a, REG> DM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,71 +74,71 @@ where #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dm::Value1) + self.variant(DM_A::VALUE1) } #[doc = "Normal divider mode selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dm::Value2) + self.variant(DM_A::VALUE2) } #[doc = "Fractional divider mode selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dm::Value3) + self.variant(DM_A::VALUE3) } #[doc = "The divider is switched off, fFD = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dm::Value4) + self.variant(DM_A::VALUE4) } } #[doc = "Field `RESULT` reader - Result Value"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; impl R { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - pub fn step(&self) -> StepR { - StepR::new((self.bits & 0x03ff) as u16) + pub fn step(&self) -> STEP_R { + STEP_R::new((self.bits & 0x03ff) as u16) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - pub fn dm(&self) -> DmR { - DmR::new(((self.bits >> 14) & 3) as u8) + pub fn dm(&self) -> DM_R { + DM_R::new(((self.bits >> 14) & 3) as u8) } #[doc = "Bits 16:25 - Result Value"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new(((self.bits >> 16) & 0x03ff) as u16) } } impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] #[must_use] - pub fn step(&mut self) -> StepW { - StepW::new(self, 0) + pub fn step(&mut self) -> STEP_W { + STEP_W::new(self, 0) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] #[must_use] - pub fn dm(&mut self) -> DmW { - DmW::new(self, 14) + pub fn dm(&mut self) -> DM_W { + DM_W::new(self, 14) } } #[doc = "Fractional Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fdr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fdr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FdrSpec; -impl crate::RegisterSpec for FdrSpec { +pub struct FDR_SPEC; +impl crate::RegisterSpec for FDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`fdr::R`](R) reader structure"] -impl crate::Readable for FdrSpec {} +impl crate::Readable for FDR_SPEC {} #[doc = "`write(|w| ..)` method takes [`fdr::W`](W) writer structure"] -impl crate::Writable for FdrSpec { +impl crate::Writable for FDR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FDR to value 0"] -impl crate::Resettable for FdrSpec { +impl crate::Resettable for FDR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/fmr.rs b/src/usic0_ch0/fmr.rs index 69ff879a..54d3aed0 100644 --- a/src/usic0_ch0/fmr.rs +++ b/src/usic0_ch0/fmr.rs @@ -1,29 +1,29 @@ #[doc = "Register `FMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Modify Transmit Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Mtdv { +pub enum MTDV_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TDV is set, TE is unchanged."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Bits TDV and TE are cleared."] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Mtdv) -> Self { + fn from(variant: MTDV_A) -> Self { variant as _ } } -impl crate::FieldSpec for Mtdv { +impl crate::FieldSpec for MTDV_A { type Ux = u8; } -impl crate::IsEnum for Mtdv {} +impl crate::IsEnum for MTDV_A {} #[doc = "Field `MTDV` writer - Modify Transmit Data Valid"] -pub type MtdvW<'a, REG> = crate::FieldWriter<'a, REG, 2, Mtdv>; -impl<'a, REG> MtdvW<'a, REG> +pub type MTDV_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MTDV_A>; +impl<'a, REG> MTDV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -31,372 +31,372 @@ where #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mtdv::Value1) + self.variant(MTDV_A::VALUE1) } #[doc = "Bit TDV is set, TE is unchanged."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mtdv::Value2) + self.variant(MTDV_A::VALUE2) } #[doc = "Bits TDV and TE are cleared."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Mtdv::Value3) + self.variant(MTDV_A::VALUE3) } } #[doc = "Activate Bit TVC\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Atvc { +pub enum ATVC_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TCSR.TVC is set."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Atvc) -> Self { + fn from(variant: ATVC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ATVC` writer - Activate Bit TVC"] -pub type AtvcW<'a, REG> = crate::BitWriter<'a, REG, Atvc>; -impl<'a, REG> AtvcW<'a, REG> +pub type ATVC_W<'a, REG> = crate::BitWriter<'a, REG, ATVC_A>; +impl<'a, REG> ATVC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Atvc::Value1) + self.variant(ATVC_A::VALUE1) } #[doc = "Bit TCSR.TVC is set."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Atvc::Value2) + self.variant(ATVC_A::VALUE2) } } #[doc = "Clear Bits RDV for RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crdv0 { +pub enum CRDV0_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crdv0) -> Self { + fn from(variant: CRDV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRDV0` writer - Clear Bits RDV for RBUF0"] -pub type Crdv0W<'a, REG> = crate::BitWriter<'a, REG, Crdv0>; -impl<'a, REG> Crdv0W<'a, REG> +pub type CRDV0_W<'a, REG> = crate::BitWriter<'a, REG, CRDV0_A>; +impl<'a, REG> CRDV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crdv0::Value1) + self.variant(CRDV0_A::VALUE1) } #[doc = "Bits RBUF01SR.RDV00 and RBUF01SR.RDV10 are cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crdv0::Value2) + self.variant(CRDV0_A::VALUE2) } } #[doc = "Clear Bit RDV for RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crdv1 { +pub enum CRDV1_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crdv1) -> Self { + fn from(variant: CRDV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRDV1` writer - Clear Bit RDV for RBUF1"] -pub type Crdv1W<'a, REG> = crate::BitWriter<'a, REG, Crdv1>; -impl<'a, REG> Crdv1W<'a, REG> +pub type CRDV1_W<'a, REG> = crate::BitWriter<'a, REG, CRDV1_A>; +impl<'a, REG> CRDV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crdv1::Value1) + self.variant(CRDV1_A::VALUE1) } #[doc = "Bits RBUF01SR.RDV01 and RBUF01SR.RDV11 are cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crdv1::Value2) + self.variant(CRDV1_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio0 { +pub enum SIO0_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio0) -> Self { + fn from(variant: SIO0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO0` writer - Set Interrupt Output SRx"] -pub type Sio0W<'a, REG> = crate::BitWriter<'a, REG, Sio0>; -impl<'a, REG> Sio0W<'a, REG> +pub type SIO0_W<'a, REG> = crate::BitWriter<'a, REG, SIO0_A>; +impl<'a, REG> SIO0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio0::Value1) + self.variant(SIO0_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio0::Value2) + self.variant(SIO0_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio1 { +pub enum SIO1_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio1) -> Self { + fn from(variant: SIO1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO1` writer - Set Interrupt Output SRx"] -pub type Sio1W<'a, REG> = crate::BitWriter<'a, REG, Sio1>; -impl<'a, REG> Sio1W<'a, REG> +pub type SIO1_W<'a, REG> = crate::BitWriter<'a, REG, SIO1_A>; +impl<'a, REG> SIO1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio1::Value1) + self.variant(SIO1_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio1::Value2) + self.variant(SIO1_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio2 { +pub enum SIO2_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio2) -> Self { + fn from(variant: SIO2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO2` writer - Set Interrupt Output SRx"] -pub type Sio2W<'a, REG> = crate::BitWriter<'a, REG, Sio2>; -impl<'a, REG> Sio2W<'a, REG> +pub type SIO2_W<'a, REG> = crate::BitWriter<'a, REG, SIO2_A>; +impl<'a, REG> SIO2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio2::Value1) + self.variant(SIO2_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio2::Value2) + self.variant(SIO2_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio3 { +pub enum SIO3_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio3) -> Self { + fn from(variant: SIO3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO3` writer - Set Interrupt Output SRx"] -pub type Sio3W<'a, REG> = crate::BitWriter<'a, REG, Sio3>; -impl<'a, REG> Sio3W<'a, REG> +pub type SIO3_W<'a, REG> = crate::BitWriter<'a, REG, SIO3_A>; +impl<'a, REG> SIO3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio3::Value1) + self.variant(SIO3_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio3::Value2) + self.variant(SIO3_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio4 { +pub enum SIO4_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio4) -> Self { + fn from(variant: SIO4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO4` writer - Set Interrupt Output SRx"] -pub type Sio4W<'a, REG> = crate::BitWriter<'a, REG, Sio4>; -impl<'a, REG> Sio4W<'a, REG> +pub type SIO4_W<'a, REG> = crate::BitWriter<'a, REG, SIO4_A>; +impl<'a, REG> SIO4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio4::Value1) + self.variant(SIO4_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio4::Value2) + self.variant(SIO4_A::VALUE2) } } #[doc = "Set Interrupt Output SRx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sio5 { +pub enum SIO5_A { #[doc = "0: No action."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The service request output SRx is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sio5) -> Self { + fn from(variant: SIO5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SIO5` writer - Set Interrupt Output SRx"] -pub type Sio5W<'a, REG> = crate::BitWriter<'a, REG, Sio5>; -impl<'a, REG> Sio5W<'a, REG> +pub type SIO5_W<'a, REG> = crate::BitWriter<'a, REG, SIO5_A>; +impl<'a, REG> SIO5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sio5::Value1) + self.variant(SIO5_A::VALUE1) } #[doc = "The service request output SRx is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sio5::Value2) + self.variant(SIO5_A::VALUE2) } } impl W { #[doc = "Bits 0:1 - Modify Transmit Data Valid"] #[inline(always)] #[must_use] - pub fn mtdv(&mut self) -> MtdvW { - MtdvW::new(self, 0) + pub fn mtdv(&mut self) -> MTDV_W { + MTDV_W::new(self, 0) } #[doc = "Bit 4 - Activate Bit TVC"] #[inline(always)] #[must_use] - pub fn atvc(&mut self) -> AtvcW { - AtvcW::new(self, 4) + pub fn atvc(&mut self) -> ATVC_W { + ATVC_W::new(self, 4) } #[doc = "Bit 14 - Clear Bits RDV for RBUF0"] #[inline(always)] #[must_use] - pub fn crdv0(&mut self) -> Crdv0W { - Crdv0W::new(self, 14) + pub fn crdv0(&mut self) -> CRDV0_W { + CRDV0_W::new(self, 14) } #[doc = "Bit 15 - Clear Bit RDV for RBUF1"] #[inline(always)] #[must_use] - pub fn crdv1(&mut self) -> Crdv1W { - Crdv1W::new(self, 15) + pub fn crdv1(&mut self) -> CRDV1_W { + CRDV1_W::new(self, 15) } #[doc = "Bit 16 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio0(&mut self) -> Sio0W { - Sio0W::new(self, 16) + pub fn sio0(&mut self) -> SIO0_W { + SIO0_W::new(self, 16) } #[doc = "Bit 17 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio1(&mut self) -> Sio1W { - Sio1W::new(self, 17) + pub fn sio1(&mut self) -> SIO1_W { + SIO1_W::new(self, 17) } #[doc = "Bit 18 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio2(&mut self) -> Sio2W { - Sio2W::new(self, 18) + pub fn sio2(&mut self) -> SIO2_W { + SIO2_W::new(self, 18) } #[doc = "Bit 19 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio3(&mut self) -> Sio3W { - Sio3W::new(self, 19) + pub fn sio3(&mut self) -> SIO3_W { + SIO3_W::new(self, 19) } #[doc = "Bit 20 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio4(&mut self) -> Sio4W { - Sio4W::new(self, 20) + pub fn sio4(&mut self) -> SIO4_W { + SIO4_W::new(self, 20) } #[doc = "Bit 21 - Set Interrupt Output SRx"] #[inline(always)] #[must_use] - pub fn sio5(&mut self) -> Sio5W { - Sio5W::new(self, 21) + pub fn sio5(&mut self) -> SIO5_W { + SIO5_W::new(self, 21) } } #[doc = "Flag Modification Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fmr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct FmrSpec; -impl crate::RegisterSpec for FmrSpec { +pub struct FMR_SPEC; +impl crate::RegisterSpec for FMR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`fmr::W`](W) writer structure"] -impl crate::Writable for FmrSpec { +impl crate::Writable for FMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets FMR to value 0"] -impl crate::Resettable for FmrSpec { +impl crate::Resettable for FMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/in_.rs b/src/usic0_ch0/in_.rs index e70671a3..5ec0cc24 100644 --- a/src/usic0_ch0/in_.rs +++ b/src/usic0_ch0/in_.rs @@ -1,28 +1,28 @@ #[doc = "Register `IN[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TDATA` writer - Transmit Data"] -pub type TdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] #[must_use] - pub fn tdata(&mut self) -> TdataW { - TdataW::new(self, 0) + pub fn tdata(&mut self) -> TDATA_W { + TDATA_W::new(self, 0) } } #[doc = "Transmit FIFO Buffer\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`in_::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InSpec; -impl crate::RegisterSpec for InSpec { +pub struct IN_SPEC; +impl crate::RegisterSpec for IN_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`in_::W`](W) writer structure"] -impl crate::Writable for InSpec { +impl crate::Writable for IN_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets IN[%s] to value 0"] -impl crate::Resettable for InSpec { +impl crate::Resettable for IN_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/inpr.rs b/src/usic0_ch0/inpr.rs index 9e8af136..1f3949ac 100644 --- a/src/usic0_ch0/inpr.rs +++ b/src/usic0_ch0/inpr.rs @@ -1,84 +1,84 @@ #[doc = "Register `INPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `INPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Transmit Shift Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tsinp { +pub enum TSINP_A { #[doc = "0: Output SR0 becomes activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output SR1 becomes activated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output SR2 becomes activated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Output SR3 becomes activated."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Output SR4 becomes activated."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Output SR5 becomes activated."] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tsinp) -> Self { + fn from(variant: TSINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tsinp { +impl crate::FieldSpec for TSINP_A { type Ux = u8; } -impl crate::IsEnum for Tsinp {} +impl crate::IsEnum for TSINP_A {} #[doc = "Field `TSINP` reader - Transmit Shift Interrupt Node Pointer"] -pub type TsinpR = crate::FieldReader; -impl TsinpR { +pub type TSINP_R = crate::FieldReader; +impl TSINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Tsinp::Value1), - 1 => Some(Tsinp::Value2), - 2 => Some(Tsinp::Value3), - 3 => Some(Tsinp::Value4), - 4 => Some(Tsinp::Value5), - 5 => Some(Tsinp::Value6), + 0 => Some(TSINP_A::VALUE1), + 1 => Some(TSINP_A::VALUE2), + 2 => Some(TSINP_A::VALUE3), + 3 => Some(TSINP_A::VALUE4), + 4 => Some(TSINP_A::VALUE5), + 5 => Some(TSINP_A::VALUE6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsinp::Value1 + *self == TSINP_A::VALUE1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsinp::Value2 + *self == TSINP_A::VALUE2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Tsinp::Value3 + *self == TSINP_A::VALUE3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Tsinp::Value4 + *self == TSINP_A::VALUE4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Tsinp::Value5 + *self == TSINP_A::VALUE5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Tsinp::Value6 + *self == TSINP_A::VALUE6 } } #[doc = "Field `TSINP` writer - Transmit Shift Interrupt Node Pointer"] -pub type TsinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Tsinp>; -impl<'a, REG> TsinpW<'a, REG> +pub type TSINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, TSINP_A>; +impl<'a, REG> TSINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -86,123 +86,123 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsinp::Value1) + self.variant(TSINP_A::VALUE1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsinp::Value2) + self.variant(TSINP_A::VALUE2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Tsinp::Value3) + self.variant(TSINP_A::VALUE3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Tsinp::Value4) + self.variant(TSINP_A::VALUE4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Tsinp::Value5) + self.variant(TSINP_A::VALUE5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Tsinp::Value6) + self.variant(TSINP_A::VALUE6) } } #[doc = "Field `TBINP` reader - Transmit Buffer Interrupt Node Pointer"] -pub type TbinpR = crate::FieldReader; +pub type TBINP_R = crate::FieldReader; #[doc = "Field `TBINP` writer - Transmit Buffer Interrupt Node Pointer"] -pub type TbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type TBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `RINP` reader - Receive Interrupt Node Pointer"] -pub type RinpR = crate::FieldReader; +pub type RINP_R = crate::FieldReader; #[doc = "Field `RINP` writer - Receive Interrupt Node Pointer"] -pub type RinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type RINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `AINP` reader - Alternative Receive Interrupt Node Pointer"] -pub type AinpR = crate::FieldReader; +pub type AINP_R = crate::FieldReader; #[doc = "Field `AINP` writer - Alternative Receive Interrupt Node Pointer"] -pub type AinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type AINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `PINP` reader - Transmit Shift Interrupt Node Pointer"] -pub type PinpR = crate::FieldReader; +pub type PINP_R = crate::FieldReader; #[doc = "Field `PINP` writer - Transmit Shift Interrupt Node Pointer"] -pub type PinpW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type PINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; impl R { #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - pub fn tsinp(&self) -> TsinpR { - TsinpR::new((self.bits & 7) as u8) + pub fn tsinp(&self) -> TSINP_R { + TSINP_R::new((self.bits & 7) as u8) } #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn tbinp(&self) -> TbinpR { - TbinpR::new(((self.bits >> 4) & 7) as u8) + pub fn tbinp(&self) -> TBINP_R { + TBINP_R::new(((self.bits >> 4) & 7) as u8) } #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"] #[inline(always)] - pub fn rinp(&self) -> RinpR { - RinpR::new(((self.bits >> 8) & 7) as u8) + pub fn rinp(&self) -> RINP_R { + RINP_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"] #[inline(always)] - pub fn ainp(&self) -> AinpR { - AinpR::new(((self.bits >> 12) & 7) as u8) + pub fn ainp(&self) -> AINP_R { + AINP_R::new(((self.bits >> 12) & 7) as u8) } #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - pub fn pinp(&self) -> PinpR { - PinpR::new(((self.bits >> 16) & 7) as u8) + pub fn pinp(&self) -> PINP_R { + PINP_R::new(((self.bits >> 16) & 7) as u8) } } impl W { #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn tsinp(&mut self) -> TsinpW { - TsinpW::new(self, 0) + pub fn tsinp(&mut self) -> TSINP_W { + TSINP_W::new(self, 0) } #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn tbinp(&mut self) -> TbinpW { - TbinpW::new(self, 4) + pub fn tbinp(&mut self) -> TBINP_W { + TBINP_W::new(self, 4) } #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn rinp(&mut self) -> RinpW { - RinpW::new(self, 8) + pub fn rinp(&mut self) -> RINP_W { + RINP_W::new(self, 8) } #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn ainp(&mut self) -> AinpW { - AinpW::new(self, 12) + pub fn ainp(&mut self) -> AINP_W { + AINP_W::new(self, 12) } #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn pinp(&mut self) -> PinpW { - PinpW::new(self, 16) + pub fn pinp(&mut self) -> PINP_W { + PINP_W::new(self, 16) } } #[doc = "Interrupt Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`inpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct InprSpec; -impl crate::RegisterSpec for InprSpec { +pub struct INPR_SPEC; +impl crate::RegisterSpec for INPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`inpr::R`](R) reader structure"] -impl crate::Readable for InprSpec {} +impl crate::Readable for INPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`inpr::W`](W) writer structure"] -impl crate::Writable for InprSpec { +impl crate::Writable for INPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets INPR to value 0"] -impl crate::Resettable for InprSpec { +impl crate::Resettable for INPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/kscfg.rs b/src/usic0_ch0/kscfg.rs index 37641b7f..630b8f22 100644 --- a/src/usic0_ch0/kscfg.rs +++ b/src/usic0_ch0/kscfg.rs @@ -1,152 +1,152 @@ #[doc = "Register `KSCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `KSCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Module Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Moden { +pub enum MODEN_A { #[doc = "0: The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Moden) -> Self { + fn from(variant: MODEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MODEN` reader - Module Enable"] -pub type ModenR = crate::BitReader; -impl ModenR { +pub type MODEN_R = crate::BitReader; +impl MODEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Moden { + pub const fn variant(&self) -> MODEN_A { match self.bits { - false => Moden::Value1, - true => Moden::Value2, + false => MODEN_A::VALUE1, + true => MODEN_A::VALUE2, } } #[doc = "The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Moden::Value1 + *self == MODEN_A::VALUE1 } #[doc = "The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Moden::Value2 + *self == MODEN_A::VALUE2 } } #[doc = "Field `MODEN` writer - Module Enable"] -pub type ModenW<'a, REG> = crate::BitWriter<'a, REG, Moden>; -impl<'a, REG> ModenW<'a, REG> +pub type MODEN_W<'a, REG> = crate::BitWriter<'a, REG, MODEN_A>; +impl<'a, REG> MODEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The module is switched off immediately (without respecting a stop condition). It does not react on mode control actions and the module clock is switched off. The module does not react on read accesses and ignores write accesses (except to KSCFG)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Moden::Value1) + self.variant(MODEN_A::VALUE1) } #[doc = "The module is switched on and can operate. After writing 1 to MODEN, it is recommended to read register KSCFG to avoid pipeline effects in the control block before accessing other Service Request Processing registers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Moden::Value2) + self.variant(MODEN_A::VALUE2) } } #[doc = "Bit Protection for MODEN\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bpmoden { +pub enum BPMODEN_A { #[doc = "0: MODEN is not changed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: MODEN is updated with the written value."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bpmoden) -> Self { + fn from(variant: BPMODEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BPMODEN` writer - Bit Protection for MODEN"] -pub type BpmodenW<'a, REG> = crate::BitWriter<'a, REG, Bpmoden>; -impl<'a, REG> BpmodenW<'a, REG> +pub type BPMODEN_W<'a, REG> = crate::BitWriter<'a, REG, BPMODEN_A>; +impl<'a, REG> BPMODEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "MODEN is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bpmoden::Value1) + self.variant(BPMODEN_A::VALUE1) } #[doc = "MODEN is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bpmoden::Value2) + self.variant(BPMODEN_A::VALUE2) } } #[doc = "Normal Operation Mode Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Nomcfg { +pub enum NOMCFG_A { #[doc = "0: Run mode 0 is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Run mode 1 is selected."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Stop mode 0 is selected."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Stop mode 1 is selected."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Nomcfg) -> Self { + fn from(variant: NOMCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Nomcfg { +impl crate::FieldSpec for NOMCFG_A { type Ux = u8; } -impl crate::IsEnum for Nomcfg {} +impl crate::IsEnum for NOMCFG_A {} #[doc = "Field `NOMCFG` reader - Normal Operation Mode Configuration"] -pub type NomcfgR = crate::FieldReader; -impl NomcfgR { +pub type NOMCFG_R = crate::FieldReader; +impl NOMCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nomcfg { + pub const fn variant(&self) -> NOMCFG_A { match self.bits { - 0 => Nomcfg::Value1, - 1 => Nomcfg::Value2, - 2 => Nomcfg::Value3, - 3 => Nomcfg::Value4, + 0 => NOMCFG_A::VALUE1, + 1 => NOMCFG_A::VALUE2, + 2 => NOMCFG_A::VALUE3, + 3 => NOMCFG_A::VALUE4, _ => unreachable!(), } } #[doc = "Run mode 0 is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nomcfg::Value1 + *self == NOMCFG_A::VALUE1 } #[doc = "Run mode 1 is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nomcfg::Value2 + *self == NOMCFG_A::VALUE2 } #[doc = "Stop mode 0 is selected."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Nomcfg::Value3 + *self == NOMCFG_A::VALUE3 } #[doc = "Stop mode 1 is selected."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Nomcfg::Value4 + *self == NOMCFG_A::VALUE4 } } #[doc = "Field `NOMCFG` writer - Normal Operation Mode Configuration"] -pub type NomcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Nomcfg, crate::Safe>; -impl<'a, REG> NomcfgW<'a, REG> +pub type NOMCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, NOMCFG_A, crate::Safe>; +impl<'a, REG> NOMCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -154,159 +154,159 @@ where #[doc = "Run mode 0 is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nomcfg::Value1) + self.variant(NOMCFG_A::VALUE1) } #[doc = "Run mode 1 is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nomcfg::Value2) + self.variant(NOMCFG_A::VALUE2) } #[doc = "Stop mode 0 is selected."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Nomcfg::Value3) + self.variant(NOMCFG_A::VALUE3) } #[doc = "Stop mode 1 is selected."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Nomcfg::Value4) + self.variant(NOMCFG_A::VALUE4) } } #[doc = "Bit Protection for NOMCFG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bpnom { +pub enum BPNOM_A { #[doc = "0: NOMCFG is not changed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: NOMCFG is updated with the written value."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bpnom) -> Self { + fn from(variant: BPNOM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BPNOM` writer - Bit Protection for NOMCFG"] -pub type BpnomW<'a, REG> = crate::BitWriter<'a, REG, Bpnom>; -impl<'a, REG> BpnomW<'a, REG> +pub type BPNOM_W<'a, REG> = crate::BitWriter<'a, REG, BPNOM_A>; +impl<'a, REG> BPNOM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "NOMCFG is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bpnom::Value1) + self.variant(BPNOM_A::VALUE1) } #[doc = "NOMCFG is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bpnom::Value2) + self.variant(BPNOM_A::VALUE2) } } #[doc = "Field `SUMCFG` reader - Suspend Mode Configuration"] -pub type SumcfgR = crate::FieldReader; +pub type SUMCFG_R = crate::FieldReader; #[doc = "Field `SUMCFG` writer - Suspend Mode Configuration"] -pub type SumcfgW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type SUMCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Bit Protection for SUMCFG\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bpsum { +pub enum BPSUM_A { #[doc = "0: SUMCFG is not changed."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: SUMCFG is updated with the written value."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bpsum) -> Self { + fn from(variant: BPSUM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BPSUM` writer - Bit Protection for SUMCFG"] -pub type BpsumW<'a, REG> = crate::BitWriter<'a, REG, Bpsum>; -impl<'a, REG> BpsumW<'a, REG> +pub type BPSUM_W<'a, REG> = crate::BitWriter<'a, REG, BPSUM_A>; +impl<'a, REG> BPSUM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "SUMCFG is not changed."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bpsum::Value1) + self.variant(BPSUM_A::VALUE1) } #[doc = "SUMCFG is updated with the written value."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bpsum::Value2) + self.variant(BPSUM_A::VALUE2) } } impl R { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - pub fn moden(&self) -> ModenR { - ModenR::new((self.bits & 1) != 0) + pub fn moden(&self) -> MODEN_R { + MODEN_R::new((self.bits & 1) != 0) } #[doc = "Bits 4:5 - Normal Operation Mode Configuration"] #[inline(always)] - pub fn nomcfg(&self) -> NomcfgR { - NomcfgR::new(((self.bits >> 4) & 3) as u8) + pub fn nomcfg(&self) -> NOMCFG_R { + NOMCFG_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - pub fn sumcfg(&self) -> SumcfgR { - SumcfgR::new(((self.bits >> 8) & 3) as u8) + pub fn sumcfg(&self) -> SUMCFG_R { + SUMCFG_R::new(((self.bits >> 8) & 3) as u8) } } impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] #[must_use] - pub fn moden(&mut self) -> ModenW { - ModenW::new(self, 0) + pub fn moden(&mut self) -> MODEN_W { + MODEN_W::new(self, 0) } #[doc = "Bit 1 - Bit Protection for MODEN"] #[inline(always)] #[must_use] - pub fn bpmoden(&mut self) -> BpmodenW { - BpmodenW::new(self, 1) + pub fn bpmoden(&mut self) -> BPMODEN_W { + BPMODEN_W::new(self, 1) } #[doc = "Bits 4:5 - Normal Operation Mode Configuration"] #[inline(always)] #[must_use] - pub fn nomcfg(&mut self) -> NomcfgW { - NomcfgW::new(self, 4) + pub fn nomcfg(&mut self) -> NOMCFG_W { + NOMCFG_W::new(self, 4) } #[doc = "Bit 7 - Bit Protection for NOMCFG"] #[inline(always)] #[must_use] - pub fn bpnom(&mut self) -> BpnomW { - BpnomW::new(self, 7) + pub fn bpnom(&mut self) -> BPNOM_W { + BPNOM_W::new(self, 7) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] #[must_use] - pub fn sumcfg(&mut self) -> SumcfgW { - SumcfgW::new(self, 8) + pub fn sumcfg(&mut self) -> SUMCFG_W { + SUMCFG_W::new(self, 8) } #[doc = "Bit 11 - Bit Protection for SUMCFG"] #[inline(always)] #[must_use] - pub fn bpsum(&mut self) -> BpsumW { - BpsumW::new(self, 11) + pub fn bpsum(&mut self) -> BPSUM_W { + BPSUM_W::new(self, 11) } } #[doc = "Kernel State Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`kscfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`kscfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct KscfgSpec; -impl crate::RegisterSpec for KscfgSpec { +pub struct KSCFG_SPEC; +impl crate::RegisterSpec for KSCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`kscfg::R`](R) reader structure"] -impl crate::Readable for KscfgSpec {} +impl crate::Readable for KSCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`kscfg::W`](W) writer structure"] -impl crate::Writable for KscfgSpec { +impl crate::Writable for KSCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets KSCFG to value 0"] -impl crate::Resettable for KscfgSpec { +impl crate::Resettable for KSCFG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/outdr.rs b/src/usic0_ch0/outdr.rs index f30c8536..8080282f 100644 --- a/src/usic0_ch0/outdr.rs +++ b/src/usic0_ch0/outdr.rs @@ -1,29 +1,29 @@ #[doc = "Register `OUTDR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Data from Shift Register"] -pub type DsrR = crate::FieldReader; +pub type DSR_R = crate::FieldReader; #[doc = "Field `RCI` reader - Receive Control Information from Shift Register"] -pub type RciR = crate::FieldReader; +pub type RCI_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data from Shift Register"] #[inline(always)] - pub fn dsr(&self) -> DsrR { - DsrR::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DSR_R { + DSR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:20 - Receive Control Information from Shift Register"] #[inline(always)] - pub fn rci(&self) -> RciR { - RciR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn rci(&self) -> RCI_R { + RCI_R::new(((self.bits >> 16) & 0x1f) as u8) } } #[doc = "Receiver Buffer Output Register L for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outdr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutdrSpec; -impl crate::RegisterSpec for OutdrSpec { +pub struct OUTDR_SPEC; +impl crate::RegisterSpec for OUTDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`outdr::R`](R) reader structure"] -impl crate::Readable for OutdrSpec {} +impl crate::Readable for OUTDR_SPEC {} #[doc = "`reset()` method sets OUTDR to value 0"] -impl crate::Resettable for OutdrSpec { +impl crate::Resettable for OUTDR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/outr.rs b/src/usic0_ch0/outr.rs index aefb99a1..ceffa844 100644 --- a/src/usic0_ch0/outr.rs +++ b/src/usic0_ch0/outr.rs @@ -1,29 +1,29 @@ #[doc = "Register `OUTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Received Data"] -pub type DsrR = crate::FieldReader; +pub type DSR_R = crate::FieldReader; #[doc = "Field `RCI` reader - Receiver Control Information"] -pub type RciR = crate::FieldReader; +pub type RCI_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Received Data"] #[inline(always)] - pub fn dsr(&self) -> DsrR { - DsrR::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DSR_R { + DSR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:20 - Receiver Control Information"] #[inline(always)] - pub fn rci(&self) -> RciR { - RciR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn rci(&self) -> RCI_R { + RCI_R::new(((self.bits >> 16) & 0x1f) as u8) } } #[doc = "Receiver Buffer Output Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`outr::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OutrSpec; -impl crate::RegisterSpec for OutrSpec { +pub struct OUTR_SPEC; +impl crate::RegisterSpec for OUTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`outr::R`](R) reader structure"] -impl crate::Readable for OutrSpec {} +impl crate::Readable for OUTR_SPEC {} #[doc = "`reset()` method sets OUTR to value 0"] -impl crate::Resettable for OutrSpec { +impl crate::Resettable for OUTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr.rs b/src/usic0_ch0/pcr.rs index e075cb0b..0a6302fc 100644 --- a/src/usic0_ch0/pcr.rs +++ b/src/usic0_ch0/pcr.rs @@ -1,505 +1,505 @@ #[doc = "Register `PCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CTR0` reader - Protocol Control Bit 0"] -pub type Ctr0R = crate::BitReader; +pub type CTR0_R = crate::BitReader; #[doc = "Field `CTR0` writer - Protocol Control Bit 0"] -pub type Ctr0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR1` reader - Protocol Control Bit 1"] -pub type Ctr1R = crate::BitReader; +pub type CTR1_R = crate::BitReader; #[doc = "Field `CTR1` writer - Protocol Control Bit 1"] -pub type Ctr1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR2` reader - Protocol Control Bit 2"] -pub type Ctr2R = crate::BitReader; +pub type CTR2_R = crate::BitReader; #[doc = "Field `CTR2` writer - Protocol Control Bit 2"] -pub type Ctr2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR3` reader - Protocol Control Bit 3"] -pub type Ctr3R = crate::BitReader; +pub type CTR3_R = crate::BitReader; #[doc = "Field `CTR3` writer - Protocol Control Bit 3"] -pub type Ctr3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR4` reader - Protocol Control Bit 4"] -pub type Ctr4R = crate::BitReader; +pub type CTR4_R = crate::BitReader; #[doc = "Field `CTR4` writer - Protocol Control Bit 4"] -pub type Ctr4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR5` reader - Protocol Control Bit 5"] -pub type Ctr5R = crate::BitReader; +pub type CTR5_R = crate::BitReader; #[doc = "Field `CTR5` writer - Protocol Control Bit 5"] -pub type Ctr5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR6` reader - Protocol Control Bit 6"] -pub type Ctr6R = crate::BitReader; +pub type CTR6_R = crate::BitReader; #[doc = "Field `CTR6` writer - Protocol Control Bit 6"] -pub type Ctr6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR7` reader - Protocol Control Bit 7"] -pub type Ctr7R = crate::BitReader; +pub type CTR7_R = crate::BitReader; #[doc = "Field `CTR7` writer - Protocol Control Bit 7"] -pub type Ctr7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR8` reader - Protocol Control Bit 8"] -pub type Ctr8R = crate::BitReader; +pub type CTR8_R = crate::BitReader; #[doc = "Field `CTR8` writer - Protocol Control Bit 8"] -pub type Ctr8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR9` reader - Protocol Control Bit 9"] -pub type Ctr9R = crate::BitReader; +pub type CTR9_R = crate::BitReader; #[doc = "Field `CTR9` writer - Protocol Control Bit 9"] -pub type Ctr9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR10` reader - Protocol Control Bit 10"] -pub type Ctr10R = crate::BitReader; +pub type CTR10_R = crate::BitReader; #[doc = "Field `CTR10` writer - Protocol Control Bit 10"] -pub type Ctr10W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR10_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR11` reader - Protocol Control Bit 11"] -pub type Ctr11R = crate::BitReader; +pub type CTR11_R = crate::BitReader; #[doc = "Field `CTR11` writer - Protocol Control Bit 11"] -pub type Ctr11W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR11_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR12` reader - Protocol Control Bit 12"] -pub type Ctr12R = crate::BitReader; +pub type CTR12_R = crate::BitReader; #[doc = "Field `CTR12` writer - Protocol Control Bit 12"] -pub type Ctr12W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR12_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR13` reader - Protocol Control Bit 13"] -pub type Ctr13R = crate::BitReader; +pub type CTR13_R = crate::BitReader; #[doc = "Field `CTR13` writer - Protocol Control Bit 13"] -pub type Ctr13W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR13_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR14` reader - Protocol Control Bit 14"] -pub type Ctr14R = crate::BitReader; +pub type CTR14_R = crate::BitReader; #[doc = "Field `CTR14` writer - Protocol Control Bit 14"] -pub type Ctr14W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR14_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR15` reader - Protocol Control Bit 15"] -pub type Ctr15R = crate::BitReader; +pub type CTR15_R = crate::BitReader; #[doc = "Field `CTR15` writer - Protocol Control Bit 15"] -pub type Ctr15W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR15_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR16` reader - Protocol Control Bit 16"] -pub type Ctr16R = crate::BitReader; +pub type CTR16_R = crate::BitReader; #[doc = "Field `CTR16` writer - Protocol Control Bit 16"] -pub type Ctr16W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR16_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR17` reader - Protocol Control Bit 17"] -pub type Ctr17R = crate::BitReader; +pub type CTR17_R = crate::BitReader; #[doc = "Field `CTR17` writer - Protocol Control Bit 17"] -pub type Ctr17W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR17_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR18` reader - Protocol Control Bit 18"] -pub type Ctr18R = crate::BitReader; +pub type CTR18_R = crate::BitReader; #[doc = "Field `CTR18` writer - Protocol Control Bit 18"] -pub type Ctr18W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR18_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR19` reader - Protocol Control Bit 19"] -pub type Ctr19R = crate::BitReader; +pub type CTR19_R = crate::BitReader; #[doc = "Field `CTR19` writer - Protocol Control Bit 19"] -pub type Ctr19W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR19_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR20` reader - Protocol Control Bit 20"] -pub type Ctr20R = crate::BitReader; +pub type CTR20_R = crate::BitReader; #[doc = "Field `CTR20` writer - Protocol Control Bit 20"] -pub type Ctr20W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR20_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR21` reader - Protocol Control Bit 21"] -pub type Ctr21R = crate::BitReader; +pub type CTR21_R = crate::BitReader; #[doc = "Field `CTR21` writer - Protocol Control Bit 21"] -pub type Ctr21W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR21_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR22` reader - Protocol Control Bit 22"] -pub type Ctr22R = crate::BitReader; +pub type CTR22_R = crate::BitReader; #[doc = "Field `CTR22` writer - Protocol Control Bit 22"] -pub type Ctr22W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR22_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR23` reader - Protocol Control Bit 23"] -pub type Ctr23R = crate::BitReader; +pub type CTR23_R = crate::BitReader; #[doc = "Field `CTR23` writer - Protocol Control Bit 23"] -pub type Ctr23W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR23_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR24` reader - Protocol Control Bit 24"] -pub type Ctr24R = crate::BitReader; +pub type CTR24_R = crate::BitReader; #[doc = "Field `CTR24` writer - Protocol Control Bit 24"] -pub type Ctr24W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR24_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR25` reader - Protocol Control Bit 25"] -pub type Ctr25R = crate::BitReader; +pub type CTR25_R = crate::BitReader; #[doc = "Field `CTR25` writer - Protocol Control Bit 25"] -pub type Ctr25W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR25_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR26` reader - Protocol Control Bit 26"] -pub type Ctr26R = crate::BitReader; +pub type CTR26_R = crate::BitReader; #[doc = "Field `CTR26` writer - Protocol Control Bit 26"] -pub type Ctr26W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR26_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR27` reader - Protocol Control Bit 27"] -pub type Ctr27R = crate::BitReader; +pub type CTR27_R = crate::BitReader; #[doc = "Field `CTR27` writer - Protocol Control Bit 27"] -pub type Ctr27W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR27_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR28` reader - Protocol Control Bit 28"] -pub type Ctr28R = crate::BitReader; +pub type CTR28_R = crate::BitReader; #[doc = "Field `CTR28` writer - Protocol Control Bit 28"] -pub type Ctr28W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR28_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR29` reader - Protocol Control Bit 29"] -pub type Ctr29R = crate::BitReader; +pub type CTR29_R = crate::BitReader; #[doc = "Field `CTR29` writer - Protocol Control Bit 29"] -pub type Ctr29W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR29_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR30` reader - Protocol Control Bit 30"] -pub type Ctr30R = crate::BitReader; +pub type CTR30_R = crate::BitReader; #[doc = "Field `CTR30` writer - Protocol Control Bit 30"] -pub type Ctr30W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR30_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `CTR31` reader - Protocol Control Bit 31"] -pub type Ctr31R = crate::BitReader; +pub type CTR31_R = crate::BitReader; #[doc = "Field `CTR31` writer - Protocol Control Bit 31"] -pub type Ctr31W<'a, REG> = crate::BitWriter<'a, REG>; +pub type CTR31_W<'a, REG> = crate::BitWriter<'a, REG>; impl R { #[doc = "Bit 0 - Protocol Control Bit 0"] #[inline(always)] - pub fn ctr0(&self) -> Ctr0R { - Ctr0R::new((self.bits & 1) != 0) + pub fn ctr0(&self) -> CTR0_R { + CTR0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Protocol Control Bit 1"] #[inline(always)] - pub fn ctr1(&self) -> Ctr1R { - Ctr1R::new(((self.bits >> 1) & 1) != 0) + pub fn ctr1(&self) -> CTR1_R { + CTR1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Protocol Control Bit 2"] #[inline(always)] - pub fn ctr2(&self) -> Ctr2R { - Ctr2R::new(((self.bits >> 2) & 1) != 0) + pub fn ctr2(&self) -> CTR2_R { + CTR2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Protocol Control Bit 3"] #[inline(always)] - pub fn ctr3(&self) -> Ctr3R { - Ctr3R::new(((self.bits >> 3) & 1) != 0) + pub fn ctr3(&self) -> CTR3_R { + CTR3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Protocol Control Bit 4"] #[inline(always)] - pub fn ctr4(&self) -> Ctr4R { - Ctr4R::new(((self.bits >> 4) & 1) != 0) + pub fn ctr4(&self) -> CTR4_R { + CTR4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Protocol Control Bit 5"] #[inline(always)] - pub fn ctr5(&self) -> Ctr5R { - Ctr5R::new(((self.bits >> 5) & 1) != 0) + pub fn ctr5(&self) -> CTR5_R { + CTR5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Protocol Control Bit 6"] #[inline(always)] - pub fn ctr6(&self) -> Ctr6R { - Ctr6R::new(((self.bits >> 6) & 1) != 0) + pub fn ctr6(&self) -> CTR6_R { + CTR6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Protocol Control Bit 7"] #[inline(always)] - pub fn ctr7(&self) -> Ctr7R { - Ctr7R::new(((self.bits >> 7) & 1) != 0) + pub fn ctr7(&self) -> CTR7_R { + CTR7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Protocol Control Bit 8"] #[inline(always)] - pub fn ctr8(&self) -> Ctr8R { - Ctr8R::new(((self.bits >> 8) & 1) != 0) + pub fn ctr8(&self) -> CTR8_R { + CTR8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol Control Bit 9"] #[inline(always)] - pub fn ctr9(&self) -> Ctr9R { - Ctr9R::new(((self.bits >> 9) & 1) != 0) + pub fn ctr9(&self) -> CTR9_R { + CTR9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Protocol Control Bit 10"] #[inline(always)] - pub fn ctr10(&self) -> Ctr10R { - Ctr10R::new(((self.bits >> 10) & 1) != 0) + pub fn ctr10(&self) -> CTR10_R { + CTR10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Protocol Control Bit 11"] #[inline(always)] - pub fn ctr11(&self) -> Ctr11R { - Ctr11R::new(((self.bits >> 11) & 1) != 0) + pub fn ctr11(&self) -> CTR11_R { + CTR11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Protocol Control Bit 12"] #[inline(always)] - pub fn ctr12(&self) -> Ctr12R { - Ctr12R::new(((self.bits >> 12) & 1) != 0) + pub fn ctr12(&self) -> CTR12_R { + CTR12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Protocol Control Bit 13"] #[inline(always)] - pub fn ctr13(&self) -> Ctr13R { - Ctr13R::new(((self.bits >> 13) & 1) != 0) + pub fn ctr13(&self) -> CTR13_R { + CTR13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Protocol Control Bit 14"] #[inline(always)] - pub fn ctr14(&self) -> Ctr14R { - Ctr14R::new(((self.bits >> 14) & 1) != 0) + pub fn ctr14(&self) -> CTR14_R { + CTR14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Protocol Control Bit 15"] #[inline(always)] - pub fn ctr15(&self) -> Ctr15R { - Ctr15R::new(((self.bits >> 15) & 1) != 0) + pub fn ctr15(&self) -> CTR15_R { + CTR15_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Protocol Control Bit 16"] #[inline(always)] - pub fn ctr16(&self) -> Ctr16R { - Ctr16R::new(((self.bits >> 16) & 1) != 0) + pub fn ctr16(&self) -> CTR16_R { + CTR16_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Protocol Control Bit 17"] #[inline(always)] - pub fn ctr17(&self) -> Ctr17R { - Ctr17R::new(((self.bits >> 17) & 1) != 0) + pub fn ctr17(&self) -> CTR17_R { + CTR17_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Protocol Control Bit 18"] #[inline(always)] - pub fn ctr18(&self) -> Ctr18R { - Ctr18R::new(((self.bits >> 18) & 1) != 0) + pub fn ctr18(&self) -> CTR18_R { + CTR18_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Protocol Control Bit 19"] #[inline(always)] - pub fn ctr19(&self) -> Ctr19R { - Ctr19R::new(((self.bits >> 19) & 1) != 0) + pub fn ctr19(&self) -> CTR19_R { + CTR19_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Protocol Control Bit 20"] #[inline(always)] - pub fn ctr20(&self) -> Ctr20R { - Ctr20R::new(((self.bits >> 20) & 1) != 0) + pub fn ctr20(&self) -> CTR20_R { + CTR20_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Protocol Control Bit 21"] #[inline(always)] - pub fn ctr21(&self) -> Ctr21R { - Ctr21R::new(((self.bits >> 21) & 1) != 0) + pub fn ctr21(&self) -> CTR21_R { + CTR21_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Protocol Control Bit 22"] #[inline(always)] - pub fn ctr22(&self) -> Ctr22R { - Ctr22R::new(((self.bits >> 22) & 1) != 0) + pub fn ctr22(&self) -> CTR22_R { + CTR22_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Protocol Control Bit 23"] #[inline(always)] - pub fn ctr23(&self) -> Ctr23R { - Ctr23R::new(((self.bits >> 23) & 1) != 0) + pub fn ctr23(&self) -> CTR23_R { + CTR23_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Protocol Control Bit 24"] #[inline(always)] - pub fn ctr24(&self) -> Ctr24R { - Ctr24R::new(((self.bits >> 24) & 1) != 0) + pub fn ctr24(&self) -> CTR24_R { + CTR24_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Protocol Control Bit 25"] #[inline(always)] - pub fn ctr25(&self) -> Ctr25R { - Ctr25R::new(((self.bits >> 25) & 1) != 0) + pub fn ctr25(&self) -> CTR25_R { + CTR25_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Protocol Control Bit 26"] #[inline(always)] - pub fn ctr26(&self) -> Ctr26R { - Ctr26R::new(((self.bits >> 26) & 1) != 0) + pub fn ctr26(&self) -> CTR26_R { + CTR26_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Protocol Control Bit 27"] #[inline(always)] - pub fn ctr27(&self) -> Ctr27R { - Ctr27R::new(((self.bits >> 27) & 1) != 0) + pub fn ctr27(&self) -> CTR27_R { + CTR27_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Protocol Control Bit 28"] #[inline(always)] - pub fn ctr28(&self) -> Ctr28R { - Ctr28R::new(((self.bits >> 28) & 1) != 0) + pub fn ctr28(&self) -> CTR28_R { + CTR28_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Protocol Control Bit 29"] #[inline(always)] - pub fn ctr29(&self) -> Ctr29R { - Ctr29R::new(((self.bits >> 29) & 1) != 0) + pub fn ctr29(&self) -> CTR29_R { + CTR29_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Protocol Control Bit 30"] #[inline(always)] - pub fn ctr30(&self) -> Ctr30R { - Ctr30R::new(((self.bits >> 30) & 1) != 0) + pub fn ctr30(&self) -> CTR30_R { + CTR30_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Protocol Control Bit 31"] #[inline(always)] - pub fn ctr31(&self) -> Ctr31R { - Ctr31R::new(((self.bits >> 31) & 1) != 0) + pub fn ctr31(&self) -> CTR31_R { + CTR31_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Protocol Control Bit 0"] #[inline(always)] #[must_use] - pub fn ctr0(&mut self) -> Ctr0W { - Ctr0W::new(self, 0) + pub fn ctr0(&mut self) -> CTR0_W { + CTR0_W::new(self, 0) } #[doc = "Bit 1 - Protocol Control Bit 1"] #[inline(always)] #[must_use] - pub fn ctr1(&mut self) -> Ctr1W { - Ctr1W::new(self, 1) + pub fn ctr1(&mut self) -> CTR1_W { + CTR1_W::new(self, 1) } #[doc = "Bit 2 - Protocol Control Bit 2"] #[inline(always)] #[must_use] - pub fn ctr2(&mut self) -> Ctr2W { - Ctr2W::new(self, 2) + pub fn ctr2(&mut self) -> CTR2_W { + CTR2_W::new(self, 2) } #[doc = "Bit 3 - Protocol Control Bit 3"] #[inline(always)] #[must_use] - pub fn ctr3(&mut self) -> Ctr3W { - Ctr3W::new(self, 3) + pub fn ctr3(&mut self) -> CTR3_W { + CTR3_W::new(self, 3) } #[doc = "Bit 4 - Protocol Control Bit 4"] #[inline(always)] #[must_use] - pub fn ctr4(&mut self) -> Ctr4W { - Ctr4W::new(self, 4) + pub fn ctr4(&mut self) -> CTR4_W { + CTR4_W::new(self, 4) } #[doc = "Bit 5 - Protocol Control Bit 5"] #[inline(always)] #[must_use] - pub fn ctr5(&mut self) -> Ctr5W { - Ctr5W::new(self, 5) + pub fn ctr5(&mut self) -> CTR5_W { + CTR5_W::new(self, 5) } #[doc = "Bit 6 - Protocol Control Bit 6"] #[inline(always)] #[must_use] - pub fn ctr6(&mut self) -> Ctr6W { - Ctr6W::new(self, 6) + pub fn ctr6(&mut self) -> CTR6_W { + CTR6_W::new(self, 6) } #[doc = "Bit 7 - Protocol Control Bit 7"] #[inline(always)] #[must_use] - pub fn ctr7(&mut self) -> Ctr7W { - Ctr7W::new(self, 7) + pub fn ctr7(&mut self) -> CTR7_W { + CTR7_W::new(self, 7) } #[doc = "Bit 8 - Protocol Control Bit 8"] #[inline(always)] #[must_use] - pub fn ctr8(&mut self) -> Ctr8W { - Ctr8W::new(self, 8) + pub fn ctr8(&mut self) -> CTR8_W { + CTR8_W::new(self, 8) } #[doc = "Bit 9 - Protocol Control Bit 9"] #[inline(always)] #[must_use] - pub fn ctr9(&mut self) -> Ctr9W { - Ctr9W::new(self, 9) + pub fn ctr9(&mut self) -> CTR9_W { + CTR9_W::new(self, 9) } #[doc = "Bit 10 - Protocol Control Bit 10"] #[inline(always)] #[must_use] - pub fn ctr10(&mut self) -> Ctr10W { - Ctr10W::new(self, 10) + pub fn ctr10(&mut self) -> CTR10_W { + CTR10_W::new(self, 10) } #[doc = "Bit 11 - Protocol Control Bit 11"] #[inline(always)] #[must_use] - pub fn ctr11(&mut self) -> Ctr11W { - Ctr11W::new(self, 11) + pub fn ctr11(&mut self) -> CTR11_W { + CTR11_W::new(self, 11) } #[doc = "Bit 12 - Protocol Control Bit 12"] #[inline(always)] #[must_use] - pub fn ctr12(&mut self) -> Ctr12W { - Ctr12W::new(self, 12) + pub fn ctr12(&mut self) -> CTR12_W { + CTR12_W::new(self, 12) } #[doc = "Bit 13 - Protocol Control Bit 13"] #[inline(always)] #[must_use] - pub fn ctr13(&mut self) -> Ctr13W { - Ctr13W::new(self, 13) + pub fn ctr13(&mut self) -> CTR13_W { + CTR13_W::new(self, 13) } #[doc = "Bit 14 - Protocol Control Bit 14"] #[inline(always)] #[must_use] - pub fn ctr14(&mut self) -> Ctr14W { - Ctr14W::new(self, 14) + pub fn ctr14(&mut self) -> CTR14_W { + CTR14_W::new(self, 14) } #[doc = "Bit 15 - Protocol Control Bit 15"] #[inline(always)] #[must_use] - pub fn ctr15(&mut self) -> Ctr15W { - Ctr15W::new(self, 15) + pub fn ctr15(&mut self) -> CTR15_W { + CTR15_W::new(self, 15) } #[doc = "Bit 16 - Protocol Control Bit 16"] #[inline(always)] #[must_use] - pub fn ctr16(&mut self) -> Ctr16W { - Ctr16W::new(self, 16) + pub fn ctr16(&mut self) -> CTR16_W { + CTR16_W::new(self, 16) } #[doc = "Bit 17 - Protocol Control Bit 17"] #[inline(always)] #[must_use] - pub fn ctr17(&mut self) -> Ctr17W { - Ctr17W::new(self, 17) + pub fn ctr17(&mut self) -> CTR17_W { + CTR17_W::new(self, 17) } #[doc = "Bit 18 - Protocol Control Bit 18"] #[inline(always)] #[must_use] - pub fn ctr18(&mut self) -> Ctr18W { - Ctr18W::new(self, 18) + pub fn ctr18(&mut self) -> CTR18_W { + CTR18_W::new(self, 18) } #[doc = "Bit 19 - Protocol Control Bit 19"] #[inline(always)] #[must_use] - pub fn ctr19(&mut self) -> Ctr19W { - Ctr19W::new(self, 19) + pub fn ctr19(&mut self) -> CTR19_W { + CTR19_W::new(self, 19) } #[doc = "Bit 20 - Protocol Control Bit 20"] #[inline(always)] #[must_use] - pub fn ctr20(&mut self) -> Ctr20W { - Ctr20W::new(self, 20) + pub fn ctr20(&mut self) -> CTR20_W { + CTR20_W::new(self, 20) } #[doc = "Bit 21 - Protocol Control Bit 21"] #[inline(always)] #[must_use] - pub fn ctr21(&mut self) -> Ctr21W { - Ctr21W::new(self, 21) + pub fn ctr21(&mut self) -> CTR21_W { + CTR21_W::new(self, 21) } #[doc = "Bit 22 - Protocol Control Bit 22"] #[inline(always)] #[must_use] - pub fn ctr22(&mut self) -> Ctr22W { - Ctr22W::new(self, 22) + pub fn ctr22(&mut self) -> CTR22_W { + CTR22_W::new(self, 22) } #[doc = "Bit 23 - Protocol Control Bit 23"] #[inline(always)] #[must_use] - pub fn ctr23(&mut self) -> Ctr23W { - Ctr23W::new(self, 23) + pub fn ctr23(&mut self) -> CTR23_W { + CTR23_W::new(self, 23) } #[doc = "Bit 24 - Protocol Control Bit 24"] #[inline(always)] #[must_use] - pub fn ctr24(&mut self) -> Ctr24W { - Ctr24W::new(self, 24) + pub fn ctr24(&mut self) -> CTR24_W { + CTR24_W::new(self, 24) } #[doc = "Bit 25 - Protocol Control Bit 25"] #[inline(always)] #[must_use] - pub fn ctr25(&mut self) -> Ctr25W { - Ctr25W::new(self, 25) + pub fn ctr25(&mut self) -> CTR25_W { + CTR25_W::new(self, 25) } #[doc = "Bit 26 - Protocol Control Bit 26"] #[inline(always)] #[must_use] - pub fn ctr26(&mut self) -> Ctr26W { - Ctr26W::new(self, 26) + pub fn ctr26(&mut self) -> CTR26_W { + CTR26_W::new(self, 26) } #[doc = "Bit 27 - Protocol Control Bit 27"] #[inline(always)] #[must_use] - pub fn ctr27(&mut self) -> Ctr27W { - Ctr27W::new(self, 27) + pub fn ctr27(&mut self) -> CTR27_W { + CTR27_W::new(self, 27) } #[doc = "Bit 28 - Protocol Control Bit 28"] #[inline(always)] #[must_use] - pub fn ctr28(&mut self) -> Ctr28W { - Ctr28W::new(self, 28) + pub fn ctr28(&mut self) -> CTR28_W { + CTR28_W::new(self, 28) } #[doc = "Bit 29 - Protocol Control Bit 29"] #[inline(always)] #[must_use] - pub fn ctr29(&mut self) -> Ctr29W { - Ctr29W::new(self, 29) + pub fn ctr29(&mut self) -> CTR29_W { + CTR29_W::new(self, 29) } #[doc = "Bit 30 - Protocol Control Bit 30"] #[inline(always)] #[must_use] - pub fn ctr30(&mut self) -> Ctr30W { - Ctr30W::new(self, 30) + pub fn ctr30(&mut self) -> CTR30_W { + CTR30_W::new(self, 30) } #[doc = "Bit 31 - Protocol Control Bit 31"] #[inline(always)] #[must_use] - pub fn ctr31(&mut self) -> Ctr31W { - Ctr31W::new(self, 31) + pub fn ctr31(&mut self) -> CTR31_W { + CTR31_W::new(self, 31) } } #[doc = "Protocol Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcrSpec; -impl crate::RegisterSpec for PcrSpec { +pub struct PCR_SPEC; +impl crate::RegisterSpec for PCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcr::R`](R) reader structure"] -impl crate::Readable for PcrSpec {} +impl crate::Readable for PCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcr::W`](W) writer structure"] -impl crate::Writable for PcrSpec { +impl crate::Writable for PCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR to value 0"] -impl crate::Resettable for PcrSpec { +impl crate::Resettable for PCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_ascmode.rs b/src/usic0_ch0/pcr_ascmode.rs index 755072c5..21aad7c3 100644 --- a/src/usic0_ch0/pcr_ascmode.rs +++ b/src/usic0_ch0/pcr_ascmode.rs @@ -1,496 +1,496 @@ #[doc = "Register `PCR_ASCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_ASCMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Sample Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Smd { +pub enum SMD_A { #[doc = "0: Only one sample is taken per bit time. The current input value is sampled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Three samples are taken per bit time and a majority decision is made."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Smd) -> Self { + fn from(variant: SMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SMD` reader - Sample Mode"] -pub type SmdR = crate::BitReader; -impl SmdR { +pub type SMD_R = crate::BitReader; +impl SMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Smd { + pub const fn variant(&self) -> SMD_A { match self.bits { - false => Smd::Value1, - true => Smd::Value2, + false => SMD_A::VALUE1, + true => SMD_A::VALUE2, } } #[doc = "Only one sample is taken per bit time. The current input value is sampled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Smd::Value1 + *self == SMD_A::VALUE1 } #[doc = "Three samples are taken per bit time and a majority decision is made."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Smd::Value2 + *self == SMD_A::VALUE2 } } #[doc = "Field `SMD` writer - Sample Mode"] -pub type SmdW<'a, REG> = crate::BitWriter<'a, REG, Smd>; -impl<'a, REG> SmdW<'a, REG> +pub type SMD_W<'a, REG> = crate::BitWriter<'a, REG, SMD_A>; +impl<'a, REG> SMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Only one sample is taken per bit time. The current input value is sampled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Smd::Value1) + self.variant(SMD_A::VALUE1) } #[doc = "Three samples are taken per bit time and a majority decision is made."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Smd::Value2) + self.variant(SMD_A::VALUE2) } } #[doc = "Stop Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stpb { +pub enum STPB_A { #[doc = "0: The number of stop bits is 1."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The number of stop bits is 2."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stpb) -> Self { + fn from(variant: STPB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STPB` reader - Stop Bits"] -pub type StpbR = crate::BitReader; -impl StpbR { +pub type STPB_R = crate::BitReader; +impl STPB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stpb { + pub const fn variant(&self) -> STPB_A { match self.bits { - false => Stpb::Value1, - true => Stpb::Value2, + false => STPB_A::VALUE1, + true => STPB_A::VALUE2, } } #[doc = "The number of stop bits is 1."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stpb::Value1 + *self == STPB_A::VALUE1 } #[doc = "The number of stop bits is 2."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stpb::Value2 + *self == STPB_A::VALUE2 } } #[doc = "Field `STPB` writer - Stop Bits"] -pub type StpbW<'a, REG> = crate::BitWriter<'a, REG, Stpb>; -impl<'a, REG> StpbW<'a, REG> +pub type STPB_W<'a, REG> = crate::BitWriter<'a, REG, STPB_A>; +impl<'a, REG> STPB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The number of stop bits is 1."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stpb::Value1) + self.variant(STPB_A::VALUE1) } #[doc = "The number of stop bits is 2."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stpb::Value2) + self.variant(STPB_A::VALUE2) } } #[doc = "Idle Detection Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Idm { +pub enum IDM_A { #[doc = "0: The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Idm) -> Self { + fn from(variant: IDM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `IDM` reader - Idle Detection Mode"] -pub type IdmR = crate::BitReader; -impl IdmR { +pub type IDM_R = crate::BitReader; +impl IDM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Idm { + pub const fn variant(&self) -> IDM_A { match self.bits { - false => Idm::Value1, - true => Idm::Value2, + false => IDM_A::VALUE1, + true => IDM_A::VALUE2, } } #[doc = "The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Idm::Value1 + *self == IDM_A::VALUE1 } #[doc = "The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Idm::Value2 + *self == IDM_A::VALUE2 } } #[doc = "Field `IDM` writer - Idle Detection Mode"] -pub type IdmW<'a, REG> = crate::BitWriter<'a, REG, Idm>; -impl<'a, REG> IdmW<'a, REG> +pub type IDM_W<'a, REG> = crate::BitWriter<'a, REG, IDM_A>; +impl<'a, REG> IDM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The bus idle detection is switched off and bits PSR.TXIDLE and PSR.RXIDLE are set automatically to enable data transfers without checking the inputs before."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Idm::Value1) + self.variant(IDM_A::VALUE1) } #[doc = "The bus is considered as idle after a number of consecutive passive bit times defined by SCTR.FLE plus 2 (in the case without parity bit) or plus 3 (in the case with parity bit)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Idm::Value2) + self.variant(IDM_A::VALUE2) } } #[doc = "Synchronization Break Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sbien { +pub enum SBIEN_A { #[doc = "0: The interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sbien) -> Self { + fn from(variant: SBIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SBIEN` reader - Synchronization Break Interrupt Enable"] -pub type SbienR = crate::BitReader; -impl SbienR { +pub type SBIEN_R = crate::BitReader; +impl SBIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sbien { + pub const fn variant(&self) -> SBIEN_A { match self.bits { - false => Sbien::Value1, - true => Sbien::Value2, + false => SBIEN_A::VALUE1, + true => SBIEN_A::VALUE2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sbien::Value1 + *self == SBIEN_A::VALUE1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sbien::Value2 + *self == SBIEN_A::VALUE2 } } #[doc = "Field `SBIEN` writer - Synchronization Break Interrupt Enable"] -pub type SbienW<'a, REG> = crate::BitWriter<'a, REG, Sbien>; -impl<'a, REG> SbienW<'a, REG> +pub type SBIEN_W<'a, REG> = crate::BitWriter<'a, REG, SBIEN_A>; +impl<'a, REG> SBIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sbien::Value1) + self.variant(SBIEN_A::VALUE1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sbien::Value2) + self.variant(SBIEN_A::VALUE2) } } #[doc = "Collision Detection Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cden { +pub enum CDEN_A { #[doc = "0: The collision detection is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cden) -> Self { + fn from(variant: CDEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDEN` reader - Collision Detection Enable"] -pub type CdenR = crate::BitReader; -impl CdenR { +pub type CDEN_R = crate::BitReader; +impl CDEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cden { + pub const fn variant(&self) -> CDEN_A { match self.bits { - false => Cden::Value1, - true => Cden::Value2, + false => CDEN_A::VALUE1, + true => CDEN_A::VALUE2, } } #[doc = "The collision detection is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cden::Value1 + *self == CDEN_A::VALUE1 } #[doc = "If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cden::Value2 + *self == CDEN_A::VALUE2 } } #[doc = "Field `CDEN` writer - Collision Detection Enable"] -pub type CdenW<'a, REG> = crate::BitWriter<'a, REG, Cden>; -impl<'a, REG> CdenW<'a, REG> +pub type CDEN_W<'a, REG> = crate::BitWriter<'a, REG, CDEN_A>; +impl<'a, REG> CDEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The collision detection is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cden::Value1) + self.variant(CDEN_A::VALUE1) } #[doc = "If a collision is detected, the transmitter stops its data transmission, outputs a 1, sets bit PSR.COL and generates a protocol interrupt. In order to allow data transmission again, PSR.COL has to be cleared by software."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cden::Value2) + self.variant(CDEN_A::VALUE2) } } #[doc = "Receiver Noise Detection Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rnien { +pub enum RNIEN_A { #[doc = "0: The interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rnien) -> Self { + fn from(variant: RNIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RNIEN` reader - Receiver Noise Detection Interrupt Enable"] -pub type RnienR = crate::BitReader; -impl RnienR { +pub type RNIEN_R = crate::BitReader; +impl RNIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rnien { + pub const fn variant(&self) -> RNIEN_A { match self.bits { - false => Rnien::Value1, - true => Rnien::Value2, + false => RNIEN_A::VALUE1, + true => RNIEN_A::VALUE2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rnien::Value1 + *self == RNIEN_A::VALUE1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rnien::Value2 + *self == RNIEN_A::VALUE2 } } #[doc = "Field `RNIEN` writer - Receiver Noise Detection Interrupt Enable"] -pub type RnienW<'a, REG> = crate::BitWriter<'a, REG, Rnien>; -impl<'a, REG> RnienW<'a, REG> +pub type RNIEN_W<'a, REG> = crate::BitWriter<'a, REG, RNIEN_A>; +impl<'a, REG> RNIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rnien::Value1) + self.variant(RNIEN_A::VALUE1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rnien::Value2) + self.variant(RNIEN_A::VALUE2) } } #[doc = "Format Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Feien { +pub enum FEIEN_A { #[doc = "0: The interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Feien) -> Self { + fn from(variant: FEIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FEIEN` reader - Format Error Interrupt Enable"] -pub type FeienR = crate::BitReader; -impl FeienR { +pub type FEIEN_R = crate::BitReader; +impl FEIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Feien { + pub const fn variant(&self) -> FEIEN_A { match self.bits { - false => Feien::Value1, - true => Feien::Value2, + false => FEIEN_A::VALUE1, + true => FEIEN_A::VALUE2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Feien::Value1 + *self == FEIEN_A::VALUE1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Feien::Value2 + *self == FEIEN_A::VALUE2 } } #[doc = "Field `FEIEN` writer - Format Error Interrupt Enable"] -pub type FeienW<'a, REG> = crate::BitWriter<'a, REG, Feien>; -impl<'a, REG> FeienW<'a, REG> +pub type FEIEN_W<'a, REG> = crate::BitWriter<'a, REG, FEIEN_A>; +impl<'a, REG> FEIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Feien::Value1) + self.variant(FEIEN_A::VALUE1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Feien::Value2) + self.variant(FEIEN_A::VALUE2) } } #[doc = "Frame Finished Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ffien { +pub enum FFIEN_A { #[doc = "0: The interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ffien) -> Self { + fn from(variant: FFIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FFIEN` reader - Frame Finished Interrupt Enable"] -pub type FfienR = crate::BitReader; -impl FfienR { +pub type FFIEN_R = crate::BitReader; +impl FFIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ffien { + pub const fn variant(&self) -> FFIEN_A { match self.bits { - false => Ffien::Value1, - true => Ffien::Value2, + false => FFIEN_A::VALUE1, + true => FFIEN_A::VALUE2, } } #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ffien::Value1 + *self == FFIEN_A::VALUE1 } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ffien::Value2 + *self == FFIEN_A::VALUE2 } } #[doc = "Field `FFIEN` writer - Frame Finished Interrupt Enable"] -pub type FfienW<'a, REG> = crate::BitWriter<'a, REG, Ffien>; -impl<'a, REG> FfienW<'a, REG> +pub type FFIEN_W<'a, REG> = crate::BitWriter<'a, REG, FFIEN_A>; +impl<'a, REG> FFIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ffien::Value1) + self.variant(FFIEN_A::VALUE1) } #[doc = "The interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ffien::Value2) + self.variant(FFIEN_A::VALUE2) } } #[doc = "Field `SP` reader - Sample Point"] -pub type SpR = crate::FieldReader; +pub type SP_R = crate::FieldReader; #[doc = "Field `SP` writer - Sample Point"] -pub type SpW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type SP_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Pulse Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Pl { +pub enum PL_A { #[doc = "0: The pulse length is equal to the bit length (no shortened 0)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The pulse length of a 0 bit is 2 time quanta."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The pulse length of a 0 bit is 3 time quanta."] - Value3 = 2, + VALUE3 = 2, #[doc = "7: The pulse length of a 0 bit is 8 time quanta."] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Pl) -> Self { + fn from(variant: PL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Pl { +impl crate::FieldSpec for PL_A { type Ux = u8; } -impl crate::IsEnum for Pl {} +impl crate::IsEnum for PL_A {} #[doc = "Field `PL` reader - Pulse Length"] -pub type PlR = crate::FieldReader; -impl PlR { +pub type PL_R = crate::FieldReader; +impl PL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Pl::Value1), - 1 => Some(Pl::Value2), - 2 => Some(Pl::Value3), - 7 => Some(Pl::Value4), + 0 => Some(PL_A::VALUE1), + 1 => Some(PL_A::VALUE2), + 2 => Some(PL_A::VALUE3), + 7 => Some(PL_A::VALUE4), _ => None, } } #[doc = "The pulse length is equal to the bit length (no shortened 0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pl::Value1 + *self == PL_A::VALUE1 } #[doc = "The pulse length of a 0 bit is 2 time quanta."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pl::Value2 + *self == PL_A::VALUE2 } #[doc = "The pulse length of a 0 bit is 3 time quanta."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Pl::Value3 + *self == PL_A::VALUE3 } #[doc = "The pulse length of a 0 bit is 8 time quanta."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Pl::Value4 + *self == PL_A::VALUE4 } } #[doc = "Field `PL` writer - Pulse Length"] -pub type PlW<'a, REG> = crate::FieldWriter<'a, REG, 3, Pl>; -impl<'a, REG> PlW<'a, REG> +pub type PL_W<'a, REG> = crate::FieldWriter<'a, REG, 3, PL_A>; +impl<'a, REG> PL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -498,67 +498,67 @@ where #[doc = "The pulse length is equal to the bit length (no shortened 0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pl::Value1) + self.variant(PL_A::VALUE1) } #[doc = "The pulse length of a 0 bit is 2 time quanta."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pl::Value2) + self.variant(PL_A::VALUE2) } #[doc = "The pulse length of a 0 bit is 3 time quanta."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Pl::Value3) + self.variant(PL_A::VALUE3) } #[doc = "The pulse length of a 0 bit is 8 time quanta."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Pl::Value4) + self.variant(PL_A::VALUE4) } } #[doc = "Receiver Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsten { +pub enum RSTEN_A { #[doc = "0: Flag PSR\\[9\\] is not modified depending on the receiver status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR\\[9\\] is set during the complete reception of a frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsten) -> Self { + fn from(variant: RSTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSTEN` reader - Receiver Status Enable"] -pub type RstenR = crate::BitReader; -impl RstenR { +pub type RSTEN_R = crate::BitReader; +impl RSTEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsten { + pub const fn variant(&self) -> RSTEN_A { match self.bits { - false => Rsten::Value1, - true => Rsten::Value2, + false => RSTEN_A::VALUE1, + true => RSTEN_A::VALUE2, } } #[doc = "Flag PSR\\[9\\] is not modified depending on the receiver status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsten::Value1 + *self == RSTEN_A::VALUE1 } #[doc = "Flag PSR\\[9\\] is set during the complete reception of a frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsten::Value2 + *self == RSTEN_A::VALUE2 } } #[doc = "Field `RSTEN` writer - Receiver Status Enable"] -pub type RstenW<'a, REG> = crate::BitWriter<'a, REG, Rsten>; -impl<'a, REG> RstenW<'a, REG> +pub type RSTEN_W<'a, REG> = crate::BitWriter<'a, REG, RSTEN_A>; +impl<'a, REG> RSTEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -566,58 +566,58 @@ where is not modified depending on the receiver status."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsten::Value1) + self.variant(RSTEN_A::VALUE1) } #[doc = "Flag PSR\\[9\\] is set during the complete reception of a frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsten::Value2) + self.variant(RSTEN_A::VALUE2) } } #[doc = "Transmitter Status Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsten { +pub enum TSTEN_A { #[doc = "0: Flag PSR\\[9\\] is not modified depending on the transmitter status."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR\\[9\\] is set during the complete transmission of a frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsten) -> Self { + fn from(variant: TSTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSTEN` reader - Transmitter Status Enable"] -pub type TstenR = crate::BitReader; -impl TstenR { +pub type TSTEN_R = crate::BitReader; +impl TSTEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsten { + pub const fn variant(&self) -> TSTEN_A { match self.bits { - false => Tsten::Value1, - true => Tsten::Value2, + false => TSTEN_A::VALUE1, + true => TSTEN_A::VALUE2, } } #[doc = "Flag PSR\\[9\\] is not modified depending on the transmitter status."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsten::Value1 + *self == TSTEN_A::VALUE1 } #[doc = "Flag PSR\\[9\\] is set during the complete transmission of a frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsten::Value2 + *self == TSTEN_A::VALUE2 } } #[doc = "Field `TSTEN` writer - Transmitter Status Enable"] -pub type TstenW<'a, REG> = crate::BitWriter<'a, REG, Tsten>; -impl<'a, REG> TstenW<'a, REG> +pub type TSTEN_W<'a, REG> = crate::BitWriter<'a, REG, TSTEN_A>; +impl<'a, REG> TSTEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -625,229 +625,229 @@ where is not modified depending on the transmitter status."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsten::Value1) + self.variant(TSTEN_A::VALUE1) } #[doc = "Flag PSR\\[9\\] is set during the complete transmission of a frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsten::Value2) + self.variant(TSTEN_A::VALUE2) } } #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mclk { +pub enum MCLK_A { #[doc = "0: The MCLK generation is disabled and the MCLK signal is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MCLK generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mclk) -> Self { + fn from(variant: MCLK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MclkR = crate::BitReader; -impl MclkR { +pub type MCLK_R = crate::BitReader; +impl MCLK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mclk { + pub const fn variant(&self) -> MCLK_A { match self.bits { - false => Mclk::Value1, - true => Mclk::Value2, + false => MCLK_A::VALUE1, + true => MCLK_A::VALUE2, } } #[doc = "The MCLK generation is disabled and the MCLK signal is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mclk::Value1 + *self == MCLK_A::VALUE1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mclk::Value2 + *self == MCLK_A::VALUE2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; -impl<'a, REG> MclkW<'a, REG> +pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; +impl<'a, REG> MCLK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and the MCLK signal is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mclk::Value1) + self.variant(MCLK_A::VALUE1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mclk::Value2) + self.variant(MCLK_A::VALUE2) } } impl R { #[doc = "Bit 0 - Sample Mode"] #[inline(always)] - pub fn smd(&self) -> SmdR { - SmdR::new((self.bits & 1) != 0) + pub fn smd(&self) -> SMD_R { + SMD_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Stop Bits"] #[inline(always)] - pub fn stpb(&self) -> StpbR { - StpbR::new(((self.bits >> 1) & 1) != 0) + pub fn stpb(&self) -> STPB_R { + STPB_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Idle Detection Mode"] #[inline(always)] - pub fn idm(&self) -> IdmR { - IdmR::new(((self.bits >> 2) & 1) != 0) + pub fn idm(&self) -> IDM_R { + IDM_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Synchronization Break Interrupt Enable"] #[inline(always)] - pub fn sbien(&self) -> SbienR { - SbienR::new(((self.bits >> 3) & 1) != 0) + pub fn sbien(&self) -> SBIEN_R { + SBIEN_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Collision Detection Enable"] #[inline(always)] - pub fn cden(&self) -> CdenR { - CdenR::new(((self.bits >> 4) & 1) != 0) + pub fn cden(&self) -> CDEN_R { + CDEN_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"] #[inline(always)] - pub fn rnien(&self) -> RnienR { - RnienR::new(((self.bits >> 5) & 1) != 0) + pub fn rnien(&self) -> RNIEN_R { + RNIEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Format Error Interrupt Enable"] #[inline(always)] - pub fn feien(&self) -> FeienR { - FeienR::new(((self.bits >> 6) & 1) != 0) + pub fn feien(&self) -> FEIEN_R { + FEIEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Frame Finished Interrupt Enable"] #[inline(always)] - pub fn ffien(&self) -> FfienR { - FfienR::new(((self.bits >> 7) & 1) != 0) + pub fn ffien(&self) -> FFIEN_R { + FFIEN_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:12 - Sample Point"] #[inline(always)] - pub fn sp(&self) -> SpR { - SpR::new(((self.bits >> 8) & 0x1f) as u8) + pub fn sp(&self) -> SP_R { + SP_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 13:15 - Pulse Length"] #[inline(always)] - pub fn pl(&self) -> PlR { - PlR::new(((self.bits >> 13) & 7) as u8) + pub fn pl(&self) -> PL_R { + PL_R::new(((self.bits >> 13) & 7) as u8) } #[doc = "Bit 16 - Receiver Status Enable"] #[inline(always)] - pub fn rsten(&self) -> RstenR { - RstenR::new(((self.bits >> 16) & 1) != 0) + pub fn rsten(&self) -> RSTEN_R { + RSTEN_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Transmitter Status Enable"] #[inline(always)] - pub fn tsten(&self) -> TstenR { - TstenR::new(((self.bits >> 17) & 1) != 0) + pub fn tsten(&self) -> TSTEN_R { + TSTEN_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MclkR { - MclkR::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MCLK_R { + MCLK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - Sample Mode"] #[inline(always)] #[must_use] - pub fn smd(&mut self) -> SmdW { - SmdW::new(self, 0) + pub fn smd(&mut self) -> SMD_W { + SMD_W::new(self, 0) } #[doc = "Bit 1 - Stop Bits"] #[inline(always)] #[must_use] - pub fn stpb(&mut self) -> StpbW { - StpbW::new(self, 1) + pub fn stpb(&mut self) -> STPB_W { + STPB_W::new(self, 1) } #[doc = "Bit 2 - Idle Detection Mode"] #[inline(always)] #[must_use] - pub fn idm(&mut self) -> IdmW { - IdmW::new(self, 2) + pub fn idm(&mut self) -> IDM_W { + IDM_W::new(self, 2) } #[doc = "Bit 3 - Synchronization Break Interrupt Enable"] #[inline(always)] #[must_use] - pub fn sbien(&mut self) -> SbienW { - SbienW::new(self, 3) + pub fn sbien(&mut self) -> SBIEN_W { + SBIEN_W::new(self, 3) } #[doc = "Bit 4 - Collision Detection Enable"] #[inline(always)] #[must_use] - pub fn cden(&mut self) -> CdenW { - CdenW::new(self, 4) + pub fn cden(&mut self) -> CDEN_W { + CDEN_W::new(self, 4) } #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rnien(&mut self) -> RnienW { - RnienW::new(self, 5) + pub fn rnien(&mut self) -> RNIEN_W { + RNIEN_W::new(self, 5) } #[doc = "Bit 6 - Format Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn feien(&mut self) -> FeienW { - FeienW::new(self, 6) + pub fn feien(&mut self) -> FEIEN_W { + FEIEN_W::new(self, 6) } #[doc = "Bit 7 - Frame Finished Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ffien(&mut self) -> FfienW { - FfienW::new(self, 7) + pub fn ffien(&mut self) -> FFIEN_W { + FFIEN_W::new(self, 7) } #[doc = "Bits 8:12 - Sample Point"] #[inline(always)] #[must_use] - pub fn sp(&mut self) -> SpW { - SpW::new(self, 8) + pub fn sp(&mut self) -> SP_W { + SP_W::new(self, 8) } #[doc = "Bits 13:15 - Pulse Length"] #[inline(always)] #[must_use] - pub fn pl(&mut self) -> PlW { - PlW::new(self, 13) + pub fn pl(&mut self) -> PL_W { + PL_W::new(self, 13) } #[doc = "Bit 16 - Receiver Status Enable"] #[inline(always)] #[must_use] - pub fn rsten(&mut self) -> RstenW { - RstenW::new(self, 16) + pub fn rsten(&mut self) -> RSTEN_W { + RSTEN_W::new(self, 16) } #[doc = "Bit 17 - Transmitter Status Enable"] #[inline(always)] #[must_use] - pub fn tsten(&mut self) -> TstenW { - TstenW::new(self, 17) + pub fn tsten(&mut self) -> TSTEN_W { + TSTEN_W::new(self, 17) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MclkW { - MclkW::new(self, 31) + pub fn mclk(&mut self) -> MCLK_W { + MCLK_W::new(self, 31) } } #[doc = "Protocol Control Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcrAscmodeSpec; -impl crate::RegisterSpec for PcrAscmodeSpec { +pub struct PCR_ASCMODE_SPEC; +impl crate::RegisterSpec for PCR_ASCMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcr_ascmode::R`](R) reader structure"] -impl crate::Readable for PcrAscmodeSpec {} +impl crate::Readable for PCR_ASCMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcr_ascmode::W`](W) writer structure"] -impl crate::Writable for PcrAscmodeSpec { +impl crate::Writable for PCR_ASCMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_ASCMode to value 0"] -impl crate::Resettable for PcrAscmodeSpec { +impl crate::Resettable for PCR_ASCMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_iicmode.rs b/src/usic0_ch0/pcr_iicmode.rs index be5f6066..f6295b60 100644 --- a/src/usic0_ch0/pcr_iicmode.rs +++ b/src/usic0_ch0/pcr_iicmode.rs @@ -1,823 +1,823 @@ #[doc = "Register `PCR_IICMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_IICMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SLAD` reader - Slave Address"] -pub type SladR = crate::FieldReader; +pub type SLAD_R = crate::FieldReader; #[doc = "Field `SLAD` writer - Slave Address"] -pub type SladW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type SLAD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Acknowledge 00H\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ack00 { +pub enum ACK00_A { #[doc = "0: The slave device is not sensitive to this address."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The slave device is sensitive to this address."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ack00) -> Self { + fn from(variant: ACK00_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ACK00` reader - Acknowledge 00H"] -pub type Ack00R = crate::BitReader; -impl Ack00R { +pub type ACK00_R = crate::BitReader; +impl ACK00_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ack00 { + pub const fn variant(&self) -> ACK00_A { match self.bits { - false => Ack00::Value1, - true => Ack00::Value2, + false => ACK00_A::VALUE1, + true => ACK00_A::VALUE2, } } #[doc = "The slave device is not sensitive to this address."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ack00::Value1 + *self == ACK00_A::VALUE1 } #[doc = "The slave device is sensitive to this address."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ack00::Value2 + *self == ACK00_A::VALUE2 } } #[doc = "Field `ACK00` writer - Acknowledge 00H"] -pub type Ack00W<'a, REG> = crate::BitWriter<'a, REG, Ack00>; -impl<'a, REG> Ack00W<'a, REG> +pub type ACK00_W<'a, REG> = crate::BitWriter<'a, REG, ACK00_A>; +impl<'a, REG> ACK00_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slave device is not sensitive to this address."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ack00::Value1) + self.variant(ACK00_A::VALUE1) } #[doc = "The slave device is sensitive to this address."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ack00::Value2) + self.variant(ACK00_A::VALUE2) } } #[doc = "Symbol Timing\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stim { +pub enum STIM_A { #[doc = "0: A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stim) -> Self { + fn from(variant: STIM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STIM` reader - Symbol Timing"] -pub type StimR = crate::BitReader; -impl StimR { +pub type STIM_R = crate::BitReader; +impl STIM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stim { + pub const fn variant(&self) -> STIM_A { match self.bits { - false => Stim::Value1, - true => Stim::Value2, + false => STIM_A::VALUE1, + true => STIM_A::VALUE2, } } #[doc = "A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stim::Value1 + *self == STIM_A::VALUE1 } #[doc = "A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stim::Value2 + *self == STIM_A::VALUE2 } } #[doc = "Field `STIM` writer - Symbol Timing"] -pub type StimW<'a, REG> = crate::BitWriter<'a, REG, Stim>; -impl<'a, REG> StimW<'a, REG> +pub type STIM_W<'a, REG> = crate::BitWriter<'a, REG, STIM_A>; +impl<'a, REG> STIM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A symbol contains 10 time quanta. The timing is adapted for standard mode (100 kBaud)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stim::Value1) + self.variant(STIM_A::VALUE1) } #[doc = "A symbol contains 25 time quanta. The timing is adapted for fast mode (400 kBaud)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stim::Value2) + self.variant(STIM_A::VALUE2) } } #[doc = "Start Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Scrien { +pub enum SCRIEN_A { #[doc = "0: The start condition interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The start condition interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Scrien) -> Self { + fn from(variant: SCRIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCRIEN` reader - Start Condition Received Interrupt Enable"] -pub type ScrienR = crate::BitReader; -impl ScrienR { +pub type SCRIEN_R = crate::BitReader; +impl SCRIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scrien { + pub const fn variant(&self) -> SCRIEN_A { match self.bits { - false => Scrien::Value1, - true => Scrien::Value2, + false => SCRIEN_A::VALUE1, + true => SCRIEN_A::VALUE2, } } #[doc = "The start condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scrien::Value1 + *self == SCRIEN_A::VALUE1 } #[doc = "The start condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scrien::Value2 + *self == SCRIEN_A::VALUE2 } } #[doc = "Field `SCRIEN` writer - Start Condition Received Interrupt Enable"] -pub type ScrienW<'a, REG> = crate::BitWriter<'a, REG, Scrien>; -impl<'a, REG> ScrienW<'a, REG> +pub type SCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, SCRIEN_A>; +impl<'a, REG> SCRIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The start condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scrien::Value1) + self.variant(SCRIEN_A::VALUE1) } #[doc = "The start condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scrien::Value2) + self.variant(SCRIEN_A::VALUE2) } } #[doc = "Repeated Start Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rscrien { +pub enum RSCRIEN_A { #[doc = "0: The repeated start condition interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The repeated start condition interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rscrien) -> Self { + fn from(variant: RSCRIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSCRIEN` reader - Repeated Start Condition Received Interrupt Enable"] -pub type RscrienR = crate::BitReader; -impl RscrienR { +pub type RSCRIEN_R = crate::BitReader; +impl RSCRIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rscrien { + pub const fn variant(&self) -> RSCRIEN_A { match self.bits { - false => Rscrien::Value1, - true => Rscrien::Value2, + false => RSCRIEN_A::VALUE1, + true => RSCRIEN_A::VALUE2, } } #[doc = "The repeated start condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rscrien::Value1 + *self == RSCRIEN_A::VALUE1 } #[doc = "The repeated start condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rscrien::Value2 + *self == RSCRIEN_A::VALUE2 } } #[doc = "Field `RSCRIEN` writer - Repeated Start Condition Received Interrupt Enable"] -pub type RscrienW<'a, REG> = crate::BitWriter<'a, REG, Rscrien>; -impl<'a, REG> RscrienW<'a, REG> +pub type RSCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, RSCRIEN_A>; +impl<'a, REG> RSCRIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The repeated start condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rscrien::Value1) + self.variant(RSCRIEN_A::VALUE1) } #[doc = "The repeated start condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rscrien::Value2) + self.variant(RSCRIEN_A::VALUE2) } } #[doc = "Stop Condition Received Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pcrien { +pub enum PCRIEN_A { #[doc = "0: The stop condition interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The stop condition interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pcrien) -> Self { + fn from(variant: PCRIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCRIEN` reader - Stop Condition Received Interrupt Enable"] -pub type PcrienR = crate::BitReader; -impl PcrienR { +pub type PCRIEN_R = crate::BitReader; +impl PCRIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcrien { + pub const fn variant(&self) -> PCRIEN_A { match self.bits { - false => Pcrien::Value1, - true => Pcrien::Value2, + false => PCRIEN_A::VALUE1, + true => PCRIEN_A::VALUE2, } } #[doc = "The stop condition interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcrien::Value1 + *self == PCRIEN_A::VALUE1 } #[doc = "The stop condition interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcrien::Value2 + *self == PCRIEN_A::VALUE2 } } #[doc = "Field `PCRIEN` writer - Stop Condition Received Interrupt Enable"] -pub type PcrienW<'a, REG> = crate::BitWriter<'a, REG, Pcrien>; -impl<'a, REG> PcrienW<'a, REG> +pub type PCRIEN_W<'a, REG> = crate::BitWriter<'a, REG, PCRIEN_A>; +impl<'a, REG> PCRIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The stop condition interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcrien::Value1) + self.variant(PCRIEN_A::VALUE1) } #[doc = "The stop condition interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcrien::Value2) + self.variant(PCRIEN_A::VALUE2) } } #[doc = "Non-Acknowledge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Nackien { +pub enum NACKIEN_A { #[doc = "0: The non-acknowledge interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The non-acknowledge interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Nackien) -> Self { + fn from(variant: NACKIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NACKIEN` reader - Non-Acknowledge Interrupt Enable"] -pub type NackienR = crate::BitReader; -impl NackienR { +pub type NACKIEN_R = crate::BitReader; +impl NACKIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nackien { + pub const fn variant(&self) -> NACKIEN_A { match self.bits { - false => Nackien::Value1, - true => Nackien::Value2, + false => NACKIEN_A::VALUE1, + true => NACKIEN_A::VALUE2, } } #[doc = "The non-acknowledge interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nackien::Value1 + *self == NACKIEN_A::VALUE1 } #[doc = "The non-acknowledge interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nackien::Value2 + *self == NACKIEN_A::VALUE2 } } #[doc = "Field `NACKIEN` writer - Non-Acknowledge Interrupt Enable"] -pub type NackienW<'a, REG> = crate::BitWriter<'a, REG, Nackien>; -impl<'a, REG> NackienW<'a, REG> +pub type NACKIEN_W<'a, REG> = crate::BitWriter<'a, REG, NACKIEN_A>; +impl<'a, REG> NACKIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The non-acknowledge interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nackien::Value1) + self.variant(NACKIEN_A::VALUE1) } #[doc = "The non-acknowledge interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nackien::Value2) + self.variant(NACKIEN_A::VALUE2) } } #[doc = "Arbitration Lost Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Arlien { +pub enum ARLIEN_A { #[doc = "0: The arbitration lost interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The arbitration lost interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Arlien) -> Self { + fn from(variant: ARLIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ARLIEN` reader - Arbitration Lost Interrupt Enable"] -pub type ArlienR = crate::BitReader; -impl ArlienR { +pub type ARLIEN_R = crate::BitReader; +impl ARLIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arlien { + pub const fn variant(&self) -> ARLIEN_A { match self.bits { - false => Arlien::Value1, - true => Arlien::Value2, + false => ARLIEN_A::VALUE1, + true => ARLIEN_A::VALUE2, } } #[doc = "The arbitration lost interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arlien::Value1 + *self == ARLIEN_A::VALUE1 } #[doc = "The arbitration lost interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arlien::Value2 + *self == ARLIEN_A::VALUE2 } } #[doc = "Field `ARLIEN` writer - Arbitration Lost Interrupt Enable"] -pub type ArlienW<'a, REG> = crate::BitWriter<'a, REG, Arlien>; -impl<'a, REG> ArlienW<'a, REG> +pub type ARLIEN_W<'a, REG> = crate::BitWriter<'a, REG, ARLIEN_A>; +impl<'a, REG> ARLIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The arbitration lost interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arlien::Value1) + self.variant(ARLIEN_A::VALUE1) } #[doc = "The arbitration lost interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arlien::Value2) + self.variant(ARLIEN_A::VALUE2) } } #[doc = "Slave Read Request Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srrien { +pub enum SRRIEN_A { #[doc = "0: The slave read request interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The slave read request interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srrien) -> Self { + fn from(variant: SRRIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRRIEN` reader - Slave Read Request Interrupt Enable"] -pub type SrrienR = crate::BitReader; -impl SrrienR { +pub type SRRIEN_R = crate::BitReader; +impl SRRIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srrien { + pub const fn variant(&self) -> SRRIEN_A { match self.bits { - false => Srrien::Value1, - true => Srrien::Value2, + false => SRRIEN_A::VALUE1, + true => SRRIEN_A::VALUE2, } } #[doc = "The slave read request interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srrien::Value1 + *self == SRRIEN_A::VALUE1 } #[doc = "The slave read request interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srrien::Value2 + *self == SRRIEN_A::VALUE2 } } #[doc = "Field `SRRIEN` writer - Slave Read Request Interrupt Enable"] -pub type SrrienW<'a, REG> = crate::BitWriter<'a, REG, Srrien>; -impl<'a, REG> SrrienW<'a, REG> +pub type SRRIEN_W<'a, REG> = crate::BitWriter<'a, REG, SRRIEN_A>; +impl<'a, REG> SRRIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The slave read request interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srrien::Value1) + self.variant(SRRIEN_A::VALUE1) } #[doc = "The slave read request interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srrien::Value2) + self.variant(SRRIEN_A::VALUE2) } } #[doc = "Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Errien { +pub enum ERRIEN_A { #[doc = "0: The error interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The error interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Errien) -> Self { + fn from(variant: ERRIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERRIEN` reader - Error Interrupt Enable"] -pub type ErrienR = crate::BitReader; -impl ErrienR { +pub type ERRIEN_R = crate::BitReader; +impl ERRIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Errien { + pub const fn variant(&self) -> ERRIEN_A { match self.bits { - false => Errien::Value1, - true => Errien::Value2, + false => ERRIEN_A::VALUE1, + true => ERRIEN_A::VALUE2, } } #[doc = "The error interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Errien::Value1 + *self == ERRIEN_A::VALUE1 } #[doc = "The error interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Errien::Value2 + *self == ERRIEN_A::VALUE2 } } #[doc = "Field `ERRIEN` writer - Error Interrupt Enable"] -pub type ErrienW<'a, REG> = crate::BitWriter<'a, REG, Errien>; -impl<'a, REG> ErrienW<'a, REG> +pub type ERRIEN_W<'a, REG> = crate::BitWriter<'a, REG, ERRIEN_A>; +impl<'a, REG> ERRIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The error interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Errien::Value1) + self.variant(ERRIEN_A::VALUE1) } #[doc = "The error interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Errien::Value2) + self.variant(ERRIEN_A::VALUE2) } } #[doc = "Slave Acknowledge Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sackdis { +pub enum SACKDIS_A { #[doc = "0: The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sackdis) -> Self { + fn from(variant: SACKDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SACKDIS` reader - Slave Acknowledge Disable"] -pub type SackdisR = crate::BitReader; -impl SackdisR { +pub type SACKDIS_R = crate::BitReader; +impl SACKDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sackdis { + pub const fn variant(&self) -> SACKDIS_A { match self.bits { - false => Sackdis::Value1, - true => Sackdis::Value2, + false => SACKDIS_A::VALUE1, + true => SACKDIS_A::VALUE2, } } #[doc = "The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sackdis::Value1 + *self == SACKDIS_A::VALUE1 } #[doc = "The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sackdis::Value2 + *self == SACKDIS_A::VALUE2 } } #[doc = "Field `SACKDIS` writer - Slave Acknowledge Disable"] -pub type SackdisW<'a, REG> = crate::BitWriter<'a, REG, Sackdis>; -impl<'a, REG> SackdisW<'a, REG> +pub type SACKDIS_W<'a, REG> = crate::BitWriter<'a, REG, SACKDIS_A>; +impl<'a, REG> SACKDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The generation of an active slave acknowledge is enabled (slave acknowledge with 0 level = more bytes can be received)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sackdis::Value1) + self.variant(SACKDIS_A::VALUE1) } #[doc = "The generation of an active slave acknowledge is disabled (slave acknowledge with 1 level = reception stopped)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sackdis::Value2) + self.variant(SACKDIS_A::VALUE2) } } #[doc = "Field `HDEL` reader - Hardware Delay"] -pub type HdelR = crate::FieldReader; +pub type HDEL_R = crate::FieldReader; #[doc = "Field `HDEL` writer - Hardware Delay"] -pub type HdelW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type HDEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Acknowledge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ackien { +pub enum ACKIEN_A { #[doc = "0: The acknowledge interrupt is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The acknowledge interrupt is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ackien) -> Self { + fn from(variant: ACKIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ACKIEN` reader - Acknowledge Interrupt Enable"] -pub type AckienR = crate::BitReader; -impl AckienR { +pub type ACKIEN_R = crate::BitReader; +impl ACKIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ackien { + pub const fn variant(&self) -> ACKIEN_A { match self.bits { - false => Ackien::Value1, - true => Ackien::Value2, + false => ACKIEN_A::VALUE1, + true => ACKIEN_A::VALUE2, } } #[doc = "The acknowledge interrupt is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ackien::Value1 + *self == ACKIEN_A::VALUE1 } #[doc = "The acknowledge interrupt is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ackien::Value2 + *self == ACKIEN_A::VALUE2 } } #[doc = "Field `ACKIEN` writer - Acknowledge Interrupt Enable"] -pub type AckienW<'a, REG> = crate::BitWriter<'a, REG, Ackien>; -impl<'a, REG> AckienW<'a, REG> +pub type ACKIEN_W<'a, REG> = crate::BitWriter<'a, REG, ACKIEN_A>; +impl<'a, REG> ACKIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The acknowledge interrupt is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ackien::Value1) + self.variant(ACKIEN_A::VALUE1) } #[doc = "The acknowledge interrupt is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ackien::Value2) + self.variant(ACKIEN_A::VALUE2) } } #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mclk { +pub enum MCLK_A { #[doc = "0: The MCLK generation is disabled and MCLK is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MCLK generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mclk) -> Self { + fn from(variant: MCLK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MclkR = crate::BitReader; -impl MclkR { +pub type MCLK_R = crate::BitReader; +impl MCLK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mclk { + pub const fn variant(&self) -> MCLK_A { match self.bits { - false => Mclk::Value1, - true => Mclk::Value2, + false => MCLK_A::VALUE1, + true => MCLK_A::VALUE2, } } #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mclk::Value1 + *self == MCLK_A::VALUE1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mclk::Value2 + *self == MCLK_A::VALUE2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; -impl<'a, REG> MclkW<'a, REG> +pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; +impl<'a, REG> MCLK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mclk::Value1) + self.variant(MCLK_A::VALUE1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mclk::Value2) + self.variant(MCLK_A::VALUE2) } } impl R { #[doc = "Bits 0:15 - Slave Address"] #[inline(always)] - pub fn slad(&self) -> SladR { - SladR::new((self.bits & 0xffff) as u16) + pub fn slad(&self) -> SLAD_R { + SLAD_R::new((self.bits & 0xffff) as u16) } #[doc = "Bit 16 - Acknowledge 00H"] #[inline(always)] - pub fn ack00(&self) -> Ack00R { - Ack00R::new(((self.bits >> 16) & 1) != 0) + pub fn ack00(&self) -> ACK00_R { + ACK00_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Symbol Timing"] #[inline(always)] - pub fn stim(&self) -> StimR { - StimR::new(((self.bits >> 17) & 1) != 0) + pub fn stim(&self) -> STIM_R { + STIM_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Start Condition Received Interrupt Enable"] #[inline(always)] - pub fn scrien(&self) -> ScrienR { - ScrienR::new(((self.bits >> 18) & 1) != 0) + pub fn scrien(&self) -> SCRIEN_R { + SCRIEN_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"] #[inline(always)] - pub fn rscrien(&self) -> RscrienR { - RscrienR::new(((self.bits >> 19) & 1) != 0) + pub fn rscrien(&self) -> RSCRIEN_R { + RSCRIEN_R::new(((self.bits >> 19) & 1) != 0) } #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"] #[inline(always)] - pub fn pcrien(&self) -> PcrienR { - PcrienR::new(((self.bits >> 20) & 1) != 0) + pub fn pcrien(&self) -> PCRIEN_R { + PCRIEN_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"] #[inline(always)] - pub fn nackien(&self) -> NackienR { - NackienR::new(((self.bits >> 21) & 1) != 0) + pub fn nackien(&self) -> NACKIEN_R { + NACKIEN_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"] #[inline(always)] - pub fn arlien(&self) -> ArlienR { - ArlienR::new(((self.bits >> 22) & 1) != 0) + pub fn arlien(&self) -> ARLIEN_R { + ARLIEN_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 23 - Slave Read Request Interrupt Enable"] #[inline(always)] - pub fn srrien(&self) -> SrrienR { - SrrienR::new(((self.bits >> 23) & 1) != 0) + pub fn srrien(&self) -> SRRIEN_R { + SRRIEN_R::new(((self.bits >> 23) & 1) != 0) } #[doc = "Bit 24 - Error Interrupt Enable"] #[inline(always)] - pub fn errien(&self) -> ErrienR { - ErrienR::new(((self.bits >> 24) & 1) != 0) + pub fn errien(&self) -> ERRIEN_R { + ERRIEN_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Slave Acknowledge Disable"] #[inline(always)] - pub fn sackdis(&self) -> SackdisR { - SackdisR::new(((self.bits >> 25) & 1) != 0) + pub fn sackdis(&self) -> SACKDIS_R { + SACKDIS_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bits 26:29 - Hardware Delay"] #[inline(always)] - pub fn hdel(&self) -> HdelR { - HdelR::new(((self.bits >> 26) & 0x0f) as u8) + pub fn hdel(&self) -> HDEL_R { + HDEL_R::new(((self.bits >> 26) & 0x0f) as u8) } #[doc = "Bit 30 - Acknowledge Interrupt Enable"] #[inline(always)] - pub fn ackien(&self) -> AckienR { - AckienR::new(((self.bits >> 30) & 1) != 0) + pub fn ackien(&self) -> ACKIEN_R { + ACKIEN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MclkR { - MclkR::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MCLK_R { + MCLK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Slave Address"] #[inline(always)] #[must_use] - pub fn slad(&mut self) -> SladW { - SladW::new(self, 0) + pub fn slad(&mut self) -> SLAD_W { + SLAD_W::new(self, 0) } #[doc = "Bit 16 - Acknowledge 00H"] #[inline(always)] #[must_use] - pub fn ack00(&mut self) -> Ack00W { - Ack00W::new(self, 16) + pub fn ack00(&mut self) -> ACK00_W { + ACK00_W::new(self, 16) } #[doc = "Bit 17 - Symbol Timing"] #[inline(always)] #[must_use] - pub fn stim(&mut self) -> StimW { - StimW::new(self, 17) + pub fn stim(&mut self) -> STIM_W { + STIM_W::new(self, 17) } #[doc = "Bit 18 - Start Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn scrien(&mut self) -> ScrienW { - ScrienW::new(self, 18) + pub fn scrien(&mut self) -> SCRIEN_W { + SCRIEN_W::new(self, 18) } #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rscrien(&mut self) -> RscrienW { - RscrienW::new(self, 19) + pub fn rscrien(&mut self) -> RSCRIEN_W { + RSCRIEN_W::new(self, 19) } #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"] #[inline(always)] #[must_use] - pub fn pcrien(&mut self) -> PcrienW { - PcrienW::new(self, 20) + pub fn pcrien(&mut self) -> PCRIEN_W { + PCRIEN_W::new(self, 20) } #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn nackien(&mut self) -> NackienW { - NackienW::new(self, 21) + pub fn nackien(&mut self) -> NACKIEN_W { + NACKIEN_W::new(self, 21) } #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"] #[inline(always)] #[must_use] - pub fn arlien(&mut self) -> ArlienW { - ArlienW::new(self, 22) + pub fn arlien(&mut self) -> ARLIEN_W { + ARLIEN_W::new(self, 22) } #[doc = "Bit 23 - Slave Read Request Interrupt Enable"] #[inline(always)] #[must_use] - pub fn srrien(&mut self) -> SrrienW { - SrrienW::new(self, 23) + pub fn srrien(&mut self) -> SRRIEN_W { + SRRIEN_W::new(self, 23) } #[doc = "Bit 24 - Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn errien(&mut self) -> ErrienW { - ErrienW::new(self, 24) + pub fn errien(&mut self) -> ERRIEN_W { + ERRIEN_W::new(self, 24) } #[doc = "Bit 25 - Slave Acknowledge Disable"] #[inline(always)] #[must_use] - pub fn sackdis(&mut self) -> SackdisW { - SackdisW::new(self, 25) + pub fn sackdis(&mut self) -> SACKDIS_W { + SACKDIS_W::new(self, 25) } #[doc = "Bits 26:29 - Hardware Delay"] #[inline(always)] #[must_use] - pub fn hdel(&mut self) -> HdelW { - HdelW::new(self, 26) + pub fn hdel(&mut self) -> HDEL_W { + HDEL_W::new(self, 26) } #[doc = "Bit 30 - Acknowledge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn ackien(&mut self) -> AckienW { - AckienW::new(self, 30) + pub fn ackien(&mut self) -> ACKIEN_W { + ACKIEN_W::new(self, 30) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MclkW { - MclkW::new(self, 31) + pub fn mclk(&mut self) -> MCLK_W { + MCLK_W::new(self, 31) } } #[doc = "Protocol Control Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcrIicmodeSpec; -impl crate::RegisterSpec for PcrIicmodeSpec { +pub struct PCR_IICMODE_SPEC; +impl crate::RegisterSpec for PCR_IICMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcr_iicmode::R`](R) reader structure"] -impl crate::Readable for PcrIicmodeSpec {} +impl crate::Readable for PCR_IICMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcr_iicmode::W`](W) writer structure"] -impl crate::Writable for PcrIicmodeSpec { +impl crate::Writable for PCR_IICMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_IICMode to value 0"] -impl crate::Resettable for PcrIicmodeSpec { +impl crate::Resettable for PCR_IICMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_iismode.rs b/src/usic0_ch0/pcr_iismode.rs index f995addc..29ea7789 100644 --- a/src/usic0_ch0/pcr_iismode.rs +++ b/src/usic0_ch0/pcr_iismode.rs @@ -1,552 +1,552 @@ #[doc = "Register `PCR_IISMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_IISMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WA Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wagen { +pub enum WAGEN_A { #[doc = "0: The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wagen) -> Self { + fn from(variant: WAGEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WAGEN` reader - WA Generation Enable"] -pub type WagenR = crate::BitReader; -impl WagenR { +pub type WAGEN_R = crate::BitReader; +impl WAGEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wagen { + pub const fn variant(&self) -> WAGEN_A { match self.bits { - false => Wagen::Value1, - true => Wagen::Value2, + false => WAGEN_A::VALUE1, + true => WAGEN_A::VALUE2, } } #[doc = "The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wagen::Value1 + *self == WAGEN_A::VALUE1 } #[doc = "The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wagen::Value2 + *self == WAGEN_A::VALUE2 } } #[doc = "Field `WAGEN` writer - WA Generation Enable"] -pub type WagenW<'a, REG> = crate::BitWriter<'a, REG, Wagen>; -impl<'a, REG> WagenW<'a, REG> +pub type WAGEN_W<'a, REG> = crate::BitWriter<'a, REG, WAGEN_A>; +impl<'a, REG> WAGEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The IIS can be used as slave. The generation of the word address signal is disabled. The output signal WA is 0. The MCLKO signal generation depends on PCR.MCLK."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wagen::Value1) + self.variant(WAGEN_A::VALUE1) } #[doc = "The IIS can be used as master. The generation of the word address signal is enabled. The signal starts with a 0 after being enabled. The generation of MCLK is enabled, independent of PCR.MCLK. After clearing WAGEN, the USIC module stops the generation of the WA signal within the next 4 WA periods."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wagen::Value2) + self.variant(WAGEN_A::VALUE2) } } #[doc = "Data Transfers Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dten { +pub enum DTEN_A { #[doc = "0: The changes of the WA input signal are ignored and no transfers take place."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Transfers are enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dten) -> Self { + fn from(variant: DTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DTEN` reader - Data Transfers Enable"] -pub type DtenR = crate::BitReader; -impl DtenR { +pub type DTEN_R = crate::BitReader; +impl DTEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dten { + pub const fn variant(&self) -> DTEN_A { match self.bits { - false => Dten::Value1, - true => Dten::Value2, + false => DTEN_A::VALUE1, + true => DTEN_A::VALUE2, } } #[doc = "The changes of the WA input signal are ignored and no transfers take place."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dten::Value1 + *self == DTEN_A::VALUE1 } #[doc = "Transfers are enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dten::Value2 + *self == DTEN_A::VALUE2 } } #[doc = "Field `DTEN` writer - Data Transfers Enable"] -pub type DtenW<'a, REG> = crate::BitWriter<'a, REG, Dten>; -impl<'a, REG> DtenW<'a, REG> +pub type DTEN_W<'a, REG> = crate::BitWriter<'a, REG, DTEN_A>; +impl<'a, REG> DTEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The changes of the WA input signal are ignored and no transfers take place."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dten::Value1) + self.variant(DTEN_A::VALUE1) } #[doc = "Transfers are enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dten::Value2) + self.variant(DTEN_A::VALUE2) } } #[doc = "Select Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selinv { +pub enum SELINV_A { #[doc = "0: The SELOx outputs have the same polarity as the WA signal."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The SELOx outputs have the inverted polarity to the WA signal."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selinv) -> Self { + fn from(variant: SELINV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELINV` reader - Select Inversion"] -pub type SelinvR = crate::BitReader; -impl SelinvR { +pub type SELINV_R = crate::BitReader; +impl SELINV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selinv { + pub const fn variant(&self) -> SELINV_A { match self.bits { - false => Selinv::Value1, - true => Selinv::Value2, + false => SELINV_A::VALUE1, + true => SELINV_A::VALUE2, } } #[doc = "The SELOx outputs have the same polarity as the WA signal."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selinv::Value1 + *self == SELINV_A::VALUE1 } #[doc = "The SELOx outputs have the inverted polarity to the WA signal."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selinv::Value2 + *self == SELINV_A::VALUE2 } } #[doc = "Field `SELINV` writer - Select Inversion"] -pub type SelinvW<'a, REG> = crate::BitWriter<'a, REG, Selinv>; -impl<'a, REG> SelinvW<'a, REG> +pub type SELINV_W<'a, REG> = crate::BitWriter<'a, REG, SELINV_A>; +impl<'a, REG> SELINV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The SELOx outputs have the same polarity as the WA signal."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selinv::Value1) + self.variant(SELINV_A::VALUE1) } #[doc = "The SELOx outputs have the inverted polarity to the WA signal."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selinv::Value2) + self.variant(SELINV_A::VALUE2) } } #[doc = "WA Falling Edge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wafeien { +pub enum WAFEIEN_A { #[doc = "0: A protocol interrupt is not activated if a falling edge of WA is generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is activated if a falling edge of WA is generated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wafeien) -> Self { + fn from(variant: WAFEIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WAFEIEN` reader - WA Falling Edge Interrupt Enable"] -pub type WafeienR = crate::BitReader; -impl WafeienR { +pub type WAFEIEN_R = crate::BitReader; +impl WAFEIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wafeien { + pub const fn variant(&self) -> WAFEIEN_A { match self.bits { - false => Wafeien::Value1, - true => Wafeien::Value2, + false => WAFEIEN_A::VALUE1, + true => WAFEIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not activated if a falling edge of WA is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wafeien::Value1 + *self == WAFEIEN_A::VALUE1 } #[doc = "A protocol interrupt is activated if a falling edge of WA is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wafeien::Value2 + *self == WAFEIEN_A::VALUE2 } } #[doc = "Field `WAFEIEN` writer - WA Falling Edge Interrupt Enable"] -pub type WafeienW<'a, REG> = crate::BitWriter<'a, REG, Wafeien>; -impl<'a, REG> WafeienW<'a, REG> +pub type WAFEIEN_W<'a, REG> = crate::BitWriter<'a, REG, WAFEIEN_A>; +impl<'a, REG> WAFEIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated if a falling edge of WA is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wafeien::Value1) + self.variant(WAFEIEN_A::VALUE1) } #[doc = "A protocol interrupt is activated if a falling edge of WA is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wafeien::Value2) + self.variant(WAFEIEN_A::VALUE2) } } #[doc = "WA Rising Edge Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wareien { +pub enum WAREIEN_A { #[doc = "0: A protocol interrupt is not activated if a rising edge of WA is generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is activated if a rising edge of WA is generated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wareien) -> Self { + fn from(variant: WAREIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WAREIEN` reader - WA Rising Edge Interrupt Enable"] -pub type WareienR = crate::BitReader; -impl WareienR { +pub type WAREIEN_R = crate::BitReader; +impl WAREIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wareien { + pub const fn variant(&self) -> WAREIEN_A { match self.bits { - false => Wareien::Value1, - true => Wareien::Value2, + false => WAREIEN_A::VALUE1, + true => WAREIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not activated if a rising edge of WA is generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wareien::Value1 + *self == WAREIEN_A::VALUE1 } #[doc = "A protocol interrupt is activated if a rising edge of WA is generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wareien::Value2 + *self == WAREIEN_A::VALUE2 } } #[doc = "Field `WAREIEN` writer - WA Rising Edge Interrupt Enable"] -pub type WareienW<'a, REG> = crate::BitWriter<'a, REG, Wareien>; -impl<'a, REG> WareienW<'a, REG> +pub type WAREIEN_W<'a, REG> = crate::BitWriter<'a, REG, WAREIEN_A>; +impl<'a, REG> WAREIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated if a rising edge of WA is generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wareien::Value1) + self.variant(WAREIEN_A::VALUE1) } #[doc = "A protocol interrupt is activated if a rising edge of WA is generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wareien::Value2) + self.variant(WAREIEN_A::VALUE2) } } #[doc = "END Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Endien { +pub enum ENDIEN_A { #[doc = "0: A protocol interrupt is not activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Endien) -> Self { + fn from(variant: ENDIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENDIEN` reader - END Interrupt Enable"] -pub type EndienR = crate::BitReader; -impl EndienR { +pub type ENDIEN_R = crate::BitReader; +impl ENDIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Endien { + pub const fn variant(&self) -> ENDIEN_A { match self.bits { - false => Endien::Value1, - true => Endien::Value2, + false => ENDIEN_A::VALUE1, + true => ENDIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Endien::Value1 + *self == ENDIEN_A::VALUE1 } #[doc = "A protocol interrupt is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Endien::Value2 + *self == ENDIEN_A::VALUE2 } } #[doc = "Field `ENDIEN` writer - END Interrupt Enable"] -pub type EndienW<'a, REG> = crate::BitWriter<'a, REG, Endien>; -impl<'a, REG> EndienW<'a, REG> +pub type ENDIEN_W<'a, REG> = crate::BitWriter<'a, REG, ENDIEN_A>; +impl<'a, REG> ENDIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Endien::Value1) + self.variant(ENDIEN_A::VALUE1) } #[doc = "A protocol interrupt is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Endien::Value2) + self.variant(ENDIEN_A::VALUE2) } } #[doc = "DX2T Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2tien { +pub enum DX2TIEN_A { #[doc = "0: A protocol interrupt is not generated if DX2T is active."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is generated if DX2T is active."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2tien) -> Self { + fn from(variant: DX2TIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] -pub type Dx2tienR = crate::BitReader; -impl Dx2tienR { +pub type DX2TIEN_R = crate::BitReader; +impl DX2TIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2tien { + pub const fn variant(&self) -> DX2TIEN_A { match self.bits { - false => Dx2tien::Value1, - true => Dx2tien::Value2, + false => DX2TIEN_A::VALUE1, + true => DX2TIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not generated if DX2T is active."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2tien::Value1 + *self == DX2TIEN_A::VALUE1 } #[doc = "A protocol interrupt is generated if DX2T is active."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2tien::Value2 + *self == DX2TIEN_A::VALUE2 } } #[doc = "Field `DX2TIEN` writer - DX2T Interrupt Enable"] -pub type Dx2tienW<'a, REG> = crate::BitWriter<'a, REG, Dx2tien>; -impl<'a, REG> Dx2tienW<'a, REG> +pub type DX2TIEN_W<'a, REG> = crate::BitWriter<'a, REG, DX2TIEN_A>; +impl<'a, REG> DX2TIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if DX2T is active."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2tien::Value1) + self.variant(DX2TIEN_A::VALUE1) } #[doc = "A protocol interrupt is generated if DX2T is active."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2tien::Value2) + self.variant(DX2TIEN_A::VALUE2) } } #[doc = "Field `TDEL` reader - Transfer Delay"] -pub type TdelR = crate::FieldReader; +pub type TDEL_R = crate::FieldReader; #[doc = "Field `TDEL` writer - Transfer Delay"] -pub type TdelW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type TDEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mclk { +pub enum MCLK_A { #[doc = "0: The MCLK generation is disabled and MCLK is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MCLK generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mclk) -> Self { + fn from(variant: MCLK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MclkR = crate::BitReader; -impl MclkR { +pub type MCLK_R = crate::BitReader; +impl MCLK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mclk { + pub const fn variant(&self) -> MCLK_A { match self.bits { - false => Mclk::Value1, - true => Mclk::Value2, + false => MCLK_A::VALUE1, + true => MCLK_A::VALUE2, } } #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mclk::Value1 + *self == MCLK_A::VALUE1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mclk::Value2 + *self == MCLK_A::VALUE2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; -impl<'a, REG> MclkW<'a, REG> +pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; +impl<'a, REG> MCLK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and MCLK is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mclk::Value1) + self.variant(MCLK_A::VALUE1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mclk::Value2) + self.variant(MCLK_A::VALUE2) } } impl R { #[doc = "Bit 0 - WA Generation Enable"] #[inline(always)] - pub fn wagen(&self) -> WagenR { - WagenR::new((self.bits & 1) != 0) + pub fn wagen(&self) -> WAGEN_R { + WAGEN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Data Transfers Enable"] #[inline(always)] - pub fn dten(&self) -> DtenR { - DtenR::new(((self.bits >> 1) & 1) != 0) + pub fn dten(&self) -> DTEN_R { + DTEN_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - pub fn selinv(&self) -> SelinvR { - SelinvR::new(((self.bits >> 2) & 1) != 0) + pub fn selinv(&self) -> SELINV_R { + SELINV_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"] #[inline(always)] - pub fn wafeien(&self) -> WafeienR { - WafeienR::new(((self.bits >> 4) & 1) != 0) + pub fn wafeien(&self) -> WAFEIEN_R { + WAFEIEN_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"] #[inline(always)] - pub fn wareien(&self) -> WareienR { - WareienR::new(((self.bits >> 5) & 1) != 0) + pub fn wareien(&self) -> WAREIEN_R { + WAREIEN_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - END Interrupt Enable"] #[inline(always)] - pub fn endien(&self) -> EndienR { - EndienR::new(((self.bits >> 6) & 1) != 0) + pub fn endien(&self) -> ENDIEN_R { + ENDIEN_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - pub fn dx2tien(&self) -> Dx2tienR { - Dx2tienR::new(((self.bits >> 15) & 1) != 0) + pub fn dx2tien(&self) -> DX2TIEN_R { + DX2TIEN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:21 - Transfer Delay"] #[inline(always)] - pub fn tdel(&self) -> TdelR { - TdelR::new(((self.bits >> 16) & 0x3f) as u8) + pub fn tdel(&self) -> TDEL_R { + TDEL_R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MclkR { - MclkR::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MCLK_R { + MCLK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - WA Generation Enable"] #[inline(always)] #[must_use] - pub fn wagen(&mut self) -> WagenW { - WagenW::new(self, 0) + pub fn wagen(&mut self) -> WAGEN_W { + WAGEN_W::new(self, 0) } #[doc = "Bit 1 - Data Transfers Enable"] #[inline(always)] #[must_use] - pub fn dten(&mut self) -> DtenW { - DtenW::new(self, 1) + pub fn dten(&mut self) -> DTEN_W { + DTEN_W::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] #[must_use] - pub fn selinv(&mut self) -> SelinvW { - SelinvW::new(self, 2) + pub fn selinv(&mut self) -> SELINV_W { + SELINV_W::new(self, 2) } #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn wafeien(&mut self) -> WafeienW { - WafeienW::new(self, 4) + pub fn wafeien(&mut self) -> WAFEIEN_W { + WAFEIEN_W::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"] #[inline(always)] #[must_use] - pub fn wareien(&mut self) -> WareienW { - WareienW::new(self, 5) + pub fn wareien(&mut self) -> WAREIEN_W { + WAREIEN_W::new(self, 5) } #[doc = "Bit 6 - END Interrupt Enable"] #[inline(always)] #[must_use] - pub fn endien(&mut self) -> EndienW { - EndienW::new(self, 6) + pub fn endien(&mut self) -> ENDIEN_W { + ENDIEN_W::new(self, 6) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dx2tien(&mut self) -> Dx2tienW { - Dx2tienW::new(self, 15) + pub fn dx2tien(&mut self) -> DX2TIEN_W { + DX2TIEN_W::new(self, 15) } #[doc = "Bits 16:21 - Transfer Delay"] #[inline(always)] #[must_use] - pub fn tdel(&mut self) -> TdelW { - TdelW::new(self, 16) + pub fn tdel(&mut self) -> TDEL_W { + TDEL_W::new(self, 16) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MclkW { - MclkW::new(self, 31) + pub fn mclk(&mut self) -> MCLK_W { + MCLK_W::new(self, 31) } } #[doc = "Protocol Control Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcrIismodeSpec; -impl crate::RegisterSpec for PcrIismodeSpec { +pub struct PCR_IISMODE_SPEC; +impl crate::RegisterSpec for PCR_IISMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcr_iismode::R`](R) reader structure"] -impl crate::Readable for PcrIismodeSpec {} +impl crate::Readable for PCR_IISMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcr_iismode::W`](W) writer structure"] -impl crate::Writable for PcrIismodeSpec { +impl crate::Writable for PCR_IISMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_IISMode to value 0"] -impl crate::Resettable for PcrIismodeSpec { +impl crate::Resettable for PCR_IISMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pcr_sscmode.rs b/src/usic0_ch0/pcr_sscmode.rs index 80746150..a6fdfe4d 100644 --- a/src/usic0_ch0/pcr_sscmode.rs +++ b/src/usic0_ch0/pcr_sscmode.rs @@ -1,280 +1,280 @@ #[doc = "Register `PCR_SSCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PCR_SSCMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "MSLS Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mslsen { +pub enum MSLSEN_A { #[doc = "0: The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MSLS generation is enabled. This is the setting for SSC master mode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mslsen) -> Self { + fn from(variant: MSLSEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSLSEN` reader - MSLS Enable"] -pub type MslsenR = crate::BitReader; -impl MslsenR { +pub type MSLSEN_R = crate::BitReader; +impl MSLSEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mslsen { + pub const fn variant(&self) -> MSLSEN_A { match self.bits { - false => Mslsen::Value1, - true => Mslsen::Value2, + false => MSLSEN_A::VALUE1, + true => MSLSEN_A::VALUE2, } } #[doc = "The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mslsen::Value1 + *self == MSLSEN_A::VALUE1 } #[doc = "The MSLS generation is enabled. This is the setting for SSC master mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mslsen::Value2 + *self == MSLSEN_A::VALUE2 } } #[doc = "Field `MSLSEN` writer - MSLS Enable"] -pub type MslsenW<'a, REG> = crate::BitWriter<'a, REG, Mslsen>; -impl<'a, REG> MslsenW<'a, REG> +pub type MSLSEN_W<'a, REG> = crate::BitWriter<'a, REG, MSLSEN_A>; +impl<'a, REG> MSLSEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MSLS generation is disabled (MSLS = 0). This is the setting for SSC slave mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mslsen::Value1) + self.variant(MSLSEN_A::VALUE1) } #[doc = "The MSLS generation is enabled. This is the setting for SSC master mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mslsen::Value2) + self.variant(MSLSEN_A::VALUE2) } } #[doc = "Select Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selctr { +pub enum SELCTR_A { #[doc = "0: The coded select mode is enabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The direct select mode is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selctr) -> Self { + fn from(variant: SELCTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELCTR` reader - Select Control"] -pub type SelctrR = crate::BitReader; -impl SelctrR { +pub type SELCTR_R = crate::BitReader; +impl SELCTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selctr { + pub const fn variant(&self) -> SELCTR_A { match self.bits { - false => Selctr::Value1, - true => Selctr::Value2, + false => SELCTR_A::VALUE1, + true => SELCTR_A::VALUE2, } } #[doc = "The coded select mode is enabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selctr::Value1 + *self == SELCTR_A::VALUE1 } #[doc = "The direct select mode is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selctr::Value2 + *self == SELCTR_A::VALUE2 } } #[doc = "Field `SELCTR` writer - Select Control"] -pub type SelctrW<'a, REG> = crate::BitWriter<'a, REG, Selctr>; -impl<'a, REG> SelctrW<'a, REG> +pub type SELCTR_W<'a, REG> = crate::BitWriter<'a, REG, SELCTR_A>; +impl<'a, REG> SELCTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The coded select mode is enabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selctr::Value1) + self.variant(SELCTR_A::VALUE1) } #[doc = "The direct select mode is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selctr::Value2) + self.variant(SELCTR_A::VALUE2) } } #[doc = "Select Inversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selinv { +pub enum SELINV_A { #[doc = "0: The SELO outputs have the same polarity as the MSLS signal (active high)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The SELO outputs have the inverted polarity to the MSLS signal (active low)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selinv) -> Self { + fn from(variant: SELINV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELINV` reader - Select Inversion"] -pub type SelinvR = crate::BitReader; -impl SelinvR { +pub type SELINV_R = crate::BitReader; +impl SELINV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selinv { + pub const fn variant(&self) -> SELINV_A { match self.bits { - false => Selinv::Value1, - true => Selinv::Value2, + false => SELINV_A::VALUE1, + true => SELINV_A::VALUE2, } } #[doc = "The SELO outputs have the same polarity as the MSLS signal (active high)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selinv::Value1 + *self == SELINV_A::VALUE1 } #[doc = "The SELO outputs have the inverted polarity to the MSLS signal (active low)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selinv::Value2 + *self == SELINV_A::VALUE2 } } #[doc = "Field `SELINV` writer - Select Inversion"] -pub type SelinvW<'a, REG> = crate::BitWriter<'a, REG, Selinv>; -impl<'a, REG> SelinvW<'a, REG> +pub type SELINV_W<'a, REG> = crate::BitWriter<'a, REG, SELINV_A>; +impl<'a, REG> SELINV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The SELO outputs have the same polarity as the MSLS signal (active high)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selinv::Value1) + self.variant(SELINV_A::VALUE1) } #[doc = "The SELO outputs have the inverted polarity to the MSLS signal (active low)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selinv::Value2) + self.variant(SELINV_A::VALUE2) } } #[doc = "Frame End Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fem { +pub enum FEM_A { #[doc = "0: The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fem) -> Self { + fn from(variant: FEM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FEM` reader - Frame End Mode"] -pub type FemR = crate::BitReader; -impl FemR { +pub type FEM_R = crate::BitReader; +impl FEM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fem { + pub const fn variant(&self) -> FEM_A { match self.bits { - false => Fem::Value1, - true => Fem::Value2, + false => FEM_A::VALUE1, + true => FEM_A::VALUE2, } } #[doc = "The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fem::Value1 + *self == FEM_A::VALUE1 } #[doc = "The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fem::Value2 + *self == FEM_A::VALUE2 } } #[doc = "Field `FEM` writer - Frame End Mode"] -pub type FemW<'a, REG> = crate::BitWriter<'a, REG, Fem>; -impl<'a, REG> FemW<'a, REG> +pub type FEM_W<'a, REG> = crate::BitWriter<'a, REG, FEM_A>; +impl<'a, REG> FEM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The current data frame is considered as finished when the last bit of a data word has been sent out and the transmit buffer TBUF does not contain new data (TDV = 0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fem::Value1) + self.variant(FEM_A::VALUE1) } #[doc = "The MSLS signal is kept active also while no new data is available and no other end of frame condition is reached. In this case, the software can accept delays in delivering the data without automatic deactivation of MSLS in multi-word data frames."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fem::Value2) + self.variant(FEM_A::VALUE2) } } #[doc = "Input Frequency Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Ctqsel1 { +pub enum CTQSEL1_A { #[doc = "0: fCTQIN = fPDIV"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fCTQIN = fPPP"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fCTQIN = fSCLK"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: fCTQIN = fMCLK"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Ctqsel1) -> Self { + fn from(variant: CTQSEL1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Ctqsel1 { +impl crate::FieldSpec for CTQSEL1_A { type Ux = u8; } -impl crate::IsEnum for Ctqsel1 {} +impl crate::IsEnum for CTQSEL1_A {} #[doc = "Field `CTQSEL1` reader - Input Frequency Selection"] -pub type Ctqsel1R = crate::FieldReader; -impl Ctqsel1R { +pub type CTQSEL1_R = crate::FieldReader; +impl CTQSEL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ctqsel1 { + pub const fn variant(&self) -> CTQSEL1_A { match self.bits { - 0 => Ctqsel1::Value1, - 1 => Ctqsel1::Value2, - 2 => Ctqsel1::Value3, - 3 => Ctqsel1::Value4, + 0 => CTQSEL1_A::VALUE1, + 1 => CTQSEL1_A::VALUE2, + 2 => CTQSEL1_A::VALUE3, + 3 => CTQSEL1_A::VALUE4, _ => unreachable!(), } } #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ctqsel1::Value1 + *self == CTQSEL1_A::VALUE1 } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ctqsel1::Value2 + *self == CTQSEL1_A::VALUE2 } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Ctqsel1::Value3 + *self == CTQSEL1_A::VALUE3 } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Ctqsel1::Value4 + *self == CTQSEL1_A::VALUE4 } } #[doc = "Field `CTQSEL1` writer - Input Frequency Selection"] -pub type Ctqsel1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Ctqsel1, crate::Safe>; -impl<'a, REG> Ctqsel1W<'a, REG> +pub type CTQSEL1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CTQSEL1_A, crate::Safe>; +impl<'a, REG> CTQSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -282,236 +282,236 @@ where #[doc = "fCTQIN = fPDIV"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctqsel1::Value1) + self.variant(CTQSEL1_A::VALUE1) } #[doc = "fCTQIN = fPPP"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctqsel1::Value2) + self.variant(CTQSEL1_A::VALUE2) } #[doc = "fCTQIN = fSCLK"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Ctqsel1::Value3) + self.variant(CTQSEL1_A::VALUE3) } #[doc = "fCTQIN = fMCLK"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Ctqsel1::Value4) + self.variant(CTQSEL1_A::VALUE4) } } #[doc = "Field `PCTQ1` reader - Divider Factor PCTQ1 for Tiw and Tnf"] -pub type Pctq1R = crate::FieldReader; +pub type PCTQ1_R = crate::FieldReader; #[doc = "Field `PCTQ1` writer - Divider Factor PCTQ1 for Tiw and Tnf"] -pub type Pctq1W<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type PCTQ1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Field `DCTQ1` reader - Divider Factor DCTQ1 for Tiw and Tnf"] -pub type Dctq1R = crate::FieldReader; +pub type DCTQ1_R = crate::FieldReader; #[doc = "Field `DCTQ1` writer - Divider Factor DCTQ1 for Tiw and Tnf"] -pub type Dctq1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type DCTQ1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Parity Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Parien { +pub enum PARIEN_A { #[doc = "0: A protocol interrupt is not generated with the detection of a parity error."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is generated with the detection of a parity error."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Parien) -> Self { + fn from(variant: PARIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PARIEN` reader - Parity Error Interrupt Enable"] -pub type ParienR = crate::BitReader; -impl ParienR { +pub type PARIEN_R = crate::BitReader; +impl PARIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Parien { + pub const fn variant(&self) -> PARIEN_A { match self.bits { - false => Parien::Value1, - true => Parien::Value2, + false => PARIEN_A::VALUE1, + true => PARIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not generated with the detection of a parity error."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Parien::Value1 + *self == PARIEN_A::VALUE1 } #[doc = "A protocol interrupt is generated with the detection of a parity error."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Parien::Value2 + *self == PARIEN_A::VALUE2 } } #[doc = "Field `PARIEN` writer - Parity Error Interrupt Enable"] -pub type ParienW<'a, REG> = crate::BitWriter<'a, REG, Parien>; -impl<'a, REG> ParienW<'a, REG> +pub type PARIEN_W<'a, REG> = crate::BitWriter<'a, REG, PARIEN_A>; +impl<'a, REG> PARIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated with the detection of a parity error."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Parien::Value1) + self.variant(PARIEN_A::VALUE1) } #[doc = "A protocol interrupt is generated with the detection of a parity error."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Parien::Value2) + self.variant(PARIEN_A::VALUE2) } } #[doc = "MSLS Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mslsien { +pub enum MSLSIEN_A { #[doc = "0: A protocol interrupt is not generated if a change of signal MSLS is detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is generated if a change of signal MSLS is detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mslsien) -> Self { + fn from(variant: MSLSIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSLSIEN` reader - MSLS Interrupt Enable"] -pub type MslsienR = crate::BitReader; -impl MslsienR { +pub type MSLSIEN_R = crate::BitReader; +impl MSLSIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mslsien { + pub const fn variant(&self) -> MSLSIEN_A { match self.bits { - false => Mslsien::Value1, - true => Mslsien::Value2, + false => MSLSIEN_A::VALUE1, + true => MSLSIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not generated if a change of signal MSLS is detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mslsien::Value1 + *self == MSLSIEN_A::VALUE1 } #[doc = "A protocol interrupt is generated if a change of signal MSLS is detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mslsien::Value2 + *self == MSLSIEN_A::VALUE2 } } #[doc = "Field `MSLSIEN` writer - MSLS Interrupt Enable"] -pub type MslsienW<'a, REG> = crate::BitWriter<'a, REG, Mslsien>; -impl<'a, REG> MslsienW<'a, REG> +pub type MSLSIEN_W<'a, REG> = crate::BitWriter<'a, REG, MSLSIEN_A>; +impl<'a, REG> MSLSIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if a change of signal MSLS is detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mslsien::Value1) + self.variant(MSLSIEN_A::VALUE1) } #[doc = "A protocol interrupt is generated if a change of signal MSLS is detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mslsien::Value2) + self.variant(MSLSIEN_A::VALUE2) } } #[doc = "DX2T Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2tien { +pub enum DX2TIEN_A { #[doc = "0: A protocol interrupt is not generated if DX2T is activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A protocol interrupt is generated if DX2T is activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2tien) -> Self { + fn from(variant: DX2TIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2TIEN` reader - DX2T Interrupt Enable"] -pub type Dx2tienR = crate::BitReader; -impl Dx2tienR { +pub type DX2TIEN_R = crate::BitReader; +impl DX2TIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2tien { + pub const fn variant(&self) -> DX2TIEN_A { match self.bits { - false => Dx2tien::Value1, - true => Dx2tien::Value2, + false => DX2TIEN_A::VALUE1, + true => DX2TIEN_A::VALUE2, } } #[doc = "A protocol interrupt is not generated if DX2T is activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2tien::Value1 + *self == DX2TIEN_A::VALUE1 } #[doc = "A protocol interrupt is generated if DX2T is activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2tien::Value2 + *self == DX2TIEN_A::VALUE2 } } #[doc = "Field `DX2TIEN` writer - DX2T Interrupt Enable"] -pub type Dx2tienW<'a, REG> = crate::BitWriter<'a, REG, Dx2tien>; -impl<'a, REG> Dx2tienW<'a, REG> +pub type DX2TIEN_W<'a, REG> = crate::BitWriter<'a, REG, DX2TIEN_A>; +impl<'a, REG> DX2TIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A protocol interrupt is not generated if DX2T is activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2tien::Value1) + self.variant(DX2TIEN_A::VALUE1) } #[doc = "A protocol interrupt is generated if DX2T is activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2tien::Value2) + self.variant(DX2TIEN_A::VALUE2) } } #[doc = "Select Output\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Selo { +pub enum SELO_A { #[doc = "0: The corresponding SELOx line cannot be activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Selo) -> Self { + fn from(variant: SELO_A) -> Self { variant as _ } } -impl crate::FieldSpec for Selo { +impl crate::FieldSpec for SELO_A { type Ux = u8; } -impl crate::IsEnum for Selo {} +impl crate::IsEnum for SELO_A {} #[doc = "Field `SELO` reader - Select Output"] -pub type SeloR = crate::FieldReader; -impl SeloR { +pub type SELO_R = crate::FieldReader; +impl SELO_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Selo::Value1), - 1 => Some(Selo::Value2), + 0 => Some(SELO_A::VALUE1), + 1 => Some(SELO_A::VALUE2), _ => None, } } #[doc = "The corresponding SELOx line cannot be activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selo::Value1 + *self == SELO_A::VALUE1 } #[doc = "The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selo::Value2 + *self == SELO_A::VALUE2 } } #[doc = "Field `SELO` writer - Select Output"] -pub type SeloW<'a, REG> = crate::FieldWriter<'a, REG, 8, Selo>; -impl<'a, REG> SeloW<'a, REG> +pub type SELO_W<'a, REG> = crate::FieldWriter<'a, REG, 8, SELO_A>; +impl<'a, REG> SELO_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -519,345 +519,345 @@ where #[doc = "The corresponding SELOx line cannot be activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selo::Value1) + self.variant(SELO_A::VALUE1) } #[doc = "The corresponding SELOx line can be activated (according to the mode selected by SELCTR)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selo::Value2) + self.variant(SELO_A::VALUE2) } } #[doc = "Enable Inter-Word Delay Tiw\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tiwen { +pub enum TIWEN_A { #[doc = "0: No delay between data words of the same frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The inter-word delay Tiw is enabled and introduced between data words of the same frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tiwen) -> Self { + fn from(variant: TIWEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TIWEN` reader - Enable Inter-Word Delay Tiw"] -pub type TiwenR = crate::BitReader; -impl TiwenR { +pub type TIWEN_R = crate::BitReader; +impl TIWEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tiwen { + pub const fn variant(&self) -> TIWEN_A { match self.bits { - false => Tiwen::Value1, - true => Tiwen::Value2, + false => TIWEN_A::VALUE1, + true => TIWEN_A::VALUE2, } } #[doc = "No delay between data words of the same frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tiwen::Value1 + *self == TIWEN_A::VALUE1 } #[doc = "The inter-word delay Tiw is enabled and introduced between data words of the same frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tiwen::Value2 + *self == TIWEN_A::VALUE2 } } #[doc = "Field `TIWEN` writer - Enable Inter-Word Delay Tiw"] -pub type TiwenW<'a, REG> = crate::BitWriter<'a, REG, Tiwen>; -impl<'a, REG> TiwenW<'a, REG> +pub type TIWEN_W<'a, REG> = crate::BitWriter<'a, REG, TIWEN_A>; +impl<'a, REG> TIWEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No delay between data words of the same frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tiwen::Value1) + self.variant(TIWEN_A::VALUE1) } #[doc = "The inter-word delay Tiw is enabled and introduced between data words of the same frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tiwen::Value2) + self.variant(TIWEN_A::VALUE2) } } #[doc = "Slave Mode Clock Phase Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Slphsel { +pub enum SLPHSEL_A { #[doc = "0: Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Slphsel) -> Self { + fn from(variant: SLPHSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLPHSEL` reader - Slave Mode Clock Phase Select"] -pub type SlphselR = crate::BitReader; -impl SlphselR { +pub type SLPHSEL_R = crate::BitReader; +impl SLPHSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Slphsel { + pub const fn variant(&self) -> SLPHSEL_A { match self.bits { - false => Slphsel::Value1, - true => Slphsel::Value2, + false => SLPHSEL_A::VALUE1, + true => SLPHSEL_A::VALUE2, } } #[doc = "Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Slphsel::Value1 + *self == SLPHSEL_A::VALUE1 } #[doc = "The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Slphsel::Value2 + *self == SLPHSEL_A::VALUE2 } } #[doc = "Field `SLPHSEL` writer - Slave Mode Clock Phase Select"] -pub type SlphselW<'a, REG> = crate::BitWriter<'a, REG, Slphsel>; -impl<'a, REG> SlphselW<'a, REG> +pub type SLPHSEL_W<'a, REG> = crate::BitWriter<'a, REG, SLPHSEL_A>; +impl<'a, REG> SLPHSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Data bits are shifted out with the leading edge of the shift clock signal and latched in with the trailing edge."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Slphsel::Value1) + self.variant(SLPHSEL_A::VALUE1) } #[doc = "The first data bit is shifted out when the data shift unit receives a low to high transition from the DX2 stage. Subsequent bits are shifted out with the trailing edge of the shift clock signal. Data bits are always latched in with the leading edge."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Slphsel::Value2) + self.variant(SLPHSEL_A::VALUE2) } } #[doc = "Master Clock Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mclk { +pub enum MCLK_A { #[doc = "0: The MCLK generation is disabled and output MCLK = 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MCLK generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mclk) -> Self { + fn from(variant: MCLK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MCLK` reader - Master Clock Enable"] -pub type MclkR = crate::BitReader; -impl MclkR { +pub type MCLK_R = crate::BitReader; +impl MCLK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mclk { + pub const fn variant(&self) -> MCLK_A { match self.bits { - false => Mclk::Value1, - true => Mclk::Value2, + false => MCLK_A::VALUE1, + true => MCLK_A::VALUE2, } } #[doc = "The MCLK generation is disabled and output MCLK = 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mclk::Value1 + *self == MCLK_A::VALUE1 } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mclk::Value2 + *self == MCLK_A::VALUE2 } } #[doc = "Field `MCLK` writer - Master Clock Enable"] -pub type MclkW<'a, REG> = crate::BitWriter<'a, REG, Mclk>; -impl<'a, REG> MclkW<'a, REG> +pub type MCLK_W<'a, REG> = crate::BitWriter<'a, REG, MCLK_A>; +impl<'a, REG> MCLK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MCLK generation is disabled and output MCLK = 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mclk::Value1) + self.variant(MCLK_A::VALUE1) } #[doc = "The MCLK generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mclk::Value2) + self.variant(MCLK_A::VALUE2) } } impl R { #[doc = "Bit 0 - MSLS Enable"] #[inline(always)] - pub fn mslsen(&self) -> MslsenR { - MslsenR::new((self.bits & 1) != 0) + pub fn mslsen(&self) -> MSLSEN_R { + MSLSEN_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Control"] #[inline(always)] - pub fn selctr(&self) -> SelctrR { - SelctrR::new(((self.bits >> 1) & 1) != 0) + pub fn selctr(&self) -> SELCTR_R { + SELCTR_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - pub fn selinv(&self) -> SelinvR { - SelinvR::new(((self.bits >> 2) & 1) != 0) + pub fn selinv(&self) -> SELINV_R { + SELINV_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Frame End Mode"] #[inline(always)] - pub fn fem(&self) -> FemR { - FemR::new(((self.bits >> 3) & 1) != 0) + pub fn fem(&self) -> FEM_R { + FEM_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Input Frequency Selection"] #[inline(always)] - pub fn ctqsel1(&self) -> Ctqsel1R { - Ctqsel1R::new(((self.bits >> 4) & 3) as u8) + pub fn ctqsel1(&self) -> CTQSEL1_R { + CTQSEL1_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"] #[inline(always)] - pub fn pctq1(&self) -> Pctq1R { - Pctq1R::new(((self.bits >> 6) & 3) as u8) + pub fn pctq1(&self) -> PCTQ1_R { + PCTQ1_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"] #[inline(always)] - pub fn dctq1(&self) -> Dctq1R { - Dctq1R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn dctq1(&self) -> DCTQ1_R { + DCTQ1_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bit 13 - Parity Error Interrupt Enable"] #[inline(always)] - pub fn parien(&self) -> ParienR { - ParienR::new(((self.bits >> 13) & 1) != 0) + pub fn parien(&self) -> PARIEN_R { + PARIEN_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - MSLS Interrupt Enable"] #[inline(always)] - pub fn mslsien(&self) -> MslsienR { - MslsienR::new(((self.bits >> 14) & 1) != 0) + pub fn mslsien(&self) -> MSLSIEN_R { + MSLSIEN_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - pub fn dx2tien(&self) -> Dx2tienR { - Dx2tienR::new(((self.bits >> 15) & 1) != 0) + pub fn dx2tien(&self) -> DX2TIEN_R { + DX2TIEN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:23 - Select Output"] #[inline(always)] - pub fn selo(&self) -> SeloR { - SeloR::new(((self.bits >> 16) & 0xff) as u8) + pub fn selo(&self) -> SELO_R { + SELO_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"] #[inline(always)] - pub fn tiwen(&self) -> TiwenR { - TiwenR::new(((self.bits >> 24) & 1) != 0) + pub fn tiwen(&self) -> TIWEN_R { + TIWEN_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Slave Mode Clock Phase Select"] #[inline(always)] - pub fn slphsel(&self) -> SlphselR { - SlphselR::new(((self.bits >> 25) & 1) != 0) + pub fn slphsel(&self) -> SLPHSEL_R { + SLPHSEL_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - pub fn mclk(&self) -> MclkR { - MclkR::new(((self.bits >> 31) & 1) != 0) + pub fn mclk(&self) -> MCLK_R { + MCLK_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bit 0 - MSLS Enable"] #[inline(always)] #[must_use] - pub fn mslsen(&mut self) -> MslsenW { - MslsenW::new(self, 0) + pub fn mslsen(&mut self) -> MSLSEN_W { + MSLSEN_W::new(self, 0) } #[doc = "Bit 1 - Select Control"] #[inline(always)] #[must_use] - pub fn selctr(&mut self) -> SelctrW { - SelctrW::new(self, 1) + pub fn selctr(&mut self) -> SELCTR_W { + SELCTR_W::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] #[must_use] - pub fn selinv(&mut self) -> SelinvW { - SelinvW::new(self, 2) + pub fn selinv(&mut self) -> SELINV_W { + SELINV_W::new(self, 2) } #[doc = "Bit 3 - Frame End Mode"] #[inline(always)] #[must_use] - pub fn fem(&mut self) -> FemW { - FemW::new(self, 3) + pub fn fem(&mut self) -> FEM_W { + FEM_W::new(self, 3) } #[doc = "Bits 4:5 - Input Frequency Selection"] #[inline(always)] #[must_use] - pub fn ctqsel1(&mut self) -> Ctqsel1W { - Ctqsel1W::new(self, 4) + pub fn ctqsel1(&mut self) -> CTQSEL1_W { + CTQSEL1_W::new(self, 4) } #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"] #[inline(always)] #[must_use] - pub fn pctq1(&mut self) -> Pctq1W { - Pctq1W::new(self, 6) + pub fn pctq1(&mut self) -> PCTQ1_W { + PCTQ1_W::new(self, 6) } #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"] #[inline(always)] #[must_use] - pub fn dctq1(&mut self) -> Dctq1W { - Dctq1W::new(self, 8) + pub fn dctq1(&mut self) -> DCTQ1_W { + DCTQ1_W::new(self, 8) } #[doc = "Bit 13 - Parity Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn parien(&mut self) -> ParienW { - ParienW::new(self, 13) + pub fn parien(&mut self) -> PARIEN_W { + PARIEN_W::new(self, 13) } #[doc = "Bit 14 - MSLS Interrupt Enable"] #[inline(always)] #[must_use] - pub fn mslsien(&mut self) -> MslsienW { - MslsienW::new(self, 14) + pub fn mslsien(&mut self) -> MSLSIEN_W { + MSLSIEN_W::new(self, 14) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] #[must_use] - pub fn dx2tien(&mut self) -> Dx2tienW { - Dx2tienW::new(self, 15) + pub fn dx2tien(&mut self) -> DX2TIEN_W { + DX2TIEN_W::new(self, 15) } #[doc = "Bits 16:23 - Select Output"] #[inline(always)] #[must_use] - pub fn selo(&mut self) -> SeloW { - SeloW::new(self, 16) + pub fn selo(&mut self) -> SELO_W { + SELO_W::new(self, 16) } #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"] #[inline(always)] #[must_use] - pub fn tiwen(&mut self) -> TiwenW { - TiwenW::new(self, 24) + pub fn tiwen(&mut self) -> TIWEN_W { + TIWEN_W::new(self, 24) } #[doc = "Bit 25 - Slave Mode Clock Phase Select"] #[inline(always)] #[must_use] - pub fn slphsel(&mut self) -> SlphselW { - SlphselW::new(self, 25) + pub fn slphsel(&mut self) -> SLPHSEL_W { + SLPHSEL_W::new(self, 25) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] #[must_use] - pub fn mclk(&mut self) -> MclkW { - MclkW::new(self, 31) + pub fn mclk(&mut self) -> MCLK_W { + MCLK_W::new(self, 31) } } #[doc = "Protocol Control Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PcrSscmodeSpec; -impl crate::RegisterSpec for PcrSscmodeSpec { +pub struct PCR_SSCMODE_SPEC; +impl crate::RegisterSpec for PCR_SSCMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`pcr_sscmode::R`](R) reader structure"] -impl crate::Readable for PcrSscmodeSpec {} +impl crate::Readable for PCR_SSCMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`pcr_sscmode::W`](W) writer structure"] -impl crate::Writable for PcrSscmodeSpec { +impl crate::Writable for PCR_SSCMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PCR_SSCMode to value 0"] -impl crate::Resettable for PcrSscmodeSpec { +impl crate::Resettable for PCR_SSCMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/pscr.rs b/src/usic0_ch0/pscr.rs index 97a43679..0be6845c 100644 --- a/src/usic0_ch0/pscr.rs +++ b/src/usic0_ch0/pscr.rs @@ -1,648 +1,648 @@ #[doc = "Register `PSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Status Flag 0 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst0 { +pub enum CST0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst0) -> Self { + fn from(variant: CST0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST0` writer - Clear Status Flag 0 in PSR"] -pub type Cst0W<'a, REG> = crate::BitWriter<'a, REG, Cst0>; -impl<'a, REG> Cst0W<'a, REG> +pub type CST0_W<'a, REG> = crate::BitWriter<'a, REG, CST0_A>; +impl<'a, REG> CST0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst0::Value1) + self.variant(CST0_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst0::Value2) + self.variant(CST0_A::VALUE2) } } #[doc = "Clear Status Flag 1 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst1 { +pub enum CST1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst1) -> Self { + fn from(variant: CST1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST1` writer - Clear Status Flag 1 in PSR"] -pub type Cst1W<'a, REG> = crate::BitWriter<'a, REG, Cst1>; -impl<'a, REG> Cst1W<'a, REG> +pub type CST1_W<'a, REG> = crate::BitWriter<'a, REG, CST1_A>; +impl<'a, REG> CST1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst1::Value1) + self.variant(CST1_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst1::Value2) + self.variant(CST1_A::VALUE2) } } #[doc = "Clear Status Flag 2 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst2 { +pub enum CST2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst2) -> Self { + fn from(variant: CST2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST2` writer - Clear Status Flag 2 in PSR"] -pub type Cst2W<'a, REG> = crate::BitWriter<'a, REG, Cst2>; -impl<'a, REG> Cst2W<'a, REG> +pub type CST2_W<'a, REG> = crate::BitWriter<'a, REG, CST2_A>; +impl<'a, REG> CST2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst2::Value1) + self.variant(CST2_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst2::Value2) + self.variant(CST2_A::VALUE2) } } #[doc = "Clear Status Flag 3 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst3 { +pub enum CST3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst3) -> Self { + fn from(variant: CST3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST3` writer - Clear Status Flag 3 in PSR"] -pub type Cst3W<'a, REG> = crate::BitWriter<'a, REG, Cst3>; -impl<'a, REG> Cst3W<'a, REG> +pub type CST3_W<'a, REG> = crate::BitWriter<'a, REG, CST3_A>; +impl<'a, REG> CST3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst3::Value1) + self.variant(CST3_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst3::Value2) + self.variant(CST3_A::VALUE2) } } #[doc = "Clear Status Flag 4 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst4 { +pub enum CST4_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst4) -> Self { + fn from(variant: CST4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST4` writer - Clear Status Flag 4 in PSR"] -pub type Cst4W<'a, REG> = crate::BitWriter<'a, REG, Cst4>; -impl<'a, REG> Cst4W<'a, REG> +pub type CST4_W<'a, REG> = crate::BitWriter<'a, REG, CST4_A>; +impl<'a, REG> CST4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst4::Value1) + self.variant(CST4_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst4::Value2) + self.variant(CST4_A::VALUE2) } } #[doc = "Clear Status Flag 5 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst5 { +pub enum CST5_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst5) -> Self { + fn from(variant: CST5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST5` writer - Clear Status Flag 5 in PSR"] -pub type Cst5W<'a, REG> = crate::BitWriter<'a, REG, Cst5>; -impl<'a, REG> Cst5W<'a, REG> +pub type CST5_W<'a, REG> = crate::BitWriter<'a, REG, CST5_A>; +impl<'a, REG> CST5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst5::Value1) + self.variant(CST5_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst5::Value2) + self.variant(CST5_A::VALUE2) } } #[doc = "Clear Status Flag 6 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst6 { +pub enum CST6_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst6) -> Self { + fn from(variant: CST6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST6` writer - Clear Status Flag 6 in PSR"] -pub type Cst6W<'a, REG> = crate::BitWriter<'a, REG, Cst6>; -impl<'a, REG> Cst6W<'a, REG> +pub type CST6_W<'a, REG> = crate::BitWriter<'a, REG, CST6_A>; +impl<'a, REG> CST6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst6::Value1) + self.variant(CST6_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst6::Value2) + self.variant(CST6_A::VALUE2) } } #[doc = "Clear Status Flag 7 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst7 { +pub enum CST7_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst7) -> Self { + fn from(variant: CST7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST7` writer - Clear Status Flag 7 in PSR"] -pub type Cst7W<'a, REG> = crate::BitWriter<'a, REG, Cst7>; -impl<'a, REG> Cst7W<'a, REG> +pub type CST7_W<'a, REG> = crate::BitWriter<'a, REG, CST7_A>; +impl<'a, REG> CST7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst7::Value1) + self.variant(CST7_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst7::Value2) + self.variant(CST7_A::VALUE2) } } #[doc = "Clear Status Flag 8 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst8 { +pub enum CST8_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst8) -> Self { + fn from(variant: CST8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST8` writer - Clear Status Flag 8 in PSR"] -pub type Cst8W<'a, REG> = crate::BitWriter<'a, REG, Cst8>; -impl<'a, REG> Cst8W<'a, REG> +pub type CST8_W<'a, REG> = crate::BitWriter<'a, REG, CST8_A>; +impl<'a, REG> CST8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst8::Value1) + self.variant(CST8_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst8::Value2) + self.variant(CST8_A::VALUE2) } } #[doc = "Clear Status Flag 9 in PSR\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cst9 { +pub enum CST9_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.STx is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cst9) -> Self { + fn from(variant: CST9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CST9` writer - Clear Status Flag 9 in PSR"] -pub type Cst9W<'a, REG> = crate::BitWriter<'a, REG, Cst9>; -impl<'a, REG> Cst9W<'a, REG> +pub type CST9_W<'a, REG> = crate::BitWriter<'a, REG, CST9_A>; +impl<'a, REG> CST9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cst9::Value1) + self.variant(CST9_A::VALUE1) } #[doc = "Flag PSR.STx is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cst9::Value2) + self.variant(CST9_A::VALUE2) } } #[doc = "Clear Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crsif { +pub enum CRSIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.RSIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crsif) -> Self { + fn from(variant: CRSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRSIF` writer - Clear Receiver Start Indication Flag"] -pub type CrsifW<'a, REG> = crate::BitWriter<'a, REG, Crsif>; -impl<'a, REG> CrsifW<'a, REG> +pub type CRSIF_W<'a, REG> = crate::BitWriter<'a, REG, CRSIF_A>; +impl<'a, REG> CRSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crsif::Value1) + self.variant(CRSIF_A::VALUE1) } #[doc = "Flag PSR.RSIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crsif::Value2) + self.variant(CRSIF_A::VALUE2) } } #[doc = "Clear Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cdlif { +pub enum CDLIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.DLIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cdlif) -> Self { + fn from(variant: CDLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDLIF` writer - Clear Data Lost Indication Flag"] -pub type CdlifW<'a, REG> = crate::BitWriter<'a, REG, Cdlif>; -impl<'a, REG> CdlifW<'a, REG> +pub type CDLIF_W<'a, REG> = crate::BitWriter<'a, REG, CDLIF_A>; +impl<'a, REG> CDLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cdlif::Value1) + self.variant(CDLIF_A::VALUE1) } #[doc = "Flag PSR.DLIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cdlif::Value2) + self.variant(CDLIF_A::VALUE2) } } #[doc = "Clear Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctsif { +pub enum CTSIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.TSIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctsif) -> Self { + fn from(variant: CTSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTSIF` writer - Clear Transmit Shift Indication Flag"] -pub type CtsifW<'a, REG> = crate::BitWriter<'a, REG, Ctsif>; -impl<'a, REG> CtsifW<'a, REG> +pub type CTSIF_W<'a, REG> = crate::BitWriter<'a, REG, CTSIF_A>; +impl<'a, REG> CTSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctsif::Value1) + self.variant(CTSIF_A::VALUE1) } #[doc = "Flag PSR.TSIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctsif::Value2) + self.variant(CTSIF_A::VALUE2) } } #[doc = "Clear Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctbif { +pub enum CTBIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.TBIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctbif) -> Self { + fn from(variant: CTBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTBIF` writer - Clear Transmit Buffer Indication Flag"] -pub type CtbifW<'a, REG> = crate::BitWriter<'a, REG, Ctbif>; -impl<'a, REG> CtbifW<'a, REG> +pub type CTBIF_W<'a, REG> = crate::BitWriter<'a, REG, CTBIF_A>; +impl<'a, REG> CTBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctbif::Value1) + self.variant(CTBIF_A::VALUE1) } #[doc = "Flag PSR.TBIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctbif::Value2) + self.variant(CTBIF_A::VALUE2) } } #[doc = "Clear Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crif { +pub enum CRIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.RIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crif) -> Self { + fn from(variant: CRIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRIF` writer - Clear Receive Indication Flag"] -pub type CrifW<'a, REG> = crate::BitWriter<'a, REG, Crif>; -impl<'a, REG> CrifW<'a, REG> +pub type CRIF_W<'a, REG> = crate::BitWriter<'a, REG, CRIF_A>; +impl<'a, REG> CRIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crif::Value1) + self.variant(CRIF_A::VALUE1) } #[doc = "Flag PSR.RIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crif::Value2) + self.variant(CRIF_A::VALUE2) } } #[doc = "Clear Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Caif { +pub enum CAIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.AIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Caif) -> Self { + fn from(variant: CAIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CAIF` writer - Clear Alternative Receive Indication Flag"] -pub type CaifW<'a, REG> = crate::BitWriter<'a, REG, Caif>; -impl<'a, REG> CaifW<'a, REG> +pub type CAIF_W<'a, REG> = crate::BitWriter<'a, REG, CAIF_A>; +impl<'a, REG> CAIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Caif::Value1) + self.variant(CAIF_A::VALUE1) } #[doc = "Flag PSR.AIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Caif::Value2) + self.variant(CAIF_A::VALUE2) } } #[doc = "Clear Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cbrgif { +pub enum CBRGIF_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Flag PSR.BRGIF is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cbrgif) -> Self { + fn from(variant: CBRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CBRGIF` writer - Clear Baud Rate Generator Indication Flag"] -pub type CbrgifW<'a, REG> = crate::BitWriter<'a, REG, Cbrgif>; -impl<'a, REG> CbrgifW<'a, REG> +pub type CBRGIF_W<'a, REG> = crate::BitWriter<'a, REG, CBRGIF_A>; +impl<'a, REG> CBRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cbrgif::Value1) + self.variant(CBRGIF_A::VALUE1) } #[doc = "Flag PSR.BRGIF is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cbrgif::Value2) + self.variant(CBRGIF_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Status Flag 0 in PSR"] #[inline(always)] #[must_use] - pub fn cst0(&mut self) -> Cst0W { - Cst0W::new(self, 0) + pub fn cst0(&mut self) -> CST0_W { + CST0_W::new(self, 0) } #[doc = "Bit 1 - Clear Status Flag 1 in PSR"] #[inline(always)] #[must_use] - pub fn cst1(&mut self) -> Cst1W { - Cst1W::new(self, 1) + pub fn cst1(&mut self) -> CST1_W { + CST1_W::new(self, 1) } #[doc = "Bit 2 - Clear Status Flag 2 in PSR"] #[inline(always)] #[must_use] - pub fn cst2(&mut self) -> Cst2W { - Cst2W::new(self, 2) + pub fn cst2(&mut self) -> CST2_W { + CST2_W::new(self, 2) } #[doc = "Bit 3 - Clear Status Flag 3 in PSR"] #[inline(always)] #[must_use] - pub fn cst3(&mut self) -> Cst3W { - Cst3W::new(self, 3) + pub fn cst3(&mut self) -> CST3_W { + CST3_W::new(self, 3) } #[doc = "Bit 4 - Clear Status Flag 4 in PSR"] #[inline(always)] #[must_use] - pub fn cst4(&mut self) -> Cst4W { - Cst4W::new(self, 4) + pub fn cst4(&mut self) -> CST4_W { + CST4_W::new(self, 4) } #[doc = "Bit 5 - Clear Status Flag 5 in PSR"] #[inline(always)] #[must_use] - pub fn cst5(&mut self) -> Cst5W { - Cst5W::new(self, 5) + pub fn cst5(&mut self) -> CST5_W { + CST5_W::new(self, 5) } #[doc = "Bit 6 - Clear Status Flag 6 in PSR"] #[inline(always)] #[must_use] - pub fn cst6(&mut self) -> Cst6W { - Cst6W::new(self, 6) + pub fn cst6(&mut self) -> CST6_W { + CST6_W::new(self, 6) } #[doc = "Bit 7 - Clear Status Flag 7 in PSR"] #[inline(always)] #[must_use] - pub fn cst7(&mut self) -> Cst7W { - Cst7W::new(self, 7) + pub fn cst7(&mut self) -> CST7_W { + CST7_W::new(self, 7) } #[doc = "Bit 8 - Clear Status Flag 8 in PSR"] #[inline(always)] #[must_use] - pub fn cst8(&mut self) -> Cst8W { - Cst8W::new(self, 8) + pub fn cst8(&mut self) -> CST8_W { + CST8_W::new(self, 8) } #[doc = "Bit 9 - Clear Status Flag 9 in PSR"] #[inline(always)] #[must_use] - pub fn cst9(&mut self) -> Cst9W { - Cst9W::new(self, 9) + pub fn cst9(&mut self) -> CST9_W { + CST9_W::new(self, 9) } #[doc = "Bit 10 - Clear Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn crsif(&mut self) -> CrsifW { - CrsifW::new(self, 10) + pub fn crsif(&mut self) -> CRSIF_W { + CRSIF_W::new(self, 10) } #[doc = "Bit 11 - Clear Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn cdlif(&mut self) -> CdlifW { - CdlifW::new(self, 11) + pub fn cdlif(&mut self) -> CDLIF_W { + CDLIF_W::new(self, 11) } #[doc = "Bit 12 - Clear Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn ctsif(&mut self) -> CtsifW { - CtsifW::new(self, 12) + pub fn ctsif(&mut self) -> CTSIF_W { + CTSIF_W::new(self, 12) } #[doc = "Bit 13 - Clear Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn ctbif(&mut self) -> CtbifW { - CtbifW::new(self, 13) + pub fn ctbif(&mut self) -> CTBIF_W { + CTBIF_W::new(self, 13) } #[doc = "Bit 14 - Clear Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn crif(&mut self) -> CrifW { - CrifW::new(self, 14) + pub fn crif(&mut self) -> CRIF_W { + CRIF_W::new(self, 14) } #[doc = "Bit 15 - Clear Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn caif(&mut self) -> CaifW { - CaifW::new(self, 15) + pub fn caif(&mut self) -> CAIF_W { + CAIF_W::new(self, 15) } #[doc = "Bit 16 - Clear Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn cbrgif(&mut self) -> CbrgifW { - CbrgifW::new(self, 16) + pub fn cbrgif(&mut self) -> CBRGIF_W { + CBRGIF_W::new(self, 16) } } #[doc = "Protocol Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PscrSpec; -impl crate::RegisterSpec for PscrSpec { +pub struct PSCR_SPEC; +impl crate::RegisterSpec for PSCR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`pscr::W`](W) writer structure"] -impl crate::Writable for PscrSpec { +impl crate::Writable for PSCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSCR to value 0"] -impl crate::Resettable for PscrSpec { +impl crate::Resettable for PSCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr.rs b/src/usic0_ch0/psr.rs index 4ef01c43..32271d39 100644 --- a/src/usic0_ch0/psr.rs +++ b/src/usic0_ch0/psr.rs @@ -1,623 +1,623 @@ #[doc = "Register `PSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ST0` reader - Protocol Status Flag 0"] -pub type St0R = crate::BitReader; +pub type ST0_R = crate::BitReader; #[doc = "Field `ST0` writer - Protocol Status Flag 0"] -pub type St0W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST0_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST1` reader - Protocol Status Flag 1"] -pub type St1R = crate::BitReader; +pub type ST1_R = crate::BitReader; #[doc = "Field `ST1` writer - Protocol Status Flag 1"] -pub type St1W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST1_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST2` reader - Protocol Status Flag 2"] -pub type St2R = crate::BitReader; +pub type ST2_R = crate::BitReader; #[doc = "Field `ST2` writer - Protocol Status Flag 2"] -pub type St2W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST2_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST3` reader - Protocol Status Flag 3"] -pub type St3R = crate::BitReader; +pub type ST3_R = crate::BitReader; #[doc = "Field `ST3` writer - Protocol Status Flag 3"] -pub type St3W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST3_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST4` reader - Protocol Status Flag 4"] -pub type St4R = crate::BitReader; +pub type ST4_R = crate::BitReader; #[doc = "Field `ST4` writer - Protocol Status Flag 4"] -pub type St4W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST4_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST5` reader - Protocol Status Flag 5"] -pub type St5R = crate::BitReader; +pub type ST5_R = crate::BitReader; #[doc = "Field `ST5` writer - Protocol Status Flag 5"] -pub type St5W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST5_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST6` reader - Protocol Status Flag 6"] -pub type St6R = crate::BitReader; +pub type ST6_R = crate::BitReader; #[doc = "Field `ST6` writer - Protocol Status Flag 6"] -pub type St6W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST6_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST7` reader - Protocol Status Flag 7"] -pub type St7R = crate::BitReader; +pub type ST7_R = crate::BitReader; #[doc = "Field `ST7` writer - Protocol Status Flag 7"] -pub type St7W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST7_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST8` reader - Protocol Status Flag 8"] -pub type St8R = crate::BitReader; +pub type ST8_R = crate::BitReader; #[doc = "Field `ST8` writer - Protocol Status Flag 8"] -pub type St8W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST8_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `ST9` reader - Protocol Status Flag 9"] -pub type St9R = crate::BitReader; +pub type ST9_R = crate::BitReader; #[doc = "Field `ST9` writer - Protocol Status Flag 9"] -pub type St9W<'a, REG> = crate::BitWriter<'a, REG>; +pub type ST9_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsif { +pub enum RSIF_A { #[doc = "0: A receiver start event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receiver start event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsif) -> Self { + fn from(variant: RSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RsifR = crate::BitReader; -impl RsifR { +pub type RSIF_R = crate::BitReader; +impl RSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsif { + pub const fn variant(&self) -> RSIF_A { match self.bits { - false => Rsif::Value1, - true => Rsif::Value2, + false => RSIF_A::VALUE1, + true => RSIF_A::VALUE2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsif::Value1 + *self == RSIF_A::VALUE1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsif::Value2 + *self == RSIF_A::VALUE2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; -impl<'a, REG> RsifW<'a, REG> +pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; +impl<'a, REG> RSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsif::Value1) + self.variant(RSIF_A::VALUE1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsif::Value2) + self.variant(RSIF_A::VALUE2) } } #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlif { +pub enum DLIF_A { #[doc = "0: A data lost event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data lost event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlif) -> Self { + fn from(variant: DLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DlifR = crate::BitReader; -impl DlifR { +pub type DLIF_R = crate::BitReader; +impl DLIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlif { + pub const fn variant(&self) -> DLIF_A { match self.bits { - false => Dlif::Value1, - true => Dlif::Value2, + false => DLIF_A::VALUE1, + true => DLIF_A::VALUE2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlif::Value1 + *self == DLIF_A::VALUE1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlif::Value2 + *self == DLIF_A::VALUE2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; -impl<'a, REG> DlifW<'a, REG> +pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; +impl<'a, REG> DLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlif::Value1) + self.variant(DLIF_A::VALUE1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlif::Value2) + self.variant(DLIF_A::VALUE2) } } #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsif { +pub enum TSIF_A { #[doc = "0: A transmit shift event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit shift event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsif) -> Self { + fn from(variant: TSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TsifR = crate::BitReader; -impl TsifR { +pub type TSIF_R = crate::BitReader; +impl TSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsif { + pub const fn variant(&self) -> TSIF_A { match self.bits { - false => Tsif::Value1, - true => Tsif::Value2, + false => TSIF_A::VALUE1, + true => TSIF_A::VALUE2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsif::Value1 + *self == TSIF_A::VALUE1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsif::Value2 + *self == TSIF_A::VALUE2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; -impl<'a, REG> TsifW<'a, REG> +pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; +impl<'a, REG> TSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsif::Value1) + self.variant(TSIF_A::VALUE1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsif::Value2) + self.variant(TSIF_A::VALUE2) } } #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbif { +pub enum TBIF_A { #[doc = "0: A transmit buffer event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbif) -> Self { + fn from(variant: TBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TbifR = crate::BitReader; -impl TbifR { +pub type TBIF_R = crate::BitReader; +impl TBIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbif { + pub const fn variant(&self) -> TBIF_A { match self.bits { - false => Tbif::Value1, - true => Tbif::Value2, + false => TBIF_A::VALUE1, + true => TBIF_A::VALUE2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbif::Value1 + *self == TBIF_A::VALUE1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbif::Value2 + *self == TBIF_A::VALUE2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; -impl<'a, REG> TbifW<'a, REG> +pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; +impl<'a, REG> TBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbif::Value1) + self.variant(TBIF_A::VALUE1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbif::Value2) + self.variant(TBIF_A::VALUE2) } } #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rif { +pub enum RIF_A { #[doc = "0: A receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rif) -> Self { + fn from(variant: RIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RifR = crate::BitReader; -impl RifR { +pub type RIF_R = crate::BitReader; +impl RIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rif { + pub const fn variant(&self) -> RIF_A { match self.bits { - false => Rif::Value1, - true => Rif::Value2, + false => RIF_A::VALUE1, + true => RIF_A::VALUE2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rif::Value1 + *self == RIF_A::VALUE1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rif::Value2 + *self == RIF_A::VALUE2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; -impl<'a, REG> RifW<'a, REG> +pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; +impl<'a, REG> RIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rif::Value1) + self.variant(RIF_A::VALUE1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rif::Value2) + self.variant(RIF_A::VALUE2) } } #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aif { +pub enum AIF_A { #[doc = "0: An alternative receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aif) -> Self { + fn from(variant: AIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AifR = crate::BitReader; -impl AifR { +pub type AIF_R = crate::BitReader; +impl AIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aif { + pub const fn variant(&self) -> AIF_A { match self.bits { - false => Aif::Value1, - true => Aif::Value2, + false => AIF_A::VALUE1, + true => AIF_A::VALUE2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aif::Value1 + *self == AIF_A::VALUE1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aif::Value2 + *self == AIF_A::VALUE2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; -impl<'a, REG> AifW<'a, REG> +pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; +impl<'a, REG> AIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aif::Value1) + self.variant(AIF_A::VALUE1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aif::Value2) + self.variant(AIF_A::VALUE2) } } #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgif { +pub enum BRGIF_A { #[doc = "0: A baud rate generator event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A baud rate generator event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgif) -> Self { + fn from(variant: BRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BrgifR = crate::BitReader; -impl BrgifR { +pub type BRGIF_R = crate::BitReader; +impl BRGIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgif { + pub const fn variant(&self) -> BRGIF_A { match self.bits { - false => Brgif::Value1, - true => Brgif::Value2, + false => BRGIF_A::VALUE1, + true => BRGIF_A::VALUE2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgif::Value1 + *self == BRGIF_A::VALUE1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgif::Value2 + *self == BRGIF_A::VALUE2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; -impl<'a, REG> BrgifW<'a, REG> +pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; +impl<'a, REG> BRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgif::Value1) + self.variant(BRGIF_A::VALUE1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgif::Value2) + self.variant(BRGIF_A::VALUE2) } } impl R { #[doc = "Bit 0 - Protocol Status Flag 0"] #[inline(always)] - pub fn st0(&self) -> St0R { - St0R::new((self.bits & 1) != 0) + pub fn st0(&self) -> ST0_R { + ST0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Protocol Status Flag 1"] #[inline(always)] - pub fn st1(&self) -> St1R { - St1R::new(((self.bits >> 1) & 1) != 0) + pub fn st1(&self) -> ST1_R { + ST1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Protocol Status Flag 2"] #[inline(always)] - pub fn st2(&self) -> St2R { - St2R::new(((self.bits >> 2) & 1) != 0) + pub fn st2(&self) -> ST2_R { + ST2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Protocol Status Flag 3"] #[inline(always)] - pub fn st3(&self) -> St3R { - St3R::new(((self.bits >> 3) & 1) != 0) + pub fn st3(&self) -> ST3_R { + ST3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Protocol Status Flag 4"] #[inline(always)] - pub fn st4(&self) -> St4R { - St4R::new(((self.bits >> 4) & 1) != 0) + pub fn st4(&self) -> ST4_R { + ST4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Protocol Status Flag 5"] #[inline(always)] - pub fn st5(&self) -> St5R { - St5R::new(((self.bits >> 5) & 1) != 0) + pub fn st5(&self) -> ST5_R { + ST5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Protocol Status Flag 6"] #[inline(always)] - pub fn st6(&self) -> St6R { - St6R::new(((self.bits >> 6) & 1) != 0) + pub fn st6(&self) -> ST6_R { + ST6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Protocol Status Flag 7"] #[inline(always)] - pub fn st7(&self) -> St7R { - St7R::new(((self.bits >> 7) & 1) != 0) + pub fn st7(&self) -> ST7_R { + ST7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Protocol Status Flag 8"] #[inline(always)] - pub fn st8(&self) -> St8R { - St8R::new(((self.bits >> 8) & 1) != 0) + pub fn st8(&self) -> ST8_R { + ST8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol Status Flag 9"] #[inline(always)] - pub fn st9(&self) -> St9R { - St9R::new(((self.bits >> 9) & 1) != 0) + pub fn st9(&self) -> ST9_R { + ST9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RsifR { - RsifR::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RSIF_R { + RSIF_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DlifR { - DlifR::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DLIF_R { + DLIF_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TsifR { - TsifR::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TSIF_R { + TSIF_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TbifR { - TbifR::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TBIF_R { + TBIF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RifR { - RifR::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RIF_R { + RIF_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AifR { - AifR::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AIF_R { + AIF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BrgifR { - BrgifR::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BRGIF_R { + BRGIF_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Protocol Status Flag 0"] #[inline(always)] #[must_use] - pub fn st0(&mut self) -> St0W { - St0W::new(self, 0) + pub fn st0(&mut self) -> ST0_W { + ST0_W::new(self, 0) } #[doc = "Bit 1 - Protocol Status Flag 1"] #[inline(always)] #[must_use] - pub fn st1(&mut self) -> St1W { - St1W::new(self, 1) + pub fn st1(&mut self) -> ST1_W { + ST1_W::new(self, 1) } #[doc = "Bit 2 - Protocol Status Flag 2"] #[inline(always)] #[must_use] - pub fn st2(&mut self) -> St2W { - St2W::new(self, 2) + pub fn st2(&mut self) -> ST2_W { + ST2_W::new(self, 2) } #[doc = "Bit 3 - Protocol Status Flag 3"] #[inline(always)] #[must_use] - pub fn st3(&mut self) -> St3W { - St3W::new(self, 3) + pub fn st3(&mut self) -> ST3_W { + ST3_W::new(self, 3) } #[doc = "Bit 4 - Protocol Status Flag 4"] #[inline(always)] #[must_use] - pub fn st4(&mut self) -> St4W { - St4W::new(self, 4) + pub fn st4(&mut self) -> ST4_W { + ST4_W::new(self, 4) } #[doc = "Bit 5 - Protocol Status Flag 5"] #[inline(always)] #[must_use] - pub fn st5(&mut self) -> St5W { - St5W::new(self, 5) + pub fn st5(&mut self) -> ST5_W { + ST5_W::new(self, 5) } #[doc = "Bit 6 - Protocol Status Flag 6"] #[inline(always)] #[must_use] - pub fn st6(&mut self) -> St6W { - St6W::new(self, 6) + pub fn st6(&mut self) -> ST6_W { + ST6_W::new(self, 6) } #[doc = "Bit 7 - Protocol Status Flag 7"] #[inline(always)] #[must_use] - pub fn st7(&mut self) -> St7W { - St7W::new(self, 7) + pub fn st7(&mut self) -> ST7_W { + ST7_W::new(self, 7) } #[doc = "Bit 8 - Protocol Status Flag 8"] #[inline(always)] #[must_use] - pub fn st8(&mut self) -> St8W { - St8W::new(self, 8) + pub fn st8(&mut self) -> ST8_W { + ST8_W::new(self, 8) } #[doc = "Bit 9 - Protocol Status Flag 9"] #[inline(always)] #[must_use] - pub fn st9(&mut self) -> St9W { - St9W::new(self, 9) + pub fn st9(&mut self) -> ST9_W { + ST9_W::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RsifW { - RsifW::new(self, 10) + pub fn rsif(&mut self) -> RSIF_W { + RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DlifW { - DlifW::new(self, 11) + pub fn dlif(&mut self) -> DLIF_W { + DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TsifW { - TsifW::new(self, 12) + pub fn tsif(&mut self) -> TSIF_W { + TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TbifW { - TbifW::new(self, 13) + pub fn tbif(&mut self) -> TBIF_W { + TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RifW { - RifW::new(self, 14) + pub fn rif(&mut self) -> RIF_W { + RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AifW { - AifW::new(self, 15) + pub fn aif(&mut self) -> AIF_W { + AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BrgifW { - BrgifW::new(self, 16) + pub fn brgif(&mut self) -> BRGIF_W { + BRGIF_W::new(self, 16) } } #[doc = "Protocol Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsrSpec; -impl crate::RegisterSpec for PsrSpec { +pub struct PSR_SPEC; +impl crate::RegisterSpec for PSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psr::R`](R) reader structure"] -impl crate::Readable for PsrSpec {} +impl crate::Readable for PSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`psr::W`](W) writer structure"] -impl crate::Writable for PsrSpec { +impl crate::Writable for PSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR to value 0"] -impl crate::Resettable for PsrSpec { +impl crate::Resettable for PSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_ascmode.rs b/src/usic0_ch0/psr_ascmode.rs index 2a88f01f..9b1c1f11 100644 --- a/src/usic0_ch0/psr_ascmode.rs +++ b/src/usic0_ch0/psr_ascmode.rs @@ -1,1090 +1,1090 @@ #[doc = "Register `PSR_ASCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_ASCMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Transmission Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Txidle { +pub enum TXIDLE_A { #[doc = "0: The transmitter line has not yet been idle."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmitter line has been idle and frame transmission is possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Txidle) -> Self { + fn from(variant: TXIDLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TXIDLE` reader - Transmission Idle"] -pub type TxidleR = crate::BitReader; -impl TxidleR { +pub type TXIDLE_R = crate::BitReader; +impl TXIDLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Txidle { + pub const fn variant(&self) -> TXIDLE_A { match self.bits { - false => Txidle::Value1, - true => Txidle::Value2, + false => TXIDLE_A::VALUE1, + true => TXIDLE_A::VALUE2, } } #[doc = "The transmitter line has not yet been idle."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Txidle::Value1 + *self == TXIDLE_A::VALUE1 } #[doc = "The transmitter line has been idle and frame transmission is possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Txidle::Value2 + *self == TXIDLE_A::VALUE2 } } #[doc = "Field `TXIDLE` writer - Transmission Idle"] -pub type TxidleW<'a, REG> = crate::BitWriter<'a, REG, Txidle>; -impl<'a, REG> TxidleW<'a, REG> +pub type TXIDLE_W<'a, REG> = crate::BitWriter<'a, REG, TXIDLE_A>; +impl<'a, REG> TXIDLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmitter line has not yet been idle."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Txidle::Value1) + self.variant(TXIDLE_A::VALUE1) } #[doc = "The transmitter line has been idle and frame transmission is possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Txidle::Value2) + self.variant(TXIDLE_A::VALUE2) } } #[doc = "Reception Idle\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rxidle { +pub enum RXIDLE_A { #[doc = "0: The receiver line has not yet been idle."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receiver line has been idle and frame reception is possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rxidle) -> Self { + fn from(variant: RXIDLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RXIDLE` reader - Reception Idle"] -pub type RxidleR = crate::BitReader; -impl RxidleR { +pub type RXIDLE_R = crate::BitReader; +impl RXIDLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rxidle { + pub const fn variant(&self) -> RXIDLE_A { match self.bits { - false => Rxidle::Value1, - true => Rxidle::Value2, + false => RXIDLE_A::VALUE1, + true => RXIDLE_A::VALUE2, } } #[doc = "The receiver line has not yet been idle."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rxidle::Value1 + *self == RXIDLE_A::VALUE1 } #[doc = "The receiver line has been idle and frame reception is possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rxidle::Value2 + *self == RXIDLE_A::VALUE2 } } #[doc = "Field `RXIDLE` writer - Reception Idle"] -pub type RxidleW<'a, REG> = crate::BitWriter<'a, REG, Rxidle>; -impl<'a, REG> RxidleW<'a, REG> +pub type RXIDLE_W<'a, REG> = crate::BitWriter<'a, REG, RXIDLE_A>; +impl<'a, REG> RXIDLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receiver line has not yet been idle."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rxidle::Value1) + self.variant(RXIDLE_A::VALUE1) } #[doc = "The receiver line has been idle and frame reception is possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rxidle::Value2) + self.variant(RXIDLE_A::VALUE2) } } #[doc = "Synchronization Break Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sbd { +pub enum SBD_A { #[doc = "0: A synchronization break has not yet been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A synchronization break has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sbd) -> Self { + fn from(variant: SBD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SBD` reader - Synchronization Break Detected"] -pub type SbdR = crate::BitReader; -impl SbdR { +pub type SBD_R = crate::BitReader; +impl SBD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sbd { + pub const fn variant(&self) -> SBD_A { match self.bits { - false => Sbd::Value1, - true => Sbd::Value2, + false => SBD_A::VALUE1, + true => SBD_A::VALUE2, } } #[doc = "A synchronization break has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sbd::Value1 + *self == SBD_A::VALUE1 } #[doc = "A synchronization break has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sbd::Value2 + *self == SBD_A::VALUE2 } } #[doc = "Field `SBD` writer - Synchronization Break Detected"] -pub type SbdW<'a, REG> = crate::BitWriter<'a, REG, Sbd>; -impl<'a, REG> SbdW<'a, REG> +pub type SBD_W<'a, REG> = crate::BitWriter<'a, REG, SBD_A>; +impl<'a, REG> SBD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A synchronization break has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sbd::Value1) + self.variant(SBD_A::VALUE1) } #[doc = "A synchronization break has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sbd::Value2) + self.variant(SBD_A::VALUE2) } } #[doc = "Collision Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Col { +pub enum COL_A { #[doc = "0: A collision has not yet been detected and frame transmission is possible."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A collision has been detected and frame transmission is not possible."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Col) -> Self { + fn from(variant: COL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `COL` reader - Collision Detected"] -pub type ColR = crate::BitReader; -impl ColR { +pub type COL_R = crate::BitReader; +impl COL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Col { + pub const fn variant(&self) -> COL_A { match self.bits { - false => Col::Value1, - true => Col::Value2, + false => COL_A::VALUE1, + true => COL_A::VALUE2, } } #[doc = "A collision has not yet been detected and frame transmission is possible."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Col::Value1 + *self == COL_A::VALUE1 } #[doc = "A collision has been detected and frame transmission is not possible."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Col::Value2 + *self == COL_A::VALUE2 } } #[doc = "Field `COL` writer - Collision Detected"] -pub type ColW<'a, REG> = crate::BitWriter<'a, REG, Col>; -impl<'a, REG> ColW<'a, REG> +pub type COL_W<'a, REG> = crate::BitWriter<'a, REG, COL_A>; +impl<'a, REG> COL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A collision has not yet been detected and frame transmission is possible."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Col::Value1) + self.variant(COL_A::VALUE1) } #[doc = "A collision has been detected and frame transmission is not possible."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Col::Value2) + self.variant(COL_A::VALUE2) } } #[doc = "Receiver Noise Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rns { +pub enum RNS_A { #[doc = "0: Receiver noise has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Receiver noise has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rns) -> Self { + fn from(variant: RNS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RNS` reader - Receiver Noise Detected"] -pub type RnsR = crate::BitReader; -impl RnsR { +pub type RNS_R = crate::BitReader; +impl RNS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rns { + pub const fn variant(&self) -> RNS_A { match self.bits { - false => Rns::Value1, - true => Rns::Value2, + false => RNS_A::VALUE1, + true => RNS_A::VALUE2, } } #[doc = "Receiver noise has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rns::Value1 + *self == RNS_A::VALUE1 } #[doc = "Receiver noise has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rns::Value2 + *self == RNS_A::VALUE2 } } #[doc = "Field `RNS` writer - Receiver Noise Detected"] -pub type RnsW<'a, REG> = crate::BitWriter<'a, REG, Rns>; -impl<'a, REG> RnsW<'a, REG> +pub type RNS_W<'a, REG> = crate::BitWriter<'a, REG, RNS_A>; +impl<'a, REG> RNS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Receiver noise has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rns::Value1) + self.variant(RNS_A::VALUE1) } #[doc = "Receiver noise has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rns::Value2) + self.variant(RNS_A::VALUE2) } } #[doc = "Format Error in Stop Bit 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fer0 { +pub enum FER0_A { #[doc = "0: A format error 0 has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A format error 0 has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fer0) -> Self { + fn from(variant: FER0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FER0` reader - Format Error in Stop Bit 0"] -pub type Fer0R = crate::BitReader; -impl Fer0R { +pub type FER0_R = crate::BitReader; +impl FER0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fer0 { + pub const fn variant(&self) -> FER0_A { match self.bits { - false => Fer0::Value1, - true => Fer0::Value2, + false => FER0_A::VALUE1, + true => FER0_A::VALUE2, } } #[doc = "A format error 0 has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fer0::Value1 + *self == FER0_A::VALUE1 } #[doc = "A format error 0 has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fer0::Value2 + *self == FER0_A::VALUE2 } } #[doc = "Field `FER0` writer - Format Error in Stop Bit 0"] -pub type Fer0W<'a, REG> = crate::BitWriter<'a, REG, Fer0>; -impl<'a, REG> Fer0W<'a, REG> +pub type FER0_W<'a, REG> = crate::BitWriter<'a, REG, FER0_A>; +impl<'a, REG> FER0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A format error 0 has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fer0::Value1) + self.variant(FER0_A::VALUE1) } #[doc = "A format error 0 has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fer0::Value2) + self.variant(FER0_A::VALUE2) } } #[doc = "Format Error in Stop Bit 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fer1 { +pub enum FER1_A { #[doc = "0: A format error 1 has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A format error 1 has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fer1) -> Self { + fn from(variant: FER1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FER1` reader - Format Error in Stop Bit 1"] -pub type Fer1R = crate::BitReader; -impl Fer1R { +pub type FER1_R = crate::BitReader; +impl FER1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fer1 { + pub const fn variant(&self) -> FER1_A { match self.bits { - false => Fer1::Value1, - true => Fer1::Value2, + false => FER1_A::VALUE1, + true => FER1_A::VALUE2, } } #[doc = "A format error 1 has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fer1::Value1 + *self == FER1_A::VALUE1 } #[doc = "A format error 1 has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fer1::Value2 + *self == FER1_A::VALUE2 } } #[doc = "Field `FER1` writer - Format Error in Stop Bit 1"] -pub type Fer1W<'a, REG> = crate::BitWriter<'a, REG, Fer1>; -impl<'a, REG> Fer1W<'a, REG> +pub type FER1_W<'a, REG> = crate::BitWriter<'a, REG, FER1_A>; +impl<'a, REG> FER1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A format error 1 has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fer1::Value1) + self.variant(FER1_A::VALUE1) } #[doc = "A format error 1 has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fer1::Value2) + self.variant(FER1_A::VALUE2) } } #[doc = "Receive Frame Finished\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rff { +pub enum RFF_A { #[doc = "0: The received frame is not yet finished."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The received frame is finished."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rff) -> Self { + fn from(variant: RFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RFF` reader - Receive Frame Finished"] -pub type RffR = crate::BitReader; -impl RffR { +pub type RFF_R = crate::BitReader; +impl RFF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rff { + pub const fn variant(&self) -> RFF_A { match self.bits { - false => Rff::Value1, - true => Rff::Value2, + false => RFF_A::VALUE1, + true => RFF_A::VALUE2, } } #[doc = "The received frame is not yet finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rff::Value1 + *self == RFF_A::VALUE1 } #[doc = "The received frame is finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rff::Value2 + *self == RFF_A::VALUE2 } } #[doc = "Field `RFF` writer - Receive Frame Finished"] -pub type RffW<'a, REG> = crate::BitWriter<'a, REG, Rff>; -impl<'a, REG> RffW<'a, REG> +pub type RFF_W<'a, REG> = crate::BitWriter<'a, REG, RFF_A>; +impl<'a, REG> RFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The received frame is not yet finished."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rff::Value1) + self.variant(RFF_A::VALUE1) } #[doc = "The received frame is finished."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rff::Value2) + self.variant(RFF_A::VALUE2) } } #[doc = "Transmitter Frame Finished\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tff { +pub enum TFF_A { #[doc = "0: The transmitter frame is not yet finished."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmitter frame is finished."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tff) -> Self { + fn from(variant: TFF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TFF` reader - Transmitter Frame Finished"] -pub type TffR = crate::BitReader; -impl TffR { +pub type TFF_R = crate::BitReader; +impl TFF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tff { + pub const fn variant(&self) -> TFF_A { match self.bits { - false => Tff::Value1, - true => Tff::Value2, + false => TFF_A::VALUE1, + true => TFF_A::VALUE2, } } #[doc = "The transmitter frame is not yet finished."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tff::Value1 + *self == TFF_A::VALUE1 } #[doc = "The transmitter frame is finished."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tff::Value2 + *self == TFF_A::VALUE2 } } #[doc = "Field `TFF` writer - Transmitter Frame Finished"] -pub type TffW<'a, REG> = crate::BitWriter<'a, REG, Tff>; -impl<'a, REG> TffW<'a, REG> +pub type TFF_W<'a, REG> = crate::BitWriter<'a, REG, TFF_A>; +impl<'a, REG> TFF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmitter frame is not yet finished."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tff::Value1) + self.variant(TFF_A::VALUE1) } #[doc = "The transmitter frame is finished."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tff::Value2) + self.variant(TFF_A::VALUE2) } } #[doc = "Transfer Status BUSY\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Busy { +pub enum BUSY_A { #[doc = "0: A data transfer does not take place."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data transfer currently takes place."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Busy) -> Self { + fn from(variant: BUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BUSY` reader - Transfer Status BUSY"] -pub type BusyR = crate::BitReader; -impl BusyR { +pub type BUSY_R = crate::BitReader; +impl BUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Busy { + pub const fn variant(&self) -> BUSY_A { match self.bits { - false => Busy::Value1, - true => Busy::Value2, + false => BUSY_A::VALUE1, + true => BUSY_A::VALUE2, } } #[doc = "A data transfer does not take place."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Busy::Value1 + *self == BUSY_A::VALUE1 } #[doc = "A data transfer currently takes place."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Busy::Value2 + *self == BUSY_A::VALUE2 } } #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsif { +pub enum RSIF_A { #[doc = "0: A receiver start event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receiver start event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsif) -> Self { + fn from(variant: RSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RsifR = crate::BitReader; -impl RsifR { +pub type RSIF_R = crate::BitReader; +impl RSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsif { + pub const fn variant(&self) -> RSIF_A { match self.bits { - false => Rsif::Value1, - true => Rsif::Value2, + false => RSIF_A::VALUE1, + true => RSIF_A::VALUE2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsif::Value1 + *self == RSIF_A::VALUE1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsif::Value2 + *self == RSIF_A::VALUE2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; -impl<'a, REG> RsifW<'a, REG> +pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; +impl<'a, REG> RSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsif::Value1) + self.variant(RSIF_A::VALUE1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsif::Value2) + self.variant(RSIF_A::VALUE2) } } #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlif { +pub enum DLIF_A { #[doc = "0: A data lost event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data lost event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlif) -> Self { + fn from(variant: DLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DlifR = crate::BitReader; -impl DlifR { +pub type DLIF_R = crate::BitReader; +impl DLIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlif { + pub const fn variant(&self) -> DLIF_A { match self.bits { - false => Dlif::Value1, - true => Dlif::Value2, + false => DLIF_A::VALUE1, + true => DLIF_A::VALUE2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlif::Value1 + *self == DLIF_A::VALUE1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlif::Value2 + *self == DLIF_A::VALUE2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; -impl<'a, REG> DlifW<'a, REG> +pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; +impl<'a, REG> DLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlif::Value1) + self.variant(DLIF_A::VALUE1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlif::Value2) + self.variant(DLIF_A::VALUE2) } } #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsif { +pub enum TSIF_A { #[doc = "0: A transmit shift event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit shift event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsif) -> Self { + fn from(variant: TSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TsifR = crate::BitReader; -impl TsifR { +pub type TSIF_R = crate::BitReader; +impl TSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsif { + pub const fn variant(&self) -> TSIF_A { match self.bits { - false => Tsif::Value1, - true => Tsif::Value2, + false => TSIF_A::VALUE1, + true => TSIF_A::VALUE2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsif::Value1 + *self == TSIF_A::VALUE1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsif::Value2 + *self == TSIF_A::VALUE2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; -impl<'a, REG> TsifW<'a, REG> +pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; +impl<'a, REG> TSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsif::Value1) + self.variant(TSIF_A::VALUE1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsif::Value2) + self.variant(TSIF_A::VALUE2) } } #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbif { +pub enum TBIF_A { #[doc = "0: A transmit buffer event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbif) -> Self { + fn from(variant: TBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TbifR = crate::BitReader; -impl TbifR { +pub type TBIF_R = crate::BitReader; +impl TBIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbif { + pub const fn variant(&self) -> TBIF_A { match self.bits { - false => Tbif::Value1, - true => Tbif::Value2, + false => TBIF_A::VALUE1, + true => TBIF_A::VALUE2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbif::Value1 + *self == TBIF_A::VALUE1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbif::Value2 + *self == TBIF_A::VALUE2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; -impl<'a, REG> TbifW<'a, REG> +pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; +impl<'a, REG> TBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbif::Value1) + self.variant(TBIF_A::VALUE1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbif::Value2) + self.variant(TBIF_A::VALUE2) } } #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rif { +pub enum RIF_A { #[doc = "0: A receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rif) -> Self { + fn from(variant: RIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RifR = crate::BitReader; -impl RifR { +pub type RIF_R = crate::BitReader; +impl RIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rif { + pub const fn variant(&self) -> RIF_A { match self.bits { - false => Rif::Value1, - true => Rif::Value2, + false => RIF_A::VALUE1, + true => RIF_A::VALUE2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rif::Value1 + *self == RIF_A::VALUE1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rif::Value2 + *self == RIF_A::VALUE2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; -impl<'a, REG> RifW<'a, REG> +pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; +impl<'a, REG> RIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rif::Value1) + self.variant(RIF_A::VALUE1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rif::Value2) + self.variant(RIF_A::VALUE2) } } #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aif { +pub enum AIF_A { #[doc = "0: An alternative receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aif) -> Self { + fn from(variant: AIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AifR = crate::BitReader; -impl AifR { +pub type AIF_R = crate::BitReader; +impl AIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aif { + pub const fn variant(&self) -> AIF_A { match self.bits { - false => Aif::Value1, - true => Aif::Value2, + false => AIF_A::VALUE1, + true => AIF_A::VALUE2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aif::Value1 + *self == AIF_A::VALUE1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aif::Value2 + *self == AIF_A::VALUE2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; -impl<'a, REG> AifW<'a, REG> +pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; +impl<'a, REG> AIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aif::Value1) + self.variant(AIF_A::VALUE1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aif::Value2) + self.variant(AIF_A::VALUE2) } } #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgif { +pub enum BRGIF_A { #[doc = "0: A baud rate generator event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A baud rate generator event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgif) -> Self { + fn from(variant: BRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BrgifR = crate::BitReader; -impl BrgifR { +pub type BRGIF_R = crate::BitReader; +impl BRGIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgif { + pub const fn variant(&self) -> BRGIF_A { match self.bits { - false => Brgif::Value1, - true => Brgif::Value2, + false => BRGIF_A::VALUE1, + true => BRGIF_A::VALUE2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgif::Value1 + *self == BRGIF_A::VALUE1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgif::Value2 + *self == BRGIF_A::VALUE2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; -impl<'a, REG> BrgifW<'a, REG> +pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; +impl<'a, REG> BRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgif::Value1) + self.variant(BRGIF_A::VALUE1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgif::Value2) + self.variant(BRGIF_A::VALUE2) } } impl R { #[doc = "Bit 0 - Transmission Idle"] #[inline(always)] - pub fn txidle(&self) -> TxidleR { - TxidleR::new((self.bits & 1) != 0) + pub fn txidle(&self) -> TXIDLE_R { + TXIDLE_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Reception Idle"] #[inline(always)] - pub fn rxidle(&self) -> RxidleR { - RxidleR::new(((self.bits >> 1) & 1) != 0) + pub fn rxidle(&self) -> RXIDLE_R { + RXIDLE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Synchronization Break Detected"] #[inline(always)] - pub fn sbd(&self) -> SbdR { - SbdR::new(((self.bits >> 2) & 1) != 0) + pub fn sbd(&self) -> SBD_R { + SBD_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Collision Detected"] #[inline(always)] - pub fn col(&self) -> ColR { - ColR::new(((self.bits >> 3) & 1) != 0) + pub fn col(&self) -> COL_R { + COL_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receiver Noise Detected"] #[inline(always)] - pub fn rns(&self) -> RnsR { - RnsR::new(((self.bits >> 4) & 1) != 0) + pub fn rns(&self) -> RNS_R { + RNS_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Format Error in Stop Bit 0"] #[inline(always)] - pub fn fer0(&self) -> Fer0R { - Fer0R::new(((self.bits >> 5) & 1) != 0) + pub fn fer0(&self) -> FER0_R { + FER0_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Format Error in Stop Bit 1"] #[inline(always)] - pub fn fer1(&self) -> Fer1R { - Fer1R::new(((self.bits >> 6) & 1) != 0) + pub fn fer1(&self) -> FER1_R { + FER1_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Receive Frame Finished"] #[inline(always)] - pub fn rff(&self) -> RffR { - RffR::new(((self.bits >> 7) & 1) != 0) + pub fn rff(&self) -> RFF_R { + RFF_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Transmitter Frame Finished"] #[inline(always)] - pub fn tff(&self) -> TffR { - TffR::new(((self.bits >> 8) & 1) != 0) + pub fn tff(&self) -> TFF_R { + TFF_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transfer Status BUSY"] #[inline(always)] - pub fn busy(&self) -> BusyR { - BusyR::new(((self.bits >> 9) & 1) != 0) + pub fn busy(&self) -> BUSY_R { + BUSY_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RsifR { - RsifR::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RSIF_R { + RSIF_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DlifR { - DlifR::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DLIF_R { + DLIF_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TsifR { - TsifR::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TSIF_R { + TSIF_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TbifR { - TbifR::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TBIF_R { + TBIF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RifR { - RifR::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RIF_R { + RIF_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AifR { - AifR::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AIF_R { + AIF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BrgifR { - BrgifR::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BRGIF_R { + BRGIF_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Transmission Idle"] #[inline(always)] #[must_use] - pub fn txidle(&mut self) -> TxidleW { - TxidleW::new(self, 0) + pub fn txidle(&mut self) -> TXIDLE_W { + TXIDLE_W::new(self, 0) } #[doc = "Bit 1 - Reception Idle"] #[inline(always)] #[must_use] - pub fn rxidle(&mut self) -> RxidleW { - RxidleW::new(self, 1) + pub fn rxidle(&mut self) -> RXIDLE_W { + RXIDLE_W::new(self, 1) } #[doc = "Bit 2 - Synchronization Break Detected"] #[inline(always)] #[must_use] - pub fn sbd(&mut self) -> SbdW { - SbdW::new(self, 2) + pub fn sbd(&mut self) -> SBD_W { + SBD_W::new(self, 2) } #[doc = "Bit 3 - Collision Detected"] #[inline(always)] #[must_use] - pub fn col(&mut self) -> ColW { - ColW::new(self, 3) + pub fn col(&mut self) -> COL_W { + COL_W::new(self, 3) } #[doc = "Bit 4 - Receiver Noise Detected"] #[inline(always)] #[must_use] - pub fn rns(&mut self) -> RnsW { - RnsW::new(self, 4) + pub fn rns(&mut self) -> RNS_W { + RNS_W::new(self, 4) } #[doc = "Bit 5 - Format Error in Stop Bit 0"] #[inline(always)] #[must_use] - pub fn fer0(&mut self) -> Fer0W { - Fer0W::new(self, 5) + pub fn fer0(&mut self) -> FER0_W { + FER0_W::new(self, 5) } #[doc = "Bit 6 - Format Error in Stop Bit 1"] #[inline(always)] #[must_use] - pub fn fer1(&mut self) -> Fer1W { - Fer1W::new(self, 6) + pub fn fer1(&mut self) -> FER1_W { + FER1_W::new(self, 6) } #[doc = "Bit 7 - Receive Frame Finished"] #[inline(always)] #[must_use] - pub fn rff(&mut self) -> RffW { - RffW::new(self, 7) + pub fn rff(&mut self) -> RFF_W { + RFF_W::new(self, 7) } #[doc = "Bit 8 - Transmitter Frame Finished"] #[inline(always)] #[must_use] - pub fn tff(&mut self) -> TffW { - TffW::new(self, 8) + pub fn tff(&mut self) -> TFF_W { + TFF_W::new(self, 8) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RsifW { - RsifW::new(self, 10) + pub fn rsif(&mut self) -> RSIF_W { + RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DlifW { - DlifW::new(self, 11) + pub fn dlif(&mut self) -> DLIF_W { + DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TsifW { - TsifW::new(self, 12) + pub fn tsif(&mut self) -> TSIF_W { + TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TbifW { - TbifW::new(self, 13) + pub fn tbif(&mut self) -> TBIF_W { + TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RifW { - RifW::new(self, 14) + pub fn rif(&mut self) -> RIF_W { + RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AifW { - AifW::new(self, 15) + pub fn aif(&mut self) -> AIF_W { + AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BrgifW { - BrgifW::new(self, 16) + pub fn brgif(&mut self) -> BRGIF_W { + BRGIF_W::new(self, 16) } } #[doc = "Protocol Status Register \\[ASC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_ascmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_ascmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsrAscmodeSpec; -impl crate::RegisterSpec for PsrAscmodeSpec { +pub struct PSR_ASCMODE_SPEC; +impl crate::RegisterSpec for PSR_ASCMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psr_ascmode::R`](R) reader structure"] -impl crate::Readable for PsrAscmodeSpec {} +impl crate::Readable for PSR_ASCMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`psr_ascmode::W`](W) writer structure"] -impl crate::Writable for PsrAscmodeSpec { +impl crate::Writable for PSR_ASCMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_ASCMode to value 0"] -impl crate::Resettable for PsrAscmodeSpec { +impl crate::Resettable for PSR_ASCMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_iicmode.rs b/src/usic0_ch0/psr_iicmode.rs index 0f602d7c..2debedee 100644 --- a/src/usic0_ch0/psr_iicmode.rs +++ b/src/usic0_ch0/psr_iicmode.rs @@ -1,1113 +1,1113 @@ #[doc = "Register `PSR_IICMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_IICMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Slave Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Slsel { +pub enum SLSEL_A { #[doc = "0: The device is not selected as slave."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The device is selected as slave."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Slsel) -> Self { + fn from(variant: SLSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SLSEL` reader - Slave Select"] -pub type SlselR = crate::BitReader; -impl SlselR { +pub type SLSEL_R = crate::BitReader; +impl SLSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Slsel { + pub const fn variant(&self) -> SLSEL_A { match self.bits { - false => Slsel::Value1, - true => Slsel::Value2, + false => SLSEL_A::VALUE1, + true => SLSEL_A::VALUE2, } } #[doc = "The device is not selected as slave."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Slsel::Value1 + *self == SLSEL_A::VALUE1 } #[doc = "The device is selected as slave."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Slsel::Value2 + *self == SLSEL_A::VALUE2 } } #[doc = "Field `SLSEL` writer - Slave Select"] -pub type SlselW<'a, REG> = crate::BitWriter<'a, REG, Slsel>; -impl<'a, REG> SlselW<'a, REG> +pub type SLSEL_W<'a, REG> = crate::BitWriter<'a, REG, SLSEL_A>; +impl<'a, REG> SLSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The device is not selected as slave."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Slsel::Value1) + self.variant(SLSEL_A::VALUE1) } #[doc = "The device is selected as slave."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Slsel::Value2) + self.variant(SLSEL_A::VALUE2) } } #[doc = "Wrong TDF Code Found\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wtdf { +pub enum WTDF_A { #[doc = "0: A wrong TDF code has not been found."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A wrong TDF code has been found."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wtdf) -> Self { + fn from(variant: WTDF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WTDF` reader - Wrong TDF Code Found"] -pub type WtdfR = crate::BitReader; -impl WtdfR { +pub type WTDF_R = crate::BitReader; +impl WTDF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wtdf { + pub const fn variant(&self) -> WTDF_A { match self.bits { - false => Wtdf::Value1, - true => Wtdf::Value2, + false => WTDF_A::VALUE1, + true => WTDF_A::VALUE2, } } #[doc = "A wrong TDF code has not been found."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wtdf::Value1 + *self == WTDF_A::VALUE1 } #[doc = "A wrong TDF code has been found."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wtdf::Value2 + *self == WTDF_A::VALUE2 } } #[doc = "Field `WTDF` writer - Wrong TDF Code Found"] -pub type WtdfW<'a, REG> = crate::BitWriter<'a, REG, Wtdf>; -impl<'a, REG> WtdfW<'a, REG> +pub type WTDF_W<'a, REG> = crate::BitWriter<'a, REG, WTDF_A>; +impl<'a, REG> WTDF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A wrong TDF code has not been found."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wtdf::Value1) + self.variant(WTDF_A::VALUE1) } #[doc = "A wrong TDF code has been found."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wtdf::Value2) + self.variant(WTDF_A::VALUE2) } } #[doc = "Start Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Scr { +pub enum SCR_A { #[doc = "0: A start condition has not yet been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A start condition has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Scr) -> Self { + fn from(variant: SCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCR` reader - Start Condition Received"] -pub type ScrR = crate::BitReader; -impl ScrR { +pub type SCR_R = crate::BitReader; +impl SCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scr { + pub const fn variant(&self) -> SCR_A { match self.bits { - false => Scr::Value1, - true => Scr::Value2, + false => SCR_A::VALUE1, + true => SCR_A::VALUE2, } } #[doc = "A start condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scr::Value1 + *self == SCR_A::VALUE1 } #[doc = "A start condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scr::Value2 + *self == SCR_A::VALUE2 } } #[doc = "Field `SCR` writer - Start Condition Received"] -pub type ScrW<'a, REG> = crate::BitWriter<'a, REG, Scr>; -impl<'a, REG> ScrW<'a, REG> +pub type SCR_W<'a, REG> = crate::BitWriter<'a, REG, SCR_A>; +impl<'a, REG> SCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A start condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scr::Value1) + self.variant(SCR_A::VALUE1) } #[doc = "A start condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scr::Value2) + self.variant(SCR_A::VALUE2) } } #[doc = "Repeated Start Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rscr { +pub enum RSCR_A { #[doc = "0: A repeated start condition has not yet been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A repeated start condition has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rscr) -> Self { + fn from(variant: RSCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSCR` reader - Repeated Start Condition Received"] -pub type RscrR = crate::BitReader; -impl RscrR { +pub type RSCR_R = crate::BitReader; +impl RSCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rscr { + pub const fn variant(&self) -> RSCR_A { match self.bits { - false => Rscr::Value1, - true => Rscr::Value2, + false => RSCR_A::VALUE1, + true => RSCR_A::VALUE2, } } #[doc = "A repeated start condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rscr::Value1 + *self == RSCR_A::VALUE1 } #[doc = "A repeated start condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rscr::Value2 + *self == RSCR_A::VALUE2 } } #[doc = "Field `RSCR` writer - Repeated Start Condition Received"] -pub type RscrW<'a, REG> = crate::BitWriter<'a, REG, Rscr>; -impl<'a, REG> RscrW<'a, REG> +pub type RSCR_W<'a, REG> = crate::BitWriter<'a, REG, RSCR_A>; +impl<'a, REG> RSCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A repeated start condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rscr::Value1) + self.variant(RSCR_A::VALUE1) } #[doc = "A repeated start condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rscr::Value2) + self.variant(RSCR_A::VALUE2) } } #[doc = "Stop Condition Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pcr { +pub enum PCR_A { #[doc = "0: A stop condition has not yet been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A stop condition has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pcr) -> Self { + fn from(variant: PCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PCR` reader - Stop Condition Received"] -pub type PcrR = crate::BitReader; -impl PcrR { +pub type PCR_R = crate::BitReader; +impl PCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pcr { + pub const fn variant(&self) -> PCR_A { match self.bits { - false => Pcr::Value1, - true => Pcr::Value2, + false => PCR_A::VALUE1, + true => PCR_A::VALUE2, } } #[doc = "A stop condition has not yet been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pcr::Value1 + *self == PCR_A::VALUE1 } #[doc = "A stop condition has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pcr::Value2 + *self == PCR_A::VALUE2 } } #[doc = "Field `PCR` writer - Stop Condition Received"] -pub type PcrW<'a, REG> = crate::BitWriter<'a, REG, Pcr>; -impl<'a, REG> PcrW<'a, REG> +pub type PCR_W<'a, REG> = crate::BitWriter<'a, REG, PCR_A>; +impl<'a, REG> PCR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A stop condition has not yet been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pcr::Value1) + self.variant(PCR_A::VALUE1) } #[doc = "A stop condition has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pcr::Value2) + self.variant(PCR_A::VALUE2) } } #[doc = "Non-Acknowledge Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Nack { +pub enum NACK_A { #[doc = "0: A non-acknowledge has not been received."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A non-acknowledge has been received."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Nack) -> Self { + fn from(variant: NACK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `NACK` reader - Non-Acknowledge Received"] -pub type NackR = crate::BitReader; -impl NackR { +pub type NACK_R = crate::BitReader; +impl NACK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Nack { + pub const fn variant(&self) -> NACK_A { match self.bits { - false => Nack::Value1, - true => Nack::Value2, + false => NACK_A::VALUE1, + true => NACK_A::VALUE2, } } #[doc = "A non-acknowledge has not been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Nack::Value1 + *self == NACK_A::VALUE1 } #[doc = "A non-acknowledge has been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Nack::Value2 + *self == NACK_A::VALUE2 } } #[doc = "Field `NACK` writer - Non-Acknowledge Received"] -pub type NackW<'a, REG> = crate::BitWriter<'a, REG, Nack>; -impl<'a, REG> NackW<'a, REG> +pub type NACK_W<'a, REG> = crate::BitWriter<'a, REG, NACK_A>; +impl<'a, REG> NACK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A non-acknowledge has not been received."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Nack::Value1) + self.variant(NACK_A::VALUE1) } #[doc = "A non-acknowledge has been received."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Nack::Value2) + self.variant(NACK_A::VALUE2) } } #[doc = "Arbitration Lost\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Arl { +pub enum ARL_A { #[doc = "0: An arbitration has not been lost."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An arbitration has been lost."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Arl) -> Self { + fn from(variant: ARL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ARL` reader - Arbitration Lost"] -pub type ArlR = crate::BitReader; -impl ArlR { +pub type ARL_R = crate::BitReader; +impl ARL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arl { + pub const fn variant(&self) -> ARL_A { match self.bits { - false => Arl::Value1, - true => Arl::Value2, + false => ARL_A::VALUE1, + true => ARL_A::VALUE2, } } #[doc = "An arbitration has not been lost."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arl::Value1 + *self == ARL_A::VALUE1 } #[doc = "An arbitration has been lost."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arl::Value2 + *self == ARL_A::VALUE2 } } #[doc = "Field `ARL` writer - Arbitration Lost"] -pub type ArlW<'a, REG> = crate::BitWriter<'a, REG, Arl>; -impl<'a, REG> ArlW<'a, REG> +pub type ARL_W<'a, REG> = crate::BitWriter<'a, REG, ARL_A>; +impl<'a, REG> ARL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An arbitration has not been lost."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arl::Value1) + self.variant(ARL_A::VALUE1) } #[doc = "An arbitration has been lost."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arl::Value2) + self.variant(ARL_A::VALUE2) } } #[doc = "Slave Read Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srr { +pub enum SRR_A { #[doc = "0: A slave read request has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A slave read request has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srr) -> Self { + fn from(variant: SRR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRR` reader - Slave Read Request"] -pub type SrrR = crate::BitReader; -impl SrrR { +pub type SRR_R = crate::BitReader; +impl SRR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srr { + pub const fn variant(&self) -> SRR_A { match self.bits { - false => Srr::Value1, - true => Srr::Value2, + false => SRR_A::VALUE1, + true => SRR_A::VALUE2, } } #[doc = "A slave read request has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srr::Value1 + *self == SRR_A::VALUE1 } #[doc = "A slave read request has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srr::Value2 + *self == SRR_A::VALUE2 } } #[doc = "Field `SRR` writer - Slave Read Request"] -pub type SrrW<'a, REG> = crate::BitWriter<'a, REG, Srr>; -impl<'a, REG> SrrW<'a, REG> +pub type SRR_W<'a, REG> = crate::BitWriter<'a, REG, SRR_A>; +impl<'a, REG> SRR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A slave read request has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srr::Value1) + self.variant(SRR_A::VALUE1) } #[doc = "A slave read request has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srr::Value2) + self.variant(SRR_A::VALUE2) } } #[doc = "Error\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Err { +pub enum ERR_A { #[doc = "0: An IIC error has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An IIC error has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Err) -> Self { + fn from(variant: ERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ERR` reader - Error"] -pub type ErrR = crate::BitReader; -impl ErrR { +pub type ERR_R = crate::BitReader; +impl ERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Err { + pub const fn variant(&self) -> ERR_A { match self.bits { - false => Err::Value1, - true => Err::Value2, + false => ERR_A::VALUE1, + true => ERR_A::VALUE2, } } #[doc = "An IIC error has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Err::Value1 + *self == ERR_A::VALUE1 } #[doc = "An IIC error has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Err::Value2 + *self == ERR_A::VALUE2 } } #[doc = "Field `ERR` writer - Error"] -pub type ErrW<'a, REG> = crate::BitWriter<'a, REG, Err>; -impl<'a, REG> ErrW<'a, REG> +pub type ERR_W<'a, REG> = crate::BitWriter<'a, REG, ERR_A>; +impl<'a, REG> ERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An IIC error has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Err::Value1) + self.variant(ERR_A::VALUE1) } #[doc = "An IIC error has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Err::Value2) + self.variant(ERR_A::VALUE2) } } #[doc = "Acknowledge Received\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ack { +pub enum ACK_A { #[doc = "0: An acknowledge has not been received."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An acknowledge has been received."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ack) -> Self { + fn from(variant: ACK_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ACK` reader - Acknowledge Received"] -pub type AckR = crate::BitReader; -impl AckR { +pub type ACK_R = crate::BitReader; +impl ACK_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ack { + pub const fn variant(&self) -> ACK_A { match self.bits { - false => Ack::Value1, - true => Ack::Value2, + false => ACK_A::VALUE1, + true => ACK_A::VALUE2, } } #[doc = "An acknowledge has not been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ack::Value1 + *self == ACK_A::VALUE1 } #[doc = "An acknowledge has been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ack::Value2 + *self == ACK_A::VALUE2 } } #[doc = "Field `ACK` writer - Acknowledge Received"] -pub type AckW<'a, REG> = crate::BitWriter<'a, REG, Ack>; -impl<'a, REG> AckW<'a, REG> +pub type ACK_W<'a, REG> = crate::BitWriter<'a, REG, ACK_A>; +impl<'a, REG> ACK_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An acknowledge has not been received."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ack::Value1) + self.variant(ACK_A::VALUE1) } #[doc = "An acknowledge has been received."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ack::Value2) + self.variant(ACK_A::VALUE2) } } #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsif { +pub enum RSIF_A { #[doc = "0: A receiver start event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receiver start event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsif) -> Self { + fn from(variant: RSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RsifR = crate::BitReader; -impl RsifR { +pub type RSIF_R = crate::BitReader; +impl RSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsif { + pub const fn variant(&self) -> RSIF_A { match self.bits { - false => Rsif::Value1, - true => Rsif::Value2, + false => RSIF_A::VALUE1, + true => RSIF_A::VALUE2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsif::Value1 + *self == RSIF_A::VALUE1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsif::Value2 + *self == RSIF_A::VALUE2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; -impl<'a, REG> RsifW<'a, REG> +pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; +impl<'a, REG> RSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsif::Value1) + self.variant(RSIF_A::VALUE1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsif::Value2) + self.variant(RSIF_A::VALUE2) } } #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlif { +pub enum DLIF_A { #[doc = "0: A data lost event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data lost event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlif) -> Self { + fn from(variant: DLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DlifR = crate::BitReader; -impl DlifR { +pub type DLIF_R = crate::BitReader; +impl DLIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlif { + pub const fn variant(&self) -> DLIF_A { match self.bits { - false => Dlif::Value1, - true => Dlif::Value2, + false => DLIF_A::VALUE1, + true => DLIF_A::VALUE2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlif::Value1 + *self == DLIF_A::VALUE1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlif::Value2 + *self == DLIF_A::VALUE2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; -impl<'a, REG> DlifW<'a, REG> +pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; +impl<'a, REG> DLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlif::Value1) + self.variant(DLIF_A::VALUE1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlif::Value2) + self.variant(DLIF_A::VALUE2) } } #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsif { +pub enum TSIF_A { #[doc = "0: A transmit shift event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit shift event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsif) -> Self { + fn from(variant: TSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TsifR = crate::BitReader; -impl TsifR { +pub type TSIF_R = crate::BitReader; +impl TSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsif { + pub const fn variant(&self) -> TSIF_A { match self.bits { - false => Tsif::Value1, - true => Tsif::Value2, + false => TSIF_A::VALUE1, + true => TSIF_A::VALUE2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsif::Value1 + *self == TSIF_A::VALUE1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsif::Value2 + *self == TSIF_A::VALUE2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; -impl<'a, REG> TsifW<'a, REG> +pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; +impl<'a, REG> TSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsif::Value1) + self.variant(TSIF_A::VALUE1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsif::Value2) + self.variant(TSIF_A::VALUE2) } } #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbif { +pub enum TBIF_A { #[doc = "0: A transmit buffer event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbif) -> Self { + fn from(variant: TBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TbifR = crate::BitReader; -impl TbifR { +pub type TBIF_R = crate::BitReader; +impl TBIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbif { + pub const fn variant(&self) -> TBIF_A { match self.bits { - false => Tbif::Value1, - true => Tbif::Value2, + false => TBIF_A::VALUE1, + true => TBIF_A::VALUE2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbif::Value1 + *self == TBIF_A::VALUE1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbif::Value2 + *self == TBIF_A::VALUE2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; -impl<'a, REG> TbifW<'a, REG> +pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; +impl<'a, REG> TBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbif::Value1) + self.variant(TBIF_A::VALUE1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbif::Value2) + self.variant(TBIF_A::VALUE2) } } #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rif { +pub enum RIF_A { #[doc = "0: A receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rif) -> Self { + fn from(variant: RIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RifR = crate::BitReader; -impl RifR { +pub type RIF_R = crate::BitReader; +impl RIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rif { + pub const fn variant(&self) -> RIF_A { match self.bits { - false => Rif::Value1, - true => Rif::Value2, + false => RIF_A::VALUE1, + true => RIF_A::VALUE2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rif::Value1 + *self == RIF_A::VALUE1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rif::Value2 + *self == RIF_A::VALUE2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; -impl<'a, REG> RifW<'a, REG> +pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; +impl<'a, REG> RIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rif::Value1) + self.variant(RIF_A::VALUE1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rif::Value2) + self.variant(RIF_A::VALUE2) } } #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aif { +pub enum AIF_A { #[doc = "0: An alternative receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aif) -> Self { + fn from(variant: AIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AifR = crate::BitReader; -impl AifR { +pub type AIF_R = crate::BitReader; +impl AIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aif { + pub const fn variant(&self) -> AIF_A { match self.bits { - false => Aif::Value1, - true => Aif::Value2, + false => AIF_A::VALUE1, + true => AIF_A::VALUE2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aif::Value1 + *self == AIF_A::VALUE1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aif::Value2 + *self == AIF_A::VALUE2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; -impl<'a, REG> AifW<'a, REG> +pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; +impl<'a, REG> AIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aif::Value1) + self.variant(AIF_A::VALUE1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aif::Value2) + self.variant(AIF_A::VALUE2) } } #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgif { +pub enum BRGIF_A { #[doc = "0: A baud rate generator event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A baud rate generator event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgif) -> Self { + fn from(variant: BRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BrgifR = crate::BitReader; -impl BrgifR { +pub type BRGIF_R = crate::BitReader; +impl BRGIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgif { + pub const fn variant(&self) -> BRGIF_A { match self.bits { - false => Brgif::Value1, - true => Brgif::Value2, + false => BRGIF_A::VALUE1, + true => BRGIF_A::VALUE2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgif::Value1 + *self == BRGIF_A::VALUE1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgif::Value2 + *self == BRGIF_A::VALUE2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; -impl<'a, REG> BrgifW<'a, REG> +pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; +impl<'a, REG> BRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgif::Value1) + self.variant(BRGIF_A::VALUE1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgif::Value2) + self.variant(BRGIF_A::VALUE2) } } impl R { #[doc = "Bit 0 - Slave Select"] #[inline(always)] - pub fn slsel(&self) -> SlselR { - SlselR::new((self.bits & 1) != 0) + pub fn slsel(&self) -> SLSEL_R { + SLSEL_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Wrong TDF Code Found"] #[inline(always)] - pub fn wtdf(&self) -> WtdfR { - WtdfR::new(((self.bits >> 1) & 1) != 0) + pub fn wtdf(&self) -> WTDF_R { + WTDF_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Start Condition Received"] #[inline(always)] - pub fn scr(&self) -> ScrR { - ScrR::new(((self.bits >> 2) & 1) != 0) + pub fn scr(&self) -> SCR_R { + SCR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Repeated Start Condition Received"] #[inline(always)] - pub fn rscr(&self) -> RscrR { - RscrR::new(((self.bits >> 3) & 1) != 0) + pub fn rscr(&self) -> RSCR_R { + RSCR_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Stop Condition Received"] #[inline(always)] - pub fn pcr(&self) -> PcrR { - PcrR::new(((self.bits >> 4) & 1) != 0) + pub fn pcr(&self) -> PCR_R { + PCR_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Non-Acknowledge Received"] #[inline(always)] - pub fn nack(&self) -> NackR { - NackR::new(((self.bits >> 5) & 1) != 0) + pub fn nack(&self) -> NACK_R { + NACK_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Arbitration Lost"] #[inline(always)] - pub fn arl(&self) -> ArlR { - ArlR::new(((self.bits >> 6) & 1) != 0) + pub fn arl(&self) -> ARL_R { + ARL_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Slave Read Request"] #[inline(always)] - pub fn srr(&self) -> SrrR { - SrrR::new(((self.bits >> 7) & 1) != 0) + pub fn srr(&self) -> SRR_R { + SRR_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Error"] #[inline(always)] - pub fn err(&self) -> ErrR { - ErrR::new(((self.bits >> 8) & 1) != 0) + pub fn err(&self) -> ERR_R { + ERR_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Acknowledge Received"] #[inline(always)] - pub fn ack(&self) -> AckR { - AckR::new(((self.bits >> 9) & 1) != 0) + pub fn ack(&self) -> ACK_R { + ACK_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RsifR { - RsifR::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RSIF_R { + RSIF_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DlifR { - DlifR::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DLIF_R { + DLIF_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TsifR { - TsifR::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TSIF_R { + TSIF_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TbifR { - TbifR::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TBIF_R { + TBIF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RifR { - RifR::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RIF_R { + RIF_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AifR { - AifR::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AIF_R { + AIF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BrgifR { - BrgifR::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BRGIF_R { + BRGIF_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Slave Select"] #[inline(always)] #[must_use] - pub fn slsel(&mut self) -> SlselW { - SlselW::new(self, 0) + pub fn slsel(&mut self) -> SLSEL_W { + SLSEL_W::new(self, 0) } #[doc = "Bit 1 - Wrong TDF Code Found"] #[inline(always)] #[must_use] - pub fn wtdf(&mut self) -> WtdfW { - WtdfW::new(self, 1) + pub fn wtdf(&mut self) -> WTDF_W { + WTDF_W::new(self, 1) } #[doc = "Bit 2 - Start Condition Received"] #[inline(always)] #[must_use] - pub fn scr(&mut self) -> ScrW { - ScrW::new(self, 2) + pub fn scr(&mut self) -> SCR_W { + SCR_W::new(self, 2) } #[doc = "Bit 3 - Repeated Start Condition Received"] #[inline(always)] #[must_use] - pub fn rscr(&mut self) -> RscrW { - RscrW::new(self, 3) + pub fn rscr(&mut self) -> RSCR_W { + RSCR_W::new(self, 3) } #[doc = "Bit 4 - Stop Condition Received"] #[inline(always)] #[must_use] - pub fn pcr(&mut self) -> PcrW { - PcrW::new(self, 4) + pub fn pcr(&mut self) -> PCR_W { + PCR_W::new(self, 4) } #[doc = "Bit 5 - Non-Acknowledge Received"] #[inline(always)] #[must_use] - pub fn nack(&mut self) -> NackW { - NackW::new(self, 5) + pub fn nack(&mut self) -> NACK_W { + NACK_W::new(self, 5) } #[doc = "Bit 6 - Arbitration Lost"] #[inline(always)] #[must_use] - pub fn arl(&mut self) -> ArlW { - ArlW::new(self, 6) + pub fn arl(&mut self) -> ARL_W { + ARL_W::new(self, 6) } #[doc = "Bit 7 - Slave Read Request"] #[inline(always)] #[must_use] - pub fn srr(&mut self) -> SrrW { - SrrW::new(self, 7) + pub fn srr(&mut self) -> SRR_W { + SRR_W::new(self, 7) } #[doc = "Bit 8 - Error"] #[inline(always)] #[must_use] - pub fn err(&mut self) -> ErrW { - ErrW::new(self, 8) + pub fn err(&mut self) -> ERR_W { + ERR_W::new(self, 8) } #[doc = "Bit 9 - Acknowledge Received"] #[inline(always)] #[must_use] - pub fn ack(&mut self) -> AckW { - AckW::new(self, 9) + pub fn ack(&mut self) -> ACK_W { + ACK_W::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RsifW { - RsifW::new(self, 10) + pub fn rsif(&mut self) -> RSIF_W { + RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DlifW { - DlifW::new(self, 11) + pub fn dlif(&mut self) -> DLIF_W { + DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TsifW { - TsifW::new(self, 12) + pub fn tsif(&mut self) -> TSIF_W { + TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TbifW { - TbifW::new(self, 13) + pub fn tbif(&mut self) -> TBIF_W { + TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RifW { - RifW::new(self, 14) + pub fn rif(&mut self) -> RIF_W { + RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AifW { - AifW::new(self, 15) + pub fn aif(&mut self) -> AIF_W { + AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BrgifW { - BrgifW::new(self, 16) + pub fn brgif(&mut self) -> BRGIF_W { + BRGIF_W::new(self, 16) } } #[doc = "Protocol Status Register \\[IIC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iicmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iicmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsrIicmodeSpec; -impl crate::RegisterSpec for PsrIicmodeSpec { +pub struct PSR_IICMODE_SPEC; +impl crate::RegisterSpec for PSR_IICMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psr_iicmode::R`](R) reader structure"] -impl crate::Readable for PsrIicmodeSpec {} +impl crate::Readable for PSR_IICMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`psr_iicmode::W`](W) writer structure"] -impl crate::Writable for PsrIicmodeSpec { +impl crate::Writable for PSR_IICMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_IICMode to value 0"] -impl crate::Resettable for PsrIicmodeSpec { +impl crate::Resettable for PSR_IICMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_iismode.rs b/src/usic0_ch0/psr_iismode.rs index 5dbb63c5..0d8f4b82 100644 --- a/src/usic0_ch0/psr_iismode.rs +++ b/src/usic0_ch0/psr_iismode.rs @@ -1,857 +1,857 @@ #[doc = "Register `PSR_IISMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_IISMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Word Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wa { +pub enum WA_A { #[doc = "0: WA has been sampled 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: WA has been sampled 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wa) -> Self { + fn from(variant: WA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WA` reader - Word Address"] -pub type WaR = crate::BitReader; -impl WaR { +pub type WA_R = crate::BitReader; +impl WA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wa { + pub const fn variant(&self) -> WA_A { match self.bits { - false => Wa::Value1, - true => Wa::Value2, + false => WA_A::VALUE1, + true => WA_A::VALUE2, } } #[doc = "WA has been sampled 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wa::Value1 + *self == WA_A::VALUE1 } #[doc = "WA has been sampled 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wa::Value2 + *self == WA_A::VALUE2 } } #[doc = "Field `WA` writer - Word Address"] -pub type WaW<'a, REG> = crate::BitWriter<'a, REG, Wa>; -impl<'a, REG> WaW<'a, REG> +pub type WA_W<'a, REG> = crate::BitWriter<'a, REG, WA_A>; +impl<'a, REG> WA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "WA has been sampled 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wa::Value1) + self.variant(WA_A::VALUE1) } #[doc = "WA has been sampled 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wa::Value2) + self.variant(WA_A::VALUE2) } } #[doc = "DX2S Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2s { +pub enum DX2S_A { #[doc = "0: DX2S is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DX2S is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2s) -> Self { + fn from(variant: DX2S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2S` reader - DX2S Status"] -pub type Dx2sR = crate::BitReader; -impl Dx2sR { +pub type DX2S_R = crate::BitReader; +impl DX2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2s { + pub const fn variant(&self) -> DX2S_A { match self.bits { - false => Dx2s::Value1, - true => Dx2s::Value2, + false => DX2S_A::VALUE1, + true => DX2S_A::VALUE2, } } #[doc = "DX2S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2s::Value1 + *self == DX2S_A::VALUE1 } #[doc = "DX2S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2s::Value2 + *self == DX2S_A::VALUE2 } } #[doc = "Field `DX2S` writer - DX2S Status"] -pub type Dx2sW<'a, REG> = crate::BitWriter<'a, REG, Dx2s>; -impl<'a, REG> Dx2sW<'a, REG> +pub type DX2S_W<'a, REG> = crate::BitWriter<'a, REG, DX2S_A>; +impl<'a, REG> DX2S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DX2S is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2s::Value1) + self.variant(DX2S_A::VALUE1) } #[doc = "DX2S is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2s::Value2) + self.variant(DX2S_A::VALUE2) } } #[doc = "DX2T Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2tev { +pub enum DX2TEV_A { #[doc = "0: The DX2T signal has not been activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The DX2T signal has been activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2tev) -> Self { + fn from(variant: DX2TEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2TEV` reader - DX2T Event Detected"] -pub type Dx2tevR = crate::BitReader; -impl Dx2tevR { +pub type DX2TEV_R = crate::BitReader; +impl DX2TEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2tev { + pub const fn variant(&self) -> DX2TEV_A { match self.bits { - false => Dx2tev::Value1, - true => Dx2tev::Value2, + false => DX2TEV_A::VALUE1, + true => DX2TEV_A::VALUE2, } } #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2tev::Value1 + *self == DX2TEV_A::VALUE1 } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2tev::Value2 + *self == DX2TEV_A::VALUE2 } } #[doc = "Field `DX2TEV` writer - DX2T Event Detected"] -pub type Dx2tevW<'a, REG> = crate::BitWriter<'a, REG, Dx2tev>; -impl<'a, REG> Dx2tevW<'a, REG> +pub type DX2TEV_W<'a, REG> = crate::BitWriter<'a, REG, DX2TEV_A>; +impl<'a, REG> DX2TEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2tev::Value1) + self.variant(DX2TEV_A::VALUE1) } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2tev::Value2) + self.variant(DX2TEV_A::VALUE2) } } #[doc = "WA Falling Edge Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wafe { +pub enum WAFE_A { #[doc = "0: A WA falling edge has not been generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A WA falling edge has been generated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wafe) -> Self { + fn from(variant: WAFE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WAFE` reader - WA Falling Edge Event"] -pub type WafeR = crate::BitReader; -impl WafeR { +pub type WAFE_R = crate::BitReader; +impl WAFE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wafe { + pub const fn variant(&self) -> WAFE_A { match self.bits { - false => Wafe::Value1, - true => Wafe::Value2, + false => WAFE_A::VALUE1, + true => WAFE_A::VALUE2, } } #[doc = "A WA falling edge has not been generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wafe::Value1 + *self == WAFE_A::VALUE1 } #[doc = "A WA falling edge has been generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wafe::Value2 + *self == WAFE_A::VALUE2 } } #[doc = "Field `WAFE` writer - WA Falling Edge Event"] -pub type WafeW<'a, REG> = crate::BitWriter<'a, REG, Wafe>; -impl<'a, REG> WafeW<'a, REG> +pub type WAFE_W<'a, REG> = crate::BitWriter<'a, REG, WAFE_A>; +impl<'a, REG> WAFE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A WA falling edge has not been generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wafe::Value1) + self.variant(WAFE_A::VALUE1) } #[doc = "A WA falling edge has been generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wafe::Value2) + self.variant(WAFE_A::VALUE2) } } #[doc = "WA Rising Edge Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ware { +pub enum WARE_A { #[doc = "0: A WA rising edge has not been generated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A WA rising edge has been generated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ware) -> Self { + fn from(variant: WARE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WARE` reader - WA Rising Edge Event"] -pub type WareR = crate::BitReader; -impl WareR { +pub type WARE_R = crate::BitReader; +impl WARE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ware { + pub const fn variant(&self) -> WARE_A { match self.bits { - false => Ware::Value1, - true => Ware::Value2, + false => WARE_A::VALUE1, + true => WARE_A::VALUE2, } } #[doc = "A WA rising edge has not been generated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ware::Value1 + *self == WARE_A::VALUE1 } #[doc = "A WA rising edge has been generated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ware::Value2 + *self == WARE_A::VALUE2 } } #[doc = "Field `WARE` writer - WA Rising Edge Event"] -pub type WareW<'a, REG> = crate::BitWriter<'a, REG, Ware>; -impl<'a, REG> WareW<'a, REG> +pub type WARE_W<'a, REG> = crate::BitWriter<'a, REG, WARE_A>; +impl<'a, REG> WARE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A WA rising edge has not been generated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ware::Value1) + self.variant(WARE_A::VALUE1) } #[doc = "A WA rising edge has been generated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ware::Value2) + self.variant(WARE_A::VALUE2) } } #[doc = "WA Generation End\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum End { +pub enum END_A { #[doc = "0: The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The WA generation has ended (if it has been running)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: End) -> Self { + fn from(variant: END_A) -> Self { variant as u8 != 0 } } #[doc = "Field `END` reader - WA Generation End"] -pub type EndR = crate::BitReader; -impl EndR { +pub type END_R = crate::BitReader; +impl END_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> End { + pub const fn variant(&self) -> END_A { match self.bits { - false => End::Value1, - true => End::Value2, + false => END_A::VALUE1, + true => END_A::VALUE2, } } #[doc = "The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == End::Value1 + *self == END_A::VALUE1 } #[doc = "The WA generation has ended (if it has been running)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == End::Value2 + *self == END_A::VALUE2 } } #[doc = "Field `END` writer - WA Generation End"] -pub type EndW<'a, REG> = crate::BitWriter<'a, REG, End>; -impl<'a, REG> EndW<'a, REG> +pub type END_W<'a, REG> = crate::BitWriter<'a, REG, END_A>; +impl<'a, REG> END_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The WA generation has not yet ended (if it is running and WAGEN has been cleared)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(End::Value1) + self.variant(END_A::VALUE1) } #[doc = "The WA generation has ended (if it has been running)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(End::Value2) + self.variant(END_A::VALUE2) } } #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsif { +pub enum RSIF_A { #[doc = "0: A receiver start event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receiver start event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsif) -> Self { + fn from(variant: RSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RsifR = crate::BitReader; -impl RsifR { +pub type RSIF_R = crate::BitReader; +impl RSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsif { + pub const fn variant(&self) -> RSIF_A { match self.bits { - false => Rsif::Value1, - true => Rsif::Value2, + false => RSIF_A::VALUE1, + true => RSIF_A::VALUE2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsif::Value1 + *self == RSIF_A::VALUE1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsif::Value2 + *self == RSIF_A::VALUE2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; -impl<'a, REG> RsifW<'a, REG> +pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; +impl<'a, REG> RSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsif::Value1) + self.variant(RSIF_A::VALUE1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsif::Value2) + self.variant(RSIF_A::VALUE2) } } #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlif { +pub enum DLIF_A { #[doc = "0: A data lost event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data lost event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlif) -> Self { + fn from(variant: DLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DlifR = crate::BitReader; -impl DlifR { +pub type DLIF_R = crate::BitReader; +impl DLIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlif { + pub const fn variant(&self) -> DLIF_A { match self.bits { - false => Dlif::Value1, - true => Dlif::Value2, + false => DLIF_A::VALUE1, + true => DLIF_A::VALUE2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlif::Value1 + *self == DLIF_A::VALUE1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlif::Value2 + *self == DLIF_A::VALUE2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; -impl<'a, REG> DlifW<'a, REG> +pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; +impl<'a, REG> DLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlif::Value1) + self.variant(DLIF_A::VALUE1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlif::Value2) + self.variant(DLIF_A::VALUE2) } } #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsif { +pub enum TSIF_A { #[doc = "0: A transmit shift event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit shift event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsif) -> Self { + fn from(variant: TSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TsifR = crate::BitReader; -impl TsifR { +pub type TSIF_R = crate::BitReader; +impl TSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsif { + pub const fn variant(&self) -> TSIF_A { match self.bits { - false => Tsif::Value1, - true => Tsif::Value2, + false => TSIF_A::VALUE1, + true => TSIF_A::VALUE2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsif::Value1 + *self == TSIF_A::VALUE1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsif::Value2 + *self == TSIF_A::VALUE2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; -impl<'a, REG> TsifW<'a, REG> +pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; +impl<'a, REG> TSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsif::Value1) + self.variant(TSIF_A::VALUE1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsif::Value2) + self.variant(TSIF_A::VALUE2) } } #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbif { +pub enum TBIF_A { #[doc = "0: A transmit buffer event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbif) -> Self { + fn from(variant: TBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TbifR = crate::BitReader; -impl TbifR { +pub type TBIF_R = crate::BitReader; +impl TBIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbif { + pub const fn variant(&self) -> TBIF_A { match self.bits { - false => Tbif::Value1, - true => Tbif::Value2, + false => TBIF_A::VALUE1, + true => TBIF_A::VALUE2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbif::Value1 + *self == TBIF_A::VALUE1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbif::Value2 + *self == TBIF_A::VALUE2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; -impl<'a, REG> TbifW<'a, REG> +pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; +impl<'a, REG> TBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbif::Value1) + self.variant(TBIF_A::VALUE1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbif::Value2) + self.variant(TBIF_A::VALUE2) } } #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rif { +pub enum RIF_A { #[doc = "0: A receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rif) -> Self { + fn from(variant: RIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RifR = crate::BitReader; -impl RifR { +pub type RIF_R = crate::BitReader; +impl RIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rif { + pub const fn variant(&self) -> RIF_A { match self.bits { - false => Rif::Value1, - true => Rif::Value2, + false => RIF_A::VALUE1, + true => RIF_A::VALUE2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rif::Value1 + *self == RIF_A::VALUE1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rif::Value2 + *self == RIF_A::VALUE2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; -impl<'a, REG> RifW<'a, REG> +pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; +impl<'a, REG> RIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rif::Value1) + self.variant(RIF_A::VALUE1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rif::Value2) + self.variant(RIF_A::VALUE2) } } #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aif { +pub enum AIF_A { #[doc = "0: An alternative receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aif) -> Self { + fn from(variant: AIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AifR = crate::BitReader; -impl AifR { +pub type AIF_R = crate::BitReader; +impl AIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aif { + pub const fn variant(&self) -> AIF_A { match self.bits { - false => Aif::Value1, - true => Aif::Value2, + false => AIF_A::VALUE1, + true => AIF_A::VALUE2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aif::Value1 + *self == AIF_A::VALUE1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aif::Value2 + *self == AIF_A::VALUE2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; -impl<'a, REG> AifW<'a, REG> +pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; +impl<'a, REG> AIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aif::Value1) + self.variant(AIF_A::VALUE1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aif::Value2) + self.variant(AIF_A::VALUE2) } } #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgif { +pub enum BRGIF_A { #[doc = "0: A baud rate generator event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A baud rate generator event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgif) -> Self { + fn from(variant: BRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BrgifR = crate::BitReader; -impl BrgifR { +pub type BRGIF_R = crate::BitReader; +impl BRGIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgif { + pub const fn variant(&self) -> BRGIF_A { match self.bits { - false => Brgif::Value1, - true => Brgif::Value2, + false => BRGIF_A::VALUE1, + true => BRGIF_A::VALUE2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgif::Value1 + *self == BRGIF_A::VALUE1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgif::Value2 + *self == BRGIF_A::VALUE2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; -impl<'a, REG> BrgifW<'a, REG> +pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; +impl<'a, REG> BRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgif::Value1) + self.variant(BRGIF_A::VALUE1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgif::Value2) + self.variant(BRGIF_A::VALUE2) } } impl R { #[doc = "Bit 0 - Word Address"] #[inline(always)] - pub fn wa(&self) -> WaR { - WaR::new((self.bits & 1) != 0) + pub fn wa(&self) -> WA_R { + WA_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - pub fn dx2s(&self) -> Dx2sR { - Dx2sR::new(((self.bits >> 1) & 1) != 0) + pub fn dx2s(&self) -> DX2S_R { + DX2S_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - pub fn dx2tev(&self) -> Dx2tevR { - Dx2tevR::new(((self.bits >> 3) & 1) != 0) + pub fn dx2tev(&self) -> DX2TEV_R { + DX2TEV_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - WA Falling Edge Event"] #[inline(always)] - pub fn wafe(&self) -> WafeR { - WafeR::new(((self.bits >> 4) & 1) != 0) + pub fn wafe(&self) -> WAFE_R { + WAFE_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - WA Rising Edge Event"] #[inline(always)] - pub fn ware(&self) -> WareR { - WareR::new(((self.bits >> 5) & 1) != 0) + pub fn ware(&self) -> WARE_R { + WARE_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - WA Generation End"] #[inline(always)] - pub fn end(&self) -> EndR { - EndR::new(((self.bits >> 6) & 1) != 0) + pub fn end(&self) -> END_R { + END_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RsifR { - RsifR::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RSIF_R { + RSIF_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DlifR { - DlifR::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DLIF_R { + DLIF_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TsifR { - TsifR::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TSIF_R { + TSIF_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TbifR { - TbifR::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TBIF_R { + TBIF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RifR { - RifR::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RIF_R { + RIF_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AifR { - AifR::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AIF_R { + AIF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BrgifR { - BrgifR::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BRGIF_R { + BRGIF_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - Word Address"] #[inline(always)] #[must_use] - pub fn wa(&mut self) -> WaW { - WaW::new(self, 0) + pub fn wa(&mut self) -> WA_W { + WA_W::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] #[must_use] - pub fn dx2s(&mut self) -> Dx2sW { - Dx2sW::new(self, 1) + pub fn dx2s(&mut self) -> DX2S_W { + DX2S_W::new(self, 1) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] #[must_use] - pub fn dx2tev(&mut self) -> Dx2tevW { - Dx2tevW::new(self, 3) + pub fn dx2tev(&mut self) -> DX2TEV_W { + DX2TEV_W::new(self, 3) } #[doc = "Bit 4 - WA Falling Edge Event"] #[inline(always)] #[must_use] - pub fn wafe(&mut self) -> WafeW { - WafeW::new(self, 4) + pub fn wafe(&mut self) -> WAFE_W { + WAFE_W::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Event"] #[inline(always)] #[must_use] - pub fn ware(&mut self) -> WareW { - WareW::new(self, 5) + pub fn ware(&mut self) -> WARE_W { + WARE_W::new(self, 5) } #[doc = "Bit 6 - WA Generation End"] #[inline(always)] #[must_use] - pub fn end(&mut self) -> EndW { - EndW::new(self, 6) + pub fn end(&mut self) -> END_W { + END_W::new(self, 6) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RsifW { - RsifW::new(self, 10) + pub fn rsif(&mut self) -> RSIF_W { + RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DlifW { - DlifW::new(self, 11) + pub fn dlif(&mut self) -> DLIF_W { + DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TsifW { - TsifW::new(self, 12) + pub fn tsif(&mut self) -> TSIF_W { + TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TbifW { - TbifW::new(self, 13) + pub fn tbif(&mut self) -> TBIF_W { + TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RifW { - RifW::new(self, 14) + pub fn rif(&mut self) -> RIF_W { + RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AifW { - AifW::new(self, 15) + pub fn aif(&mut self) -> AIF_W { + AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BrgifW { - BrgifW::new(self, 16) + pub fn brgif(&mut self) -> BRGIF_W { + BRGIF_W::new(self, 16) } } #[doc = "Protocol Status Register \\[IIS Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_iismode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_iismode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsrIismodeSpec; -impl crate::RegisterSpec for PsrIismodeSpec { +pub struct PSR_IISMODE_SPEC; +impl crate::RegisterSpec for PSR_IISMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psr_iismode::R`](R) reader structure"] -impl crate::Readable for PsrIismodeSpec {} +impl crate::Readable for PSR_IISMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`psr_iismode::W`](W) writer structure"] -impl crate::Writable for PsrIismodeSpec { +impl crate::Writable for PSR_IISMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_IISMode to value 0"] -impl crate::Resettable for PsrIismodeSpec { +impl crate::Resettable for PSR_IISMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/psr_sscmode.rs b/src/usic0_ch0/psr_sscmode.rs index 59a66def..78b4fe50 100644 --- a/src/usic0_ch0/psr_sscmode.rs +++ b/src/usic0_ch0/psr_sscmode.rs @@ -1,793 +1,793 @@ #[doc = "Register `PSR_SSCMode` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `PSR_SSCMode` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "MSLS Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Msls { +pub enum MSLS_A { #[doc = "0: The internal signal MSLS is inactive (0)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The internal signal MSLS is active (1)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Msls) -> Self { + fn from(variant: MSLS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSLS` reader - MSLS Status"] -pub type MslsR = crate::BitReader; -impl MslsR { +pub type MSLS_R = crate::BitReader; +impl MSLS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Msls { + pub const fn variant(&self) -> MSLS_A { match self.bits { - false => Msls::Value1, - true => Msls::Value2, + false => MSLS_A::VALUE1, + true => MSLS_A::VALUE2, } } #[doc = "The internal signal MSLS is inactive (0)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Msls::Value1 + *self == MSLS_A::VALUE1 } #[doc = "The internal signal MSLS is active (1)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Msls::Value2 + *self == MSLS_A::VALUE2 } } #[doc = "Field `MSLS` writer - MSLS Status"] -pub type MslsW<'a, REG> = crate::BitWriter<'a, REG, Msls>; -impl<'a, REG> MslsW<'a, REG> +pub type MSLS_W<'a, REG> = crate::BitWriter<'a, REG, MSLS_A>; +impl<'a, REG> MSLS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The internal signal MSLS is inactive (0)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Msls::Value1) + self.variant(MSLS_A::VALUE1) } #[doc = "The internal signal MSLS is active (1)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Msls::Value2) + self.variant(MSLS_A::VALUE2) } } #[doc = "DX2S Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2s { +pub enum DX2S_A { #[doc = "0: DX2S is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DX2S is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2s) -> Self { + fn from(variant: DX2S_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2S` reader - DX2S Status"] -pub type Dx2sR = crate::BitReader; -impl Dx2sR { +pub type DX2S_R = crate::BitReader; +impl DX2S_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2s { + pub const fn variant(&self) -> DX2S_A { match self.bits { - false => Dx2s::Value1, - true => Dx2s::Value2, + false => DX2S_A::VALUE1, + true => DX2S_A::VALUE2, } } #[doc = "DX2S is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2s::Value1 + *self == DX2S_A::VALUE1 } #[doc = "DX2S is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2s::Value2 + *self == DX2S_A::VALUE2 } } #[doc = "Field `DX2S` writer - DX2S Status"] -pub type Dx2sW<'a, REG> = crate::BitWriter<'a, REG, Dx2s>; -impl<'a, REG> Dx2sW<'a, REG> +pub type DX2S_W<'a, REG> = crate::BitWriter<'a, REG, DX2S_A>; +impl<'a, REG> DX2S_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "DX2S is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2s::Value1) + self.variant(DX2S_A::VALUE1) } #[doc = "DX2S is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2s::Value2) + self.variant(DX2S_A::VALUE2) } } #[doc = "MSLS Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mslsev { +pub enum MSLSEV_A { #[doc = "0: The MSLS signal has not changed its state."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The MSLS signal has changed its state."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mslsev) -> Self { + fn from(variant: MSLSEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MSLSEV` reader - MSLS Event Detected"] -pub type MslsevR = crate::BitReader; -impl MslsevR { +pub type MSLSEV_R = crate::BitReader; +impl MSLSEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Mslsev { + pub const fn variant(&self) -> MSLSEV_A { match self.bits { - false => Mslsev::Value1, - true => Mslsev::Value2, + false => MSLSEV_A::VALUE1, + true => MSLSEV_A::VALUE2, } } #[doc = "The MSLS signal has not changed its state."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Mslsev::Value1 + *self == MSLSEV_A::VALUE1 } #[doc = "The MSLS signal has changed its state."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Mslsev::Value2 + *self == MSLSEV_A::VALUE2 } } #[doc = "Field `MSLSEV` writer - MSLS Event Detected"] -pub type MslsevW<'a, REG> = crate::BitWriter<'a, REG, Mslsev>; -impl<'a, REG> MslsevW<'a, REG> +pub type MSLSEV_W<'a, REG> = crate::BitWriter<'a, REG, MSLSEV_A>; +impl<'a, REG> MSLSEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The MSLS signal has not changed its state."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mslsev::Value1) + self.variant(MSLSEV_A::VALUE1) } #[doc = "The MSLS signal has changed its state."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mslsev::Value2) + self.variant(MSLSEV_A::VALUE2) } } #[doc = "DX2T Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dx2tev { +pub enum DX2TEV_A { #[doc = "0: The DX2T signal has not been activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The DX2T signal has been activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dx2tev) -> Self { + fn from(variant: DX2TEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DX2TEV` reader - DX2T Event Detected"] -pub type Dx2tevR = crate::BitReader; -impl Dx2tevR { +pub type DX2TEV_R = crate::BitReader; +impl DX2TEV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dx2tev { + pub const fn variant(&self) -> DX2TEV_A { match self.bits { - false => Dx2tev::Value1, - true => Dx2tev::Value2, + false => DX2TEV_A::VALUE1, + true => DX2TEV_A::VALUE2, } } #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dx2tev::Value1 + *self == DX2TEV_A::VALUE1 } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dx2tev::Value2 + *self == DX2TEV_A::VALUE2 } } #[doc = "Field `DX2TEV` writer - DX2T Event Detected"] -pub type Dx2tevW<'a, REG> = crate::BitWriter<'a, REG, Dx2tev>; -impl<'a, REG> Dx2tevW<'a, REG> +pub type DX2TEV_W<'a, REG> = crate::BitWriter<'a, REG, DX2TEV_A>; +impl<'a, REG> DX2TEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The DX2T signal has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dx2tev::Value1) + self.variant(DX2TEV_A::VALUE1) } #[doc = "The DX2T signal has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dx2tev::Value2) + self.variant(DX2TEV_A::VALUE2) } } #[doc = "Parity Error Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Parerr { +pub enum PARERR_A { #[doc = "0: A parity error event has not been activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A parity error event has been activated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Parerr) -> Self { + fn from(variant: PARERR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PARERR` reader - Parity Error Event Detected"] -pub type ParerrR = crate::BitReader; -impl ParerrR { +pub type PARERR_R = crate::BitReader; +impl PARERR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Parerr { + pub const fn variant(&self) -> PARERR_A { match self.bits { - false => Parerr::Value1, - true => Parerr::Value2, + false => PARERR_A::VALUE1, + true => PARERR_A::VALUE2, } } #[doc = "A parity error event has not been activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Parerr::Value1 + *self == PARERR_A::VALUE1 } #[doc = "A parity error event has been activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Parerr::Value2 + *self == PARERR_A::VALUE2 } } #[doc = "Field `PARERR` writer - Parity Error Event Detected"] -pub type ParerrW<'a, REG> = crate::BitWriter<'a, REG, Parerr>; -impl<'a, REG> ParerrW<'a, REG> +pub type PARERR_W<'a, REG> = crate::BitWriter<'a, REG, PARERR_A>; +impl<'a, REG> PARERR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A parity error event has not been activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Parerr::Value1) + self.variant(PARERR_A::VALUE1) } #[doc = "A parity error event has been activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Parerr::Value2) + self.variant(PARERR_A::VALUE2) } } #[doc = "Receiver Start Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rsif { +pub enum RSIF_A { #[doc = "0: A receiver start event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receiver start event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rsif) -> Self { + fn from(variant: RSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RSIF` reader - Receiver Start Indication Flag"] -pub type RsifR = crate::BitReader; -impl RsifR { +pub type RSIF_R = crate::BitReader; +impl RSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rsif { + pub const fn variant(&self) -> RSIF_A { match self.bits { - false => Rsif::Value1, - true => Rsif::Value2, + false => RSIF_A::VALUE1, + true => RSIF_A::VALUE2, } } #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rsif::Value1 + *self == RSIF_A::VALUE1 } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rsif::Value2 + *self == RSIF_A::VALUE2 } } #[doc = "Field `RSIF` writer - Receiver Start Indication Flag"] -pub type RsifW<'a, REG> = crate::BitWriter<'a, REG, Rsif>; -impl<'a, REG> RsifW<'a, REG> +pub type RSIF_W<'a, REG> = crate::BitWriter<'a, REG, RSIF_A>; +impl<'a, REG> RSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receiver start event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rsif::Value1) + self.variant(RSIF_A::VALUE1) } #[doc = "A receiver start event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rsif::Value2) + self.variant(RSIF_A::VALUE2) } } #[doc = "Data Lost Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dlif { +pub enum DLIF_A { #[doc = "0: A data lost event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A data lost event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dlif) -> Self { + fn from(variant: DLIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DLIF` reader - Data Lost Indication Flag"] -pub type DlifR = crate::BitReader; -impl DlifR { +pub type DLIF_R = crate::BitReader; +impl DLIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dlif { + pub const fn variant(&self) -> DLIF_A { match self.bits { - false => Dlif::Value1, - true => Dlif::Value2, + false => DLIF_A::VALUE1, + true => DLIF_A::VALUE2, } } #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dlif::Value1 + *self == DLIF_A::VALUE1 } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dlif::Value2 + *self == DLIF_A::VALUE2 } } #[doc = "Field `DLIF` writer - Data Lost Indication Flag"] -pub type DlifW<'a, REG> = crate::BitWriter<'a, REG, Dlif>; -impl<'a, REG> DlifW<'a, REG> +pub type DLIF_W<'a, REG> = crate::BitWriter<'a, REG, DLIF_A>; +impl<'a, REG> DLIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A data lost event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dlif::Value1) + self.variant(DLIF_A::VALUE1) } #[doc = "A data lost event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dlif::Value2) + self.variant(DLIF_A::VALUE2) } } #[doc = "Transmit Shift Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsif { +pub enum TSIF_A { #[doc = "0: A transmit shift event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit shift event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsif) -> Self { + fn from(variant: TSIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSIF` reader - Transmit Shift Indication Flag"] -pub type TsifR = crate::BitReader; -impl TsifR { +pub type TSIF_R = crate::BitReader; +impl TSIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsif { + pub const fn variant(&self) -> TSIF_A { match self.bits { - false => Tsif::Value1, - true => Tsif::Value2, + false => TSIF_A::VALUE1, + true => TSIF_A::VALUE2, } } #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsif::Value1 + *self == TSIF_A::VALUE1 } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsif::Value2 + *self == TSIF_A::VALUE2 } } #[doc = "Field `TSIF` writer - Transmit Shift Indication Flag"] -pub type TsifW<'a, REG> = crate::BitWriter<'a, REG, Tsif>; -impl<'a, REG> TsifW<'a, REG> +pub type TSIF_W<'a, REG> = crate::BitWriter<'a, REG, TSIF_A>; +impl<'a, REG> TSIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit shift event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tsif::Value1) + self.variant(TSIF_A::VALUE1) } #[doc = "A transmit shift event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tsif::Value2) + self.variant(TSIF_A::VALUE2) } } #[doc = "Transmit Buffer Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbif { +pub enum TBIF_A { #[doc = "0: A transmit buffer event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbif) -> Self { + fn from(variant: TBIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBIF` reader - Transmit Buffer Indication Flag"] -pub type TbifR = crate::BitReader; -impl TbifR { +pub type TBIF_R = crate::BitReader; +impl TBIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbif { + pub const fn variant(&self) -> TBIF_A { match self.bits { - false => Tbif::Value1, - true => Tbif::Value2, + false => TBIF_A::VALUE1, + true => TBIF_A::VALUE2, } } #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbif::Value1 + *self == TBIF_A::VALUE1 } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbif::Value2 + *self == TBIF_A::VALUE2 } } #[doc = "Field `TBIF` writer - Transmit Buffer Indication Flag"] -pub type TbifW<'a, REG> = crate::BitWriter<'a, REG, Tbif>; -impl<'a, REG> TbifW<'a, REG> +pub type TBIF_W<'a, REG> = crate::BitWriter<'a, REG, TBIF_A>; +impl<'a, REG> TBIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tbif::Value1) + self.variant(TBIF_A::VALUE1) } #[doc = "A transmit buffer event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tbif::Value2) + self.variant(TBIF_A::VALUE2) } } #[doc = "Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rif { +pub enum RIF_A { #[doc = "0: A receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rif) -> Self { + fn from(variant: RIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RIF` reader - Receive Indication Flag"] -pub type RifR = crate::BitReader; -impl RifR { +pub type RIF_R = crate::BitReader; +impl RIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rif { + pub const fn variant(&self) -> RIF_A { match self.bits { - false => Rif::Value1, - true => Rif::Value2, + false => RIF_A::VALUE1, + true => RIF_A::VALUE2, } } #[doc = "A receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rif::Value1 + *self == RIF_A::VALUE1 } #[doc = "A receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rif::Value2 + *self == RIF_A::VALUE2 } } #[doc = "Field `RIF` writer - Receive Indication Flag"] -pub type RifW<'a, REG> = crate::BitWriter<'a, REG, Rif>; -impl<'a, REG> RifW<'a, REG> +pub type RIF_W<'a, REG> = crate::BitWriter<'a, REG, RIF_A>; +impl<'a, REG> RIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rif::Value1) + self.variant(RIF_A::VALUE1) } #[doc = "A receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rif::Value2) + self.variant(RIF_A::VALUE2) } } #[doc = "Alternative Receive Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Aif { +pub enum AIF_A { #[doc = "0: An alternative receive event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Aif) -> Self { + fn from(variant: AIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AIF` reader - Alternative Receive Indication Flag"] -pub type AifR = crate::BitReader; -impl AifR { +pub type AIF_R = crate::BitReader; +impl AIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Aif { + pub const fn variant(&self) -> AIF_A { match self.bits { - false => Aif::Value1, - true => Aif::Value2, + false => AIF_A::VALUE1, + true => AIF_A::VALUE2, } } #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Aif::Value1 + *self == AIF_A::VALUE1 } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Aif::Value2 + *self == AIF_A::VALUE2 } } #[doc = "Field `AIF` writer - Alternative Receive Indication Flag"] -pub type AifW<'a, REG> = crate::BitWriter<'a, REG, Aif>; -impl<'a, REG> AifW<'a, REG> +pub type AIF_W<'a, REG> = crate::BitWriter<'a, REG, AIF_A>; +impl<'a, REG> AIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Aif::Value1) + self.variant(AIF_A::VALUE1) } #[doc = "An alternative receive event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Aif::Value2) + self.variant(AIF_A::VALUE2) } } #[doc = "Baud Rate Generator Indication Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Brgif { +pub enum BRGIF_A { #[doc = "0: A baud rate generator event has not occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A baud rate generator event has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Brgif) -> Self { + fn from(variant: BRGIF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BRGIF` reader - Baud Rate Generator Indication Flag"] -pub type BrgifR = crate::BitReader; -impl BrgifR { +pub type BRGIF_R = crate::BitReader; +impl BRGIF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Brgif { + pub const fn variant(&self) -> BRGIF_A { match self.bits { - false => Brgif::Value1, - true => Brgif::Value2, + false => BRGIF_A::VALUE1, + true => BRGIF_A::VALUE2, } } #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Brgif::Value1 + *self == BRGIF_A::VALUE1 } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Brgif::Value2 + *self == BRGIF_A::VALUE2 } } #[doc = "Field `BRGIF` writer - Baud Rate Generator Indication Flag"] -pub type BrgifW<'a, REG> = crate::BitWriter<'a, REG, Brgif>; -impl<'a, REG> BrgifW<'a, REG> +pub type BRGIF_W<'a, REG> = crate::BitWriter<'a, REG, BRGIF_A>; +impl<'a, REG> BRGIF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A baud rate generator event has not occurred."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Brgif::Value1) + self.variant(BRGIF_A::VALUE1) } #[doc = "A baud rate generator event has occurred."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Brgif::Value2) + self.variant(BRGIF_A::VALUE2) } } impl R { #[doc = "Bit 0 - MSLS Status"] #[inline(always)] - pub fn msls(&self) -> MslsR { - MslsR::new((self.bits & 1) != 0) + pub fn msls(&self) -> MSLS_R { + MSLS_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - pub fn dx2s(&self) -> Dx2sR { - Dx2sR::new(((self.bits >> 1) & 1) != 0) + pub fn dx2s(&self) -> DX2S_R { + DX2S_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - MSLS Event Detected"] #[inline(always)] - pub fn mslsev(&self) -> MslsevR { - MslsevR::new(((self.bits >> 2) & 1) != 0) + pub fn mslsev(&self) -> MSLSEV_R { + MSLSEV_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - pub fn dx2tev(&self) -> Dx2tevR { - Dx2tevR::new(((self.bits >> 3) & 1) != 0) + pub fn dx2tev(&self) -> DX2TEV_R { + DX2TEV_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Parity Error Event Detected"] #[inline(always)] - pub fn parerr(&self) -> ParerrR { - ParerrR::new(((self.bits >> 4) & 1) != 0) + pub fn parerr(&self) -> PARERR_R { + PARERR_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - pub fn rsif(&self) -> RsifR { - RsifR::new(((self.bits >> 10) & 1) != 0) + pub fn rsif(&self) -> RSIF_R { + RSIF_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - pub fn dlif(&self) -> DlifR { - DlifR::new(((self.bits >> 11) & 1) != 0) + pub fn dlif(&self) -> DLIF_R { + DLIF_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - pub fn tsif(&self) -> TsifR { - TsifR::new(((self.bits >> 12) & 1) != 0) + pub fn tsif(&self) -> TSIF_R { + TSIF_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - pub fn tbif(&self) -> TbifR { - TbifR::new(((self.bits >> 13) & 1) != 0) + pub fn tbif(&self) -> TBIF_R { + TBIF_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - pub fn rif(&self) -> RifR { - RifR::new(((self.bits >> 14) & 1) != 0) + pub fn rif(&self) -> RIF_R { + RIF_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - pub fn aif(&self) -> AifR { - AifR::new(((self.bits >> 15) & 1) != 0) + pub fn aif(&self) -> AIF_R { + AIF_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - pub fn brgif(&self) -> BrgifR { - BrgifR::new(((self.bits >> 16) & 1) != 0) + pub fn brgif(&self) -> BRGIF_R { + BRGIF_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bit 0 - MSLS Status"] #[inline(always)] #[must_use] - pub fn msls(&mut self) -> MslsW { - MslsW::new(self, 0) + pub fn msls(&mut self) -> MSLS_W { + MSLS_W::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] #[must_use] - pub fn dx2s(&mut self) -> Dx2sW { - Dx2sW::new(self, 1) + pub fn dx2s(&mut self) -> DX2S_W { + DX2S_W::new(self, 1) } #[doc = "Bit 2 - MSLS Event Detected"] #[inline(always)] #[must_use] - pub fn mslsev(&mut self) -> MslsevW { - MslsevW::new(self, 2) + pub fn mslsev(&mut self) -> MSLSEV_W { + MSLSEV_W::new(self, 2) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] #[must_use] - pub fn dx2tev(&mut self) -> Dx2tevW { - Dx2tevW::new(self, 3) + pub fn dx2tev(&mut self) -> DX2TEV_W { + DX2TEV_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Event Detected"] #[inline(always)] #[must_use] - pub fn parerr(&mut self) -> ParerrW { - ParerrW::new(self, 4) + pub fn parerr(&mut self) -> PARERR_W { + PARERR_W::new(self, 4) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] #[must_use] - pub fn rsif(&mut self) -> RsifW { - RsifW::new(self, 10) + pub fn rsif(&mut self) -> RSIF_W { + RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] #[must_use] - pub fn dlif(&mut self) -> DlifW { - DlifW::new(self, 11) + pub fn dlif(&mut self) -> DLIF_W { + DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] #[must_use] - pub fn tsif(&mut self) -> TsifW { - TsifW::new(self, 12) + pub fn tsif(&mut self) -> TSIF_W { + TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] #[must_use] - pub fn tbif(&mut self) -> TbifW { - TbifW::new(self, 13) + pub fn tbif(&mut self) -> TBIF_W { + TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn rif(&mut self) -> RifW { - RifW::new(self, 14) + pub fn rif(&mut self) -> RIF_W { + RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] #[must_use] - pub fn aif(&mut self) -> AifW { - AifW::new(self, 15) + pub fn aif(&mut self) -> AIF_W { + AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] #[must_use] - pub fn brgif(&mut self) -> BrgifW { - BrgifW::new(self, 16) + pub fn brgif(&mut self) -> BRGIF_W { + BRGIF_W::new(self, 16) } } #[doc = "Protocol Status Register \\[SSC Mode\\]\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psr_sscmode::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psr_sscmode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct PsrSscmodeSpec; -impl crate::RegisterSpec for PsrSscmodeSpec { +pub struct PSR_SSCMODE_SPEC; +impl crate::RegisterSpec for PSR_SSCMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`psr_sscmode::R`](R) reader structure"] -impl crate::Readable for PsrSscmodeSpec {} +impl crate::Readable for PSR_SSCMODE_SPEC {} #[doc = "`write(|w| ..)` method takes [`psr_sscmode::W`](W) writer structure"] -impl crate::Writable for PsrSscmodeSpec { +impl crate::Writable for PSR_SSCMODE_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets PSR_SSCMode to value 0"] -impl crate::Resettable for PsrSscmodeSpec { +impl crate::Resettable for PSR_SSCMODE_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbctr.rs b/src/usic0_ch0/rbctr.rs index 83211054..332c7a68 100644 --- a/src/usic0_ch0/rbctr.rs +++ b/src/usic0_ch0/rbctr.rs @@ -1,196 +1,196 @@ #[doc = "Register `RBCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RBCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DPTR` writer - Data Pointer"] -pub type DptrW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type DPTR_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LIMIT` reader - Limit For Interrupt Generation"] -pub type LimitR = crate::FieldReader; +pub type LIMIT_R = crate::FieldReader; #[doc = "Field `LIMIT` writer - Limit For Interrupt Generation"] -pub type LimitW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type LIMIT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Standard Receive Buffer Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srbtm { +pub enum SRBTM_A { #[doc = "0: Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srbtm) -> Self { + fn from(variant: SRBTM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRBTM` reader - Standard Receive Buffer Trigger Mode"] -pub type SrbtmR = crate::BitReader; -impl SrbtmR { +pub type SRBTM_R = crate::BitReader; +impl SRBTM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srbtm { + pub const fn variant(&self) -> SRBTM_A { match self.bits { - false => Srbtm::Value1, - true => Srbtm::Value2, + false => SRBTM_A::VALUE1, + true => SRBTM_A::VALUE2, } } #[doc = "Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbtm::Value1 + *self == SRBTM_A::VALUE1 } #[doc = "Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbtm::Value2 + *self == SRBTM_A::VALUE2 } } #[doc = "Field `SRBTM` writer - Standard Receive Buffer Trigger Mode"] -pub type SrbtmW<'a, REG> = crate::BitWriter<'a, REG, Srbtm>; -impl<'a, REG> SrbtmW<'a, REG> +pub type SRBTM_W<'a, REG> = crate::BitWriter<'a, REG, SRBTM_A>; +impl<'a, REG> SRBTM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger mode 0: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=RBCTR.LIMIT."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srbtm::Value1) + self.variant(SRBTM_A::VALUE1) } #[doc = "Trigger mode 1: While TRBSR.SRBT=1, a standard receive buffer event will be generated whenever there is a new data received or data read out (depending on RBCTR.LOF setting). SRBT is cleared when TRBSR.RBFLVL=0."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srbtm::Value2) + self.variant(SRBTM_A::VALUE2) } } #[doc = "Standard Receive Buffer Trigger Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srbten { +pub enum SRBTEN_A { #[doc = "0: The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srbten) -> Self { + fn from(variant: SRBTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRBTEN` reader - Standard Receive Buffer Trigger Enable"] -pub type SrbtenR = crate::BitReader; -impl SrbtenR { +pub type SRBTEN_R = crate::BitReader; +impl SRBTEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srbten { + pub const fn variant(&self) -> SRBTEN_A { match self.bits { - false => Srbten::Value1, - true => Srbten::Value2, + false => SRBTEN_A::VALUE1, + true => SRBTEN_A::VALUE2, } } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbten::Value1 + *self == SRBTEN_A::VALUE1 } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbten::Value2 + *self == SRBTEN_A::VALUE2 } } #[doc = "Field `SRBTEN` writer - Standard Receive Buffer Trigger Enable"] -pub type SrbtenW<'a, REG> = crate::BitWriter<'a, REG, Srbten>; -impl<'a, REG> SrbtenW<'a, REG> +pub type SRBTEN_W<'a, REG> = crate::BitWriter<'a, REG, SRBTEN_A>; +impl<'a, REG> SRBTEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srbten::Value1) + self.variant(SRBTEN_A::VALUE1) } #[doc = "The standard receive buffer event trigger through bit TRBSR.SRBT is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srbten::Value2) + self.variant(SRBTEN_A::VALUE2) } } #[doc = "Standard Receive Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srbinp { +pub enum SRBINP_A { #[doc = "0: Output SR0 becomes activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output SR1 becomes activated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output SR2 becomes activated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Output SR3 becomes activated."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Output SR4 becomes activated."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Output SR5 becomes activated."] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srbinp) -> Self { + fn from(variant: SRBINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srbinp { +impl crate::FieldSpec for SRBINP_A { type Ux = u8; } -impl crate::IsEnum for Srbinp {} +impl crate::IsEnum for SRBINP_A {} #[doc = "Field `SRBINP` reader - Standard Receive Buffer Interrupt Node Pointer"] -pub type SrbinpR = crate::FieldReader; -impl SrbinpR { +pub type SRBINP_R = crate::FieldReader; +impl SRBINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srbinp::Value1), - 1 => Some(Srbinp::Value2), - 2 => Some(Srbinp::Value3), - 3 => Some(Srbinp::Value4), - 4 => Some(Srbinp::Value5), - 5 => Some(Srbinp::Value6), + 0 => Some(SRBINP_A::VALUE1), + 1 => Some(SRBINP_A::VALUE2), + 2 => Some(SRBINP_A::VALUE3), + 3 => Some(SRBINP_A::VALUE4), + 4 => Some(SRBINP_A::VALUE5), + 5 => Some(SRBINP_A::VALUE6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbinp::Value1 + *self == SRBINP_A::VALUE1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbinp::Value2 + *self == SRBINP_A::VALUE2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Srbinp::Value3 + *self == SRBINP_A::VALUE3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Srbinp::Value4 + *self == SRBINP_A::VALUE4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Srbinp::Value5 + *self == SRBINP_A::VALUE5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Srbinp::Value6 + *self == SRBINP_A::VALUE6 } } #[doc = "Field `SRBINP` writer - Standard Receive Buffer Interrupt Node Pointer"] -pub type SrbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Srbinp>; -impl<'a, REG> SrbinpW<'a, REG> +pub type SRBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SRBINP_A>; +impl<'a, REG> SRBINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -198,111 +198,111 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srbinp::Value1) + self.variant(SRBINP_A::VALUE1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srbinp::Value2) + self.variant(SRBINP_A::VALUE2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Srbinp::Value3) + self.variant(SRBINP_A::VALUE3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Srbinp::Value4) + self.variant(SRBINP_A::VALUE4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Srbinp::Value5) + self.variant(SRBINP_A::VALUE5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Srbinp::Value6) + self.variant(SRBINP_A::VALUE6) } } #[doc = "Alternative Receive Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Arbinp { +pub enum ARBINP_A { #[doc = "0: Output SR0 becomes activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output SR1 becomes activated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output SR2 becomes activated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Output SR3 becomes activated."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Output SR4 becomes activated."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Output SR5 becomes activated."] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Arbinp) -> Self { + fn from(variant: ARBINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Arbinp { +impl crate::FieldSpec for ARBINP_A { type Ux = u8; } -impl crate::IsEnum for Arbinp {} +impl crate::IsEnum for ARBINP_A {} #[doc = "Field `ARBINP` reader - Alternative Receive Buffer Interrupt Node Pointer"] -pub type ArbinpR = crate::FieldReader; -impl ArbinpR { +pub type ARBINP_R = crate::FieldReader; +impl ARBINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Arbinp::Value1), - 1 => Some(Arbinp::Value2), - 2 => Some(Arbinp::Value3), - 3 => Some(Arbinp::Value4), - 4 => Some(Arbinp::Value5), - 5 => Some(Arbinp::Value6), + 0 => Some(ARBINP_A::VALUE1), + 1 => Some(ARBINP_A::VALUE2), + 2 => Some(ARBINP_A::VALUE3), + 3 => Some(ARBINP_A::VALUE4), + 4 => Some(ARBINP_A::VALUE5), + 5 => Some(ARBINP_A::VALUE6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arbinp::Value1 + *self == ARBINP_A::VALUE1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arbinp::Value2 + *self == ARBINP_A::VALUE2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Arbinp::Value3 + *self == ARBINP_A::VALUE3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Arbinp::Value4 + *self == ARBINP_A::VALUE4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Arbinp::Value5 + *self == ARBINP_A::VALUE5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Arbinp::Value6 + *self == ARBINP_A::VALUE6 } } #[doc = "Field `ARBINP` writer - Alternative Receive Buffer Interrupt Node Pointer"] -pub type ArbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Arbinp>; -impl<'a, REG> ArbinpW<'a, REG> +pub type ARBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ARBINP_A>; +impl<'a, REG> ARBINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -310,78 +310,78 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arbinp::Value1) + self.variant(ARBINP_A::VALUE1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arbinp::Value2) + self.variant(ARBINP_A::VALUE2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Arbinp::Value3) + self.variant(ARBINP_A::VALUE3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Arbinp::Value4) + self.variant(ARBINP_A::VALUE4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Arbinp::Value5) + self.variant(ARBINP_A::VALUE5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Arbinp::Value6) + self.variant(ARBINP_A::VALUE6) } } #[doc = "Receiver Control Information Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rcim { +pub enum RCIM_A { #[doc = "0: RCI\\[4\\] = PERR, RCI\\[3:0\\] = WLEN"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: RCI\\[4\\] = PERR, RCI\\[3\\] = PAR, RCI\\[2:1\\] = 00B, RCI\\[0\\] = SOF"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rcim) -> Self { + fn from(variant: RCIM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rcim { +impl crate::FieldSpec for RCIM_A { type Ux = u8; } -impl crate::IsEnum for Rcim {} +impl crate::IsEnum for RCIM_A {} #[doc = "Field `RCIM` reader - Receiver Control Information Mode"] -pub type RcimR = crate::FieldReader; -impl RcimR { +pub type RCIM_R = crate::FieldReader; +impl RCIM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rcim { + pub const fn variant(&self) -> RCIM_A { match self.bits { - 0 => Rcim::Value1, - 1 => Rcim::Value2, - 2 => Rcim::Value3, - 3 => Rcim::Value4, + 0 => RCIM_A::VALUE1, + 1 => RCIM_A::VALUE2, + 2 => RCIM_A::VALUE3, + 3 => RCIM_A::VALUE4, _ => unreachable!(), } } @@ -390,21 +390,21 @@ impl RcimR { = WLEN"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rcim::Value1 + *self == RCIM_A::VALUE1 } #[doc = "RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rcim::Value2 + *self == RCIM_A::VALUE2 } #[doc = "RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rcim::Value3 + *self == RCIM_A::VALUE3 } #[doc = "RCI\\[4\\] = PERR, RCI\\[3\\] @@ -413,12 +413,12 @@ impl RcimR { = SOF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rcim::Value4 + *self == RCIM_A::VALUE4 } } #[doc = "Field `RCIM` writer - Receiver Control Information Mode"] -pub type RcimW<'a, REG> = crate::FieldWriter<'a, REG, 2, Rcim, crate::Safe>; -impl<'a, REG> RcimW<'a, REG> +pub type RCIM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, RCIM_A, crate::Safe>; +impl<'a, REG> RCIM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -428,21 +428,21 @@ where = WLEN"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rcim::Value1) + self.variant(RCIM_A::VALUE1) } #[doc = "RCI\\[4\\] = SOF, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rcim::Value2) + self.variant(RCIM_A::VALUE2) } #[doc = "RCI\\[4\\] = 0, RCI\\[3:0\\] = WLEN"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rcim::Value3) + self.variant(RCIM_A::VALUE3) } #[doc = "RCI\\[4\\] = PERR, RCI\\[3\\] @@ -451,94 +451,94 @@ where = SOF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rcim::Value4) + self.variant(RCIM_A::VALUE4) } } #[doc = "Buffer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Size { +pub enum SIZE_A { #[doc = "0: The FIFO mechanism is disabled. The buffer does not accept any request for data."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The FIFO buffer contains 2 entries."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The FIFO buffer contains 4 entries."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The FIFO buffer contains 8 entries."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The FIFO buffer contains 16 entries."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The FIFO buffer contains 32 entries."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The FIFO buffer contains 64 entries."] - Value7 = 6, + VALUE7 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Size) -> Self { + fn from(variant: SIZE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Size { +impl crate::FieldSpec for SIZE_A { type Ux = u8; } -impl crate::IsEnum for Size {} +impl crate::IsEnum for SIZE_A {} #[doc = "Field `SIZE` reader - Buffer Size"] -pub type SizeR = crate::FieldReader; -impl SizeR { +pub type SIZE_R = crate::FieldReader; +impl SIZE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Size::Value1), - 1 => Some(Size::Value2), - 2 => Some(Size::Value3), - 3 => Some(Size::Value4), - 4 => Some(Size::Value5), - 5 => Some(Size::Value6), - 6 => Some(Size::Value7), + 0 => Some(SIZE_A::VALUE1), + 1 => Some(SIZE_A::VALUE2), + 2 => Some(SIZE_A::VALUE3), + 3 => Some(SIZE_A::VALUE4), + 4 => Some(SIZE_A::VALUE5), + 5 => Some(SIZE_A::VALUE6), + 6 => Some(SIZE_A::VALUE7), _ => None, } } #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Size::Value1 + *self == SIZE_A::VALUE1 } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Size::Value2 + *self == SIZE_A::VALUE2 } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Size::Value3 + *self == SIZE_A::VALUE3 } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Size::Value4 + *self == SIZE_A::VALUE4 } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Size::Value5 + *self == SIZE_A::VALUE5 } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Size::Value6 + *self == SIZE_A::VALUE6 } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Size::Value7 + *self == SIZE_A::VALUE7 } } #[doc = "Field `SIZE` writer - Buffer Size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Size>; -impl<'a, REG> SizeW<'a, REG> +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SIZE_A>; +impl<'a, REG> SIZE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -546,466 +546,466 @@ where #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Size::Value1) + self.variant(SIZE_A::VALUE1) } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Size::Value2) + self.variant(SIZE_A::VALUE2) } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Size::Value3) + self.variant(SIZE_A::VALUE3) } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Size::Value4) + self.variant(SIZE_A::VALUE4) } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Size::Value5) + self.variant(SIZE_A::VALUE5) } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Size::Value6) + self.variant(SIZE_A::VALUE6) } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Size::Value7) + self.variant(SIZE_A::VALUE7) } } #[doc = "Receiver Notification Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rnm { +pub enum RNM_A { #[doc = "0: Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rnm) -> Self { + fn from(variant: RNM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RNM` reader - Receiver Notification Mode"] -pub type RnmR = crate::BitReader; -impl RnmR { +pub type RNM_R = crate::BitReader; +impl RNM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rnm { + pub const fn variant(&self) -> RNM_A { match self.bits { - false => Rnm::Value1, - true => Rnm::Value2, + false => RNM_A::VALUE1, + true => RNM_A::VALUE2, } } #[doc = "Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rnm::Value1 + *self == RNM_A::VALUE1 } #[doc = "RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rnm::Value2 + *self == RNM_A::VALUE2 } } #[doc = "Field `RNM` writer - Receiver Notification Mode"] -pub type RnmW<'a, REG> = crate::BitWriter<'a, REG, Rnm>; -impl<'a, REG> RnmW<'a, REG> +pub type RNM_W<'a, REG> = crate::BitWriter<'a, REG, RNM_A>; +impl<'a, REG> RNM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Filling level mode: A standard receive buffer event occurs when the filling level equals the limit value and changes, either due to a read access from OUTR (LOF = 0) or due to a new received data word (LOF = 1)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rnm::Value1) + self.variant(RNM_A::VALUE1) } #[doc = "RCI mode: A standard receive buffer event occurs when register OUTR is updated with a new value if the corresponding value in OUTR.RCI\\[4\\] = 0. If OUTR.RCI\\[4\\] = 1, an alternative receive buffer event occurs instead of the standard receive buffer event."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rnm::Value2) + self.variant(RNM_A::VALUE2) } } #[doc = "Buffer Event on Limit Overflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lof { +pub enum LOF_A { #[doc = "0: A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lof) -> Self { + fn from(variant: LOF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] -pub type LofR = crate::BitReader; -impl LofR { +pub type LOF_R = crate::BitReader; +impl LOF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lof { + pub const fn variant(&self) -> LOF_A { match self.bits { - false => Lof::Value1, - true => Lof::Value2, + false => LOF_A::VALUE1, + true => LOF_A::VALUE2, } } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lof::Value1 + *self == LOF_A::VALUE1 } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lof::Value2 + *self == LOF_A::VALUE2 } } #[doc = "Field `LOF` writer - Buffer Event on Limit Overflow"] -pub type LofW<'a, REG> = crate::BitWriter<'a, REG, Lof>; -impl<'a, REG> LofW<'a, REG> +pub type LOF_W<'a, REG> = crate::BitWriter<'a, REG, LOF_A>; +impl<'a, REG> LOF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets lower due to a read access from OUTR."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lof::Value1) + self.variant(LOF_A::VALUE1) } #[doc = "A standard receive buffer event occurs when the filling level equals the limit value and gets bigger due to the reception of a new data word."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lof::Value2) + self.variant(LOF_A::VALUE2) } } #[doc = "Alternative Receive Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Arbien { +pub enum ARBIEN_A { #[doc = "0: The alternative receive buffer interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The alternative receive buffer interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Arbien) -> Self { + fn from(variant: ARBIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ARBIEN` reader - Alternative Receive Buffer Interrupt Enable"] -pub type ArbienR = crate::BitReader; -impl ArbienR { +pub type ARBIEN_R = crate::BitReader; +impl ARBIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arbien { + pub const fn variant(&self) -> ARBIEN_A { match self.bits { - false => Arbien::Value1, - true => Arbien::Value2, + false => ARBIEN_A::VALUE1, + true => ARBIEN_A::VALUE2, } } #[doc = "The alternative receive buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arbien::Value1 + *self == ARBIEN_A::VALUE1 } #[doc = "The alternative receive buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arbien::Value2 + *self == ARBIEN_A::VALUE2 } } #[doc = "Field `ARBIEN` writer - Alternative Receive Buffer Interrupt Enable"] -pub type ArbienW<'a, REG> = crate::BitWriter<'a, REG, Arbien>; -impl<'a, REG> ArbienW<'a, REG> +pub type ARBIEN_W<'a, REG> = crate::BitWriter<'a, REG, ARBIEN_A>; +impl<'a, REG> ARBIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The alternative receive buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arbien::Value1) + self.variant(ARBIEN_A::VALUE1) } #[doc = "The alternative receive buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arbien::Value2) + self.variant(ARBIEN_A::VALUE2) } } #[doc = "Standard Receive Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srbien { +pub enum SRBIEN_A { #[doc = "0: The standard receive buffer interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The standard receive buffer interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srbien) -> Self { + fn from(variant: SRBIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRBIEN` reader - Standard Receive Buffer Interrupt Enable"] -pub type SrbienR = crate::BitReader; -impl SrbienR { +pub type SRBIEN_R = crate::BitReader; +impl SRBIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srbien { + pub const fn variant(&self) -> SRBIEN_A { match self.bits { - false => Srbien::Value1, - true => Srbien::Value2, + false => SRBIEN_A::VALUE1, + true => SRBIEN_A::VALUE2, } } #[doc = "The standard receive buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbien::Value1 + *self == SRBIEN_A::VALUE1 } #[doc = "The standard receive buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbien::Value2 + *self == SRBIEN_A::VALUE2 } } #[doc = "Field `SRBIEN` writer - Standard Receive Buffer Interrupt Enable"] -pub type SrbienW<'a, REG> = crate::BitWriter<'a, REG, Srbien>; -impl<'a, REG> SrbienW<'a, REG> +pub type SRBIEN_W<'a, REG> = crate::BitWriter<'a, REG, SRBIEN_A>; +impl<'a, REG> SRBIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard receive buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srbien::Value1) + self.variant(SRBIEN_A::VALUE1) } #[doc = "The standard receive buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srbien::Value2) + self.variant(SRBIEN_A::VALUE2) } } #[doc = "Receive Buffer Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rberien { +pub enum RBERIEN_A { #[doc = "0: The receive buffer error interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive buffer error interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rberien) -> Self { + fn from(variant: RBERIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RBERIEN` reader - Receive Buffer Error Interrupt Enable"] -pub type RberienR = crate::BitReader; -impl RberienR { +pub type RBERIEN_R = crate::BitReader; +impl RBERIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rberien { + pub const fn variant(&self) -> RBERIEN_A { match self.bits { - false => Rberien::Value1, - true => Rberien::Value2, + false => RBERIEN_A::VALUE1, + true => RBERIEN_A::VALUE2, } } #[doc = "The receive buffer error interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rberien::Value1 + *self == RBERIEN_A::VALUE1 } #[doc = "The receive buffer error interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rberien::Value2 + *self == RBERIEN_A::VALUE2 } } #[doc = "Field `RBERIEN` writer - Receive Buffer Error Interrupt Enable"] -pub type RberienW<'a, REG> = crate::BitWriter<'a, REG, Rberien>; -impl<'a, REG> RberienW<'a, REG> +pub type RBERIEN_W<'a, REG> = crate::BitWriter<'a, REG, RBERIEN_A>; +impl<'a, REG> RBERIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The receive buffer error interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rberien::Value1) + self.variant(RBERIEN_A::VALUE1) } #[doc = "The receive buffer error interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rberien::Value2) + self.variant(RBERIEN_A::VALUE2) } } impl R { #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - pub fn limit(&self) -> LimitR { - LimitR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn limit(&self) -> LIMIT_R { + LIMIT_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"] #[inline(always)] - pub fn srbtm(&self) -> SrbtmR { - SrbtmR::new(((self.bits >> 14) & 1) != 0) + pub fn srbtm(&self) -> SRBTM_R { + SRBTM_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"] #[inline(always)] - pub fn srbten(&self) -> SrbtenR { - SrbtenR::new(((self.bits >> 15) & 1) != 0) + pub fn srbten(&self) -> SRBTEN_R { + SRBTEN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn srbinp(&self) -> SrbinpR { - SrbinpR::new(((self.bits >> 16) & 7) as u8) + pub fn srbinp(&self) -> SRBINP_R { + SRBINP_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn arbinp(&self) -> ArbinpR { - ArbinpR::new(((self.bits >> 19) & 7) as u8) + pub fn arbinp(&self) -> ARBINP_R { + ARBINP_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 22:23 - Receiver Control Information Mode"] #[inline(always)] - pub fn rcim(&self) -> RcimR { - RcimR::new(((self.bits >> 22) & 3) as u8) + pub fn rcim(&self) -> RCIM_R { + RCIM_R::new(((self.bits >> 22) & 3) as u8) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 24) & 7) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 27 - Receiver Notification Mode"] #[inline(always)] - pub fn rnm(&self) -> RnmR { - RnmR::new(((self.bits >> 27) & 1) != 0) + pub fn rnm(&self) -> RNM_R { + RNM_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - pub fn lof(&self) -> LofR { - LofR::new(((self.bits >> 28) & 1) != 0) + pub fn lof(&self) -> LOF_R { + LOF_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"] #[inline(always)] - pub fn arbien(&self) -> ArbienR { - ArbienR::new(((self.bits >> 29) & 1) != 0) + pub fn arbien(&self) -> ARBIEN_R { + ARBIEN_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"] #[inline(always)] - pub fn srbien(&self) -> SrbienR { - SrbienR::new(((self.bits >> 30) & 1) != 0) + pub fn srbien(&self) -> SRBIEN_R { + SRBIEN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"] #[inline(always)] - pub fn rberien(&self) -> RberienR { - RberienR::new(((self.bits >> 31) & 1) != 0) + pub fn rberien(&self) -> RBERIEN_R { + RBERIEN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] #[must_use] - pub fn dptr(&mut self) -> DptrW { - DptrW::new(self, 0) + pub fn dptr(&mut self) -> DPTR_W { + DPTR_W::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] #[must_use] - pub fn limit(&mut self) -> LimitW { - LimitW::new(self, 8) + pub fn limit(&mut self) -> LIMIT_W { + LIMIT_W::new(self, 8) } #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"] #[inline(always)] #[must_use] - pub fn srbtm(&mut self) -> SrbtmW { - SrbtmW::new(self, 14) + pub fn srbtm(&mut self) -> SRBTM_W { + SRBTM_W::new(self, 14) } #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"] #[inline(always)] #[must_use] - pub fn srbten(&mut self) -> SrbtenW { - SrbtenW::new(self, 15) + pub fn srbten(&mut self) -> SRBTEN_W { + SRBTEN_W::new(self, 15) } #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn srbinp(&mut self) -> SrbinpW { - SrbinpW::new(self, 16) + pub fn srbinp(&mut self) -> SRBINP_W { + SRBINP_W::new(self, 16) } #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn arbinp(&mut self) -> ArbinpW { - ArbinpW::new(self, 19) + pub fn arbinp(&mut self) -> ARBINP_W { + ARBINP_W::new(self, 19) } #[doc = "Bits 22:23 - Receiver Control Information Mode"] #[inline(always)] #[must_use] - pub fn rcim(&mut self) -> RcimW { - RcimW::new(self, 22) + pub fn rcim(&mut self) -> RCIM_W { + RCIM_W::new(self, 22) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 24) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 24) } #[doc = "Bit 27 - Receiver Notification Mode"] #[inline(always)] #[must_use] - pub fn rnm(&mut self) -> RnmW { - RnmW::new(self, 27) + pub fn rnm(&mut self) -> RNM_W { + RNM_W::new(self, 27) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] #[must_use] - pub fn lof(&mut self) -> LofW { - LofW::new(self, 28) + pub fn lof(&mut self) -> LOF_W { + LOF_W::new(self, 28) } #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn arbien(&mut self) -> ArbienW { - ArbienW::new(self, 29) + pub fn arbien(&mut self) -> ARBIEN_W { + ARBIEN_W::new(self, 29) } #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn srbien(&mut self) -> SrbienW { - SrbienW::new(self, 30) + pub fn srbien(&mut self) -> SRBIEN_W { + SRBIEN_W::new(self, 30) } #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn rberien(&mut self) -> RberienW { - RberienW::new(self, 31) + pub fn rberien(&mut self) -> RBERIEN_W { + RBERIEN_W::new(self, 31) } } #[doc = "Receiver Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RbctrSpec; -impl crate::RegisterSpec for RbctrSpec { +pub struct RBCTR_SPEC; +impl crate::RegisterSpec for RBCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbctr::R`](R) reader structure"] -impl crate::Readable for RbctrSpec {} +impl crate::Readable for RBCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`rbctr::W`](W) writer structure"] -impl crate::Writable for RbctrSpec { +impl crate::Writable for RBCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RBCTR to value 0"] -impl crate::Resettable for RbctrSpec { +impl crate::Resettable for RBCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf.rs b/src/usic0_ch0/rbuf.rs index 87469cda..6388c73e 100644 --- a/src/usic0_ch0/rbuf.rs +++ b/src/usic0_ch0/rbuf.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Received Data"] -pub type DsrR = crate::FieldReader; +pub type DSR_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Received Data"] #[inline(always)] - pub fn dsr(&self) -> DsrR { - DsrR::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DSR_R { + DSR_R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RbufSpec; -impl crate::RegisterSpec for RbufSpec { +pub struct RBUF_SPEC; +impl crate::RegisterSpec for RBUF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbuf::R`](R) reader structure"] -impl crate::Readable for RbufSpec {} +impl crate::Readable for RBUF_SPEC {} #[doc = "`reset()` method sets RBUF to value 0"] -impl crate::Resettable for RbufSpec { +impl crate::Resettable for RBUF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf0.rs b/src/usic0_ch0/rbuf0.rs index a8748e1f..cfc36b8c 100644 --- a/src/usic0_ch0/rbuf0.rs +++ b/src/usic0_ch0/rbuf0.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR0` reader - Data of Shift Registers 0\\[3:0\\]"] -pub type Dsr0R = crate::FieldReader; +pub type DSR0_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data of Shift Registers 0\\[3:0\\]"] #[inline(always)] - pub fn dsr0(&self) -> Dsr0R { - Dsr0R::new((self.bits & 0xffff) as u16) + pub fn dsr0(&self) -> DSR0_R { + DSR0_R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Rbuf0Spec; -impl crate::RegisterSpec for Rbuf0Spec { +pub struct RBUF0_SPEC; +impl crate::RegisterSpec for RBUF0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbuf0::R`](R) reader structure"] -impl crate::Readable for Rbuf0Spec {} +impl crate::Readable for RBUF0_SPEC {} #[doc = "`reset()` method sets RBUF0 to value 0"] -impl crate::Resettable for Rbuf0Spec { +impl crate::Resettable for RBUF0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf01sr.rs b/src/usic0_ch0/rbuf01sr.rs index bae3ebec..c7504db5 100644 --- a/src/usic0_ch0/rbuf01sr.rs +++ b/src/usic0_ch0/rbuf01sr.rs @@ -1,493 +1,493 @@ #[doc = "Register `RBUF01SR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WLEN0` reader - Received Data Word Length in RBUF0"] -pub type Wlen0R = crate::FieldReader; +pub type WLEN0_R = crate::FieldReader; #[doc = "Start of Frame in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sof0 { +pub enum SOF0_A { #[doc = "0: The data in RBUF0 has not been the first data word of a data frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data in RBUF0 has been the first data word of a data frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sof0) -> Self { + fn from(variant: SOF0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOF0` reader - Start of Frame in RBUF0"] -pub type Sof0R = crate::BitReader; -impl Sof0R { +pub type SOF0_R = crate::BitReader; +impl SOF0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sof0 { + pub const fn variant(&self) -> SOF0_A { match self.bits { - false => Sof0::Value1, - true => Sof0::Value2, + false => SOF0_A::VALUE1, + true => SOF0_A::VALUE2, } } #[doc = "The data in RBUF0 has not been the first data word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sof0::Value1 + *self == SOF0_A::VALUE1 } #[doc = "The data in RBUF0 has been the first data word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sof0::Value2 + *self == SOF0_A::VALUE2 } } #[doc = "Field `PAR0` reader - Protocol-Related Argument in RBUF0"] -pub type Par0R = crate::BitReader; +pub type PAR0_R = crate::BitReader; #[doc = "Protocol-related Error in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Perr0 { +pub enum PERR0_A { #[doc = "0: The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Perr0) -> Self { + fn from(variant: PERR0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PERR0` reader - Protocol-related Error in RBUF0"] -pub type Perr0R = crate::BitReader; -impl Perr0R { +pub type PERR0_R = crate::BitReader; +impl PERR0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Perr0 { + pub const fn variant(&self) -> PERR0_A { match self.bits { - false => Perr0::Value1, - true => Perr0::Value2, + false => PERR0_A::VALUE1, + true => PERR0_A::VALUE2, } } #[doc = "The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Perr0::Value1 + *self == PERR0_A::VALUE1 } #[doc = "The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Perr0::Value2 + *self == PERR0_A::VALUE2 } } #[doc = "Receive Data Valid in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdv00 { +pub enum RDV00_A { #[doc = "0: Register RBUF0 does not contain data that has not yet been read out."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Register RBUF0 contains data that has not yet been read out."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdv00) -> Self { + fn from(variant: RDV00_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDV00` reader - Receive Data Valid in RBUF0"] -pub type Rdv00R = crate::BitReader; -impl Rdv00R { +pub type RDV00_R = crate::BitReader; +impl RDV00_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdv00 { + pub const fn variant(&self) -> RDV00_A { match self.bits { - false => Rdv00::Value1, - true => Rdv00::Value2, + false => RDV00_A::VALUE1, + true => RDV00_A::VALUE2, } } #[doc = "Register RBUF0 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdv00::Value1 + *self == RDV00_A::VALUE1 } #[doc = "Register RBUF0 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdv00::Value2 + *self == RDV00_A::VALUE2 } } #[doc = "Receive Data Valid in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdv01 { +pub enum RDV01_A { #[doc = "0: Register RBUF1 does not contain data that has not yet been read out."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Register RBUF1 contains data that has not yet been read out."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdv01) -> Self { + fn from(variant: RDV01_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDV01` reader - Receive Data Valid in RBUF1"] -pub type Rdv01R = crate::BitReader; -impl Rdv01R { +pub type RDV01_R = crate::BitReader; +impl RDV01_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdv01 { + pub const fn variant(&self) -> RDV01_A { match self.bits { - false => Rdv01::Value1, - true => Rdv01::Value2, + false => RDV01_A::VALUE1, + true => RDV01_A::VALUE2, } } #[doc = "Register RBUF1 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdv01::Value1 + *self == RDV01_A::VALUE1 } #[doc = "Register RBUF1 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdv01::Value2 + *self == RDV01_A::VALUE2 } } #[doc = "Data Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ds0 { +pub enum DS0_A { #[doc = "0: The register RBUF contains the data of RBUF0 (same for associated status information)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The register RBUF contains the data of RBUF1 (same for associated status information)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ds0) -> Self { + fn from(variant: DS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DS0` reader - Data Source"] -pub type Ds0R = crate::BitReader; -impl Ds0R { +pub type DS0_R = crate::BitReader; +impl DS0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ds0 { + pub const fn variant(&self) -> DS0_A { match self.bits { - false => Ds0::Value1, - true => Ds0::Value2, + false => DS0_A::VALUE1, + true => DS0_A::VALUE2, } } #[doc = "The register RBUF contains the data of RBUF0 (same for associated status information)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ds0::Value1 + *self == DS0_A::VALUE1 } #[doc = "The register RBUF contains the data of RBUF1 (same for associated status information)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ds0::Value2 + *self == DS0_A::VALUE2 } } #[doc = "Received Data Word Length in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Wlen1 { +pub enum WLEN1_A { #[doc = "0: One bit has been received."] - Value1 = 0, + VALUE1 = 0, #[doc = "15: Sixteen bits have been received."] - Value2 = 15, + VALUE2 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Wlen1) -> Self { + fn from(variant: WLEN1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Wlen1 { +impl crate::FieldSpec for WLEN1_A { type Ux = u8; } -impl crate::IsEnum for Wlen1 {} +impl crate::IsEnum for WLEN1_A {} #[doc = "Field `WLEN1` reader - Received Data Word Length in RBUF1"] -pub type Wlen1R = crate::FieldReader; -impl Wlen1R { +pub type WLEN1_R = crate::FieldReader; +impl WLEN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Wlen1::Value1), - 15 => Some(Wlen1::Value2), + 0 => Some(WLEN1_A::VALUE1), + 15 => Some(WLEN1_A::VALUE2), _ => None, } } #[doc = "One bit has been received."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wlen1::Value1 + *self == WLEN1_A::VALUE1 } #[doc = "Sixteen bits have been received."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wlen1::Value2 + *self == WLEN1_A::VALUE2 } } #[doc = "Start of Frame in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sof1 { +pub enum SOF1_A { #[doc = "0: The data in RBUF1 has not been the first data word of a data frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data in RBUF1 has been the first data word of a data frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sof1) -> Self { + fn from(variant: SOF1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOF1` reader - Start of Frame in RBUF1"] -pub type Sof1R = crate::BitReader; -impl Sof1R { +pub type SOF1_R = crate::BitReader; +impl SOF1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sof1 { + pub const fn variant(&self) -> SOF1_A { match self.bits { - false => Sof1::Value1, - true => Sof1::Value2, + false => SOF1_A::VALUE1, + true => SOF1_A::VALUE2, } } #[doc = "The data in RBUF1 has not been the first data word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sof1::Value1 + *self == SOF1_A::VALUE1 } #[doc = "The data in RBUF1 has been the first data word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sof1::Value2 + *self == SOF1_A::VALUE2 } } #[doc = "Field `PAR1` reader - Protocol-Related Argument in RBUF1"] -pub type Par1R = crate::BitReader; +pub type PAR1_R = crate::BitReader; #[doc = "Protocol-related Error in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Perr1 { +pub enum PERR1_A { #[doc = "0: The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Perr1) -> Self { + fn from(variant: PERR1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PERR1` reader - Protocol-related Error in RBUF1"] -pub type Perr1R = crate::BitReader; -impl Perr1R { +pub type PERR1_R = crate::BitReader; +impl PERR1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Perr1 { + pub const fn variant(&self) -> PERR1_A { match self.bits { - false => Perr1::Value1, - true => Perr1::Value2, + false => PERR1_A::VALUE1, + true => PERR1_A::VALUE2, } } #[doc = "The received protocol-related argument PAR matches the expected value. The reception of the data word sets bit PSR.RIF and can generate a receive interrupt."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Perr1::Value1 + *self == PERR1_A::VALUE1 } #[doc = "The received protocol-related argument PAR does not match the expected value. The reception of the data word sets bit PSR.AIF and can generate an alternative receive interrupt."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Perr1::Value2 + *self == PERR1_A::VALUE2 } } #[doc = "Receive Data Valid in RBUF0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdv10 { +pub enum RDV10_A { #[doc = "0: Register RBUF0 does not contain data that has not yet been read out."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Register RBUF0 contains data that has not yet been read out."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdv10) -> Self { + fn from(variant: RDV10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDV10` reader - Receive Data Valid in RBUF0"] -pub type Rdv10R = crate::BitReader; -impl Rdv10R { +pub type RDV10_R = crate::BitReader; +impl RDV10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdv10 { + pub const fn variant(&self) -> RDV10_A { match self.bits { - false => Rdv10::Value1, - true => Rdv10::Value2, + false => RDV10_A::VALUE1, + true => RDV10_A::VALUE2, } } #[doc = "Register RBUF0 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdv10::Value1 + *self == RDV10_A::VALUE1 } #[doc = "Register RBUF0 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdv10::Value2 + *self == RDV10_A::VALUE2 } } #[doc = "Receive Data Valid in RBUF1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rdv11 { +pub enum RDV11_A { #[doc = "0: Register RBUF1 does not contain data that has not yet been read out."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Register RBUF1 contains data that has not yet been read out."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rdv11) -> Self { + fn from(variant: RDV11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RDV11` reader - Receive Data Valid in RBUF1"] -pub type Rdv11R = crate::BitReader; -impl Rdv11R { +pub type RDV11_R = crate::BitReader; +impl RDV11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rdv11 { + pub const fn variant(&self) -> RDV11_A { match self.bits { - false => Rdv11::Value1, - true => Rdv11::Value2, + false => RDV11_A::VALUE1, + true => RDV11_A::VALUE2, } } #[doc = "Register RBUF1 does not contain data that has not yet been read out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rdv11::Value1 + *self == RDV11_A::VALUE1 } #[doc = "Register RBUF1 contains data that has not yet been read out."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rdv11::Value2 + *self == RDV11_A::VALUE2 } } #[doc = "Data Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ds1 { +pub enum DS1_A { #[doc = "0: The register RBUF contains the data of RBUF0 (same for associated status information)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The register RBUF contains the data of RBUF1 (same for associated status information)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ds1) -> Self { + fn from(variant: DS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DS1` reader - Data Source"] -pub type Ds1R = crate::BitReader; -impl Ds1R { +pub type DS1_R = crate::BitReader; +impl DS1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ds1 { + pub const fn variant(&self) -> DS1_A { match self.bits { - false => Ds1::Value1, - true => Ds1::Value2, + false => DS1_A::VALUE1, + true => DS1_A::VALUE2, } } #[doc = "The register RBUF contains the data of RBUF0 (same for associated status information)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ds1::Value1 + *self == DS1_A::VALUE1 } #[doc = "The register RBUF contains the data of RBUF1 (same for associated status information)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ds1::Value2 + *self == DS1_A::VALUE2 } } impl R { #[doc = "Bits 0:3 - Received Data Word Length in RBUF0"] #[inline(always)] - pub fn wlen0(&self) -> Wlen0R { - Wlen0R::new((self.bits & 0x0f) as u8) + pub fn wlen0(&self) -> WLEN0_R { + WLEN0_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 6 - Start of Frame in RBUF0"] #[inline(always)] - pub fn sof0(&self) -> Sof0R { - Sof0R::new(((self.bits >> 6) & 1) != 0) + pub fn sof0(&self) -> SOF0_R { + SOF0_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Protocol-Related Argument in RBUF0"] #[inline(always)] - pub fn par0(&self) -> Par0R { - Par0R::new(((self.bits >> 8) & 1) != 0) + pub fn par0(&self) -> PAR0_R { + PAR0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol-related Error in RBUF0"] #[inline(always)] - pub fn perr0(&self) -> Perr0R { - Perr0R::new(((self.bits >> 9) & 1) != 0) + pub fn perr0(&self) -> PERR0_R { + PERR0_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - Receive Data Valid in RBUF0"] #[inline(always)] - pub fn rdv00(&self) -> Rdv00R { - Rdv00R::new(((self.bits >> 13) & 1) != 0) + pub fn rdv00(&self) -> RDV00_R { + RDV00_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Data Valid in RBUF1"] #[inline(always)] - pub fn rdv01(&self) -> Rdv01R { - Rdv01R::new(((self.bits >> 14) & 1) != 0) + pub fn rdv01(&self) -> RDV01_R { + RDV01_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Source"] #[inline(always)] - pub fn ds0(&self) -> Ds0R { - Ds0R::new(((self.bits >> 15) & 1) != 0) + pub fn ds0(&self) -> DS0_R { + DS0_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:19 - Received Data Word Length in RBUF1"] #[inline(always)] - pub fn wlen1(&self) -> Wlen1R { - Wlen1R::new(((self.bits >> 16) & 0x0f) as u8) + pub fn wlen1(&self) -> WLEN1_R { + WLEN1_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 22 - Start of Frame in RBUF1"] #[inline(always)] - pub fn sof1(&self) -> Sof1R { - Sof1R::new(((self.bits >> 22) & 1) != 0) + pub fn sof1(&self) -> SOF1_R { + SOF1_R::new(((self.bits >> 22) & 1) != 0) } #[doc = "Bit 24 - Protocol-Related Argument in RBUF1"] #[inline(always)] - pub fn par1(&self) -> Par1R { - Par1R::new(((self.bits >> 24) & 1) != 0) + pub fn par1(&self) -> PAR1_R { + PAR1_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Protocol-related Error in RBUF1"] #[inline(always)] - pub fn perr1(&self) -> Perr1R { - Perr1R::new(((self.bits >> 25) & 1) != 0) + pub fn perr1(&self) -> PERR1_R { + PERR1_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 29 - Receive Data Valid in RBUF0"] #[inline(always)] - pub fn rdv10(&self) -> Rdv10R { - Rdv10R::new(((self.bits >> 29) & 1) != 0) + pub fn rdv10(&self) -> RDV10_R { + RDV10_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - Receive Data Valid in RBUF1"] #[inline(always)] - pub fn rdv11(&self) -> Rdv11R { - Rdv11R::new(((self.bits >> 30) & 1) != 0) + pub fn rdv11(&self) -> RDV11_R { + RDV11_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Data Source"] #[inline(always)] - pub fn ds1(&self) -> Ds1R { - Ds1R::new(((self.bits >> 31) & 1) != 0) + pub fn ds1(&self) -> DS1_R { + DS1_R::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Receiver Buffer 01 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf01sr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Rbuf01srSpec; -impl crate::RegisterSpec for Rbuf01srSpec { +pub struct RBUF01SR_SPEC; +impl crate::RegisterSpec for RBUF01SR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbuf01sr::R`](R) reader structure"] -impl crate::Readable for Rbuf01srSpec {} +impl crate::Readable for RBUF01SR_SPEC {} #[doc = "`reset()` method sets RBUF01SR to value 0"] -impl crate::Resettable for Rbuf01srSpec { +impl crate::Resettable for RBUF01SR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbuf1.rs b/src/usic0_ch0/rbuf1.rs index 309d0c76..036e9716 100644 --- a/src/usic0_ch0/rbuf1.rs +++ b/src/usic0_ch0/rbuf1.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUF1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR1` reader - Data of Shift Registers 1\\[3:0\\]"] -pub type Dsr1R = crate::FieldReader; +pub type DSR1_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data of Shift Registers 1\\[3:0\\]"] #[inline(always)] - pub fn dsr1(&self) -> Dsr1R { - Dsr1R::new((self.bits & 0xffff) as u16) + pub fn dsr1(&self) -> DSR1_R { + DSR1_R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbuf1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Rbuf1Spec; -impl crate::RegisterSpec for Rbuf1Spec { +pub struct RBUF1_SPEC; +impl crate::RegisterSpec for RBUF1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbuf1::R`](R) reader structure"] -impl crate::Readable for Rbuf1Spec {} +impl crate::Readable for RBUF1_SPEC {} #[doc = "`reset()` method sets RBUF1 to value 0"] -impl crate::Resettable for Rbuf1Spec { +impl crate::Resettable for RBUF1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbufd.rs b/src/usic0_ch0/rbufd.rs index f62a81ba..441149e7 100644 --- a/src/usic0_ch0/rbufd.rs +++ b/src/usic0_ch0/rbufd.rs @@ -1,22 +1,22 @@ #[doc = "Register `RBUFD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `DSR` reader - Data from Shift Register"] -pub type DsrR = crate::FieldReader; +pub type DSR_R = crate::FieldReader; impl R { #[doc = "Bits 0:15 - Data from Shift Register"] #[inline(always)] - pub fn dsr(&self) -> DsrR { - DsrR::new((self.bits & 0xffff) as u16) + pub fn dsr(&self) -> DSR_R { + DSR_R::new((self.bits & 0xffff) as u16) } } #[doc = "Receiver Buffer Register for Debugger\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RbufdSpec; -impl crate::RegisterSpec for RbufdSpec { +pub struct RBUFD_SPEC; +impl crate::RegisterSpec for RBUFD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbufd::R`](R) reader structure"] -impl crate::Readable for RbufdSpec {} +impl crate::Readable for RBUFD_SPEC {} #[doc = "`reset()` method sets RBUFD to value 0"] -impl crate::Resettable for RbufdSpec { +impl crate::Resettable for RBUFD_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/rbufsr.rs b/src/usic0_ch0/rbufsr.rs index 8e567a9f..034f4742 100644 --- a/src/usic0_ch0/rbufsr.rs +++ b/src/usic0_ch0/rbufsr.rs @@ -1,64 +1,64 @@ #[doc = "Register `RBUFSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `WLEN` reader - Received Data Word Length in RBUF or RBUFD"] -pub type WlenR = crate::FieldReader; +pub type WLEN_R = crate::FieldReader; #[doc = "Field `SOF` reader - Start of Frame in RBUF or RBUFD"] -pub type SofR = crate::BitReader; +pub type SOF_R = crate::BitReader; #[doc = "Field `PAR` reader - Protocol-Related Argument in RBUF or RBUFD"] -pub type ParR = crate::BitReader; +pub type PAR_R = crate::BitReader; #[doc = "Field `PERR` reader - Protocol-related Error in RBUF or RBUFD"] -pub type PerrR = crate::BitReader; +pub type PERR_R = crate::BitReader; #[doc = "Field `RDV0` reader - Receive Data Valid in RBUF or RBUFD"] -pub type Rdv0R = crate::BitReader; +pub type RDV0_R = crate::BitReader; #[doc = "Field `RDV1` reader - Receive Data Valid in RBUF or RBUFD"] -pub type Rdv1R = crate::BitReader; +pub type RDV1_R = crate::BitReader; #[doc = "Field `DS` reader - Data Source of RBUF or RBUFD"] -pub type DsR = crate::BitReader; +pub type DS_R = crate::BitReader; impl R { #[doc = "Bits 0:3 - Received Data Word Length in RBUF or RBUFD"] #[inline(always)] - pub fn wlen(&self) -> WlenR { - WlenR::new((self.bits & 0x0f) as u8) + pub fn wlen(&self) -> WLEN_R { + WLEN_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 6 - Start of Frame in RBUF or RBUFD"] #[inline(always)] - pub fn sof(&self) -> SofR { - SofR::new(((self.bits >> 6) & 1) != 0) + pub fn sof(&self) -> SOF_R { + SOF_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Protocol-Related Argument in RBUF or RBUFD"] #[inline(always)] - pub fn par(&self) -> ParR { - ParR::new(((self.bits >> 8) & 1) != 0) + pub fn par(&self) -> PAR_R { + PAR_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Protocol-related Error in RBUF or RBUFD"] #[inline(always)] - pub fn perr(&self) -> PerrR { - PerrR::new(((self.bits >> 9) & 1) != 0) + pub fn perr(&self) -> PERR_R { + PERR_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 13 - Receive Data Valid in RBUF or RBUFD"] #[inline(always)] - pub fn rdv0(&self) -> Rdv0R { - Rdv0R::new(((self.bits >> 13) & 1) != 0) + pub fn rdv0(&self) -> RDV0_R { + RDV0_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Receive Data Valid in RBUF or RBUFD"] #[inline(always)] - pub fn rdv1(&self) -> Rdv1R { - Rdv1R::new(((self.bits >> 14) & 1) != 0) + pub fn rdv1(&self) -> RDV1_R { + RDV1_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Data Source of RBUF or RBUFD"] #[inline(always)] - pub fn ds(&self) -> DsR { - DsR::new(((self.bits >> 15) & 1) != 0) + pub fn ds(&self) -> DS_R { + DS_R::new(((self.bits >> 15) & 1) != 0) } } #[doc = "Receiver Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rbufsr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RbufsrSpec; -impl crate::RegisterSpec for RbufsrSpec { +pub struct RBUFSR_SPEC; +impl crate::RegisterSpec for RBUFSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rbufsr::R`](R) reader structure"] -impl crate::Readable for RbufsrSpec {} +impl crate::Readable for RBUFSR_SPEC {} #[doc = "`reset()` method sets RBUFSR to value 0"] -impl crate::Resettable for RbufsrSpec { +impl crate::Resettable for RBUFSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/sctr.rs b/src/usic0_ch0/sctr.rs index b2506c6c..d4b8bd8b 100644 --- a/src/usic0_ch0/sctr.rs +++ b/src/usic0_ch0/sctr.rs @@ -1,170 +1,170 @@ #[doc = "Register `SCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Shift Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sdir { +pub enum SDIR_A { #[doc = "0: Shift LSB first. The first data bit of a data word is located at bit position 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sdir) -> Self { + fn from(variant: SDIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SDIR` reader - Shift Direction"] -pub type SdirR = crate::BitReader; -impl SdirR { +pub type SDIR_R = crate::BitReader; +impl SDIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sdir { + pub const fn variant(&self) -> SDIR_A { match self.bits { - false => Sdir::Value1, - true => Sdir::Value2, + false => SDIR_A::VALUE1, + true => SDIR_A::VALUE2, } } #[doc = "Shift LSB first. The first data bit of a data word is located at bit position 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sdir::Value1 + *self == SDIR_A::VALUE1 } #[doc = "Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sdir::Value2 + *self == SDIR_A::VALUE2 } } #[doc = "Field `SDIR` writer - Shift Direction"] -pub type SdirW<'a, REG> = crate::BitWriter<'a, REG, Sdir>; -impl<'a, REG> SdirW<'a, REG> +pub type SDIR_W<'a, REG> = crate::BitWriter<'a, REG, SDIR_A>; +impl<'a, REG> SDIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Shift LSB first. The first data bit of a data word is located at bit position 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sdir::Value1) + self.variant(SDIR_A::VALUE1) } #[doc = "Shift MSB first. The first data bit of a data word is located at the bit position given by bit field SCTR.WLE."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sdir::Value2) + self.variant(SDIR_A::VALUE2) } } #[doc = "Passive Data Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdl { +pub enum PDL_A { #[doc = "0: The passive data level is 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The passive data level is 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdl) -> Self { + fn from(variant: PDL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDL` reader - Passive Data Level"] -pub type PdlR = crate::BitReader; -impl PdlR { +pub type PDL_R = crate::BitReader; +impl PDL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdl { + pub const fn variant(&self) -> PDL_A { match self.bits { - false => Pdl::Value1, - true => Pdl::Value2, + false => PDL_A::VALUE1, + true => PDL_A::VALUE2, } } #[doc = "The passive data level is 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdl::Value1 + *self == PDL_A::VALUE1 } #[doc = "The passive data level is 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdl::Value2 + *self == PDL_A::VALUE2 } } #[doc = "Field `PDL` writer - Passive Data Level"] -pub type PdlW<'a, REG> = crate::BitWriter<'a, REG, Pdl>; -impl<'a, REG> PdlW<'a, REG> +pub type PDL_W<'a, REG> = crate::BitWriter<'a, REG, PDL_A>; +impl<'a, REG> PDL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The passive data level is 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdl::Value1) + self.variant(PDL_A::VALUE1) } #[doc = "The passive data level is 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdl::Value2) + self.variant(PDL_A::VALUE2) } } #[doc = "Data Shift Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dsm { +pub enum DSM_A { #[doc = "0: Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] - Value1 = 0, + VALUE1 = 0, #[doc = "2: Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dsm) -> Self { + fn from(variant: DSM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dsm { +impl crate::FieldSpec for DSM_A { type Ux = u8; } -impl crate::IsEnum for Dsm {} +impl crate::IsEnum for DSM_A {} #[doc = "Field `DSM` reader - Data Shift Mode"] -pub type DsmR = crate::FieldReader; -impl DsmR { +pub type DSM_R = crate::FieldReader; +impl DSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Dsm::Value1), - 2 => Some(Dsm::Value3), - 3 => Some(Dsm::Value4), + 0 => Some(DSM_A::VALUE1), + 2 => Some(DSM_A::VALUE3), + 3 => Some(DSM_A::VALUE4), _ => None, } } #[doc = "Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dsm::Value1 + *self == DSM_A::VALUE1 } #[doc = "Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dsm::Value3 + *self == DSM_A::VALUE3 } #[doc = "Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Dsm::Value4 + *self == DSM_A::VALUE4 } } #[doc = "Field `DSM` writer - Data Shift Mode"] -pub type DsmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dsm>; -impl<'a, REG> DsmW<'a, REG> +pub type DSM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DSM_A>; +impl<'a, REG> DSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -172,119 +172,119 @@ where #[doc = "Receive and transmit data is shifted in and out one bit at a time through DX0 and DOUT0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dsm::Value1) + self.variant(DSM_A::VALUE1) } #[doc = "Receive and transmit data is shifted in and out two bits at a time through two input stages (DX0 and DX3) and DOUT\\[1:0\\] respectively."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dsm::Value3) + self.variant(DSM_A::VALUE3) } #[doc = "Receive and transmit data is shifted in and out four bits at a time through four input stages (DX0, DX\\[5:3\\]) and DOUT\\[3:0\\] respectively."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Dsm::Value4) + self.variant(DSM_A::VALUE4) } } #[doc = "Port Control Direction\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hpcdir { +pub enum HPCDIR_A { #[doc = "0: The pin(s) with hardware pin control enabled are selected to be in input mode."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The pin(s) with hardware pin control enabled are selected to be in output mode."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hpcdir) -> Self { + fn from(variant: HPCDIR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HPCDIR` reader - Port Control Direction"] -pub type HpcdirR = crate::BitReader; -impl HpcdirR { +pub type HPCDIR_R = crate::BitReader; +impl HPCDIR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hpcdir { + pub const fn variant(&self) -> HPCDIR_A { match self.bits { - false => Hpcdir::Value1, - true => Hpcdir::Value2, + false => HPCDIR_A::VALUE1, + true => HPCDIR_A::VALUE2, } } #[doc = "The pin(s) with hardware pin control enabled are selected to be in input mode."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hpcdir::Value1 + *self == HPCDIR_A::VALUE1 } #[doc = "The pin(s) with hardware pin control enabled are selected to be in output mode."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hpcdir::Value2 + *self == HPCDIR_A::VALUE2 } } #[doc = "Field `HPCDIR` writer - Port Control Direction"] -pub type HpcdirW<'a, REG> = crate::BitWriter<'a, REG, Hpcdir>; -impl<'a, REG> HpcdirW<'a, REG> +pub type HPCDIR_W<'a, REG> = crate::BitWriter<'a, REG, HPCDIR_A>; +impl<'a, REG> HPCDIR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The pin(s) with hardware pin control enabled are selected to be in input mode."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hpcdir::Value1) + self.variant(HPCDIR_A::VALUE1) } #[doc = "The pin(s) with hardware pin control enabled are selected to be in output mode."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hpcdir::Value2) + self.variant(HPCDIR_A::VALUE2) } } #[doc = "Data Output Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Docfg { +pub enum DOCFG_A { #[doc = "0: DOUTx = shift data value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: DOUTx = inverted shift data value"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Docfg) -> Self { + fn from(variant: DOCFG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Docfg { +impl crate::FieldSpec for DOCFG_A { type Ux = u8; } -impl crate::IsEnum for Docfg {} +impl crate::IsEnum for DOCFG_A {} #[doc = "Field `DOCFG` reader - Data Output Configuration"] -pub type DocfgR = crate::FieldReader; -impl DocfgR { +pub type DOCFG_R = crate::FieldReader; +impl DOCFG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Docfg::Value1), - 1 => Some(Docfg::Value2), + 0 => Some(DOCFG_A::VALUE1), + 1 => Some(DOCFG_A::VALUE2), _ => None, } } #[doc = "DOUTx = shift data value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Docfg::Value1 + *self == DOCFG_A::VALUE1 } #[doc = "DOUTx = inverted shift data value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Docfg::Value2 + *self == DOCFG_A::VALUE2 } } #[doc = "Field `DOCFG` writer - Data Output Configuration"] -pub type DocfgW<'a, REG> = crate::FieldWriter<'a, REG, 2, Docfg>; -impl<'a, REG> DocfgW<'a, REG> +pub type DOCFG_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DOCFG_A>; +impl<'a, REG> DOCFG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -292,75 +292,75 @@ where #[doc = "DOUTx = shift data value"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Docfg::Value1) + self.variant(DOCFG_A::VALUE1) } #[doc = "DOUTx = inverted shift data value"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Docfg::Value2) + self.variant(DOCFG_A::VALUE2) } } #[doc = "Transmission Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Trm { +pub enum TRM_A { #[doc = "0: The shift control signal is considered as inactive and data frame transfers are not possible."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Trm) -> Self { + fn from(variant: TRM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Trm { +impl crate::FieldSpec for TRM_A { type Ux = u8; } -impl crate::IsEnum for Trm {} +impl crate::IsEnum for TRM_A {} #[doc = "Field `TRM` reader - Transmission Mode"] -pub type TrmR = crate::FieldReader; -impl TrmR { +pub type TRM_R = crate::FieldReader; +impl TRM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Trm { + pub const fn variant(&self) -> TRM_A { match self.bits { - 0 => Trm::Value1, - 1 => Trm::Value2, - 2 => Trm::Value3, - 3 => Trm::Value4, + 0 => TRM_A::VALUE1, + 1 => TRM_A::VALUE2, + 2 => TRM_A::VALUE3, + 3 => TRM_A::VALUE4, _ => unreachable!(), } } #[doc = "The shift control signal is considered as inactive and data frame transfers are not possible."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Trm::Value1 + *self == TRM_A::VALUE1 } #[doc = "The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Trm::Value2 + *self == TRM_A::VALUE2 } #[doc = "The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Trm::Value3 + *self == TRM_A::VALUE3 } #[doc = "The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Trm::Value4 + *self == TRM_A::VALUE4 } } #[doc = "Field `TRM` writer - Transmission Mode"] -pub type TrmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trm, crate::Safe>; -impl<'a, REG> TrmW<'a, REG> +pub type TRM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TRM_A, crate::Safe>; +impl<'a, REG> TRM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -368,89 +368,89 @@ where #[doc = "The shift control signal is considered as inactive and data frame transfers are not possible."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trm::Value1) + self.variant(TRM_A::VALUE1) } #[doc = "The shift control signal is considered active if it is at 1-level. This is the setting to be programmed to allow data transfers."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trm::Value2) + self.variant(TRM_A::VALUE2) } #[doc = "The shift control signal is considered active if it is at 0-level. It is recommended to avoid this setting and to use the inversion in the DX2 stage in case of a low-active signal."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Trm::Value3) + self.variant(TRM_A::VALUE3) } #[doc = "The shift control signal is considered active without referring to the actual signal level. Data frame transfer is possible after each edge of the signal."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Trm::Value4) + self.variant(TRM_A::VALUE4) } } #[doc = "Field `FLE` reader - Frame Length"] -pub type FleR = crate::FieldReader; +pub type FLE_R = crate::FieldReader; #[doc = "Field `FLE` writer - Frame Length"] -pub type FleW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type FLE_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Word Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Wle { +pub enum WLE_A { #[doc = "0: The data word contains 1 data bit located at bit position 0."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word contains 2 data bits located at bit positions \\[1:0\\]."] - Value2 = 1, + VALUE2 = 1, #[doc = "14: The data word contains 15 data bits located at bit positions \\[14:0\\]."] - Value3 = 14, + VALUE3 = 14, #[doc = "15: The data word contains 16 data bits located at bit positions \\[15:0\\]."] - Value4 = 15, + VALUE4 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Wle) -> Self { + fn from(variant: WLE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Wle { +impl crate::FieldSpec for WLE_A { type Ux = u8; } -impl crate::IsEnum for Wle {} +impl crate::IsEnum for WLE_A {} #[doc = "Field `WLE` reader - Word Length"] -pub type WleR = crate::FieldReader; -impl WleR { +pub type WLE_R = crate::FieldReader; +impl WLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Wle::Value1), - 1 => Some(Wle::Value2), - 14 => Some(Wle::Value3), - 15 => Some(Wle::Value4), + 0 => Some(WLE_A::VALUE1), + 1 => Some(WLE_A::VALUE2), + 14 => Some(WLE_A::VALUE3), + 15 => Some(WLE_A::VALUE4), _ => None, } } #[doc = "The data word contains 1 data bit located at bit position 0."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wle::Value1 + *self == WLE_A::VALUE1 } #[doc = "The data word contains 2 data bits located at bit positions \\[1:0\\]."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wle::Value2 + *self == WLE_A::VALUE2 } #[doc = "The data word contains 15 data bits located at bit positions \\[14:0\\]."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Wle::Value3 + *self == WLE_A::VALUE3 } #[doc = "The data word contains 16 data bits located at bit positions \\[15:0\\]."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Wle::Value4 + *self == WLE_A::VALUE4 } } #[doc = "Field `WLE` writer - Word Length"] -pub type WleW<'a, REG> = crate::FieldWriter<'a, REG, 4, Wle>; -impl<'a, REG> WleW<'a, REG> +pub type WLE_W<'a, REG> = crate::FieldWriter<'a, REG, 4, WLE_A>; +impl<'a, REG> WLE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -458,130 +458,130 @@ where #[doc = "The data word contains 1 data bit located at bit position 0."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wle::Value1) + self.variant(WLE_A::VALUE1) } #[doc = "The data word contains 2 data bits located at bit positions \\[1:0\\]."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wle::Value2) + self.variant(WLE_A::VALUE2) } #[doc = "The data word contains 15 data bits located at bit positions \\[14:0\\]."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Wle::Value3) + self.variant(WLE_A::VALUE3) } #[doc = "The data word contains 16 data bits located at bit positions \\[15:0\\]."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Wle::Value4) + self.variant(WLE_A::VALUE4) } } impl R { #[doc = "Bit 0 - Shift Direction"] #[inline(always)] - pub fn sdir(&self) -> SdirR { - SdirR::new((self.bits & 1) != 0) + pub fn sdir(&self) -> SDIR_R { + SDIR_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Passive Data Level"] #[inline(always)] - pub fn pdl(&self) -> PdlR { - PdlR::new(((self.bits >> 1) & 1) != 0) + pub fn pdl(&self) -> PDL_R { + PDL_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bits 2:3 - Data Shift Mode"] #[inline(always)] - pub fn dsm(&self) -> DsmR { - DsmR::new(((self.bits >> 2) & 3) as u8) + pub fn dsm(&self) -> DSM_R { + DSM_R::new(((self.bits >> 2) & 3) as u8) } #[doc = "Bit 4 - Port Control Direction"] #[inline(always)] - pub fn hpcdir(&self) -> HpcdirR { - HpcdirR::new(((self.bits >> 4) & 1) != 0) + pub fn hpcdir(&self) -> HPCDIR_R { + HPCDIR_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 6:7 - Data Output Configuration"] #[inline(always)] - pub fn docfg(&self) -> DocfgR { - DocfgR::new(((self.bits >> 6) & 3) as u8) + pub fn docfg(&self) -> DOCFG_R { + DOCFG_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Transmission Mode"] #[inline(always)] - pub fn trm(&self) -> TrmR { - TrmR::new(((self.bits >> 8) & 3) as u8) + pub fn trm(&self) -> TRM_R { + TRM_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bits 16:21 - Frame Length"] #[inline(always)] - pub fn fle(&self) -> FleR { - FleR::new(((self.bits >> 16) & 0x3f) as u8) + pub fn fle(&self) -> FLE_R { + FLE_R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:27 - Word Length"] #[inline(always)] - pub fn wle(&self) -> WleR { - WleR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn wle(&self) -> WLE_R { + WLE_R::new(((self.bits >> 24) & 0x0f) as u8) } } impl W { #[doc = "Bit 0 - Shift Direction"] #[inline(always)] #[must_use] - pub fn sdir(&mut self) -> SdirW { - SdirW::new(self, 0) + pub fn sdir(&mut self) -> SDIR_W { + SDIR_W::new(self, 0) } #[doc = "Bit 1 - Passive Data Level"] #[inline(always)] #[must_use] - pub fn pdl(&mut self) -> PdlW { - PdlW::new(self, 1) + pub fn pdl(&mut self) -> PDL_W { + PDL_W::new(self, 1) } #[doc = "Bits 2:3 - Data Shift Mode"] #[inline(always)] #[must_use] - pub fn dsm(&mut self) -> DsmW { - DsmW::new(self, 2) + pub fn dsm(&mut self) -> DSM_W { + DSM_W::new(self, 2) } #[doc = "Bit 4 - Port Control Direction"] #[inline(always)] #[must_use] - pub fn hpcdir(&mut self) -> HpcdirW { - HpcdirW::new(self, 4) + pub fn hpcdir(&mut self) -> HPCDIR_W { + HPCDIR_W::new(self, 4) } #[doc = "Bits 6:7 - Data Output Configuration"] #[inline(always)] #[must_use] - pub fn docfg(&mut self) -> DocfgW { - DocfgW::new(self, 6) + pub fn docfg(&mut self) -> DOCFG_W { + DOCFG_W::new(self, 6) } #[doc = "Bits 8:9 - Transmission Mode"] #[inline(always)] #[must_use] - pub fn trm(&mut self) -> TrmW { - TrmW::new(self, 8) + pub fn trm(&mut self) -> TRM_W { + TRM_W::new(self, 8) } #[doc = "Bits 16:21 - Frame Length"] #[inline(always)] #[must_use] - pub fn fle(&mut self) -> FleW { - FleW::new(self, 16) + pub fn fle(&mut self) -> FLE_W { + FLE_W::new(self, 16) } #[doc = "Bits 24:27 - Word Length"] #[inline(always)] #[must_use] - pub fn wle(&mut self) -> WleW { - WleW::new(self, 24) + pub fn wle(&mut self) -> WLE_W { + WLE_W::new(self, 24) } } #[doc = "Shift Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SctrSpec; -impl crate::RegisterSpec for SctrSpec { +pub struct SCTR_SPEC; +impl crate::RegisterSpec for SCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sctr::R`](R) reader structure"] -impl crate::Readable for SctrSpec {} +impl crate::Readable for SCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`sctr::W`](W) writer structure"] -impl crate::Writable for SctrSpec { +impl crate::Writable for SCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SCTR to value 0"] -impl crate::Resettable for SctrSpec { +impl crate::Resettable for SCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tbctr.rs b/src/usic0_ch0/tbctr.rs index dff5187b..153c50f8 100644 --- a/src/usic0_ch0/tbctr.rs +++ b/src/usic0_ch0/tbctr.rs @@ -1,196 +1,196 @@ #[doc = "Register `TBCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TBCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DPTR` writer - Data Pointer"] -pub type DptrW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type DPTR_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Field `LIMIT` reader - Limit For Interrupt Generation"] -pub type LimitR = crate::FieldReader; +pub type LIMIT_R = crate::FieldReader; #[doc = "Field `LIMIT` writer - Limit For Interrupt Generation"] -pub type LimitW<'a, REG> = crate::FieldWriter<'a, REG, 6>; +pub type LIMIT_W<'a, REG> = crate::FieldWriter<'a, REG, 6>; #[doc = "Standard Transmit Buffer Trigger Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stbtm { +pub enum STBTM_A { #[doc = "0: Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stbtm) -> Self { + fn from(variant: STBTM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STBTM` reader - Standard Transmit Buffer Trigger Mode"] -pub type StbtmR = crate::BitReader; -impl StbtmR { +pub type STBTM_R = crate::BitReader; +impl STBTM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stbtm { + pub const fn variant(&self) -> STBTM_A { match self.bits { - false => Stbtm::Value1, - true => Stbtm::Value2, + false => STBTM_A::VALUE1, + true => STBTM_A::VALUE2, } } #[doc = "Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbtm::Value1 + *self == STBTM_A::VALUE1 } #[doc = "Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbtm::Value2 + *self == STBTM_A::VALUE2 } } #[doc = "Field `STBTM` writer - Standard Transmit Buffer Trigger Mode"] -pub type StbtmW<'a, REG> = crate::BitWriter<'a, REG, Stbtm>; -impl<'a, REG> StbtmW<'a, REG> +pub type STBTM_W<'a, REG> = crate::BitWriter<'a, REG, STBTM_A>; +impl<'a, REG> STBTM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger mode 0: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.LIMIT."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stbtm::Value1) + self.variant(STBTM_A::VALUE1) } #[doc = "Trigger mode 1: While TRBSR.STBT=1, a standard buffer event will be generated whenever there is a data transfer to TBUF or data write to INx (depending on TBCTR.LOF setting). STBT is cleared when TRBSR.TBFLVL=TBCTR.SIZE."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stbtm::Value2) + self.variant(STBTM_A::VALUE2) } } #[doc = "Standard Transmit Buffer Trigger Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stbten { +pub enum STBTEN_A { #[doc = "0: The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stbten) -> Self { + fn from(variant: STBTEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STBTEN` reader - Standard Transmit Buffer Trigger Enable"] -pub type StbtenR = crate::BitReader; -impl StbtenR { +pub type STBTEN_R = crate::BitReader; +impl STBTEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stbten { + pub const fn variant(&self) -> STBTEN_A { match self.bits { - false => Stbten::Value1, - true => Stbten::Value2, + false => STBTEN_A::VALUE1, + true => STBTEN_A::VALUE2, } } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbten::Value1 + *self == STBTEN_A::VALUE1 } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbten::Value2 + *self == STBTEN_A::VALUE2 } } #[doc = "Field `STBTEN` writer - Standard Transmit Buffer Trigger Enable"] -pub type StbtenW<'a, REG> = crate::BitWriter<'a, REG, Stbten>; -impl<'a, REG> StbtenW<'a, REG> +pub type STBTEN_W<'a, REG> = crate::BitWriter<'a, REG, STBTEN_A>; +impl<'a, REG> STBTEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stbten::Value1) + self.variant(STBTEN_A::VALUE1) } #[doc = "The standard transmit buffer event trigger through bit TRBSR.STBT is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stbten::Value2) + self.variant(STBTEN_A::VALUE2) } } #[doc = "Standard Transmit Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stbinp { +pub enum STBINP_A { #[doc = "0: Output SR0 becomes activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output SR1 becomes activated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output SR2 becomes activated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Output SR3 becomes activated."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Output SR4 becomes activated."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Output SR5 becomes activated."] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stbinp) -> Self { + fn from(variant: STBINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stbinp { +impl crate::FieldSpec for STBINP_A { type Ux = u8; } -impl crate::IsEnum for Stbinp {} +impl crate::IsEnum for STBINP_A {} #[doc = "Field `STBINP` reader - Standard Transmit Buffer Interrupt Node Pointer"] -pub type StbinpR = crate::FieldReader; -impl StbinpR { +pub type STBINP_R = crate::FieldReader; +impl STBINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Stbinp::Value1), - 1 => Some(Stbinp::Value2), - 2 => Some(Stbinp::Value3), - 3 => Some(Stbinp::Value4), - 4 => Some(Stbinp::Value5), - 5 => Some(Stbinp::Value6), + 0 => Some(STBINP_A::VALUE1), + 1 => Some(STBINP_A::VALUE2), + 2 => Some(STBINP_A::VALUE3), + 3 => Some(STBINP_A::VALUE4), + 4 => Some(STBINP_A::VALUE5), + 5 => Some(STBINP_A::VALUE6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbinp::Value1 + *self == STBINP_A::VALUE1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbinp::Value2 + *self == STBINP_A::VALUE2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stbinp::Value3 + *self == STBINP_A::VALUE3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stbinp::Value4 + *self == STBINP_A::VALUE4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Stbinp::Value5 + *self == STBINP_A::VALUE5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Stbinp::Value6 + *self == STBINP_A::VALUE6 } } #[doc = "Field `STBINP` writer - Standard Transmit Buffer Interrupt Node Pointer"] -pub type StbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Stbinp>; -impl<'a, REG> StbinpW<'a, REG> +pub type STBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, STBINP_A>; +impl<'a, REG> STBINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -198,111 +198,111 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stbinp::Value1) + self.variant(STBINP_A::VALUE1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stbinp::Value2) + self.variant(STBINP_A::VALUE2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stbinp::Value3) + self.variant(STBINP_A::VALUE3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stbinp::Value4) + self.variant(STBINP_A::VALUE4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Stbinp::Value5) + self.variant(STBINP_A::VALUE5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Stbinp::Value6) + self.variant(STBINP_A::VALUE6) } } #[doc = "Alternative Transmit Buffer Interrupt Node Pointer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Atbinp { +pub enum ATBINP_A { #[doc = "0: Output SR0 becomes activated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output SR1 becomes activated."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Output SR2 becomes activated."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Output SR3 becomes activated."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: Output SR4 becomes activated."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: Output SR5 becomes activated."] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Atbinp) -> Self { + fn from(variant: ATBINP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Atbinp { +impl crate::FieldSpec for ATBINP_A { type Ux = u8; } -impl crate::IsEnum for Atbinp {} +impl crate::IsEnum for ATBINP_A {} #[doc = "Field `ATBINP` reader - Alternative Transmit Buffer Interrupt Node Pointer"] -pub type AtbinpR = crate::FieldReader; -impl AtbinpR { +pub type ATBINP_R = crate::FieldReader; +impl ATBINP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Atbinp::Value1), - 1 => Some(Atbinp::Value2), - 2 => Some(Atbinp::Value3), - 3 => Some(Atbinp::Value4), - 4 => Some(Atbinp::Value5), - 5 => Some(Atbinp::Value6), + 0 => Some(ATBINP_A::VALUE1), + 1 => Some(ATBINP_A::VALUE2), + 2 => Some(ATBINP_A::VALUE3), + 3 => Some(ATBINP_A::VALUE4), + 4 => Some(ATBINP_A::VALUE5), + 5 => Some(ATBINP_A::VALUE6), _ => None, } } #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Atbinp::Value1 + *self == ATBINP_A::VALUE1 } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Atbinp::Value2 + *self == ATBINP_A::VALUE2 } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Atbinp::Value3 + *self == ATBINP_A::VALUE3 } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Atbinp::Value4 + *self == ATBINP_A::VALUE4 } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Atbinp::Value5 + *self == ATBINP_A::VALUE5 } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Atbinp::Value6 + *self == ATBINP_A::VALUE6 } } #[doc = "Field `ATBINP` writer - Alternative Transmit Buffer Interrupt Node Pointer"] -pub type AtbinpW<'a, REG> = crate::FieldWriter<'a, REG, 3, Atbinp>; -impl<'a, REG> AtbinpW<'a, REG> +pub type ATBINP_W<'a, REG> = crate::FieldWriter<'a, REG, 3, ATBINP_A>; +impl<'a, REG> ATBINP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -310,119 +310,119 @@ where #[doc = "Output SR0 becomes activated."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Atbinp::Value1) + self.variant(ATBINP_A::VALUE1) } #[doc = "Output SR1 becomes activated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Atbinp::Value2) + self.variant(ATBINP_A::VALUE2) } #[doc = "Output SR2 becomes activated."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Atbinp::Value3) + self.variant(ATBINP_A::VALUE3) } #[doc = "Output SR3 becomes activated."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Atbinp::Value4) + self.variant(ATBINP_A::VALUE4) } #[doc = "Output SR4 becomes activated."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Atbinp::Value5) + self.variant(ATBINP_A::VALUE5) } #[doc = "Output SR5 becomes activated."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Atbinp::Value6) + self.variant(ATBINP_A::VALUE6) } } #[doc = "Buffer Size\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Size { +pub enum SIZE_A { #[doc = "0: The FIFO mechanism is disabled. The buffer does not accept any request for data."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The FIFO buffer contains 2 entries."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: The FIFO buffer contains 4 entries."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: The FIFO buffer contains 8 entries."] - Value4 = 3, + VALUE4 = 3, #[doc = "4: The FIFO buffer contains 16 entries."] - Value5 = 4, + VALUE5 = 4, #[doc = "5: The FIFO buffer contains 32 entries."] - Value6 = 5, + VALUE6 = 5, #[doc = "6: The FIFO buffer contains 64 entries."] - Value7 = 6, + VALUE7 = 6, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Size) -> Self { + fn from(variant: SIZE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Size { +impl crate::FieldSpec for SIZE_A { type Ux = u8; } -impl crate::IsEnum for Size {} +impl crate::IsEnum for SIZE_A {} #[doc = "Field `SIZE` reader - Buffer Size"] -pub type SizeR = crate::FieldReader; -impl SizeR { +pub type SIZE_R = crate::FieldReader; +impl SIZE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Size::Value1), - 1 => Some(Size::Value2), - 2 => Some(Size::Value3), - 3 => Some(Size::Value4), - 4 => Some(Size::Value5), - 5 => Some(Size::Value6), - 6 => Some(Size::Value7), + 0 => Some(SIZE_A::VALUE1), + 1 => Some(SIZE_A::VALUE2), + 2 => Some(SIZE_A::VALUE3), + 3 => Some(SIZE_A::VALUE4), + 4 => Some(SIZE_A::VALUE5), + 5 => Some(SIZE_A::VALUE6), + 6 => Some(SIZE_A::VALUE7), _ => None, } } #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Size::Value1 + *self == SIZE_A::VALUE1 } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Size::Value2 + *self == SIZE_A::VALUE2 } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Size::Value3 + *self == SIZE_A::VALUE3 } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Size::Value4 + *self == SIZE_A::VALUE4 } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Size::Value5 + *self == SIZE_A::VALUE5 } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Size::Value6 + *self == SIZE_A::VALUE6 } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn is_value7(&self) -> bool { - *self == Size::Value7 + *self == SIZE_A::VALUE7 } } #[doc = "Field `SIZE` writer - Buffer Size"] -pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Size>; -impl<'a, REG> SizeW<'a, REG> +pub type SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, SIZE_A>; +impl<'a, REG> SIZE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -430,321 +430,321 @@ where #[doc = "The FIFO mechanism is disabled. The buffer does not accept any request for data."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Size::Value1) + self.variant(SIZE_A::VALUE1) } #[doc = "The FIFO buffer contains 2 entries."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Size::Value2) + self.variant(SIZE_A::VALUE2) } #[doc = "The FIFO buffer contains 4 entries."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Size::Value3) + self.variant(SIZE_A::VALUE3) } #[doc = "The FIFO buffer contains 8 entries."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Size::Value4) + self.variant(SIZE_A::VALUE4) } #[doc = "The FIFO buffer contains 16 entries."] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Size::Value5) + self.variant(SIZE_A::VALUE5) } #[doc = "The FIFO buffer contains 32 entries."] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Size::Value6) + self.variant(SIZE_A::VALUE6) } #[doc = "The FIFO buffer contains 64 entries."] #[inline(always)] pub fn value7(self) -> &'a mut crate::W { - self.variant(Size::Value7) + self.variant(SIZE_A::VALUE7) } } #[doc = "Buffer Event on Limit Overflow\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Lof { +pub enum LOF_A { #[doc = "0: A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Lof) -> Self { + fn from(variant: LOF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LOF` reader - Buffer Event on Limit Overflow"] -pub type LofR = crate::BitReader; -impl LofR { +pub type LOF_R = crate::BitReader; +impl LOF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Lof { + pub const fn variant(&self) -> LOF_A { match self.bits { - false => Lof::Value1, - true => Lof::Value2, + false => LOF_A::VALUE1, + true => LOF_A::VALUE2, } } #[doc = "A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Lof::Value1 + *self == LOF_A::VALUE1 } #[doc = "A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Lof::Value2 + *self == LOF_A::VALUE2 } } #[doc = "Field `LOF` writer - Buffer Event on Limit Overflow"] -pub type LofW<'a, REG> = crate::BitWriter<'a, REG, Lof>; -impl<'a, REG> LofW<'a, REG> +pub type LOF_W<'a, REG> = crate::BitWriter<'a, REG, LOF_A>; +impl<'a, REG> LOF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard transmit buffer event occurs when the filling level equals the limit value and gets lower due to transmission of a data word."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Lof::Value1) + self.variant(LOF_A::VALUE1) } #[doc = "A standard transmit buffer interrupt event occurs when the filling level equals the limit value and gets bigger due to a write access to a data input location INx."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Lof::Value2) + self.variant(LOF_A::VALUE2) } } #[doc = "Standard Transmit Buffer Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stbien { +pub enum STBIEN_A { #[doc = "0: The standard transmit buffer interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The standard transmit buffer interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stbien) -> Self { + fn from(variant: STBIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STBIEN` reader - Standard Transmit Buffer Interrupt Enable"] -pub type StbienR = crate::BitReader; -impl StbienR { +pub type STBIEN_R = crate::BitReader; +impl STBIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stbien { + pub const fn variant(&self) -> STBIEN_A { match self.bits { - false => Stbien::Value1, - true => Stbien::Value2, + false => STBIEN_A::VALUE1, + true => STBIEN_A::VALUE2, } } #[doc = "The standard transmit buffer interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbien::Value1 + *self == STBIEN_A::VALUE1 } #[doc = "The standard transmit buffer interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbien::Value2 + *self == STBIEN_A::VALUE2 } } #[doc = "Field `STBIEN` writer - Standard Transmit Buffer Interrupt Enable"] -pub type StbienW<'a, REG> = crate::BitWriter<'a, REG, Stbien>; -impl<'a, REG> StbienW<'a, REG> +pub type STBIEN_W<'a, REG> = crate::BitWriter<'a, REG, STBIEN_A>; +impl<'a, REG> STBIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The standard transmit buffer interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stbien::Value1) + self.variant(STBIEN_A::VALUE1) } #[doc = "The standard transmit buffer interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stbien::Value2) + self.variant(STBIEN_A::VALUE2) } } #[doc = "Transmit Buffer Error Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tberien { +pub enum TBERIEN_A { #[doc = "0: The transmit buffer error interrupt generation is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit buffer error interrupt generation is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tberien) -> Self { + fn from(variant: TBERIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBERIEN` reader - Transmit Buffer Error Interrupt Enable"] -pub type TberienR = crate::BitReader; -impl TberienR { +pub type TBERIEN_R = crate::BitReader; +impl TBERIEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tberien { + pub const fn variant(&self) -> TBERIEN_A { match self.bits { - false => Tberien::Value1, - true => Tberien::Value2, + false => TBERIEN_A::VALUE1, + true => TBERIEN_A::VALUE2, } } #[doc = "The transmit buffer error interrupt generation is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tberien::Value1 + *self == TBERIEN_A::VALUE1 } #[doc = "The transmit buffer error interrupt generation is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tberien::Value2 + *self == TBERIEN_A::VALUE2 } } #[doc = "Field `TBERIEN` writer - Transmit Buffer Error Interrupt Enable"] -pub type TberienW<'a, REG> = crate::BitWriter<'a, REG, Tberien>; -impl<'a, REG> TberienW<'a, REG> +pub type TBERIEN_W<'a, REG> = crate::BitWriter<'a, REG, TBERIEN_A>; +impl<'a, REG> TBERIEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The transmit buffer error interrupt generation is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tberien::Value1) + self.variant(TBERIEN_A::VALUE1) } #[doc = "The transmit buffer error interrupt generation is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tberien::Value2) + self.variant(TBERIEN_A::VALUE2) } } impl R { #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - pub fn limit(&self) -> LimitR { - LimitR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn limit(&self) -> LIMIT_R { + LIMIT_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"] #[inline(always)] - pub fn stbtm(&self) -> StbtmR { - StbtmR::new(((self.bits >> 14) & 1) != 0) + pub fn stbtm(&self) -> STBTM_R { + STBTM_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"] #[inline(always)] - pub fn stbten(&self) -> StbtenR { - StbtenR::new(((self.bits >> 15) & 1) != 0) + pub fn stbten(&self) -> STBTEN_R { + STBTEN_R::new(((self.bits >> 15) & 1) != 0) } #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn stbinp(&self) -> StbinpR { - StbinpR::new(((self.bits >> 16) & 7) as u8) + pub fn stbinp(&self) -> STBINP_R { + STBINP_R::new(((self.bits >> 16) & 7) as u8) } #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - pub fn atbinp(&self) -> AtbinpR { - AtbinpR::new(((self.bits >> 19) & 7) as u8) + pub fn atbinp(&self) -> ATBINP_R { + ATBINP_R::new(((self.bits >> 19) & 7) as u8) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - pub fn size(&self) -> SizeR { - SizeR::new(((self.bits >> 24) & 7) as u8) + pub fn size(&self) -> SIZE_R { + SIZE_R::new(((self.bits >> 24) & 7) as u8) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - pub fn lof(&self) -> LofR { - LofR::new(((self.bits >> 28) & 1) != 0) + pub fn lof(&self) -> LOF_R { + LOF_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"] #[inline(always)] - pub fn stbien(&self) -> StbienR { - StbienR::new(((self.bits >> 30) & 1) != 0) + pub fn stbien(&self) -> STBIEN_R { + STBIEN_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"] #[inline(always)] - pub fn tberien(&self) -> TberienR { - TberienR::new(((self.bits >> 31) & 1) != 0) + pub fn tberien(&self) -> TBERIEN_R { + TBERIEN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] #[must_use] - pub fn dptr(&mut self) -> DptrW { - DptrW::new(self, 0) + pub fn dptr(&mut self) -> DPTR_W { + DPTR_W::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] #[must_use] - pub fn limit(&mut self) -> LimitW { - LimitW::new(self, 8) + pub fn limit(&mut self) -> LIMIT_W { + LIMIT_W::new(self, 8) } #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"] #[inline(always)] #[must_use] - pub fn stbtm(&mut self) -> StbtmW { - StbtmW::new(self, 14) + pub fn stbtm(&mut self) -> STBTM_W { + STBTM_W::new(self, 14) } #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"] #[inline(always)] #[must_use] - pub fn stbten(&mut self) -> StbtenW { - StbtenW::new(self, 15) + pub fn stbten(&mut self) -> STBTEN_W { + STBTEN_W::new(self, 15) } #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn stbinp(&mut self) -> StbinpW { - StbinpW::new(self, 16) + pub fn stbinp(&mut self) -> STBINP_W { + STBINP_W::new(self, 16) } #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"] #[inline(always)] #[must_use] - pub fn atbinp(&mut self) -> AtbinpW { - AtbinpW::new(self, 19) + pub fn atbinp(&mut self) -> ATBINP_W { + ATBINP_W::new(self, 19) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] #[must_use] - pub fn size(&mut self) -> SizeW { - SizeW::new(self, 24) + pub fn size(&mut self) -> SIZE_W { + SIZE_W::new(self, 24) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] #[must_use] - pub fn lof(&mut self) -> LofW { - LofW::new(self, 28) + pub fn lof(&mut self) -> LOF_W { + LOF_W::new(self, 28) } #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"] #[inline(always)] #[must_use] - pub fn stbien(&mut self) -> StbienW { - StbienW::new(self, 30) + pub fn stbien(&mut self) -> STBIEN_W { + STBIEN_W::new(self, 30) } #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"] #[inline(always)] #[must_use] - pub fn tberien(&mut self) -> TberienW { - TberienW::new(self, 31) + pub fn tberien(&mut self) -> TBERIEN_W { + TBERIEN_W::new(self, 31) } } #[doc = "Transmitter Buffer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TbctrSpec; -impl crate::RegisterSpec for TbctrSpec { +pub struct TBCTR_SPEC; +impl crate::RegisterSpec for TBCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tbctr::R`](R) reader structure"] -impl crate::Readable for TbctrSpec {} +impl crate::Readable for TBCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`tbctr::W`](W) writer structure"] -impl crate::Writable for TbctrSpec { +impl crate::Writable for TBCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TBCTR to value 0"] -impl crate::Resettable for TbctrSpec { +impl crate::Resettable for TBCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tbuf.rs b/src/usic0_ch0/tbuf.rs index 7805f451..379b540e 100644 --- a/src/usic0_ch0/tbuf.rs +++ b/src/usic0_ch0/tbuf.rs @@ -1,41 +1,41 @@ #[doc = "Register `TBUF[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TBUF[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `TDATA` reader - Transmit Data"] -pub type TdataR = crate::FieldReader; +pub type TDATA_R = crate::FieldReader; #[doc = "Field `TDATA` writer - Transmit Data"] -pub type TdataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl R { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] - pub fn tdata(&self) -> TdataR { - TdataR::new((self.bits & 0xffff) as u16) + pub fn tdata(&self) -> TDATA_R { + TDATA_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] #[must_use] - pub fn tdata(&mut self) -> TdataW { - TdataW::new(self, 0) + pub fn tdata(&mut self) -> TDATA_W { + TDATA_W::new(self, 0) } } #[doc = "Transmit Buffer\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tbuf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tbuf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TbufSpec; -impl crate::RegisterSpec for TbufSpec { +pub struct TBUF_SPEC; +impl crate::RegisterSpec for TBUF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tbuf::R`](R) reader structure"] -impl crate::Readable for TbufSpec {} +impl crate::Readable for TBUF_SPEC {} #[doc = "`write(|w| ..)` method takes [`tbuf::W`](W) writer structure"] -impl crate::Writable for TbufSpec { +impl crate::Writable for TBUF_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TBUF[%s] to value 0"] -impl crate::Resettable for TbufSpec { +impl crate::Resettable for TBUF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/tcsr.rs b/src/usic0_ch0/tcsr.rs index df026204..22a10445 100644 --- a/src/usic0_ch0/tcsr.rs +++ b/src/usic0_ch0/tcsr.rs @@ -1,103 +1,103 @@ #[doc = "Register `TCSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TCSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "WLE Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wlemd { +pub enum WLEMD_A { #[doc = "0: The automatic update of SCTR.WLE and TCSR.EOF is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The automatic update of SCTR.WLE and TCSR.EOF is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wlemd) -> Self { + fn from(variant: WLEMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WLEMD` reader - WLE Mode"] -pub type WlemdR = crate::BitReader; -impl WlemdR { +pub type WLEMD_R = crate::BitReader; +impl WLEMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wlemd { + pub const fn variant(&self) -> WLEMD_A { match self.bits { - false => Wlemd::Value1, - true => Wlemd::Value2, + false => WLEMD_A::VALUE1, + true => WLEMD_A::VALUE2, } } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wlemd::Value1 + *self == WLEMD_A::VALUE1 } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wlemd::Value2 + *self == WLEMD_A::VALUE2 } } #[doc = "Field `WLEMD` writer - WLE Mode"] -pub type WlemdW<'a, REG> = crate::BitWriter<'a, REG, Wlemd>; -impl<'a, REG> WlemdW<'a, REG> +pub type WLEMD_W<'a, REG> = crate::BitWriter<'a, REG, WLEMD_A>; +impl<'a, REG> WLEMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wlemd::Value1) + self.variant(WLEMD_A::VALUE1) } #[doc = "The automatic update of SCTR.WLE and TCSR.EOF is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wlemd::Value2) + self.variant(WLEMD_A::VALUE2) } } #[doc = "Select Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Selmd { +pub enum SELMD_A { #[doc = "0: The automatic update of PCR.CTR\\[23:16\\] is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The automatic update of PCR.CTR\\[23:16\\] is disabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Selmd) -> Self { + fn from(variant: SELMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SELMD` reader - Select Mode"] -pub type SelmdR = crate::BitReader; -impl SelmdR { +pub type SELMD_R = crate::BitReader; +impl SELMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Selmd { + pub const fn variant(&self) -> SELMD_A { match self.bits { - false => Selmd::Value1, - true => Selmd::Value2, + false => SELMD_A::VALUE1, + true => SELMD_A::VALUE2, } } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Selmd::Value1 + *self == SELMD_A::VALUE1 } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Selmd::Value2 + *self == SELMD_A::VALUE2 } } #[doc = "Field `SELMD` writer - Select Mode"] -pub type SelmdW<'a, REG> = crate::BitWriter<'a, REG, Selmd>; -impl<'a, REG> SelmdW<'a, REG> +pub type SELMD_W<'a, REG> = crate::BitWriter<'a, REG, SELMD_A>; +impl<'a, REG> SELMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -105,430 +105,430 @@ where is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Selmd::Value1) + self.variant(SELMD_A::VALUE1) } #[doc = "The automatic update of PCR.CTR\\[23:16\\] is disabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Selmd::Value2) + self.variant(SELMD_A::VALUE2) } } #[doc = "FLE Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flemd { +pub enum FLEMD_A { #[doc = "0: The automatic update of FLE is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The automatic update of FLE is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flemd) -> Self { + fn from(variant: FLEMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLEMD` reader - FLE Mode"] -pub type FlemdR = crate::BitReader; -impl FlemdR { +pub type FLEMD_R = crate::BitReader; +impl FLEMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Flemd { + pub const fn variant(&self) -> FLEMD_A { match self.bits { - false => Flemd::Value1, - true => Flemd::Value2, + false => FLEMD_A::VALUE1, + true => FLEMD_A::VALUE2, } } #[doc = "The automatic update of FLE is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Flemd::Value1 + *self == FLEMD_A::VALUE1 } #[doc = "The automatic update of FLE is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Flemd::Value2 + *self == FLEMD_A::VALUE2 } } #[doc = "Field `FLEMD` writer - FLE Mode"] -pub type FlemdW<'a, REG> = crate::BitWriter<'a, REG, Flemd>; -impl<'a, REG> FlemdW<'a, REG> +pub type FLEMD_W<'a, REG> = crate::BitWriter<'a, REG, FLEMD_A>; +impl<'a, REG> FLEMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of FLE is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flemd::Value1) + self.variant(FLEMD_A::VALUE1) } #[doc = "The automatic update of FLE is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flemd::Value2) + self.variant(FLEMD_A::VALUE2) } } #[doc = "WA Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wamd { +pub enum WAMD_A { #[doc = "0: The automatic update of bit WA is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The automatic update of bit WA is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wamd) -> Self { + fn from(variant: WAMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WAMD` reader - WA Mode"] -pub type WamdR = crate::BitReader; -impl WamdR { +pub type WAMD_R = crate::BitReader; +impl WAMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wamd { + pub const fn variant(&self) -> WAMD_A { match self.bits { - false => Wamd::Value1, - true => Wamd::Value2, + false => WAMD_A::VALUE1, + true => WAMD_A::VALUE2, } } #[doc = "The automatic update of bit WA is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wamd::Value1 + *self == WAMD_A::VALUE1 } #[doc = "The automatic update of bit WA is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wamd::Value2 + *self == WAMD_A::VALUE2 } } #[doc = "Field `WAMD` writer - WA Mode"] -pub type WamdW<'a, REG> = crate::BitWriter<'a, REG, Wamd>; -impl<'a, REG> WamdW<'a, REG> +pub type WAMD_W<'a, REG> = crate::BitWriter<'a, REG, WAMD_A>; +impl<'a, REG> WAMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of bit WA is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wamd::Value1) + self.variant(WAMD_A::VALUE1) } #[doc = "The automatic update of bit WA is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wamd::Value2) + self.variant(WAMD_A::VALUE2) } } #[doc = "Hardware Port Control Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Hpcmd { +pub enum HPCMD_A { #[doc = "0: The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Hpcmd) -> Self { + fn from(variant: HPCMD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `HPCMD` reader - Hardware Port Control Mode"] -pub type HpcmdR = crate::BitReader; -impl HpcmdR { +pub type HPCMD_R = crate::BitReader; +impl HPCMD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Hpcmd { + pub const fn variant(&self) -> HPCMD_A { match self.bits { - false => Hpcmd::Value1, - true => Hpcmd::Value2, + false => HPCMD_A::VALUE1, + true => HPCMD_A::VALUE2, } } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Hpcmd::Value1 + *self == HPCMD_A::VALUE1 } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Hpcmd::Value2 + *self == HPCMD_A::VALUE2 } } #[doc = "Field `HPCMD` writer - Hardware Port Control Mode"] -pub type HpcmdW<'a, REG> = crate::BitWriter<'a, REG, Hpcmd>; -impl<'a, REG> HpcmdW<'a, REG> +pub type HPCMD_W<'a, REG> = crate::BitWriter<'a, REG, HPCMD_A>; +impl<'a, REG> HPCMD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is disabled."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Hpcmd::Value1) + self.variant(HPCMD_A::VALUE1) } #[doc = "The automatic update of bits SCTR.DSM and SCTR.HPCDIR is enabled."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Hpcmd::Value2) + self.variant(HPCMD_A::VALUE2) } } #[doc = "Start Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sof { +pub enum SOF_A { #[doc = "0: The data word in TBUF is not considered as first word of a frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sof) -> Self { + fn from(variant: SOF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SOF` reader - Start Of Frame"] -pub type SofR = crate::BitReader; -impl SofR { +pub type SOF_R = crate::BitReader; +impl SOF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sof { + pub const fn variant(&self) -> SOF_A { match self.bits { - false => Sof::Value1, - true => Sof::Value2, + false => SOF_A::VALUE1, + true => SOF_A::VALUE2, } } #[doc = "The data word in TBUF is not considered as first word of a frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sof::Value1 + *self == SOF_A::VALUE1 } #[doc = "The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sof::Value2 + *self == SOF_A::VALUE2 } } #[doc = "Field `SOF` writer - Start Of Frame"] -pub type SofW<'a, REG> = crate::BitWriter<'a, REG, Sof>; -impl<'a, REG> SofW<'a, REG> +pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG, SOF_A>; +impl<'a, REG> SOF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as first word of a frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sof::Value1) + self.variant(SOF_A::VALUE1) } #[doc = "The data word in TBUF is considered as first word of a frame. A currently running frame is finished and MSLS becomes deactivated (respecting the programmed delays)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sof::Value2) + self.variant(SOF_A::VALUE2) } } #[doc = "End Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Eof { +pub enum EOF_A { #[doc = "0: The data word in TBUF is not considered as last word of an SSC frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word in TBUF is considered as last word of an SSC frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Eof) -> Self { + fn from(variant: EOF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EOF` reader - End Of Frame"] -pub type EofR = crate::BitReader; -impl EofR { +pub type EOF_R = crate::BitReader; +impl EOF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Eof { + pub const fn variant(&self) -> EOF_A { match self.bits { - false => Eof::Value1, - true => Eof::Value2, + false => EOF_A::VALUE1, + true => EOF_A::VALUE2, } } #[doc = "The data word in TBUF is not considered as last word of an SSC frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Eof::Value1 + *self == EOF_A::VALUE1 } #[doc = "The data word in TBUF is considered as last word of an SSC frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Eof::Value2 + *self == EOF_A::VALUE2 } } #[doc = "Field `EOF` writer - End Of Frame"] -pub type EofW<'a, REG> = crate::BitWriter<'a, REG, Eof>; -impl<'a, REG> EofW<'a, REG> +pub type EOF_W<'a, REG> = crate::BitWriter<'a, REG, EOF_A>; +impl<'a, REG> EOF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as last word of an SSC frame."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Eof::Value1) + self.variant(EOF_A::VALUE1) } #[doc = "The data word in TBUF is considered as last word of an SSC frame."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Eof::Value2) + self.variant(EOF_A::VALUE2) } } #[doc = "Transmit Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tdv { +pub enum TDV_A { #[doc = "0: The data word in TBUF is not valid for transmission."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tdv) -> Self { + fn from(variant: TDV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TDV` reader - Transmit Data Valid"] -pub type TdvR = crate::BitReader; -impl TdvR { +pub type TDV_R = crate::BitReader; +impl TDV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tdv { + pub const fn variant(&self) -> TDV_A { match self.bits { - false => Tdv::Value1, - true => Tdv::Value2, + false => TDV_A::VALUE1, + true => TDV_A::VALUE2, } } #[doc = "The data word in TBUF is not valid for transmission."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tdv::Value1 + *self == TDV_A::VALUE1 } #[doc = "The data word in TBUF is valid for transmission and a transmission start is possible. New data should not be written to a TBUFx input location while TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tdv::Value2 + *self == TDV_A::VALUE2 } } #[doc = "TBUF Data Single Shot Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tdssm { +pub enum TDSSM_A { #[doc = "0: The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tdssm) -> Self { + fn from(variant: TDSSM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TDSSM` reader - TBUF Data Single Shot Mode"] -pub type TdssmR = crate::BitReader; -impl TdssmR { +pub type TDSSM_R = crate::BitReader; +impl TDSSM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tdssm { + pub const fn variant(&self) -> TDSSM_A { match self.bits { - false => Tdssm::Value1, - true => Tdssm::Value2, + false => TDSSM_A::VALUE1, + true => TDSSM_A::VALUE2, } } #[doc = "The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tdssm::Value1 + *self == TDSSM_A::VALUE1 } #[doc = "The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tdssm::Value2 + *self == TDSSM_A::VALUE2 } } #[doc = "Field `TDSSM` writer - TBUF Data Single Shot Mode"] -pub type TdssmW<'a, REG> = crate::BitWriter<'a, REG, Tdssm>; -impl<'a, REG> TdssmW<'a, REG> +pub type TDSSM_W<'a, REG> = crate::BitWriter<'a, REG, TDSSM_A>; +impl<'a, REG> TDSSM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF is not considered as invalid after it has been loaded into the transmit shift register. The loading of the TBUF data into the shift register does not clear TDV."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tdssm::Value1) + self.variant(TDSSM_A::VALUE1) } #[doc = "The data word in TBUF is considered as invalid after it has been loaded into the shift register. In ASC and IIC mode, TDV is cleared with the TBI event, whereas in SSC and IIS mode, it is cleared with the RSI event. TDSSM = 1 has to be programmed if an optional data buffer is used."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tdssm::Value2) + self.variant(TDSSM_A::VALUE2) } } #[doc = "TBUF Data Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tden { +pub enum TDEN_A { #[doc = "0: A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmission of the data word in TBUF can be started if TDV = 1."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tden) -> Self { + fn from(variant: TDEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tden { +impl crate::FieldSpec for TDEN_A { type Ux = u8; } -impl crate::IsEnum for Tden {} +impl crate::IsEnum for TDEN_A {} #[doc = "Field `TDEN` reader - TBUF Data Enable"] -pub type TdenR = crate::FieldReader; -impl TdenR { +pub type TDEN_R = crate::FieldReader; +impl TDEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tden { + pub const fn variant(&self) -> TDEN_A { match self.bits { - 0 => Tden::Value1, - 1 => Tden::Value2, - 2 => Tden::Value3, - 3 => Tden::Value4, + 0 => TDEN_A::VALUE1, + 1 => TDEN_A::VALUE2, + 2 => TDEN_A::VALUE3, + 3 => TDEN_A::VALUE4, _ => unreachable!(), } } #[doc = "A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tden::Value1 + *self == TDEN_A::VALUE1 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tden::Value2 + *self == TDEN_A::VALUE2 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Tden::Value3 + *self == TDEN_A::VALUE3 } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Tden::Value4 + *self == TDEN_A::VALUE4 } } #[doc = "Field `TDEN` writer - TBUF Data Enable"] -pub type TdenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Tden, crate::Safe>; -impl<'a, REG> TdenW<'a, REG> +pub type TDEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TDEN_A, crate::Safe>; +impl<'a, REG> TDEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -536,438 +536,438 @@ where #[doc = "A transmission start of the data word in TBUF is disabled. If a transmission is started, the passive data level is sent out."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tden::Value1) + self.variant(TDEN_A::VALUE1) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tden::Value2) + self.variant(TDEN_A::VALUE2) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 0."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Tden::Value3) + self.variant(TDEN_A::VALUE3) } #[doc = "A transmission of the data word in TBUF can be started if TDV = 1 while DX2S = 1."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Tden::Value4) + self.variant(TDEN_A::VALUE4) } } #[doc = "TBUF Data Valid Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tdvtr { +pub enum TDVTR_A { #[doc = "0: Bit TCSR.TE is permanently set."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tdvtr) -> Self { + fn from(variant: TDVTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TDVTR` reader - TBUF Data Valid Trigger"] -pub type TdvtrR = crate::BitReader; -impl TdvtrR { +pub type TDVTR_R = crate::BitReader; +impl TDVTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tdvtr { + pub const fn variant(&self) -> TDVTR_A { match self.bits { - false => Tdvtr::Value1, - true => Tdvtr::Value2, + false => TDVTR_A::VALUE1, + true => TDVTR_A::VALUE2, } } #[doc = "Bit TCSR.TE is permanently set."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tdvtr::Value1 + *self == TDVTR_A::VALUE1 } #[doc = "Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tdvtr::Value2 + *self == TDVTR_A::VALUE2 } } #[doc = "Field `TDVTR` writer - TBUF Data Valid Trigger"] -pub type TdvtrW<'a, REG> = crate::BitWriter<'a, REG, Tdvtr>; -impl<'a, REG> TdvtrW<'a, REG> +pub type TDVTR_W<'a, REG> = crate::BitWriter<'a, REG, TDVTR_A>; +impl<'a, REG> TDVTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Bit TCSR.TE is permanently set."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tdvtr::Value1) + self.variant(TDVTR_A::VALUE1) } #[doc = "Bit TCSR.TE is set if DX2T becomes active while TDV = 1."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tdvtr::Value2) + self.variant(TDVTR_A::VALUE2) } } #[doc = "Word Address\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wa { +pub enum WA_A { #[doc = "0: The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wa) -> Self { + fn from(variant: WA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WA` reader - Word Address"] -pub type WaR = crate::BitReader; -impl WaR { +pub type WA_R = crate::BitReader; +impl WA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wa { + pub const fn variant(&self) -> WA_A { match self.bits { - false => Wa::Value1, - true => Wa::Value2, + false => WA_A::VALUE1, + true => WA_A::VALUE2, } } #[doc = "The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wa::Value1 + *self == WA_A::VALUE1 } #[doc = "The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wa::Value2 + *self == WA_A::VALUE2 } } #[doc = "Field `WA` writer - Word Address"] -pub type WaW<'a, REG> = crate::BitWriter<'a, REG, Wa>; -impl<'a, REG> WaW<'a, REG> +pub type WA_W<'a, REG> = crate::BitWriter<'a, REG, WA_A>; +impl<'a, REG> WA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The data word in TBUF will be transmitted after a falling edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wa::Value1) + self.variant(WA_A::VALUE1) } #[doc = "The data word in TBUF will be transmitted after a rising edge of WA has been detected (referring to PSR.WA)."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wa::Value2) + self.variant(WA_A::VALUE2) } } #[doc = "Transmitted Start Of Frame\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tsof { +pub enum TSOF_A { #[doc = "0: The latest data word transmission has not been started for the first word of a data frame."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The latest data word transmission has been started for the first word of a data frame."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tsof) -> Self { + fn from(variant: TSOF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TSOF` reader - Transmitted Start Of Frame"] -pub type TsofR = crate::BitReader; -impl TsofR { +pub type TSOF_R = crate::BitReader; +impl TSOF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tsof { + pub const fn variant(&self) -> TSOF_A { match self.bits { - false => Tsof::Value1, - true => Tsof::Value2, + false => TSOF_A::VALUE1, + true => TSOF_A::VALUE2, } } #[doc = "The latest data word transmission has not been started for the first word of a data frame."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tsof::Value1 + *self == TSOF_A::VALUE1 } #[doc = "The latest data word transmission has been started for the first word of a data frame."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tsof::Value2 + *self == TSOF_A::VALUE2 } } #[doc = "Transmission Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tv { +pub enum TV_A { #[doc = "0: The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The latest start of a data word transmission has taken place with valid data from TBUF."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tv) -> Self { + fn from(variant: TV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TV` reader - Transmission Valid"] -pub type TvR = crate::BitReader; -impl TvR { +pub type TV_R = crate::BitReader; +impl TV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tv { + pub const fn variant(&self) -> TV_A { match self.bits { - false => Tv::Value1, - true => Tv::Value2, + false => TV_A::VALUE1, + true => TV_A::VALUE2, } } #[doc = "The latest start of a data word transmission has taken place while no valid data was available. As a result, the transmission of a data words with passive level (SCTR.PDL) has been started."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tv::Value1 + *self == TV_A::VALUE1 } #[doc = "The latest start of a data word transmission has taken place with valid data from TBUF."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tv::Value2 + *self == TV_A::VALUE2 } } #[doc = "Transmission Valid Cumulated\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tvc { +pub enum TVC_A { #[doc = "0: Since TVC has been set, at least one data buffer underflow condition has occurred."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Since TVC has been set, no data buffer underflow condition has occurred."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tvc) -> Self { + fn from(variant: TVC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TVC` reader - Transmission Valid Cumulated"] -pub type TvcR = crate::BitReader; -impl TvcR { +pub type TVC_R = crate::BitReader; +impl TVC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tvc { + pub const fn variant(&self) -> TVC_A { match self.bits { - false => Tvc::Value1, - true => Tvc::Value2, + false => TVC_A::VALUE1, + true => TVC_A::VALUE2, } } #[doc = "Since TVC has been set, at least one data buffer underflow condition has occurred."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tvc::Value1 + *self == TVC_A::VALUE1 } #[doc = "Since TVC has been set, no data buffer underflow condition has occurred."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tvc::Value2 + *self == TVC_A::VALUE2 } } #[doc = "Trigger Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Te { +pub enum TE_A { #[doc = "0: The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Te) -> Self { + fn from(variant: TE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TE` reader - Trigger Event"] -pub type TeR = crate::BitReader; -impl TeR { +pub type TE_R = crate::BitReader; +impl TE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Te { + pub const fn variant(&self) -> TE_A { match self.bits { - false => Te::Value1, - true => Te::Value2, + false => TE_A::VALUE1, + true => TE_A::VALUE2, } } #[doc = "The trigger event has not yet been detected. A transmission of the data word in TBUF can not be started."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Te::Value1 + *self == TE_A::VALUE1 } #[doc = "The trigger event has been detected (or the trigger mechanism is switched off) and a transmission of the data word in TBUF can not be started."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Te::Value2 + *self == TE_A::VALUE2 } } impl R { #[doc = "Bit 0 - WLE Mode"] #[inline(always)] - pub fn wlemd(&self) -> WlemdR { - WlemdR::new((self.bits & 1) != 0) + pub fn wlemd(&self) -> WLEMD_R { + WLEMD_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Select Mode"] #[inline(always)] - pub fn selmd(&self) -> SelmdR { - SelmdR::new(((self.bits >> 1) & 1) != 0) + pub fn selmd(&self) -> SELMD_R { + SELMD_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - FLE Mode"] #[inline(always)] - pub fn flemd(&self) -> FlemdR { - FlemdR::new(((self.bits >> 2) & 1) != 0) + pub fn flemd(&self) -> FLEMD_R { + FLEMD_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - WA Mode"] #[inline(always)] - pub fn wamd(&self) -> WamdR { - WamdR::new(((self.bits >> 3) & 1) != 0) + pub fn wamd(&self) -> WAMD_R { + WAMD_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Hardware Port Control Mode"] #[inline(always)] - pub fn hpcmd(&self) -> HpcmdR { - HpcmdR::new(((self.bits >> 4) & 1) != 0) + pub fn hpcmd(&self) -> HPCMD_R { + HPCMD_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Start Of Frame"] #[inline(always)] - pub fn sof(&self) -> SofR { - SofR::new(((self.bits >> 5) & 1) != 0) + pub fn sof(&self) -> SOF_R { + SOF_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - End Of Frame"] #[inline(always)] - pub fn eof(&self) -> EofR { - EofR::new(((self.bits >> 6) & 1) != 0) + pub fn eof(&self) -> EOF_R { + EOF_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Transmit Data Valid"] #[inline(always)] - pub fn tdv(&self) -> TdvR { - TdvR::new(((self.bits >> 7) & 1) != 0) + pub fn tdv(&self) -> TDV_R { + TDV_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - TBUF Data Single Shot Mode"] #[inline(always)] - pub fn tdssm(&self) -> TdssmR { - TdssmR::new(((self.bits >> 8) & 1) != 0) + pub fn tdssm(&self) -> TDSSM_R { + TDSSM_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 10:11 - TBUF Data Enable"] #[inline(always)] - pub fn tden(&self) -> TdenR { - TdenR::new(((self.bits >> 10) & 3) as u8) + pub fn tden(&self) -> TDEN_R { + TDEN_R::new(((self.bits >> 10) & 3) as u8) } #[doc = "Bit 12 - TBUF Data Valid Trigger"] #[inline(always)] - pub fn tdvtr(&self) -> TdvtrR { - TdvtrR::new(((self.bits >> 12) & 1) != 0) + pub fn tdvtr(&self) -> TDVTR_R { + TDVTR_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Word Address"] #[inline(always)] - pub fn wa(&self) -> WaR { - WaR::new(((self.bits >> 13) & 1) != 0) + pub fn wa(&self) -> WA_R { + WA_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 24 - Transmitted Start Of Frame"] #[inline(always)] - pub fn tsof(&self) -> TsofR { - TsofR::new(((self.bits >> 24) & 1) != 0) + pub fn tsof(&self) -> TSOF_R { + TSOF_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 26 - Transmission Valid"] #[inline(always)] - pub fn tv(&self) -> TvR { - TvR::new(((self.bits >> 26) & 1) != 0) + pub fn tv(&self) -> TV_R { + TV_R::new(((self.bits >> 26) & 1) != 0) } #[doc = "Bit 27 - Transmission Valid Cumulated"] #[inline(always)] - pub fn tvc(&self) -> TvcR { - TvcR::new(((self.bits >> 27) & 1) != 0) + pub fn tvc(&self) -> TVC_R { + TVC_R::new(((self.bits >> 27) & 1) != 0) } #[doc = "Bit 28 - Trigger Event"] #[inline(always)] - pub fn te(&self) -> TeR { - TeR::new(((self.bits >> 28) & 1) != 0) + pub fn te(&self) -> TE_R { + TE_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bit 0 - WLE Mode"] #[inline(always)] #[must_use] - pub fn wlemd(&mut self) -> WlemdW { - WlemdW::new(self, 0) + pub fn wlemd(&mut self) -> WLEMD_W { + WLEMD_W::new(self, 0) } #[doc = "Bit 1 - Select Mode"] #[inline(always)] #[must_use] - pub fn selmd(&mut self) -> SelmdW { - SelmdW::new(self, 1) + pub fn selmd(&mut self) -> SELMD_W { + SELMD_W::new(self, 1) } #[doc = "Bit 2 - FLE Mode"] #[inline(always)] #[must_use] - pub fn flemd(&mut self) -> FlemdW { - FlemdW::new(self, 2) + pub fn flemd(&mut self) -> FLEMD_W { + FLEMD_W::new(self, 2) } #[doc = "Bit 3 - WA Mode"] #[inline(always)] #[must_use] - pub fn wamd(&mut self) -> WamdW { - WamdW::new(self, 3) + pub fn wamd(&mut self) -> WAMD_W { + WAMD_W::new(self, 3) } #[doc = "Bit 4 - Hardware Port Control Mode"] #[inline(always)] #[must_use] - pub fn hpcmd(&mut self) -> HpcmdW { - HpcmdW::new(self, 4) + pub fn hpcmd(&mut self) -> HPCMD_W { + HPCMD_W::new(self, 4) } #[doc = "Bit 5 - Start Of Frame"] #[inline(always)] #[must_use] - pub fn sof(&mut self) -> SofW { - SofW::new(self, 5) + pub fn sof(&mut self) -> SOF_W { + SOF_W::new(self, 5) } #[doc = "Bit 6 - End Of Frame"] #[inline(always)] #[must_use] - pub fn eof(&mut self) -> EofW { - EofW::new(self, 6) + pub fn eof(&mut self) -> EOF_W { + EOF_W::new(self, 6) } #[doc = "Bit 8 - TBUF Data Single Shot Mode"] #[inline(always)] #[must_use] - pub fn tdssm(&mut self) -> TdssmW { - TdssmW::new(self, 8) + pub fn tdssm(&mut self) -> TDSSM_W { + TDSSM_W::new(self, 8) } #[doc = "Bits 10:11 - TBUF Data Enable"] #[inline(always)] #[must_use] - pub fn tden(&mut self) -> TdenW { - TdenW::new(self, 10) + pub fn tden(&mut self) -> TDEN_W { + TDEN_W::new(self, 10) } #[doc = "Bit 12 - TBUF Data Valid Trigger"] #[inline(always)] #[must_use] - pub fn tdvtr(&mut self) -> TdvtrW { - TdvtrW::new(self, 12) + pub fn tdvtr(&mut self) -> TDVTR_W { + TDVTR_W::new(self, 12) } #[doc = "Bit 13 - Word Address"] #[inline(always)] #[must_use] - pub fn wa(&mut self) -> WaW { - WaW::new(self, 13) + pub fn wa(&mut self) -> WA_W { + WA_W::new(self, 13) } } #[doc = "Transmit Control/Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TcsrSpec; -impl crate::RegisterSpec for TcsrSpec { +pub struct TCSR_SPEC; +impl crate::RegisterSpec for TCSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tcsr::R`](R) reader structure"] -impl crate::Readable for TcsrSpec {} +impl crate::Readable for TCSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`tcsr::W`](W) writer structure"] -impl crate::Writable for TcsrSpec { +impl crate::Writable for TCSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TCSR to value 0"] -impl crate::Resettable for TcsrSpec { +impl crate::Resettable for TCSR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbptr.rs b/src/usic0_ch0/trbptr.rs index f14576cb..ed9103d8 100644 --- a/src/usic0_ch0/trbptr.rs +++ b/src/usic0_ch0/trbptr.rs @@ -1,43 +1,43 @@ #[doc = "Register `TRBPTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TDIPTR` reader - Transmitter Data Input Pointer"] -pub type TdiptrR = crate::FieldReader; +pub type TDIPTR_R = crate::FieldReader; #[doc = "Field `TDOPTR` reader - Transmitter Data Output Pointer"] -pub type TdoptrR = crate::FieldReader; +pub type TDOPTR_R = crate::FieldReader; #[doc = "Field `RDIPTR` reader - Receiver Data Input Pointer"] -pub type RdiptrR = crate::FieldReader; +pub type RDIPTR_R = crate::FieldReader; #[doc = "Field `RDOPTR` reader - Receiver Data Output Pointer"] -pub type RdoptrR = crate::FieldReader; +pub type RDOPTR_R = crate::FieldReader; impl R { #[doc = "Bits 0:5 - Transmitter Data Input Pointer"] #[inline(always)] - pub fn tdiptr(&self) -> TdiptrR { - TdiptrR::new((self.bits & 0x3f) as u8) + pub fn tdiptr(&self) -> TDIPTR_R { + TDIPTR_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - Transmitter Data Output Pointer"] #[inline(always)] - pub fn tdoptr(&self) -> TdoptrR { - TdoptrR::new(((self.bits >> 8) & 0x3f) as u8) + pub fn tdoptr(&self) -> TDOPTR_R { + TDOPTR_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:21 - Receiver Data Input Pointer"] #[inline(always)] - pub fn rdiptr(&self) -> RdiptrR { - RdiptrR::new(((self.bits >> 16) & 0x3f) as u8) + pub fn rdiptr(&self) -> RDIPTR_R { + RDIPTR_R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:29 - Receiver Data Output Pointer"] #[inline(always)] - pub fn rdoptr(&self) -> RdoptrR { - RdoptrR::new(((self.bits >> 24) & 0x3f) as u8) + pub fn rdoptr(&self) -> RDOPTR_R { + RDOPTR_R::new(((self.bits >> 24) & 0x3f) as u8) } } #[doc = "Transmit/Receive Buffer Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbptr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrbptrSpec; -impl crate::RegisterSpec for TrbptrSpec { +pub struct TRBPTR_SPEC; +impl crate::RegisterSpec for TRBPTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`trbptr::R`](R) reader structure"] -impl crate::Readable for TrbptrSpec {} +impl crate::Readable for TRBPTR_SPEC {} #[doc = "`reset()` method sets TRBPTR to value 0"] -impl crate::Resettable for TrbptrSpec { +impl crate::Resettable for TRBPTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbscr.rs b/src/usic0_ch0/trbscr.rs index 403802fc..965b0831 100644 --- a/src/usic0_ch0/trbscr.rs +++ b/src/usic0_ch0/trbscr.rs @@ -1,315 +1,315 @@ #[doc = "Register `TRBSCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Standard Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Csrbi { +pub enum CSRBI_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear TRBSR.SRBI."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Csrbi) -> Self { + fn from(variant: CSRBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSRBI` writer - Clear Standard Receive Buffer Event"] -pub type CsrbiW<'a, REG> = crate::BitWriter<'a, REG, Csrbi>; -impl<'a, REG> CsrbiW<'a, REG> +pub type CSRBI_W<'a, REG> = crate::BitWriter<'a, REG, CSRBI_A>; +impl<'a, REG> CSRBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Csrbi::Value1) + self.variant(CSRBI_A::VALUE1) } #[doc = "Clear TRBSR.SRBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Csrbi::Value2) + self.variant(CSRBI_A::VALUE2) } } #[doc = "Clear Receive Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Crberi { +pub enum CRBERI_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear TRBSR.RBERI."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Crberi) -> Self { + fn from(variant: CRBERI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CRBERI` writer - Clear Receive Buffer Error Event"] -pub type CrberiW<'a, REG> = crate::BitWriter<'a, REG, Crberi>; -impl<'a, REG> CrberiW<'a, REG> +pub type CRBERI_W<'a, REG> = crate::BitWriter<'a, REG, CRBERI_A>; +impl<'a, REG> CRBERI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Crberi::Value1) + self.variant(CRBERI_A::VALUE1) } #[doc = "Clear TRBSR.RBERI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Crberi::Value2) + self.variant(CRBERI_A::VALUE2) } } #[doc = "Clear Alternative Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Carbi { +pub enum CARBI_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear TRBSR.ARBI."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Carbi) -> Self { + fn from(variant: CARBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CARBI` writer - Clear Alternative Receive Buffer Event"] -pub type CarbiW<'a, REG> = crate::BitWriter<'a, REG, Carbi>; -impl<'a, REG> CarbiW<'a, REG> +pub type CARBI_W<'a, REG> = crate::BitWriter<'a, REG, CARBI_A>; +impl<'a, REG> CARBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Carbi::Value1) + self.variant(CARBI_A::VALUE1) } #[doc = "Clear TRBSR.ARBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Carbi::Value2) + self.variant(CARBI_A::VALUE2) } } #[doc = "Clear Standard Transmit Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cstbi { +pub enum CSTBI_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear TRBSR.STBI."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cstbi) -> Self { + fn from(variant: CSTBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSTBI` writer - Clear Standard Transmit Buffer Event"] -pub type CstbiW<'a, REG> = crate::BitWriter<'a, REG, Cstbi>; -impl<'a, REG> CstbiW<'a, REG> +pub type CSTBI_W<'a, REG> = crate::BitWriter<'a, REG, CSTBI_A>; +impl<'a, REG> CSTBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cstbi::Value1) + self.variant(CSTBI_A::VALUE1) } #[doc = "Clear TRBSR.STBI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cstbi::Value2) + self.variant(CSTBI_A::VALUE2) } } #[doc = "Clear Transmit Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ctberi { +pub enum CTBERI_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear TRBSR.TBERI."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ctberi) -> Self { + fn from(variant: CTBERI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CTBERI` writer - Clear Transmit Buffer Error Event"] -pub type CtberiW<'a, REG> = crate::BitWriter<'a, REG, Ctberi>; -impl<'a, REG> CtberiW<'a, REG> +pub type CTBERI_W<'a, REG> = crate::BitWriter<'a, REG, CTBERI_A>; +impl<'a, REG> CTBERI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ctberi::Value1) + self.variant(CTBERI_A::VALUE1) } #[doc = "Clear TRBSR.TBERI."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ctberi::Value2) + self.variant(CTBERI_A::VALUE2) } } #[doc = "Clear Bypass Data Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cbdv { +pub enum CBDV_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear BYPCR.BDV."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cbdv) -> Self { + fn from(variant: CBDV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CBDV` writer - Clear Bypass Data Valid"] -pub type CbdvW<'a, REG> = crate::BitWriter<'a, REG, Cbdv>; -impl<'a, REG> CbdvW<'a, REG> +pub type CBDV_W<'a, REG> = crate::BitWriter<'a, REG, CBDV_A>; +impl<'a, REG> CBDV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cbdv::Value1) + self.variant(CBDV_A::VALUE1) } #[doc = "Clear BYPCR.BDV."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cbdv::Value2) + self.variant(CBDV_A::VALUE2) } } #[doc = "Flush Receive Buffer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flushrb { +pub enum FLUSHRB_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flushrb) -> Self { + fn from(variant: FLUSHRB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSHRB` writer - Flush Receive Buffer"] -pub type FlushrbW<'a, REG> = crate::BitWriter<'a, REG, Flushrb>; -impl<'a, REG> FlushrbW<'a, REG> +pub type FLUSHRB_W<'a, REG> = crate::BitWriter<'a, REG, FLUSHRB_A>; +impl<'a, REG> FLUSHRB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flushrb::Value1) + self.variant(FLUSHRB_A::VALUE1) } #[doc = "The receive FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flushrb::Value2) + self.variant(FLUSHRB_A::VALUE2) } } #[doc = "Flush Transmit Buffer\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flushtb { +pub enum FLUSHTB_A { #[doc = "0: No effect."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flushtb) -> Self { + fn from(variant: FLUSHTB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSHTB` writer - Flush Transmit Buffer"] -pub type FlushtbW<'a, REG> = crate::BitWriter<'a, REG, Flushtb>; -impl<'a, REG> FlushtbW<'a, REG> +pub type FLUSHTB_W<'a, REG> = crate::BitWriter<'a, REG, FLUSHTB_A>; +impl<'a, REG> FLUSHTB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No effect."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flushtb::Value1) + self.variant(FLUSHTB_A::VALUE1) } #[doc = "The transmit FIFO buffer is cleared (filling level is cleared and output pointer is set to input pointer value). Should only be used while the FIFO buffer is not taking part in data traffic."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flushtb::Value2) + self.variant(FLUSHTB_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Standard Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn csrbi(&mut self) -> CsrbiW { - CsrbiW::new(self, 0) + pub fn csrbi(&mut self) -> CSRBI_W { + CSRBI_W::new(self, 0) } #[doc = "Bit 1 - Clear Receive Buffer Error Event"] #[inline(always)] #[must_use] - pub fn crberi(&mut self) -> CrberiW { - CrberiW::new(self, 1) + pub fn crberi(&mut self) -> CRBERI_W { + CRBERI_W::new(self, 1) } #[doc = "Bit 2 - Clear Alternative Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn carbi(&mut self) -> CarbiW { - CarbiW::new(self, 2) + pub fn carbi(&mut self) -> CARBI_W { + CARBI_W::new(self, 2) } #[doc = "Bit 8 - Clear Standard Transmit Buffer Event"] #[inline(always)] #[must_use] - pub fn cstbi(&mut self) -> CstbiW { - CstbiW::new(self, 8) + pub fn cstbi(&mut self) -> CSTBI_W { + CSTBI_W::new(self, 8) } #[doc = "Bit 9 - Clear Transmit Buffer Error Event"] #[inline(always)] #[must_use] - pub fn ctberi(&mut self) -> CtberiW { - CtberiW::new(self, 9) + pub fn ctberi(&mut self) -> CTBERI_W { + CTBERI_W::new(self, 9) } #[doc = "Bit 10 - Clear Bypass Data Valid"] #[inline(always)] #[must_use] - pub fn cbdv(&mut self) -> CbdvW { - CbdvW::new(self, 10) + pub fn cbdv(&mut self) -> CBDV_W { + CBDV_W::new(self, 10) } #[doc = "Bit 14 - Flush Receive Buffer"] #[inline(always)] #[must_use] - pub fn flushrb(&mut self) -> FlushrbW { - FlushrbW::new(self, 14) + pub fn flushrb(&mut self) -> FLUSHRB_W { + FLUSHRB_W::new(self, 14) } #[doc = "Bit 15 - Flush Transmit Buffer"] #[inline(always)] #[must_use] - pub fn flushtb(&mut self) -> FlushtbW { - FlushtbW::new(self, 15) + pub fn flushtb(&mut self) -> FLUSHTB_W { + FLUSHTB_W::new(self, 15) } } #[doc = "Transmit/Receive Buffer Status Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbscr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrbscrSpec; -impl crate::RegisterSpec for TrbscrSpec { +pub struct TRBSCR_SPEC; +impl crate::RegisterSpec for TRBSCR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`trbscr::W`](W) writer structure"] -impl crate::Writable for TrbscrSpec { +impl crate::Writable for TRBSCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRBSCR to value 0"] -impl crate::Resettable for TrbscrSpec { +impl crate::Resettable for TRBSCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/usic0_ch0/trbsr.rs b/src/usic0_ch0/trbsr.rs index c01da375..250996ee 100644 --- a/src/usic0_ch0/trbsr.rs +++ b/src/usic0_ch0/trbsr.rs @@ -1,687 +1,687 @@ #[doc = "Register `TRBSR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `TRBSR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Standard Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srbi { +pub enum SRBI_A { #[doc = "0: A standard receive buffer event has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard receive buffer event has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srbi) -> Self { + fn from(variant: SRBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRBI` reader - Standard Receive Buffer Event"] -pub type SrbiR = crate::BitReader; -impl SrbiR { +pub type SRBI_R = crate::BitReader; +impl SRBI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srbi { + pub const fn variant(&self) -> SRBI_A { match self.bits { - false => Srbi::Value1, - true => Srbi::Value2, + false => SRBI_A::VALUE1, + true => SRBI_A::VALUE2, } } #[doc = "A standard receive buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbi::Value1 + *self == SRBI_A::VALUE1 } #[doc = "A standard receive buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbi::Value2 + *self == SRBI_A::VALUE2 } } #[doc = "Field `SRBI` writer - Standard Receive Buffer Event"] -pub type SrbiW<'a, REG> = crate::BitWriter<'a, REG, Srbi>; -impl<'a, REG> SrbiW<'a, REG> +pub type SRBI_W<'a, REG> = crate::BitWriter<'a, REG, SRBI_A>; +impl<'a, REG> SRBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard receive buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srbi::Value1) + self.variant(SRBI_A::VALUE1) } #[doc = "A standard receive buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srbi::Value2) + self.variant(SRBI_A::VALUE2) } } #[doc = "Receive Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rberi { +pub enum RBERI_A { #[doc = "0: A receive buffer error event has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A receive buffer error event has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rberi) -> Self { + fn from(variant: RBERI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RBERI` reader - Receive Buffer Error Event"] -pub type RberiR = crate::BitReader; -impl RberiR { +pub type RBERI_R = crate::BitReader; +impl RBERI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rberi { + pub const fn variant(&self) -> RBERI_A { match self.bits { - false => Rberi::Value1, - true => Rberi::Value2, + false => RBERI_A::VALUE1, + true => RBERI_A::VALUE2, } } #[doc = "A receive buffer error event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rberi::Value1 + *self == RBERI_A::VALUE1 } #[doc = "A receive buffer error event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rberi::Value2 + *self == RBERI_A::VALUE2 } } #[doc = "Field `RBERI` writer - Receive Buffer Error Event"] -pub type RberiW<'a, REG> = crate::BitWriter<'a, REG, Rberi>; -impl<'a, REG> RberiW<'a, REG> +pub type RBERI_W<'a, REG> = crate::BitWriter<'a, REG, RBERI_A>; +impl<'a, REG> RBERI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A receive buffer error event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rberi::Value1) + self.variant(RBERI_A::VALUE1) } #[doc = "A receive buffer error event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rberi::Value2) + self.variant(RBERI_A::VALUE2) } } #[doc = "Alternative Receive Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Arbi { +pub enum ARBI_A { #[doc = "0: An alternative receive buffer event has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: An alternative receive buffer event has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Arbi) -> Self { + fn from(variant: ARBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ARBI` reader - Alternative Receive Buffer Event"] -pub type ArbiR = crate::BitReader; -impl ArbiR { +pub type ARBI_R = crate::BitReader; +impl ARBI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arbi { + pub const fn variant(&self) -> ARBI_A { match self.bits { - false => Arbi::Value1, - true => Arbi::Value2, + false => ARBI_A::VALUE1, + true => ARBI_A::VALUE2, } } #[doc = "An alternative receive buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arbi::Value1 + *self == ARBI_A::VALUE1 } #[doc = "An alternative receive buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arbi::Value2 + *self == ARBI_A::VALUE2 } } #[doc = "Field `ARBI` writer - Alternative Receive Buffer Event"] -pub type ArbiW<'a, REG> = crate::BitWriter<'a, REG, Arbi>; -impl<'a, REG> ArbiW<'a, REG> +pub type ARBI_W<'a, REG> = crate::BitWriter<'a, REG, ARBI_A>; +impl<'a, REG> ARBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "An alternative receive buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arbi::Value1) + self.variant(ARBI_A::VALUE1) } #[doc = "An alternative receive buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arbi::Value2) + self.variant(ARBI_A::VALUE2) } } #[doc = "Receive Buffer Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rempty { +pub enum REMPTY_A { #[doc = "0: The receive buffer is not empty."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive buffer is empty."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rempty) -> Self { + fn from(variant: REMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REMPTY` reader - Receive Buffer Empty"] -pub type RemptyR = crate::BitReader; -impl RemptyR { +pub type REMPTY_R = crate::BitReader; +impl REMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rempty { + pub const fn variant(&self) -> REMPTY_A { match self.bits { - false => Rempty::Value1, - true => Rempty::Value2, + false => REMPTY_A::VALUE1, + true => REMPTY_A::VALUE2, } } #[doc = "The receive buffer is not empty."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rempty::Value1 + *self == REMPTY_A::VALUE1 } #[doc = "The receive buffer is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rempty::Value2 + *self == REMPTY_A::VALUE2 } } #[doc = "Receive Buffer Full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rfull { +pub enum RFULL_A { #[doc = "0: The receive buffer is not full."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The receive buffer is full."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rfull) -> Self { + fn from(variant: RFULL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RFULL` reader - Receive Buffer Full"] -pub type RfullR = crate::BitReader; -impl RfullR { +pub type RFULL_R = crate::BitReader; +impl RFULL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rfull { + pub const fn variant(&self) -> RFULL_A { match self.bits { - false => Rfull::Value1, - true => Rfull::Value2, + false => RFULL_A::VALUE1, + true => RFULL_A::VALUE2, } } #[doc = "The receive buffer is not full."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rfull::Value1 + *self == RFULL_A::VALUE1 } #[doc = "The receive buffer is full."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rfull::Value2 + *self == RFULL_A::VALUE2 } } #[doc = "Receive Buffer Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rbus { +pub enum RBUS_A { #[doc = "0: The receive buffer information has been completely updated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rbus) -> Self { + fn from(variant: RBUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RBUS` reader - Receive Buffer Busy"] -pub type RbusR = crate::BitReader; -impl RbusR { +pub type RBUS_R = crate::BitReader; +impl RBUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rbus { + pub const fn variant(&self) -> RBUS_A { match self.bits { - false => Rbus::Value1, - true => Rbus::Value2, + false => RBUS_A::VALUE1, + true => RBUS_A::VALUE2, } } #[doc = "The receive buffer information has been completely updated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rbus::Value1 + *self == RBUS_A::VALUE1 } #[doc = "The OUTR update from the FIFO memory is ongoing. A read from OUTR will be delayed. FIFO pointers from the previous read are not yet updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rbus::Value2 + *self == RBUS_A::VALUE2 } } #[doc = "Standard Receive Buffer Event Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srbt { +pub enum SRBT_A { #[doc = "0: A standard receive buffer event is not triggered using this bit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard receive buffer event is triggered using this bit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srbt) -> Self { + fn from(variant: SRBT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRBT` reader - Standard Receive Buffer Event Trigger"] -pub type SrbtR = crate::BitReader; -impl SrbtR { +pub type SRBT_R = crate::BitReader; +impl SRBT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srbt { + pub const fn variant(&self) -> SRBT_A { match self.bits { - false => Srbt::Value1, - true => Srbt::Value2, + false => SRBT_A::VALUE1, + true => SRBT_A::VALUE2, } } #[doc = "A standard receive buffer event is not triggered using this bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srbt::Value1 + *self == SRBT_A::VALUE1 } #[doc = "A standard receive buffer event is triggered using this bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srbt::Value2 + *self == SRBT_A::VALUE2 } } #[doc = "Standard Transmit Buffer Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stbi { +pub enum STBI_A { #[doc = "0: A standard transmit buffer event has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard transmit buffer event has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stbi) -> Self { + fn from(variant: STBI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STBI` reader - Standard Transmit Buffer Event"] -pub type StbiR = crate::BitReader; -impl StbiR { +pub type STBI_R = crate::BitReader; +impl STBI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stbi { + pub const fn variant(&self) -> STBI_A { match self.bits { - false => Stbi::Value1, - true => Stbi::Value2, + false => STBI_A::VALUE1, + true => STBI_A::VALUE2, } } #[doc = "A standard transmit buffer event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbi::Value1 + *self == STBI_A::VALUE1 } #[doc = "A standard transmit buffer event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbi::Value2 + *self == STBI_A::VALUE2 } } #[doc = "Field `STBI` writer - Standard Transmit Buffer Event"] -pub type StbiW<'a, REG> = crate::BitWriter<'a, REG, Stbi>; -impl<'a, REG> StbiW<'a, REG> +pub type STBI_W<'a, REG> = crate::BitWriter<'a, REG, STBI_A>; +impl<'a, REG> STBI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A standard transmit buffer event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stbi::Value1) + self.variant(STBI_A::VALUE1) } #[doc = "A standard transmit buffer event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stbi::Value2) + self.variant(STBI_A::VALUE2) } } #[doc = "Transmit Buffer Error Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tberi { +pub enum TBERI_A { #[doc = "0: A transmit buffer error event has not been detected."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A transmit buffer error event has been detected."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tberi) -> Self { + fn from(variant: TBERI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBERI` reader - Transmit Buffer Error Event"] -pub type TberiR = crate::BitReader; -impl TberiR { +pub type TBERI_R = crate::BitReader; +impl TBERI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tberi { + pub const fn variant(&self) -> TBERI_A { match self.bits { - false => Tberi::Value1, - true => Tberi::Value2, + false => TBERI_A::VALUE1, + true => TBERI_A::VALUE2, } } #[doc = "A transmit buffer error event has not been detected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tberi::Value1 + *self == TBERI_A::VALUE1 } #[doc = "A transmit buffer error event has been detected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tberi::Value2 + *self == TBERI_A::VALUE2 } } #[doc = "Field `TBERI` writer - Transmit Buffer Error Event"] -pub type TberiW<'a, REG> = crate::BitWriter<'a, REG, Tberi>; -impl<'a, REG> TberiW<'a, REG> +pub type TBERI_W<'a, REG> = crate::BitWriter<'a, REG, TBERI_A>; +impl<'a, REG> TBERI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A transmit buffer error event has not been detected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tberi::Value1) + self.variant(TBERI_A::VALUE1) } #[doc = "A transmit buffer error event has been detected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tberi::Value2) + self.variant(TBERI_A::VALUE2) } } #[doc = "Transmit Buffer Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tempty { +pub enum TEMPTY_A { #[doc = "0: The transmit buffer is not empty."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit buffer is empty."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tempty) -> Self { + fn from(variant: TEMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TEMPTY` reader - Transmit Buffer Empty"] -pub type TemptyR = crate::BitReader; -impl TemptyR { +pub type TEMPTY_R = crate::BitReader; +impl TEMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tempty { + pub const fn variant(&self) -> TEMPTY_A { match self.bits { - false => Tempty::Value1, - true => Tempty::Value2, + false => TEMPTY_A::VALUE1, + true => TEMPTY_A::VALUE2, } } #[doc = "The transmit buffer is not empty."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tempty::Value1 + *self == TEMPTY_A::VALUE1 } #[doc = "The transmit buffer is empty."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tempty::Value2 + *self == TEMPTY_A::VALUE2 } } #[doc = "Transmit Buffer Full\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tfull { +pub enum TFULL_A { #[doc = "0: The transmit buffer is not full."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The transmit buffer is full."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tfull) -> Self { + fn from(variant: TFULL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TFULL` reader - Transmit Buffer Full"] -pub type TfullR = crate::BitReader; -impl TfullR { +pub type TFULL_R = crate::BitReader; +impl TFULL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tfull { + pub const fn variant(&self) -> TFULL_A { match self.bits { - false => Tfull::Value1, - true => Tfull::Value2, + false => TFULL_A::VALUE1, + true => TFULL_A::VALUE2, } } #[doc = "The transmit buffer is not full."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tfull::Value1 + *self == TFULL_A::VALUE1 } #[doc = "The transmit buffer is full."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tfull::Value2 + *self == TFULL_A::VALUE2 } } #[doc = "Transmit Buffer Busy\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tbus { +pub enum TBUS_A { #[doc = "0: The transmit buffer information has been completely updated."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tbus) -> Self { + fn from(variant: TBUS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TBUS` reader - Transmit Buffer Busy"] -pub type TbusR = crate::BitReader; -impl TbusR { +pub type TBUS_R = crate::BitReader; +impl TBUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tbus { + pub const fn variant(&self) -> TBUS_A { match self.bits { - false => Tbus::Value1, - true => Tbus::Value2, + false => TBUS_A::VALUE1, + true => TBUS_A::VALUE2, } } #[doc = "The transmit buffer information has been completely updated."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tbus::Value1 + *self == TBUS_A::VALUE1 } #[doc = "The FIFO memory update after write to INx is ongoing. A write to INx will be delayed. FIFO pointers from the previous INx write are not yet updated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tbus::Value2 + *self == TBUS_A::VALUE2 } } #[doc = "Standard Transmit Buffer Event Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Stbt { +pub enum STBT_A { #[doc = "0: A standard transmit buffer event is not triggered using this bit."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A standard transmit buffer event is triggered using this bit."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Stbt) -> Self { + fn from(variant: STBT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `STBT` reader - Standard Transmit Buffer Event Trigger"] -pub type StbtR = crate::BitReader; -impl StbtR { +pub type STBT_R = crate::BitReader; +impl STBT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stbt { + pub const fn variant(&self) -> STBT_A { match self.bits { - false => Stbt::Value1, - true => Stbt::Value2, + false => STBT_A::VALUE1, + true => STBT_A::VALUE2, } } #[doc = "A standard transmit buffer event is not triggered using this bit."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stbt::Value1 + *self == STBT_A::VALUE1 } #[doc = "A standard transmit buffer event is triggered using this bit."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stbt::Value2 + *self == STBT_A::VALUE2 } } #[doc = "Field `RBFLVL` reader - Receive Buffer Filling Level"] -pub type RbflvlR = crate::FieldReader; +pub type RBFLVL_R = crate::FieldReader; #[doc = "Field `TBFLVL` reader - Transmit Buffer Filling Level"] -pub type TbflvlR = crate::FieldReader; +pub type TBFLVL_R = crate::FieldReader; impl R { #[doc = "Bit 0 - Standard Receive Buffer Event"] #[inline(always)] - pub fn srbi(&self) -> SrbiR { - SrbiR::new((self.bits & 1) != 0) + pub fn srbi(&self) -> SRBI_R { + SRBI_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Receive Buffer Error Event"] #[inline(always)] - pub fn rberi(&self) -> RberiR { - RberiR::new(((self.bits >> 1) & 1) != 0) + pub fn rberi(&self) -> RBERI_R { + RBERI_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Alternative Receive Buffer Event"] #[inline(always)] - pub fn arbi(&self) -> ArbiR { - ArbiR::new(((self.bits >> 2) & 1) != 0) + pub fn arbi(&self) -> ARBI_R { + ARBI_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Receive Buffer Empty"] #[inline(always)] - pub fn rempty(&self) -> RemptyR { - RemptyR::new(((self.bits >> 3) & 1) != 0) + pub fn rempty(&self) -> REMPTY_R { + REMPTY_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Receive Buffer Full"] #[inline(always)] - pub fn rfull(&self) -> RfullR { - RfullR::new(((self.bits >> 4) & 1) != 0) + pub fn rfull(&self) -> RFULL_R { + RFULL_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Receive Buffer Busy"] #[inline(always)] - pub fn rbus(&self) -> RbusR { - RbusR::new(((self.bits >> 5) & 1) != 0) + pub fn rbus(&self) -> RBUS_R { + RBUS_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Standard Receive Buffer Event Trigger"] #[inline(always)] - pub fn srbt(&self) -> SrbtR { - SrbtR::new(((self.bits >> 6) & 1) != 0) + pub fn srbt(&self) -> SRBT_R { + SRBT_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 8 - Standard Transmit Buffer Event"] #[inline(always)] - pub fn stbi(&self) -> StbiR { - StbiR::new(((self.bits >> 8) & 1) != 0) + pub fn stbi(&self) -> STBI_R { + STBI_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Transmit Buffer Error Event"] #[inline(always)] - pub fn tberi(&self) -> TberiR { - TberiR::new(((self.bits >> 9) & 1) != 0) + pub fn tberi(&self) -> TBERI_R { + TBERI_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 11 - Transmit Buffer Empty"] #[inline(always)] - pub fn tempty(&self) -> TemptyR { - TemptyR::new(((self.bits >> 11) & 1) != 0) + pub fn tempty(&self) -> TEMPTY_R { + TEMPTY_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Transmit Buffer Full"] #[inline(always)] - pub fn tfull(&self) -> TfullR { - TfullR::new(((self.bits >> 12) & 1) != 0) + pub fn tfull(&self) -> TFULL_R { + TFULL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Transmit Buffer Busy"] #[inline(always)] - pub fn tbus(&self) -> TbusR { - TbusR::new(((self.bits >> 13) & 1) != 0) + pub fn tbus(&self) -> TBUS_R { + TBUS_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Standard Transmit Buffer Event Trigger"] #[inline(always)] - pub fn stbt(&self) -> StbtR { - StbtR::new(((self.bits >> 14) & 1) != 0) + pub fn stbt(&self) -> STBT_R { + STBT_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bits 16:22 - Receive Buffer Filling Level"] #[inline(always)] - pub fn rbflvl(&self) -> RbflvlR { - RbflvlR::new(((self.bits >> 16) & 0x7f) as u8) + pub fn rbflvl(&self) -> RBFLVL_R { + RBFLVL_R::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 24:30 - Transmit Buffer Filling Level"] #[inline(always)] - pub fn tbflvl(&self) -> TbflvlR { - TbflvlR::new(((self.bits >> 24) & 0x7f) as u8) + pub fn tbflvl(&self) -> TBFLVL_R { + TBFLVL_R::new(((self.bits >> 24) & 0x7f) as u8) } } impl W { #[doc = "Bit 0 - Standard Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn srbi(&mut self) -> SrbiW { - SrbiW::new(self, 0) + pub fn srbi(&mut self) -> SRBI_W { + SRBI_W::new(self, 0) } #[doc = "Bit 1 - Receive Buffer Error Event"] #[inline(always)] #[must_use] - pub fn rberi(&mut self) -> RberiW { - RberiW::new(self, 1) + pub fn rberi(&mut self) -> RBERI_W { + RBERI_W::new(self, 1) } #[doc = "Bit 2 - Alternative Receive Buffer Event"] #[inline(always)] #[must_use] - pub fn arbi(&mut self) -> ArbiW { - ArbiW::new(self, 2) + pub fn arbi(&mut self) -> ARBI_W { + ARBI_W::new(self, 2) } #[doc = "Bit 8 - Standard Transmit Buffer Event"] #[inline(always)] #[must_use] - pub fn stbi(&mut self) -> StbiW { - StbiW::new(self, 8) + pub fn stbi(&mut self) -> STBI_W { + STBI_W::new(self, 8) } #[doc = "Bit 9 - Transmit Buffer Error Event"] #[inline(always)] #[must_use] - pub fn tberi(&mut self) -> TberiW { - TberiW::new(self, 9) + pub fn tberi(&mut self) -> TBERI_W { + TBERI_W::new(self, 9) } } #[doc = "Transmit/Receive Buffer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`trbsr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`trbsr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TrbsrSpec; -impl crate::RegisterSpec for TrbsrSpec { +pub struct TRBSR_SPEC; +impl crate::RegisterSpec for TRBSR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`trbsr::R`](R) reader structure"] -impl crate::Readable for TrbsrSpec {} +impl crate::Readable for TRBSR_SPEC {} #[doc = "`write(|w| ..)` method takes [`trbsr::W`](W) writer structure"] -impl crate::Writable for TrbsrSpec { +impl crate::Writable for TRBSR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets TRBSR to value 0x0808"] -impl crate::Resettable for TrbsrSpec { +impl crate::Resettable for TRBSR_SPEC { const RESET_VALUE: u32 = 0x0808; } diff --git a/src/vadc.rs b/src/vadc.rs index 044b1004..84c207a6 100644 --- a/src/vadc.rs +++ b/src/vadc.rs @@ -1,243 +1,226 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - clc: Clc, + clc: CLC, _reserved1: [u8; 0x04], - id: Id, + id: ID, _reserved2: [u8; 0x1c], - ocs: Ocs, + ocs: OCS, _reserved3: [u8; 0x54], - globcfg: Globcfg, + globcfg: GLOBCFG, _reserved4: [u8; 0x1c], - globiclass: [Globiclass; 2], + globiclass: [GLOBICLASS; 2], _reserved5: [u8; 0x10], - globbound: Globbound, + globbound: GLOBBOUND, _reserved6: [u8; 0x24], - globeflag: Globeflag, + globeflag: GLOBEFLAG, _reserved7: [u8; 0x5c], - globevnp: Globevnp, + globevnp: GLOBEVNP, _reserved8: [u8; 0x1c], - globtf: Globtf, + globtf: GLOBTF, _reserved9: [u8; 0x1c], - brssel: [Brssel; 4], + brssel: [BRSSEL; 4], _reserved10: [u8; 0x30], - brspnd: [Brspnd; 4], + brspnd: [BRSPND; 4], _reserved11: [u8; 0x30], - brsctrl: Brsctrl, - brsmr: Brsmr, + brsctrl: BRSCTRL, + brsmr: BRSMR, _reserved13: [u8; 0x78], - globrcr: Globrcr, + globrcr: GLOBRCR, _reserved14: [u8; 0x7c], - globres: Globres, + globres: GLOBRES, _reserved15: [u8; 0x7c], - globresd: Globresd, + globresd: GLOBRESD, _reserved16: [u8; 0x6c], - emuxsel: Emuxsel, + emuxsel: EMUXSEL, } impl RegisterBlock { #[doc = "0x00 - Clock Control Register"] #[inline(always)] - pub const fn clc(&self) -> &Clc { + pub const fn clc(&self) -> &CLC { &self.clc } #[doc = "0x08 - Module Identification Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x28 - OCDS Control and Status Register"] #[inline(always)] - pub const fn ocs(&self) -> &Ocs { + pub const fn ocs(&self) -> &OCS { &self.ocs } #[doc = "0x80 - Global Configuration Register"] #[inline(always)] - pub const fn globcfg(&self) -> &Globcfg { + pub const fn globcfg(&self) -> &GLOBCFG { &self.globcfg } #[doc = "0xa0..0xa8 - Input Class Register, Global"] #[inline(always)] - pub const fn globiclass(&self, n: usize) -> &Globiclass { + pub const fn globiclass(&self, n: usize) -> &GLOBICLASS { &self.globiclass[n] } #[doc = "Iterator for array of:"] #[doc = "0xa0..0xa8 - Input Class Register, Global"] #[inline(always)] - pub fn globiclass_iter(&self) -> impl Iterator { + pub fn globiclass_iter(&self) -> impl Iterator { self.globiclass.iter() } #[doc = "0xb8 - Global Boundary Select Register"] #[inline(always)] - pub const fn globbound(&self) -> &Globbound { + pub const fn globbound(&self) -> &GLOBBOUND { &self.globbound } #[doc = "0xe0 - Global Event Flag Register"] #[inline(always)] - pub const fn globeflag(&self) -> &Globeflag { + pub const fn globeflag(&self) -> &GLOBEFLAG { &self.globeflag } #[doc = "0x140 - Global Event Node Pointer Register"] #[inline(always)] - pub const fn globevnp(&self) -> &Globevnp { + pub const fn globevnp(&self) -> &GLOBEVNP { &self.globevnp } #[doc = "0x160 - Global Test Functions Register"] #[inline(always)] - pub const fn globtf(&self) -> &Globtf { + pub const fn globtf(&self) -> &GLOBTF { &self.globtf } #[doc = "0x180..0x190 - Background Request Source Channel Select Register"] #[inline(always)] - pub const fn brssel(&self, n: usize) -> &Brssel { + pub const fn brssel(&self, n: usize) -> &BRSSEL { &self.brssel[n] } #[doc = "Iterator for array of:"] #[doc = "0x180..0x190 - Background Request Source Channel Select Register"] #[inline(always)] - pub fn brssel_iter(&self) -> impl Iterator { + pub fn brssel_iter(&self) -> impl Iterator { self.brssel.iter() } #[doc = "0x1c0..0x1d0 - Background Request Source Pending Register"] #[inline(always)] - pub const fn brspnd(&self, n: usize) -> &Brspnd { + pub const fn brspnd(&self, n: usize) -> &BRSPND { &self.brspnd[n] } #[doc = "Iterator for array of:"] #[doc = "0x1c0..0x1d0 - Background Request Source Pending Register"] #[inline(always)] - pub fn brspnd_iter(&self) -> impl Iterator { + pub fn brspnd_iter(&self) -> impl Iterator { self.brspnd.iter() } #[doc = "0x200 - Background Request Source Control Register"] #[inline(always)] - pub const fn brsctrl(&self) -> &Brsctrl { + pub const fn brsctrl(&self) -> &BRSCTRL { &self.brsctrl } #[doc = "0x204 - Background Request Source Mode Register"] #[inline(always)] - pub const fn brsmr(&self) -> &Brsmr { + pub const fn brsmr(&self) -> &BRSMR { &self.brsmr } #[doc = "0x280 - Global Result Control Register"] #[inline(always)] - pub const fn globrcr(&self) -> &Globrcr { + pub const fn globrcr(&self) -> &GLOBRCR { &self.globrcr } #[doc = "0x300 - Global Result Register"] #[inline(always)] - pub const fn globres(&self) -> &Globres { + pub const fn globres(&self) -> &GLOBRES { &self.globres } #[doc = "0x380 - Global Result Register, Debug"] #[inline(always)] - pub const fn globresd(&self) -> &Globresd { + pub const fn globresd(&self) -> &GLOBRESD { &self.globresd } #[doc = "0x3f0 - External Multiplexer Select Register"] #[inline(always)] - pub const fn emuxsel(&self) -> &Emuxsel { + pub const fn emuxsel(&self) -> &EMUXSEL { &self.emuxsel } } #[doc = "CLC (rw) register accessor: Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`] module"] -#[doc(alias = "CLC")] -pub type Clc = crate::Reg; +pub type CLC = crate::Reg; #[doc = "Clock Control Register"] pub mod clc; #[doc = "ID (r) register accessor: Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "Module Identification Register"] pub mod id; #[doc = "OCS (rw) register accessor: OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ocs`] module"] -#[doc(alias = "OCS")] -pub type Ocs = crate::Reg; +pub type OCS = crate::Reg; #[doc = "OCDS Control and Status Register"] pub mod ocs; #[doc = "GLOBCFG (rw) register accessor: Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globcfg`] module"] -#[doc(alias = "GLOBCFG")] -pub type Globcfg = crate::Reg; +pub type GLOBCFG = crate::Reg; #[doc = "Global Configuration Register"] pub mod globcfg; #[doc = "GLOBICLASS (rw) register accessor: Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globiclass`] module"] -#[doc(alias = "GLOBICLASS")] -pub type Globiclass = crate::Reg; +pub type GLOBICLASS = crate::Reg; #[doc = "Input Class Register, Global"] pub mod globiclass; #[doc = "GLOBBOUND (rw) register accessor: Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globbound`] module"] -#[doc(alias = "GLOBBOUND")] -pub type Globbound = crate::Reg; +pub type GLOBBOUND = crate::Reg; #[doc = "Global Boundary Select Register"] pub mod globbound; #[doc = "GLOBEFLAG (rw) register accessor: Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globeflag`] module"] -#[doc(alias = "GLOBEFLAG")] -pub type Globeflag = crate::Reg; +pub type GLOBEFLAG = crate::Reg; #[doc = "Global Event Flag Register"] pub mod globeflag; #[doc = "GLOBEVNP (rw) register accessor: Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globevnp`] module"] -#[doc(alias = "GLOBEVNP")] -pub type Globevnp = crate::Reg; +pub type GLOBEVNP = crate::Reg; #[doc = "Global Event Node Pointer Register"] pub mod globevnp; #[doc = "GLOBTF (rw) register accessor: Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globtf`] module"] -#[doc(alias = "GLOBTF")] -pub type Globtf = crate::Reg; +pub type GLOBTF = crate::Reg; #[doc = "Global Test Functions Register"] pub mod globtf; #[doc = "BRSSEL (rw) register accessor: Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brssel`] module"] -#[doc(alias = "BRSSEL")] -pub type Brssel = crate::Reg; +pub type BRSSEL = crate::Reg; #[doc = "Background Request Source Channel Select Register"] pub mod brssel; #[doc = "BRSPND (rw) register accessor: Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brspnd`] module"] -#[doc(alias = "BRSPND")] -pub type Brspnd = crate::Reg; +pub type BRSPND = crate::Reg; #[doc = "Background Request Source Pending Register"] pub mod brspnd; #[doc = "BRSCTRL (rw) register accessor: Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsctrl`] module"] -#[doc(alias = "BRSCTRL")] -pub type Brsctrl = crate::Reg; +pub type BRSCTRL = crate::Reg; #[doc = "Background Request Source Control Register"] pub mod brsctrl; #[doc = "BRSMR (rw) register accessor: Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@brsmr`] module"] -#[doc(alias = "BRSMR")] -pub type Brsmr = crate::Reg; +pub type BRSMR = crate::Reg; #[doc = "Background Request Source Mode Register"] pub mod brsmr; #[doc = "GLOBRCR (rw) register accessor: Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globrcr`] module"] -#[doc(alias = "GLOBRCR")] -pub type Globrcr = crate::Reg; +pub type GLOBRCR = crate::Reg; #[doc = "Global Result Control Register"] pub mod globrcr; #[doc = "GLOBRES (rw) register accessor: Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globres`] module"] -#[doc(alias = "GLOBRES")] -pub type Globres = crate::Reg; +pub type GLOBRES = crate::Reg; #[doc = "Global Result Register"] pub mod globres; #[doc = "GLOBRESD (rw) register accessor: Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@globresd`] module"] -#[doc(alias = "GLOBRESD")] -pub type Globresd = crate::Reg; +pub type GLOBRESD = crate::Reg; #[doc = "Global Result Register, Debug"] pub mod globresd; #[doc = "EMUXSEL (rw) register accessor: External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxsel`] module"] -#[doc(alias = "EMUXSEL")] -pub type Emuxsel = crate::Reg; +pub type EMUXSEL = crate::Reg; #[doc = "External Multiplexer Select Register"] pub mod emuxsel; diff --git a/src/vadc/brsctrl.rs b/src/vadc/brsctrl.rs index 11316b32..91282c52 100644 --- a/src/vadc/brsctrl.rs +++ b/src/vadc/brsctrl.rs @@ -1,60 +1,60 @@ #[doc = "Register `BRSCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srcresreg { +pub enum SRCRESREG_A { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Store result in group result register GxRES1"] - Value2 = 1, + VALUE2 = 1, #[doc = "15: Store result in group result register GxRES15"] - Value3 = 15, + VALUE3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srcresreg) -> Self { + fn from(variant: SRCRESREG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srcresreg { +impl crate::FieldSpec for SRCRESREG_A { type Ux = u8; } -impl crate::IsEnum for Srcresreg {} +impl crate::IsEnum for SRCRESREG_A {} #[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SrcresregR = crate::FieldReader; -impl SrcresregR { +pub type SRCRESREG_R = crate::FieldReader; +impl SRCRESREG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srcresreg::Value1), - 1 => Some(Srcresreg::Value2), - 15 => Some(Srcresreg::Value3), + 0 => Some(SRCRESREG_A::VALUE1), + 1 => Some(SRCRESREG_A::VALUE2), + 15 => Some(SRCRESREG_A::VALUE3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srcresreg::Value1 + *self == SRCRESREG_A::VALUE1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srcresreg::Value2 + *self == SRCRESREG_A::VALUE2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Srcresreg::Value3 + *self == SRCRESREG_A::VALUE3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; -impl<'a, REG> SrcresregW<'a, REG> +pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; +impl<'a, REG> SRCRESREG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,86 +62,86 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value1) + self.variant(SRCRESREG_A::VALUE1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value2) + self.variant(SRCRESREG_A::VALUE2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value3) + self.variant(SRCRESREG_A::VALUE3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XtselR = crate::FieldReader; +pub type XTSEL_R = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XtlvlR = crate::BitReader; +pub type XTLVL_R = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Xtmode { +pub enum XTMODE_A { #[doc = "0: No external trigger"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger event upon a falling edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Trigger event upon a rising edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Trigger event upon any edge"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Xtmode) -> Self { + fn from(variant: XTMODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Xtmode { +impl crate::FieldSpec for XTMODE_A { type Ux = u8; } -impl crate::IsEnum for Xtmode {} +impl crate::IsEnum for XTMODE_A {} #[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XtmodeR = crate::FieldReader; -impl XtmodeR { +pub type XTMODE_R = crate::FieldReader; +impl XTMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xtmode { + pub const fn variant(&self) -> XTMODE_A { match self.bits { - 0 => Xtmode::Value1, - 1 => Xtmode::Value2, - 2 => Xtmode::Value3, - 3 => Xtmode::Value4, + 0 => XTMODE_A::VALUE1, + 1 => XTMODE_A::VALUE2, + 2 => XTMODE_A::VALUE3, + 3 => XTMODE_A::VALUE4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xtmode::Value1 + *self == XTMODE_A::VALUE1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xtmode::Value2 + *self == XTMODE_A::VALUE2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Xtmode::Value3 + *self == XTMODE_A::VALUE3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Xtmode::Value4 + *self == XTMODE_A::VALUE4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XtmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Xtmode, crate::Safe>; -impl<'a, REG> XtmodeW<'a, REG> +pub type XTMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, XTMODE_A, crate::Safe>; +impl<'a, REG> XTMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,176 +149,176 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtmode::Value1) + self.variant(XTMODE_A::VALUE1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtmode::Value2) + self.variant(XTMODE_A::VALUE2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Xtmode::Value3) + self.variant(XTMODE_A::VALUE3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Xtmode::Value4) + self.variant(XTMODE_A::VALUE4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xtwc { +pub enum XTWC_A { #[doc = "0: No write access to trigger configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xtwc) -> Self { + fn from(variant: XTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; -impl<'a, REG> XtwcW<'a, REG> +pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_A>; +impl<'a, REG> XTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtwc::Value1) + self.variant(XTWC_A::VALUE1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtwc::Value2) + self.variant(XTWC_A::VALUE2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GtselR = crate::FieldReader; +pub type GTSEL_R = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GtlvlR = crate::BitReader; +pub type GTLVL_R = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gtwc { +pub enum GTWC_A { #[doc = "0: No write access to gate configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gtwc) -> Self { + fn from(variant: GTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; -impl<'a, REG> GtwcW<'a, REG> +pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_A>; +impl<'a, REG> GTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gtwc::Value1) + self.variant(GTWC_A::VALUE1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gtwc::Value2) + self.variant(GTWC_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SrcresregR { - SrcresregR::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SRCRESREG_R { + SRCRESREG_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XtselR { - XtselR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XTSEL_R { + XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XtlvlR { - XtlvlR::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XTLVL_R { + XTLVL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XtmodeR { - XtmodeR::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XTMODE_R { + XTMODE_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GtselR { - GtselR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GTSEL_R { + GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GtlvlR { - GtlvlR::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GTLVL_R { + GTLVL_R::new(((self.bits >> 20) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SrcresregW { - SrcresregW::new(self, 0) + pub fn srcresreg(&mut self) -> SRCRESREG_W { + SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XtselW { - XtselW::new(self, 8) + pub fn xtsel(&mut self) -> XTSEL_W { + XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XtmodeW { - XtmodeW::new(self, 13) + pub fn xtmode(&mut self) -> XTMODE_W { + XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XtwcW { - XtwcW::new(self, 15) + pub fn xtwc(&mut self) -> XTWC_W { + XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GtselW { - GtselW::new(self, 16) + pub fn gtsel(&mut self) -> GTSEL_W { + GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GtwcW { - GtwcW::new(self, 23) + pub fn gtwc(&mut self) -> GTWC_W { + GTWC_W::new(self, 23) } } #[doc = "Background Request Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BrsctrlSpec; -impl crate::RegisterSpec for BrsctrlSpec { +pub struct BRSCTRL_SPEC; +impl crate::RegisterSpec for BRSCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`brsctrl::R`](R) reader structure"] -impl crate::Readable for BrsctrlSpec {} +impl crate::Readable for BRSCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`brsctrl::W`](W) writer structure"] -impl crate::Writable for BrsctrlSpec { +impl crate::Writable for BRSCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSCTRL to value 0"] -impl crate::Resettable for BrsctrlSpec { +impl crate::Resettable for BRSCTRL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brsmr.rs b/src/vadc/brsmr.rs index e2420f6f..8d710ed1 100644 --- a/src/vadc/brsmr.rs +++ b/src/vadc/brsmr.rs @@ -1,68 +1,68 @@ #[doc = "Register `BRSMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Engt { +pub enum ENGT_A { #[doc = "0: No conversion requests are issued"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Conversion requests are issued if at least one pending bit is set"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Engt) -> Self { + fn from(variant: ENGT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Engt { +impl crate::FieldSpec for ENGT_A { type Ux = u8; } -impl crate::IsEnum for Engt {} +impl crate::IsEnum for ENGT_A {} #[doc = "Field `ENGT` reader - Enable Gate"] -pub type EngtR = crate::FieldReader; -impl EngtR { +pub type ENGT_R = crate::FieldReader; +impl ENGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Engt { + pub const fn variant(&self) -> ENGT_A { match self.bits { - 0 => Engt::Value1, - 1 => Engt::Value2, - 2 => Engt::Value3, - 3 => Engt::Value4, + 0 => ENGT_A::VALUE1, + 1 => ENGT_A::VALUE2, + 2 => ENGT_A::VALUE3, + 3 => ENGT_A::VALUE4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Engt::Value1 + *self == ENGT_A::VALUE1 } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Engt::Value2 + *self == ENGT_A::VALUE2 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Engt::Value3 + *self == ENGT_A::VALUE3 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Engt::Value4 + *self == ENGT_A::VALUE4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type EngtW<'a, REG> = crate::FieldWriter<'a, REG, 2, Engt, crate::Safe>; -impl<'a, REG> EngtW<'a, REG> +pub type ENGT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENGT_A, crate::Safe>; +impl<'a, REG> ENGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,488 +70,488 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Engt::Value1) + self.variant(ENGT_A::VALUE1) } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Engt::Value2) + self.variant(ENGT_A::VALUE2) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Engt::Value3) + self.variant(ENGT_A::VALUE3) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Engt::Value4) + self.variant(ENGT_A::VALUE4) } } #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Entr { +pub enum ENTR_A { #[doc = "0: External trigger disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the load event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Entr) -> Self { + fn from(variant: ENTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type EntrR = crate::BitReader; -impl EntrR { +pub type ENTR_R = crate::BitReader; +impl ENTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Entr { + pub const fn variant(&self) -> ENTR_A { match self.bits { - false => Entr::Value1, - true => Entr::Value2, + false => ENTR_A::VALUE1, + true => ENTR_A::VALUE2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Entr::Value1 + *self == ENTR_A::VALUE1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Entr::Value2 + *self == ENTR_A::VALUE2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; -impl<'a, REG> EntrW<'a, REG> +pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; +impl<'a, REG> ENTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Entr::Value1) + self.variant(ENTR_A::VALUE1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Entr::Value2) + self.variant(ENTR_A::VALUE2) } } #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ensi { +pub enum ENSI_A { #[doc = "0: No request source interrupt"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A request source interrupt is generated upon a request source event (last pending conversion is finished)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ensi) -> Self { + fn from(variant: ENSI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type EnsiR = crate::BitReader; -impl EnsiR { +pub type ENSI_R = crate::BitReader; +impl ENSI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ensi { + pub const fn variant(&self) -> ENSI_A { match self.bits { - false => Ensi::Value1, - true => Ensi::Value2, + false => ENSI_A::VALUE1, + true => ENSI_A::VALUE2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ensi::Value1 + *self == ENSI_A::VALUE1 } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ensi::Value2 + *self == ENSI_A::VALUE2 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; -impl<'a, REG> EnsiW<'a, REG> +pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_A>; +impl<'a, REG> ENSI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ensi::Value1) + self.variant(ENSI_A::VALUE1) } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ensi::Value2) + self.variant(ENSI_A::VALUE2) } } #[doc = "Autoscan Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Scan { +pub enum SCAN_A { #[doc = "0: No autoscan"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Autoscan functionality enabled: a request source event automatically generates a load event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Scan) -> Self { + fn from(variant: SCAN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCAN` reader - Autoscan Enable"] -pub type ScanR = crate::BitReader; -impl ScanR { +pub type SCAN_R = crate::BitReader; +impl SCAN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scan { + pub const fn variant(&self) -> SCAN_A { match self.bits { - false => Scan::Value1, - true => Scan::Value2, + false => SCAN_A::VALUE1, + true => SCAN_A::VALUE2, } } #[doc = "No autoscan"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scan::Value1 + *self == SCAN_A::VALUE1 } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scan::Value2 + *self == SCAN_A::VALUE2 } } #[doc = "Field `SCAN` writer - Autoscan Enable"] -pub type ScanW<'a, REG> = crate::BitWriter<'a, REG, Scan>; -impl<'a, REG> ScanW<'a, REG> +pub type SCAN_W<'a, REG> = crate::BitWriter<'a, REG, SCAN_A>; +impl<'a, REG> SCAN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No autoscan"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scan::Value1) + self.variant(SCAN_A::VALUE1) } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scan::Value2) + self.variant(SCAN_A::VALUE2) } } #[doc = "Autoscan Source Load Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ldm { +pub enum LDM_A { #[doc = "0: Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ldm) -> Self { + fn from(variant: LDM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] -pub type LdmR = crate::BitReader; -impl LdmR { +pub type LDM_R = crate::BitReader; +impl LDM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ldm { + pub const fn variant(&self) -> LDM_A { match self.bits { - false => Ldm::Value1, - true => Ldm::Value2, + false => LDM_A::VALUE1, + true => LDM_A::VALUE2, } } #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ldm::Value1 + *self == LDM_A::VALUE1 } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ldm::Value2 + *self == LDM_A::VALUE2 } } #[doc = "Field `LDM` writer - Autoscan Source Load Event Mode"] -pub type LdmW<'a, REG> = crate::BitWriter<'a, REG, Ldm>; -impl<'a, REG> LdmW<'a, REG> +pub type LDM_W<'a, REG> = crate::BitWriter<'a, REG, LDM_A>; +impl<'a, REG> LDM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ldm::Value1) + self.variant(LDM_A::VALUE1) } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ldm::Value2) + self.variant(LDM_A::VALUE2) } } #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Reqgt { +pub enum REQGT_A { #[doc = "0: The gate input is low"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The gate input is high"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Reqgt) -> Self { + fn from(variant: REQGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REQGT` reader - Request Gate Level"] -pub type ReqgtR = crate::BitReader; -impl ReqgtR { +pub type REQGT_R = crate::BitReader; +impl REQGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Reqgt { + pub const fn variant(&self) -> REQGT_A { match self.bits { - false => Reqgt::Value1, - true => Reqgt::Value2, + false => REQGT_A::VALUE1, + true => REQGT_A::VALUE2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Reqgt::Value1 + *self == REQGT_A::VALUE1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Reqgt::Value2 + *self == REQGT_A::VALUE2 } } #[doc = "Clear Pending Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Clrpnd { +pub enum CLRPND_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bits in registers BRSPNDx are cleared"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Clrpnd) -> Self { + fn from(variant: CLRPND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRPND` writer - Clear Pending Bits"] -pub type ClrpndW<'a, REG> = crate::BitWriter<'a, REG, Clrpnd>; -impl<'a, REG> ClrpndW<'a, REG> +pub type CLRPND_W<'a, REG> = crate::BitWriter<'a, REG, CLRPND_A>; +impl<'a, REG> CLRPND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clrpnd::Value1) + self.variant(CLRPND_A::VALUE1) } #[doc = "The bits in registers BRSPNDx are cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Clrpnd::Value2) + self.variant(CLRPND_A::VALUE2) } } #[doc = "Generate Load Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ldev { +pub enum LDEV_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A load event is generated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ldev) -> Self { + fn from(variant: LDEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LDEV` writer - Generate Load Event"] -pub type LdevW<'a, REG> = crate::BitWriter<'a, REG, Ldev>; -impl<'a, REG> LdevW<'a, REG> +pub type LDEV_W<'a, REG> = crate::BitWriter<'a, REG, LDEV_A>; +impl<'a, REG> LDEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ldev::Value1) + self.variant(LDEV_A::VALUE1) } #[doc = "A load event is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ldev::Value2) + self.variant(LDEV_A::VALUE2) } } #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rptdis { +pub enum RPTDIS_A { #[doc = "0: A cancelled conversion is repeated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A cancelled conversion is discarded"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rptdis) -> Self { + fn from(variant: RPTDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RptdisR = crate::BitReader; -impl RptdisR { +pub type RPTDIS_R = crate::BitReader; +impl RPTDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rptdis { + pub const fn variant(&self) -> RPTDIS_A { match self.bits { - false => Rptdis::Value1, - true => Rptdis::Value2, + false => RPTDIS_A::VALUE1, + true => RPTDIS_A::VALUE2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rptdis::Value1 + *self == RPTDIS_A::VALUE1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rptdis::Value2 + *self == RPTDIS_A::VALUE2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; -impl<'a, REG> RptdisW<'a, REG> +pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; +impl<'a, REG> RPTDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rptdis::Value1) + self.variant(RPTDIS_A::VALUE1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rptdis::Value2) + self.variant(RPTDIS_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> EngtR { - EngtR::new((self.bits & 3) as u8) + pub fn engt(&self) -> ENGT_R { + ENGT_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> EntrR { - EntrR::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> ENTR_R { + ENTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> EnsiR { - EnsiR::new(((self.bits >> 3) & 1) != 0) + pub fn ensi(&self) -> ENSI_R { + ENSI_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - pub fn scan(&self) -> ScanR { - ScanR::new(((self.bits >> 4) & 1) != 0) + pub fn scan(&self) -> SCAN_R { + SCAN_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - pub fn ldm(&self) -> LdmR { - LdmR::new(((self.bits >> 5) & 1) != 0) + pub fn ldm(&self) -> LDM_R { + LDM_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> ReqgtR { - ReqgtR::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> REQGT_R { + REQGT_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RptdisR { - RptdisR::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RPTDIS_R { + RPTDIS_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> EngtW { - EngtW::new(self, 0) + pub fn engt(&mut self) -> ENGT_W { + ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> EntrW { - EntrW::new(self, 2) + pub fn entr(&mut self) -> ENTR_W { + ENTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> EnsiW { - EnsiW::new(self, 3) + pub fn ensi(&mut self) -> ENSI_W { + ENSI_W::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] #[must_use] - pub fn scan(&mut self) -> ScanW { - ScanW::new(self, 4) + pub fn scan(&mut self) -> SCAN_W { + SCAN_W::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] #[must_use] - pub fn ldm(&mut self) -> LdmW { - LdmW::new(self, 5) + pub fn ldm(&mut self) -> LDM_W { + LDM_W::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] #[must_use] - pub fn clrpnd(&mut self) -> ClrpndW { - ClrpndW::new(self, 8) + pub fn clrpnd(&mut self) -> CLRPND_W { + CLRPND_W::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] #[must_use] - pub fn ldev(&mut self) -> LdevW { - LdevW::new(self, 9) + pub fn ldev(&mut self) -> LDEV_W { + LDEV_W::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RptdisW { - RptdisW::new(self, 16) + pub fn rptdis(&mut self) -> RPTDIS_W { + RPTDIS_W::new(self, 16) } } #[doc = "Background Request Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brsmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brsmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BrsmrSpec; -impl crate::RegisterSpec for BrsmrSpec { +pub struct BRSMR_SPEC; +impl crate::RegisterSpec for BRSMR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`brsmr::R`](R) reader structure"] -impl crate::Readable for BrsmrSpec {} +impl crate::Readable for BRSMR_SPEC {} #[doc = "`write(|w| ..)` method takes [`brsmr::W`](W) writer structure"] -impl crate::Writable for BrsmrSpec { +impl crate::Writable for BRSMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSMR to value 0"] -impl crate::Resettable for BrsmrSpec { +impl crate::Resettable for BRSMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brspnd.rs b/src/vadc/brspnd.rs index ee222e4f..91d8495f 100644 --- a/src/vadc/brspnd.rs +++ b/src/vadc/brspnd.rs @@ -1,538 +1,538 @@ #[doc = "Register `BRSPND[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSPND[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg0 { +pub enum CHPNDG0_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg0) -> Self { + fn from(variant: CHPNDG0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG0` reader - Channels Pending Group x"] -pub type Chpndg0R = crate::BitReader; -impl Chpndg0R { +pub type CHPNDG0_R = crate::BitReader; +impl CHPNDG0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg0 { + pub const fn variant(&self) -> CHPNDG0_A { match self.bits { - false => Chpndg0::Value1, - true => Chpndg0::Value2, + false => CHPNDG0_A::VALUE1, + true => CHPNDG0_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg0::Value1 + *self == CHPNDG0_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg0::Value2 + *self == CHPNDG0_A::VALUE2 } } #[doc = "Field `CHPNDG0` writer - Channels Pending Group x"] -pub type Chpndg0W<'a, REG> = crate::BitWriter<'a, REG, Chpndg0>; -impl<'a, REG> Chpndg0W<'a, REG> +pub type CHPNDG0_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG0_A>; +impl<'a, REG> CHPNDG0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg0::Value1) + self.variant(CHPNDG0_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg0::Value2) + self.variant(CHPNDG0_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg1 { +pub enum CHPNDG1_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg1) -> Self { + fn from(variant: CHPNDG1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG1` reader - Channels Pending Group x"] -pub type Chpndg1R = crate::BitReader; -impl Chpndg1R { +pub type CHPNDG1_R = crate::BitReader; +impl CHPNDG1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg1 { + pub const fn variant(&self) -> CHPNDG1_A { match self.bits { - false => Chpndg1::Value1, - true => Chpndg1::Value2, + false => CHPNDG1_A::VALUE1, + true => CHPNDG1_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg1::Value1 + *self == CHPNDG1_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg1::Value2 + *self == CHPNDG1_A::VALUE2 } } #[doc = "Field `CHPNDG1` writer - Channels Pending Group x"] -pub type Chpndg1W<'a, REG> = crate::BitWriter<'a, REG, Chpndg1>; -impl<'a, REG> Chpndg1W<'a, REG> +pub type CHPNDG1_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG1_A>; +impl<'a, REG> CHPNDG1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg1::Value1) + self.variant(CHPNDG1_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg1::Value2) + self.variant(CHPNDG1_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg2 { +pub enum CHPNDG2_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg2) -> Self { + fn from(variant: CHPNDG2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG2` reader - Channels Pending Group x"] -pub type Chpndg2R = crate::BitReader; -impl Chpndg2R { +pub type CHPNDG2_R = crate::BitReader; +impl CHPNDG2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg2 { + pub const fn variant(&self) -> CHPNDG2_A { match self.bits { - false => Chpndg2::Value1, - true => Chpndg2::Value2, + false => CHPNDG2_A::VALUE1, + true => CHPNDG2_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg2::Value1 + *self == CHPNDG2_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg2::Value2 + *self == CHPNDG2_A::VALUE2 } } #[doc = "Field `CHPNDG2` writer - Channels Pending Group x"] -pub type Chpndg2W<'a, REG> = crate::BitWriter<'a, REG, Chpndg2>; -impl<'a, REG> Chpndg2W<'a, REG> +pub type CHPNDG2_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG2_A>; +impl<'a, REG> CHPNDG2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg2::Value1) + self.variant(CHPNDG2_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg2::Value2) + self.variant(CHPNDG2_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg3 { +pub enum CHPNDG3_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg3) -> Self { + fn from(variant: CHPNDG3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG3` reader - Channels Pending Group x"] -pub type Chpndg3R = crate::BitReader; -impl Chpndg3R { +pub type CHPNDG3_R = crate::BitReader; +impl CHPNDG3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg3 { + pub const fn variant(&self) -> CHPNDG3_A { match self.bits { - false => Chpndg3::Value1, - true => Chpndg3::Value2, + false => CHPNDG3_A::VALUE1, + true => CHPNDG3_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg3::Value1 + *self == CHPNDG3_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg3::Value2 + *self == CHPNDG3_A::VALUE2 } } #[doc = "Field `CHPNDG3` writer - Channels Pending Group x"] -pub type Chpndg3W<'a, REG> = crate::BitWriter<'a, REG, Chpndg3>; -impl<'a, REG> Chpndg3W<'a, REG> +pub type CHPNDG3_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG3_A>; +impl<'a, REG> CHPNDG3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg3::Value1) + self.variant(CHPNDG3_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg3::Value2) + self.variant(CHPNDG3_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg4 { +pub enum CHPNDG4_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg4) -> Self { + fn from(variant: CHPNDG4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG4` reader - Channels Pending Group x"] -pub type Chpndg4R = crate::BitReader; -impl Chpndg4R { +pub type CHPNDG4_R = crate::BitReader; +impl CHPNDG4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg4 { + pub const fn variant(&self) -> CHPNDG4_A { match self.bits { - false => Chpndg4::Value1, - true => Chpndg4::Value2, + false => CHPNDG4_A::VALUE1, + true => CHPNDG4_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg4::Value1 + *self == CHPNDG4_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg4::Value2 + *self == CHPNDG4_A::VALUE2 } } #[doc = "Field `CHPNDG4` writer - Channels Pending Group x"] -pub type Chpndg4W<'a, REG> = crate::BitWriter<'a, REG, Chpndg4>; -impl<'a, REG> Chpndg4W<'a, REG> +pub type CHPNDG4_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG4_A>; +impl<'a, REG> CHPNDG4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg4::Value1) + self.variant(CHPNDG4_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg4::Value2) + self.variant(CHPNDG4_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg5 { +pub enum CHPNDG5_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg5) -> Self { + fn from(variant: CHPNDG5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG5` reader - Channels Pending Group x"] -pub type Chpndg5R = crate::BitReader; -impl Chpndg5R { +pub type CHPNDG5_R = crate::BitReader; +impl CHPNDG5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg5 { + pub const fn variant(&self) -> CHPNDG5_A { match self.bits { - false => Chpndg5::Value1, - true => Chpndg5::Value2, + false => CHPNDG5_A::VALUE1, + true => CHPNDG5_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg5::Value1 + *self == CHPNDG5_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg5::Value2 + *self == CHPNDG5_A::VALUE2 } } #[doc = "Field `CHPNDG5` writer - Channels Pending Group x"] -pub type Chpndg5W<'a, REG> = crate::BitWriter<'a, REG, Chpndg5>; -impl<'a, REG> Chpndg5W<'a, REG> +pub type CHPNDG5_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG5_A>; +impl<'a, REG> CHPNDG5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg5::Value1) + self.variant(CHPNDG5_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg5::Value2) + self.variant(CHPNDG5_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg6 { +pub enum CHPNDG6_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg6) -> Self { + fn from(variant: CHPNDG6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG6` reader - Channels Pending Group x"] -pub type Chpndg6R = crate::BitReader; -impl Chpndg6R { +pub type CHPNDG6_R = crate::BitReader; +impl CHPNDG6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg6 { + pub const fn variant(&self) -> CHPNDG6_A { match self.bits { - false => Chpndg6::Value1, - true => Chpndg6::Value2, + false => CHPNDG6_A::VALUE1, + true => CHPNDG6_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg6::Value1 + *self == CHPNDG6_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg6::Value2 + *self == CHPNDG6_A::VALUE2 } } #[doc = "Field `CHPNDG6` writer - Channels Pending Group x"] -pub type Chpndg6W<'a, REG> = crate::BitWriter<'a, REG, Chpndg6>; -impl<'a, REG> Chpndg6W<'a, REG> +pub type CHPNDG6_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG6_A>; +impl<'a, REG> CHPNDG6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg6::Value1) + self.variant(CHPNDG6_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg6::Value2) + self.variant(CHPNDG6_A::VALUE2) } } #[doc = "Channels Pending Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpndg7 { +pub enum CHPNDG7_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpndg7) -> Self { + fn from(variant: CHPNDG7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPNDG7` reader - Channels Pending Group x"] -pub type Chpndg7R = crate::BitReader; -impl Chpndg7R { +pub type CHPNDG7_R = crate::BitReader; +impl CHPNDG7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpndg7 { + pub const fn variant(&self) -> CHPNDG7_A { match self.bits { - false => Chpndg7::Value1, - true => Chpndg7::Value2, + false => CHPNDG7_A::VALUE1, + true => CHPNDG7_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpndg7::Value1 + *self == CHPNDG7_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpndg7::Value2 + *self == CHPNDG7_A::VALUE2 } } #[doc = "Field `CHPNDG7` writer - Channels Pending Group x"] -pub type Chpndg7W<'a, REG> = crate::BitWriter<'a, REG, Chpndg7>; -impl<'a, REG> Chpndg7W<'a, REG> +pub type CHPNDG7_W<'a, REG> = crate::BitWriter<'a, REG, CHPNDG7_A>; +impl<'a, REG> CHPNDG7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpndg7::Value1) + self.variant(CHPNDG7_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpndg7::Value2) + self.variant(CHPNDG7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg0(&self) -> Chpndg0R { - Chpndg0R::new((self.bits & 1) != 0) + pub fn chpndg0(&self) -> CHPNDG0_R { + CHPNDG0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg1(&self) -> Chpndg1R { - Chpndg1R::new(((self.bits >> 1) & 1) != 0) + pub fn chpndg1(&self) -> CHPNDG1_R { + CHPNDG1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg2(&self) -> Chpndg2R { - Chpndg2R::new(((self.bits >> 2) & 1) != 0) + pub fn chpndg2(&self) -> CHPNDG2_R { + CHPNDG2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg3(&self) -> Chpndg3R { - Chpndg3R::new(((self.bits >> 3) & 1) != 0) + pub fn chpndg3(&self) -> CHPNDG3_R { + CHPNDG3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg4(&self) -> Chpndg4R { - Chpndg4R::new(((self.bits >> 4) & 1) != 0) + pub fn chpndg4(&self) -> CHPNDG4_R { + CHPNDG4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg5(&self) -> Chpndg5R { - Chpndg5R::new(((self.bits >> 5) & 1) != 0) + pub fn chpndg5(&self) -> CHPNDG5_R { + CHPNDG5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg6(&self) -> Chpndg6R { - Chpndg6R::new(((self.bits >> 6) & 1) != 0) + pub fn chpndg6(&self) -> CHPNDG6_R { + CHPNDG6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channels Pending Group x"] #[inline(always)] - pub fn chpndg7(&self) -> Chpndg7R { - Chpndg7R::new(((self.bits >> 7) & 1) != 0) + pub fn chpndg7(&self) -> CHPNDG7_R { + CHPNDG7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg0(&mut self) -> Chpndg0W { - Chpndg0W::new(self, 0) + pub fn chpndg0(&mut self) -> CHPNDG0_W { + CHPNDG0_W::new(self, 0) } #[doc = "Bit 1 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg1(&mut self) -> Chpndg1W { - Chpndg1W::new(self, 1) + pub fn chpndg1(&mut self) -> CHPNDG1_W { + CHPNDG1_W::new(self, 1) } #[doc = "Bit 2 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg2(&mut self) -> Chpndg2W { - Chpndg2W::new(self, 2) + pub fn chpndg2(&mut self) -> CHPNDG2_W { + CHPNDG2_W::new(self, 2) } #[doc = "Bit 3 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg3(&mut self) -> Chpndg3W { - Chpndg3W::new(self, 3) + pub fn chpndg3(&mut self) -> CHPNDG3_W { + CHPNDG3_W::new(self, 3) } #[doc = "Bit 4 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg4(&mut self) -> Chpndg4W { - Chpndg4W::new(self, 4) + pub fn chpndg4(&mut self) -> CHPNDG4_W { + CHPNDG4_W::new(self, 4) } #[doc = "Bit 5 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg5(&mut self) -> Chpndg5W { - Chpndg5W::new(self, 5) + pub fn chpndg5(&mut self) -> CHPNDG5_W { + CHPNDG5_W::new(self, 5) } #[doc = "Bit 6 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg6(&mut self) -> Chpndg6W { - Chpndg6W::new(self, 6) + pub fn chpndg6(&mut self) -> CHPNDG6_W { + CHPNDG6_W::new(self, 6) } #[doc = "Bit 7 - Channels Pending Group x"] #[inline(always)] #[must_use] - pub fn chpndg7(&mut self) -> Chpndg7W { - Chpndg7W::new(self, 7) + pub fn chpndg7(&mut self) -> CHPNDG7_W { + CHPNDG7_W::new(self, 7) } } #[doc = "Background Request Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BrspndSpec; -impl crate::RegisterSpec for BrspndSpec { +pub struct BRSPND_SPEC; +impl crate::RegisterSpec for BRSPND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`brspnd::R`](R) reader structure"] -impl crate::Readable for BrspndSpec {} +impl crate::Readable for BRSPND_SPEC {} #[doc = "`write(|w| ..)` method takes [`brspnd::W`](W) writer structure"] -impl crate::Writable for BrspndSpec { +impl crate::Writable for BRSPND_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSPND[%s] to value 0"] -impl crate::Resettable for BrspndSpec { +impl crate::Resettable for BRSPND_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/brssel.rs b/src/vadc/brssel.rs index 90a52ad9..7a761ae7 100644 --- a/src/vadc/brssel.rs +++ b/src/vadc/brssel.rs @@ -1,538 +1,538 @@ #[doc = "Register `BRSSEL[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BRSSEL[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg0 { +pub enum CHSELG0_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg0) -> Self { + fn from(variant: CHSELG0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG0` reader - Channel Selection Group x"] -pub type Chselg0R = crate::BitReader; -impl Chselg0R { +pub type CHSELG0_R = crate::BitReader; +impl CHSELG0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg0 { + pub const fn variant(&self) -> CHSELG0_A { match self.bits { - false => Chselg0::Value1, - true => Chselg0::Value2, + false => CHSELG0_A::VALUE1, + true => CHSELG0_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg0::Value1 + *self == CHSELG0_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg0::Value2 + *self == CHSELG0_A::VALUE2 } } #[doc = "Field `CHSELG0` writer - Channel Selection Group x"] -pub type Chselg0W<'a, REG> = crate::BitWriter<'a, REG, Chselg0>; -impl<'a, REG> Chselg0W<'a, REG> +pub type CHSELG0_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG0_A>; +impl<'a, REG> CHSELG0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg0::Value1) + self.variant(CHSELG0_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg0::Value2) + self.variant(CHSELG0_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg1 { +pub enum CHSELG1_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg1) -> Self { + fn from(variant: CHSELG1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG1` reader - Channel Selection Group x"] -pub type Chselg1R = crate::BitReader; -impl Chselg1R { +pub type CHSELG1_R = crate::BitReader; +impl CHSELG1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg1 { + pub const fn variant(&self) -> CHSELG1_A { match self.bits { - false => Chselg1::Value1, - true => Chselg1::Value2, + false => CHSELG1_A::VALUE1, + true => CHSELG1_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg1::Value1 + *self == CHSELG1_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg1::Value2 + *self == CHSELG1_A::VALUE2 } } #[doc = "Field `CHSELG1` writer - Channel Selection Group x"] -pub type Chselg1W<'a, REG> = crate::BitWriter<'a, REG, Chselg1>; -impl<'a, REG> Chselg1W<'a, REG> +pub type CHSELG1_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG1_A>; +impl<'a, REG> CHSELG1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg1::Value1) + self.variant(CHSELG1_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg1::Value2) + self.variant(CHSELG1_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg2 { +pub enum CHSELG2_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg2) -> Self { + fn from(variant: CHSELG2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG2` reader - Channel Selection Group x"] -pub type Chselg2R = crate::BitReader; -impl Chselg2R { +pub type CHSELG2_R = crate::BitReader; +impl CHSELG2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg2 { + pub const fn variant(&self) -> CHSELG2_A { match self.bits { - false => Chselg2::Value1, - true => Chselg2::Value2, + false => CHSELG2_A::VALUE1, + true => CHSELG2_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg2::Value1 + *self == CHSELG2_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg2::Value2 + *self == CHSELG2_A::VALUE2 } } #[doc = "Field `CHSELG2` writer - Channel Selection Group x"] -pub type Chselg2W<'a, REG> = crate::BitWriter<'a, REG, Chselg2>; -impl<'a, REG> Chselg2W<'a, REG> +pub type CHSELG2_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG2_A>; +impl<'a, REG> CHSELG2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg2::Value1) + self.variant(CHSELG2_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg2::Value2) + self.variant(CHSELG2_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg3 { +pub enum CHSELG3_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg3) -> Self { + fn from(variant: CHSELG3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG3` reader - Channel Selection Group x"] -pub type Chselg3R = crate::BitReader; -impl Chselg3R { +pub type CHSELG3_R = crate::BitReader; +impl CHSELG3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg3 { + pub const fn variant(&self) -> CHSELG3_A { match self.bits { - false => Chselg3::Value1, - true => Chselg3::Value2, + false => CHSELG3_A::VALUE1, + true => CHSELG3_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg3::Value1 + *self == CHSELG3_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg3::Value2 + *self == CHSELG3_A::VALUE2 } } #[doc = "Field `CHSELG3` writer - Channel Selection Group x"] -pub type Chselg3W<'a, REG> = crate::BitWriter<'a, REG, Chselg3>; -impl<'a, REG> Chselg3W<'a, REG> +pub type CHSELG3_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG3_A>; +impl<'a, REG> CHSELG3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg3::Value1) + self.variant(CHSELG3_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg3::Value2) + self.variant(CHSELG3_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg4 { +pub enum CHSELG4_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg4) -> Self { + fn from(variant: CHSELG4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG4` reader - Channel Selection Group x"] -pub type Chselg4R = crate::BitReader; -impl Chselg4R { +pub type CHSELG4_R = crate::BitReader; +impl CHSELG4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg4 { + pub const fn variant(&self) -> CHSELG4_A { match self.bits { - false => Chselg4::Value1, - true => Chselg4::Value2, + false => CHSELG4_A::VALUE1, + true => CHSELG4_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg4::Value1 + *self == CHSELG4_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg4::Value2 + *self == CHSELG4_A::VALUE2 } } #[doc = "Field `CHSELG4` writer - Channel Selection Group x"] -pub type Chselg4W<'a, REG> = crate::BitWriter<'a, REG, Chselg4>; -impl<'a, REG> Chselg4W<'a, REG> +pub type CHSELG4_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG4_A>; +impl<'a, REG> CHSELG4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg4::Value1) + self.variant(CHSELG4_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg4::Value2) + self.variant(CHSELG4_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg5 { +pub enum CHSELG5_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg5) -> Self { + fn from(variant: CHSELG5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG5` reader - Channel Selection Group x"] -pub type Chselg5R = crate::BitReader; -impl Chselg5R { +pub type CHSELG5_R = crate::BitReader; +impl CHSELG5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg5 { + pub const fn variant(&self) -> CHSELG5_A { match self.bits { - false => Chselg5::Value1, - true => Chselg5::Value2, + false => CHSELG5_A::VALUE1, + true => CHSELG5_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg5::Value1 + *self == CHSELG5_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg5::Value2 + *self == CHSELG5_A::VALUE2 } } #[doc = "Field `CHSELG5` writer - Channel Selection Group x"] -pub type Chselg5W<'a, REG> = crate::BitWriter<'a, REG, Chselg5>; -impl<'a, REG> Chselg5W<'a, REG> +pub type CHSELG5_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG5_A>; +impl<'a, REG> CHSELG5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg5::Value1) + self.variant(CHSELG5_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg5::Value2) + self.variant(CHSELG5_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg6 { +pub enum CHSELG6_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg6) -> Self { + fn from(variant: CHSELG6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG6` reader - Channel Selection Group x"] -pub type Chselg6R = crate::BitReader; -impl Chselg6R { +pub type CHSELG6_R = crate::BitReader; +impl CHSELG6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg6 { + pub const fn variant(&self) -> CHSELG6_A { match self.bits { - false => Chselg6::Value1, - true => Chselg6::Value2, + false => CHSELG6_A::VALUE1, + true => CHSELG6_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg6::Value1 + *self == CHSELG6_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg6::Value2 + *self == CHSELG6_A::VALUE2 } } #[doc = "Field `CHSELG6` writer - Channel Selection Group x"] -pub type Chselg6W<'a, REG> = crate::BitWriter<'a, REG, Chselg6>; -impl<'a, REG> Chselg6W<'a, REG> +pub type CHSELG6_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG6_A>; +impl<'a, REG> CHSELG6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg6::Value1) + self.variant(CHSELG6_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg6::Value2) + self.variant(CHSELG6_A::VALUE2) } } #[doc = "Channel Selection Group x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chselg7 { +pub enum CHSELG7_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chselg7) -> Self { + fn from(variant: CHSELG7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSELG7` reader - Channel Selection Group x"] -pub type Chselg7R = crate::BitReader; -impl Chselg7R { +pub type CHSELG7_R = crate::BitReader; +impl CHSELG7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chselg7 { + pub const fn variant(&self) -> CHSELG7_A { match self.bits { - false => Chselg7::Value1, - true => Chselg7::Value2, + false => CHSELG7_A::VALUE1, + true => CHSELG7_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chselg7::Value1 + *self == CHSELG7_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chselg7::Value2 + *self == CHSELG7_A::VALUE2 } } #[doc = "Field `CHSELG7` writer - Channel Selection Group x"] -pub type Chselg7W<'a, REG> = crate::BitWriter<'a, REG, Chselg7>; -impl<'a, REG> Chselg7W<'a, REG> +pub type CHSELG7_W<'a, REG> = crate::BitWriter<'a, REG, CHSELG7_A>; +impl<'a, REG> CHSELG7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chselg7::Value1) + self.variant(CHSELG7_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chselg7::Value2) + self.variant(CHSELG7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Channel Selection Group x"] #[inline(always)] - pub fn chselg0(&self) -> Chselg0R { - Chselg0R::new((self.bits & 1) != 0) + pub fn chselg0(&self) -> CHSELG0_R { + CHSELG0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Selection Group x"] #[inline(always)] - pub fn chselg1(&self) -> Chselg1R { - Chselg1R::new(((self.bits >> 1) & 1) != 0) + pub fn chselg1(&self) -> CHSELG1_R { + CHSELG1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Selection Group x"] #[inline(always)] - pub fn chselg2(&self) -> Chselg2R { - Chselg2R::new(((self.bits >> 2) & 1) != 0) + pub fn chselg2(&self) -> CHSELG2_R { + CHSELG2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Selection Group x"] #[inline(always)] - pub fn chselg3(&self) -> Chselg3R { - Chselg3R::new(((self.bits >> 3) & 1) != 0) + pub fn chselg3(&self) -> CHSELG3_R { + CHSELG3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Selection Group x"] #[inline(always)] - pub fn chselg4(&self) -> Chselg4R { - Chselg4R::new(((self.bits >> 4) & 1) != 0) + pub fn chselg4(&self) -> CHSELG4_R { + CHSELG4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Selection Group x"] #[inline(always)] - pub fn chselg5(&self) -> Chselg5R { - Chselg5R::new(((self.bits >> 5) & 1) != 0) + pub fn chselg5(&self) -> CHSELG5_R { + CHSELG5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Selection Group x"] #[inline(always)] - pub fn chselg6(&self) -> Chselg6R { - Chselg6R::new(((self.bits >> 6) & 1) != 0) + pub fn chselg6(&self) -> CHSELG6_R { + CHSELG6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Selection Group x"] #[inline(always)] - pub fn chselg7(&self) -> Chselg7R { - Chselg7R::new(((self.bits >> 7) & 1) != 0) + pub fn chselg7(&self) -> CHSELG7_R { + CHSELG7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg0(&mut self) -> Chselg0W { - Chselg0W::new(self, 0) + pub fn chselg0(&mut self) -> CHSELG0_W { + CHSELG0_W::new(self, 0) } #[doc = "Bit 1 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg1(&mut self) -> Chselg1W { - Chselg1W::new(self, 1) + pub fn chselg1(&mut self) -> CHSELG1_W { + CHSELG1_W::new(self, 1) } #[doc = "Bit 2 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg2(&mut self) -> Chselg2W { - Chselg2W::new(self, 2) + pub fn chselg2(&mut self) -> CHSELG2_W { + CHSELG2_W::new(self, 2) } #[doc = "Bit 3 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg3(&mut self) -> Chselg3W { - Chselg3W::new(self, 3) + pub fn chselg3(&mut self) -> CHSELG3_W { + CHSELG3_W::new(self, 3) } #[doc = "Bit 4 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg4(&mut self) -> Chselg4W { - Chselg4W::new(self, 4) + pub fn chselg4(&mut self) -> CHSELG4_W { + CHSELG4_W::new(self, 4) } #[doc = "Bit 5 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg5(&mut self) -> Chselg5W { - Chselg5W::new(self, 5) + pub fn chselg5(&mut self) -> CHSELG5_W { + CHSELG5_W::new(self, 5) } #[doc = "Bit 6 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg6(&mut self) -> Chselg6W { - Chselg6W::new(self, 6) + pub fn chselg6(&mut self) -> CHSELG6_W { + CHSELG6_W::new(self, 6) } #[doc = "Bit 7 - Channel Selection Group x"] #[inline(always)] #[must_use] - pub fn chselg7(&mut self) -> Chselg7W { - Chselg7W::new(self, 7) + pub fn chselg7(&mut self) -> CHSELG7_W { + CHSELG7_W::new(self, 7) } } #[doc = "Background Request Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`brssel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`brssel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BrsselSpec; -impl crate::RegisterSpec for BrsselSpec { +pub struct BRSSEL_SPEC; +impl crate::RegisterSpec for BRSSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`brssel::R`](R) reader structure"] -impl crate::Readable for BrsselSpec {} +impl crate::Readable for BRSSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`brssel::W`](W) writer structure"] -impl crate::Writable for BrsselSpec { +impl crate::Writable for BRSSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BRSSEL[%s] to value 0"] -impl crate::Resettable for BrsselSpec { +impl crate::Resettable for BRSSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/clc.rs b/src/vadc/clc.rs index d3285b7a..6bb2d198 100644 --- a/src/vadc/clc.rs +++ b/src/vadc/clc.rs @@ -1,194 +1,194 @@ #[doc = "Register `CLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Module Disable Request Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Disr { +pub enum DISR_A { #[doc = "0: On request: enable the module clock"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Off request: stop the module clock"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Disr) -> Self { + fn from(variant: DISR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DISR` reader - Module Disable Request Bit"] -pub type DisrR = crate::BitReader; -impl DisrR { +pub type DISR_R = crate::BitReader; +impl DISR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Disr { + pub const fn variant(&self) -> DISR_A { match self.bits { - false => Disr::Value1, - true => Disr::Value2, + false => DISR_A::VALUE1, + true => DISR_A::VALUE2, } } #[doc = "On request: enable the module clock"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Disr::Value1 + *self == DISR_A::VALUE1 } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Disr::Value2 + *self == DISR_A::VALUE2 } } #[doc = "Field `DISR` writer - Module Disable Request Bit"] -pub type DisrW<'a, REG> = crate::BitWriter<'a, REG, Disr>; -impl<'a, REG> DisrW<'a, REG> +pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG, DISR_A>; +impl<'a, REG> DISR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "On request: enable the module clock"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Disr::Value1) + self.variant(DISR_A::VALUE1) } #[doc = "Off request: stop the module clock"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Disr::Value2) + self.variant(DISR_A::VALUE2) } } #[doc = "Module Disable Status Bit\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Diss { +pub enum DISS_A { #[doc = "0: Module clock is enabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Off: module is not clocked"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Diss) -> Self { + fn from(variant: DISS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DISS` reader - Module Disable Status Bit"] -pub type DissR = crate::BitReader; -impl DissR { +pub type DISS_R = crate::BitReader; +impl DISS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Diss { + pub const fn variant(&self) -> DISS_A { match self.bits { - false => Diss::Value1, - true => Diss::Value2, + false => DISS_A::VALUE1, + true => DISS_A::VALUE2, } } #[doc = "Module clock is enabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Diss::Value1 + *self == DISS_A::VALUE1 } #[doc = "Off: module is not clocked"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Diss::Value2 + *self == DISS_A::VALUE2 } } #[doc = "Sleep Mode Enable Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Edis { +pub enum EDIS_A { #[doc = "0: Sleep mode request is enabled and functional"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Module disregards the sleep mode control signal"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Edis) -> Self { + fn from(variant: EDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EDIS` reader - Sleep Mode Enable Control"] -pub type EdisR = crate::BitReader; -impl EdisR { +pub type EDIS_R = crate::BitReader; +impl EDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Edis { + pub const fn variant(&self) -> EDIS_A { match self.bits { - false => Edis::Value1, - true => Edis::Value2, + false => EDIS_A::VALUE1, + true => EDIS_A::VALUE2, } } #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Edis::Value1 + *self == EDIS_A::VALUE1 } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Edis::Value2 + *self == EDIS_A::VALUE2 } } #[doc = "Field `EDIS` writer - Sleep Mode Enable Control"] -pub type EdisW<'a, REG> = crate::BitWriter<'a, REG, Edis>; -impl<'a, REG> EdisW<'a, REG> +pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG, EDIS_A>; +impl<'a, REG> EDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Sleep mode request is enabled and functional"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Edis::Value1) + self.variant(EDIS_A::VALUE1) } #[doc = "Module disregards the sleep mode control signal"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Edis::Value2) + self.variant(EDIS_A::VALUE2) } } impl R { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - pub fn disr(&self) -> DisrR { - DisrR::new((self.bits & 1) != 0) + pub fn disr(&self) -> DISR_R { + DISR_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Module Disable Status Bit"] #[inline(always)] - pub fn diss(&self) -> DissR { - DissR::new(((self.bits >> 1) & 1) != 0) + pub fn diss(&self) -> DISS_R { + DISS_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - pub fn edis(&self) -> EdisR { - EdisR::new(((self.bits >> 3) & 1) != 0) + pub fn edis(&self) -> EDIS_R { + EDIS_R::new(((self.bits >> 3) & 1) != 0) } } impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] #[must_use] - pub fn disr(&mut self) -> DisrW { - DisrW::new(self, 0) + pub fn disr(&mut self) -> DISR_W { + DISR_W::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] #[must_use] - pub fn edis(&mut self) -> EdisW { - EdisW::new(self, 3) + pub fn edis(&mut self) -> EDIS_W { + EDIS_W::new(self, 3) } } #[doc = "Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ClcSpec; -impl crate::RegisterSpec for ClcSpec { +pub struct CLC_SPEC; +impl crate::RegisterSpec for CLC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`clc::R`](R) reader structure"] -impl crate::Readable for ClcSpec {} +impl crate::Readable for CLC_SPEC {} #[doc = "`write(|w| ..)` method takes [`clc::W`](W) writer structure"] -impl crate::Writable for ClcSpec { +impl crate::Writable for CLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CLC to value 0x03"] -impl crate::Resettable for ClcSpec { +impl crate::Resettable for CLC_SPEC { const RESET_VALUE: u32 = 0x03; } diff --git a/src/vadc/emuxsel.rs b/src/vadc/emuxsel.rs index 73de6b03..e2af79b2 100644 --- a/src/vadc/emuxsel.rs +++ b/src/vadc/emuxsel.rs @@ -1,55 +1,55 @@ #[doc = "Register `EMUXSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EMUXSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EMUXGRP0` reader - External Multiplexer Group for Interface x"] -pub type Emuxgrp0R = crate::FieldReader; +pub type EMUXGRP0_R = crate::FieldReader; #[doc = "Field `EMUXGRP0` writer - External Multiplexer Group for Interface x"] -pub type Emuxgrp0W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type EMUXGRP0_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `EMUXGRP1` reader - External Multiplexer Group for Interface x"] -pub type Emuxgrp1R = crate::FieldReader; +pub type EMUXGRP1_R = crate::FieldReader; #[doc = "Field `EMUXGRP1` writer - External Multiplexer Group for Interface x"] -pub type Emuxgrp1W<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type EMUXGRP1_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; impl R { #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"] #[inline(always)] - pub fn emuxgrp0(&self) -> Emuxgrp0R { - Emuxgrp0R::new((self.bits & 0x0f) as u8) + pub fn emuxgrp0(&self) -> EMUXGRP0_R { + EMUXGRP0_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"] #[inline(always)] - pub fn emuxgrp1(&self) -> Emuxgrp1R { - Emuxgrp1R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn emuxgrp1(&self) -> EMUXGRP1_R { + EMUXGRP1_R::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"] #[inline(always)] #[must_use] - pub fn emuxgrp0(&mut self) -> Emuxgrp0W { - Emuxgrp0W::new(self, 0) + pub fn emuxgrp0(&mut self) -> EMUXGRP0_W { + EMUXGRP0_W::new(self, 0) } #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"] #[inline(always)] #[must_use] - pub fn emuxgrp1(&mut self) -> Emuxgrp1W { - Emuxgrp1W::new(self, 4) + pub fn emuxgrp1(&mut self) -> EMUXGRP1_W { + EMUXGRP1_W::new(self, 4) } } #[doc = "External Multiplexer Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxsel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxsel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EmuxselSpec; -impl crate::RegisterSpec for EmuxselSpec { +pub struct EMUXSEL_SPEC; +impl crate::RegisterSpec for EMUXSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`emuxsel::R`](R) reader structure"] -impl crate::Readable for EmuxselSpec {} +impl crate::Readable for EMUXSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`emuxsel::W`](W) writer structure"] -impl crate::Writable for EmuxselSpec { +impl crate::Writable for EMUXSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EMUXSEL to value 0"] -impl crate::Resettable for EmuxselSpec { +impl crate::Resettable for EMUXSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globbound.rs b/src/vadc/globbound.rs index 898c0df5..556af797 100644 --- a/src/vadc/globbound.rs +++ b/src/vadc/globbound.rs @@ -1,55 +1,55 @@ #[doc = "Register `GLOBBOUND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBBOUND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOUNDARY0` reader - Boundary Value 0 for Limit Checking"] -pub type Boundary0R = crate::FieldReader; +pub type BOUNDARY0_R = crate::FieldReader; #[doc = "Field `BOUNDARY0` writer - Boundary Value 0 for Limit Checking"] -pub type Boundary0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BOUNDARY0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `BOUNDARY1` reader - Boundary Value 1 for Limit Checking"] -pub type Boundary1R = crate::FieldReader; +pub type BOUNDARY1_R = crate::FieldReader; #[doc = "Field `BOUNDARY1` writer - Boundary Value 1 for Limit Checking"] -pub type Boundary1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BOUNDARY1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - pub fn boundary0(&self) -> Boundary0R { - Boundary0R::new((self.bits & 0x0fff) as u16) + pub fn boundary0(&self) -> BOUNDARY0_R { + BOUNDARY0_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - pub fn boundary1(&self) -> Boundary1R { - Boundary1R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn boundary1(&self) -> BOUNDARY1_R { + BOUNDARY1_R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary0(&mut self) -> Boundary0W { - Boundary0W::new(self, 0) + pub fn boundary0(&mut self) -> BOUNDARY0_W { + BOUNDARY0_W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary1(&mut self) -> Boundary1W { - Boundary1W::new(self, 16) + pub fn boundary1(&mut self) -> BOUNDARY1_W { + BOUNDARY1_W::new(self, 16) } } #[doc = "Global Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globbound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globbound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobboundSpec; -impl crate::RegisterSpec for GlobboundSpec { +pub struct GLOBBOUND_SPEC; +impl crate::RegisterSpec for GLOBBOUND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globbound::R`](R) reader structure"] -impl crate::Readable for GlobboundSpec {} +impl crate::Readable for GLOBBOUND_SPEC {} #[doc = "`write(|w| ..)` method takes [`globbound::W`](W) writer structure"] -impl crate::Writable for GlobboundSpec { +impl crate::Writable for GLOBBOUND_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBBOUND to value 0"] -impl crate::Resettable for GlobboundSpec { +impl crate::Resettable for GLOBBOUND_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globcfg.rs b/src/vadc/globcfg.rs index 28f23075..2fcf9e07 100644 --- a/src/vadc/globcfg.rs +++ b/src/vadc/globcfg.rs @@ -1,68 +1,68 @@ #[doc = "Register `GLOBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Divider Factor for the Analog Internal Clock\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Diva { +pub enum DIVA_A { #[doc = "0: fADCI = fADC / 2"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fADCI = fADC / 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fADCI = fADC / 3"] - Value3 = 2, + VALUE3 = 2, #[doc = "31: fADCI = fADC / 32"] - Value4 = 31, + VALUE4 = 31, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Diva) -> Self { + fn from(variant: DIVA_A) -> Self { variant as _ } } -impl crate::FieldSpec for Diva { +impl crate::FieldSpec for DIVA_A { type Ux = u8; } -impl crate::IsEnum for Diva {} +impl crate::IsEnum for DIVA_A {} #[doc = "Field `DIVA` reader - Divider Factor for the Analog Internal Clock"] -pub type DivaR = crate::FieldReader; -impl DivaR { +pub type DIVA_R = crate::FieldReader; +impl DIVA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Diva::Value1), - 1 => Some(Diva::Value2), - 2 => Some(Diva::Value3), - 31 => Some(Diva::Value4), + 0 => Some(DIVA_A::VALUE1), + 1 => Some(DIVA_A::VALUE2), + 2 => Some(DIVA_A::VALUE3), + 31 => Some(DIVA_A::VALUE4), _ => None, } } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Diva::Value1 + *self == DIVA_A::VALUE1 } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Diva::Value2 + *self == DIVA_A::VALUE2 } #[doc = "fADCI = fADC / 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Diva::Value3 + *self == DIVA_A::VALUE3 } #[doc = "fADCI = fADC / 32"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Diva::Value4 + *self == DIVA_A::VALUE4 } } #[doc = "Field `DIVA` writer - Divider Factor for the Analog Internal Clock"] -pub type DivaW<'a, REG> = crate::FieldWriter<'a, REG, 5, Diva>; -impl<'a, REG> DivaW<'a, REG> +pub type DIVA_W<'a, REG> = crate::FieldWriter<'a, REG, 5, DIVA_A>; +impl<'a, REG> DIVA_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,138 +70,138 @@ where #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Diva::Value1) + self.variant(DIVA_A::VALUE1) } #[doc = "fADCI = fADC / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Diva::Value2) + self.variant(DIVA_A::VALUE2) } #[doc = "fADCI = fADC / 3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Diva::Value3) + self.variant(DIVA_A::VALUE3) } #[doc = "fADCI = fADC / 32"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Diva::Value4) + self.variant(DIVA_A::VALUE4) } } #[doc = "Double Clock for the MSB Conversion\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dcmsb { +pub enum DCMSB_A { #[doc = "0: 1 clock cycles for the MSB (standard)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 2 clock cycles for the MSB (fADCI > 20 MHz)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dcmsb) -> Self { + fn from(variant: DCMSB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DCMSB` reader - Double Clock for the MSB Conversion"] -pub type DcmsbR = crate::BitReader; -impl DcmsbR { +pub type DCMSB_R = crate::BitReader; +impl DCMSB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dcmsb { + pub const fn variant(&self) -> DCMSB_A { match self.bits { - false => Dcmsb::Value1, - true => Dcmsb::Value2, + false => DCMSB_A::VALUE1, + true => DCMSB_A::VALUE2, } } #[doc = "1 clock cycles for the MSB (standard)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dcmsb::Value1 + *self == DCMSB_A::VALUE1 } #[doc = "2 clock cycles for the MSB (fADCI > 20 MHz)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dcmsb::Value2 + *self == DCMSB_A::VALUE2 } } #[doc = "Field `DCMSB` writer - Double Clock for the MSB Conversion"] -pub type DcmsbW<'a, REG> = crate::BitWriter<'a, REG, Dcmsb>; -impl<'a, REG> DcmsbW<'a, REG> +pub type DCMSB_W<'a, REG> = crate::BitWriter<'a, REG, DCMSB_A>; +impl<'a, REG> DCMSB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "1 clock cycles for the MSB (standard)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dcmsb::Value1) + self.variant(DCMSB_A::VALUE1) } #[doc = "2 clock cycles for the MSB (fADCI > 20 MHz)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dcmsb::Value2) + self.variant(DCMSB_A::VALUE2) } } #[doc = "Divider Factor for the Arbiter Clock\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Divd { +pub enum DIVD_A { #[doc = "0: fADCD = fADC"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: fADCD = fADC / 2"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: fADCD = fADC / 3"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: fADCD = fADC / 4"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Divd) -> Self { + fn from(variant: DIVD_A) -> Self { variant as _ } } -impl crate::FieldSpec for Divd { +impl crate::FieldSpec for DIVD_A { type Ux = u8; } -impl crate::IsEnum for Divd {} +impl crate::IsEnum for DIVD_A {} #[doc = "Field `DIVD` reader - Divider Factor for the Arbiter Clock"] -pub type DivdR = crate::FieldReader; -impl DivdR { +pub type DIVD_R = crate::FieldReader; +impl DIVD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Divd { + pub const fn variant(&self) -> DIVD_A { match self.bits { - 0 => Divd::Value1, - 1 => Divd::Value2, - 2 => Divd::Value3, - 3 => Divd::Value4, + 0 => DIVD_A::VALUE1, + 1 => DIVD_A::VALUE2, + 2 => DIVD_A::VALUE3, + 3 => DIVD_A::VALUE4, _ => unreachable!(), } } #[doc = "fADCD = fADC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Divd::Value1 + *self == DIVD_A::VALUE1 } #[doc = "fADCD = fADC / 2"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Divd::Value2 + *self == DIVD_A::VALUE2 } #[doc = "fADCD = fADC / 3"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Divd::Value3 + *self == DIVD_A::VALUE3 } #[doc = "fADCD = fADC / 4"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Divd::Value4 + *self == DIVD_A::VALUE4 } } #[doc = "Field `DIVD` writer - Divider Factor for the Arbiter Clock"] -pub type DivdW<'a, REG> = crate::FieldWriter<'a, REG, 2, Divd, crate::Safe>; -impl<'a, REG> DivdW<'a, REG> +pub type DIVD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DIVD_A, crate::Safe>; +impl<'a, REG> DIVD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -209,405 +209,405 @@ where #[doc = "fADCD = fADC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Divd::Value1) + self.variant(DIVD_A::VALUE1) } #[doc = "fADCD = fADC / 2"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Divd::Value2) + self.variant(DIVD_A::VALUE2) } #[doc = "fADCD = fADC / 3"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Divd::Value3) + self.variant(DIVD_A::VALUE3) } #[doc = "fADCD = fADC / 4"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Divd::Value4) + self.variant(DIVD_A::VALUE4) } } #[doc = "Write Control for Divider Parameters\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Divwc { +pub enum DIVWC_A { #[doc = "0: No write access to divider parameters"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields DIVA, DCMSB, DIVD can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Divwc) -> Self { + fn from(variant: DIVWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DIVWC` writer - Write Control for Divider Parameters"] -pub type DivwcW<'a, REG> = crate::BitWriter<'a, REG, Divwc>; -impl<'a, REG> DivwcW<'a, REG> +pub type DIVWC_W<'a, REG> = crate::BitWriter<'a, REG, DIVWC_A>; +impl<'a, REG> DIVWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to divider parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Divwc::Value1) + self.variant(DIVWC_A::VALUE1) } #[doc = "Bitfields DIVA, DCMSB, DIVD can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Divwc::Value2) + self.variant(DIVWC_A::VALUE2) } } #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpcal0 { +pub enum DPCAL0_A { #[doc = "0: Automatic post-calibration after each conversion of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No post-calibration"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpcal0) -> Self { + fn from(variant: DPCAL0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPCAL0` reader - Disable Post-Calibration"] -pub type Dpcal0R = crate::BitReader; -impl Dpcal0R { +pub type DPCAL0_R = crate::BitReader; +impl DPCAL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpcal0 { + pub const fn variant(&self) -> DPCAL0_A { match self.bits { - false => Dpcal0::Value1, - true => Dpcal0::Value2, + false => DPCAL0_A::VALUE1, + true => DPCAL0_A::VALUE2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpcal0::Value1 + *self == DPCAL0_A::VALUE1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpcal0::Value2 + *self == DPCAL0_A::VALUE2 } } #[doc = "Field `DPCAL0` writer - Disable Post-Calibration"] -pub type Dpcal0W<'a, REG> = crate::BitWriter<'a, REG, Dpcal0>; -impl<'a, REG> Dpcal0W<'a, REG> +pub type DPCAL0_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL0_A>; +impl<'a, REG> DPCAL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpcal0::Value1) + self.variant(DPCAL0_A::VALUE1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpcal0::Value2) + self.variant(DPCAL0_A::VALUE2) } } #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpcal1 { +pub enum DPCAL1_A { #[doc = "0: Automatic post-calibration after each conversion of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No post-calibration"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpcal1) -> Self { + fn from(variant: DPCAL1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPCAL1` reader - Disable Post-Calibration"] -pub type Dpcal1R = crate::BitReader; -impl Dpcal1R { +pub type DPCAL1_R = crate::BitReader; +impl DPCAL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpcal1 { + pub const fn variant(&self) -> DPCAL1_A { match self.bits { - false => Dpcal1::Value1, - true => Dpcal1::Value2, + false => DPCAL1_A::VALUE1, + true => DPCAL1_A::VALUE2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpcal1::Value1 + *self == DPCAL1_A::VALUE1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpcal1::Value2 + *self == DPCAL1_A::VALUE2 } } #[doc = "Field `DPCAL1` writer - Disable Post-Calibration"] -pub type Dpcal1W<'a, REG> = crate::BitWriter<'a, REG, Dpcal1>; -impl<'a, REG> Dpcal1W<'a, REG> +pub type DPCAL1_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL1_A>; +impl<'a, REG> DPCAL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpcal1::Value1) + self.variant(DPCAL1_A::VALUE1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpcal1::Value2) + self.variant(DPCAL1_A::VALUE2) } } #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpcal2 { +pub enum DPCAL2_A { #[doc = "0: Automatic post-calibration after each conversion of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No post-calibration"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpcal2) -> Self { + fn from(variant: DPCAL2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPCAL2` reader - Disable Post-Calibration"] -pub type Dpcal2R = crate::BitReader; -impl Dpcal2R { +pub type DPCAL2_R = crate::BitReader; +impl DPCAL2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpcal2 { + pub const fn variant(&self) -> DPCAL2_A { match self.bits { - false => Dpcal2::Value1, - true => Dpcal2::Value2, + false => DPCAL2_A::VALUE1, + true => DPCAL2_A::VALUE2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpcal2::Value1 + *self == DPCAL2_A::VALUE1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpcal2::Value2 + *self == DPCAL2_A::VALUE2 } } #[doc = "Field `DPCAL2` writer - Disable Post-Calibration"] -pub type Dpcal2W<'a, REG> = crate::BitWriter<'a, REG, Dpcal2>; -impl<'a, REG> Dpcal2W<'a, REG> +pub type DPCAL2_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL2_A>; +impl<'a, REG> DPCAL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpcal2::Value1) + self.variant(DPCAL2_A::VALUE1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpcal2::Value2) + self.variant(DPCAL2_A::VALUE2) } } #[doc = "Disable Post-Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Dpcal3 { +pub enum DPCAL3_A { #[doc = "0: Automatic post-calibration after each conversion of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No post-calibration"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Dpcal3) -> Self { + fn from(variant: DPCAL3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `DPCAL3` reader - Disable Post-Calibration"] -pub type Dpcal3R = crate::BitReader; -impl Dpcal3R { +pub type DPCAL3_R = crate::BitReader; +impl DPCAL3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Dpcal3 { + pub const fn variant(&self) -> DPCAL3_A { match self.bits { - false => Dpcal3::Value1, - true => Dpcal3::Value2, + false => DPCAL3_A::VALUE1, + true => DPCAL3_A::VALUE2, } } #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dpcal3::Value1 + *self == DPCAL3_A::VALUE1 } #[doc = "No post-calibration"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dpcal3::Value2 + *self == DPCAL3_A::VALUE2 } } #[doc = "Field `DPCAL3` writer - Disable Post-Calibration"] -pub type Dpcal3W<'a, REG> = crate::BitWriter<'a, REG, Dpcal3>; -impl<'a, REG> Dpcal3W<'a, REG> +pub type DPCAL3_W<'a, REG> = crate::BitWriter<'a, REG, DPCAL3_A>; +impl<'a, REG> DPCAL3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Automatic post-calibration after each conversion of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dpcal3::Value1) + self.variant(DPCAL3_A::VALUE1) } #[doc = "No post-calibration"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dpcal3::Value2) + self.variant(DPCAL3_A::VALUE2) } } #[doc = "Start-Up Calibration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sucal { +pub enum SUCAL_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sucal) -> Self { + fn from(variant: SUCAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SUCAL` writer - Start-Up Calibration"] -pub type SucalW<'a, REG> = crate::BitWriter<'a, REG, Sucal>; -impl<'a, REG> SucalW<'a, REG> +pub type SUCAL_W<'a, REG> = crate::BitWriter<'a, REG, SUCAL_A>; +impl<'a, REG> SUCAL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sucal::Value1) + self.variant(SUCAL_A::VALUE1) } #[doc = "Initiate the start-up calibration phase (indication in bit GxARBCFG.CAL)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sucal::Value2) + self.variant(SUCAL_A::VALUE2) } } impl R { #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"] #[inline(always)] - pub fn diva(&self) -> DivaR { - DivaR::new((self.bits & 0x1f) as u8) + pub fn diva(&self) -> DIVA_R { + DIVA_R::new((self.bits & 0x1f) as u8) } #[doc = "Bit 7 - Double Clock for the MSB Conversion"] #[inline(always)] - pub fn dcmsb(&self) -> DcmsbR { - DcmsbR::new(((self.bits >> 7) & 1) != 0) + pub fn dcmsb(&self) -> DCMSB_R { + DCMSB_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"] #[inline(always)] - pub fn divd(&self) -> DivdR { - DivdR::new(((self.bits >> 8) & 3) as u8) + pub fn divd(&self) -> DIVD_R { + DIVD_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 16 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal0(&self) -> Dpcal0R { - Dpcal0R::new(((self.bits >> 16) & 1) != 0) + pub fn dpcal0(&self) -> DPCAL0_R { + DPCAL0_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal1(&self) -> Dpcal1R { - Dpcal1R::new(((self.bits >> 17) & 1) != 0) + pub fn dpcal1(&self) -> DPCAL1_R { + DPCAL1_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal2(&self) -> Dpcal2R { - Dpcal2R::new(((self.bits >> 18) & 1) != 0) + pub fn dpcal2(&self) -> DPCAL2_R { + DPCAL2_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Disable Post-Calibration"] #[inline(always)] - pub fn dpcal3(&self) -> Dpcal3R { - Dpcal3R::new(((self.bits >> 19) & 1) != 0) + pub fn dpcal3(&self) -> DPCAL3_R { + DPCAL3_R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"] #[inline(always)] #[must_use] - pub fn diva(&mut self) -> DivaW { - DivaW::new(self, 0) + pub fn diva(&mut self) -> DIVA_W { + DIVA_W::new(self, 0) } #[doc = "Bit 7 - Double Clock for the MSB Conversion"] #[inline(always)] #[must_use] - pub fn dcmsb(&mut self) -> DcmsbW { - DcmsbW::new(self, 7) + pub fn dcmsb(&mut self) -> DCMSB_W { + DCMSB_W::new(self, 7) } #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"] #[inline(always)] #[must_use] - pub fn divd(&mut self) -> DivdW { - DivdW::new(self, 8) + pub fn divd(&mut self) -> DIVD_W { + DIVD_W::new(self, 8) } #[doc = "Bit 15 - Write Control for Divider Parameters"] #[inline(always)] #[must_use] - pub fn divwc(&mut self) -> DivwcW { - DivwcW::new(self, 15) + pub fn divwc(&mut self) -> DIVWC_W { + DIVWC_W::new(self, 15) } #[doc = "Bit 16 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal0(&mut self) -> Dpcal0W { - Dpcal0W::new(self, 16) + pub fn dpcal0(&mut self) -> DPCAL0_W { + DPCAL0_W::new(self, 16) } #[doc = "Bit 17 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal1(&mut self) -> Dpcal1W { - Dpcal1W::new(self, 17) + pub fn dpcal1(&mut self) -> DPCAL1_W { + DPCAL1_W::new(self, 17) } #[doc = "Bit 18 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal2(&mut self) -> Dpcal2W { - Dpcal2W::new(self, 18) + pub fn dpcal2(&mut self) -> DPCAL2_W { + DPCAL2_W::new(self, 18) } #[doc = "Bit 19 - Disable Post-Calibration"] #[inline(always)] #[must_use] - pub fn dpcal3(&mut self) -> Dpcal3W { - Dpcal3W::new(self, 19) + pub fn dpcal3(&mut self) -> DPCAL3_W { + DPCAL3_W::new(self, 19) } #[doc = "Bit 31 - Start-Up Calibration"] #[inline(always)] #[must_use] - pub fn sucal(&mut self) -> SucalW { - SucalW::new(self, 31) + pub fn sucal(&mut self) -> SUCAL_W { + SUCAL_W::new(self, 31) } } #[doc = "Global Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobcfgSpec; -impl crate::RegisterSpec for GlobcfgSpec { +pub struct GLOBCFG_SPEC; +impl crate::RegisterSpec for GLOBCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globcfg::R`](R) reader structure"] -impl crate::Readable for GlobcfgSpec {} +impl crate::Readable for GLOBCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`globcfg::W`](W) writer structure"] -impl crate::Writable for GlobcfgSpec { +impl crate::Writable for GLOBCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBCFG to value 0x0f"] -impl crate::Resettable for GlobcfgSpec { +impl crate::Resettable for GLOBCFG_SPEC { const RESET_VALUE: u32 = 0x0f; } diff --git a/src/vadc/globeflag.rs b/src/vadc/globeflag.rs index ef26f355..77ceb10a 100644 --- a/src/vadc/globeflag.rs +++ b/src/vadc/globeflag.rs @@ -1,227 +1,227 @@ #[doc = "Register `GLOBEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBEFLAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source Event (Background)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sevglb { +pub enum SEVGLB_A { #[doc = "0: No source event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A source event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sevglb) -> Self { + fn from(variant: SEVGLB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEVGLB` reader - Source Event (Background)"] -pub type SevglbR = crate::BitReader; -impl SevglbR { +pub type SEVGLB_R = crate::BitReader; +impl SEVGLB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sevglb { + pub const fn variant(&self) -> SEVGLB_A { match self.bits { - false => Sevglb::Value1, - true => Sevglb::Value2, + false => SEVGLB_A::VALUE1, + true => SEVGLB_A::VALUE2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sevglb::Value1 + *self == SEVGLB_A::VALUE1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sevglb::Value2 + *self == SEVGLB_A::VALUE2 } } #[doc = "Field `SEVGLB` writer - Source Event (Background)"] -pub type SevglbW<'a, REG> = crate::BitWriter<'a, REG, Sevglb>; -impl<'a, REG> SevglbW<'a, REG> +pub type SEVGLB_W<'a, REG> = crate::BitWriter<'a, REG, SEVGLB_A>; +impl<'a, REG> SEVGLB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sevglb::Value1) + self.variant(SEVGLB_A::VALUE1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sevglb::Value2) + self.variant(SEVGLB_A::VALUE2) } } #[doc = "Global Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Revglb { +pub enum REVGLB_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GLOBRES"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Revglb) -> Self { + fn from(variant: REVGLB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REVGLB` reader - Global Result Event"] -pub type RevglbR = crate::BitReader; -impl RevglbR { +pub type REVGLB_R = crate::BitReader; +impl REVGLB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Revglb { + pub const fn variant(&self) -> REVGLB_A { match self.bits { - false => Revglb::Value1, - true => Revglb::Value2, + false => REVGLB_A::VALUE1, + true => REVGLB_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Revglb::Value1 + *self == REVGLB_A::VALUE1 } #[doc = "New result was stored in register GLOBRES"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Revglb::Value2 + *self == REVGLB_A::VALUE2 } } #[doc = "Field `REVGLB` writer - Global Result Event"] -pub type RevglbW<'a, REG> = crate::BitWriter<'a, REG, Revglb>; -impl<'a, REG> RevglbW<'a, REG> +pub type REVGLB_W<'a, REG> = crate::BitWriter<'a, REG, REVGLB_A>; +impl<'a, REG> REVGLB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Revglb::Value1) + self.variant(REVGLB_A::VALUE1) } #[doc = "New result was stored in register GLOBRES"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Revglb::Value2) + self.variant(REVGLB_A::VALUE2) } } #[doc = "Clear Source Event (Background)\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sevglbclr { +pub enum SEVGLBCLR_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the source event flag SEVGLB"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sevglbclr) -> Self { + fn from(variant: SEVGLBCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEVGLBCLR` writer - Clear Source Event (Background)"] -pub type SevglbclrW<'a, REG> = crate::BitWriter<'a, REG, Sevglbclr>; -impl<'a, REG> SevglbclrW<'a, REG> +pub type SEVGLBCLR_W<'a, REG> = crate::BitWriter<'a, REG, SEVGLBCLR_A>; +impl<'a, REG> SEVGLBCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sevglbclr::Value1) + self.variant(SEVGLBCLR_A::VALUE1) } #[doc = "Clear the source event flag SEVGLB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sevglbclr::Value2) + self.variant(SEVGLBCLR_A::VALUE2) } } #[doc = "Clear Global Result Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Revglbclr { +pub enum REVGLBCLR_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag REVGLB"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Revglbclr) -> Self { + fn from(variant: REVGLBCLR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REVGLBCLR` writer - Clear Global Result Event"] -pub type RevglbclrW<'a, REG> = crate::BitWriter<'a, REG, Revglbclr>; -impl<'a, REG> RevglbclrW<'a, REG> +pub type REVGLBCLR_W<'a, REG> = crate::BitWriter<'a, REG, REVGLBCLR_A>; +impl<'a, REG> REVGLBCLR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Revglbclr::Value1) + self.variant(REVGLBCLR_A::VALUE1) } #[doc = "Clear the result event flag REVGLB"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Revglbclr::Value2) + self.variant(REVGLBCLR_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source Event (Background)"] #[inline(always)] - pub fn sevglb(&self) -> SevglbR { - SevglbR::new((self.bits & 1) != 0) + pub fn sevglb(&self) -> SEVGLB_R { + SEVGLB_R::new((self.bits & 1) != 0) } #[doc = "Bit 8 - Global Result Event"] #[inline(always)] - pub fn revglb(&self) -> RevglbR { - RevglbR::new(((self.bits >> 8) & 1) != 0) + pub fn revglb(&self) -> REVGLB_R { + REVGLB_R::new(((self.bits >> 8) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source Event (Background)"] #[inline(always)] #[must_use] - pub fn sevglb(&mut self) -> SevglbW { - SevglbW::new(self, 0) + pub fn sevglb(&mut self) -> SEVGLB_W { + SEVGLB_W::new(self, 0) } #[doc = "Bit 8 - Global Result Event"] #[inline(always)] #[must_use] - pub fn revglb(&mut self) -> RevglbW { - RevglbW::new(self, 8) + pub fn revglb(&mut self) -> REVGLB_W { + REVGLB_W::new(self, 8) } #[doc = "Bit 16 - Clear Source Event (Background)"] #[inline(always)] #[must_use] - pub fn sevglbclr(&mut self) -> SevglbclrW { - SevglbclrW::new(self, 16) + pub fn sevglbclr(&mut self) -> SEVGLBCLR_W { + SEVGLBCLR_W::new(self, 16) } #[doc = "Bit 24 - Clear Global Result Event"] #[inline(always)] #[must_use] - pub fn revglbclr(&mut self) -> RevglbclrW { - RevglbclrW::new(self, 24) + pub fn revglbclr(&mut self) -> REVGLBCLR_W { + REVGLBCLR_W::new(self, 24) } } #[doc = "Global Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globeflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globeflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobeflagSpec; -impl crate::RegisterSpec for GlobeflagSpec { +pub struct GLOBEFLAG_SPEC; +impl crate::RegisterSpec for GLOBEFLAG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globeflag::R`](R) reader structure"] -impl crate::Readable for GlobeflagSpec {} +impl crate::Readable for GLOBEFLAG_SPEC {} #[doc = "`write(|w| ..)` method takes [`globeflag::W`](W) writer structure"] -impl crate::Writable for GlobeflagSpec { +impl crate::Writable for GLOBEFLAG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBEFLAG to value 0"] -impl crate::Resettable for GlobeflagSpec { +impl crate::Resettable for GLOBEFLAG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globevnp.rs b/src/vadc/globevnp.rs index 14871b0b..1901fec0 100644 --- a/src/vadc/globevnp.rs +++ b/src/vadc/globevnp.rs @@ -1,68 +1,68 @@ #[doc = "Register `GLOBEVNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBEVNP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Service Request Node Pointer Backgr. Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sev0np { +pub enum SEV0NP_A { #[doc = "0: Select shared service request line 0 of common service request group 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select shared service request line 3 of common service request group 0"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0 of common service request group 1"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3 of common service request group 1"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sev0np) -> Self { + fn from(variant: SEV0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sev0np { +impl crate::FieldSpec for SEV0NP_A { type Ux = u8; } -impl crate::IsEnum for Sev0np {} +impl crate::IsEnum for SEV0NP_A {} #[doc = "Field `SEV0NP` reader - Service Request Node Pointer Backgr. Source"] -pub type Sev0npR = crate::FieldReader; -impl Sev0npR { +pub type SEV0NP_R = crate::FieldReader; +impl SEV0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sev0np::Value1), - 3 => Some(Sev0np::Value2), - 4 => Some(Sev0np::Value3), - 7 => Some(Sev0np::Value4), + 0 => Some(SEV0NP_A::VALUE1), + 3 => Some(SEV0NP_A::VALUE2), + 4 => Some(SEV0NP_A::VALUE3), + 7 => Some(SEV0NP_A::VALUE4), _ => None, } } #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sev0np::Value1 + *self == SEV0NP_A::VALUE1 } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sev0np::Value2 + *self == SEV0NP_A::VALUE2 } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sev0np::Value3 + *self == SEV0NP_A::VALUE3 } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sev0np::Value4 + *self == SEV0NP_A::VALUE4 } } #[doc = "Field `SEV0NP` writer - Service Request Node Pointer Backgr. Source"] -pub type Sev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev0np>; -impl<'a, REG> Sev0npW<'a, REG> +pub type SEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV0NP_A>; +impl<'a, REG> SEV0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev0np::Value1) + self.variant(SEV0NP_A::VALUE1) } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev0np::Value2) + self.variant(SEV0NP_A::VALUE2) } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sev0np::Value3) + self.variant(SEV0NP_A::VALUE3) } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Sev0np::Value4) + self.variant(SEV0NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Backgr. Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev0np { +pub enum REV0NP_A { #[doc = "0: Select shared service request line 0 of common service request group 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select shared service request line 3 of common service request group 0"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0 of common service request group 1"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3 of common service request group 1"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev0np) -> Self { + fn from(variant: REV0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev0np { +impl crate::FieldSpec for REV0NP_A { type Ux = u8; } -impl crate::IsEnum for Rev0np {} +impl crate::IsEnum for REV0NP_A {} #[doc = "Field `REV0NP` reader - Service Request Node Pointer Backgr. Result"] -pub type Rev0npR = crate::FieldReader; -impl Rev0npR { +pub type REV0NP_R = crate::FieldReader; +impl REV0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev0np::Value1), - 3 => Some(Rev0np::Value2), - 4 => Some(Rev0np::Value3), - 7 => Some(Rev0np::Value4), + 0 => Some(REV0NP_A::VALUE1), + 3 => Some(REV0NP_A::VALUE2), + 4 => Some(REV0NP_A::VALUE3), + 7 => Some(REV0NP_A::VALUE4), _ => None, } } #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev0np::Value1 + *self == REV0NP_A::VALUE1 } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev0np::Value2 + *self == REV0NP_A::VALUE2 } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev0np::Value3 + *self == REV0NP_A::VALUE3 } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev0np::Value4 + *self == REV0NP_A::VALUE4 } } #[doc = "Field `REV0NP` writer - Service Request Node Pointer Backgr. Result"] -pub type Rev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev0np>; -impl<'a, REG> Rev0npW<'a, REG> +pub type REV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV0NP_A>; +impl<'a, REG> REV0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,64 +156,64 @@ where #[doc = "Select shared service request line 0 of common service request group 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev0np::Value1) + self.variant(REV0NP_A::VALUE1) } #[doc = "Select shared service request line 3 of common service request group 0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev0np::Value2) + self.variant(REV0NP_A::VALUE2) } #[doc = "Select shared service request line 0 of common service request group 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev0np::Value3) + self.variant(REV0NP_A::VALUE3) } #[doc = "Select shared service request line 3 of common service request group 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev0np::Value4) + self.variant(REV0NP_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"] #[inline(always)] - pub fn sev0np(&self) -> Sev0npR { - Sev0npR::new((self.bits & 0x0f) as u8) + pub fn sev0np(&self) -> SEV0NP_R { + SEV0NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"] #[inline(always)] - pub fn rev0np(&self) -> Rev0npR { - Rev0npR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev0np(&self) -> REV0NP_R { + REV0NP_R::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"] #[inline(always)] #[must_use] - pub fn sev0np(&mut self) -> Sev0npW { - Sev0npW::new(self, 0) + pub fn sev0np(&mut self) -> SEV0NP_W { + SEV0NP_W::new(self, 0) } #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"] #[inline(always)] #[must_use] - pub fn rev0np(&mut self) -> Rev0npW { - Rev0npW::new(self, 16) + pub fn rev0np(&mut self) -> REV0NP_W { + REV0NP_W::new(self, 16) } } #[doc = "Global Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobevnpSpec; -impl crate::RegisterSpec for GlobevnpSpec { +pub struct GLOBEVNP_SPEC; +impl crate::RegisterSpec for GLOBEVNP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globevnp::R`](R) reader structure"] -impl crate::Readable for GlobevnpSpec {} +impl crate::Readable for GLOBEVNP_SPEC {} #[doc = "`write(|w| ..)` method takes [`globevnp::W`](W) writer structure"] -impl crate::Writable for GlobevnpSpec { +impl crate::Writable for GLOBEVNP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBEVNP to value 0"] -impl crate::Resettable for GlobevnpSpec { +impl crate::Resettable for GLOBEVNP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globiclass.rs b/src/vadc/globiclass.rs index aefb19b7..0868983c 100644 --- a/src/vadc/globiclass.rs +++ b/src/vadc/globiclass.rs @@ -1,72 +1,72 @@ #[doc = "Register `GLOBICLASS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBICLASS[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STCS` reader - Sample Time Control for Standard Conversions"] -pub type StcsR = crate::FieldReader; +pub type STCS_R = crate::FieldReader; #[doc = "Field `STCS` writer - Sample Time Control for Standard Conversions"] -pub type StcsW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type STCS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for Standard Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cms { +pub enum CMS_A { #[doc = "0: 12-bit conversion"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 10-bit conversion"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 8-bit conversion"] - Value3 = 2, + VALUE3 = 2, #[doc = "5: 10-bit fast compare mode"] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cms) -> Self { + fn from(variant: CMS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cms { +impl crate::FieldSpec for CMS_A { type Ux = u8; } -impl crate::IsEnum for Cms {} +impl crate::IsEnum for CMS_A {} #[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] -pub type CmsR = crate::FieldReader; -impl CmsR { +pub type CMS_R = crate::FieldReader; +impl CMS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cms::Value1), - 1 => Some(Cms::Value2), - 2 => Some(Cms::Value3), - 5 => Some(Cms::Value6), + 0 => Some(CMS_A::VALUE1), + 1 => Some(CMS_A::VALUE2), + 2 => Some(CMS_A::VALUE3), + 5 => Some(CMS_A::VALUE6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cms::Value1 + *self == CMS_A::VALUE1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cms::Value2 + *self == CMS_A::VALUE2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cms::Value3 + *self == CMS_A::VALUE3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Cms::Value6 + *self == CMS_A::VALUE6 } } #[doc = "Field `CMS` writer - Conversion Mode for Standard Conversions"] -pub type CmsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cms>; -impl<'a, REG> CmsW<'a, REG> +pub type CMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMS_A>; +impl<'a, REG> CMS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,89 +74,89 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cms::Value1) + self.variant(CMS_A::VALUE1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cms::Value2) + self.variant(CMS_A::VALUE2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cms::Value3) + self.variant(CMS_A::VALUE3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Cms::Value6) + self.variant(CMS_A::VALUE6) } } #[doc = "Field `STCE` reader - Sample Time Control for EMUX Conversions"] -pub type StceR = crate::FieldReader; +pub type STCE_R = crate::FieldReader; #[doc = "Field `STCE` writer - Sample Time Control for EMUX Conversions"] -pub type StceW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type STCE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for EMUX Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cme { +pub enum CME_A { #[doc = "0: 12-bit conversion"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 10-bit conversion"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 8-bit conversion"] - Value3 = 2, + VALUE3 = 2, #[doc = "5: 10-bit fast compare mode"] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cme) -> Self { + fn from(variant: CME_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cme { +impl crate::FieldSpec for CME_A { type Ux = u8; } -impl crate::IsEnum for Cme {} +impl crate::IsEnum for CME_A {} #[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] -pub type CmeR = crate::FieldReader; -impl CmeR { +pub type CME_R = crate::FieldReader; +impl CME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cme::Value1), - 1 => Some(Cme::Value2), - 2 => Some(Cme::Value3), - 5 => Some(Cme::Value6), + 0 => Some(CME_A::VALUE1), + 1 => Some(CME_A::VALUE2), + 2 => Some(CME_A::VALUE3), + 5 => Some(CME_A::VALUE6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cme::Value1 + *self == CME_A::VALUE1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cme::Value2 + *self == CME_A::VALUE2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cme::Value3 + *self == CME_A::VALUE3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Cme::Value6 + *self == CME_A::VALUE6 } } #[doc = "Field `CME` writer - Conversion Mode for EMUX Conversions"] -pub type CmeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cme>; -impl<'a, REG> CmeW<'a, REG> +pub type CME_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CME_A>; +impl<'a, REG> CME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -164,87 +164,87 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cme::Value1) + self.variant(CME_A::VALUE1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cme::Value2) + self.variant(CME_A::VALUE2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cme::Value3) + self.variant(CME_A::VALUE3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Cme::Value6) + self.variant(CME_A::VALUE6) } } impl R { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - pub fn stcs(&self) -> StcsR { - StcsR::new((self.bits & 0x1f) as u8) + pub fn stcs(&self) -> STCS_R { + STCS_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - pub fn cms(&self) -> CmsR { - CmsR::new(((self.bits >> 8) & 7) as u8) + pub fn cms(&self) -> CMS_R { + CMS_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - pub fn stce(&self) -> StceR { - StceR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn stce(&self) -> STCE_R { + STCE_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - pub fn cme(&self) -> CmeR { - CmeR::new(((self.bits >> 24) & 7) as u8) + pub fn cme(&self) -> CME_R { + CME_R::new(((self.bits >> 24) & 7) as u8) } } impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] #[must_use] - pub fn stcs(&mut self) -> StcsW { - StcsW::new(self, 0) + pub fn stcs(&mut self) -> STCS_W { + STCS_W::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] #[must_use] - pub fn cms(&mut self) -> CmsW { - CmsW::new(self, 8) + pub fn cms(&mut self) -> CMS_W { + CMS_W::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn stce(&mut self) -> StceW { - StceW::new(self, 16) + pub fn stce(&mut self) -> STCE_W { + STCE_W::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn cme(&mut self) -> CmeW { - CmeW::new(self, 24) + pub fn cme(&mut self) -> CME_W { + CME_W::new(self, 24) } } #[doc = "Input Class Register, Global\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globiclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globiclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobiclassSpec; -impl crate::RegisterSpec for GlobiclassSpec { +pub struct GLOBICLASS_SPEC; +impl crate::RegisterSpec for GLOBICLASS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globiclass::R`](R) reader structure"] -impl crate::Readable for GlobiclassSpec {} +impl crate::Readable for GLOBICLASS_SPEC {} #[doc = "`write(|w| ..)` method takes [`globiclass::W`](W) writer structure"] -impl crate::Writable for GlobiclassSpec { +impl crate::Writable for GLOBICLASS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBICLASS[%s] to value 0"] -impl crate::Resettable for GlobiclassSpec { +impl crate::Resettable for GLOBICLASS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globrcr.rs b/src/vadc/globrcr.rs index 57bd0bf3..ce6238b4 100644 --- a/src/vadc/globrcr.rs +++ b/src/vadc/globrcr.rs @@ -1,44 +1,44 @@ #[doc = "Register `GLOBRCR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRCR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Data Reduction Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Drctr { +pub enum DRCTR_A { #[doc = "0: Data reduction disabled"] - Value1 = 0, + VALUE1 = 0, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Drctr) -> Self { + fn from(variant: DRCTR_A) -> Self { variant as _ } } -impl crate::FieldSpec for Drctr { +impl crate::FieldSpec for DRCTR_A { type Ux = u8; } -impl crate::IsEnum for Drctr {} +impl crate::IsEnum for DRCTR_A {} #[doc = "Field `DRCTR` reader - Data Reduction Control"] -pub type DrctrR = crate::FieldReader; -impl DrctrR { +pub type DRCTR_R = crate::FieldReader; +impl DRCTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Drctr::Value1), + 0 => Some(DRCTR_A::VALUE1), _ => None, } } #[doc = "Data reduction disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Drctr::Value1 + *self == DRCTR_A::VALUE1 } } #[doc = "Field `DRCTR` writer - Data Reduction Control"] -pub type DrctrW<'a, REG> = crate::FieldWriter<'a, REG, 4, Drctr>; -impl<'a, REG> DrctrW<'a, REG> +pub type DRCTR_W<'a, REG> = crate::FieldWriter<'a, REG, 4, DRCTR_A>; +impl<'a, REG> DRCTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -46,166 +46,166 @@ where #[doc = "Data reduction disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Drctr::Value1) + self.variant(DRCTR_A::VALUE1) } } #[doc = "Wait-for-Read Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wfr { +pub enum WFR_A { #[doc = "0: Overwrite mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wait-for-read mode enabled for this register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wfr) -> Self { + fn from(variant: WFR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] -pub type WfrR = crate::BitReader; -impl WfrR { +pub type WFR_R = crate::BitReader; +impl WFR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wfr { + pub const fn variant(&self) -> WFR_A { match self.bits { - false => Wfr::Value1, - true => Wfr::Value2, + false => WFR_A::VALUE1, + true => WFR_A::VALUE2, } } #[doc = "Overwrite mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wfr::Value1 + *self == WFR_A::VALUE1 } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wfr::Value2 + *self == WFR_A::VALUE2 } } #[doc = "Field `WFR` writer - Wait-for-Read Mode Enable"] -pub type WfrW<'a, REG> = crate::BitWriter<'a, REG, Wfr>; -impl<'a, REG> WfrW<'a, REG> +pub type WFR_W<'a, REG> = crate::BitWriter<'a, REG, WFR_A>; +impl<'a, REG> WFR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wfr::Value1) + self.variant(WFR_A::VALUE1) } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wfr::Value2) + self.variant(WFR_A::VALUE2) } } #[doc = "Service Request Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srgen { +pub enum SRGEN_A { #[doc = "0: No service request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Service request after a result event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srgen) -> Self { + fn from(variant: SRGEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRGEN` reader - Service Request Generation Enable"] -pub type SrgenR = crate::BitReader; -impl SrgenR { +pub type SRGEN_R = crate::BitReader; +impl SRGEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srgen { + pub const fn variant(&self) -> SRGEN_A { match self.bits { - false => Srgen::Value1, - true => Srgen::Value2, + false => SRGEN_A::VALUE1, + true => SRGEN_A::VALUE2, } } #[doc = "No service request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srgen::Value1 + *self == SRGEN_A::VALUE1 } #[doc = "Service request after a result event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srgen::Value2 + *self == SRGEN_A::VALUE2 } } #[doc = "Field `SRGEN` writer - Service Request Generation Enable"] -pub type SrgenW<'a, REG> = crate::BitWriter<'a, REG, Srgen>; -impl<'a, REG> SrgenW<'a, REG> +pub type SRGEN_W<'a, REG> = crate::BitWriter<'a, REG, SRGEN_A>; +impl<'a, REG> SRGEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No service request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srgen::Value1) + self.variant(SRGEN_A::VALUE1) } #[doc = "Service request after a result event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srgen::Value2) + self.variant(SRGEN_A::VALUE2) } } impl R { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - pub fn drctr(&self) -> DrctrR { - DrctrR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drctr(&self) -> DRCTR_R { + DRCTR_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - pub fn wfr(&self) -> WfrR { - WfrR::new(((self.bits >> 24) & 1) != 0) + pub fn wfr(&self) -> WFR_R { + WFR_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - pub fn srgen(&self) -> SrgenR { - SrgenR::new(((self.bits >> 31) & 1) != 0) + pub fn srgen(&self) -> SRGEN_R { + SRGEN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] #[must_use] - pub fn drctr(&mut self) -> DrctrW { - DrctrW::new(self, 16) + pub fn drctr(&mut self) -> DRCTR_W { + DRCTR_W::new(self, 16) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] #[must_use] - pub fn wfr(&mut self) -> WfrW { - WfrW::new(self, 24) + pub fn wfr(&mut self) -> WFR_W { + WFR_W::new(self, 24) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] #[must_use] - pub fn srgen(&mut self) -> SrgenW { - SrgenW::new(self, 31) + pub fn srgen(&mut self) -> SRGEN_W { + SRGEN_W::new(self, 31) } } #[doc = "Global Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globrcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globrcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobrcrSpec; -impl crate::RegisterSpec for GlobrcrSpec { +pub struct GLOBRCR_SPEC; +impl crate::RegisterSpec for GLOBRCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globrcr::R`](R) reader structure"] -impl crate::Readable for GlobrcrSpec {} +impl crate::Readable for GLOBRCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`globrcr::W`](W) writer structure"] -impl crate::Writable for GlobrcrSpec { +impl crate::Writable for GLOBRCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRCR to value 0"] -impl crate::Resettable for GlobrcrSpec { +impl crate::Resettable for GLOBRCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globres.rs b/src/vadc/globres.rs index 0df168ac..31a59afb 100644 --- a/src/vadc/globres.rs +++ b/src/vadc/globres.rs @@ -1,173 +1,173 @@ #[doc = "Register `GLOBRES` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRES` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of most recent conversion"] -pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `GNR` reader - Group Number"] -pub type GnrR = crate::FieldReader; +pub type GNR_R = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type ChnrR = crate::FieldReader; +pub type CHNR_R = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EmuxR = crate::FieldReader; +pub type EMUX_R = crate::FieldReader; #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CrsR = crate::FieldReader; +pub type CRS_R = crate::FieldReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcr { +pub enum FCR_A { #[doc = "0: Signal level was below compare value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal level was above compare value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcr) -> Self { + fn from(variant: FCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FcrR = crate::BitReader; -impl FcrR { +pub type FCR_R = crate::BitReader; +impl FCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcr { + pub const fn variant(&self) -> FCR_A { match self.bits { - false => Fcr::Value1, - true => Fcr::Value2, + false => FCR_A::VALUE1, + true => FCR_A::VALUE2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcr::Value1 + *self == FCR_A::VALUE1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcr::Value2 + *self == FCR_A::VALUE2 } } #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf { +pub enum VF_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf) -> Self { + fn from(variant: VF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF` reader - Valid Flag"] -pub type VfR = crate::BitReader; -impl VfR { +pub type VF_R = crate::BitReader; +impl VF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf { + pub const fn variant(&self) -> VF_A { match self.bits { - false => Vf::Value1, - true => Vf::Value2, + false => VF_A::VALUE1, + true => VF_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf::Value1 + *self == VF_A::VALUE1 } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf::Value2 + *self == VF_A::VALUE2 } } #[doc = "Field `VF` writer - Valid Flag"] -pub type VfW<'a, REG> = crate::BitWriter<'a, REG, Vf>; -impl<'a, REG> VfW<'a, REG> +pub type VF_W<'a, REG> = crate::BitWriter<'a, REG, VF_A>; +impl<'a, REG> VF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf::Value1) + self.variant(VF_A::VALUE1) } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf::Value2) + self.variant(VF_A::VALUE2) } } impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Group Number"] #[inline(always)] - pub fn gnr(&self) -> GnrR { - GnrR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gnr(&self) -> GNR_R { + GNR_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> ChnrR { - ChnrR::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> CHNR_R { + CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EmuxR { - EmuxR::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EMUX_R { + EMUX_R::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CrsR { - CrsR::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CRS_R { + CRS_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FcrR { - FcrR::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FCR_R { + FCR_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VfR { - VfR::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VF_R { + VF_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> ResultW { - ResultW::new(self, 0) + pub fn result(&mut self) -> RESULT_W { + RESULT_W::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] #[must_use] - pub fn vf(&mut self) -> VfW { - VfW::new(self, 31) + pub fn vf(&mut self) -> VF_W { + VF_W::new(self, 31) } } #[doc = "Global Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globres::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globres::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobresSpec; -impl crate::RegisterSpec for GlobresSpec { +pub struct GLOBRES_SPEC; +impl crate::RegisterSpec for GLOBRES_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globres::R`](R) reader structure"] -impl crate::Readable for GlobresSpec {} +impl crate::Readable for GLOBRES_SPEC {} #[doc = "`write(|w| ..)` method takes [`globres::W`](W) writer structure"] -impl crate::Writable for GlobresSpec { +impl crate::Writable for GLOBRES_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRES to value 0"] -impl crate::Resettable for GlobresSpec { +impl crate::Resettable for GLOBRES_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globresd.rs b/src/vadc/globresd.rs index e82e03c0..aaca9033 100644 --- a/src/vadc/globresd.rs +++ b/src/vadc/globresd.rs @@ -1,173 +1,173 @@ #[doc = "Register `GLOBRESD` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBRESD` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of most recent conversion"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of most recent conversion"] -pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `GNR` reader - Group Number"] -pub type GnrR = crate::FieldReader; +pub type GNR_R = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type ChnrR = crate::FieldReader; +pub type CHNR_R = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EmuxR = crate::FieldReader; +pub type EMUX_R = crate::FieldReader; #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CrsR = crate::FieldReader; +pub type CRS_R = crate::FieldReader; #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcr { +pub enum FCR_A { #[doc = "0: Signal level was below compare value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal level was above compare value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcr) -> Self { + fn from(variant: FCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FcrR = crate::BitReader; -impl FcrR { +pub type FCR_R = crate::BitReader; +impl FCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcr { + pub const fn variant(&self) -> FCR_A { match self.bits { - false => Fcr::Value1, - true => Fcr::Value2, + false => FCR_A::VALUE1, + true => FCR_A::VALUE2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcr::Value1 + *self == FCR_A::VALUE1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcr::Value2 + *self == FCR_A::VALUE2 } } #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf { +pub enum VF_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf) -> Self { + fn from(variant: VF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF` reader - Valid Flag"] -pub type VfR = crate::BitReader; -impl VfR { +pub type VF_R = crate::BitReader; +impl VF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf { + pub const fn variant(&self) -> VF_A { match self.bits { - false => Vf::Value1, - true => Vf::Value2, + false => VF_A::VALUE1, + true => VF_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf::Value1 + *self == VF_A::VALUE1 } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf::Value2 + *self == VF_A::VALUE2 } } #[doc = "Field `VF` writer - Valid Flag"] -pub type VfW<'a, REG> = crate::BitWriter<'a, REG, Vf>; -impl<'a, REG> VfW<'a, REG> +pub type VF_W<'a, REG> = crate::BitWriter<'a, REG, VF_A>; +impl<'a, REG> VF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf::Value1) + self.variant(VF_A::VALUE1) } #[doc = "Read access: Bitfield RESULT contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and the data reduction counter (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf::Value2) + self.variant(VF_A::VALUE2) } } impl R { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Group Number"] #[inline(always)] - pub fn gnr(&self) -> GnrR { - GnrR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gnr(&self) -> GNR_R { + GNR_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> ChnrR { - ChnrR::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> CHNR_R { + CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EmuxR { - EmuxR::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EMUX_R { + EMUX_R::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CrsR { - CrsR::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CRS_R { + CRS_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FcrR { - FcrR::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FCR_R { + FCR_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VfR { - VfR::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VF_R { + VF_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> ResultW { - ResultW::new(self, 0) + pub fn result(&mut self) -> RESULT_W { + RESULT_W::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] #[must_use] - pub fn vf(&mut self) -> VfW { - VfW::new(self, 31) + pub fn vf(&mut self) -> VF_W { + VF_W::new(self, 31) } } #[doc = "Global Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globresd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globresd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobresdSpec; -impl crate::RegisterSpec for GlobresdSpec { +pub struct GLOBRESD_SPEC; +impl crate::RegisterSpec for GLOBRESD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globresd::R`](R) reader structure"] -impl crate::Readable for GlobresdSpec {} +impl crate::Readable for GLOBRESD_SPEC {} #[doc = "`write(|w| ..)` method takes [`globresd::W`](W) writer structure"] -impl crate::Writable for GlobresdSpec { +impl crate::Writable for GLOBRESD_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBRESD to value 0"] -impl crate::Resettable for GlobresdSpec { +impl crate::Resettable for GLOBRESD_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/globtf.rs b/src/vadc/globtf.rs index 74c41c9c..0666f634 100644 --- a/src/vadc/globtf.rs +++ b/src/vadc/globtf.rs @@ -1,125 +1,125 @@ #[doc = "Register `GLOBTF` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `GLOBTF` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `CDGR` reader - Converter Diagnostics Group"] -pub type CdgrR = crate::FieldReader; +pub type CDGR_R = crate::FieldReader; #[doc = "Field `CDGR` writer - Converter Diagnostics Group"] -pub type CdgrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type CDGR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Converter Diagnostics Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cden { +pub enum CDEN_A { #[doc = "0: All diagnostic pull devices are disconnected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Diagnostic pull devices connected as selected by bitfield CDSEL"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cden) -> Self { + fn from(variant: CDEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDEN` reader - Converter Diagnostics Enable"] -pub type CdenR = crate::BitReader; -impl CdenR { +pub type CDEN_R = crate::BitReader; +impl CDEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cden { + pub const fn variant(&self) -> CDEN_A { match self.bits { - false => Cden::Value1, - true => Cden::Value2, + false => CDEN_A::VALUE1, + true => CDEN_A::VALUE2, } } #[doc = "All diagnostic pull devices are disconnected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cden::Value1 + *self == CDEN_A::VALUE1 } #[doc = "Diagnostic pull devices connected as selected by bitfield CDSEL"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cden::Value2 + *self == CDEN_A::VALUE2 } } #[doc = "Field `CDEN` writer - Converter Diagnostics Enable"] -pub type CdenW<'a, REG> = crate::BitWriter<'a, REG, Cden>; -impl<'a, REG> CdenW<'a, REG> +pub type CDEN_W<'a, REG> = crate::BitWriter<'a, REG, CDEN_A>; +impl<'a, REG> CDEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "All diagnostic pull devices are disconnected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cden::Value1) + self.variant(CDEN_A::VALUE1) } #[doc = "Diagnostic pull devices connected as selected by bitfield CDSEL"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cden::Value2) + self.variant(CDEN_A::VALUE2) } } #[doc = "Converter Diagnostics Pull-Devices Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cdsel { +pub enum CDSEL_A { #[doc = "0: Connected to VAREF"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Connected to VAGND"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Connected to 1/3rd VAREF"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Connected to 2/3rd VAREF"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cdsel) -> Self { + fn from(variant: CDSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cdsel { +impl crate::FieldSpec for CDSEL_A { type Ux = u8; } -impl crate::IsEnum for Cdsel {} +impl crate::IsEnum for CDSEL_A {} #[doc = "Field `CDSEL` reader - Converter Diagnostics Pull-Devices Select"] -pub type CdselR = crate::FieldReader; -impl CdselR { +pub type CDSEL_R = crate::FieldReader; +impl CDSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cdsel { + pub const fn variant(&self) -> CDSEL_A { match self.bits { - 0 => Cdsel::Value1, - 1 => Cdsel::Value2, - 2 => Cdsel::Value3, - 3 => Cdsel::Value4, + 0 => CDSEL_A::VALUE1, + 1 => CDSEL_A::VALUE2, + 2 => CDSEL_A::VALUE3, + 3 => CDSEL_A::VALUE4, _ => unreachable!(), } } #[doc = "Connected to VAREF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cdsel::Value1 + *self == CDSEL_A::VALUE1 } #[doc = "Connected to VAGND"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cdsel::Value2 + *self == CDSEL_A::VALUE2 } #[doc = "Connected to 1/3rd VAREF"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cdsel::Value3 + *self == CDSEL_A::VALUE3 } #[doc = "Connected to 2/3rd VAREF"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cdsel::Value4 + *self == CDSEL_A::VALUE4 } } #[doc = "Field `CDSEL` writer - Converter Diagnostics Pull-Devices Select"] -pub type CdselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cdsel, crate::Safe>; -impl<'a, REG> CdselW<'a, REG> +pub type CDSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CDSEL_A, crate::Safe>; +impl<'a, REG> CDSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -127,213 +127,213 @@ where #[doc = "Connected to VAREF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cdsel::Value1) + self.variant(CDSEL_A::VALUE1) } #[doc = "Connected to VAGND"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cdsel::Value2) + self.variant(CDSEL_A::VALUE2) } #[doc = "Connected to 1/3rd VAREF"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cdsel::Value3) + self.variant(CDSEL_A::VALUE3) } #[doc = "Connected to 2/3rd VAREF"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cdsel::Value4) + self.variant(CDSEL_A::VALUE4) } } #[doc = "Write Control for Conversion Diagnostics\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cdwc { +pub enum CDWC_A { #[doc = "0: No write access to parameters"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields CDSEL, CDEN, CDGR can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cdwc) -> Self { + fn from(variant: CDWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CDWC` writer - Write Control for Conversion Diagnostics"] -pub type CdwcW<'a, REG> = crate::BitWriter<'a, REG, Cdwc>; -impl<'a, REG> CdwcW<'a, REG> +pub type CDWC_W<'a, REG> = crate::BitWriter<'a, REG, CDWC_A>; +impl<'a, REG> CDWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cdwc::Value1) + self.variant(CDWC_A::VALUE1) } #[doc = "Bitfields CDSEL, CDEN, CDGR can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cdwc::Value2) + self.variant(CDWC_A::VALUE2) } } #[doc = "Pull-Down Diagnostics Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Pdd { +pub enum PDD_A { #[doc = "0: Disconnected"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The pull-down diagnostics device is active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Pdd) -> Self { + fn from(variant: PDD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `PDD` reader - Pull-Down Diagnostics Enable"] -pub type PddR = crate::BitReader; -impl PddR { +pub type PDD_R = crate::BitReader; +impl PDD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Pdd { + pub const fn variant(&self) -> PDD_A { match self.bits { - false => Pdd::Value1, - true => Pdd::Value2, + false => PDD_A::VALUE1, + true => PDD_A::VALUE2, } } #[doc = "Disconnected"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Pdd::Value1 + *self == PDD_A::VALUE1 } #[doc = "The pull-down diagnostics device is active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Pdd::Value2 + *self == PDD_A::VALUE2 } } #[doc = "Field `PDD` writer - Pull-Down Diagnostics Enable"] -pub type PddW<'a, REG> = crate::BitWriter<'a, REG, Pdd>; -impl<'a, REG> PddW<'a, REG> +pub type PDD_W<'a, REG> = crate::BitWriter<'a, REG, PDD_A>; +impl<'a, REG> PDD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Disconnected"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Pdd::Value1) + self.variant(PDD_A::VALUE1) } #[doc = "The pull-down diagnostics device is active"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Pdd::Value2) + self.variant(PDD_A::VALUE2) } } #[doc = "Write Control for Multiplexer Diagnostics\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Mdwc { +pub enum MDWC_A { #[doc = "0: No write access to parameters"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield PDD can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Mdwc) -> Self { + fn from(variant: MDWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `MDWC` writer - Write Control for Multiplexer Diagnostics"] -pub type MdwcW<'a, REG> = crate::BitWriter<'a, REG, Mdwc>; -impl<'a, REG> MdwcW<'a, REG> +pub type MDWC_W<'a, REG> = crate::BitWriter<'a, REG, MDWC_A>; +impl<'a, REG> MDWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to parameters"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Mdwc::Value1) + self.variant(MDWC_A::VALUE1) } #[doc = "Bitfield PDD can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Mdwc::Value2) + self.variant(MDWC_A::VALUE2) } } impl R { #[doc = "Bits 4:7 - Converter Diagnostics Group"] #[inline(always)] - pub fn cdgr(&self) -> CdgrR { - CdgrR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cdgr(&self) -> CDGR_R { + CDGR_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bit 8 - Converter Diagnostics Enable"] #[inline(always)] - pub fn cden(&self) -> CdenR { - CdenR::new(((self.bits >> 8) & 1) != 0) + pub fn cden(&self) -> CDEN_R { + CDEN_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"] #[inline(always)] - pub fn cdsel(&self) -> CdselR { - CdselR::new(((self.bits >> 9) & 3) as u8) + pub fn cdsel(&self) -> CDSEL_R { + CDSEL_R::new(((self.bits >> 9) & 3) as u8) } #[doc = "Bit 16 - Pull-Down Diagnostics Enable"] #[inline(always)] - pub fn pdd(&self) -> PddR { - PddR::new(((self.bits >> 16) & 1) != 0) + pub fn pdd(&self) -> PDD_R { + PDD_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 4:7 - Converter Diagnostics Group"] #[inline(always)] #[must_use] - pub fn cdgr(&mut self) -> CdgrW { - CdgrW::new(self, 4) + pub fn cdgr(&mut self) -> CDGR_W { + CDGR_W::new(self, 4) } #[doc = "Bit 8 - Converter Diagnostics Enable"] #[inline(always)] #[must_use] - pub fn cden(&mut self) -> CdenW { - CdenW::new(self, 8) + pub fn cden(&mut self) -> CDEN_W { + CDEN_W::new(self, 8) } #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"] #[inline(always)] #[must_use] - pub fn cdsel(&mut self) -> CdselW { - CdselW::new(self, 9) + pub fn cdsel(&mut self) -> CDSEL_W { + CDSEL_W::new(self, 9) } #[doc = "Bit 15 - Write Control for Conversion Diagnostics"] #[inline(always)] #[must_use] - pub fn cdwc(&mut self) -> CdwcW { - CdwcW::new(self, 15) + pub fn cdwc(&mut self) -> CDWC_W { + CDWC_W::new(self, 15) } #[doc = "Bit 16 - Pull-Down Diagnostics Enable"] #[inline(always)] #[must_use] - pub fn pdd(&mut self) -> PddW { - PddW::new(self, 16) + pub fn pdd(&mut self) -> PDD_W { + PDD_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Multiplexer Diagnostics"] #[inline(always)] #[must_use] - pub fn mdwc(&mut self) -> MdwcW { - MdwcW::new(self, 23) + pub fn mdwc(&mut self) -> MDWC_W { + MDWC_W::new(self, 23) } } #[doc = "Global Test Functions Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`globtf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`globtf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct GlobtfSpec; -impl crate::RegisterSpec for GlobtfSpec { +pub struct GLOBTF_SPEC; +impl crate::RegisterSpec for GLOBTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`globtf::R`](R) reader structure"] -impl crate::Readable for GlobtfSpec {} +impl crate::Readable for GLOBTF_SPEC {} #[doc = "`write(|w| ..)` method takes [`globtf::W`](W) writer structure"] -impl crate::Writable for GlobtfSpec { +impl crate::Writable for GLOBTF_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets GLOBTF to value 0"] -impl crate::Resettable for GlobtfSpec { +impl crate::Resettable for GLOBTF_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc/id.rs b/src/vadc/id.rs index f06c5592..2b461bda 100644 --- a/src/vadc/id.rs +++ b/src/vadc/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Module Identification Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00c5_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00c5_c000; } diff --git a/src/vadc/ocs.rs b/src/vadc/ocs.rs index 6e75f009..19e75fbd 100644 --- a/src/vadc/ocs.rs +++ b/src/vadc/ocs.rs @@ -1,52 +1,52 @@ #[doc = "Register `OCS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `OCS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Trigger Set for OTGB0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Tgs { +pub enum TGS_A { #[doc = "0: No Trigger Set output"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger Set 1: TS16_SSIG, input sample signals"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Tgs) -> Self { + fn from(variant: TGS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Tgs { +impl crate::FieldSpec for TGS_A { type Ux = u8; } -impl crate::IsEnum for Tgs {} +impl crate::IsEnum for TGS_A {} #[doc = "Field `TGS` reader - Trigger Set for OTGB0/1"] -pub type TgsR = crate::FieldReader; -impl TgsR { +pub type TGS_R = crate::FieldReader; +impl TGS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Tgs::Value1), - 1 => Some(Tgs::Value2), + 0 => Some(TGS_A::VALUE1), + 1 => Some(TGS_A::VALUE2), _ => None, } } #[doc = "No Trigger Set output"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tgs::Value1 + *self == TGS_A::VALUE1 } #[doc = "Trigger Set 1: TS16_SSIG, input sample signals"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tgs::Value2 + *self == TGS_A::VALUE2 } } #[doc = "Field `TGS` writer - Trigger Set for OTGB0/1"] -pub type TgsW<'a, REG> = crate::FieldWriter<'a, REG, 2, Tgs>; -impl<'a, REG> TgsW<'a, REG> +pub type TGS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, TGS_A>; +impl<'a, REG> TGS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,130 +54,130 @@ where #[doc = "No Trigger Set output"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tgs::Value1) + self.variant(TGS_A::VALUE1) } #[doc = "Trigger Set 1: TS16_SSIG, input sample signals"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tgs::Value2) + self.variant(TGS_A::VALUE2) } } #[doc = "OTGB0/1 Bus Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tgb { +pub enum TGB_A { #[doc = "0: Trigger Set is output on OTGB0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger Set is output on OTGB1"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tgb) -> Self { + fn from(variant: TGB_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TGB` reader - OTGB0/1 Bus Select"] -pub type TgbR = crate::BitReader; -impl TgbR { +pub type TGB_R = crate::BitReader; +impl TGB_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tgb { + pub const fn variant(&self) -> TGB_A { match self.bits { - false => Tgb::Value1, - true => Tgb::Value2, + false => TGB_A::VALUE1, + true => TGB_A::VALUE2, } } #[doc = "Trigger Set is output on OTGB0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tgb::Value1 + *self == TGB_A::VALUE1 } #[doc = "Trigger Set is output on OTGB1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tgb::Value2 + *self == TGB_A::VALUE2 } } #[doc = "Field `TGB` writer - OTGB0/1 Bus Select"] -pub type TgbW<'a, REG> = crate::BitWriter<'a, REG, Tgb>; -impl<'a, REG> TgbW<'a, REG> +pub type TGB_W<'a, REG> = crate::BitWriter<'a, REG, TGB_A>; +impl<'a, REG> TGB_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Trigger Set is output on OTGB0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tgb::Value1) + self.variant(TGB_A::VALUE1) } #[doc = "Trigger Set is output on OTGB1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tgb::Value2) + self.variant(TGB_A::VALUE2) } } #[doc = "Field `TG_P` writer - TGS, TGB Write Protection"] -pub type TgPW<'a, REG> = crate::BitWriter<'a, REG>; +pub type TG_P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "OCDS Suspend Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sus { +pub enum SUS_A { #[doc = "0: Will not suspend"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Hard suspend: Clock is switched off immediately."] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sus) -> Self { + fn from(variant: SUS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sus { +impl crate::FieldSpec for SUS_A { type Ux = u8; } -impl crate::IsEnum for Sus {} +impl crate::IsEnum for SUS_A {} #[doc = "Field `SUS` reader - OCDS Suspend Control"] -pub type SusR = crate::FieldReader; -impl SusR { +pub type SUS_R = crate::FieldReader; +impl SUS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sus::Value1), - 1 => Some(Sus::Value2), - 2 => Some(Sus::Value3), - 3 => Some(Sus::Value4), + 0 => Some(SUS_A::VALUE1), + 1 => Some(SUS_A::VALUE2), + 2 => Some(SUS_A::VALUE3), + 3 => Some(SUS_A::VALUE4), _ => None, } } #[doc = "Will not suspend"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sus::Value1 + *self == SUS_A::VALUE1 } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sus::Value2 + *self == SUS_A::VALUE2 } #[doc = "Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sus::Value3 + *self == SUS_A::VALUE3 } #[doc = "Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sus::Value4 + *self == SUS_A::VALUE4 } } #[doc = "Field `SUS` writer - OCDS Suspend Control"] -pub type SusW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sus>; -impl<'a, REG> SusW<'a, REG> +pub type SUS_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SUS_A>; +impl<'a, REG> SUS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -185,130 +185,130 @@ where #[doc = "Will not suspend"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sus::Value1) + self.variant(SUS_A::VALUE1) } #[doc = "Hard suspend: Clock is switched off immediately."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sus::Value2) + self.variant(SUS_A::VALUE2) } #[doc = "Soft suspend mode 0: Stop conversions after the currently running one is completed and its result has been stored. No change for the arbiter."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sus::Value3) + self.variant(SUS_A::VALUE3) } #[doc = "Soft suspend mode 1: Stop conversions after the currently running one is completed and its result has been stored. Stop arbiter after the current arbitration round."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Sus::Value4) + self.variant(SUS_A::VALUE4) } } #[doc = "Field `SUS_P` writer - SUS Write Protection"] -pub type SusPW<'a, REG> = crate::BitWriter<'a, REG>; +pub type SUS_P_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Suspend State\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sussta { +pub enum SUSSTA_A { #[doc = "0: Module is not (yet) suspended"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Module is suspended"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sussta) -> Self { + fn from(variant: SUSSTA_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SUSSTA` reader - Suspend State"] -pub type SusstaR = crate::BitReader; -impl SusstaR { +pub type SUSSTA_R = crate::BitReader; +impl SUSSTA_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sussta { + pub const fn variant(&self) -> SUSSTA_A { match self.bits { - false => Sussta::Value1, - true => Sussta::Value2, + false => SUSSTA_A::VALUE1, + true => SUSSTA_A::VALUE2, } } #[doc = "Module is not (yet) suspended"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sussta::Value1 + *self == SUSSTA_A::VALUE1 } #[doc = "Module is suspended"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sussta::Value2 + *self == SUSSTA_A::VALUE2 } } impl R { #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"] #[inline(always)] - pub fn tgs(&self) -> TgsR { - TgsR::new((self.bits & 3) as u8) + pub fn tgs(&self) -> TGS_R { + TGS_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - OTGB0/1 Bus Select"] #[inline(always)] - pub fn tgb(&self) -> TgbR { - TgbR::new(((self.bits >> 2) & 1) != 0) + pub fn tgb(&self) -> TGB_R { + TGB_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] - pub fn sus(&self) -> SusR { - SusR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn sus(&self) -> SUS_R { + SUS_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 29 - Suspend State"] #[inline(always)] - pub fn sussta(&self) -> SusstaR { - SusstaR::new(((self.bits >> 29) & 1) != 0) + pub fn sussta(&self) -> SUSSTA_R { + SUSSTA_R::new(((self.bits >> 29) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"] #[inline(always)] #[must_use] - pub fn tgs(&mut self) -> TgsW { - TgsW::new(self, 0) + pub fn tgs(&mut self) -> TGS_W { + TGS_W::new(self, 0) } #[doc = "Bit 2 - OTGB0/1 Bus Select"] #[inline(always)] #[must_use] - pub fn tgb(&mut self) -> TgbW { - TgbW::new(self, 2) + pub fn tgb(&mut self) -> TGB_W { + TGB_W::new(self, 2) } #[doc = "Bit 3 - TGS, TGB Write Protection"] #[inline(always)] #[must_use] - pub fn tg_p(&mut self) -> TgPW { - TgPW::new(self, 3) + pub fn tg_p(&mut self) -> TG_P_W { + TG_P_W::new(self, 3) } #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] #[must_use] - pub fn sus(&mut self) -> SusW { - SusW::new(self, 24) + pub fn sus(&mut self) -> SUS_W { + SUS_W::new(self, 24) } #[doc = "Bit 28 - SUS Write Protection"] #[inline(always)] #[must_use] - pub fn sus_p(&mut self) -> SusPW { - SusPW::new(self, 28) + pub fn sus_p(&mut self) -> SUS_P_W { + SUS_P_W::new(self, 28) } } #[doc = "OCDS Control and Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ocs::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ocs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct OcsSpec; -impl crate::RegisterSpec for OcsSpec { +pub struct OCS_SPEC; +impl crate::RegisterSpec for OCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ocs::R`](R) reader structure"] -impl crate::Readable for OcsSpec {} +impl crate::Readable for OCS_SPEC {} #[doc = "`write(|w| ..)` method takes [`ocs::W`](W) writer structure"] -impl crate::Writable for OcsSpec { +impl crate::Writable for OCS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets OCS to value 0"] -impl crate::Resettable for OcsSpec { +impl crate::Resettable for OCS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0.rs b/src/vadc_g0.rs index 9c0132e3..8bbe8457 100644 --- a/src/vadc_g0.rs +++ b/src/vadc_g0.rs @@ -2,510 +2,472 @@ #[doc = "Register block"] pub struct RegisterBlock { _reserved0: [u8; 0x80], - arbcfg: Arbcfg, - arbpr: Arbpr, - chass: Chass, + arbcfg: ARBCFG, + arbpr: ARBPR, + chass: CHASS, _reserved3: [u8; 0x14], - iclass: [Iclass; 2], + iclass: [ICLASS; 2], _reserved4: [u8; 0x08], - alias: Alias, + alias: ALIAS, _reserved5: [u8; 0x04], - bound: Bound, + bound: BOUND, _reserved6: [u8; 0x04], - synctr: Synctr, + synctr: SYNCTR, _reserved7: [u8; 0x04], - bfl: Bfl, - bfls: Bfls, - bflc: Bflc, - bflnp: Bflnp, + bfl: BFL, + bfls: BFLS, + bflc: BFLC, + bflnp: BFLNP, _reserved11: [u8; 0x28], - qctrl0: Qctrl0, - qmr0: Qmr0, - qsr0: Qsr0, - q0r0: Q0r0, + qctrl0: QCTRL0, + qmr0: QMR0, + qsr0: QSR0, + q0r0: Q0R0, _reserved_15_qbur0: [u8; 0x04], _reserved16: [u8; 0x0c], - asctrl: Asctrl, - asmr: Asmr, - assel: Assel, - aspnd: Aspnd, + asctrl: ASCTRL, + asmr: ASMR, + assel: ASSEL, + aspnd: ASPND, _reserved20: [u8; 0x50], - ceflag: Ceflag, - reflag: Reflag, - seflag: Seflag, + ceflag: CEFLAG, + reflag: REFLAG, + seflag: SEFLAG, _reserved23: [u8; 0x04], - cefclr: Cefclr, - refclr: Refclr, - sefclr: Sefclr, + cefclr: CEFCLR, + refclr: REFCLR, + sefclr: SEFCLR, _reserved26: [u8; 0x04], - cevnp0: Cevnp0, + cevnp0: CEVNP0, _reserved27: [u8; 0x0c], - revnp0: Revnp0, - revnp1: Revnp1, + revnp0: REVNP0, + revnp1: REVNP1, _reserved29: [u8; 0x08], - sevnp: Sevnp, + sevnp: SEVNP, _reserved30: [u8; 0x04], - sract: Sract, + sract: SRACT, _reserved31: [u8; 0x24], - emuxctr: Emuxctr, + emuxctr: EMUXCTR, _reserved32: [u8; 0x04], - vfr: Vfr, + vfr: VFR, _reserved33: [u8; 0x04], - chctr: [Chctr; 8], + chctr: [CHCTR; 8], _reserved34: [u8; 0x60], - rcr: [Rcr; 16], + rcr: [RCR; 16], _reserved35: [u8; 0x40], - res: [Res; 16], + res: [RES; 16], _reserved36: [u8; 0x40], - resd: [Resd; 16], + resd: [RESD; 16], } impl RegisterBlock { #[doc = "0x80 - Arbitration Configuration Register"] #[inline(always)] - pub const fn arbcfg(&self) -> &Arbcfg { + pub const fn arbcfg(&self) -> &ARBCFG { &self.arbcfg } #[doc = "0x84 - Arbitration Priority Register"] #[inline(always)] - pub const fn arbpr(&self) -> &Arbpr { + pub const fn arbpr(&self) -> &ARBPR { &self.arbpr } #[doc = "0x88 - Channel Assignment Register"] #[inline(always)] - pub const fn chass(&self) -> &Chass { + pub const fn chass(&self) -> &CHASS { &self.chass } #[doc = "0xa0..0xa8 - Input Class Register"] #[inline(always)] - pub const fn iclass(&self, n: usize) -> &Iclass { + pub const fn iclass(&self, n: usize) -> &ICLASS { &self.iclass[n] } #[doc = "Iterator for array of:"] #[doc = "0xa0..0xa8 - Input Class Register"] #[inline(always)] - pub fn iclass_iter(&self) -> impl Iterator { + pub fn iclass_iter(&self) -> impl Iterator { self.iclass.iter() } #[doc = "0xb0 - Alias Register"] #[inline(always)] - pub const fn alias(&self) -> &Alias { + pub const fn alias(&self) -> &ALIAS { &self.alias } #[doc = "0xb8 - Boundary Select Register"] #[inline(always)] - pub const fn bound(&self) -> &Bound { + pub const fn bound(&self) -> &BOUND { &self.bound } #[doc = "0xc0 - Synchronization Control Register"] #[inline(always)] - pub const fn synctr(&self) -> &Synctr { + pub const fn synctr(&self) -> &SYNCTR { &self.synctr } #[doc = "0xc8 - Boundary Flag Register"] #[inline(always)] - pub const fn bfl(&self) -> &Bfl { + pub const fn bfl(&self) -> &BFL { &self.bfl } #[doc = "0xcc - Boundary Flag Software Register"] #[inline(always)] - pub const fn bfls(&self) -> &Bfls { + pub const fn bfls(&self) -> &BFLS { &self.bfls } #[doc = "0xd0 - Boundary Flag Control Register"] #[inline(always)] - pub const fn bflc(&self) -> &Bflc { + pub const fn bflc(&self) -> &BFLC { &self.bflc } #[doc = "0xd4 - Boundary Flag Node Pointer Register"] #[inline(always)] - pub const fn bflnp(&self) -> &Bflnp { + pub const fn bflnp(&self) -> &BFLNP { &self.bflnp } #[doc = "0x100 - Queue 0 Source Control Register"] #[inline(always)] - pub const fn qctrl0(&self) -> &Qctrl0 { + pub const fn qctrl0(&self) -> &QCTRL0 { &self.qctrl0 } #[doc = "0x104 - Queue 0 Mode Register"] #[inline(always)] - pub const fn qmr0(&self) -> &Qmr0 { + pub const fn qmr0(&self) -> &QMR0 { &self.qmr0 } #[doc = "0x108 - Queue 0 Status Register"] #[inline(always)] - pub const fn qsr0(&self) -> &Qsr0 { + pub const fn qsr0(&self) -> &QSR0 { &self.qsr0 } #[doc = "0x10c - Queue 0 Register 0"] #[inline(always)] - pub const fn q0r0(&self) -> &Q0r0 { + pub const fn q0r0(&self) -> &Q0R0 { &self.q0r0 } #[doc = "0x110 - Queue 0 Backup Register"] #[inline(always)] - pub const fn qbur0(&self) -> &Qbur0 { + pub const fn qbur0(&self) -> &QBUR0 { unsafe { &*(self as *const Self).cast::().add(272).cast() } } #[doc = "0x110 - Queue 0 Input Register"] #[inline(always)] - pub const fn qinr0(&self) -> &Qinr0 { + pub const fn qinr0(&self) -> &QINR0 { unsafe { &*(self as *const Self).cast::().add(272).cast() } } #[doc = "0x120 - Autoscan Source Control Register"] #[inline(always)] - pub const fn asctrl(&self) -> &Asctrl { + pub const fn asctrl(&self) -> &ASCTRL { &self.asctrl } #[doc = "0x124 - Autoscan Source Mode Register"] #[inline(always)] - pub const fn asmr(&self) -> &Asmr { + pub const fn asmr(&self) -> &ASMR { &self.asmr } #[doc = "0x128 - Autoscan Source Channel Select Register"] #[inline(always)] - pub const fn assel(&self) -> &Assel { + pub const fn assel(&self) -> &ASSEL { &self.assel } #[doc = "0x12c - Autoscan Source Pending Register"] #[inline(always)] - pub const fn aspnd(&self) -> &Aspnd { + pub const fn aspnd(&self) -> &ASPND { &self.aspnd } #[doc = "0x180 - Channel Event Flag Register"] #[inline(always)] - pub const fn ceflag(&self) -> &Ceflag { + pub const fn ceflag(&self) -> &CEFLAG { &self.ceflag } #[doc = "0x184 - Result Event Flag Register"] #[inline(always)] - pub const fn reflag(&self) -> &Reflag { + pub const fn reflag(&self) -> &REFLAG { &self.reflag } #[doc = "0x188 - Source Event Flag Register"] #[inline(always)] - pub const fn seflag(&self) -> &Seflag { + pub const fn seflag(&self) -> &SEFLAG { &self.seflag } #[doc = "0x190 - Channel Event Flag Clear Register"] #[inline(always)] - pub const fn cefclr(&self) -> &Cefclr { + pub const fn cefclr(&self) -> &CEFCLR { &self.cefclr } #[doc = "0x194 - Result Event Flag Clear Register"] #[inline(always)] - pub const fn refclr(&self) -> &Refclr { + pub const fn refclr(&self) -> &REFCLR { &self.refclr } #[doc = "0x198 - Source Event Flag Clear Register"] #[inline(always)] - pub const fn sefclr(&self) -> &Sefclr { + pub const fn sefclr(&self) -> &SEFCLR { &self.sefclr } #[doc = "0x1a0 - Channel Event Node Pointer Register 0"] #[inline(always)] - pub const fn cevnp0(&self) -> &Cevnp0 { + pub const fn cevnp0(&self) -> &CEVNP0 { &self.cevnp0 } #[doc = "0x1b0 - Result Event Node Pointer Register 0"] #[inline(always)] - pub const fn revnp0(&self) -> &Revnp0 { + pub const fn revnp0(&self) -> &REVNP0 { &self.revnp0 } #[doc = "0x1b4 - Result Event Node Pointer Register 1"] #[inline(always)] - pub const fn revnp1(&self) -> &Revnp1 { + pub const fn revnp1(&self) -> &REVNP1 { &self.revnp1 } #[doc = "0x1c0 - Source Event Node Pointer Register"] #[inline(always)] - pub const fn sevnp(&self) -> &Sevnp { + pub const fn sevnp(&self) -> &SEVNP { &self.sevnp } #[doc = "0x1c8 - Service Request Software Activation Trigger"] #[inline(always)] - pub const fn sract(&self) -> &Sract { + pub const fn sract(&self) -> &SRACT { &self.sract } #[doc = "0x1f0 - External Multiplexer Control Register"] #[inline(always)] - pub const fn emuxctr(&self) -> &Emuxctr { + pub const fn emuxctr(&self) -> &EMUXCTR { &self.emuxctr } #[doc = "0x1f8 - Valid Flag Register"] #[inline(always)] - pub const fn vfr(&self) -> &Vfr { + pub const fn vfr(&self) -> &VFR { &self.vfr } #[doc = "0x200..0x220 - Channel Ctrl. Reg."] #[inline(always)] - pub const fn chctr(&self, n: usize) -> &Chctr { + pub const fn chctr(&self, n: usize) -> &CHCTR { &self.chctr[n] } #[doc = "Iterator for array of:"] #[doc = "0x200..0x220 - Channel Ctrl. Reg."] #[inline(always)] - pub fn chctr_iter(&self) -> impl Iterator { + pub fn chctr_iter(&self) -> impl Iterator { self.chctr.iter() } #[doc = "0x280..0x2c0 - Result Control Register"] #[inline(always)] - pub const fn rcr(&self, n: usize) -> &Rcr { + pub const fn rcr(&self, n: usize) -> &RCR { &self.rcr[n] } #[doc = "Iterator for array of:"] #[doc = "0x280..0x2c0 - Result Control Register"] #[inline(always)] - pub fn rcr_iter(&self) -> impl Iterator { + pub fn rcr_iter(&self) -> impl Iterator { self.rcr.iter() } #[doc = "0x300..0x340 - Result Register"] #[inline(always)] - pub const fn res(&self, n: usize) -> &Res { + pub const fn res(&self, n: usize) -> &RES { &self.res[n] } #[doc = "Iterator for array of:"] #[doc = "0x300..0x340 - Result Register"] #[inline(always)] - pub fn res_iter(&self) -> impl Iterator { + pub fn res_iter(&self) -> impl Iterator { self.res.iter() } #[doc = "0x380..0x3c0 - Result Register, Debug"] #[inline(always)] - pub const fn resd(&self, n: usize) -> &Resd { + pub const fn resd(&self, n: usize) -> &RESD { &self.resd[n] } #[doc = "Iterator for array of:"] #[doc = "0x380..0x3c0 - Result Register, Debug"] #[inline(always)] - pub fn resd_iter(&self) -> impl Iterator { + pub fn resd_iter(&self) -> impl Iterator { self.resd.iter() } } #[doc = "ARBCFG (rw) register accessor: Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbcfg`] module"] -#[doc(alias = "ARBCFG")] -pub type Arbcfg = crate::Reg; +pub type ARBCFG = crate::Reg; #[doc = "Arbitration Configuration Register"] pub mod arbcfg; #[doc = "ARBPR (rw) register accessor: Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@arbpr`] module"] -#[doc(alias = "ARBPR")] -pub type Arbpr = crate::Reg; +pub type ARBPR = crate::Reg; #[doc = "Arbitration Priority Register"] pub mod arbpr; #[doc = "CHASS (rw) register accessor: Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chass`] module"] -#[doc(alias = "CHASS")] -pub type Chass = crate::Reg; +pub type CHASS = crate::Reg; #[doc = "Channel Assignment Register"] pub mod chass; #[doc = "ICLASS (rw) register accessor: Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iclass`] module"] -#[doc(alias = "ICLASS")] -pub type Iclass = crate::Reg; +pub type ICLASS = crate::Reg; #[doc = "Input Class Register"] pub mod iclass; #[doc = "ALIAS (rw) register accessor: Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@alias`] module"] -#[doc(alias = "ALIAS")] -pub type Alias = crate::Reg; +pub type ALIAS = crate::Reg; #[doc = "Alias Register"] pub mod alias; #[doc = "BOUND (rw) register accessor: Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bound`] module"] -#[doc(alias = "BOUND")] -pub type Bound = crate::Reg; +pub type BOUND = crate::Reg; #[doc = "Boundary Select Register"] pub mod bound; #[doc = "SYNCTR (rw) register accessor: Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@synctr`] module"] -#[doc(alias = "SYNCTR")] -pub type Synctr = crate::Reg; +pub type SYNCTR = crate::Reg; #[doc = "Synchronization Control Register"] pub mod synctr; #[doc = "BFL (rw) register accessor: Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfl`] module"] -#[doc(alias = "BFL")] -pub type Bfl = crate::Reg; +pub type BFL = crate::Reg; #[doc = "Boundary Flag Register"] pub mod bfl; #[doc = "BFLS (w) register accessor: Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bfls`] module"] -#[doc(alias = "BFLS")] -pub type Bfls = crate::Reg; +pub type BFLS = crate::Reg; #[doc = "Boundary Flag Software Register"] pub mod bfls; #[doc = "BFLC (rw) register accessor: Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflc`] module"] -#[doc(alias = "BFLC")] -pub type Bflc = crate::Reg; +pub type BFLC = crate::Reg; #[doc = "Boundary Flag Control Register"] pub mod bflc; #[doc = "BFLNP (rw) register accessor: Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bflnp`] module"] -#[doc(alias = "BFLNP")] -pub type Bflnp = crate::Reg; +pub type BFLNP = crate::Reg; #[doc = "Boundary Flag Node Pointer Register"] pub mod bflnp; #[doc = "QCTRL0 (rw) register accessor: Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qctrl0`] module"] -#[doc(alias = "QCTRL0")] -pub type Qctrl0 = crate::Reg; +pub type QCTRL0 = crate::Reg; #[doc = "Queue 0 Source Control Register"] pub mod qctrl0; #[doc = "QMR0 (rw) register accessor: Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qmr0`] module"] -#[doc(alias = "QMR0")] -pub type Qmr0 = crate::Reg; +pub type QMR0 = crate::Reg; #[doc = "Queue 0 Mode Register"] pub mod qmr0; #[doc = "QSR0 (r) register accessor: Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qsr0`] module"] -#[doc(alias = "QSR0")] -pub type Qsr0 = crate::Reg; +pub type QSR0 = crate::Reg; #[doc = "Queue 0 Status Register"] pub mod qsr0; #[doc = "Q0R0 (r) register accessor: Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@q0r0`] module"] -#[doc(alias = "Q0R0")] -pub type Q0r0 = crate::Reg; +pub type Q0R0 = crate::Reg; #[doc = "Queue 0 Register 0"] pub mod q0r0; #[doc = "QINR0 (w) register accessor: Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qinr0`] module"] -#[doc(alias = "QINR0")] -pub type Qinr0 = crate::Reg; +pub type QINR0 = crate::Reg; #[doc = "Queue 0 Input Register"] pub mod qinr0; #[doc = "QBUR0 (r) register accessor: Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@qbur0`] module"] -#[doc(alias = "QBUR0")] -pub type Qbur0 = crate::Reg; +pub type QBUR0 = crate::Reg; #[doc = "Queue 0 Backup Register"] pub mod qbur0; #[doc = "ASCTRL (rw) register accessor: Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asctrl`] module"] -#[doc(alias = "ASCTRL")] -pub type Asctrl = crate::Reg; +pub type ASCTRL = crate::Reg; #[doc = "Autoscan Source Control Register"] pub mod asctrl; #[doc = "ASMR (rw) register accessor: Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@asmr`] module"] -#[doc(alias = "ASMR")] -pub type Asmr = crate::Reg; +pub type ASMR = crate::Reg; #[doc = "Autoscan Source Mode Register"] pub mod asmr; #[doc = "ASSEL (rw) register accessor: Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assel`] module"] -#[doc(alias = "ASSEL")] -pub type Assel = crate::Reg; +pub type ASSEL = crate::Reg; #[doc = "Autoscan Source Channel Select Register"] pub mod assel; #[doc = "ASPND (rw) register accessor: Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aspnd`] module"] -#[doc(alias = "ASPND")] -pub type Aspnd = crate::Reg; +pub type ASPND = crate::Reg; #[doc = "Autoscan Source Pending Register"] pub mod aspnd; #[doc = "CEFLAG (rw) register accessor: Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ceflag`] module"] -#[doc(alias = "CEFLAG")] -pub type Ceflag = crate::Reg; +pub type CEFLAG = crate::Reg; #[doc = "Channel Event Flag Register"] pub mod ceflag; #[doc = "REFLAG (rw) register accessor: Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reflag`] module"] -#[doc(alias = "REFLAG")] -pub type Reflag = crate::Reg; +pub type REFLAG = crate::Reg; #[doc = "Result Event Flag Register"] pub mod reflag; #[doc = "SEFLAG (rw) register accessor: Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@seflag`] module"] -#[doc(alias = "SEFLAG")] -pub type Seflag = crate::Reg; +pub type SEFLAG = crate::Reg; #[doc = "Source Event Flag Register"] pub mod seflag; #[doc = "CEFCLR (w) register accessor: Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cefclr`] module"] -#[doc(alias = "CEFCLR")] -pub type Cefclr = crate::Reg; +pub type CEFCLR = crate::Reg; #[doc = "Channel Event Flag Clear Register"] pub mod cefclr; #[doc = "REFCLR (w) register accessor: Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@refclr`] module"] -#[doc(alias = "REFCLR")] -pub type Refclr = crate::Reg; +pub type REFCLR = crate::Reg; #[doc = "Result Event Flag Clear Register"] pub mod refclr; #[doc = "SEFCLR (w) register accessor: Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sefclr`] module"] -#[doc(alias = "SEFCLR")] -pub type Sefclr = crate::Reg; +pub type SEFCLR = crate::Reg; #[doc = "Source Event Flag Clear Register"] pub mod sefclr; #[doc = "CEVNP0 (rw) register accessor: Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cevnp0`] module"] -#[doc(alias = "CEVNP0")] -pub type Cevnp0 = crate::Reg; +pub type CEVNP0 = crate::Reg; #[doc = "Channel Event Node Pointer Register 0"] pub mod cevnp0; #[doc = "REVNP0 (rw) register accessor: Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp0`] module"] -#[doc(alias = "REVNP0")] -pub type Revnp0 = crate::Reg; +pub type REVNP0 = crate::Reg; #[doc = "Result Event Node Pointer Register 0"] pub mod revnp0; #[doc = "REVNP1 (rw) register accessor: Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@revnp1`] module"] -#[doc(alias = "REVNP1")] -pub type Revnp1 = crate::Reg; +pub type REVNP1 = crate::Reg; #[doc = "Result Event Node Pointer Register 1"] pub mod revnp1; #[doc = "SEVNP (rw) register accessor: Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sevnp`] module"] -#[doc(alias = "SEVNP")] -pub type Sevnp = crate::Reg; +pub type SEVNP = crate::Reg; #[doc = "Source Event Node Pointer Register"] pub mod sevnp; #[doc = "SRACT (w) register accessor: Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sract`] module"] -#[doc(alias = "SRACT")] -pub type Sract = crate::Reg; +pub type SRACT = crate::Reg; #[doc = "Service Request Software Activation Trigger"] pub mod sract; #[doc = "EMUXCTR (rw) register accessor: External Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@emuxctr`] module"] -#[doc(alias = "EMUXCTR")] -pub type Emuxctr = crate::Reg; +pub type EMUXCTR = crate::Reg; #[doc = "External Multiplexer Control Register"] pub mod emuxctr; #[doc = "VFR (rw) register accessor: Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vfr`] module"] -#[doc(alias = "VFR")] -pub type Vfr = crate::Reg; +pub type VFR = crate::Reg; #[doc = "Valid Flag Register"] pub mod vfr; #[doc = "CHCTR (rw) register accessor: Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chctr`] module"] -#[doc(alias = "CHCTR")] -pub type Chctr = crate::Reg; +pub type CHCTR = crate::Reg; #[doc = "Channel Ctrl. Reg."] pub mod chctr; #[doc = "RCR (rw) register accessor: Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rcr`] module"] -#[doc(alias = "RCR")] -pub type Rcr = crate::Reg; +pub type RCR = crate::Reg; #[doc = "Result Control Register"] pub mod rcr; #[doc = "RES (rw) register accessor: Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`]. WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@res`] module"] -#[doc(alias = "RES")] -pub type Res = crate::Reg; +pub type RES = crate::Reg; #[doc = "Result Register"] pub mod res; #[doc = "RESD (r) register accessor: Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@resd`] module"] -#[doc(alias = "RESD")] -pub type Resd = crate::Reg; +pub type RESD = crate::Reg; #[doc = "Result Register, Debug"] pub mod resd; diff --git a/src/vadc_g0/alias.rs b/src/vadc_g0/alias.rs index 51e6b667..13fce7b5 100644 --- a/src/vadc_g0/alias.rs +++ b/src/vadc_g0/alias.rs @@ -1,55 +1,55 @@ #[doc = "Register `ALIAS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ALIAS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ALIAS0` reader - Alias Value for CH0 Conversion Requests"] -pub type Alias0R = crate::FieldReader; +pub type ALIAS0_R = crate::FieldReader; #[doc = "Field `ALIAS0` writer - Alias Value for CH0 Conversion Requests"] -pub type Alias0W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ALIAS0_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Field `ALIAS1` reader - Alias Value for CH1 Conversion Requests"] -pub type Alias1R = crate::FieldReader; +pub type ALIAS1_R = crate::FieldReader; #[doc = "Field `ALIAS1` writer - Alias Value for CH1 Conversion Requests"] -pub type Alias1W<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type ALIAS1_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; impl R { #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"] #[inline(always)] - pub fn alias0(&self) -> Alias0R { - Alias0R::new((self.bits & 0x1f) as u8) + pub fn alias0(&self) -> ALIAS0_R { + ALIAS0_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"] #[inline(always)] - pub fn alias1(&self) -> Alias1R { - Alias1R::new(((self.bits >> 8) & 0x1f) as u8) + pub fn alias1(&self) -> ALIAS1_R { + ALIAS1_R::new(((self.bits >> 8) & 0x1f) as u8) } } impl W { #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"] #[inline(always)] #[must_use] - pub fn alias0(&mut self) -> Alias0W { - Alias0W::new(self, 0) + pub fn alias0(&mut self) -> ALIAS0_W { + ALIAS0_W::new(self, 0) } #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"] #[inline(always)] #[must_use] - pub fn alias1(&mut self) -> Alias1W { - Alias1W::new(self, 8) + pub fn alias1(&mut self) -> ALIAS1_W { + ALIAS1_W::new(self, 8) } } #[doc = "Alias Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`alias::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`alias::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AliasSpec; -impl crate::RegisterSpec for AliasSpec { +pub struct ALIAS_SPEC; +impl crate::RegisterSpec for ALIAS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`alias::R`](R) reader structure"] -impl crate::Readable for AliasSpec {} +impl crate::Readable for ALIAS_SPEC {} #[doc = "`write(|w| ..)` method takes [`alias::W`](W) writer structure"] -impl crate::Writable for AliasSpec { +impl crate::Writable for ALIAS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ALIAS to value 0x0100"] -impl crate::Resettable for AliasSpec { +impl crate::Resettable for ALIAS_SPEC { const RESET_VALUE: u32 = 0x0100; } diff --git a/src/vadc_g0/arbcfg.rs b/src/vadc_g0/arbcfg.rs index 1ab2ddb5..2cee9f1b 100644 --- a/src/vadc_g0/arbcfg.rs +++ b/src/vadc_g0/arbcfg.rs @@ -1,72 +1,72 @@ #[doc = "Register `ARBCFG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ARBCFG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ANONC` reader - Analog Converter Control"] -pub type AnoncR = crate::FieldReader; +pub type ANONC_R = crate::FieldReader; #[doc = "Field `ANONC` writer - Analog Converter Control"] -pub type AnoncW<'a, REG> = crate::FieldWriter<'a, REG, 2>; +pub type ANONC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>; #[doc = "Arbitration Round Length\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Arbrnd { +pub enum ARBRND_A { #[doc = "0: 4 arbitration slots per round (tARB = 4 / fADCD)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 8 arbitration slots per round (tARB = 8 / fADCD)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 16 arbitration slots per round (tARB = 16 / fADCD)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: 20 arbitration slots per round (tARB = 20 / fADCD)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Arbrnd) -> Self { + fn from(variant: ARBRND_A) -> Self { variant as _ } } -impl crate::FieldSpec for Arbrnd { +impl crate::FieldSpec for ARBRND_A { type Ux = u8; } -impl crate::IsEnum for Arbrnd {} +impl crate::IsEnum for ARBRND_A {} #[doc = "Field `ARBRND` reader - Arbitration Round Length"] -pub type ArbrndR = crate::FieldReader; -impl ArbrndR { +pub type ARBRND_R = crate::FieldReader; +impl ARBRND_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arbrnd { + pub const fn variant(&self) -> ARBRND_A { match self.bits { - 0 => Arbrnd::Value1, - 1 => Arbrnd::Value2, - 2 => Arbrnd::Value3, - 3 => Arbrnd::Value4, + 0 => ARBRND_A::VALUE1, + 1 => ARBRND_A::VALUE2, + 2 => ARBRND_A::VALUE3, + 3 => ARBRND_A::VALUE4, _ => unreachable!(), } } #[doc = "4 arbitration slots per round (tARB = 4 / fADCD)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arbrnd::Value1 + *self == ARBRND_A::VALUE1 } #[doc = "8 arbitration slots per round (tARB = 8 / fADCD)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arbrnd::Value2 + *self == ARBRND_A::VALUE2 } #[doc = "16 arbitration slots per round (tARB = 16 / fADCD)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Arbrnd::Value3 + *self == ARBRND_A::VALUE3 } #[doc = "20 arbitration slots per round (tARB = 20 / fADCD)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Arbrnd::Value4 + *self == ARBRND_A::VALUE4 } } #[doc = "Field `ARBRND` writer - Arbitration Round Length"] -pub type ArbrndW<'a, REG> = crate::FieldWriter<'a, REG, 2, Arbrnd, crate::Safe>; -impl<'a, REG> ArbrndW<'a, REG> +pub type ARBRND_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ARBRND_A, crate::Safe>; +impl<'a, REG> ARBRND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,298 +74,298 @@ where #[doc = "4 arbitration slots per round (tARB = 4 / fADCD)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arbrnd::Value1) + self.variant(ARBRND_A::VALUE1) } #[doc = "8 arbitration slots per round (tARB = 8 / fADCD)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arbrnd::Value2) + self.variant(ARBRND_A::VALUE2) } #[doc = "16 arbitration slots per round (tARB = 16 / fADCD)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Arbrnd::Value3) + self.variant(ARBRND_A::VALUE3) } #[doc = "20 arbitration slots per round (tARB = 20 / fADCD)"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Arbrnd::Value4) + self.variant(ARBRND_A::VALUE4) } } #[doc = "Arbitration Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Arbm { +pub enum ARBM_A { #[doc = "0: The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Arbm) -> Self { + fn from(variant: ARBM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ARBM` reader - Arbitration Mode"] -pub type ArbmR = crate::BitReader; -impl ArbmR { +pub type ARBM_R = crate::BitReader; +impl ARBM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Arbm { + pub const fn variant(&self) -> ARBM_A { match self.bits { - false => Arbm::Value1, - true => Arbm::Value2, + false => ARBM_A::VALUE1, + true => ARBM_A::VALUE2, } } #[doc = "The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Arbm::Value1 + *self == ARBM_A::VALUE1 } #[doc = "The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Arbm::Value2 + *self == ARBM_A::VALUE2 } } #[doc = "Field `ARBM` writer - Arbitration Mode"] -pub type ArbmW<'a, REG> = crate::BitWriter<'a, REG, Arbm>; -impl<'a, REG> ArbmW<'a, REG> +pub type ARBM_W<'a, REG> = crate::BitWriter<'a, REG, ARBM_A>; +impl<'a, REG> ARBM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The arbiter runs permanently. This setting is required for a synchronization slave (see ) and for equidistant sampling using the signal ARBCNT (see )."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Arbm::Value1) + self.variant(ARBM_A::VALUE1) } #[doc = "The arbiter only runs if at least one conversion request of an enabled request source is pending. This setting ensures a reproducible latency from an incoming request to the conversion start, if the converter is idle. Synchronized conversions are not supported."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Arbm::Value2) + self.variant(ARBM_A::VALUE2) } } #[doc = "Analog Converter Control Status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Anons { +pub enum ANONS_A { #[doc = "0: Analog converter off"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Normal operation (permanently on)"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Anons) -> Self { + fn from(variant: ANONS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Anons { +impl crate::FieldSpec for ANONS_A { type Ux = u8; } -impl crate::IsEnum for Anons {} +impl crate::IsEnum for ANONS_A {} #[doc = "Field `ANONS` reader - Analog Converter Control Status"] -pub type AnonsR = crate::FieldReader; -impl AnonsR { +pub type ANONS_R = crate::FieldReader; +impl ANONS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Anons::Value1), - 3 => Some(Anons::Value4), + 0 => Some(ANONS_A::VALUE1), + 3 => Some(ANONS_A::VALUE4), _ => None, } } #[doc = "Analog converter off"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Anons::Value1 + *self == ANONS_A::VALUE1 } #[doc = "Normal operation (permanently on)"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Anons::Value4 + *self == ANONS_A::VALUE4 } } #[doc = "Start-Up Calibration Active Indication\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cal { +pub enum CAL_A { #[doc = "0: Completed or not yet started"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Start-up calibration phase is active"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cal) -> Self { + fn from(variant: CAL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CAL` reader - Start-Up Calibration Active Indication"] -pub type CalR = crate::BitReader; -impl CalR { +pub type CAL_R = crate::BitReader; +impl CAL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cal { + pub const fn variant(&self) -> CAL_A { match self.bits { - false => Cal::Value1, - true => Cal::Value2, + false => CAL_A::VALUE1, + true => CAL_A::VALUE2, } } #[doc = "Completed or not yet started"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cal::Value1 + *self == CAL_A::VALUE1 } #[doc = "Start-up calibration phase is active"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cal::Value2 + *self == CAL_A::VALUE2 } } #[doc = "Converter Busy Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Busy { +pub enum BUSY_A { #[doc = "0: Not busy"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Converter is busy with a conversion"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Busy) -> Self { + fn from(variant: BUSY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BUSY` reader - Converter Busy Flag"] -pub type BusyR = crate::BitReader; -impl BusyR { +pub type BUSY_R = crate::BitReader; +impl BUSY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Busy { + pub const fn variant(&self) -> BUSY_A { match self.bits { - false => Busy::Value1, - true => Busy::Value2, + false => BUSY_A::VALUE1, + true => BUSY_A::VALUE2, } } #[doc = "Not busy"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Busy::Value1 + *self == BUSY_A::VALUE1 } #[doc = "Converter is busy with a conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Busy::Value2 + *self == BUSY_A::VALUE2 } } #[doc = "Sample Phase Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sample { +pub enum SAMPLE_A { #[doc = "0: Converting or idle"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Input signal is currently sampled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sample) -> Self { + fn from(variant: SAMPLE_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SAMPLE` reader - Sample Phase Flag"] -pub type SampleR = crate::BitReader; -impl SampleR { +pub type SAMPLE_R = crate::BitReader; +impl SAMPLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sample { + pub const fn variant(&self) -> SAMPLE_A { match self.bits { - false => Sample::Value1, - true => Sample::Value2, + false => SAMPLE_A::VALUE1, + true => SAMPLE_A::VALUE2, } } #[doc = "Converting or idle"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sample::Value1 + *self == SAMPLE_A::VALUE1 } #[doc = "Input signal is currently sampled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sample::Value2 + *self == SAMPLE_A::VALUE2 } } impl R { #[doc = "Bits 0:1 - Analog Converter Control"] #[inline(always)] - pub fn anonc(&self) -> AnoncR { - AnoncR::new((self.bits & 3) as u8) + pub fn anonc(&self) -> ANONC_R { + ANONC_R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - Arbitration Round Length"] #[inline(always)] - pub fn arbrnd(&self) -> ArbrndR { - ArbrndR::new(((self.bits >> 4) & 3) as u8) + pub fn arbrnd(&self) -> ARBRND_R { + ARBRND_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 7 - Arbitration Mode"] #[inline(always)] - pub fn arbm(&self) -> ArbmR { - ArbmR::new(((self.bits >> 7) & 1) != 0) + pub fn arbm(&self) -> ARBM_R { + ARBM_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 16:17 - Analog Converter Control Status"] #[inline(always)] - pub fn anons(&self) -> AnonsR { - AnonsR::new(((self.bits >> 16) & 3) as u8) + pub fn anons(&self) -> ANONS_R { + ANONS_R::new(((self.bits >> 16) & 3) as u8) } #[doc = "Bit 28 - Start-Up Calibration Active Indication"] #[inline(always)] - pub fn cal(&self) -> CalR { - CalR::new(((self.bits >> 28) & 1) != 0) + pub fn cal(&self) -> CAL_R { + CAL_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 30 - Converter Busy Flag"] #[inline(always)] - pub fn busy(&self) -> BusyR { - BusyR::new(((self.bits >> 30) & 1) != 0) + pub fn busy(&self) -> BUSY_R { + BUSY_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Sample Phase Flag"] #[inline(always)] - pub fn sample(&self) -> SampleR { - SampleR::new(((self.bits >> 31) & 1) != 0) + pub fn sample(&self) -> SAMPLE_R { + SAMPLE_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Analog Converter Control"] #[inline(always)] #[must_use] - pub fn anonc(&mut self) -> AnoncW { - AnoncW::new(self, 0) + pub fn anonc(&mut self) -> ANONC_W { + ANONC_W::new(self, 0) } #[doc = "Bits 4:5 - Arbitration Round Length"] #[inline(always)] #[must_use] - pub fn arbrnd(&mut self) -> ArbrndW { - ArbrndW::new(self, 4) + pub fn arbrnd(&mut self) -> ARBRND_W { + ARBRND_W::new(self, 4) } #[doc = "Bit 7 - Arbitration Mode"] #[inline(always)] #[must_use] - pub fn arbm(&mut self) -> ArbmW { - ArbmW::new(self, 7) + pub fn arbm(&mut self) -> ARBM_W { + ARBM_W::new(self, 7) } } #[doc = "Arbitration Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbcfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbcfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ArbcfgSpec; -impl crate::RegisterSpec for ArbcfgSpec { +pub struct ARBCFG_SPEC; +impl crate::RegisterSpec for ARBCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`arbcfg::R`](R) reader structure"] -impl crate::Readable for ArbcfgSpec {} +impl crate::Readable for ARBCFG_SPEC {} #[doc = "`write(|w| ..)` method takes [`arbcfg::W`](W) writer structure"] -impl crate::Writable for ArbcfgSpec { +impl crate::Writable for ARBCFG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ARBCFG to value 0"] -impl crate::Resettable for ArbcfgSpec { +impl crate::Resettable for ARBCFG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/arbpr.rs b/src/vadc_g0/arbpr.rs index e4dc333d..3284fcf1 100644 --- a/src/vadc_g0/arbpr.rs +++ b/src/vadc_g0/arbpr.rs @@ -1,52 +1,52 @@ #[doc = "Register `ARBPR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ARBPR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Prio0 { +pub enum PRIO0_A { #[doc = "0: Lowest priority is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Highest priority is selected."] - Value2 = 3, + VALUE2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Prio0) -> Self { + fn from(variant: PRIO0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Prio0 { +impl crate::FieldSpec for PRIO0_A { type Ux = u8; } -impl crate::IsEnum for Prio0 {} +impl crate::IsEnum for PRIO0_A {} #[doc = "Field `PRIO0` reader - Priority of Request Source x"] -pub type Prio0R = crate::FieldReader; -impl Prio0R { +pub type PRIO0_R = crate::FieldReader; +impl PRIO0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Prio0::Value1), - 3 => Some(Prio0::Value2), + 0 => Some(PRIO0_A::VALUE1), + 3 => Some(PRIO0_A::VALUE2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prio0::Value1 + *self == PRIO0_A::VALUE1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prio0::Value2 + *self == PRIO0_A::VALUE2 } } #[doc = "Field `PRIO0` writer - Priority of Request Source x"] -pub type Prio0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio0>; -impl<'a, REG> Prio0W<'a, REG> +pub type PRIO0_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO0_A>; +impl<'a, REG> PRIO0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -54,112 +54,112 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prio0::Value1) + self.variant(PRIO0_A::VALUE1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prio0::Value2) + self.variant(PRIO0_A::VALUE2) } } #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Csm0 { +pub enum CSM0_A { #[doc = "0: Wait-for-start mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Csm0) -> Self { + fn from(variant: CSM0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSM0` reader - Conversion Start Mode of Request Source x"] -pub type Csm0R = crate::BitReader; -impl Csm0R { +pub type CSM0_R = crate::BitReader; +impl CSM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Csm0 { + pub const fn variant(&self) -> CSM0_A { match self.bits { - false => Csm0::Value1, - true => Csm0::Value2, + false => CSM0_A::VALUE1, + true => CSM0_A::VALUE2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Csm0::Value1 + *self == CSM0_A::VALUE1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Csm0::Value2 + *self == CSM0_A::VALUE2 } } #[doc = "Field `CSM0` writer - Conversion Start Mode of Request Source x"] -pub type Csm0W<'a, REG> = crate::BitWriter<'a, REG, Csm0>; -impl<'a, REG> Csm0W<'a, REG> +pub type CSM0_W<'a, REG> = crate::BitWriter<'a, REG, CSM0_A>; +impl<'a, REG> CSM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Csm0::Value1) + self.variant(CSM0_A::VALUE1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Csm0::Value2) + self.variant(CSM0_A::VALUE2) } } #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Prio1 { +pub enum PRIO1_A { #[doc = "0: Lowest priority is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Highest priority is selected."] - Value2 = 3, + VALUE2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Prio1) -> Self { + fn from(variant: PRIO1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Prio1 { +impl crate::FieldSpec for PRIO1_A { type Ux = u8; } -impl crate::IsEnum for Prio1 {} +impl crate::IsEnum for PRIO1_A {} #[doc = "Field `PRIO1` reader - Priority of Request Source x"] -pub type Prio1R = crate::FieldReader; -impl Prio1R { +pub type PRIO1_R = crate::FieldReader; +impl PRIO1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Prio1::Value1), - 3 => Some(Prio1::Value2), + 0 => Some(PRIO1_A::VALUE1), + 3 => Some(PRIO1_A::VALUE2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prio1::Value1 + *self == PRIO1_A::VALUE1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prio1::Value2 + *self == PRIO1_A::VALUE2 } } #[doc = "Field `PRIO1` writer - Priority of Request Source x"] -pub type Prio1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio1>; -impl<'a, REG> Prio1W<'a, REG> +pub type PRIO1_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO1_A>; +impl<'a, REG> PRIO1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -167,112 +167,112 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prio1::Value1) + self.variant(PRIO1_A::VALUE1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prio1::Value2) + self.variant(PRIO1_A::VALUE2) } } #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Csm1 { +pub enum CSM1_A { #[doc = "0: Wait-for-start mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Csm1) -> Self { + fn from(variant: CSM1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSM1` reader - Conversion Start Mode of Request Source x"] -pub type Csm1R = crate::BitReader; -impl Csm1R { +pub type CSM1_R = crate::BitReader; +impl CSM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Csm1 { + pub const fn variant(&self) -> CSM1_A { match self.bits { - false => Csm1::Value1, - true => Csm1::Value2, + false => CSM1_A::VALUE1, + true => CSM1_A::VALUE2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Csm1::Value1 + *self == CSM1_A::VALUE1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Csm1::Value2 + *self == CSM1_A::VALUE2 } } #[doc = "Field `CSM1` writer - Conversion Start Mode of Request Source x"] -pub type Csm1W<'a, REG> = crate::BitWriter<'a, REG, Csm1>; -impl<'a, REG> Csm1W<'a, REG> +pub type CSM1_W<'a, REG> = crate::BitWriter<'a, REG, CSM1_A>; +impl<'a, REG> CSM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Csm1::Value1) + self.variant(CSM1_A::VALUE1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Csm1::Value2) + self.variant(CSM1_A::VALUE2) } } #[doc = "Priority of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Prio2 { +pub enum PRIO2_A { #[doc = "0: Lowest priority is selected."] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Highest priority is selected."] - Value2 = 3, + VALUE2 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Prio2) -> Self { + fn from(variant: PRIO2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Prio2 { +impl crate::FieldSpec for PRIO2_A { type Ux = u8; } -impl crate::IsEnum for Prio2 {} +impl crate::IsEnum for PRIO2_A {} #[doc = "Field `PRIO2` reader - Priority of Request Source x"] -pub type Prio2R = crate::FieldReader; -impl Prio2R { +pub type PRIO2_R = crate::FieldReader; +impl PRIO2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Prio2::Value1), - 3 => Some(Prio2::Value2), + 0 => Some(PRIO2_A::VALUE1), + 3 => Some(PRIO2_A::VALUE2), _ => None, } } #[doc = "Lowest priority is selected."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Prio2::Value1 + *self == PRIO2_A::VALUE1 } #[doc = "Highest priority is selected."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Prio2::Value2 + *self == PRIO2_A::VALUE2 } } #[doc = "Field `PRIO2` writer - Priority of Request Source x"] -pub type Prio2W<'a, REG> = crate::FieldWriter<'a, REG, 2, Prio2>; -impl<'a, REG> Prio2W<'a, REG> +pub type PRIO2_W<'a, REG> = crate::FieldWriter<'a, REG, 2, PRIO2_A>; +impl<'a, REG> PRIO2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -280,343 +280,343 @@ where #[doc = "Lowest priority is selected."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Prio2::Value1) + self.variant(PRIO2_A::VALUE1) } #[doc = "Highest priority is selected."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Prio2::Value2) + self.variant(PRIO2_A::VALUE2) } } #[doc = "Conversion Start Mode of Request Source x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Csm2 { +pub enum CSM2_A { #[doc = "0: Wait-for-start mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Csm2) -> Self { + fn from(variant: CSM2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CSM2` reader - Conversion Start Mode of Request Source x"] -pub type Csm2R = crate::BitReader; -impl Csm2R { +pub type CSM2_R = crate::BitReader; +impl CSM2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Csm2 { + pub const fn variant(&self) -> CSM2_A { match self.bits { - false => Csm2::Value1, - true => Csm2::Value2, + false => CSM2_A::VALUE1, + true => CSM2_A::VALUE2, } } #[doc = "Wait-for-start mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Csm2::Value1 + *self == CSM2_A::VALUE1 } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Csm2::Value2 + *self == CSM2_A::VALUE2 } } #[doc = "Field `CSM2` writer - Conversion Start Mode of Request Source x"] -pub type Csm2W<'a, REG> = crate::BitWriter<'a, REG, Csm2>; -impl<'a, REG> Csm2W<'a, REG> +pub type CSM2_W<'a, REG> = crate::BitWriter<'a, REG, CSM2_A>; +impl<'a, REG> CSM2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Wait-for-start mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Csm2::Value1) + self.variant(CSM2_A::VALUE1) } #[doc = "Cancel-inject-repeat mode, i.e. this source can cancel conversion of other sources."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Csm2::Value2) + self.variant(CSM2_A::VALUE2) } } #[doc = "Arbitration Slot 0 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Asen0 { +pub enum ASEN0_A { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Asen0) -> Self { + fn from(variant: ASEN0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASEN0` reader - Arbitration Slot 0 Enable"] -pub type Asen0R = crate::BitReader; -impl Asen0R { +pub type ASEN0_R = crate::BitReader; +impl ASEN0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Asen0 { + pub const fn variant(&self) -> ASEN0_A { match self.bits { - false => Asen0::Value1, - true => Asen0::Value2, + false => ASEN0_A::VALUE1, + true => ASEN0_A::VALUE2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Asen0::Value1 + *self == ASEN0_A::VALUE1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Asen0::Value2 + *self == ASEN0_A::VALUE2 } } #[doc = "Field `ASEN0` writer - Arbitration Slot 0 Enable"] -pub type Asen0W<'a, REG> = crate::BitWriter<'a, REG, Asen0>; -impl<'a, REG> Asen0W<'a, REG> +pub type ASEN0_W<'a, REG> = crate::BitWriter<'a, REG, ASEN0_A>; +impl<'a, REG> ASEN0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Asen0::Value1) + self.variant(ASEN0_A::VALUE1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Asen0::Value2) + self.variant(ASEN0_A::VALUE2) } } #[doc = "Arbitration Slot 1 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Asen1 { +pub enum ASEN1_A { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Asen1) -> Self { + fn from(variant: ASEN1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASEN1` reader - Arbitration Slot 1 Enable"] -pub type Asen1R = crate::BitReader; -impl Asen1R { +pub type ASEN1_R = crate::BitReader; +impl ASEN1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Asen1 { + pub const fn variant(&self) -> ASEN1_A { match self.bits { - false => Asen1::Value1, - true => Asen1::Value2, + false => ASEN1_A::VALUE1, + true => ASEN1_A::VALUE2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Asen1::Value1 + *self == ASEN1_A::VALUE1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Asen1::Value2 + *self == ASEN1_A::VALUE2 } } #[doc = "Field `ASEN1` writer - Arbitration Slot 1 Enable"] -pub type Asen1W<'a, REG> = crate::BitWriter<'a, REG, Asen1>; -impl<'a, REG> Asen1W<'a, REG> +pub type ASEN1_W<'a, REG> = crate::BitWriter<'a, REG, ASEN1_A>; +impl<'a, REG> ASEN1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Asen1::Value1) + self.variant(ASEN1_A::VALUE1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Asen1::Value2) + self.variant(ASEN1_A::VALUE2) } } #[doc = "Arbitration Slot 2 Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Asen2 { +pub enum ASEN2_A { #[doc = "0: The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Asen2) -> Self { + fn from(variant: ASEN2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASEN2` reader - Arbitration Slot 2 Enable"] -pub type Asen2R = crate::BitReader; -impl Asen2R { +pub type ASEN2_R = crate::BitReader; +impl ASEN2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Asen2 { + pub const fn variant(&self) -> ASEN2_A { match self.bits { - false => Asen2::Value1, - true => Asen2::Value2, + false => ASEN2_A::VALUE1, + true => ASEN2_A::VALUE2, } } #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Asen2::Value1 + *self == ASEN2_A::VALUE1 } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Asen2::Value2 + *self == ASEN2_A::VALUE2 } } #[doc = "Field `ASEN2` writer - Arbitration Slot 2 Enable"] -pub type Asen2W<'a, REG> = crate::BitWriter<'a, REG, Asen2>; -impl<'a, REG> Asen2W<'a, REG> +pub type ASEN2_W<'a, REG> = crate::BitWriter<'a, REG, ASEN2_A>; +impl<'a, REG> ASEN2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "The corresponding arbitration slot is disabled and considered as empty. Pending conversion requests from the associated request source are disregarded."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Asen2::Value1) + self.variant(ASEN2_A::VALUE1) } #[doc = "The corresponding arbitration slot is enabled. Pending conversion requests from the associated request source are arbitrated."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Asen2::Value2) + self.variant(ASEN2_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Priority of Request Source x"] #[inline(always)] - pub fn prio0(&self) -> Prio0R { - Prio0R::new((self.bits & 3) as u8) + pub fn prio0(&self) -> PRIO0_R { + PRIO0_R::new((self.bits & 3) as u8) } #[doc = "Bit 3 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm0(&self) -> Csm0R { - Csm0R::new(((self.bits >> 3) & 1) != 0) + pub fn csm0(&self) -> CSM0_R { + CSM0_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bits 4:5 - Priority of Request Source x"] #[inline(always)] - pub fn prio1(&self) -> Prio1R { - Prio1R::new(((self.bits >> 4) & 3) as u8) + pub fn prio1(&self) -> PRIO1_R { + PRIO1_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bit 7 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm1(&self) -> Csm1R { - Csm1R::new(((self.bits >> 7) & 1) != 0) + pub fn csm1(&self) -> CSM1_R { + CSM1_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bits 8:9 - Priority of Request Source x"] #[inline(always)] - pub fn prio2(&self) -> Prio2R { - Prio2R::new(((self.bits >> 8) & 3) as u8) + pub fn prio2(&self) -> PRIO2_R { + PRIO2_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 11 - Conversion Start Mode of Request Source x"] #[inline(always)] - pub fn csm2(&self) -> Csm2R { - Csm2R::new(((self.bits >> 11) & 1) != 0) + pub fn csm2(&self) -> CSM2_R { + CSM2_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 24 - Arbitration Slot 0 Enable"] #[inline(always)] - pub fn asen0(&self) -> Asen0R { - Asen0R::new(((self.bits >> 24) & 1) != 0) + pub fn asen0(&self) -> ASEN0_R { + ASEN0_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bit 25 - Arbitration Slot 1 Enable"] #[inline(always)] - pub fn asen1(&self) -> Asen1R { - Asen1R::new(((self.bits >> 25) & 1) != 0) + pub fn asen1(&self) -> ASEN1_R { + ASEN1_R::new(((self.bits >> 25) & 1) != 0) } #[doc = "Bit 26 - Arbitration Slot 2 Enable"] #[inline(always)] - pub fn asen2(&self) -> Asen2R { - Asen2R::new(((self.bits >> 26) & 1) != 0) + pub fn asen2(&self) -> ASEN2_R { + ASEN2_R::new(((self.bits >> 26) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio0(&mut self) -> Prio0W { - Prio0W::new(self, 0) + pub fn prio0(&mut self) -> PRIO0_W { + PRIO0_W::new(self, 0) } #[doc = "Bit 3 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm0(&mut self) -> Csm0W { - Csm0W::new(self, 3) + pub fn csm0(&mut self) -> CSM0_W { + CSM0_W::new(self, 3) } #[doc = "Bits 4:5 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio1(&mut self) -> Prio1W { - Prio1W::new(self, 4) + pub fn prio1(&mut self) -> PRIO1_W { + PRIO1_W::new(self, 4) } #[doc = "Bit 7 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm1(&mut self) -> Csm1W { - Csm1W::new(self, 7) + pub fn csm1(&mut self) -> CSM1_W { + CSM1_W::new(self, 7) } #[doc = "Bits 8:9 - Priority of Request Source x"] #[inline(always)] #[must_use] - pub fn prio2(&mut self) -> Prio2W { - Prio2W::new(self, 8) + pub fn prio2(&mut self) -> PRIO2_W { + PRIO2_W::new(self, 8) } #[doc = "Bit 11 - Conversion Start Mode of Request Source x"] #[inline(always)] #[must_use] - pub fn csm2(&mut self) -> Csm2W { - Csm2W::new(self, 11) + pub fn csm2(&mut self) -> CSM2_W { + CSM2_W::new(self, 11) } #[doc = "Bit 24 - Arbitration Slot 0 Enable"] #[inline(always)] #[must_use] - pub fn asen0(&mut self) -> Asen0W { - Asen0W::new(self, 24) + pub fn asen0(&mut self) -> ASEN0_W { + ASEN0_W::new(self, 24) } #[doc = "Bit 25 - Arbitration Slot 1 Enable"] #[inline(always)] #[must_use] - pub fn asen1(&mut self) -> Asen1W { - Asen1W::new(self, 25) + pub fn asen1(&mut self) -> ASEN1_W { + ASEN1_W::new(self, 25) } #[doc = "Bit 26 - Arbitration Slot 2 Enable"] #[inline(always)] #[must_use] - pub fn asen2(&mut self) -> Asen2W { - Asen2W::new(self, 26) + pub fn asen2(&mut self) -> ASEN2_W { + ASEN2_W::new(self, 26) } } #[doc = "Arbitration Priority Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`arbpr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`arbpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ArbprSpec; -impl crate::RegisterSpec for ArbprSpec { +pub struct ARBPR_SPEC; +impl crate::RegisterSpec for ARBPR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`arbpr::R`](R) reader structure"] -impl crate::Readable for ArbprSpec {} +impl crate::Readable for ARBPR_SPEC {} #[doc = "`write(|w| ..)` method takes [`arbpr::W`](W) writer structure"] -impl crate::Writable for ArbprSpec { +impl crate::Writable for ARBPR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ARBPR to value 0"] -impl crate::Resettable for ArbprSpec { +impl crate::Resettable for ARBPR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/asctrl.rs b/src/vadc_g0/asctrl.rs index 3fa5def6..6897fe4e 100644 --- a/src/vadc_g0/asctrl.rs +++ b/src/vadc_g0/asctrl.rs @@ -1,60 +1,60 @@ #[doc = "Register `ASCTRL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASCTRL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srcresreg { +pub enum SRCRESREG_A { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Store result in group result register GxRES1"] - Value2 = 1, + VALUE2 = 1, #[doc = "15: Store result in group result register GxRES15"] - Value3 = 15, + VALUE3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srcresreg) -> Self { + fn from(variant: SRCRESREG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srcresreg { +impl crate::FieldSpec for SRCRESREG_A { type Ux = u8; } -impl crate::IsEnum for Srcresreg {} +impl crate::IsEnum for SRCRESREG_A {} #[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SrcresregR = crate::FieldReader; -impl SrcresregR { +pub type SRCRESREG_R = crate::FieldReader; +impl SRCRESREG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srcresreg::Value1), - 1 => Some(Srcresreg::Value2), - 15 => Some(Srcresreg::Value3), + 0 => Some(SRCRESREG_A::VALUE1), + 1 => Some(SRCRESREG_A::VALUE2), + 15 => Some(SRCRESREG_A::VALUE3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srcresreg::Value1 + *self == SRCRESREG_A::VALUE1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srcresreg::Value2 + *self == SRCRESREG_A::VALUE2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Srcresreg::Value3 + *self == SRCRESREG_A::VALUE3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; -impl<'a, REG> SrcresregW<'a, REG> +pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; +impl<'a, REG> SRCRESREG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,86 +62,86 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value1) + self.variant(SRCRESREG_A::VALUE1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value2) + self.variant(SRCRESREG_A::VALUE2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value3) + self.variant(SRCRESREG_A::VALUE3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XtselR = crate::FieldReader; +pub type XTSEL_R = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XtlvlR = crate::BitReader; +pub type XTLVL_R = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Xtmode { +pub enum XTMODE_A { #[doc = "0: No external trigger"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger event upon a falling edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Trigger event upon a rising edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Trigger event upon any edge"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Xtmode) -> Self { + fn from(variant: XTMODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Xtmode { +impl crate::FieldSpec for XTMODE_A { type Ux = u8; } -impl crate::IsEnum for Xtmode {} +impl crate::IsEnum for XTMODE_A {} #[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XtmodeR = crate::FieldReader; -impl XtmodeR { +pub type XTMODE_R = crate::FieldReader; +impl XTMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xtmode { + pub const fn variant(&self) -> XTMODE_A { match self.bits { - 0 => Xtmode::Value1, - 1 => Xtmode::Value2, - 2 => Xtmode::Value3, - 3 => Xtmode::Value4, + 0 => XTMODE_A::VALUE1, + 1 => XTMODE_A::VALUE2, + 2 => XTMODE_A::VALUE3, + 3 => XTMODE_A::VALUE4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xtmode::Value1 + *self == XTMODE_A::VALUE1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xtmode::Value2 + *self == XTMODE_A::VALUE2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Xtmode::Value3 + *self == XTMODE_A::VALUE3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Xtmode::Value4 + *self == XTMODE_A::VALUE4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XtmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Xtmode, crate::Safe>; -impl<'a, REG> XtmodeW<'a, REG> +pub type XTMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, XTMODE_A, crate::Safe>; +impl<'a, REG> XTMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,277 +149,277 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtmode::Value1) + self.variant(XTMODE_A::VALUE1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtmode::Value2) + self.variant(XTMODE_A::VALUE2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Xtmode::Value3) + self.variant(XTMODE_A::VALUE3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Xtmode::Value4) + self.variant(XTMODE_A::VALUE4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xtwc { +pub enum XTWC_A { #[doc = "0: No write access to trigger configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xtwc) -> Self { + fn from(variant: XTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; -impl<'a, REG> XtwcW<'a, REG> +pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_A>; +impl<'a, REG> XTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtwc::Value1) + self.variant(XTWC_A::VALUE1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtwc::Value2) + self.variant(XTWC_A::VALUE2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GtselR = crate::FieldReader; +pub type GTSEL_R = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GtlvlR = crate::BitReader; +pub type GTLVL_R = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gtwc { +pub enum GTWC_A { #[doc = "0: No write access to gate configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gtwc) -> Self { + fn from(variant: GTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; -impl<'a, REG> GtwcW<'a, REG> +pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_A>; +impl<'a, REG> GTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gtwc::Value1) + self.variant(GTWC_A::VALUE1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gtwc::Value2) + self.variant(GTWC_A::VALUE2) } } #[doc = "Timer Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tmen { +pub enum TMEN_A { #[doc = "0: No timer mode: standard gating mechanism can be used"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tmen) -> Self { + fn from(variant: TMEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TMEN` reader - Timer Mode Enable"] -pub type TmenR = crate::BitReader; -impl TmenR { +pub type TMEN_R = crate::BitReader; +impl TMEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tmen { + pub const fn variant(&self) -> TMEN_A { match self.bits { - false => Tmen::Value1, - true => Tmen::Value2, + false => TMEN_A::VALUE1, + true => TMEN_A::VALUE2, } } #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tmen::Value1 + *self == TMEN_A::VALUE1 } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tmen::Value2 + *self == TMEN_A::VALUE2 } } #[doc = "Field `TMEN` writer - Timer Mode Enable"] -pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; -impl<'a, REG> TmenW<'a, REG> +pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; +impl<'a, REG> TMEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tmen::Value1) + self.variant(TMEN_A::VALUE1) } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tmen::Value2) + self.variant(TMEN_A::VALUE2) } } #[doc = "Write Control for Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tmwc { +pub enum TMWC_A { #[doc = "0: No write access to timer mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield TMEN can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tmwc) -> Self { + fn from(variant: TMWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TMWC` writer - Write Control for Timer Mode"] -pub type TmwcW<'a, REG> = crate::BitWriter<'a, REG, Tmwc>; -impl<'a, REG> TmwcW<'a, REG> +pub type TMWC_W<'a, REG> = crate::BitWriter<'a, REG, TMWC_A>; +impl<'a, REG> TMWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to timer mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tmwc::Value1) + self.variant(TMWC_A::VALUE1) } #[doc = "Bitfield TMEN can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tmwc::Value2) + self.variant(TMWC_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SrcresregR { - SrcresregR::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SRCRESREG_R { + SRCRESREG_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XtselR { - XtselR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XTSEL_R { + XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XtlvlR { - XtlvlR::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XTLVL_R { + XTLVL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XtmodeR { - XtmodeR::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XTMODE_R { + XTMODE_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GtselR { - GtselR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GTSEL_R { + GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GtlvlR { - GtlvlR::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GTLVL_R { + GTLVL_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - pub fn tmen(&self) -> TmenR { - TmenR::new(((self.bits >> 28) & 1) != 0) + pub fn tmen(&self) -> TMEN_R { + TMEN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SrcresregW { - SrcresregW::new(self, 0) + pub fn srcresreg(&mut self) -> SRCRESREG_W { + SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XtselW { - XtselW::new(self, 8) + pub fn xtsel(&mut self) -> XTSEL_W { + XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XtmodeW { - XtmodeW::new(self, 13) + pub fn xtmode(&mut self) -> XTMODE_W { + XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XtwcW { - XtwcW::new(self, 15) + pub fn xtwc(&mut self) -> XTWC_W { + XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GtselW { - GtselW::new(self, 16) + pub fn gtsel(&mut self) -> GTSEL_W { + GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GtwcW { - GtwcW::new(self, 23) + pub fn gtwc(&mut self) -> GTWC_W { + GTWC_W::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TmenW { - TmenW::new(self, 28) + pub fn tmen(&mut self) -> TMEN_W { + TMEN_W::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] #[must_use] - pub fn tmwc(&mut self) -> TmwcW { - TmwcW::new(self, 31) + pub fn tmwc(&mut self) -> TMWC_W { + TMWC_W::new(self, 31) } } #[doc = "Autoscan Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AsctrlSpec; -impl crate::RegisterSpec for AsctrlSpec { +pub struct ASCTRL_SPEC; +impl crate::RegisterSpec for ASCTRL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`asctrl::R`](R) reader structure"] -impl crate::Readable for AsctrlSpec {} +impl crate::Readable for ASCTRL_SPEC {} #[doc = "`write(|w| ..)` method takes [`asctrl::W`](W) writer structure"] -impl crate::Writable for AsctrlSpec { +impl crate::Writable for ASCTRL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASCTRL to value 0"] -impl crate::Resettable for AsctrlSpec { +impl crate::Resettable for ASCTRL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/asmr.rs b/src/vadc_g0/asmr.rs index 04ef2ba9..00b81db4 100644 --- a/src/vadc_g0/asmr.rs +++ b/src/vadc_g0/asmr.rs @@ -1,68 +1,68 @@ #[doc = "Register `ASMR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASMR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Engt { +pub enum ENGT_A { #[doc = "0: No conversion requests are issued"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Conversion requests are issued if at least one pending bit is set"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Engt) -> Self { + fn from(variant: ENGT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Engt { +impl crate::FieldSpec for ENGT_A { type Ux = u8; } -impl crate::IsEnum for Engt {} +impl crate::IsEnum for ENGT_A {} #[doc = "Field `ENGT` reader - Enable Gate"] -pub type EngtR = crate::FieldReader; -impl EngtR { +pub type ENGT_R = crate::FieldReader; +impl ENGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Engt { + pub const fn variant(&self) -> ENGT_A { match self.bits { - 0 => Engt::Value1, - 1 => Engt::Value2, - 2 => Engt::Value3, - 3 => Engt::Value4, + 0 => ENGT_A::VALUE1, + 1 => ENGT_A::VALUE2, + 2 => ENGT_A::VALUE3, + 3 => ENGT_A::VALUE4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Engt::Value1 + *self == ENGT_A::VALUE1 } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Engt::Value2 + *self == ENGT_A::VALUE2 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Engt::Value3 + *self == ENGT_A::VALUE3 } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Engt::Value4 + *self == ENGT_A::VALUE4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type EngtW<'a, REG> = crate::FieldWriter<'a, REG, 2, Engt, crate::Safe>; -impl<'a, REG> EngtW<'a, REG> +pub type ENGT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENGT_A, crate::Safe>; +impl<'a, REG> ENGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,488 +70,488 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Engt::Value1) + self.variant(ENGT_A::VALUE1) } #[doc = "Conversion requests are issued if at least one pending bit is set"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Engt::Value2) + self.variant(ENGT_A::VALUE2) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 1."] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Engt::Value3) + self.variant(ENGT_A::VALUE3) } #[doc = "Conversion requests are issued if at least one pending bit is set and REQGTx = 0."] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Engt::Value4) + self.variant(ENGT_A::VALUE4) } } #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Entr { +pub enum ENTR_A { #[doc = "0: External trigger disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the load event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Entr) -> Self { + fn from(variant: ENTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type EntrR = crate::BitReader; -impl EntrR { +pub type ENTR_R = crate::BitReader; +impl ENTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Entr { + pub const fn variant(&self) -> ENTR_A { match self.bits { - false => Entr::Value1, - true => Entr::Value2, + false => ENTR_A::VALUE1, + true => ENTR_A::VALUE2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Entr::Value1 + *self == ENTR_A::VALUE1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Entr::Value2 + *self == ENTR_A::VALUE2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; -impl<'a, REG> EntrW<'a, REG> +pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; +impl<'a, REG> ENTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Entr::Value1) + self.variant(ENTR_A::VALUE1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Entr::Value2) + self.variant(ENTR_A::VALUE2) } } #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ensi { +pub enum ENSI_A { #[doc = "0: No request source interrupt"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A request source interrupt is generated upon a request source event (last pending conversion is finished)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ensi) -> Self { + fn from(variant: ENSI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type EnsiR = crate::BitReader; -impl EnsiR { +pub type ENSI_R = crate::BitReader; +impl ENSI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ensi { + pub const fn variant(&self) -> ENSI_A { match self.bits { - false => Ensi::Value1, - true => Ensi::Value2, + false => ENSI_A::VALUE1, + true => ENSI_A::VALUE2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ensi::Value1 + *self == ENSI_A::VALUE1 } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ensi::Value2 + *self == ENSI_A::VALUE2 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; -impl<'a, REG> EnsiW<'a, REG> +pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_A>; +impl<'a, REG> ENSI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ensi::Value1) + self.variant(ENSI_A::VALUE1) } #[doc = "A request source interrupt is generated upon a request source event (last pending conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ensi::Value2) + self.variant(ENSI_A::VALUE2) } } #[doc = "Autoscan Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Scan { +pub enum SCAN_A { #[doc = "0: No autoscan"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Autoscan functionality enabled: a request source event automatically generates a load event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Scan) -> Self { + fn from(variant: SCAN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SCAN` reader - Autoscan Enable"] -pub type ScanR = crate::BitReader; -impl ScanR { +pub type SCAN_R = crate::BitReader; +impl SCAN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Scan { + pub const fn variant(&self) -> SCAN_A { match self.bits { - false => Scan::Value1, - true => Scan::Value2, + false => SCAN_A::VALUE1, + true => SCAN_A::VALUE2, } } #[doc = "No autoscan"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Scan::Value1 + *self == SCAN_A::VALUE1 } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Scan::Value2 + *self == SCAN_A::VALUE2 } } #[doc = "Field `SCAN` writer - Autoscan Enable"] -pub type ScanW<'a, REG> = crate::BitWriter<'a, REG, Scan>; -impl<'a, REG> ScanW<'a, REG> +pub type SCAN_W<'a, REG> = crate::BitWriter<'a, REG, SCAN_A>; +impl<'a, REG> SCAN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No autoscan"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Scan::Value1) + self.variant(SCAN_A::VALUE1) } #[doc = "Autoscan functionality enabled: a request source event automatically generates a load event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Scan::Value2) + self.variant(SCAN_A::VALUE2) } } #[doc = "Autoscan Source Load Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ldm { +pub enum LDM_A { #[doc = "0: Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ldm) -> Self { + fn from(variant: LDM_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LDM` reader - Autoscan Source Load Event Mode"] -pub type LdmR = crate::BitReader; -impl LdmR { +pub type LDM_R = crate::BitReader; +impl LDM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ldm { + pub const fn variant(&self) -> LDM_A { match self.bits { - false => Ldm::Value1, - true => Ldm::Value2, + false => LDM_A::VALUE1, + true => LDM_A::VALUE2, } } #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ldm::Value1 + *self == LDM_A::VALUE1 } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ldm::Value2 + *self == LDM_A::VALUE2 } } #[doc = "Field `LDM` writer - Autoscan Source Load Event Mode"] -pub type LdmW<'a, REG> = crate::BitWriter<'a, REG, Ldm>; -impl<'a, REG> LdmW<'a, REG> +pub type LDM_W<'a, REG> = crate::BitWriter<'a, REG, LDM_A>; +impl<'a, REG> LDM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode: Copy all bits from the select registers to the pending registers upon a load event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ldm::Value1) + self.variant(LDM_A::VALUE1) } #[doc = "Combine mode: Set all pending bits that are set in the select registers upon a load event (logic OR)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ldm::Value2) + self.variant(LDM_A::VALUE2) } } #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Reqgt { +pub enum REQGT_A { #[doc = "0: The gate input is low"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The gate input is high"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Reqgt) -> Self { + fn from(variant: REQGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REQGT` reader - Request Gate Level"] -pub type ReqgtR = crate::BitReader; -impl ReqgtR { +pub type REQGT_R = crate::BitReader; +impl REQGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Reqgt { + pub const fn variant(&self) -> REQGT_A { match self.bits { - false => Reqgt::Value1, - true => Reqgt::Value2, + false => REQGT_A::VALUE1, + true => REQGT_A::VALUE2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Reqgt::Value1 + *self == REQGT_A::VALUE1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Reqgt::Value2 + *self == REQGT_A::VALUE2 } } #[doc = "Clear Pending Bits\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Clrpnd { +pub enum CLRPND_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The bits in register GxASPNDx are cleared"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Clrpnd) -> Self { + fn from(variant: CLRPND_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRPND` writer - Clear Pending Bits"] -pub type ClrpndW<'a, REG> = crate::BitWriter<'a, REG, Clrpnd>; -impl<'a, REG> ClrpndW<'a, REG> +pub type CLRPND_W<'a, REG> = crate::BitWriter<'a, REG, CLRPND_A>; +impl<'a, REG> CLRPND_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clrpnd::Value1) + self.variant(CLRPND_A::VALUE1) } #[doc = "The bits in register GxASPNDx are cleared"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Clrpnd::Value2) + self.variant(CLRPND_A::VALUE2) } } #[doc = "Generate Load Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ldev { +pub enum LDEV_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A load event is generated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ldev) -> Self { + fn from(variant: LDEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `LDEV` writer - Generate Load Event"] -pub type LdevW<'a, REG> = crate::BitWriter<'a, REG, Ldev>; -impl<'a, REG> LdevW<'a, REG> +pub type LDEV_W<'a, REG> = crate::BitWriter<'a, REG, LDEV_A>; +impl<'a, REG> LDEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ldev::Value1) + self.variant(LDEV_A::VALUE1) } #[doc = "A load event is generated"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ldev::Value2) + self.variant(LDEV_A::VALUE2) } } #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rptdis { +pub enum RPTDIS_A { #[doc = "0: A cancelled conversion is repeated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A cancelled conversion is discarded"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rptdis) -> Self { + fn from(variant: RPTDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RptdisR = crate::BitReader; -impl RptdisR { +pub type RPTDIS_R = crate::BitReader; +impl RPTDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rptdis { + pub const fn variant(&self) -> RPTDIS_A { match self.bits { - false => Rptdis::Value1, - true => Rptdis::Value2, + false => RPTDIS_A::VALUE1, + true => RPTDIS_A::VALUE2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rptdis::Value1 + *self == RPTDIS_A::VALUE1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rptdis::Value2 + *self == RPTDIS_A::VALUE2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; -impl<'a, REG> RptdisW<'a, REG> +pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; +impl<'a, REG> RPTDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rptdis::Value1) + self.variant(RPTDIS_A::VALUE1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rptdis::Value2) + self.variant(RPTDIS_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> EngtR { - EngtR::new((self.bits & 3) as u8) + pub fn engt(&self) -> ENGT_R { + ENGT_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> EntrR { - EntrR::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> ENTR_R { + ENTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> EnsiR { - EnsiR::new(((self.bits >> 3) & 1) != 0) + pub fn ensi(&self) -> ENSI_R { + ENSI_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - pub fn scan(&self) -> ScanR { - ScanR::new(((self.bits >> 4) & 1) != 0) + pub fn scan(&self) -> SCAN_R { + SCAN_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - pub fn ldm(&self) -> LdmR { - LdmR::new(((self.bits >> 5) & 1) != 0) + pub fn ldm(&self) -> LDM_R { + LDM_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> ReqgtR { - ReqgtR::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> REQGT_R { + REQGT_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RptdisR { - RptdisR::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RPTDIS_R { + RPTDIS_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> EngtW { - EngtW::new(self, 0) + pub fn engt(&mut self) -> ENGT_W { + ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> EntrW { - EntrW::new(self, 2) + pub fn entr(&mut self) -> ENTR_W { + ENTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> EnsiW { - EnsiW::new(self, 3) + pub fn ensi(&mut self) -> ENSI_W { + ENSI_W::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] #[must_use] - pub fn scan(&mut self) -> ScanW { - ScanW::new(self, 4) + pub fn scan(&mut self) -> SCAN_W { + SCAN_W::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] #[must_use] - pub fn ldm(&mut self) -> LdmW { - LdmW::new(self, 5) + pub fn ldm(&mut self) -> LDM_W { + LDM_W::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] #[must_use] - pub fn clrpnd(&mut self) -> ClrpndW { - ClrpndW::new(self, 8) + pub fn clrpnd(&mut self) -> CLRPND_W { + CLRPND_W::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] #[must_use] - pub fn ldev(&mut self) -> LdevW { - LdevW::new(self, 9) + pub fn ldev(&mut self) -> LDEV_W { + LDEV_W::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RptdisW { - RptdisW::new(self, 16) + pub fn rptdis(&mut self) -> RPTDIS_W { + RPTDIS_W::new(self, 16) } } #[doc = "Autoscan Source Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`asmr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`asmr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AsmrSpec; -impl crate::RegisterSpec for AsmrSpec { +pub struct ASMR_SPEC; +impl crate::RegisterSpec for ASMR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`asmr::R`](R) reader structure"] -impl crate::Readable for AsmrSpec {} +impl crate::Readable for ASMR_SPEC {} #[doc = "`write(|w| ..)` method takes [`asmr::W`](W) writer structure"] -impl crate::Writable for AsmrSpec { +impl crate::Writable for ASMR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASMR to value 0"] -impl crate::Resettable for AsmrSpec { +impl crate::Resettable for ASMR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/aspnd.rs b/src/vadc_g0/aspnd.rs index c8b5127f..f71933a2 100644 --- a/src/vadc_g0/aspnd.rs +++ b/src/vadc_g0/aspnd.rs @@ -1,537 +1,537 @@ #[doc = "Register `ASPND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASPND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd0 { +pub enum CHPND0_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd0) -> Self { + fn from(variant: CHPND0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND0` reader - Channels Pending"] -pub type Chpnd0R = crate::BitReader; -impl Chpnd0R { +pub type CHPND0_R = crate::BitReader; +impl CHPND0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd0 { + pub const fn variant(&self) -> CHPND0_A { match self.bits { - false => Chpnd0::Value1, - true => Chpnd0::Value2, + false => CHPND0_A::VALUE1, + true => CHPND0_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd0::Value1 + *self == CHPND0_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd0::Value2 + *self == CHPND0_A::VALUE2 } } #[doc = "Field `CHPND0` writer - Channels Pending"] -pub type Chpnd0W<'a, REG> = crate::BitWriter<'a, REG, Chpnd0>; -impl<'a, REG> Chpnd0W<'a, REG> +pub type CHPND0_W<'a, REG> = crate::BitWriter<'a, REG, CHPND0_A>; +impl<'a, REG> CHPND0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd0::Value1) + self.variant(CHPND0_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd0::Value2) + self.variant(CHPND0_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd1 { +pub enum CHPND1_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd1) -> Self { + fn from(variant: CHPND1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND1` reader - Channels Pending"] -pub type Chpnd1R = crate::BitReader; -impl Chpnd1R { +pub type CHPND1_R = crate::BitReader; +impl CHPND1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd1 { + pub const fn variant(&self) -> CHPND1_A { match self.bits { - false => Chpnd1::Value1, - true => Chpnd1::Value2, + false => CHPND1_A::VALUE1, + true => CHPND1_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd1::Value1 + *self == CHPND1_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd1::Value2 + *self == CHPND1_A::VALUE2 } } #[doc = "Field `CHPND1` writer - Channels Pending"] -pub type Chpnd1W<'a, REG> = crate::BitWriter<'a, REG, Chpnd1>; -impl<'a, REG> Chpnd1W<'a, REG> +pub type CHPND1_W<'a, REG> = crate::BitWriter<'a, REG, CHPND1_A>; +impl<'a, REG> CHPND1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd1::Value1) + self.variant(CHPND1_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd1::Value2) + self.variant(CHPND1_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd2 { +pub enum CHPND2_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd2) -> Self { + fn from(variant: CHPND2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND2` reader - Channels Pending"] -pub type Chpnd2R = crate::BitReader; -impl Chpnd2R { +pub type CHPND2_R = crate::BitReader; +impl CHPND2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd2 { + pub const fn variant(&self) -> CHPND2_A { match self.bits { - false => Chpnd2::Value1, - true => Chpnd2::Value2, + false => CHPND2_A::VALUE1, + true => CHPND2_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd2::Value1 + *self == CHPND2_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd2::Value2 + *self == CHPND2_A::VALUE2 } } #[doc = "Field `CHPND2` writer - Channels Pending"] -pub type Chpnd2W<'a, REG> = crate::BitWriter<'a, REG, Chpnd2>; -impl<'a, REG> Chpnd2W<'a, REG> +pub type CHPND2_W<'a, REG> = crate::BitWriter<'a, REG, CHPND2_A>; +impl<'a, REG> CHPND2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd2::Value1) + self.variant(CHPND2_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd2::Value2) + self.variant(CHPND2_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd3 { +pub enum CHPND3_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd3) -> Self { + fn from(variant: CHPND3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND3` reader - Channels Pending"] -pub type Chpnd3R = crate::BitReader; -impl Chpnd3R { +pub type CHPND3_R = crate::BitReader; +impl CHPND3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd3 { + pub const fn variant(&self) -> CHPND3_A { match self.bits { - false => Chpnd3::Value1, - true => Chpnd3::Value2, + false => CHPND3_A::VALUE1, + true => CHPND3_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd3::Value1 + *self == CHPND3_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd3::Value2 + *self == CHPND3_A::VALUE2 } } #[doc = "Field `CHPND3` writer - Channels Pending"] -pub type Chpnd3W<'a, REG> = crate::BitWriter<'a, REG, Chpnd3>; -impl<'a, REG> Chpnd3W<'a, REG> +pub type CHPND3_W<'a, REG> = crate::BitWriter<'a, REG, CHPND3_A>; +impl<'a, REG> CHPND3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd3::Value1) + self.variant(CHPND3_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd3::Value2) + self.variant(CHPND3_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd4 { +pub enum CHPND4_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd4) -> Self { + fn from(variant: CHPND4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND4` reader - Channels Pending"] -pub type Chpnd4R = crate::BitReader; -impl Chpnd4R { +pub type CHPND4_R = crate::BitReader; +impl CHPND4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd4 { + pub const fn variant(&self) -> CHPND4_A { match self.bits { - false => Chpnd4::Value1, - true => Chpnd4::Value2, + false => CHPND4_A::VALUE1, + true => CHPND4_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd4::Value1 + *self == CHPND4_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd4::Value2 + *self == CHPND4_A::VALUE2 } } #[doc = "Field `CHPND4` writer - Channels Pending"] -pub type Chpnd4W<'a, REG> = crate::BitWriter<'a, REG, Chpnd4>; -impl<'a, REG> Chpnd4W<'a, REG> +pub type CHPND4_W<'a, REG> = crate::BitWriter<'a, REG, CHPND4_A>; +impl<'a, REG> CHPND4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd4::Value1) + self.variant(CHPND4_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd4::Value2) + self.variant(CHPND4_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd5 { +pub enum CHPND5_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd5) -> Self { + fn from(variant: CHPND5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND5` reader - Channels Pending"] -pub type Chpnd5R = crate::BitReader; -impl Chpnd5R { +pub type CHPND5_R = crate::BitReader; +impl CHPND5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd5 { + pub const fn variant(&self) -> CHPND5_A { match self.bits { - false => Chpnd5::Value1, - true => Chpnd5::Value2, + false => CHPND5_A::VALUE1, + true => CHPND5_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd5::Value1 + *self == CHPND5_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd5::Value2 + *self == CHPND5_A::VALUE2 } } #[doc = "Field `CHPND5` writer - Channels Pending"] -pub type Chpnd5W<'a, REG> = crate::BitWriter<'a, REG, Chpnd5>; -impl<'a, REG> Chpnd5W<'a, REG> +pub type CHPND5_W<'a, REG> = crate::BitWriter<'a, REG, CHPND5_A>; +impl<'a, REG> CHPND5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd5::Value1) + self.variant(CHPND5_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd5::Value2) + self.variant(CHPND5_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd6 { +pub enum CHPND6_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd6) -> Self { + fn from(variant: CHPND6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND6` reader - Channels Pending"] -pub type Chpnd6R = crate::BitReader; -impl Chpnd6R { +pub type CHPND6_R = crate::BitReader; +impl CHPND6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd6 { + pub const fn variant(&self) -> CHPND6_A { match self.bits { - false => Chpnd6::Value1, - true => Chpnd6::Value2, + false => CHPND6_A::VALUE1, + true => CHPND6_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd6::Value1 + *self == CHPND6_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd6::Value2 + *self == CHPND6_A::VALUE2 } } #[doc = "Field `CHPND6` writer - Channels Pending"] -pub type Chpnd6W<'a, REG> = crate::BitWriter<'a, REG, Chpnd6>; -impl<'a, REG> Chpnd6W<'a, REG> +pub type CHPND6_W<'a, REG> = crate::BitWriter<'a, REG, CHPND6_A>; +impl<'a, REG> CHPND6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd6::Value1) + self.variant(CHPND6_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd6::Value2) + self.variant(CHPND6_A::VALUE2) } } #[doc = "Channels Pending\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chpnd7 { +pub enum CHPND7_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request conversion of this channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chpnd7) -> Self { + fn from(variant: CHPND7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHPND7` reader - Channels Pending"] -pub type Chpnd7R = crate::BitReader; -impl Chpnd7R { +pub type CHPND7_R = crate::BitReader; +impl CHPND7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chpnd7 { + pub const fn variant(&self) -> CHPND7_A { match self.bits { - false => Chpnd7::Value1, - true => Chpnd7::Value2, + false => CHPND7_A::VALUE1, + true => CHPND7_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chpnd7::Value1 + *self == CHPND7_A::VALUE1 } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chpnd7::Value2 + *self == CHPND7_A::VALUE2 } } #[doc = "Field `CHPND7` writer - Channels Pending"] -pub type Chpnd7W<'a, REG> = crate::BitWriter<'a, REG, Chpnd7>; -impl<'a, REG> Chpnd7W<'a, REG> +pub type CHPND7_W<'a, REG> = crate::BitWriter<'a, REG, CHPND7_A>; +impl<'a, REG> CHPND7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chpnd7::Value1) + self.variant(CHPND7_A::VALUE1) } #[doc = "Request conversion of this channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chpnd7::Value2) + self.variant(CHPND7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Channels Pending"] #[inline(always)] - pub fn chpnd0(&self) -> Chpnd0R { - Chpnd0R::new((self.bits & 1) != 0) + pub fn chpnd0(&self) -> CHPND0_R { + CHPND0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channels Pending"] #[inline(always)] - pub fn chpnd1(&self) -> Chpnd1R { - Chpnd1R::new(((self.bits >> 1) & 1) != 0) + pub fn chpnd1(&self) -> CHPND1_R { + CHPND1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channels Pending"] #[inline(always)] - pub fn chpnd2(&self) -> Chpnd2R { - Chpnd2R::new(((self.bits >> 2) & 1) != 0) + pub fn chpnd2(&self) -> CHPND2_R { + CHPND2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channels Pending"] #[inline(always)] - pub fn chpnd3(&self) -> Chpnd3R { - Chpnd3R::new(((self.bits >> 3) & 1) != 0) + pub fn chpnd3(&self) -> CHPND3_R { + CHPND3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channels Pending"] #[inline(always)] - pub fn chpnd4(&self) -> Chpnd4R { - Chpnd4R::new(((self.bits >> 4) & 1) != 0) + pub fn chpnd4(&self) -> CHPND4_R { + CHPND4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channels Pending"] #[inline(always)] - pub fn chpnd5(&self) -> Chpnd5R { - Chpnd5R::new(((self.bits >> 5) & 1) != 0) + pub fn chpnd5(&self) -> CHPND5_R { + CHPND5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channels Pending"] #[inline(always)] - pub fn chpnd6(&self) -> Chpnd6R { - Chpnd6R::new(((self.bits >> 6) & 1) != 0) + pub fn chpnd6(&self) -> CHPND6_R { + CHPND6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channels Pending"] #[inline(always)] - pub fn chpnd7(&self) -> Chpnd7R { - Chpnd7R::new(((self.bits >> 7) & 1) != 0) + pub fn chpnd7(&self) -> CHPND7_R { + CHPND7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd0(&mut self) -> Chpnd0W { - Chpnd0W::new(self, 0) + pub fn chpnd0(&mut self) -> CHPND0_W { + CHPND0_W::new(self, 0) } #[doc = "Bit 1 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd1(&mut self) -> Chpnd1W { - Chpnd1W::new(self, 1) + pub fn chpnd1(&mut self) -> CHPND1_W { + CHPND1_W::new(self, 1) } #[doc = "Bit 2 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd2(&mut self) -> Chpnd2W { - Chpnd2W::new(self, 2) + pub fn chpnd2(&mut self) -> CHPND2_W { + CHPND2_W::new(self, 2) } #[doc = "Bit 3 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd3(&mut self) -> Chpnd3W { - Chpnd3W::new(self, 3) + pub fn chpnd3(&mut self) -> CHPND3_W { + CHPND3_W::new(self, 3) } #[doc = "Bit 4 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd4(&mut self) -> Chpnd4W { - Chpnd4W::new(self, 4) + pub fn chpnd4(&mut self) -> CHPND4_W { + CHPND4_W::new(self, 4) } #[doc = "Bit 5 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd5(&mut self) -> Chpnd5W { - Chpnd5W::new(self, 5) + pub fn chpnd5(&mut self) -> CHPND5_W { + CHPND5_W::new(self, 5) } #[doc = "Bit 6 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd6(&mut self) -> Chpnd6W { - Chpnd6W::new(self, 6) + pub fn chpnd6(&mut self) -> CHPND6_W { + CHPND6_W::new(self, 6) } #[doc = "Bit 7 - Channels Pending"] #[inline(always)] #[must_use] - pub fn chpnd7(&mut self) -> Chpnd7W { - Chpnd7W::new(self, 7) + pub fn chpnd7(&mut self) -> CHPND7_W { + CHPND7_W::new(self, 7) } } #[doc = "Autoscan Source Pending Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`aspnd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`aspnd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AspndSpec; -impl crate::RegisterSpec for AspndSpec { +pub struct ASPND_SPEC; +impl crate::RegisterSpec for ASPND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`aspnd::R`](R) reader structure"] -impl crate::Readable for AspndSpec {} +impl crate::Readable for ASPND_SPEC {} #[doc = "`write(|w| ..)` method takes [`aspnd::W`](W) writer structure"] -impl crate::Writable for AspndSpec { +impl crate::Writable for ASPND_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASPND to value 0"] -impl crate::Resettable for AspndSpec { +impl crate::Resettable for ASPND_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/assel.rs b/src/vadc_g0/assel.rs index 94757351..cb1f579f 100644 --- a/src/vadc_g0/assel.rs +++ b/src/vadc_g0/assel.rs @@ -1,537 +1,537 @@ #[doc = "Register `ASSEL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ASSEL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel0 { +pub enum CHSEL0_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel0) -> Self { + fn from(variant: CHSEL0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL0` reader - Channel Selection"] -pub type Chsel0R = crate::BitReader; -impl Chsel0R { +pub type CHSEL0_R = crate::BitReader; +impl CHSEL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel0 { + pub const fn variant(&self) -> CHSEL0_A { match self.bits { - false => Chsel0::Value1, - true => Chsel0::Value2, + false => CHSEL0_A::VALUE1, + true => CHSEL0_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel0::Value1 + *self == CHSEL0_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel0::Value2 + *self == CHSEL0_A::VALUE2 } } #[doc = "Field `CHSEL0` writer - Channel Selection"] -pub type Chsel0W<'a, REG> = crate::BitWriter<'a, REG, Chsel0>; -impl<'a, REG> Chsel0W<'a, REG> +pub type CHSEL0_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL0_A>; +impl<'a, REG> CHSEL0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel0::Value1) + self.variant(CHSEL0_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel0::Value2) + self.variant(CHSEL0_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel1 { +pub enum CHSEL1_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel1) -> Self { + fn from(variant: CHSEL1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL1` reader - Channel Selection"] -pub type Chsel1R = crate::BitReader; -impl Chsel1R { +pub type CHSEL1_R = crate::BitReader; +impl CHSEL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel1 { + pub const fn variant(&self) -> CHSEL1_A { match self.bits { - false => Chsel1::Value1, - true => Chsel1::Value2, + false => CHSEL1_A::VALUE1, + true => CHSEL1_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel1::Value1 + *self == CHSEL1_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel1::Value2 + *self == CHSEL1_A::VALUE2 } } #[doc = "Field `CHSEL1` writer - Channel Selection"] -pub type Chsel1W<'a, REG> = crate::BitWriter<'a, REG, Chsel1>; -impl<'a, REG> Chsel1W<'a, REG> +pub type CHSEL1_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL1_A>; +impl<'a, REG> CHSEL1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel1::Value1) + self.variant(CHSEL1_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel1::Value2) + self.variant(CHSEL1_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel2 { +pub enum CHSEL2_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel2) -> Self { + fn from(variant: CHSEL2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL2` reader - Channel Selection"] -pub type Chsel2R = crate::BitReader; -impl Chsel2R { +pub type CHSEL2_R = crate::BitReader; +impl CHSEL2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel2 { + pub const fn variant(&self) -> CHSEL2_A { match self.bits { - false => Chsel2::Value1, - true => Chsel2::Value2, + false => CHSEL2_A::VALUE1, + true => CHSEL2_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel2::Value1 + *self == CHSEL2_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel2::Value2 + *self == CHSEL2_A::VALUE2 } } #[doc = "Field `CHSEL2` writer - Channel Selection"] -pub type Chsel2W<'a, REG> = crate::BitWriter<'a, REG, Chsel2>; -impl<'a, REG> Chsel2W<'a, REG> +pub type CHSEL2_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL2_A>; +impl<'a, REG> CHSEL2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel2::Value1) + self.variant(CHSEL2_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel2::Value2) + self.variant(CHSEL2_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel3 { +pub enum CHSEL3_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel3) -> Self { + fn from(variant: CHSEL3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL3` reader - Channel Selection"] -pub type Chsel3R = crate::BitReader; -impl Chsel3R { +pub type CHSEL3_R = crate::BitReader; +impl CHSEL3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel3 { + pub const fn variant(&self) -> CHSEL3_A { match self.bits { - false => Chsel3::Value1, - true => Chsel3::Value2, + false => CHSEL3_A::VALUE1, + true => CHSEL3_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel3::Value1 + *self == CHSEL3_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel3::Value2 + *self == CHSEL3_A::VALUE2 } } #[doc = "Field `CHSEL3` writer - Channel Selection"] -pub type Chsel3W<'a, REG> = crate::BitWriter<'a, REG, Chsel3>; -impl<'a, REG> Chsel3W<'a, REG> +pub type CHSEL3_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL3_A>; +impl<'a, REG> CHSEL3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel3::Value1) + self.variant(CHSEL3_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel3::Value2) + self.variant(CHSEL3_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel4 { +pub enum CHSEL4_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel4) -> Self { + fn from(variant: CHSEL4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL4` reader - Channel Selection"] -pub type Chsel4R = crate::BitReader; -impl Chsel4R { +pub type CHSEL4_R = crate::BitReader; +impl CHSEL4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel4 { + pub const fn variant(&self) -> CHSEL4_A { match self.bits { - false => Chsel4::Value1, - true => Chsel4::Value2, + false => CHSEL4_A::VALUE1, + true => CHSEL4_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel4::Value1 + *self == CHSEL4_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel4::Value2 + *self == CHSEL4_A::VALUE2 } } #[doc = "Field `CHSEL4` writer - Channel Selection"] -pub type Chsel4W<'a, REG> = crate::BitWriter<'a, REG, Chsel4>; -impl<'a, REG> Chsel4W<'a, REG> +pub type CHSEL4_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL4_A>; +impl<'a, REG> CHSEL4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel4::Value1) + self.variant(CHSEL4_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel4::Value2) + self.variant(CHSEL4_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel5 { +pub enum CHSEL5_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel5) -> Self { + fn from(variant: CHSEL5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL5` reader - Channel Selection"] -pub type Chsel5R = crate::BitReader; -impl Chsel5R { +pub type CHSEL5_R = crate::BitReader; +impl CHSEL5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel5 { + pub const fn variant(&self) -> CHSEL5_A { match self.bits { - false => Chsel5::Value1, - true => Chsel5::Value2, + false => CHSEL5_A::VALUE1, + true => CHSEL5_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel5::Value1 + *self == CHSEL5_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel5::Value2 + *self == CHSEL5_A::VALUE2 } } #[doc = "Field `CHSEL5` writer - Channel Selection"] -pub type Chsel5W<'a, REG> = crate::BitWriter<'a, REG, Chsel5>; -impl<'a, REG> Chsel5W<'a, REG> +pub type CHSEL5_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL5_A>; +impl<'a, REG> CHSEL5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel5::Value1) + self.variant(CHSEL5_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel5::Value2) + self.variant(CHSEL5_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel6 { +pub enum CHSEL6_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel6) -> Self { + fn from(variant: CHSEL6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL6` reader - Channel Selection"] -pub type Chsel6R = crate::BitReader; -impl Chsel6R { +pub type CHSEL6_R = crate::BitReader; +impl CHSEL6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel6 { + pub const fn variant(&self) -> CHSEL6_A { match self.bits { - false => Chsel6::Value1, - true => Chsel6::Value2, + false => CHSEL6_A::VALUE1, + true => CHSEL6_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel6::Value1 + *self == CHSEL6_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel6::Value2 + *self == CHSEL6_A::VALUE2 } } #[doc = "Field `CHSEL6` writer - Channel Selection"] -pub type Chsel6W<'a, REG> = crate::BitWriter<'a, REG, Chsel6>; -impl<'a, REG> Chsel6W<'a, REG> +pub type CHSEL6_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL6_A>; +impl<'a, REG> CHSEL6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel6::Value1) + self.variant(CHSEL6_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel6::Value2) + self.variant(CHSEL6_A::VALUE2) } } #[doc = "Channel Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Chsel7 { +pub enum CHSEL7_A { #[doc = "0: Ignore this channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: This channel is part of the scan sequence"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Chsel7) -> Self { + fn from(variant: CHSEL7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CHSEL7` reader - Channel Selection"] -pub type Chsel7R = crate::BitReader; -impl Chsel7R { +pub type CHSEL7_R = crate::BitReader; +impl CHSEL7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chsel7 { + pub const fn variant(&self) -> CHSEL7_A { match self.bits { - false => Chsel7::Value1, - true => Chsel7::Value2, + false => CHSEL7_A::VALUE1, + true => CHSEL7_A::VALUE2, } } #[doc = "Ignore this channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chsel7::Value1 + *self == CHSEL7_A::VALUE1 } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chsel7::Value2 + *self == CHSEL7_A::VALUE2 } } #[doc = "Field `CHSEL7` writer - Channel Selection"] -pub type Chsel7W<'a, REG> = crate::BitWriter<'a, REG, Chsel7>; -impl<'a, REG> Chsel7W<'a, REG> +pub type CHSEL7_W<'a, REG> = crate::BitWriter<'a, REG, CHSEL7_A>; +impl<'a, REG> CHSEL7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Ignore this channel"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chsel7::Value1) + self.variant(CHSEL7_A::VALUE1) } #[doc = "This channel is part of the scan sequence"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chsel7::Value2) + self.variant(CHSEL7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Channel Selection"] #[inline(always)] - pub fn chsel0(&self) -> Chsel0R { - Chsel0R::new((self.bits & 1) != 0) + pub fn chsel0(&self) -> CHSEL0_R { + CHSEL0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Selection"] #[inline(always)] - pub fn chsel1(&self) -> Chsel1R { - Chsel1R::new(((self.bits >> 1) & 1) != 0) + pub fn chsel1(&self) -> CHSEL1_R { + CHSEL1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Selection"] #[inline(always)] - pub fn chsel2(&self) -> Chsel2R { - Chsel2R::new(((self.bits >> 2) & 1) != 0) + pub fn chsel2(&self) -> CHSEL2_R { + CHSEL2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Selection"] #[inline(always)] - pub fn chsel3(&self) -> Chsel3R { - Chsel3R::new(((self.bits >> 3) & 1) != 0) + pub fn chsel3(&self) -> CHSEL3_R { + CHSEL3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Selection"] #[inline(always)] - pub fn chsel4(&self) -> Chsel4R { - Chsel4R::new(((self.bits >> 4) & 1) != 0) + pub fn chsel4(&self) -> CHSEL4_R { + CHSEL4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Selection"] #[inline(always)] - pub fn chsel5(&self) -> Chsel5R { - Chsel5R::new(((self.bits >> 5) & 1) != 0) + pub fn chsel5(&self) -> CHSEL5_R { + CHSEL5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Selection"] #[inline(always)] - pub fn chsel6(&self) -> Chsel6R { - Chsel6R::new(((self.bits >> 6) & 1) != 0) + pub fn chsel6(&self) -> CHSEL6_R { + CHSEL6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Selection"] #[inline(always)] - pub fn chsel7(&self) -> Chsel7R { - Chsel7R::new(((self.bits >> 7) & 1) != 0) + pub fn chsel7(&self) -> CHSEL7_R { + CHSEL7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel0(&mut self) -> Chsel0W { - Chsel0W::new(self, 0) + pub fn chsel0(&mut self) -> CHSEL0_W { + CHSEL0_W::new(self, 0) } #[doc = "Bit 1 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel1(&mut self) -> Chsel1W { - Chsel1W::new(self, 1) + pub fn chsel1(&mut self) -> CHSEL1_W { + CHSEL1_W::new(self, 1) } #[doc = "Bit 2 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel2(&mut self) -> Chsel2W { - Chsel2W::new(self, 2) + pub fn chsel2(&mut self) -> CHSEL2_W { + CHSEL2_W::new(self, 2) } #[doc = "Bit 3 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel3(&mut self) -> Chsel3W { - Chsel3W::new(self, 3) + pub fn chsel3(&mut self) -> CHSEL3_W { + CHSEL3_W::new(self, 3) } #[doc = "Bit 4 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel4(&mut self) -> Chsel4W { - Chsel4W::new(self, 4) + pub fn chsel4(&mut self) -> CHSEL4_W { + CHSEL4_W::new(self, 4) } #[doc = "Bit 5 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel5(&mut self) -> Chsel5W { - Chsel5W::new(self, 5) + pub fn chsel5(&mut self) -> CHSEL5_W { + CHSEL5_W::new(self, 5) } #[doc = "Bit 6 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel6(&mut self) -> Chsel6W { - Chsel6W::new(self, 6) + pub fn chsel6(&mut self) -> CHSEL6_W { + CHSEL6_W::new(self, 6) } #[doc = "Bit 7 - Channel Selection"] #[inline(always)] #[must_use] - pub fn chsel7(&mut self) -> Chsel7W { - Chsel7W::new(self, 7) + pub fn chsel7(&mut self) -> CHSEL7_W { + CHSEL7_W::new(self, 7) } } #[doc = "Autoscan Source Channel Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`assel::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`assel::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct AsselSpec; -impl crate::RegisterSpec for AsselSpec { +pub struct ASSEL_SPEC; +impl crate::RegisterSpec for ASSEL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`assel::R`](R) reader structure"] -impl crate::Readable for AsselSpec {} +impl crate::Readable for ASSEL_SPEC {} #[doc = "`write(|w| ..)` method takes [`assel::W`](W) writer structure"] -impl crate::Writable for AsselSpec { +impl crate::Writable for ASSEL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ASSEL to value 0"] -impl crate::Resettable for AsselSpec { +impl crate::Resettable for ASSEL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bfl.rs b/src/vadc_g0/bfl.rs index 3c5f7607..5a4ae436 100644 --- a/src/vadc_g0/bfl.rs +++ b/src/vadc_g0/bfl.rs @@ -1,701 +1,701 @@ #[doc = "Register `BFL` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFL` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Boundary Flag 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfl0 { +pub enum BFL0_A { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfl0) -> Self { + fn from(variant: BFL0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFL0` reader - Boundary Flag 0"] -pub type Bfl0R = crate::BitReader; -impl Bfl0R { +pub type BFL0_R = crate::BitReader; +impl BFL0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfl0 { + pub const fn variant(&self) -> BFL0_A { match self.bits { - false => Bfl0::Value1, - true => Bfl0::Value2, + false => BFL0_A::VALUE1, + true => BFL0_A::VALUE2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl0::Value1 + *self == BFL0_A::VALUE1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl0::Value2 + *self == BFL0_A::VALUE2 } } #[doc = "Boundary Flag 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfl1 { +pub enum BFL1_A { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfl1) -> Self { + fn from(variant: BFL1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFL1` reader - Boundary Flag 1"] -pub type Bfl1R = crate::BitReader; -impl Bfl1R { +pub type BFL1_R = crate::BitReader; +impl BFL1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfl1 { + pub const fn variant(&self) -> BFL1_A { match self.bits { - false => Bfl1::Value1, - true => Bfl1::Value2, + false => BFL1_A::VALUE1, + true => BFL1_A::VALUE2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl1::Value1 + *self == BFL1_A::VALUE1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl1::Value2 + *self == BFL1_A::VALUE2 } } #[doc = "Boundary Flag 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfl2 { +pub enum BFL2_A { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfl2) -> Self { + fn from(variant: BFL2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFL2` reader - Boundary Flag 2"] -pub type Bfl2R = crate::BitReader; -impl Bfl2R { +pub type BFL2_R = crate::BitReader; +impl BFL2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfl2 { + pub const fn variant(&self) -> BFL2_A { match self.bits { - false => Bfl2::Value1, - true => Bfl2::Value2, + false => BFL2_A::VALUE1, + true => BFL2_A::VALUE2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl2::Value1 + *self == BFL2_A::VALUE1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl2::Value2 + *self == BFL2_A::VALUE2 } } #[doc = "Boundary Flag 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfl3 { +pub enum BFL3_A { #[doc = "0: Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Active state: result has crossed the activation boundary"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfl3) -> Self { + fn from(variant: BFL3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFL3` reader - Boundary Flag 3"] -pub type Bfl3R = crate::BitReader; -impl Bfl3R { +pub type BFL3_R = crate::BitReader; +impl BFL3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfl3 { + pub const fn variant(&self) -> BFL3_A { match self.bits { - false => Bfl3::Value1, - true => Bfl3::Value2, + false => BFL3_A::VALUE1, + true => BFL3_A::VALUE2, } } #[doc = "Passive state: result has not yet crossed the activation boundary (see bitfield BFAy), or selected gate signal is inactive, or this boundary flag is disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl3::Value1 + *self == BFL3_A::VALUE1 } #[doc = "Active state: result has crossed the activation boundary"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl3::Value2 + *self == BFL3_A::VALUE2 } } #[doc = "Boundary Flag 0 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfa0 { +pub enum BFA0_A { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfa0) -> Self { + fn from(variant: BFA0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFA0` reader - Boundary Flag 0 Activation Select"] -pub type Bfa0R = crate::BitReader; -impl Bfa0R { +pub type BFA0_R = crate::BitReader; +impl BFA0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfa0 { + pub const fn variant(&self) -> BFA0_A { match self.bits { - false => Bfa0::Value1, - true => Bfa0::Value2, + false => BFA0_A::VALUE1, + true => BFA0_A::VALUE2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfa0::Value1 + *self == BFA0_A::VALUE1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfa0::Value2 + *self == BFA0_A::VALUE2 } } #[doc = "Field `BFA0` writer - Boundary Flag 0 Activation Select"] -pub type Bfa0W<'a, REG> = crate::BitWriter<'a, REG, Bfa0>; -impl<'a, REG> Bfa0W<'a, REG> +pub type BFA0_W<'a, REG> = crate::BitWriter<'a, REG, BFA0_A>; +impl<'a, REG> BFA0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfa0::Value1) + self.variant(BFA0_A::VALUE1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfa0::Value2) + self.variant(BFA0_A::VALUE2) } } #[doc = "Boundary Flag 1 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfa1 { +pub enum BFA1_A { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfa1) -> Self { + fn from(variant: BFA1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFA1` reader - Boundary Flag 1 Activation Select"] -pub type Bfa1R = crate::BitReader; -impl Bfa1R { +pub type BFA1_R = crate::BitReader; +impl BFA1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfa1 { + pub const fn variant(&self) -> BFA1_A { match self.bits { - false => Bfa1::Value1, - true => Bfa1::Value2, + false => BFA1_A::VALUE1, + true => BFA1_A::VALUE2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfa1::Value1 + *self == BFA1_A::VALUE1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfa1::Value2 + *self == BFA1_A::VALUE2 } } #[doc = "Field `BFA1` writer - Boundary Flag 1 Activation Select"] -pub type Bfa1W<'a, REG> = crate::BitWriter<'a, REG, Bfa1>; -impl<'a, REG> Bfa1W<'a, REG> +pub type BFA1_W<'a, REG> = crate::BitWriter<'a, REG, BFA1_A>; +impl<'a, REG> BFA1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfa1::Value1) + self.variant(BFA1_A::VALUE1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfa1::Value2) + self.variant(BFA1_A::VALUE2) } } #[doc = "Boundary Flag 2 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfa2 { +pub enum BFA2_A { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfa2) -> Self { + fn from(variant: BFA2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFA2` reader - Boundary Flag 2 Activation Select"] -pub type Bfa2R = crate::BitReader; -impl Bfa2R { +pub type BFA2_R = crate::BitReader; +impl BFA2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfa2 { + pub const fn variant(&self) -> BFA2_A { match self.bits { - false => Bfa2::Value1, - true => Bfa2::Value2, + false => BFA2_A::VALUE1, + true => BFA2_A::VALUE2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfa2::Value1 + *self == BFA2_A::VALUE1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfa2::Value2 + *self == BFA2_A::VALUE2 } } #[doc = "Field `BFA2` writer - Boundary Flag 2 Activation Select"] -pub type Bfa2W<'a, REG> = crate::BitWriter<'a, REG, Bfa2>; -impl<'a, REG> Bfa2W<'a, REG> +pub type BFA2_W<'a, REG> = crate::BitWriter<'a, REG, BFA2_A>; +impl<'a, REG> BFA2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfa2::Value1) + self.variant(BFA2_A::VALUE1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfa2::Value2) + self.variant(BFA2_A::VALUE2) } } #[doc = "Boundary Flag 3 Activation Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfa3 { +pub enum BFA3_A { #[doc = "0: Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfa3) -> Self { + fn from(variant: BFA3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFA3` reader - Boundary Flag 3 Activation Select"] -pub type Bfa3R = crate::BitReader; -impl Bfa3R { +pub type BFA3_R = crate::BitReader; +impl BFA3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfa3 { + pub const fn variant(&self) -> BFA3_A { match self.bits { - false => Bfa3::Value1, - true => Bfa3::Value2, + false => BFA3_A::VALUE1, + true => BFA3_A::VALUE2, } } #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfa3::Value1 + *self == BFA3_A::VALUE1 } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfa3::Value2 + *self == BFA3_A::VALUE2 } } #[doc = "Field `BFA3` writer - Boundary Flag 3 Activation Select"] -pub type Bfa3W<'a, REG> = crate::BitWriter<'a, REG, Bfa3>; -impl<'a, REG> Bfa3W<'a, REG> +pub type BFA3_W<'a, REG> = crate::BitWriter<'a, REG, BFA3_A>; +impl<'a, REG> BFA3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Set boundary flag BFLy if result is above the defined band or compare value, clear if below"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfa3::Value1) + self.variant(BFA3_A::VALUE1) } #[doc = "Set boundary flag BFLy if result is below the defined band or compare value, clear if above"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfa3::Value2) + self.variant(BFA3_A::VALUE2) } } #[doc = "Boundary Flag 0 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfi0 { +pub enum BFI0_A { #[doc = "0: Use BFLy directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Invert value and use BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfi0) -> Self { + fn from(variant: BFI0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFI0` reader - Boundary Flag 0 Inversion Control"] -pub type Bfi0R = crate::BitReader; -impl Bfi0R { +pub type BFI0_R = crate::BitReader; +impl BFI0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfi0 { + pub const fn variant(&self) -> BFI0_A { match self.bits { - false => Bfi0::Value1, - true => Bfi0::Value2, + false => BFI0_A::VALUE1, + true => BFI0_A::VALUE2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfi0::Value1 + *self == BFI0_A::VALUE1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfi0::Value2 + *self == BFI0_A::VALUE2 } } #[doc = "Field `BFI0` writer - Boundary Flag 0 Inversion Control"] -pub type Bfi0W<'a, REG> = crate::BitWriter<'a, REG, Bfi0>; -impl<'a, REG> Bfi0W<'a, REG> +pub type BFI0_W<'a, REG> = crate::BitWriter<'a, REG, BFI0_A>; +impl<'a, REG> BFI0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfi0::Value1) + self.variant(BFI0_A::VALUE1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfi0::Value2) + self.variant(BFI0_A::VALUE2) } } #[doc = "Boundary Flag 1 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfi1 { +pub enum BFI1_A { #[doc = "0: Use BFLy directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Invert value and use BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfi1) -> Self { + fn from(variant: BFI1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFI1` reader - Boundary Flag 1 Inversion Control"] -pub type Bfi1R = crate::BitReader; -impl Bfi1R { +pub type BFI1_R = crate::BitReader; +impl BFI1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfi1 { + pub const fn variant(&self) -> BFI1_A { match self.bits { - false => Bfi1::Value1, - true => Bfi1::Value2, + false => BFI1_A::VALUE1, + true => BFI1_A::VALUE2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfi1::Value1 + *self == BFI1_A::VALUE1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfi1::Value2 + *self == BFI1_A::VALUE2 } } #[doc = "Field `BFI1` writer - Boundary Flag 1 Inversion Control"] -pub type Bfi1W<'a, REG> = crate::BitWriter<'a, REG, Bfi1>; -impl<'a, REG> Bfi1W<'a, REG> +pub type BFI1_W<'a, REG> = crate::BitWriter<'a, REG, BFI1_A>; +impl<'a, REG> BFI1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfi1::Value1) + self.variant(BFI1_A::VALUE1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfi1::Value2) + self.variant(BFI1_A::VALUE2) } } #[doc = "Boundary Flag 2 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfi2 { +pub enum BFI2_A { #[doc = "0: Use BFLy directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Invert value and use BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfi2) -> Self { + fn from(variant: BFI2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFI2` reader - Boundary Flag 2 Inversion Control"] -pub type Bfi2R = crate::BitReader; -impl Bfi2R { +pub type BFI2_R = crate::BitReader; +impl BFI2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfi2 { + pub const fn variant(&self) -> BFI2_A { match self.bits { - false => Bfi2::Value1, - true => Bfi2::Value2, + false => BFI2_A::VALUE1, + true => BFI2_A::VALUE2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfi2::Value1 + *self == BFI2_A::VALUE1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfi2::Value2 + *self == BFI2_A::VALUE2 } } #[doc = "Field `BFI2` writer - Boundary Flag 2 Inversion Control"] -pub type Bfi2W<'a, REG> = crate::BitWriter<'a, REG, Bfi2>; -impl<'a, REG> Bfi2W<'a, REG> +pub type BFI2_W<'a, REG> = crate::BitWriter<'a, REG, BFI2_A>; +impl<'a, REG> BFI2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfi2::Value1) + self.variant(BFI2_A::VALUE1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfi2::Value2) + self.variant(BFI2_A::VALUE2) } } #[doc = "Boundary Flag 3 Inversion Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfi3 { +pub enum BFI3_A { #[doc = "0: Use BFLy directly"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Invert value and use BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfi3) -> Self { + fn from(variant: BFI3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFI3` reader - Boundary Flag 3 Inversion Control"] -pub type Bfi3R = crate::BitReader; -impl Bfi3R { +pub type BFI3_R = crate::BitReader; +impl BFI3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bfi3 { + pub const fn variant(&self) -> BFI3_A { match self.bits { - false => Bfi3::Value1, - true => Bfi3::Value2, + false => BFI3_A::VALUE1, + true => BFI3_A::VALUE2, } } #[doc = "Use BFLy directly"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfi3::Value1 + *self == BFI3_A::VALUE1 } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfi3::Value2 + *self == BFI3_A::VALUE2 } } #[doc = "Field `BFI3` writer - Boundary Flag 3 Inversion Control"] -pub type Bfi3W<'a, REG> = crate::BitWriter<'a, REG, Bfi3>; -impl<'a, REG> Bfi3W<'a, REG> +pub type BFI3_W<'a, REG> = crate::BitWriter<'a, REG, BFI3_A>; +impl<'a, REG> BFI3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use BFLy directly"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfi3::Value1) + self.variant(BFI3_A::VALUE1) } #[doc = "Invert value and use BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfi3::Value2) + self.variant(BFI3_A::VALUE2) } } impl R { #[doc = "Bit 0 - Boundary Flag 0"] #[inline(always)] - pub fn bfl0(&self) -> Bfl0R { - Bfl0R::new((self.bits & 1) != 0) + pub fn bfl0(&self) -> BFL0_R { + BFL0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Boundary Flag 1"] #[inline(always)] - pub fn bfl1(&self) -> Bfl1R { - Bfl1R::new(((self.bits >> 1) & 1) != 0) + pub fn bfl1(&self) -> BFL1_R { + BFL1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Boundary Flag 2"] #[inline(always)] - pub fn bfl2(&self) -> Bfl2R { - Bfl2R::new(((self.bits >> 2) & 1) != 0) + pub fn bfl2(&self) -> BFL2_R { + BFL2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Boundary Flag 3"] #[inline(always)] - pub fn bfl3(&self) -> Bfl3R { - Bfl3R::new(((self.bits >> 3) & 1) != 0) + pub fn bfl3(&self) -> BFL3_R { + BFL3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 8 - Boundary Flag 0 Activation Select"] #[inline(always)] - pub fn bfa0(&self) -> Bfa0R { - Bfa0R::new(((self.bits >> 8) & 1) != 0) + pub fn bfa0(&self) -> BFA0_R { + BFA0_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Boundary Flag 1 Activation Select"] #[inline(always)] - pub fn bfa1(&self) -> Bfa1R { - Bfa1R::new(((self.bits >> 9) & 1) != 0) + pub fn bfa1(&self) -> BFA1_R { + BFA1_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Boundary Flag 2 Activation Select"] #[inline(always)] - pub fn bfa2(&self) -> Bfa2R { - Bfa2R::new(((self.bits >> 10) & 1) != 0) + pub fn bfa2(&self) -> BFA2_R { + BFA2_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Boundary Flag 3 Activation Select"] #[inline(always)] - pub fn bfa3(&self) -> Bfa3R { - Bfa3R::new(((self.bits >> 11) & 1) != 0) + pub fn bfa3(&self) -> BFA3_R { + BFA3_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"] #[inline(always)] - pub fn bfi0(&self) -> Bfi0R { - Bfi0R::new(((self.bits >> 16) & 1) != 0) + pub fn bfi0(&self) -> BFI0_R { + BFI0_R::new(((self.bits >> 16) & 1) != 0) } #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"] #[inline(always)] - pub fn bfi1(&self) -> Bfi1R { - Bfi1R::new(((self.bits >> 17) & 1) != 0) + pub fn bfi1(&self) -> BFI1_R { + BFI1_R::new(((self.bits >> 17) & 1) != 0) } #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"] #[inline(always)] - pub fn bfi2(&self) -> Bfi2R { - Bfi2R::new(((self.bits >> 18) & 1) != 0) + pub fn bfi2(&self) -> BFI2_R { + BFI2_R::new(((self.bits >> 18) & 1) != 0) } #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"] #[inline(always)] - pub fn bfi3(&self) -> Bfi3R { - Bfi3R::new(((self.bits >> 19) & 1) != 0) + pub fn bfi3(&self) -> BFI3_R { + BFI3_R::new(((self.bits >> 19) & 1) != 0) } } impl W { #[doc = "Bit 8 - Boundary Flag 0 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa0(&mut self) -> Bfa0W { - Bfa0W::new(self, 8) + pub fn bfa0(&mut self) -> BFA0_W { + BFA0_W::new(self, 8) } #[doc = "Bit 9 - Boundary Flag 1 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa1(&mut self) -> Bfa1W { - Bfa1W::new(self, 9) + pub fn bfa1(&mut self) -> BFA1_W { + BFA1_W::new(self, 9) } #[doc = "Bit 10 - Boundary Flag 2 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa2(&mut self) -> Bfa2W { - Bfa2W::new(self, 10) + pub fn bfa2(&mut self) -> BFA2_W { + BFA2_W::new(self, 10) } #[doc = "Bit 11 - Boundary Flag 3 Activation Select"] #[inline(always)] #[must_use] - pub fn bfa3(&mut self) -> Bfa3W { - Bfa3W::new(self, 11) + pub fn bfa3(&mut self) -> BFA3_W { + BFA3_W::new(self, 11) } #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi0(&mut self) -> Bfi0W { - Bfi0W::new(self, 16) + pub fn bfi0(&mut self) -> BFI0_W { + BFI0_W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi1(&mut self) -> Bfi1W { - Bfi1W::new(self, 17) + pub fn bfi1(&mut self) -> BFI1_W { + BFI1_W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi2(&mut self) -> Bfi2W { - Bfi2W::new(self, 18) + pub fn bfi2(&mut self) -> BFI2_W { + BFI2_W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"] #[inline(always)] #[must_use] - pub fn bfi3(&mut self) -> Bfi3W { - Bfi3W::new(self, 19) + pub fn bfi3(&mut self) -> BFI3_W { + BFI3_W::new(self, 19) } } #[doc = "Boundary Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bfl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BflSpec; -impl crate::RegisterSpec for BflSpec { +pub struct BFL_SPEC; +impl crate::RegisterSpec for BFL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bfl::R`](R) reader structure"] -impl crate::Readable for BflSpec {} +impl crate::Readable for BFL_SPEC {} #[doc = "`write(|w| ..)` method takes [`bfl::W`](W) writer structure"] -impl crate::Writable for BflSpec { +impl crate::Writable for BFL_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFL to value 0"] -impl crate::Resettable for BflSpec { +impl crate::Resettable for BFL_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bflc.rs b/src/vadc_g0/bflc.rs index a986e437..570ea1e9 100644 --- a/src/vadc_g0/bflc.rs +++ b/src/vadc_g0/bflc.rs @@ -1,68 +1,68 @@ #[doc = "Register `BFLC` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFLC` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfm0 { +pub enum BFM0_A { #[doc = "0: Disable boundary flag, BFLy is not changed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfm0) -> Self { + fn from(variant: BFM0_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfm0 { +impl crate::FieldSpec for BFM0_A { type Ux = u8; } -impl crate::IsEnum for Bfm0 {} +impl crate::IsEnum for BFM0_A {} #[doc = "Field `BFM0` reader - Boundary Flag y Mode Control"] -pub type Bfm0R = crate::FieldReader; -impl Bfm0R { +pub type BFM0_R = crate::FieldReader; +impl BFM0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfm0::Value1), - 1 => Some(Bfm0::Value2), - 2 => Some(Bfm0::Value3), - 3 => Some(Bfm0::Value4), + 0 => Some(BFM0_A::VALUE1), + 1 => Some(BFM0_A::VALUE2), + 2 => Some(BFM0_A::VALUE3), + 3 => Some(BFM0_A::VALUE4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfm0::Value1 + *self == BFM0_A::VALUE1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfm0::Value2 + *self == BFM0_A::VALUE2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfm0::Value3 + *self == BFM0_A::VALUE3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfm0::Value4 + *self == BFM0_A::VALUE4 } } #[doc = "Field `BFM0` writer - Boundary Flag y Mode Control"] -pub type Bfm0W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm0>; -impl<'a, REG> Bfm0W<'a, REG> +pub type BFM0_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM0_A>; +impl<'a, REG> BFM0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfm0::Value1) + self.variant(BFM0_A::VALUE1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfm0::Value2) + self.variant(BFM0_A::VALUE2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfm0::Value3) + self.variant(BFM0_A::VALUE3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfm0::Value4) + self.variant(BFM0_A::VALUE4) } } #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfm1 { +pub enum BFM1_A { #[doc = "0: Disable boundary flag, BFLy is not changed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfm1) -> Self { + fn from(variant: BFM1_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfm1 { +impl crate::FieldSpec for BFM1_A { type Ux = u8; } -impl crate::IsEnum for Bfm1 {} +impl crate::IsEnum for BFM1_A {} #[doc = "Field `BFM1` reader - Boundary Flag y Mode Control"] -pub type Bfm1R = crate::FieldReader; -impl Bfm1R { +pub type BFM1_R = crate::FieldReader; +impl BFM1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfm1::Value1), - 1 => Some(Bfm1::Value2), - 2 => Some(Bfm1::Value3), - 3 => Some(Bfm1::Value4), + 0 => Some(BFM1_A::VALUE1), + 1 => Some(BFM1_A::VALUE2), + 2 => Some(BFM1_A::VALUE3), + 3 => Some(BFM1_A::VALUE4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfm1::Value1 + *self == BFM1_A::VALUE1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfm1::Value2 + *self == BFM1_A::VALUE2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfm1::Value3 + *self == BFM1_A::VALUE3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfm1::Value4 + *self == BFM1_A::VALUE4 } } #[doc = "Field `BFM1` writer - Boundary Flag y Mode Control"] -pub type Bfm1W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm1>; -impl<'a, REG> Bfm1W<'a, REG> +pub type BFM1_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM1_A>; +impl<'a, REG> BFM1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfm1::Value1) + self.variant(BFM1_A::VALUE1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfm1::Value2) + self.variant(BFM1_A::VALUE2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfm1::Value3) + self.variant(BFM1_A::VALUE3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfm1::Value4) + self.variant(BFM1_A::VALUE4) } } #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfm2 { +pub enum BFM2_A { #[doc = "0: Disable boundary flag, BFLy is not changed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfm2) -> Self { + fn from(variant: BFM2_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfm2 { +impl crate::FieldSpec for BFM2_A { type Ux = u8; } -impl crate::IsEnum for Bfm2 {} +impl crate::IsEnum for BFM2_A {} #[doc = "Field `BFM2` reader - Boundary Flag y Mode Control"] -pub type Bfm2R = crate::FieldReader; -impl Bfm2R { +pub type BFM2_R = crate::FieldReader; +impl BFM2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfm2::Value1), - 1 => Some(Bfm2::Value2), - 2 => Some(Bfm2::Value3), - 3 => Some(Bfm2::Value4), + 0 => Some(BFM2_A::VALUE1), + 1 => Some(BFM2_A::VALUE2), + 2 => Some(BFM2_A::VALUE3), + 3 => Some(BFM2_A::VALUE4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfm2::Value1 + *self == BFM2_A::VALUE1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfm2::Value2 + *self == BFM2_A::VALUE2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfm2::Value3 + *self == BFM2_A::VALUE3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfm2::Value4 + *self == BFM2_A::VALUE4 } } #[doc = "Field `BFM2` writer - Boundary Flag y Mode Control"] -pub type Bfm2W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm2>; -impl<'a, REG> Bfm2W<'a, REG> +pub type BFM2_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM2_A>; +impl<'a, REG> BFM2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfm2::Value1) + self.variant(BFM2_A::VALUE1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfm2::Value2) + self.variant(BFM2_A::VALUE2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfm2::Value3) + self.variant(BFM2_A::VALUE3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfm2::Value4) + self.variant(BFM2_A::VALUE4) } } #[doc = "Boundary Flag y Mode Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfm3 { +pub enum BFM3_A { #[doc = "0: Disable boundary flag, BFLy is not changed"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Always enable boundary flag (follow compare results)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfm3) -> Self { + fn from(variant: BFM3_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfm3 { +impl crate::FieldSpec for BFM3_A { type Ux = u8; } -impl crate::IsEnum for Bfm3 {} +impl crate::IsEnum for BFM3_A {} #[doc = "Field `BFM3` reader - Boundary Flag y Mode Control"] -pub type Bfm3R = crate::FieldReader; -impl Bfm3R { +pub type BFM3_R = crate::FieldReader; +impl BFM3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfm3::Value1), - 1 => Some(Bfm3::Value2), - 2 => Some(Bfm3::Value3), - 3 => Some(Bfm3::Value4), + 0 => Some(BFM3_A::VALUE1), + 1 => Some(BFM3_A::VALUE2), + 2 => Some(BFM3_A::VALUE3), + 3 => Some(BFM3_A::VALUE4), _ => None, } } #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfm3::Value1 + *self == BFM3_A::VALUE1 } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfm3::Value2 + *self == BFM3_A::VALUE2 } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfm3::Value3 + *self == BFM3_A::VALUE3 } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfm3::Value4 + *self == BFM3_A::VALUE4 } } #[doc = "Field `BFM3` writer - Boundary Flag y Mode Control"] -pub type Bfm3W<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfm3>; -impl<'a, REG> Bfm3W<'a, REG> +pub type BFM3_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFM3_A>; +impl<'a, REG> BFM3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,86 +328,86 @@ where #[doc = "Disable boundary flag, BFLy is not changed"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfm3::Value1) + self.variant(BFM3_A::VALUE1) } #[doc = "Always enable boundary flag (follow compare results)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfm3::Value2) + self.variant(BFM3_A::VALUE2) } #[doc = "Enable boundary flag while gate of source 0 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfm3::Value3) + self.variant(BFM3_A::VALUE3) } #[doc = "Enable boundary flag while gate of source 1 is active, clear BFLy while gate is inactive"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfm3::Value4) + self.variant(BFM3_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm0(&self) -> Bfm0R { - Bfm0R::new((self.bits & 0x0f) as u8) + pub fn bfm0(&self) -> BFM0_R { + BFM0_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm1(&self) -> Bfm1R { - Bfm1R::new(((self.bits >> 4) & 0x0f) as u8) + pub fn bfm1(&self) -> BFM1_R { + BFM1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm2(&self) -> Bfm2R { - Bfm2R::new(((self.bits >> 8) & 0x0f) as u8) + pub fn bfm2(&self) -> BFM2_R { + BFM2_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Boundary Flag y Mode Control"] #[inline(always)] - pub fn bfm3(&self) -> Bfm3R { - Bfm3R::new(((self.bits >> 12) & 0x0f) as u8) + pub fn bfm3(&self) -> BFM3_R { + BFM3_R::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm0(&mut self) -> Bfm0W { - Bfm0W::new(self, 0) + pub fn bfm0(&mut self) -> BFM0_W { + BFM0_W::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm1(&mut self) -> Bfm1W { - Bfm1W::new(self, 4) + pub fn bfm1(&mut self) -> BFM1_W { + BFM1_W::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm2(&mut self) -> Bfm2W { - Bfm2W::new(self, 8) + pub fn bfm2(&mut self) -> BFM2_W { + BFM2_W::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Mode Control"] #[inline(always)] #[must_use] - pub fn bfm3(&mut self) -> Bfm3W { - Bfm3W::new(self, 12) + pub fn bfm3(&mut self) -> BFM3_W { + BFM3_W::new(self, 12) } } #[doc = "Boundary Flag Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflc::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflc::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BflcSpec; -impl crate::RegisterSpec for BflcSpec { +pub struct BFLC_SPEC; +impl crate::RegisterSpec for BFLC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bflc::R`](R) reader structure"] -impl crate::Readable for BflcSpec {} +impl crate::Readable for BFLC_SPEC {} #[doc = "`write(|w| ..)` method takes [`bflc::W`](W) writer structure"] -impl crate::Writable for BflcSpec { +impl crate::Writable for BFLC_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLC to value 0"] -impl crate::Resettable for BflcSpec { +impl crate::Resettable for BFLC_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bflnp.rs b/src/vadc_g0/bflnp.rs index d065a0a6..041dfe7c 100644 --- a/src/vadc_g0/bflnp.rs +++ b/src/vadc_g0/bflnp.rs @@ -1,76 +1,76 @@ #[doc = "Register `BFLNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BFLNP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfl0np { +pub enum BFL0NP_A { #[doc = "0: Select common bondary flag output 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select common bondary flag output 3"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, #[doc = "15: Disabled, no common output signal"] - Value5 = 15, + VALUE5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfl0np) -> Self { + fn from(variant: BFL0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfl0np { +impl crate::FieldSpec for BFL0NP_A { type Ux = u8; } -impl crate::IsEnum for Bfl0np {} +impl crate::IsEnum for BFL0NP_A {} #[doc = "Field `BFL0NP` reader - Boundary Flag y Node Pointer"] -pub type Bfl0npR = crate::FieldReader; -impl Bfl0npR { +pub type BFL0NP_R = crate::FieldReader; +impl BFL0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfl0np::Value1), - 3 => Some(Bfl0np::Value2), - 4 => Some(Bfl0np::Value3), - 7 => Some(Bfl0np::Value4), - 15 => Some(Bfl0np::Value5), + 0 => Some(BFL0NP_A::VALUE1), + 3 => Some(BFL0NP_A::VALUE2), + 4 => Some(BFL0NP_A::VALUE3), + 7 => Some(BFL0NP_A::VALUE4), + 15 => Some(BFL0NP_A::VALUE5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl0np::Value1 + *self == BFL0NP_A::VALUE1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl0np::Value2 + *self == BFL0NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfl0np::Value3 + *self == BFL0NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfl0np::Value4 + *self == BFL0NP_A::VALUE4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Bfl0np::Value5 + *self == BFL0NP_A::VALUE5 } } #[doc = "Field `BFL0NP` writer - Boundary Flag y Node Pointer"] -pub type Bfl0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl0np>; -impl<'a, REG> Bfl0npW<'a, REG> +pub type BFL0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL0NP_A>; +impl<'a, REG> BFL0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -78,98 +78,98 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfl0np::Value1) + self.variant(BFL0NP_A::VALUE1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfl0np::Value2) + self.variant(BFL0NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfl0np::Value3) + self.variant(BFL0NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfl0np::Value4) + self.variant(BFL0NP_A::VALUE4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Bfl0np::Value5) + self.variant(BFL0NP_A::VALUE5) } } #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfl1np { +pub enum BFL1NP_A { #[doc = "0: Select common bondary flag output 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select common bondary flag output 3"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, #[doc = "15: Disabled, no common output signal"] - Value5 = 15, + VALUE5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfl1np) -> Self { + fn from(variant: BFL1NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfl1np { +impl crate::FieldSpec for BFL1NP_A { type Ux = u8; } -impl crate::IsEnum for Bfl1np {} +impl crate::IsEnum for BFL1NP_A {} #[doc = "Field `BFL1NP` reader - Boundary Flag y Node Pointer"] -pub type Bfl1npR = crate::FieldReader; -impl Bfl1npR { +pub type BFL1NP_R = crate::FieldReader; +impl BFL1NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfl1np::Value1), - 3 => Some(Bfl1np::Value2), - 4 => Some(Bfl1np::Value3), - 7 => Some(Bfl1np::Value4), - 15 => Some(Bfl1np::Value5), + 0 => Some(BFL1NP_A::VALUE1), + 3 => Some(BFL1NP_A::VALUE2), + 4 => Some(BFL1NP_A::VALUE3), + 7 => Some(BFL1NP_A::VALUE4), + 15 => Some(BFL1NP_A::VALUE5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl1np::Value1 + *self == BFL1NP_A::VALUE1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl1np::Value2 + *self == BFL1NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfl1np::Value3 + *self == BFL1NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfl1np::Value4 + *self == BFL1NP_A::VALUE4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Bfl1np::Value5 + *self == BFL1NP_A::VALUE5 } } #[doc = "Field `BFL1NP` writer - Boundary Flag y Node Pointer"] -pub type Bfl1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl1np>; -impl<'a, REG> Bfl1npW<'a, REG> +pub type BFL1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL1NP_A>; +impl<'a, REG> BFL1NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -177,98 +177,98 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfl1np::Value1) + self.variant(BFL1NP_A::VALUE1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfl1np::Value2) + self.variant(BFL1NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfl1np::Value3) + self.variant(BFL1NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfl1np::Value4) + self.variant(BFL1NP_A::VALUE4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Bfl1np::Value5) + self.variant(BFL1NP_A::VALUE5) } } #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfl2np { +pub enum BFL2NP_A { #[doc = "0: Select common bondary flag output 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select common bondary flag output 3"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, #[doc = "15: Disabled, no common output signal"] - Value5 = 15, + VALUE5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfl2np) -> Self { + fn from(variant: BFL2NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfl2np { +impl crate::FieldSpec for BFL2NP_A { type Ux = u8; } -impl crate::IsEnum for Bfl2np {} +impl crate::IsEnum for BFL2NP_A {} #[doc = "Field `BFL2NP` reader - Boundary Flag y Node Pointer"] -pub type Bfl2npR = crate::FieldReader; -impl Bfl2npR { +pub type BFL2NP_R = crate::FieldReader; +impl BFL2NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfl2np::Value1), - 3 => Some(Bfl2np::Value2), - 4 => Some(Bfl2np::Value3), - 7 => Some(Bfl2np::Value4), - 15 => Some(Bfl2np::Value5), + 0 => Some(BFL2NP_A::VALUE1), + 3 => Some(BFL2NP_A::VALUE2), + 4 => Some(BFL2NP_A::VALUE3), + 7 => Some(BFL2NP_A::VALUE4), + 15 => Some(BFL2NP_A::VALUE5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl2np::Value1 + *self == BFL2NP_A::VALUE1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl2np::Value2 + *self == BFL2NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfl2np::Value3 + *self == BFL2NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfl2np::Value4 + *self == BFL2NP_A::VALUE4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Bfl2np::Value5 + *self == BFL2NP_A::VALUE5 } } #[doc = "Field `BFL2NP` writer - Boundary Flag y Node Pointer"] -pub type Bfl2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl2np>; -impl<'a, REG> Bfl2npW<'a, REG> +pub type BFL2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL2NP_A>; +impl<'a, REG> BFL2NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -276,98 +276,98 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfl2np::Value1) + self.variant(BFL2NP_A::VALUE1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfl2np::Value2) + self.variant(BFL2NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfl2np::Value3) + self.variant(BFL2NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfl2np::Value4) + self.variant(BFL2NP_A::VALUE4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Bfl2np::Value5) + self.variant(BFL2NP_A::VALUE5) } } #[doc = "Boundary Flag y Node Pointer\n\nValue on reset: 15"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bfl3np { +pub enum BFL3NP_A { #[doc = "0: Select common bondary flag output 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select common bondary flag output 3"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, #[doc = "15: Disabled, no common output signal"] - Value5 = 15, + VALUE5 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bfl3np) -> Self { + fn from(variant: BFL3NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bfl3np { +impl crate::FieldSpec for BFL3NP_A { type Ux = u8; } -impl crate::IsEnum for Bfl3np {} +impl crate::IsEnum for BFL3NP_A {} #[doc = "Field `BFL3NP` reader - Boundary Flag y Node Pointer"] -pub type Bfl3npR = crate::FieldReader; -impl Bfl3npR { +pub type BFL3NP_R = crate::FieldReader; +impl BFL3NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bfl3np::Value1), - 3 => Some(Bfl3np::Value2), - 4 => Some(Bfl3np::Value3), - 7 => Some(Bfl3np::Value4), - 15 => Some(Bfl3np::Value5), + 0 => Some(BFL3NP_A::VALUE1), + 3 => Some(BFL3NP_A::VALUE2), + 4 => Some(BFL3NP_A::VALUE3), + 7 => Some(BFL3NP_A::VALUE4), + 15 => Some(BFL3NP_A::VALUE5), _ => None, } } #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bfl3np::Value1 + *self == BFL3NP_A::VALUE1 } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bfl3np::Value2 + *self == BFL3NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bfl3np::Value3 + *self == BFL3NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bfl3np::Value4 + *self == BFL3NP_A::VALUE4 } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn is_value5(&self) -> bool { - *self == Bfl3np::Value5 + *self == BFL3NP_A::VALUE5 } } #[doc = "Field `BFL3NP` writer - Boundary Flag y Node Pointer"] -pub type Bfl3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Bfl3np>; -impl<'a, REG> Bfl3npW<'a, REG> +pub type BFL3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, BFL3NP_A>; +impl<'a, REG> BFL3NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -375,91 +375,91 @@ where #[doc = "Select common bondary flag output 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfl3np::Value1) + self.variant(BFL3NP_A::VALUE1) } #[doc = "Select common bondary flag output 3"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfl3np::Value2) + self.variant(BFL3NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bfl3np::Value3) + self.variant(BFL3NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bfl3np::Value4) + self.variant(BFL3NP_A::VALUE4) } #[doc = "Disabled, no common output signal"] #[inline(always)] pub fn value5(self) -> &'a mut crate::W { - self.variant(Bfl3np::Value5) + self.variant(BFL3NP_A::VALUE5) } } impl R { #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl0np(&self) -> Bfl0npR { - Bfl0npR::new((self.bits & 0x0f) as u8) + pub fn bfl0np(&self) -> BFL0NP_R { + BFL0NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl1np(&self) -> Bfl1npR { - Bfl1npR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn bfl1np(&self) -> BFL1NP_R { + BFL1NP_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl2np(&self) -> Bfl2npR { - Bfl2npR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn bfl2np(&self) -> BFL2NP_R { + BFL2NP_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"] #[inline(always)] - pub fn bfl3np(&self) -> Bfl3npR { - Bfl3npR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn bfl3np(&self) -> BFL3NP_R { + BFL3NP_R::new(((self.bits >> 12) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl0np(&mut self) -> Bfl0npW { - Bfl0npW::new(self, 0) + pub fn bfl0np(&mut self) -> BFL0NP_W { + BFL0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl1np(&mut self) -> Bfl1npW { - Bfl1npW::new(self, 4) + pub fn bfl1np(&mut self) -> BFL1NP_W { + BFL1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl2np(&mut self) -> Bfl2npW { - Bfl2npW::new(self, 8) + pub fn bfl2np(&mut self) -> BFL2NP_W { + BFL2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"] #[inline(always)] #[must_use] - pub fn bfl3np(&mut self) -> Bfl3npW { - Bfl3npW::new(self, 12) + pub fn bfl3np(&mut self) -> BFL3NP_W { + BFL3NP_W::new(self, 12) } } #[doc = "Boundary Flag Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bflnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bflnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BflnpSpec; -impl crate::RegisterSpec for BflnpSpec { +pub struct BFLNP_SPEC; +impl crate::RegisterSpec for BFLNP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bflnp::R`](R) reader structure"] -impl crate::Readable for BflnpSpec {} +impl crate::Readable for BFLNP_SPEC {} #[doc = "`write(|w| ..)` method takes [`bflnp::W`](W) writer structure"] -impl crate::Writable for BflnpSpec { +impl crate::Writable for BFLNP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLNP to value 0xffff"] -impl crate::Resettable for BflnpSpec { +impl crate::Resettable for BFLNP_SPEC { const RESET_VALUE: u32 = 0xffff; } diff --git a/src/vadc_g0/bfls.rs b/src/vadc_g0/bfls.rs index 53d21c61..1cc70d08 100644 --- a/src/vadc_g0/bfls.rs +++ b/src/vadc_g0/bfls.rs @@ -1,315 +1,315 @@ #[doc = "Register `BFLS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Boundary Flag 0 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfc0 { +pub enum BFC0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfc0) -> Self { + fn from(variant: BFC0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC0` writer - Boundary Flag 0 Clear"] -pub type Bfc0W<'a, REG> = crate::BitWriter<'a, REG, Bfc0>; -impl<'a, REG> Bfc0W<'a, REG> +pub type BFC0_W<'a, REG> = crate::BitWriter<'a, REG, BFC0_A>; +impl<'a, REG> BFC0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfc0::Value1) + self.variant(BFC0_A::VALUE1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfc0::Value2) + self.variant(BFC0_A::VALUE2) } } #[doc = "Boundary Flag 1 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfc1 { +pub enum BFC1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfc1) -> Self { + fn from(variant: BFC1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC1` writer - Boundary Flag 1 Clear"] -pub type Bfc1W<'a, REG> = crate::BitWriter<'a, REG, Bfc1>; -impl<'a, REG> Bfc1W<'a, REG> +pub type BFC1_W<'a, REG> = crate::BitWriter<'a, REG, BFC1_A>; +impl<'a, REG> BFC1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfc1::Value1) + self.variant(BFC1_A::VALUE1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfc1::Value2) + self.variant(BFC1_A::VALUE2) } } #[doc = "Boundary Flag 2 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfc2 { +pub enum BFC2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfc2) -> Self { + fn from(variant: BFC2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC2` writer - Boundary Flag 2 Clear"] -pub type Bfc2W<'a, REG> = crate::BitWriter<'a, REG, Bfc2>; -impl<'a, REG> Bfc2W<'a, REG> +pub type BFC2_W<'a, REG> = crate::BitWriter<'a, REG, BFC2_A>; +impl<'a, REG> BFC2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfc2::Value1) + self.variant(BFC2_A::VALUE1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfc2::Value2) + self.variant(BFC2_A::VALUE2) } } #[doc = "Boundary Flag 3 Clear\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfc3 { +pub enum BFC3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfc3) -> Self { + fn from(variant: BFC3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFC3` writer - Boundary Flag 3 Clear"] -pub type Bfc3W<'a, REG> = crate::BitWriter<'a, REG, Bfc3>; -impl<'a, REG> Bfc3W<'a, REG> +pub type BFC3_W<'a, REG> = crate::BitWriter<'a, REG, BFC3_A>; +impl<'a, REG> BFC3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfc3::Value1) + self.variant(BFC3_A::VALUE1) } #[doc = "Clear bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfc3::Value2) + self.variant(BFC3_A::VALUE2) } } #[doc = "Boundary Flag 0 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfs0 { +pub enum BFS0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfs0) -> Self { + fn from(variant: BFS0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS0` writer - Boundary Flag 0 Set"] -pub type Bfs0W<'a, REG> = crate::BitWriter<'a, REG, Bfs0>; -impl<'a, REG> Bfs0W<'a, REG> +pub type BFS0_W<'a, REG> = crate::BitWriter<'a, REG, BFS0_A>; +impl<'a, REG> BFS0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfs0::Value1) + self.variant(BFS0_A::VALUE1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfs0::Value2) + self.variant(BFS0_A::VALUE2) } } #[doc = "Boundary Flag 1 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfs1 { +pub enum BFS1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfs1) -> Self { + fn from(variant: BFS1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS1` writer - Boundary Flag 1 Set"] -pub type Bfs1W<'a, REG> = crate::BitWriter<'a, REG, Bfs1>; -impl<'a, REG> Bfs1W<'a, REG> +pub type BFS1_W<'a, REG> = crate::BitWriter<'a, REG, BFS1_A>; +impl<'a, REG> BFS1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfs1::Value1) + self.variant(BFS1_A::VALUE1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfs1::Value2) + self.variant(BFS1_A::VALUE2) } } #[doc = "Boundary Flag 2 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfs2 { +pub enum BFS2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfs2) -> Self { + fn from(variant: BFS2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS2` writer - Boundary Flag 2 Set"] -pub type Bfs2W<'a, REG> = crate::BitWriter<'a, REG, Bfs2>; -impl<'a, REG> Bfs2W<'a, REG> +pub type BFS2_W<'a, REG> = crate::BitWriter<'a, REG, BFS2_A>; +impl<'a, REG> BFS2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfs2::Value1) + self.variant(BFS2_A::VALUE1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfs2::Value2) + self.variant(BFS2_A::VALUE2) } } #[doc = "Boundary Flag 3 Set\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bfs3 { +pub enum BFS3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Set bit BFLy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bfs3) -> Self { + fn from(variant: BFS3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BFS3` writer - Boundary Flag 3 Set"] -pub type Bfs3W<'a, REG> = crate::BitWriter<'a, REG, Bfs3>; -impl<'a, REG> Bfs3W<'a, REG> +pub type BFS3_W<'a, REG> = crate::BitWriter<'a, REG, BFS3_A>; +impl<'a, REG> BFS3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bfs3::Value1) + self.variant(BFS3_A::VALUE1) } #[doc = "Set bit BFLy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bfs3::Value2) + self.variant(BFS3_A::VALUE2) } } impl W { #[doc = "Bit 0 - Boundary Flag 0 Clear"] #[inline(always)] #[must_use] - pub fn bfc0(&mut self) -> Bfc0W { - Bfc0W::new(self, 0) + pub fn bfc0(&mut self) -> BFC0_W { + BFC0_W::new(self, 0) } #[doc = "Bit 1 - Boundary Flag 1 Clear"] #[inline(always)] #[must_use] - pub fn bfc1(&mut self) -> Bfc1W { - Bfc1W::new(self, 1) + pub fn bfc1(&mut self) -> BFC1_W { + BFC1_W::new(self, 1) } #[doc = "Bit 2 - Boundary Flag 2 Clear"] #[inline(always)] #[must_use] - pub fn bfc2(&mut self) -> Bfc2W { - Bfc2W::new(self, 2) + pub fn bfc2(&mut self) -> BFC2_W { + BFC2_W::new(self, 2) } #[doc = "Bit 3 - Boundary Flag 3 Clear"] #[inline(always)] #[must_use] - pub fn bfc3(&mut self) -> Bfc3W { - Bfc3W::new(self, 3) + pub fn bfc3(&mut self) -> BFC3_W { + BFC3_W::new(self, 3) } #[doc = "Bit 16 - Boundary Flag 0 Set"] #[inline(always)] #[must_use] - pub fn bfs0(&mut self) -> Bfs0W { - Bfs0W::new(self, 16) + pub fn bfs0(&mut self) -> BFS0_W { + BFS0_W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Set"] #[inline(always)] #[must_use] - pub fn bfs1(&mut self) -> Bfs1W { - Bfs1W::new(self, 17) + pub fn bfs1(&mut self) -> BFS1_W { + BFS1_W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Set"] #[inline(always)] #[must_use] - pub fn bfs2(&mut self) -> Bfs2W { - Bfs2W::new(self, 18) + pub fn bfs2(&mut self) -> BFS2_W { + BFS2_W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Set"] #[inline(always)] #[must_use] - pub fn bfs3(&mut self) -> Bfs3W { - Bfs3W::new(self, 19) + pub fn bfs3(&mut self) -> BFS3_W { + BFS3_W::new(self, 19) } } #[doc = "Boundary Flag Software Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bfls::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BflsSpec; -impl crate::RegisterSpec for BflsSpec { +pub struct BFLS_SPEC; +impl crate::RegisterSpec for BFLS_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`bfls::W`](W) writer structure"] -impl crate::Writable for BflsSpec { +impl crate::Writable for BFLS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BFLS to value 0"] -impl crate::Resettable for BflsSpec { +impl crate::Resettable for BFLS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/bound.rs b/src/vadc_g0/bound.rs index fcea395c..69473673 100644 --- a/src/vadc_g0/bound.rs +++ b/src/vadc_g0/bound.rs @@ -1,55 +1,55 @@ #[doc = "Register `BOUND` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `BOUND` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `BOUNDARY0` reader - Boundary Value 0 for Limit Checking"] -pub type Boundary0R = crate::FieldReader; +pub type BOUNDARY0_R = crate::FieldReader; #[doc = "Field `BOUNDARY0` writer - Boundary Value 0 for Limit Checking"] -pub type Boundary0W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BOUNDARY0_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; #[doc = "Field `BOUNDARY1` reader - Boundary Value 1 for Limit Checking"] -pub type Boundary1R = crate::FieldReader; +pub type BOUNDARY1_R = crate::FieldReader; #[doc = "Field `BOUNDARY1` writer - Boundary Value 1 for Limit Checking"] -pub type Boundary1W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; +pub type BOUNDARY1_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>; impl R { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - pub fn boundary0(&self) -> Boundary0R { - Boundary0R::new((self.bits & 0x0fff) as u16) + pub fn boundary0(&self) -> BOUNDARY0_R { + BOUNDARY0_R::new((self.bits & 0x0fff) as u16) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - pub fn boundary1(&self) -> Boundary1R { - Boundary1R::new(((self.bits >> 16) & 0x0fff) as u16) + pub fn boundary1(&self) -> BOUNDARY1_R { + BOUNDARY1_R::new(((self.bits >> 16) & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary0(&mut self) -> Boundary0W { - Boundary0W::new(self, 0) + pub fn boundary0(&mut self) -> BOUNDARY0_W { + BOUNDARY0_W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] #[must_use] - pub fn boundary1(&mut self) -> Boundary1W { - Boundary1W::new(self, 16) + pub fn boundary1(&mut self) -> BOUNDARY1_W { + BOUNDARY1_W::new(self, 16) } } #[doc = "Boundary Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bound::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bound::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct BoundSpec; -impl crate::RegisterSpec for BoundSpec { +pub struct BOUND_SPEC; +impl crate::RegisterSpec for BOUND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`bound::R`](R) reader structure"] -impl crate::Readable for BoundSpec {} +impl crate::Readable for BOUND_SPEC {} #[doc = "`write(|w| ..)` method takes [`bound::W`](W) writer structure"] -impl crate::Writable for BoundSpec { +impl crate::Writable for BOUND_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets BOUND to value 0"] -impl crate::Resettable for BoundSpec { +impl crate::Resettable for BOUND_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/cefclr.rs b/src/vadc_g0/cefclr.rs index 83eb5445..57996efb 100644 --- a/src/vadc_g0/cefclr.rs +++ b/src/vadc_g0/cefclr.rs @@ -1,315 +1,315 @@ #[doc = "Register `CEFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Channel Event for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev0 { +pub enum CEV0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev0) -> Self { + fn from(variant: CEV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV0` writer - Clear Channel Event for Channel 0"] -pub type Cev0W<'a, REG> = crate::BitWriter<'a, REG, Cev0>; -impl<'a, REG> Cev0W<'a, REG> +pub type CEV0_W<'a, REG> = crate::BitWriter<'a, REG, CEV0_A>; +impl<'a, REG> CEV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev0::Value1) + self.variant(CEV0_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev0::Value2) + self.variant(CEV0_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev1 { +pub enum CEV1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev1) -> Self { + fn from(variant: CEV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV1` writer - Clear Channel Event for Channel 1"] -pub type Cev1W<'a, REG> = crate::BitWriter<'a, REG, Cev1>; -impl<'a, REG> Cev1W<'a, REG> +pub type CEV1_W<'a, REG> = crate::BitWriter<'a, REG, CEV1_A>; +impl<'a, REG> CEV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev1::Value1) + self.variant(CEV1_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev1::Value2) + self.variant(CEV1_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev2 { +pub enum CEV2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev2) -> Self { + fn from(variant: CEV2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV2` writer - Clear Channel Event for Channel 2"] -pub type Cev2W<'a, REG> = crate::BitWriter<'a, REG, Cev2>; -impl<'a, REG> Cev2W<'a, REG> +pub type CEV2_W<'a, REG> = crate::BitWriter<'a, REG, CEV2_A>; +impl<'a, REG> CEV2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev2::Value1) + self.variant(CEV2_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev2::Value2) + self.variant(CEV2_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev3 { +pub enum CEV3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev3) -> Self { + fn from(variant: CEV3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV3` writer - Clear Channel Event for Channel 3"] -pub type Cev3W<'a, REG> = crate::BitWriter<'a, REG, Cev3>; -impl<'a, REG> Cev3W<'a, REG> +pub type CEV3_W<'a, REG> = crate::BitWriter<'a, REG, CEV3_A>; +impl<'a, REG> CEV3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev3::Value1) + self.variant(CEV3_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev3::Value2) + self.variant(CEV3_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev4 { +pub enum CEV4_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev4) -> Self { + fn from(variant: CEV4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV4` writer - Clear Channel Event for Channel 4"] -pub type Cev4W<'a, REG> = crate::BitWriter<'a, REG, Cev4>; -impl<'a, REG> Cev4W<'a, REG> +pub type CEV4_W<'a, REG> = crate::BitWriter<'a, REG, CEV4_A>; +impl<'a, REG> CEV4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev4::Value1) + self.variant(CEV4_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev4::Value2) + self.variant(CEV4_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev5 { +pub enum CEV5_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev5) -> Self { + fn from(variant: CEV5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV5` writer - Clear Channel Event for Channel 5"] -pub type Cev5W<'a, REG> = crate::BitWriter<'a, REG, Cev5>; -impl<'a, REG> Cev5W<'a, REG> +pub type CEV5_W<'a, REG> = crate::BitWriter<'a, REG, CEV5_A>; +impl<'a, REG> CEV5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev5::Value1) + self.variant(CEV5_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev5::Value2) + self.variant(CEV5_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev6 { +pub enum CEV6_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev6) -> Self { + fn from(variant: CEV6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV6` writer - Clear Channel Event for Channel 6"] -pub type Cev6W<'a, REG> = crate::BitWriter<'a, REG, Cev6>; -impl<'a, REG> Cev6W<'a, REG> +pub type CEV6_W<'a, REG> = crate::BitWriter<'a, REG, CEV6_A>; +impl<'a, REG> CEV6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev6::Value1) + self.variant(CEV6_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev6::Value2) + self.variant(CEV6_A::VALUE2) } } #[doc = "Clear Channel Event for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev7 { +pub enum CEV7_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the channel event flag in GxCEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev7) -> Self { + fn from(variant: CEV7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV7` writer - Clear Channel Event for Channel 7"] -pub type Cev7W<'a, REG> = crate::BitWriter<'a, REG, Cev7>; -impl<'a, REG> Cev7W<'a, REG> +pub type CEV7_W<'a, REG> = crate::BitWriter<'a, REG, CEV7_A>; +impl<'a, REG> CEV7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev7::Value1) + self.variant(CEV7_A::VALUE1) } #[doc = "Clear the channel event flag in GxCEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev7::Value2) + self.variant(CEV7_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Channel Event for Channel 0"] #[inline(always)] #[must_use] - pub fn cev0(&mut self) -> Cev0W { - Cev0W::new(self, 0) + pub fn cev0(&mut self) -> CEV0_W { + CEV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Channel Event for Channel 1"] #[inline(always)] #[must_use] - pub fn cev1(&mut self) -> Cev1W { - Cev1W::new(self, 1) + pub fn cev1(&mut self) -> CEV1_W { + CEV1_W::new(self, 1) } #[doc = "Bit 2 - Clear Channel Event for Channel 2"] #[inline(always)] #[must_use] - pub fn cev2(&mut self) -> Cev2W { - Cev2W::new(self, 2) + pub fn cev2(&mut self) -> CEV2_W { + CEV2_W::new(self, 2) } #[doc = "Bit 3 - Clear Channel Event for Channel 3"] #[inline(always)] #[must_use] - pub fn cev3(&mut self) -> Cev3W { - Cev3W::new(self, 3) + pub fn cev3(&mut self) -> CEV3_W { + CEV3_W::new(self, 3) } #[doc = "Bit 4 - Clear Channel Event for Channel 4"] #[inline(always)] #[must_use] - pub fn cev4(&mut self) -> Cev4W { - Cev4W::new(self, 4) + pub fn cev4(&mut self) -> CEV4_W { + CEV4_W::new(self, 4) } #[doc = "Bit 5 - Clear Channel Event for Channel 5"] #[inline(always)] #[must_use] - pub fn cev5(&mut self) -> Cev5W { - Cev5W::new(self, 5) + pub fn cev5(&mut self) -> CEV5_W { + CEV5_W::new(self, 5) } #[doc = "Bit 6 - Clear Channel Event for Channel 6"] #[inline(always)] #[must_use] - pub fn cev6(&mut self) -> Cev6W { - Cev6W::new(self, 6) + pub fn cev6(&mut self) -> CEV6_W { + CEV6_W::new(self, 6) } #[doc = "Bit 7 - Clear Channel Event for Channel 7"] #[inline(always)] #[must_use] - pub fn cev7(&mut self) -> Cev7W { - Cev7W::new(self, 7) + pub fn cev7(&mut self) -> CEV7_W { + CEV7_W::new(self, 7) } } #[doc = "Channel Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CefclrSpec; -impl crate::RegisterSpec for CefclrSpec { +pub struct CEFCLR_SPEC; +impl crate::RegisterSpec for CEFCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`cefclr::W`](W) writer structure"] -impl crate::Writable for CefclrSpec { +impl crate::Writable for CEFCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEFCLR to value 0"] -impl crate::Resettable for CefclrSpec { +impl crate::Resettable for CEFCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/ceflag.rs b/src/vadc_g0/ceflag.rs index 2fa9e3ce..561bdec9 100644 --- a/src/vadc_g0/ceflag.rs +++ b/src/vadc_g0/ceflag.rs @@ -1,537 +1,537 @@ #[doc = "Register `CEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CEFLAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Channel Event for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev0 { +pub enum CEV0_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev0) -> Self { + fn from(variant: CEV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV0` reader - Channel Event for Channel 0"] -pub type Cev0R = crate::BitReader; -impl Cev0R { +pub type CEV0_R = crate::BitReader; +impl CEV0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev0 { + pub const fn variant(&self) -> CEV0_A { match self.bits { - false => Cev0::Value1, - true => Cev0::Value2, + false => CEV0_A::VALUE1, + true => CEV0_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev0::Value1 + *self == CEV0_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev0::Value2 + *self == CEV0_A::VALUE2 } } #[doc = "Field `CEV0` writer - Channel Event for Channel 0"] -pub type Cev0W<'a, REG> = crate::BitWriter<'a, REG, Cev0>; -impl<'a, REG> Cev0W<'a, REG> +pub type CEV0_W<'a, REG> = crate::BitWriter<'a, REG, CEV0_A>; +impl<'a, REG> CEV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev0::Value1) + self.variant(CEV0_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev0::Value2) + self.variant(CEV0_A::VALUE2) } } #[doc = "Channel Event for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev1 { +pub enum CEV1_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev1) -> Self { + fn from(variant: CEV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV1` reader - Channel Event for Channel 1"] -pub type Cev1R = crate::BitReader; -impl Cev1R { +pub type CEV1_R = crate::BitReader; +impl CEV1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev1 { + pub const fn variant(&self) -> CEV1_A { match self.bits { - false => Cev1::Value1, - true => Cev1::Value2, + false => CEV1_A::VALUE1, + true => CEV1_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev1::Value1 + *self == CEV1_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev1::Value2 + *self == CEV1_A::VALUE2 } } #[doc = "Field `CEV1` writer - Channel Event for Channel 1"] -pub type Cev1W<'a, REG> = crate::BitWriter<'a, REG, Cev1>; -impl<'a, REG> Cev1W<'a, REG> +pub type CEV1_W<'a, REG> = crate::BitWriter<'a, REG, CEV1_A>; +impl<'a, REG> CEV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev1::Value1) + self.variant(CEV1_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev1::Value2) + self.variant(CEV1_A::VALUE2) } } #[doc = "Channel Event for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev2 { +pub enum CEV2_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev2) -> Self { + fn from(variant: CEV2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV2` reader - Channel Event for Channel 2"] -pub type Cev2R = crate::BitReader; -impl Cev2R { +pub type CEV2_R = crate::BitReader; +impl CEV2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev2 { + pub const fn variant(&self) -> CEV2_A { match self.bits { - false => Cev2::Value1, - true => Cev2::Value2, + false => CEV2_A::VALUE1, + true => CEV2_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev2::Value1 + *self == CEV2_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev2::Value2 + *self == CEV2_A::VALUE2 } } #[doc = "Field `CEV2` writer - Channel Event for Channel 2"] -pub type Cev2W<'a, REG> = crate::BitWriter<'a, REG, Cev2>; -impl<'a, REG> Cev2W<'a, REG> +pub type CEV2_W<'a, REG> = crate::BitWriter<'a, REG, CEV2_A>; +impl<'a, REG> CEV2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev2::Value1) + self.variant(CEV2_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev2::Value2) + self.variant(CEV2_A::VALUE2) } } #[doc = "Channel Event for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev3 { +pub enum CEV3_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev3) -> Self { + fn from(variant: CEV3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV3` reader - Channel Event for Channel 3"] -pub type Cev3R = crate::BitReader; -impl Cev3R { +pub type CEV3_R = crate::BitReader; +impl CEV3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev3 { + pub const fn variant(&self) -> CEV3_A { match self.bits { - false => Cev3::Value1, - true => Cev3::Value2, + false => CEV3_A::VALUE1, + true => CEV3_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev3::Value1 + *self == CEV3_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev3::Value2 + *self == CEV3_A::VALUE2 } } #[doc = "Field `CEV3` writer - Channel Event for Channel 3"] -pub type Cev3W<'a, REG> = crate::BitWriter<'a, REG, Cev3>; -impl<'a, REG> Cev3W<'a, REG> +pub type CEV3_W<'a, REG> = crate::BitWriter<'a, REG, CEV3_A>; +impl<'a, REG> CEV3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev3::Value1) + self.variant(CEV3_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev3::Value2) + self.variant(CEV3_A::VALUE2) } } #[doc = "Channel Event for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev4 { +pub enum CEV4_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev4) -> Self { + fn from(variant: CEV4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV4` reader - Channel Event for Channel 4"] -pub type Cev4R = crate::BitReader; -impl Cev4R { +pub type CEV4_R = crate::BitReader; +impl CEV4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev4 { + pub const fn variant(&self) -> CEV4_A { match self.bits { - false => Cev4::Value1, - true => Cev4::Value2, + false => CEV4_A::VALUE1, + true => CEV4_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev4::Value1 + *self == CEV4_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev4::Value2 + *self == CEV4_A::VALUE2 } } #[doc = "Field `CEV4` writer - Channel Event for Channel 4"] -pub type Cev4W<'a, REG> = crate::BitWriter<'a, REG, Cev4>; -impl<'a, REG> Cev4W<'a, REG> +pub type CEV4_W<'a, REG> = crate::BitWriter<'a, REG, CEV4_A>; +impl<'a, REG> CEV4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev4::Value1) + self.variant(CEV4_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev4::Value2) + self.variant(CEV4_A::VALUE2) } } #[doc = "Channel Event for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev5 { +pub enum CEV5_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev5) -> Self { + fn from(variant: CEV5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV5` reader - Channel Event for Channel 5"] -pub type Cev5R = crate::BitReader; -impl Cev5R { +pub type CEV5_R = crate::BitReader; +impl CEV5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev5 { + pub const fn variant(&self) -> CEV5_A { match self.bits { - false => Cev5::Value1, - true => Cev5::Value2, + false => CEV5_A::VALUE1, + true => CEV5_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev5::Value1 + *self == CEV5_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev5::Value2 + *self == CEV5_A::VALUE2 } } #[doc = "Field `CEV5` writer - Channel Event for Channel 5"] -pub type Cev5W<'a, REG> = crate::BitWriter<'a, REG, Cev5>; -impl<'a, REG> Cev5W<'a, REG> +pub type CEV5_W<'a, REG> = crate::BitWriter<'a, REG, CEV5_A>; +impl<'a, REG> CEV5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev5::Value1) + self.variant(CEV5_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev5::Value2) + self.variant(CEV5_A::VALUE2) } } #[doc = "Channel Event for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev6 { +pub enum CEV6_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev6) -> Self { + fn from(variant: CEV6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV6` reader - Channel Event for Channel 6"] -pub type Cev6R = crate::BitReader; -impl Cev6R { +pub type CEV6_R = crate::BitReader; +impl CEV6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev6 { + pub const fn variant(&self) -> CEV6_A { match self.bits { - false => Cev6::Value1, - true => Cev6::Value2, + false => CEV6_A::VALUE1, + true => CEV6_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev6::Value1 + *self == CEV6_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev6::Value2 + *self == CEV6_A::VALUE2 } } #[doc = "Field `CEV6` writer - Channel Event for Channel 6"] -pub type Cev6W<'a, REG> = crate::BitWriter<'a, REG, Cev6>; -impl<'a, REG> Cev6W<'a, REG> +pub type CEV6_W<'a, REG> = crate::BitWriter<'a, REG, CEV6_A>; +impl<'a, REG> CEV6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev6::Value1) + self.variant(CEV6_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev6::Value2) + self.variant(CEV6_A::VALUE2) } } #[doc = "Channel Event for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev7 { +pub enum CEV7_A { #[doc = "0: No channel event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A channel event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev7) -> Self { + fn from(variant: CEV7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV7` reader - Channel Event for Channel 7"] -pub type Cev7R = crate::BitReader; -impl Cev7R { +pub type CEV7_R = crate::BitReader; +impl CEV7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Cev7 { + pub const fn variant(&self) -> CEV7_A { match self.bits { - false => Cev7::Value1, - true => Cev7::Value2, + false => CEV7_A::VALUE1, + true => CEV7_A::VALUE2, } } #[doc = "No channel event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev7::Value1 + *self == CEV7_A::VALUE1 } #[doc = "A channel event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev7::Value2 + *self == CEV7_A::VALUE2 } } #[doc = "Field `CEV7` writer - Channel Event for Channel 7"] -pub type Cev7W<'a, REG> = crate::BitWriter<'a, REG, Cev7>; -impl<'a, REG> Cev7W<'a, REG> +pub type CEV7_W<'a, REG> = crate::BitWriter<'a, REG, CEV7_A>; +impl<'a, REG> CEV7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No channel event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev7::Value1) + self.variant(CEV7_A::VALUE1) } #[doc = "A channel event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev7::Value2) + self.variant(CEV7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Channel Event for Channel 0"] #[inline(always)] - pub fn cev0(&self) -> Cev0R { - Cev0R::new((self.bits & 1) != 0) + pub fn cev0(&self) -> CEV0_R { + CEV0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Channel Event for Channel 1"] #[inline(always)] - pub fn cev1(&self) -> Cev1R { - Cev1R::new(((self.bits >> 1) & 1) != 0) + pub fn cev1(&self) -> CEV1_R { + CEV1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Channel Event for Channel 2"] #[inline(always)] - pub fn cev2(&self) -> Cev2R { - Cev2R::new(((self.bits >> 2) & 1) != 0) + pub fn cev2(&self) -> CEV2_R { + CEV2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Channel Event for Channel 3"] #[inline(always)] - pub fn cev3(&self) -> Cev3R { - Cev3R::new(((self.bits >> 3) & 1) != 0) + pub fn cev3(&self) -> CEV3_R { + CEV3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Channel Event for Channel 4"] #[inline(always)] - pub fn cev4(&self) -> Cev4R { - Cev4R::new(((self.bits >> 4) & 1) != 0) + pub fn cev4(&self) -> CEV4_R { + CEV4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Channel Event for Channel 5"] #[inline(always)] - pub fn cev5(&self) -> Cev5R { - Cev5R::new(((self.bits >> 5) & 1) != 0) + pub fn cev5(&self) -> CEV5_R { + CEV5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Channel Event for Channel 6"] #[inline(always)] - pub fn cev6(&self) -> Cev6R { - Cev6R::new(((self.bits >> 6) & 1) != 0) + pub fn cev6(&self) -> CEV6_R { + CEV6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Channel Event for Channel 7"] #[inline(always)] - pub fn cev7(&self) -> Cev7R { - Cev7R::new(((self.bits >> 7) & 1) != 0) + pub fn cev7(&self) -> CEV7_R { + CEV7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Channel Event for Channel 0"] #[inline(always)] #[must_use] - pub fn cev0(&mut self) -> Cev0W { - Cev0W::new(self, 0) + pub fn cev0(&mut self) -> CEV0_W { + CEV0_W::new(self, 0) } #[doc = "Bit 1 - Channel Event for Channel 1"] #[inline(always)] #[must_use] - pub fn cev1(&mut self) -> Cev1W { - Cev1W::new(self, 1) + pub fn cev1(&mut self) -> CEV1_W { + CEV1_W::new(self, 1) } #[doc = "Bit 2 - Channel Event for Channel 2"] #[inline(always)] #[must_use] - pub fn cev2(&mut self) -> Cev2W { - Cev2W::new(self, 2) + pub fn cev2(&mut self) -> CEV2_W { + CEV2_W::new(self, 2) } #[doc = "Bit 3 - Channel Event for Channel 3"] #[inline(always)] #[must_use] - pub fn cev3(&mut self) -> Cev3W { - Cev3W::new(self, 3) + pub fn cev3(&mut self) -> CEV3_W { + CEV3_W::new(self, 3) } #[doc = "Bit 4 - Channel Event for Channel 4"] #[inline(always)] #[must_use] - pub fn cev4(&mut self) -> Cev4W { - Cev4W::new(self, 4) + pub fn cev4(&mut self) -> CEV4_W { + CEV4_W::new(self, 4) } #[doc = "Bit 5 - Channel Event for Channel 5"] #[inline(always)] #[must_use] - pub fn cev5(&mut self) -> Cev5W { - Cev5W::new(self, 5) + pub fn cev5(&mut self) -> CEV5_W { + CEV5_W::new(self, 5) } #[doc = "Bit 6 - Channel Event for Channel 6"] #[inline(always)] #[must_use] - pub fn cev6(&mut self) -> Cev6W { - Cev6W::new(self, 6) + pub fn cev6(&mut self) -> CEV6_W { + CEV6_W::new(self, 6) } #[doc = "Bit 7 - Channel Event for Channel 7"] #[inline(always)] #[must_use] - pub fn cev7(&mut self) -> Cev7W { - Cev7W::new(self, 7) + pub fn cev7(&mut self) -> CEV7_W { + CEV7_W::new(self, 7) } } #[doc = "Channel Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ceflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ceflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CeflagSpec; -impl crate::RegisterSpec for CeflagSpec { +pub struct CEFLAG_SPEC; +impl crate::RegisterSpec for CEFLAG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ceflag::R`](R) reader structure"] -impl crate::Readable for CeflagSpec {} +impl crate::Readable for CEFLAG_SPEC {} #[doc = "`write(|w| ..)` method takes [`ceflag::W`](W) writer structure"] -impl crate::Writable for CeflagSpec { +impl crate::Writable for CEFLAG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEFLAG to value 0"] -impl crate::Resettable for CeflagSpec { +impl crate::Resettable for CEFLAG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/cevnp0.rs b/src/vadc_g0/cevnp0.rs index 7e406e37..ad81497c 100644 --- a/src/vadc_g0/cevnp0.rs +++ b/src/vadc_g0/cevnp0.rs @@ -1,68 +1,68 @@ #[doc = "Register `CEVNP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CEVNP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev0np { +pub enum CEV0NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev0np) -> Self { + fn from(variant: CEV0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev0np { +impl crate::FieldSpec for CEV0NP_A { type Ux = u8; } -impl crate::IsEnum for Cev0np {} +impl crate::IsEnum for CEV0NP_A {} #[doc = "Field `CEV0NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev0npR = crate::FieldReader; -impl Cev0npR { +pub type CEV0NP_R = crate::FieldReader; +impl CEV0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev0np::Value1), - 3 => Some(Cev0np::Value2), - 4 => Some(Cev0np::Value3), - 7 => Some(Cev0np::Value4), + 0 => Some(CEV0NP_A::VALUE1), + 3 => Some(CEV0NP_A::VALUE2), + 4 => Some(CEV0NP_A::VALUE3), + 7 => Some(CEV0NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev0np::Value1 + *self == CEV0NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev0np::Value2 + *self == CEV0NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev0np::Value3 + *self == CEV0NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev0np::Value4 + *self == CEV0NP_A::VALUE4 } } #[doc = "Field `CEV0NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev0np>; -impl<'a, REG> Cev0npW<'a, REG> +pub type CEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV0NP_A>; +impl<'a, REG> CEV0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev0np::Value1) + self.variant(CEV0NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev0np::Value2) + self.variant(CEV0NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev0np::Value3) + self.variant(CEV0NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev0np::Value4) + self.variant(CEV0NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev1np { +pub enum CEV1NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev1np) -> Self { + fn from(variant: CEV1NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev1np { +impl crate::FieldSpec for CEV1NP_A { type Ux = u8; } -impl crate::IsEnum for Cev1np {} +impl crate::IsEnum for CEV1NP_A {} #[doc = "Field `CEV1NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev1npR = crate::FieldReader; -impl Cev1npR { +pub type CEV1NP_R = crate::FieldReader; +impl CEV1NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev1np::Value1), - 3 => Some(Cev1np::Value2), - 4 => Some(Cev1np::Value3), - 7 => Some(Cev1np::Value4), + 0 => Some(CEV1NP_A::VALUE1), + 3 => Some(CEV1NP_A::VALUE2), + 4 => Some(CEV1NP_A::VALUE3), + 7 => Some(CEV1NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev1np::Value1 + *self == CEV1NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev1np::Value2 + *self == CEV1NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev1np::Value3 + *self == CEV1NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev1np::Value4 + *self == CEV1NP_A::VALUE4 } } #[doc = "Field `CEV1NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev1np>; -impl<'a, REG> Cev1npW<'a, REG> +pub type CEV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV1NP_A>; +impl<'a, REG> CEV1NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev1np::Value1) + self.variant(CEV1NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev1np::Value2) + self.variant(CEV1NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev1np::Value3) + self.variant(CEV1NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev1np::Value4) + self.variant(CEV1NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev2np { +pub enum CEV2NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev2np) -> Self { + fn from(variant: CEV2NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev2np { +impl crate::FieldSpec for CEV2NP_A { type Ux = u8; } -impl crate::IsEnum for Cev2np {} +impl crate::IsEnum for CEV2NP_A {} #[doc = "Field `CEV2NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev2npR = crate::FieldReader; -impl Cev2npR { +pub type CEV2NP_R = crate::FieldReader; +impl CEV2NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev2np::Value1), - 3 => Some(Cev2np::Value2), - 4 => Some(Cev2np::Value3), - 7 => Some(Cev2np::Value4), + 0 => Some(CEV2NP_A::VALUE1), + 3 => Some(CEV2NP_A::VALUE2), + 4 => Some(CEV2NP_A::VALUE3), + 7 => Some(CEV2NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev2np::Value1 + *self == CEV2NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev2np::Value2 + *self == CEV2NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev2np::Value3 + *self == CEV2NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev2np::Value4 + *self == CEV2NP_A::VALUE4 } } #[doc = "Field `CEV2NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev2np>; -impl<'a, REG> Cev2npW<'a, REG> +pub type CEV2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV2NP_A>; +impl<'a, REG> CEV2NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev2np::Value1) + self.variant(CEV2NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev2np::Value2) + self.variant(CEV2NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev2np::Value3) + self.variant(CEV2NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev2np::Value4) + self.variant(CEV2NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev3np { +pub enum CEV3NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev3np) -> Self { + fn from(variant: CEV3NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev3np { +impl crate::FieldSpec for CEV3NP_A { type Ux = u8; } -impl crate::IsEnum for Cev3np {} +impl crate::IsEnum for CEV3NP_A {} #[doc = "Field `CEV3NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev3npR = crate::FieldReader; -impl Cev3npR { +pub type CEV3NP_R = crate::FieldReader; +impl CEV3NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev3np::Value1), - 3 => Some(Cev3np::Value2), - 4 => Some(Cev3np::Value3), - 7 => Some(Cev3np::Value4), + 0 => Some(CEV3NP_A::VALUE1), + 3 => Some(CEV3NP_A::VALUE2), + 4 => Some(CEV3NP_A::VALUE3), + 7 => Some(CEV3NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev3np::Value1 + *self == CEV3NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev3np::Value2 + *self == CEV3NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev3np::Value3 + *self == CEV3NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev3np::Value4 + *self == CEV3NP_A::VALUE4 } } #[doc = "Field `CEV3NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev3np>; -impl<'a, REG> Cev3npW<'a, REG> +pub type CEV3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV3NP_A>; +impl<'a, REG> CEV3NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev3np::Value1) + self.variant(CEV3NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev3np::Value2) + self.variant(CEV3NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev3np::Value3) + self.variant(CEV3NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev3np::Value4) + self.variant(CEV3NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev4np { +pub enum CEV4NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev4np) -> Self { + fn from(variant: CEV4NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev4np { +impl crate::FieldSpec for CEV4NP_A { type Ux = u8; } -impl crate::IsEnum for Cev4np {} +impl crate::IsEnum for CEV4NP_A {} #[doc = "Field `CEV4NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev4npR = crate::FieldReader; -impl Cev4npR { +pub type CEV4NP_R = crate::FieldReader; +impl CEV4NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev4np::Value1), - 3 => Some(Cev4np::Value2), - 4 => Some(Cev4np::Value3), - 7 => Some(Cev4np::Value4), + 0 => Some(CEV4NP_A::VALUE1), + 3 => Some(CEV4NP_A::VALUE2), + 4 => Some(CEV4NP_A::VALUE3), + 7 => Some(CEV4NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev4np::Value1 + *self == CEV4NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev4np::Value2 + *self == CEV4NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev4np::Value3 + *self == CEV4NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev4np::Value4 + *self == CEV4NP_A::VALUE4 } } #[doc = "Field `CEV4NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev4npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev4np>; -impl<'a, REG> Cev4npW<'a, REG> +pub type CEV4NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV4NP_A>; +impl<'a, REG> CEV4NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev4np::Value1) + self.variant(CEV4NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev4np::Value2) + self.variant(CEV4NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev4np::Value3) + self.variant(CEV4NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev4np::Value4) + self.variant(CEV4NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev5np { +pub enum CEV5NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev5np) -> Self { + fn from(variant: CEV5NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev5np { +impl crate::FieldSpec for CEV5NP_A { type Ux = u8; } -impl crate::IsEnum for Cev5np {} +impl crate::IsEnum for CEV5NP_A {} #[doc = "Field `CEV5NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev5npR = crate::FieldReader; -impl Cev5npR { +pub type CEV5NP_R = crate::FieldReader; +impl CEV5NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev5np::Value1), - 3 => Some(Cev5np::Value2), - 4 => Some(Cev5np::Value3), - 7 => Some(Cev5np::Value4), + 0 => Some(CEV5NP_A::VALUE1), + 3 => Some(CEV5NP_A::VALUE2), + 4 => Some(CEV5NP_A::VALUE3), + 7 => Some(CEV5NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev5np::Value1 + *self == CEV5NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev5np::Value2 + *self == CEV5NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev5np::Value3 + *self == CEV5NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev5np::Value4 + *self == CEV5NP_A::VALUE4 } } #[doc = "Field `CEV5NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev5npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev5np>; -impl<'a, REG> Cev5npW<'a, REG> +pub type CEV5NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV5NP_A>; +impl<'a, REG> CEV5NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,85 +500,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev5np::Value1) + self.variant(CEV5NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev5np::Value2) + self.variant(CEV5NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev5np::Value3) + self.variant(CEV5NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev5np::Value4) + self.variant(CEV5NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev6np { +pub enum CEV6NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev6np) -> Self { + fn from(variant: CEV6NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev6np { +impl crate::FieldSpec for CEV6NP_A { type Ux = u8; } -impl crate::IsEnum for Cev6np {} +impl crate::IsEnum for CEV6NP_A {} #[doc = "Field `CEV6NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev6npR = crate::FieldReader; -impl Cev6npR { +pub type CEV6NP_R = crate::FieldReader; +impl CEV6NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev6np::Value1), - 3 => Some(Cev6np::Value2), - 4 => Some(Cev6np::Value3), - 7 => Some(Cev6np::Value4), + 0 => Some(CEV6NP_A::VALUE1), + 3 => Some(CEV6NP_A::VALUE2), + 4 => Some(CEV6NP_A::VALUE3), + 7 => Some(CEV6NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev6np::Value1 + *self == CEV6NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev6np::Value2 + *self == CEV6NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev6np::Value3 + *self == CEV6NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev6np::Value4 + *self == CEV6NP_A::VALUE4 } } #[doc = "Field `CEV6NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev6npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev6np>; -impl<'a, REG> Cev6npW<'a, REG> +pub type CEV6NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV6NP_A>; +impl<'a, REG> CEV6NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,85 +586,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev6np::Value1) + self.variant(CEV6NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev6np::Value2) + self.variant(CEV6NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev6np::Value3) + self.variant(CEV6NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev6np::Value4) + self.variant(CEV6NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Channel Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cev7np { +pub enum CEV7NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cev7np) -> Self { + fn from(variant: CEV7NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cev7np { +impl crate::FieldSpec for CEV7NP_A { type Ux = u8; } -impl crate::IsEnum for Cev7np {} +impl crate::IsEnum for CEV7NP_A {} #[doc = "Field `CEV7NP` reader - Service Request Node Pointer Channel Event i"] -pub type Cev7npR = crate::FieldReader; -impl Cev7npR { +pub type CEV7NP_R = crate::FieldReader; +impl CEV7NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cev7np::Value1), - 3 => Some(Cev7np::Value2), - 4 => Some(Cev7np::Value3), - 7 => Some(Cev7np::Value4), + 0 => Some(CEV7NP_A::VALUE1), + 3 => Some(CEV7NP_A::VALUE2), + 4 => Some(CEV7NP_A::VALUE3), + 7 => Some(CEV7NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cev7np::Value1 + *self == CEV7NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cev7np::Value2 + *self == CEV7NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cev7np::Value3 + *self == CEV7NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Cev7np::Value4 + *self == CEV7NP_A::VALUE4 } } #[doc = "Field `CEV7NP` writer - Service Request Node Pointer Channel Event i"] -pub type Cev7npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Cev7np>; -impl<'a, REG> Cev7npW<'a, REG> +pub type CEV7NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CEV7NP_A>; +impl<'a, REG> CEV7NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -672,130 +672,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev7np::Value1) + self.variant(CEV7NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev7np::Value2) + self.variant(CEV7NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cev7np::Value3) + self.variant(CEV7NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Cev7np::Value4) + self.variant(CEV7NP_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev0np(&self) -> Cev0npR { - Cev0npR::new((self.bits & 0x0f) as u8) + pub fn cev0np(&self) -> CEV0NP_R { + CEV0NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev1np(&self) -> Cev1npR { - Cev1npR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn cev1np(&self) -> CEV1NP_R { + CEV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev2np(&self) -> Cev2npR { - Cev2npR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn cev2np(&self) -> CEV2NP_R { + CEV2NP_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev3np(&self) -> Cev3npR { - Cev3npR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn cev3np(&self) -> CEV3NP_R { + CEV3NP_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev4np(&self) -> Cev4npR { - Cev4npR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn cev4np(&self) -> CEV4NP_R { + CEV4NP_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev5np(&self) -> Cev5npR { - Cev5npR::new(((self.bits >> 20) & 0x0f) as u8) + pub fn cev5np(&self) -> CEV5NP_R { + CEV5NP_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev6np(&self) -> Cev6npR { - Cev6npR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn cev6np(&self) -> CEV6NP_R { + CEV6NP_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"] #[inline(always)] - pub fn cev7np(&self) -> Cev7npR { - Cev7npR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn cev7np(&self) -> CEV7NP_R { + CEV7NP_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev0np(&mut self) -> Cev0npW { - Cev0npW::new(self, 0) + pub fn cev0np(&mut self) -> CEV0NP_W { + CEV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev1np(&mut self) -> Cev1npW { - Cev1npW::new(self, 4) + pub fn cev1np(&mut self) -> CEV1NP_W { + CEV1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev2np(&mut self) -> Cev2npW { - Cev2npW::new(self, 8) + pub fn cev2np(&mut self) -> CEV2NP_W { + CEV2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev3np(&mut self) -> Cev3npW { - Cev3npW::new(self, 12) + pub fn cev3np(&mut self) -> CEV3NP_W { + CEV3NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev4np(&mut self) -> Cev4npW { - Cev4npW::new(self, 16) + pub fn cev4np(&mut self) -> CEV4NP_W { + CEV4NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev5np(&mut self) -> Cev5npW { - Cev5npW::new(self, 20) + pub fn cev5np(&mut self) -> CEV5NP_W { + CEV5NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev6np(&mut self) -> Cev6npW { - Cev6npW::new(self, 24) + pub fn cev6np(&mut self) -> CEV6NP_W { + CEV6NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"] #[inline(always)] #[must_use] - pub fn cev7np(&mut self) -> Cev7npW { - Cev7npW::new(self, 28) + pub fn cev7np(&mut self) -> CEV7NP_W { + CEV7NP_W::new(self, 28) } } #[doc = "Channel Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cevnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cevnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Cevnp0Spec; -impl crate::RegisterSpec for Cevnp0Spec { +pub struct CEVNP0_SPEC; +impl crate::RegisterSpec for CEVNP0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`cevnp0::R`](R) reader structure"] -impl crate::Readable for Cevnp0Spec {} +impl crate::Readable for CEVNP0_SPEC {} #[doc = "`write(|w| ..)` method takes [`cevnp0::W`](W) writer structure"] -impl crate::Writable for Cevnp0Spec { +impl crate::Writable for CEVNP0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CEVNP0 to value 0"] -impl crate::Resettable for Cevnp0Spec { +impl crate::Resettable for CEVNP0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/chass.rs b/src/vadc_g0/chass.rs index 5895913c..c04ac4cf 100644 --- a/src/vadc_g0/chass.rs +++ b/src/vadc_g0/chass.rs @@ -1,537 +1,537 @@ #[doc = "Register `CHASS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHASS` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Assignment for Channel 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch0 { +pub enum ASSCH0_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch0) -> Self { + fn from(variant: ASSCH0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH0` reader - Assignment for Channel 0"] -pub type Assch0R = crate::BitReader; -impl Assch0R { +pub type ASSCH0_R = crate::BitReader; +impl ASSCH0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch0 { + pub const fn variant(&self) -> ASSCH0_A { match self.bits { - false => Assch0::Value1, - true => Assch0::Value2, + false => ASSCH0_A::VALUE1, + true => ASSCH0_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch0::Value1 + *self == ASSCH0_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch0::Value2 + *self == ASSCH0_A::VALUE2 } } #[doc = "Field `ASSCH0` writer - Assignment for Channel 0"] -pub type Assch0W<'a, REG> = crate::BitWriter<'a, REG, Assch0>; -impl<'a, REG> Assch0W<'a, REG> +pub type ASSCH0_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH0_A>; +impl<'a, REG> ASSCH0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch0::Value1) + self.variant(ASSCH0_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch0::Value2) + self.variant(ASSCH0_A::VALUE2) } } #[doc = "Assignment for Channel 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch1 { +pub enum ASSCH1_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch1) -> Self { + fn from(variant: ASSCH1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH1` reader - Assignment for Channel 1"] -pub type Assch1R = crate::BitReader; -impl Assch1R { +pub type ASSCH1_R = crate::BitReader; +impl ASSCH1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch1 { + pub const fn variant(&self) -> ASSCH1_A { match self.bits { - false => Assch1::Value1, - true => Assch1::Value2, + false => ASSCH1_A::VALUE1, + true => ASSCH1_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch1::Value1 + *self == ASSCH1_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch1::Value2 + *self == ASSCH1_A::VALUE2 } } #[doc = "Field `ASSCH1` writer - Assignment for Channel 1"] -pub type Assch1W<'a, REG> = crate::BitWriter<'a, REG, Assch1>; -impl<'a, REG> Assch1W<'a, REG> +pub type ASSCH1_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH1_A>; +impl<'a, REG> ASSCH1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch1::Value1) + self.variant(ASSCH1_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch1::Value2) + self.variant(ASSCH1_A::VALUE2) } } #[doc = "Assignment for Channel 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch2 { +pub enum ASSCH2_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch2) -> Self { + fn from(variant: ASSCH2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH2` reader - Assignment for Channel 2"] -pub type Assch2R = crate::BitReader; -impl Assch2R { +pub type ASSCH2_R = crate::BitReader; +impl ASSCH2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch2 { + pub const fn variant(&self) -> ASSCH2_A { match self.bits { - false => Assch2::Value1, - true => Assch2::Value2, + false => ASSCH2_A::VALUE1, + true => ASSCH2_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch2::Value1 + *self == ASSCH2_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch2::Value2 + *self == ASSCH2_A::VALUE2 } } #[doc = "Field `ASSCH2` writer - Assignment for Channel 2"] -pub type Assch2W<'a, REG> = crate::BitWriter<'a, REG, Assch2>; -impl<'a, REG> Assch2W<'a, REG> +pub type ASSCH2_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH2_A>; +impl<'a, REG> ASSCH2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch2::Value1) + self.variant(ASSCH2_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch2::Value2) + self.variant(ASSCH2_A::VALUE2) } } #[doc = "Assignment for Channel 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch3 { +pub enum ASSCH3_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch3) -> Self { + fn from(variant: ASSCH3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH3` reader - Assignment for Channel 3"] -pub type Assch3R = crate::BitReader; -impl Assch3R { +pub type ASSCH3_R = crate::BitReader; +impl ASSCH3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch3 { + pub const fn variant(&self) -> ASSCH3_A { match self.bits { - false => Assch3::Value1, - true => Assch3::Value2, + false => ASSCH3_A::VALUE1, + true => ASSCH3_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch3::Value1 + *self == ASSCH3_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch3::Value2 + *self == ASSCH3_A::VALUE2 } } #[doc = "Field `ASSCH3` writer - Assignment for Channel 3"] -pub type Assch3W<'a, REG> = crate::BitWriter<'a, REG, Assch3>; -impl<'a, REG> Assch3W<'a, REG> +pub type ASSCH3_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH3_A>; +impl<'a, REG> ASSCH3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch3::Value1) + self.variant(ASSCH3_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch3::Value2) + self.variant(ASSCH3_A::VALUE2) } } #[doc = "Assignment for Channel 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch4 { +pub enum ASSCH4_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch4) -> Self { + fn from(variant: ASSCH4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH4` reader - Assignment for Channel 4"] -pub type Assch4R = crate::BitReader; -impl Assch4R { +pub type ASSCH4_R = crate::BitReader; +impl ASSCH4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch4 { + pub const fn variant(&self) -> ASSCH4_A { match self.bits { - false => Assch4::Value1, - true => Assch4::Value2, + false => ASSCH4_A::VALUE1, + true => ASSCH4_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch4::Value1 + *self == ASSCH4_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch4::Value2 + *self == ASSCH4_A::VALUE2 } } #[doc = "Field `ASSCH4` writer - Assignment for Channel 4"] -pub type Assch4W<'a, REG> = crate::BitWriter<'a, REG, Assch4>; -impl<'a, REG> Assch4W<'a, REG> +pub type ASSCH4_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH4_A>; +impl<'a, REG> ASSCH4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch4::Value1) + self.variant(ASSCH4_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch4::Value2) + self.variant(ASSCH4_A::VALUE2) } } #[doc = "Assignment for Channel 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch5 { +pub enum ASSCH5_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch5) -> Self { + fn from(variant: ASSCH5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH5` reader - Assignment for Channel 5"] -pub type Assch5R = crate::BitReader; -impl Assch5R { +pub type ASSCH5_R = crate::BitReader; +impl ASSCH5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch5 { + pub const fn variant(&self) -> ASSCH5_A { match self.bits { - false => Assch5::Value1, - true => Assch5::Value2, + false => ASSCH5_A::VALUE1, + true => ASSCH5_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch5::Value1 + *self == ASSCH5_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch5::Value2 + *self == ASSCH5_A::VALUE2 } } #[doc = "Field `ASSCH5` writer - Assignment for Channel 5"] -pub type Assch5W<'a, REG> = crate::BitWriter<'a, REG, Assch5>; -impl<'a, REG> Assch5W<'a, REG> +pub type ASSCH5_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH5_A>; +impl<'a, REG> ASSCH5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch5::Value1) + self.variant(ASSCH5_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch5::Value2) + self.variant(ASSCH5_A::VALUE2) } } #[doc = "Assignment for Channel 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch6 { +pub enum ASSCH6_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch6) -> Self { + fn from(variant: ASSCH6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH6` reader - Assignment for Channel 6"] -pub type Assch6R = crate::BitReader; -impl Assch6R { +pub type ASSCH6_R = crate::BitReader; +impl ASSCH6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch6 { + pub const fn variant(&self) -> ASSCH6_A { match self.bits { - false => Assch6::Value1, - true => Assch6::Value2, + false => ASSCH6_A::VALUE1, + true => ASSCH6_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch6::Value1 + *self == ASSCH6_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch6::Value2 + *self == ASSCH6_A::VALUE2 } } #[doc = "Field `ASSCH6` writer - Assignment for Channel 6"] -pub type Assch6W<'a, REG> = crate::BitWriter<'a, REG, Assch6>; -impl<'a, REG> Assch6W<'a, REG> +pub type ASSCH6_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH6_A>; +impl<'a, REG> ASSCH6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch6::Value1) + self.variant(ASSCH6_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch6::Value2) + self.variant(ASSCH6_A::VALUE2) } } #[doc = "Assignment for Channel 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assch7 { +pub enum ASSCH7_A { #[doc = "0: Channel y can be a background channel converted with lowest priority"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel y is a priority channel within group x"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assch7) -> Self { + fn from(variant: ASSCH7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSCH7` reader - Assignment for Channel 7"] -pub type Assch7R = crate::BitReader; -impl Assch7R { +pub type ASSCH7_R = crate::BitReader; +impl ASSCH7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Assch7 { + pub const fn variant(&self) -> ASSCH7_A { match self.bits { - false => Assch7::Value1, - true => Assch7::Value2, + false => ASSCH7_A::VALUE1, + true => ASSCH7_A::VALUE2, } } #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Assch7::Value1 + *self == ASSCH7_A::VALUE1 } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Assch7::Value2 + *self == ASSCH7_A::VALUE2 } } #[doc = "Field `ASSCH7` writer - Assignment for Channel 7"] -pub type Assch7W<'a, REG> = crate::BitWriter<'a, REG, Assch7>; -impl<'a, REG> Assch7W<'a, REG> +pub type ASSCH7_W<'a, REG> = crate::BitWriter<'a, REG, ASSCH7_A>; +impl<'a, REG> ASSCH7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Channel y can be a background channel converted with lowest priority"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assch7::Value1) + self.variant(ASSCH7_A::VALUE1) } #[doc = "Channel y is a priority channel within group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assch7::Value2) + self.variant(ASSCH7_A::VALUE2) } } impl R { #[doc = "Bit 0 - Assignment for Channel 0"] #[inline(always)] - pub fn assch0(&self) -> Assch0R { - Assch0R::new((self.bits & 1) != 0) + pub fn assch0(&self) -> ASSCH0_R { + ASSCH0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Assignment for Channel 1"] #[inline(always)] - pub fn assch1(&self) -> Assch1R { - Assch1R::new(((self.bits >> 1) & 1) != 0) + pub fn assch1(&self) -> ASSCH1_R { + ASSCH1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Assignment for Channel 2"] #[inline(always)] - pub fn assch2(&self) -> Assch2R { - Assch2R::new(((self.bits >> 2) & 1) != 0) + pub fn assch2(&self) -> ASSCH2_R { + ASSCH2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Assignment for Channel 3"] #[inline(always)] - pub fn assch3(&self) -> Assch3R { - Assch3R::new(((self.bits >> 3) & 1) != 0) + pub fn assch3(&self) -> ASSCH3_R { + ASSCH3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Assignment for Channel 4"] #[inline(always)] - pub fn assch4(&self) -> Assch4R { - Assch4R::new(((self.bits >> 4) & 1) != 0) + pub fn assch4(&self) -> ASSCH4_R { + ASSCH4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Assignment for Channel 5"] #[inline(always)] - pub fn assch5(&self) -> Assch5R { - Assch5R::new(((self.bits >> 5) & 1) != 0) + pub fn assch5(&self) -> ASSCH5_R { + ASSCH5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Assignment for Channel 6"] #[inline(always)] - pub fn assch6(&self) -> Assch6R { - Assch6R::new(((self.bits >> 6) & 1) != 0) + pub fn assch6(&self) -> ASSCH6_R { + ASSCH6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Assignment for Channel 7"] #[inline(always)] - pub fn assch7(&self) -> Assch7R { - Assch7R::new(((self.bits >> 7) & 1) != 0) + pub fn assch7(&self) -> ASSCH7_R { + ASSCH7_R::new(((self.bits >> 7) & 1) != 0) } } impl W { #[doc = "Bit 0 - Assignment for Channel 0"] #[inline(always)] #[must_use] - pub fn assch0(&mut self) -> Assch0W { - Assch0W::new(self, 0) + pub fn assch0(&mut self) -> ASSCH0_W { + ASSCH0_W::new(self, 0) } #[doc = "Bit 1 - Assignment for Channel 1"] #[inline(always)] #[must_use] - pub fn assch1(&mut self) -> Assch1W { - Assch1W::new(self, 1) + pub fn assch1(&mut self) -> ASSCH1_W { + ASSCH1_W::new(self, 1) } #[doc = "Bit 2 - Assignment for Channel 2"] #[inline(always)] #[must_use] - pub fn assch2(&mut self) -> Assch2W { - Assch2W::new(self, 2) + pub fn assch2(&mut self) -> ASSCH2_W { + ASSCH2_W::new(self, 2) } #[doc = "Bit 3 - Assignment for Channel 3"] #[inline(always)] #[must_use] - pub fn assch3(&mut self) -> Assch3W { - Assch3W::new(self, 3) + pub fn assch3(&mut self) -> ASSCH3_W { + ASSCH3_W::new(self, 3) } #[doc = "Bit 4 - Assignment for Channel 4"] #[inline(always)] #[must_use] - pub fn assch4(&mut self) -> Assch4W { - Assch4W::new(self, 4) + pub fn assch4(&mut self) -> ASSCH4_W { + ASSCH4_W::new(self, 4) } #[doc = "Bit 5 - Assignment for Channel 5"] #[inline(always)] #[must_use] - pub fn assch5(&mut self) -> Assch5W { - Assch5W::new(self, 5) + pub fn assch5(&mut self) -> ASSCH5_W { + ASSCH5_W::new(self, 5) } #[doc = "Bit 6 - Assignment for Channel 6"] #[inline(always)] #[must_use] - pub fn assch6(&mut self) -> Assch6W { - Assch6W::new(self, 6) + pub fn assch6(&mut self) -> ASSCH6_W { + ASSCH6_W::new(self, 6) } #[doc = "Bit 7 - Assignment for Channel 7"] #[inline(always)] #[must_use] - pub fn assch7(&mut self) -> Assch7W { - Assch7W::new(self, 7) + pub fn assch7(&mut self) -> ASSCH7_W { + ASSCH7_W::new(self, 7) } } #[doc = "Channel Assignment Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ChassSpec; -impl crate::RegisterSpec for ChassSpec { +pub struct CHASS_SPEC; +impl crate::RegisterSpec for CHASS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`chass::R`](R) reader structure"] -impl crate::Readable for ChassSpec {} +impl crate::Readable for CHASS_SPEC {} #[doc = "`write(|w| ..)` method takes [`chass::W`](W) writer structure"] -impl crate::Writable for ChassSpec { +impl crate::Writable for CHASS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHASS to value 0"] -impl crate::Resettable for ChassSpec { +impl crate::Resettable for CHASS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/chctr.rs b/src/vadc_g0/chctr.rs index 140a5ab0..454eafbe 100644 --- a/src/vadc_g0/chctr.rs +++ b/src/vadc_g0/chctr.rs @@ -1,68 +1,68 @@ #[doc = "Register `CHCTR[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CHCTR[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Input Class Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Iclsel { +pub enum ICLSEL_A { #[doc = "0: Use group-specific class 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Use group-specific class 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Use global class 0"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Use global class 1"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Iclsel) -> Self { + fn from(variant: ICLSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Iclsel { +impl crate::FieldSpec for ICLSEL_A { type Ux = u8; } -impl crate::IsEnum for Iclsel {} +impl crate::IsEnum for ICLSEL_A {} #[doc = "Field `ICLSEL` reader - Input Class Select"] -pub type IclselR = crate::FieldReader; -impl IclselR { +pub type ICLSEL_R = crate::FieldReader; +impl ICLSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Iclsel { + pub const fn variant(&self) -> ICLSEL_A { match self.bits { - 0 => Iclsel::Value1, - 1 => Iclsel::Value2, - 2 => Iclsel::Value3, - 3 => Iclsel::Value4, + 0 => ICLSEL_A::VALUE1, + 1 => ICLSEL_A::VALUE2, + 2 => ICLSEL_A::VALUE3, + 3 => ICLSEL_A::VALUE4, _ => unreachable!(), } } #[doc = "Use group-specific class 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Iclsel::Value1 + *self == ICLSEL_A::VALUE1 } #[doc = "Use group-specific class 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Iclsel::Value2 + *self == ICLSEL_A::VALUE2 } #[doc = "Use global class 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Iclsel::Value3 + *self == ICLSEL_A::VALUE3 } #[doc = "Use global class 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Iclsel::Value4 + *self == ICLSEL_A::VALUE4 } } #[doc = "Field `ICLSEL` writer - Input Class Select"] -pub type IclselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Iclsel, crate::Safe>; -impl<'a, REG> IclselW<'a, REG> +pub type ICLSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ICLSEL_A, crate::Safe>; +impl<'a, REG> ICLSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Use group-specific class 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Iclsel::Value1) + self.variant(ICLSEL_A::VALUE1) } #[doc = "Use group-specific class 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Iclsel::Value2) + self.variant(ICLSEL_A::VALUE2) } #[doc = "Use global class 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Iclsel::Value3) + self.variant(ICLSEL_A::VALUE3) } #[doc = "Use global class 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Iclsel::Value4) + self.variant(ICLSEL_A::VALUE4) } } #[doc = "Lower Boundary Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bndsell { +pub enum BNDSELL_A { #[doc = "0: Use group-specific boundary 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Use group-specific boundary 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Use global boundary 0"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Use global boundary 1"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bndsell) -> Self { + fn from(variant: BNDSELL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bndsell { +impl crate::FieldSpec for BNDSELL_A { type Ux = u8; } -impl crate::IsEnum for Bndsell {} +impl crate::IsEnum for BNDSELL_A {} #[doc = "Field `BNDSELL` reader - Lower Boundary Select"] -pub type BndsellR = crate::FieldReader; -impl BndsellR { +pub type BNDSELL_R = crate::FieldReader; +impl BNDSELL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bndsell { + pub const fn variant(&self) -> BNDSELL_A { match self.bits { - 0 => Bndsell::Value1, - 1 => Bndsell::Value2, - 2 => Bndsell::Value3, - 3 => Bndsell::Value4, + 0 => BNDSELL_A::VALUE1, + 1 => BNDSELL_A::VALUE2, + 2 => BNDSELL_A::VALUE3, + 3 => BNDSELL_A::VALUE4, _ => unreachable!(), } } #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bndsell::Value1 + *self == BNDSELL_A::VALUE1 } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bndsell::Value2 + *self == BNDSELL_A::VALUE2 } #[doc = "Use global boundary 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bndsell::Value3 + *self == BNDSELL_A::VALUE3 } #[doc = "Use global boundary 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bndsell::Value4 + *self == BNDSELL_A::VALUE4 } } #[doc = "Field `BNDSELL` writer - Lower Boundary Select"] -pub type BndsellW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bndsell, crate::Safe>; -impl<'a, REG> BndsellW<'a, REG> +pub type BNDSELL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BNDSELL_A, crate::Safe>; +impl<'a, REG> BNDSELL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bndsell::Value1) + self.variant(BNDSELL_A::VALUE1) } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bndsell::Value2) + self.variant(BNDSELL_A::VALUE2) } #[doc = "Use global boundary 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bndsell::Value3) + self.variant(BNDSELL_A::VALUE3) } #[doc = "Use global boundary 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bndsell::Value4) + self.variant(BNDSELL_A::VALUE4) } } #[doc = "Upper Boundary Select\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bndselu { +pub enum BNDSELU_A { #[doc = "0: Use group-specific boundary 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Use group-specific boundary 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Use global boundary 0"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Use global boundary 1"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bndselu) -> Self { + fn from(variant: BNDSELU_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bndselu { +impl crate::FieldSpec for BNDSELU_A { type Ux = u8; } -impl crate::IsEnum for Bndselu {} +impl crate::IsEnum for BNDSELU_A {} #[doc = "Field `BNDSELU` reader - Upper Boundary Select"] -pub type BndseluR = crate::FieldReader; -impl BndseluR { +pub type BNDSELU_R = crate::FieldReader; +impl BNDSELU_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bndselu { + pub const fn variant(&self) -> BNDSELU_A { match self.bits { - 0 => Bndselu::Value1, - 1 => Bndselu::Value2, - 2 => Bndselu::Value3, - 3 => Bndselu::Value4, + 0 => BNDSELU_A::VALUE1, + 1 => BNDSELU_A::VALUE2, + 2 => BNDSELU_A::VALUE3, + 3 => BNDSELU_A::VALUE4, _ => unreachable!(), } } #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bndselu::Value1 + *self == BNDSELU_A::VALUE1 } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bndselu::Value2 + *self == BNDSELU_A::VALUE2 } #[doc = "Use global boundary 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Bndselu::Value3 + *self == BNDSELU_A::VALUE3 } #[doc = "Use global boundary 1"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Bndselu::Value4 + *self == BNDSELU_A::VALUE4 } } #[doc = "Field `BNDSELU` writer - Upper Boundary Select"] -pub type BndseluW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bndselu, crate::Safe>; -impl<'a, REG> BndseluW<'a, REG> +pub type BNDSELU_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BNDSELU_A, crate::Safe>; +impl<'a, REG> BNDSELU_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Use group-specific boundary 0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bndselu::Value1) + self.variant(BNDSELU_A::VALUE1) } #[doc = "Use group-specific boundary 1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bndselu::Value2) + self.variant(BNDSELU_A::VALUE2) } #[doc = "Use global boundary 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Bndselu::Value3) + self.variant(BNDSELU_A::VALUE3) } #[doc = "Use global boundary 1"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Bndselu::Value4) + self.variant(BNDSELU_A::VALUE4) } } #[doc = "Channel Event Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Chevmode { +pub enum CHEVMODE_A { #[doc = "0: Never"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: NCM: Always (ignore band) FCM: If result switches to either level"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Chevmode) -> Self { + fn from(variant: CHEVMODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Chevmode { +impl crate::FieldSpec for CHEVMODE_A { type Ux = u8; } -impl crate::IsEnum for Chevmode {} +impl crate::IsEnum for CHEVMODE_A {} #[doc = "Field `CHEVMODE` reader - Channel Event Mode"] -pub type ChevmodeR = crate::FieldReader; -impl ChevmodeR { +pub type CHEVMODE_R = crate::FieldReader; +impl CHEVMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Chevmode { + pub const fn variant(&self) -> CHEVMODE_A { match self.bits { - 0 => Chevmode::Value1, - 1 => Chevmode::Value2, - 2 => Chevmode::Value3, - 3 => Chevmode::Value4, + 0 => CHEVMODE_A::VALUE1, + 1 => CHEVMODE_A::VALUE2, + 2 => CHEVMODE_A::VALUE3, + 3 => CHEVMODE_A::VALUE4, _ => unreachable!(), } } #[doc = "Never"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Chevmode::Value1 + *self == CHEVMODE_A::VALUE1 } #[doc = "NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Chevmode::Value2 + *self == CHEVMODE_A::VALUE2 } #[doc = "NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Chevmode::Value3 + *self == CHEVMODE_A::VALUE3 } #[doc = "NCM: Always (ignore band) FCM: If result switches to either level"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Chevmode::Value4 + *self == CHEVMODE_A::VALUE4 } } #[doc = "Field `CHEVMODE` writer - Channel Event Mode"] -pub type ChevmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Chevmode, crate::Safe>; -impl<'a, REG> ChevmodeW<'a, REG> +pub type CHEVMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CHEVMODE_A, crate::Safe>; +impl<'a, REG> CHEVMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,175 +328,175 @@ where #[doc = "Never"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Chevmode::Value1) + self.variant(CHEVMODE_A::VALUE1) } #[doc = "NCM: If result is inside the boundary band FCM: If result becomes high (above cmp. val.)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Chevmode::Value2) + self.variant(CHEVMODE_A::VALUE2) } #[doc = "NCM: If result is outside the boundary band FCM: If result becomes low (below cmp. val.)"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Chevmode::Value3) + self.variant(CHEVMODE_A::VALUE3) } #[doc = "NCM: Always (ignore band) FCM: If result switches to either level"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Chevmode::Value4) + self.variant(CHEVMODE_A::VALUE4) } } #[doc = "Synchronization Request\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sync { +pub enum SYNC_A { #[doc = "0: No synchroniz. request, standalone operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request a synchronized conversion of this channel (only taken into account for a master)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sync) -> Self { + fn from(variant: SYNC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SYNC` reader - Synchronization Request"] -pub type SyncR = crate::BitReader; -impl SyncR { +pub type SYNC_R = crate::BitReader; +impl SYNC_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sync { + pub const fn variant(&self) -> SYNC_A { match self.bits { - false => Sync::Value1, - true => Sync::Value2, + false => SYNC_A::VALUE1, + true => SYNC_A::VALUE2, } } #[doc = "No synchroniz. request, standalone operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sync::Value1 + *self == SYNC_A::VALUE1 } #[doc = "Request a synchronized conversion of this channel (only taken into account for a master)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sync::Value2 + *self == SYNC_A::VALUE2 } } #[doc = "Field `SYNC` writer - Synchronization Request"] -pub type SyncW<'a, REG> = crate::BitWriter<'a, REG, Sync>; -impl<'a, REG> SyncW<'a, REG> +pub type SYNC_W<'a, REG> = crate::BitWriter<'a, REG, SYNC_A>; +impl<'a, REG> SYNC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No synchroniz. request, standalone operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sync::Value1) + self.variant(SYNC_A::VALUE1) } #[doc = "Request a synchronized conversion of this channel (only taken into account for a master)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sync::Value2) + self.variant(SYNC_A::VALUE2) } } #[doc = "Reference Input Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Refsel { +pub enum REFSEL_A { #[doc = "0: Standard reference input VAREF"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Alternate reference input from CH0"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Refsel) -> Self { + fn from(variant: REFSEL_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REFSEL` reader - Reference Input Selection"] -pub type RefselR = crate::BitReader; -impl RefselR { +pub type REFSEL_R = crate::BitReader; +impl REFSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Refsel { + pub const fn variant(&self) -> REFSEL_A { match self.bits { - false => Refsel::Value1, - true => Refsel::Value2, + false => REFSEL_A::VALUE1, + true => REFSEL_A::VALUE2, } } #[doc = "Standard reference input VAREF"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Refsel::Value1 + *self == REFSEL_A::VALUE1 } #[doc = "Alternate reference input from CH0"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Refsel::Value2 + *self == REFSEL_A::VALUE2 } } #[doc = "Field `REFSEL` writer - Reference Input Selection"] -pub type RefselW<'a, REG> = crate::BitWriter<'a, REG, Refsel>; -impl<'a, REG> RefselW<'a, REG> +pub type REFSEL_W<'a, REG> = crate::BitWriter<'a, REG, REFSEL_A>; +impl<'a, REG> REFSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Standard reference input VAREF"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Refsel::Value1) + self.variant(REFSEL_A::VALUE1) } #[doc = "Alternate reference input from CH0"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Refsel::Value2) + self.variant(REFSEL_A::VALUE2) } } #[doc = "Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Resreg { +pub enum RESREG_A { #[doc = "0: Store result in group result register GxRES0"] - Value1 = 0, + VALUE1 = 0, #[doc = "15: Store result in group result register GxRES15"] - Value2 = 15, + VALUE2 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Resreg) -> Self { + fn from(variant: RESREG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Resreg { +impl crate::FieldSpec for RESREG_A { type Ux = u8; } -impl crate::IsEnum for Resreg {} +impl crate::IsEnum for RESREG_A {} #[doc = "Field `RESREG` reader - Result Register"] -pub type ResregR = crate::FieldReader; -impl ResregR { +pub type RESREG_R = crate::FieldReader; +impl RESREG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Resreg::Value1), - 15 => Some(Resreg::Value2), + 0 => Some(RESREG_A::VALUE1), + 15 => Some(RESREG_A::VALUE2), _ => None, } } #[doc = "Store result in group result register GxRES0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Resreg::Value1 + *self == RESREG_A::VALUE1 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Resreg::Value2 + *self == RESREG_A::VALUE2 } } #[doc = "Field `RESREG` writer - Result Register"] -pub type ResregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Resreg>; -impl<'a, REG> ResregW<'a, REG> +pub type RESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RESREG_A>; +impl<'a, REG> RESREG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -504,165 +504,165 @@ where #[doc = "Store result in group result register GxRES0"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Resreg::Value1) + self.variant(RESREG_A::VALUE1) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Resreg::Value2) + self.variant(RESREG_A::VALUE2) } } #[doc = "Result Target for Background Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Restbs { +pub enum RESTBS_A { #[doc = "0: Store results in the selected group result register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Store results in the global result register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Restbs) -> Self { + fn from(variant: RESTBS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RESTBS` reader - Result Target for Background Source"] -pub type RestbsR = crate::BitReader; -impl RestbsR { +pub type RESTBS_R = crate::BitReader; +impl RESTBS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Restbs { + pub const fn variant(&self) -> RESTBS_A { match self.bits { - false => Restbs::Value1, - true => Restbs::Value2, + false => RESTBS_A::VALUE1, + true => RESTBS_A::VALUE2, } } #[doc = "Store results in the selected group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Restbs::Value1 + *self == RESTBS_A::VALUE1 } #[doc = "Store results in the global result register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Restbs::Value2 + *self == RESTBS_A::VALUE2 } } #[doc = "Field `RESTBS` writer - Result Target for Background Source"] -pub type RestbsW<'a, REG> = crate::BitWriter<'a, REG, Restbs>; -impl<'a, REG> RestbsW<'a, REG> +pub type RESTBS_W<'a, REG> = crate::BitWriter<'a, REG, RESTBS_A>; +impl<'a, REG> RESTBS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Store results in the selected group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Restbs::Value1) + self.variant(RESTBS_A::VALUE1) } #[doc = "Store results in the global result register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Restbs::Value2) + self.variant(RESTBS_A::VALUE2) } } #[doc = "Result Position\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Respos { +pub enum RESPOS_A { #[doc = "0: Store results left-aligned"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Store results right-aligned"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Respos) -> Self { + fn from(variant: RESPOS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RESPOS` reader - Result Position"] -pub type ResposR = crate::BitReader; -impl ResposR { +pub type RESPOS_R = crate::BitReader; +impl RESPOS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Respos { + pub const fn variant(&self) -> RESPOS_A { match self.bits { - false => Respos::Value1, - true => Respos::Value2, + false => RESPOS_A::VALUE1, + true => RESPOS_A::VALUE2, } } #[doc = "Store results left-aligned"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Respos::Value1 + *self == RESPOS_A::VALUE1 } #[doc = "Store results right-aligned"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Respos::Value2 + *self == RESPOS_A::VALUE2 } } #[doc = "Field `RESPOS` writer - Result Position"] -pub type ResposW<'a, REG> = crate::BitWriter<'a, REG, Respos>; -impl<'a, REG> ResposW<'a, REG> +pub type RESPOS_W<'a, REG> = crate::BitWriter<'a, REG, RESPOS_A>; +impl<'a, REG> RESPOS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Store results left-aligned"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Respos::Value1) + self.variant(RESPOS_A::VALUE1) } #[doc = "Store results right-aligned"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Respos::Value2) + self.variant(RESPOS_A::VALUE2) } } #[doc = "Broken Wire Detection Channel\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Bwdch { +pub enum BWDCH_A { #[doc = "0: Select VAGND"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Select VAREF"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Bwdch) -> Self { + fn from(variant: BWDCH_A) -> Self { variant as _ } } -impl crate::FieldSpec for Bwdch { +impl crate::FieldSpec for BWDCH_A { type Ux = u8; } -impl crate::IsEnum for Bwdch {} +impl crate::IsEnum for BWDCH_A {} #[doc = "Field `BWDCH` reader - Broken Wire Detection Channel"] -pub type BwdchR = crate::FieldReader; -impl BwdchR { +pub type BWDCH_R = crate::FieldReader; +impl BWDCH_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Bwdch::Value1), - 1 => Some(Bwdch::Value2), + 0 => Some(BWDCH_A::VALUE1), + 1 => Some(BWDCH_A::VALUE2), _ => None, } } #[doc = "Select VAGND"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwdch::Value1 + *self == BWDCH_A::VALUE1 } #[doc = "Select VAREF"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwdch::Value2 + *self == BWDCH_A::VALUE2 } } #[doc = "Field `BWDCH` writer - Broken Wire Detection Channel"] -pub type BwdchW<'a, REG> = crate::FieldWriter<'a, REG, 2, Bwdch>; -impl<'a, REG> BwdchW<'a, REG> +pub type BWDCH_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BWDCH_A>; +impl<'a, REG> BWDCH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -670,207 +670,207 @@ where #[doc = "Select VAGND"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwdch::Value1) + self.variant(BWDCH_A::VALUE1) } #[doc = "Select VAREF"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwdch::Value2) + self.variant(BWDCH_A::VALUE2) } } #[doc = "Broken Wire Detection Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Bwden { +pub enum BWDEN_A { #[doc = "0: Normal operation"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Additional preparation phase is enabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Bwden) -> Self { + fn from(variant: BWDEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `BWDEN` reader - Broken Wire Detection Enable"] -pub type BwdenR = crate::BitReader; -impl BwdenR { +pub type BWDEN_R = crate::BitReader; +impl BWDEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Bwden { + pub const fn variant(&self) -> BWDEN_A { match self.bits { - false => Bwden::Value1, - true => Bwden::Value2, + false => BWDEN_A::VALUE1, + true => BWDEN_A::VALUE2, } } #[doc = "Normal operation"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Bwden::Value1 + *self == BWDEN_A::VALUE1 } #[doc = "Additional preparation phase is enabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Bwden::Value2 + *self == BWDEN_A::VALUE2 } } #[doc = "Field `BWDEN` writer - Broken Wire Detection Enable"] -pub type BwdenW<'a, REG> = crate::BitWriter<'a, REG, Bwden>; -impl<'a, REG> BwdenW<'a, REG> +pub type BWDEN_W<'a, REG> = crate::BitWriter<'a, REG, BWDEN_A>; +impl<'a, REG> BWDEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Normal operation"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Bwden::Value1) + self.variant(BWDEN_A::VALUE1) } #[doc = "Additional preparation phase is enabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Bwden::Value2) + self.variant(BWDEN_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Input Class Select"] #[inline(always)] - pub fn iclsel(&self) -> IclselR { - IclselR::new((self.bits & 3) as u8) + pub fn iclsel(&self) -> ICLSEL_R { + ICLSEL_R::new((self.bits & 3) as u8) } #[doc = "Bits 4:5 - Lower Boundary Select"] #[inline(always)] - pub fn bndsell(&self) -> BndsellR { - BndsellR::new(((self.bits >> 4) & 3) as u8) + pub fn bndsell(&self) -> BNDSELL_R { + BNDSELL_R::new(((self.bits >> 4) & 3) as u8) } #[doc = "Bits 6:7 - Upper Boundary Select"] #[inline(always)] - pub fn bndselu(&self) -> BndseluR { - BndseluR::new(((self.bits >> 6) & 3) as u8) + pub fn bndselu(&self) -> BNDSELU_R { + BNDSELU_R::new(((self.bits >> 6) & 3) as u8) } #[doc = "Bits 8:9 - Channel Event Mode"] #[inline(always)] - pub fn chevmode(&self) -> ChevmodeR { - ChevmodeR::new(((self.bits >> 8) & 3) as u8) + pub fn chevmode(&self) -> CHEVMODE_R { + CHEVMODE_R::new(((self.bits >> 8) & 3) as u8) } #[doc = "Bit 10 - Synchronization Request"] #[inline(always)] - pub fn sync(&self) -> SyncR { - SyncR::new(((self.bits >> 10) & 1) != 0) + pub fn sync(&self) -> SYNC_R { + SYNC_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Reference Input Selection"] #[inline(always)] - pub fn refsel(&self) -> RefselR { - RefselR::new(((self.bits >> 11) & 1) != 0) + pub fn refsel(&self) -> REFSEL_R { + REFSEL_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bits 16:19 - Result Register"] #[inline(always)] - pub fn resreg(&self) -> ResregR { - ResregR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn resreg(&self) -> RESREG_R { + RESREG_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Result Target for Background Source"] #[inline(always)] - pub fn restbs(&self) -> RestbsR { - RestbsR::new(((self.bits >> 20) & 1) != 0) + pub fn restbs(&self) -> RESTBS_R { + RESTBS_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 21 - Result Position"] #[inline(always)] - pub fn respos(&self) -> ResposR { - ResposR::new(((self.bits >> 21) & 1) != 0) + pub fn respos(&self) -> RESPOS_R { + RESPOS_R::new(((self.bits >> 21) & 1) != 0) } #[doc = "Bits 28:29 - Broken Wire Detection Channel"] #[inline(always)] - pub fn bwdch(&self) -> BwdchR { - BwdchR::new(((self.bits >> 28) & 3) as u8) + pub fn bwdch(&self) -> BWDCH_R { + BWDCH_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Broken Wire Detection Enable"] #[inline(always)] - pub fn bwden(&self) -> BwdenR { - BwdenR::new(((self.bits >> 30) & 1) != 0) + pub fn bwden(&self) -> BWDEN_R { + BWDEN_R::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Input Class Select"] #[inline(always)] #[must_use] - pub fn iclsel(&mut self) -> IclselW { - IclselW::new(self, 0) + pub fn iclsel(&mut self) -> ICLSEL_W { + ICLSEL_W::new(self, 0) } #[doc = "Bits 4:5 - Lower Boundary Select"] #[inline(always)] #[must_use] - pub fn bndsell(&mut self) -> BndsellW { - BndsellW::new(self, 4) + pub fn bndsell(&mut self) -> BNDSELL_W { + BNDSELL_W::new(self, 4) } #[doc = "Bits 6:7 - Upper Boundary Select"] #[inline(always)] #[must_use] - pub fn bndselu(&mut self) -> BndseluW { - BndseluW::new(self, 6) + pub fn bndselu(&mut self) -> BNDSELU_W { + BNDSELU_W::new(self, 6) } #[doc = "Bits 8:9 - Channel Event Mode"] #[inline(always)] #[must_use] - pub fn chevmode(&mut self) -> ChevmodeW { - ChevmodeW::new(self, 8) + pub fn chevmode(&mut self) -> CHEVMODE_W { + CHEVMODE_W::new(self, 8) } #[doc = "Bit 10 - Synchronization Request"] #[inline(always)] #[must_use] - pub fn sync(&mut self) -> SyncW { - SyncW::new(self, 10) + pub fn sync(&mut self) -> SYNC_W { + SYNC_W::new(self, 10) } #[doc = "Bit 11 - Reference Input Selection"] #[inline(always)] #[must_use] - pub fn refsel(&mut self) -> RefselW { - RefselW::new(self, 11) + pub fn refsel(&mut self) -> REFSEL_W { + REFSEL_W::new(self, 11) } #[doc = "Bits 16:19 - Result Register"] #[inline(always)] #[must_use] - pub fn resreg(&mut self) -> ResregW { - ResregW::new(self, 16) + pub fn resreg(&mut self) -> RESREG_W { + RESREG_W::new(self, 16) } #[doc = "Bit 20 - Result Target for Background Source"] #[inline(always)] #[must_use] - pub fn restbs(&mut self) -> RestbsW { - RestbsW::new(self, 20) + pub fn restbs(&mut self) -> RESTBS_W { + RESTBS_W::new(self, 20) } #[doc = "Bit 21 - Result Position"] #[inline(always)] #[must_use] - pub fn respos(&mut self) -> ResposW { - ResposW::new(self, 21) + pub fn respos(&mut self) -> RESPOS_W { + RESPOS_W::new(self, 21) } #[doc = "Bits 28:29 - Broken Wire Detection Channel"] #[inline(always)] #[must_use] - pub fn bwdch(&mut self) -> BwdchW { - BwdchW::new(self, 28) + pub fn bwdch(&mut self) -> BWDCH_W { + BWDCH_W::new(self, 28) } #[doc = "Bit 30 - Broken Wire Detection Enable"] #[inline(always)] #[must_use] - pub fn bwden(&mut self) -> BwdenW { - BwdenW::new(self, 30) + pub fn bwden(&mut self) -> BWDEN_W { + BWDEN_W::new(self, 30) } } #[doc = "Channel Ctrl. Reg.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`chctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`chctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ChctrSpec; -impl crate::RegisterSpec for ChctrSpec { +pub struct CHCTR_SPEC; +impl crate::RegisterSpec for CHCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`chctr::R`](R) reader structure"] -impl crate::Readable for ChctrSpec {} +impl crate::Readable for CHCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`chctr::W`](W) writer structure"] -impl crate::Writable for ChctrSpec { +impl crate::Writable for CHCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CHCTR[%s] to value 0"] -impl crate::Resettable for ChctrSpec { +impl crate::Resettable for CHCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/emuxctr.rs b/src/vadc_g0/emuxctr.rs index 94aa8661..2eceaa7f 100644 --- a/src/vadc_g0/emuxctr.rs +++ b/src/vadc_g0/emuxctr.rs @@ -1,78 +1,78 @@ #[doc = "Register `EMUXCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `EMUXCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `EMUXSET` reader - External Multiplexer Start Selection"] -pub type EmuxsetR = crate::FieldReader; +pub type EMUXSET_R = crate::FieldReader; #[doc = "Field `EMUXSET` writer - External Multiplexer Start Selection"] -pub type EmuxsetW<'a, REG> = crate::FieldWriter<'a, REG, 3>; +pub type EMUXSET_W<'a, REG> = crate::FieldWriter<'a, REG, 3>; #[doc = "Field `EMUXACT` reader - External Multiplexer Actual Selection"] -pub type EmuxactR = crate::FieldReader; +pub type EMUXACT_R = crate::FieldReader; #[doc = "Field `EMUXCH` reader - External Multiplexer Channel Select"] -pub type EmuxchR = crate::FieldReader; +pub type EMUXCH_R = crate::FieldReader; #[doc = "Field `EMUXCH` writer - External Multiplexer Channel Select"] -pub type EmuxchW<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; +pub type EMUXCH_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>; #[doc = "External Multiplexer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Emuxmode { +pub enum EMUXMODE_A { #[doc = "0: Software control (no hardware action)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Steady mode (use EMUXSET value)"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Single-step mode"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Sequence mode"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Emuxmode) -> Self { + fn from(variant: EMUXMODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Emuxmode { +impl crate::FieldSpec for EMUXMODE_A { type Ux = u8; } -impl crate::IsEnum for Emuxmode {} +impl crate::IsEnum for EMUXMODE_A {} #[doc = "Field `EMUXMODE` reader - External Multiplexer Mode"] -pub type EmuxmodeR = crate::FieldReader; -impl EmuxmodeR { +pub type EMUXMODE_R = crate::FieldReader; +impl EMUXMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emuxmode { + pub const fn variant(&self) -> EMUXMODE_A { match self.bits { - 0 => Emuxmode::Value1, - 1 => Emuxmode::Value2, - 2 => Emuxmode::Value3, - 3 => Emuxmode::Value4, + 0 => EMUXMODE_A::VALUE1, + 1 => EMUXMODE_A::VALUE2, + 2 => EMUXMODE_A::VALUE3, + 3 => EMUXMODE_A::VALUE4, _ => unreachable!(), } } #[doc = "Software control (no hardware action)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emuxmode::Value1 + *self == EMUXMODE_A::VALUE1 } #[doc = "Steady mode (use EMUXSET value)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emuxmode::Value2 + *self == EMUXMODE_A::VALUE2 } #[doc = "Single-step mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Emuxmode::Value3 + *self == EMUXMODE_A::VALUE3 } #[doc = "Sequence mode"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Emuxmode::Value4 + *self == EMUXMODE_A::VALUE4 } } #[doc = "Field `EMUXMODE` writer - External Multiplexer Mode"] -pub type EmuxmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Emuxmode, crate::Safe>; -impl<'a, REG> EmuxmodeW<'a, REG> +pub type EMUXMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EMUXMODE_A, crate::Safe>; +impl<'a, REG> EMUXMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -80,286 +80,286 @@ where #[doc = "Software control (no hardware action)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emuxmode::Value1) + self.variant(EMUXMODE_A::VALUE1) } #[doc = "Steady mode (use EMUXSET value)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emuxmode::Value2) + self.variant(EMUXMODE_A::VALUE2) } #[doc = "Single-step mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Emuxmode::Value3) + self.variant(EMUXMODE_A::VALUE3) } #[doc = "Sequence mode"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Emuxmode::Value4) + self.variant(EMUXMODE_A::VALUE4) } } #[doc = "External Multiplexer Coding Scheme\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emxcod { +pub enum EMXCOD_A { #[doc = "0: Output the channel number in binary code"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Output the channel number in Gray code"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emxcod) -> Self { + fn from(variant: EMXCOD_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMXCOD` reader - External Multiplexer Coding Scheme"] -pub type EmxcodR = crate::BitReader; -impl EmxcodR { +pub type EMXCOD_R = crate::BitReader; +impl EMXCOD_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emxcod { + pub const fn variant(&self) -> EMXCOD_A { match self.bits { - false => Emxcod::Value1, - true => Emxcod::Value2, + false => EMXCOD_A::VALUE1, + true => EMXCOD_A::VALUE2, } } #[doc = "Output the channel number in binary code"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emxcod::Value1 + *self == EMXCOD_A::VALUE1 } #[doc = "Output the channel number in Gray code"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emxcod::Value2 + *self == EMXCOD_A::VALUE2 } } #[doc = "Field `EMXCOD` writer - External Multiplexer Coding Scheme"] -pub type EmxcodW<'a, REG> = crate::BitWriter<'a, REG, Emxcod>; -impl<'a, REG> EmxcodW<'a, REG> +pub type EMXCOD_W<'a, REG> = crate::BitWriter<'a, REG, EMXCOD_A>; +impl<'a, REG> EMXCOD_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Output the channel number in binary code"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emxcod::Value1) + self.variant(EMXCOD_A::VALUE1) } #[doc = "Output the channel number in Gray code"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emxcod::Value2) + self.variant(EMXCOD_A::VALUE2) } } #[doc = "External Multiplexer Sample Time Control\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emxst { +pub enum EMXST_A { #[doc = "0: Use STCE whenever the setting changes"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Use STCE for each conversion of an external channel"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emxst) -> Self { + fn from(variant: EMXST_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMXST` reader - External Multiplexer Sample Time Control"] -pub type EmxstR = crate::BitReader; -impl EmxstR { +pub type EMXST_R = crate::BitReader; +impl EMXST_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emxst { + pub const fn variant(&self) -> EMXST_A { match self.bits { - false => Emxst::Value1, - true => Emxst::Value2, + false => EMXST_A::VALUE1, + true => EMXST_A::VALUE2, } } #[doc = "Use STCE whenever the setting changes"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emxst::Value1 + *self == EMXST_A::VALUE1 } #[doc = "Use STCE for each conversion of an external channel"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emxst::Value2 + *self == EMXST_A::VALUE2 } } #[doc = "Field `EMXST` writer - External Multiplexer Sample Time Control"] -pub type EmxstW<'a, REG> = crate::BitWriter<'a, REG, Emxst>; -impl<'a, REG> EmxstW<'a, REG> +pub type EMXST_W<'a, REG> = crate::BitWriter<'a, REG, EMXST_A>; +impl<'a, REG> EMXST_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Use STCE whenever the setting changes"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emxst::Value1) + self.variant(EMXST_A::VALUE1) } #[doc = "Use STCE for each conversion of an external channel"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emxst::Value2) + self.variant(EMXST_A::VALUE2) } } #[doc = "External Multiplexer Channel Selection Style\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emxcss { +pub enum EMXCSS_A { #[doc = "0: Channel number: Bitfield EMUXCH selects an arbitrary channel"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emxcss) -> Self { + fn from(variant: EMXCSS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMXCSS` reader - External Multiplexer Channel Selection Style"] -pub type EmxcssR = crate::BitReader; -impl EmxcssR { +pub type EMXCSS_R = crate::BitReader; +impl EMXCSS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Emxcss { + pub const fn variant(&self) -> EMXCSS_A { match self.bits { - false => Emxcss::Value1, - true => Emxcss::Value2, + false => EMXCSS_A::VALUE1, + true => EMXCSS_A::VALUE2, } } #[doc = "Channel number: Bitfield EMUXCH selects an arbitrary channel"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Emxcss::Value1 + *self == EMXCSS_A::VALUE1 } #[doc = "Channel enable: Each bit of bitfield EMUXCH selects the associated channel for EMUX control"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Emxcss::Value2 + *self == EMXCSS_A::VALUE2 } } #[doc = "Write Control for EMUX Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Emxwc { +pub enum EMXWC_A { #[doc = "0: No write access to EMUX cfg."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Emxwc) -> Self { + fn from(variant: EMXWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMXWC` writer - Write Control for EMUX Configuration"] -pub type EmxwcW<'a, REG> = crate::BitWriter<'a, REG, Emxwc>; -impl<'a, REG> EmxwcW<'a, REG> +pub type EMXWC_W<'a, REG> = crate::BitWriter<'a, REG, EMXWC_A>; +impl<'a, REG> EMXWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to EMUX cfg."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Emxwc::Value1) + self.variant(EMXWC_A::VALUE1) } #[doc = "Bitfields EMXMODE, EMXCOD, EMXST, EMXCSS can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Emxwc::Value2) + self.variant(EMXWC_A::VALUE2) } } impl R { #[doc = "Bits 0:2 - External Multiplexer Start Selection"] #[inline(always)] - pub fn emuxset(&self) -> EmuxsetR { - EmuxsetR::new((self.bits & 7) as u8) + pub fn emuxset(&self) -> EMUXSET_R { + EMUXSET_R::new((self.bits & 7) as u8) } #[doc = "Bits 8:10 - External Multiplexer Actual Selection"] #[inline(always)] - pub fn emuxact(&self) -> EmuxactR { - EmuxactR::new(((self.bits >> 8) & 7) as u8) + pub fn emuxact(&self) -> EMUXACT_R { + EMUXACT_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:25 - External Multiplexer Channel Select"] #[inline(always)] - pub fn emuxch(&self) -> EmuxchR { - EmuxchR::new(((self.bits >> 16) & 0x03ff) as u16) + pub fn emuxch(&self) -> EMUXCH_R { + EMUXCH_R::new(((self.bits >> 16) & 0x03ff) as u16) } #[doc = "Bits 26:27 - External Multiplexer Mode"] #[inline(always)] - pub fn emuxmode(&self) -> EmuxmodeR { - EmuxmodeR::new(((self.bits >> 26) & 3) as u8) + pub fn emuxmode(&self) -> EMUXMODE_R { + EMUXMODE_R::new(((self.bits >> 26) & 3) as u8) } #[doc = "Bit 28 - External Multiplexer Coding Scheme"] #[inline(always)] - pub fn emxcod(&self) -> EmxcodR { - EmxcodR::new(((self.bits >> 28) & 1) != 0) + pub fn emxcod(&self) -> EMXCOD_R { + EMXCOD_R::new(((self.bits >> 28) & 1) != 0) } #[doc = "Bit 29 - External Multiplexer Sample Time Control"] #[inline(always)] - pub fn emxst(&self) -> EmxstR { - EmxstR::new(((self.bits >> 29) & 1) != 0) + pub fn emxst(&self) -> EMXST_R { + EMXST_R::new(((self.bits >> 29) & 1) != 0) } #[doc = "Bit 30 - External Multiplexer Channel Selection Style"] #[inline(always)] - pub fn emxcss(&self) -> EmxcssR { - EmxcssR::new(((self.bits >> 30) & 1) != 0) + pub fn emxcss(&self) -> EMXCSS_R { + EMXCSS_R::new(((self.bits >> 30) & 1) != 0) } } impl W { #[doc = "Bits 0:2 - External Multiplexer Start Selection"] #[inline(always)] #[must_use] - pub fn emuxset(&mut self) -> EmuxsetW { - EmuxsetW::new(self, 0) + pub fn emuxset(&mut self) -> EMUXSET_W { + EMUXSET_W::new(self, 0) } #[doc = "Bits 16:25 - External Multiplexer Channel Select"] #[inline(always)] #[must_use] - pub fn emuxch(&mut self) -> EmuxchW { - EmuxchW::new(self, 16) + pub fn emuxch(&mut self) -> EMUXCH_W { + EMUXCH_W::new(self, 16) } #[doc = "Bits 26:27 - External Multiplexer Mode"] #[inline(always)] #[must_use] - pub fn emuxmode(&mut self) -> EmuxmodeW { - EmuxmodeW::new(self, 26) + pub fn emuxmode(&mut self) -> EMUXMODE_W { + EMUXMODE_W::new(self, 26) } #[doc = "Bit 28 - External Multiplexer Coding Scheme"] #[inline(always)] #[must_use] - pub fn emxcod(&mut self) -> EmxcodW { - EmxcodW::new(self, 28) + pub fn emxcod(&mut self) -> EMXCOD_W { + EMXCOD_W::new(self, 28) } #[doc = "Bit 29 - External Multiplexer Sample Time Control"] #[inline(always)] #[must_use] - pub fn emxst(&mut self) -> EmxstW { - EmxstW::new(self, 29) + pub fn emxst(&mut self) -> EMXST_W { + EMXST_W::new(self, 29) } #[doc = "Bit 31 - Write Control for EMUX Configuration"] #[inline(always)] #[must_use] - pub fn emxwc(&mut self) -> EmxwcW { - EmxwcW::new(self, 31) + pub fn emxwc(&mut self) -> EMXWC_W { + EMXWC_W::new(self, 31) } } #[doc = "External Multiplexer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emuxctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emuxctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct EmuxctrSpec; -impl crate::RegisterSpec for EmuxctrSpec { +pub struct EMUXCTR_SPEC; +impl crate::RegisterSpec for EMUXCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`emuxctr::R`](R) reader structure"] -impl crate::Readable for EmuxctrSpec {} +impl crate::Readable for EMUXCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`emuxctr::W`](W) writer structure"] -impl crate::Writable for EmuxctrSpec { +impl crate::Writable for EMUXCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets EMUXCTR to value 0"] -impl crate::Resettable for EmuxctrSpec { +impl crate::Resettable for EMUXCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/iclass.rs b/src/vadc_g0/iclass.rs index 7fcb532f..7bea0bcd 100644 --- a/src/vadc_g0/iclass.rs +++ b/src/vadc_g0/iclass.rs @@ -1,72 +1,72 @@ #[doc = "Register `ICLASS[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `ICLASS[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `STCS` reader - Sample Time Control for Standard Conversions"] -pub type StcsR = crate::FieldReader; +pub type STCS_R = crate::FieldReader; #[doc = "Field `STCS` writer - Sample Time Control for Standard Conversions"] -pub type StcsW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type STCS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for Standard Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cms { +pub enum CMS_A { #[doc = "0: 12-bit conversion"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 10-bit conversion"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 8-bit conversion"] - Value3 = 2, + VALUE3 = 2, #[doc = "5: 10-bit fast compare mode"] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cms) -> Self { + fn from(variant: CMS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cms { +impl crate::FieldSpec for CMS_A { type Ux = u8; } -impl crate::IsEnum for Cms {} +impl crate::IsEnum for CMS_A {} #[doc = "Field `CMS` reader - Conversion Mode for Standard Conversions"] -pub type CmsR = crate::FieldReader; -impl CmsR { +pub type CMS_R = crate::FieldReader; +impl CMS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cms::Value1), - 1 => Some(Cms::Value2), - 2 => Some(Cms::Value3), - 5 => Some(Cms::Value6), + 0 => Some(CMS_A::VALUE1), + 1 => Some(CMS_A::VALUE2), + 2 => Some(CMS_A::VALUE3), + 5 => Some(CMS_A::VALUE6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cms::Value1 + *self == CMS_A::VALUE1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cms::Value2 + *self == CMS_A::VALUE2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cms::Value3 + *self == CMS_A::VALUE3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Cms::Value6 + *self == CMS_A::VALUE6 } } #[doc = "Field `CMS` writer - Conversion Mode for Standard Conversions"] -pub type CmsW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cms>; -impl<'a, REG> CmsW<'a, REG> +pub type CMS_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CMS_A>; +impl<'a, REG> CMS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -74,89 +74,89 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cms::Value1) + self.variant(CMS_A::VALUE1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cms::Value2) + self.variant(CMS_A::VALUE2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cms::Value3) + self.variant(CMS_A::VALUE3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Cms::Value6) + self.variant(CMS_A::VALUE6) } } #[doc = "Field `STCE` reader - Sample Time Control for EMUX Conversions"] -pub type StceR = crate::FieldReader; +pub type STCE_R = crate::FieldReader; #[doc = "Field `STCE` writer - Sample Time Control for EMUX Conversions"] -pub type StceW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type STCE_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Conversion Mode for EMUX Conversions\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Cme { +pub enum CME_A { #[doc = "0: 12-bit conversion"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: 10-bit conversion"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: 8-bit conversion"] - Value3 = 2, + VALUE3 = 2, #[doc = "5: 10-bit fast compare mode"] - Value6 = 5, + VALUE6 = 5, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Cme) -> Self { + fn from(variant: CME_A) -> Self { variant as _ } } -impl crate::FieldSpec for Cme { +impl crate::FieldSpec for CME_A { type Ux = u8; } -impl crate::IsEnum for Cme {} +impl crate::IsEnum for CME_A {} #[doc = "Field `CME` reader - Conversion Mode for EMUX Conversions"] -pub type CmeR = crate::FieldReader; -impl CmeR { +pub type CME_R = crate::FieldReader; +impl CME_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Cme::Value1), - 1 => Some(Cme::Value2), - 2 => Some(Cme::Value3), - 5 => Some(Cme::Value6), + 0 => Some(CME_A::VALUE1), + 1 => Some(CME_A::VALUE2), + 2 => Some(CME_A::VALUE3), + 5 => Some(CME_A::VALUE6), _ => None, } } #[doc = "12-bit conversion"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Cme::Value1 + *self == CME_A::VALUE1 } #[doc = "10-bit conversion"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Cme::Value2 + *self == CME_A::VALUE2 } #[doc = "8-bit conversion"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Cme::Value3 + *self == CME_A::VALUE3 } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn is_value6(&self) -> bool { - *self == Cme::Value6 + *self == CME_A::VALUE6 } } #[doc = "Field `CME` writer - Conversion Mode for EMUX Conversions"] -pub type CmeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Cme>; -impl<'a, REG> CmeW<'a, REG> +pub type CME_W<'a, REG> = crate::FieldWriter<'a, REG, 3, CME_A>; +impl<'a, REG> CME_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -164,87 +164,87 @@ where #[doc = "12-bit conversion"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cme::Value1) + self.variant(CME_A::VALUE1) } #[doc = "10-bit conversion"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cme::Value2) + self.variant(CME_A::VALUE2) } #[doc = "8-bit conversion"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Cme::Value3) + self.variant(CME_A::VALUE3) } #[doc = "10-bit fast compare mode"] #[inline(always)] pub fn value6(self) -> &'a mut crate::W { - self.variant(Cme::Value6) + self.variant(CME_A::VALUE6) } } impl R { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - pub fn stcs(&self) -> StcsR { - StcsR::new((self.bits & 0x1f) as u8) + pub fn stcs(&self) -> STCS_R { + STCS_R::new((self.bits & 0x1f) as u8) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - pub fn cms(&self) -> CmsR { - CmsR::new(((self.bits >> 8) & 7) as u8) + pub fn cms(&self) -> CMS_R { + CMS_R::new(((self.bits >> 8) & 7) as u8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - pub fn stce(&self) -> StceR { - StceR::new(((self.bits >> 16) & 0x1f) as u8) + pub fn stce(&self) -> STCE_R { + STCE_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - pub fn cme(&self) -> CmeR { - CmeR::new(((self.bits >> 24) & 7) as u8) + pub fn cme(&self) -> CME_R { + CME_R::new(((self.bits >> 24) & 7) as u8) } } impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] #[must_use] - pub fn stcs(&mut self) -> StcsW { - StcsW::new(self, 0) + pub fn stcs(&mut self) -> STCS_W { + STCS_W::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] #[must_use] - pub fn cms(&mut self) -> CmsW { - CmsW::new(self, 8) + pub fn cms(&mut self) -> CMS_W { + CMS_W::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn stce(&mut self) -> StceW { - StceW::new(self, 16) + pub fn stce(&mut self) -> STCE_W { + STCE_W::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] #[must_use] - pub fn cme(&mut self) -> CmeW { - CmeW::new(self, 24) + pub fn cme(&mut self) -> CME_W { + CME_W::new(self, 24) } } #[doc = "Input Class Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`iclass::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`iclass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IclassSpec; -impl crate::RegisterSpec for IclassSpec { +pub struct ICLASS_SPEC; +impl crate::RegisterSpec for ICLASS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`iclass::R`](R) reader structure"] -impl crate::Readable for IclassSpec {} +impl crate::Readable for ICLASS_SPEC {} #[doc = "`write(|w| ..)` method takes [`iclass::W`](W) writer structure"] -impl crate::Writable for IclassSpec { +impl crate::Writable for ICLASS_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets ICLASS[%s] to value 0"] -impl crate::Resettable for IclassSpec { +impl crate::Resettable for ICLASS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/q0r0.rs b/src/vadc_g0/q0r0.rs index f92ed8cf..30645442 100644 --- a/src/vadc_g0/q0r0.rs +++ b/src/vadc_g0/q0r0.rs @@ -1,186 +1,186 @@ #[doc = "Register `Q0R0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `REQCHNR` reader - Request Channel Number"] -pub type ReqchnrR = crate::FieldReader; +pub type REQCHNR_R = crate::FieldReader; #[doc = "Refill\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rf { +pub enum RF_A { #[doc = "0: The request is discarded after the conversion start."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The request is automatically refilled into the queue after the conversion start."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rf) -> Self { + fn from(variant: RF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RF` reader - Refill"] -pub type RfR = crate::BitReader; -impl RfR { +pub type RF_R = crate::BitReader; +impl RF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rf { + pub const fn variant(&self) -> RF_A { match self.bits { - false => Rf::Value1, - true => Rf::Value2, + false => RF_A::VALUE1, + true => RF_A::VALUE2, } } #[doc = "The request is discarded after the conversion start."] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rf::Value1 + *self == RF_A::VALUE1 } #[doc = "The request is automatically refilled into the queue after the conversion start."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rf::Value2 + *self == RF_A::VALUE2 } } #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ensi { +pub enum ENSI_A { #[doc = "0: No request source interrupt"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A request source event interrupt is generated upon a request source event (related conversion is finished)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ensi) -> Self { + fn from(variant: ENSI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type EnsiR = crate::BitReader; -impl EnsiR { +pub type ENSI_R = crate::BitReader; +impl ENSI_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ensi { + pub const fn variant(&self) -> ENSI_A { match self.bits { - false => Ensi::Value1, - true => Ensi::Value2, + false => ENSI_A::VALUE1, + true => ENSI_A::VALUE2, } } #[doc = "No request source interrupt"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ensi::Value1 + *self == ENSI_A::VALUE1 } #[doc = "A request source event interrupt is generated upon a request source event (related conversion is finished)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ensi::Value2 + *self == ENSI_A::VALUE2 } } #[doc = "External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Extr { +pub enum EXTR_A { #[doc = "0: A valid queue entry immediately leads to a conversion request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The request handler waits for a trigger event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Extr) -> Self { + fn from(variant: EXTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EXTR` reader - External Trigger"] -pub type ExtrR = crate::BitReader; -impl ExtrR { +pub type EXTR_R = crate::BitReader; +impl EXTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Extr { + pub const fn variant(&self) -> EXTR_A { match self.bits { - false => Extr::Value1, - true => Extr::Value2, + false => EXTR_A::VALUE1, + true => EXTR_A::VALUE2, } } #[doc = "A valid queue entry immediately leads to a conversion request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Extr::Value1 + *self == EXTR_A::VALUE1 } #[doc = "The request handler waits for a trigger event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Extr::Value2 + *self == EXTR_A::VALUE2 } } #[doc = "Request Channel Number Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum V { +pub enum V_A { #[doc = "0: No valid queue entry"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The queue entry is valid and leads to a conversion request"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: V) -> Self { + fn from(variant: V_A) -> Self { variant as u8 != 0 } } #[doc = "Field `V` reader - Request Channel Number Valid"] -pub type VR = crate::BitReader; -impl VR { +pub type V_R = crate::BitReader; +impl V_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> V { + pub const fn variant(&self) -> V_A { match self.bits { - false => V::Value1, - true => V::Value2, + false => V_A::VALUE1, + true => V_A::VALUE2, } } #[doc = "No valid queue entry"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == V::Value1 + *self == V_A::VALUE1 } #[doc = "The queue entry is valid and leads to a conversion request"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == V::Value2 + *self == V_A::VALUE2 } } impl R { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] - pub fn reqchnr(&self) -> ReqchnrR { - ReqchnrR::new((self.bits & 0x1f) as u8) + pub fn reqchnr(&self) -> REQCHNR_R { + REQCHNR_R::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Refill"] #[inline(always)] - pub fn rf(&self) -> RfR { - RfR::new(((self.bits >> 5) & 1) != 0) + pub fn rf(&self) -> RF_R { + RF_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> EnsiR { - EnsiR::new(((self.bits >> 6) & 1) != 0) + pub fn ensi(&self) -> ENSI_R { + ENSI_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] - pub fn extr(&self) -> ExtrR { - ExtrR::new(((self.bits >> 7) & 1) != 0) + pub fn extr(&self) -> EXTR_R { + EXTR_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Request Channel Number Valid"] #[inline(always)] - pub fn v(&self) -> VR { - VR::new(((self.bits >> 8) & 1) != 0) + pub fn v(&self) -> V_R { + V_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`q0r0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Q0r0Spec; -impl crate::RegisterSpec for Q0r0Spec { +pub struct Q0R0_SPEC; +impl crate::RegisterSpec for Q0R0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`q0r0::R`](R) reader structure"] -impl crate::Readable for Q0r0Spec {} +impl crate::Readable for Q0R0_SPEC {} #[doc = "`reset()` method sets Q0R0 to value 0"] -impl crate::Resettable for Q0r0Spec { +impl crate::Resettable for Q0R0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qbur0.rs b/src/vadc_g0/qbur0.rs index 67355fbc..da8968cb 100644 --- a/src/vadc_g0/qbur0.rs +++ b/src/vadc_g0/qbur0.rs @@ -1,84 +1,84 @@ #[doc = "Register `QBUR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `REQCHNR` reader - Request Channel Number"] -pub type ReqchnrR = crate::FieldReader; +pub type REQCHNR_R = crate::FieldReader; #[doc = "Field `RF` reader - Refill"] -pub type RfR = crate::BitReader; +pub type RF_R = crate::BitReader; #[doc = "Field `ENSI` reader - Enable Source Interrupt"] -pub type EnsiR = crate::BitReader; +pub type ENSI_R = crate::BitReader; #[doc = "Field `EXTR` reader - External Trigger"] -pub type ExtrR = crate::BitReader; +pub type EXTR_R = crate::BitReader; #[doc = "Request Channel Number Valid\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum V { +pub enum V_A { #[doc = "0: Backup register not valid"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: V) -> Self { + fn from(variant: V_A) -> Self { variant as u8 != 0 } } #[doc = "Field `V` reader - Request Channel Number Valid"] -pub type VR = crate::BitReader; -impl VR { +pub type V_R = crate::BitReader; +impl V_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> V { + pub const fn variant(&self) -> V_A { match self.bits { - false => V::Value1, - true => V::Value2, + false => V_A::VALUE1, + true => V_A::VALUE2, } } #[doc = "Backup register not valid"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == V::Value1 + *self == V_A::VALUE1 } #[doc = "Backup register contains a valid entry. This will be requested before a valid entry in queue register 0 (stage 0) will be requested."] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == V::Value2 + *self == V_A::VALUE2 } } impl R { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] - pub fn reqchnr(&self) -> ReqchnrR { - ReqchnrR::new((self.bits & 0x1f) as u8) + pub fn reqchnr(&self) -> REQCHNR_R { + REQCHNR_R::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Refill"] #[inline(always)] - pub fn rf(&self) -> RfR { - RfR::new(((self.bits >> 5) & 1) != 0) + pub fn rf(&self) -> RF_R { + RF_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] - pub fn ensi(&self) -> EnsiR { - EnsiR::new(((self.bits >> 6) & 1) != 0) + pub fn ensi(&self) -> ENSI_R { + ENSI_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] - pub fn extr(&self) -> ExtrR { - ExtrR::new(((self.bits >> 7) & 1) != 0) + pub fn extr(&self) -> EXTR_R { + EXTR_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Request Channel Number Valid"] #[inline(always)] - pub fn v(&self) -> VR { - VR::new(((self.bits >> 8) & 1) != 0) + pub fn v(&self) -> V_R { + V_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Backup Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qbur0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Qbur0Spec; -impl crate::RegisterSpec for Qbur0Spec { +pub struct QBUR0_SPEC; +impl crate::RegisterSpec for QBUR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`qbur0::R`](R) reader structure"] -impl crate::Readable for Qbur0Spec {} +impl crate::Readable for QBUR0_SPEC {} #[doc = "`reset()` method sets QBUR0 to value 0"] -impl crate::Resettable for Qbur0Spec { +impl crate::Resettable for QBUR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qctrl0.rs b/src/vadc_g0/qctrl0.rs index 80d5383f..e653d896 100644 --- a/src/vadc_g0/qctrl0.rs +++ b/src/vadc_g0/qctrl0.rs @@ -1,60 +1,60 @@ #[doc = "Register `QCTRL0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QCTRL0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source-specific Result Register\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Srcresreg { +pub enum SRCRESREG_A { #[doc = "0: Use GxCHCTRy.RESREG to select a group result register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Store result in group result register GxRES1"] - Value2 = 1, + VALUE2 = 1, #[doc = "15: Store result in group result register GxRES15"] - Value3 = 15, + VALUE3 = 15, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Srcresreg) -> Self { + fn from(variant: SRCRESREG_A) -> Self { variant as _ } } -impl crate::FieldSpec for Srcresreg { +impl crate::FieldSpec for SRCRESREG_A { type Ux = u8; } -impl crate::IsEnum for Srcresreg {} +impl crate::IsEnum for SRCRESREG_A {} #[doc = "Field `SRCRESREG` reader - Source-specific Result Register"] -pub type SrcresregR = crate::FieldReader; -impl SrcresregR { +pub type SRCRESREG_R = crate::FieldReader; +impl SRCRESREG_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Srcresreg::Value1), - 1 => Some(Srcresreg::Value2), - 15 => Some(Srcresreg::Value3), + 0 => Some(SRCRESREG_A::VALUE1), + 1 => Some(SRCRESREG_A::VALUE2), + 15 => Some(SRCRESREG_A::VALUE3), _ => None, } } #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srcresreg::Value1 + *self == SRCRESREG_A::VALUE1 } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srcresreg::Value2 + *self == SRCRESREG_A::VALUE2 } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Srcresreg::Value3 + *self == SRCRESREG_A::VALUE3 } } #[doc = "Field `SRCRESREG` writer - Source-specific Result Register"] -pub type SrcresregW<'a, REG> = crate::FieldWriter<'a, REG, 4, Srcresreg>; -impl<'a, REG> SrcresregW<'a, REG> +pub type SRCRESREG_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SRCRESREG_A>; +impl<'a, REG> SRCRESREG_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -62,86 +62,86 @@ where #[doc = "Use GxCHCTRy.RESREG to select a group result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value1) + self.variant(SRCRESREG_A::VALUE1) } #[doc = "Store result in group result register GxRES1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value2) + self.variant(SRCRESREG_A::VALUE2) } #[doc = "Store result in group result register GxRES15"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Srcresreg::Value3) + self.variant(SRCRESREG_A::VALUE3) } } #[doc = "Field `XTSEL` reader - External Trigger Input Selection"] -pub type XtselR = crate::FieldReader; +pub type XTSEL_R = crate::FieldReader; #[doc = "Field `XTSEL` writer - External Trigger Input Selection"] -pub type XtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type XTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `XTLVL` reader - External Trigger Level"] -pub type XtlvlR = crate::BitReader; +pub type XTLVL_R = crate::BitReader; #[doc = "Trigger Operating Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Xtmode { +pub enum XTMODE_A { #[doc = "0: No external trigger"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Trigger event upon a falling edge"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Trigger event upon a rising edge"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Trigger event upon any edge"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Xtmode) -> Self { + fn from(variant: XTMODE_A) -> Self { variant as _ } } -impl crate::FieldSpec for Xtmode { +impl crate::FieldSpec for XTMODE_A { type Ux = u8; } -impl crate::IsEnum for Xtmode {} +impl crate::IsEnum for XTMODE_A {} #[doc = "Field `XTMODE` reader - Trigger Operating Mode"] -pub type XtmodeR = crate::FieldReader; -impl XtmodeR { +pub type XTMODE_R = crate::FieldReader; +impl XTMODE_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Xtmode { + pub const fn variant(&self) -> XTMODE_A { match self.bits { - 0 => Xtmode::Value1, - 1 => Xtmode::Value2, - 2 => Xtmode::Value3, - 3 => Xtmode::Value4, + 0 => XTMODE_A::VALUE1, + 1 => XTMODE_A::VALUE2, + 2 => XTMODE_A::VALUE3, + 3 => XTMODE_A::VALUE4, _ => unreachable!(), } } #[doc = "No external trigger"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Xtmode::Value1 + *self == XTMODE_A::VALUE1 } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Xtmode::Value2 + *self == XTMODE_A::VALUE2 } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Xtmode::Value3 + *self == XTMODE_A::VALUE3 } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Xtmode::Value4 + *self == XTMODE_A::VALUE4 } } #[doc = "Field `XTMODE` writer - Trigger Operating Mode"] -pub type XtmodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Xtmode, crate::Safe>; -impl<'a, REG> XtmodeW<'a, REG> +pub type XTMODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, XTMODE_A, crate::Safe>; +impl<'a, REG> XTMODE_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -149,277 +149,277 @@ where #[doc = "No external trigger"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtmode::Value1) + self.variant(XTMODE_A::VALUE1) } #[doc = "Trigger event upon a falling edge"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtmode::Value2) + self.variant(XTMODE_A::VALUE2) } #[doc = "Trigger event upon a rising edge"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Xtmode::Value3) + self.variant(XTMODE_A::VALUE3) } #[doc = "Trigger event upon any edge"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Xtmode::Value4) + self.variant(XTMODE_A::VALUE4) } } #[doc = "Write Control for Trigger Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Xtwc { +pub enum XTWC_A { #[doc = "0: No write access to trigger configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfields XTMODE and XTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Xtwc) -> Self { + fn from(variant: XTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `XTWC` writer - Write Control for Trigger Configuration"] -pub type XtwcW<'a, REG> = crate::BitWriter<'a, REG, Xtwc>; -impl<'a, REG> XtwcW<'a, REG> +pub type XTWC_W<'a, REG> = crate::BitWriter<'a, REG, XTWC_A>; +impl<'a, REG> XTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to trigger configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Xtwc::Value1) + self.variant(XTWC_A::VALUE1) } #[doc = "Bitfields XTMODE and XTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Xtwc::Value2) + self.variant(XTWC_A::VALUE2) } } #[doc = "Field `GTSEL` reader - Gate Input Selection"] -pub type GtselR = crate::FieldReader; +pub type GTSEL_R = crate::FieldReader; #[doc = "Field `GTSEL` writer - Gate Input Selection"] -pub type GtselW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type GTSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Field `GTLVL` reader - Gate Input Level"] -pub type GtlvlR = crate::BitReader; +pub type GTLVL_R = crate::BitReader; #[doc = "Write Control for Gate Configuration\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Gtwc { +pub enum GTWC_A { #[doc = "0: No write access to gate configuration"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield GTSEL can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Gtwc) -> Self { + fn from(variant: GTWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `GTWC` writer - Write Control for Gate Configuration"] -pub type GtwcW<'a, REG> = crate::BitWriter<'a, REG, Gtwc>; -impl<'a, REG> GtwcW<'a, REG> +pub type GTWC_W<'a, REG> = crate::BitWriter<'a, REG, GTWC_A>; +impl<'a, REG> GTWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to gate configuration"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Gtwc::Value1) + self.variant(GTWC_A::VALUE1) } #[doc = "Bitfield GTSEL can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Gtwc::Value2) + self.variant(GTWC_A::VALUE2) } } #[doc = "Timer Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tmen { +pub enum TMEN_A { #[doc = "0: No timer mode: standard gating mechanism can be used"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tmen) -> Self { + fn from(variant: TMEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TMEN` reader - Timer Mode Enable"] -pub type TmenR = crate::BitReader; -impl TmenR { +pub type TMEN_R = crate::BitReader; +impl TMEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Tmen { + pub const fn variant(&self) -> TMEN_A { match self.bits { - false => Tmen::Value1, - true => Tmen::Value2, + false => TMEN_A::VALUE1, + true => TMEN_A::VALUE2, } } #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Tmen::Value1 + *self == TMEN_A::VALUE1 } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Tmen::Value2 + *self == TMEN_A::VALUE2 } } #[doc = "Field `TMEN` writer - Timer Mode Enable"] -pub type TmenW<'a, REG> = crate::BitWriter<'a, REG, Tmen>; -impl<'a, REG> TmenW<'a, REG> +pub type TMEN_W<'a, REG> = crate::BitWriter<'a, REG, TMEN_A>; +impl<'a, REG> TMEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No timer mode: standard gating mechanism can be used"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tmen::Value1) + self.variant(TMEN_A::VALUE1) } #[doc = "Timer mode for equidistant sampling enabled: standard gating mechanism must be disabled"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tmen::Value2) + self.variant(TMEN_A::VALUE2) } } #[doc = "Write Control for Timer Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Tmwc { +pub enum TMWC_A { #[doc = "0: No write access to timer mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield TMEN can be written"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Tmwc) -> Self { + fn from(variant: TMWC_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TMWC` writer - Write Control for Timer Mode"] -pub type TmwcW<'a, REG> = crate::BitWriter<'a, REG, Tmwc>; -impl<'a, REG> TmwcW<'a, REG> +pub type TMWC_W<'a, REG> = crate::BitWriter<'a, REG, TMWC_A>; +impl<'a, REG> TMWC_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No write access to timer mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Tmwc::Value1) + self.variant(TMWC_A::VALUE1) } #[doc = "Bitfield TMEN can be written"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Tmwc::Value2) + self.variant(TMWC_A::VALUE2) } } impl R { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - pub fn srcresreg(&self) -> SrcresregR { - SrcresregR::new((self.bits & 0x0f) as u8) + pub fn srcresreg(&self) -> SRCRESREG_R { + SRCRESREG_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - pub fn xtsel(&self) -> XtselR { - XtselR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn xtsel(&self) -> XTSEL_R { + XTSEL_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - External Trigger Level"] #[inline(always)] - pub fn xtlvl(&self) -> XtlvlR { - XtlvlR::new(((self.bits >> 12) & 1) != 0) + pub fn xtlvl(&self) -> XTLVL_R { + XTLVL_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - pub fn xtmode(&self) -> XtmodeR { - XtmodeR::new(((self.bits >> 13) & 3) as u8) + pub fn xtmode(&self) -> XTMODE_R { + XTMODE_R::new(((self.bits >> 13) & 3) as u8) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - pub fn gtsel(&self) -> GtselR { - GtselR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn gtsel(&self) -> GTSEL_R { + GTSEL_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 20 - Gate Input Level"] #[inline(always)] - pub fn gtlvl(&self) -> GtlvlR { - GtlvlR::new(((self.bits >> 20) & 1) != 0) + pub fn gtlvl(&self) -> GTLVL_R { + GTLVL_R::new(((self.bits >> 20) & 1) != 0) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - pub fn tmen(&self) -> TmenR { - TmenR::new(((self.bits >> 28) & 1) != 0) + pub fn tmen(&self) -> TMEN_R { + TMEN_R::new(((self.bits >> 28) & 1) != 0) } } impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] #[must_use] - pub fn srcresreg(&mut self) -> SrcresregW { - SrcresregW::new(self, 0) + pub fn srcresreg(&mut self) -> SRCRESREG_W { + SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] #[must_use] - pub fn xtsel(&mut self) -> XtselW { - XtselW::new(self, 8) + pub fn xtsel(&mut self) -> XTSEL_W { + XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] #[must_use] - pub fn xtmode(&mut self) -> XtmodeW { - XtmodeW::new(self, 13) + pub fn xtmode(&mut self) -> XTMODE_W { + XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] #[must_use] - pub fn xtwc(&mut self) -> XtwcW { - XtwcW::new(self, 15) + pub fn xtwc(&mut self) -> XTWC_W { + XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] #[must_use] - pub fn gtsel(&mut self) -> GtselW { - GtselW::new(self, 16) + pub fn gtsel(&mut self) -> GTSEL_W { + GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] #[must_use] - pub fn gtwc(&mut self) -> GtwcW { - GtwcW::new(self, 23) + pub fn gtwc(&mut self) -> GTWC_W { + GTWC_W::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] #[must_use] - pub fn tmen(&mut self) -> TmenW { - TmenW::new(self, 28) + pub fn tmen(&mut self) -> TMEN_W { + TMEN_W::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] #[must_use] - pub fn tmwc(&mut self) -> TmwcW { - TmwcW::new(self, 31) + pub fn tmwc(&mut self) -> TMWC_W { + TMWC_W::new(self, 31) } } #[doc = "Queue 0 Source Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Qctrl0Spec; -impl crate::RegisterSpec for Qctrl0Spec { +pub struct QCTRL0_SPEC; +impl crate::RegisterSpec for QCTRL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`qctrl0::R`](R) reader structure"] -impl crate::Readable for Qctrl0Spec {} +impl crate::Readable for QCTRL0_SPEC {} #[doc = "`write(|w| ..)` method takes [`qctrl0::W`](W) writer structure"] -impl crate::Writable for Qctrl0Spec { +impl crate::Writable for QCTRL0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QCTRL0 to value 0"] -impl crate::Resettable for Qctrl0Spec { +impl crate::Resettable for QCTRL0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qinr0.rs b/src/vadc_g0/qinr0.rs index 52791e2b..09f58f99 100644 --- a/src/vadc_g0/qinr0.rs +++ b/src/vadc_g0/qinr0.rs @@ -1,138 +1,138 @@ #[doc = "Register `QINR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `REQCHNR` writer - Request Channel Number"] -pub type ReqchnrW<'a, REG> = crate::FieldWriter<'a, REG, 5>; +pub type REQCHNR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>; #[doc = "Refill\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rf { +pub enum RF_A { #[doc = "0: No refill: this queue entry is converted once and then invalidated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rf) -> Self { + fn from(variant: RF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RF` writer - Refill"] -pub type RfW<'a, REG> = crate::BitWriter<'a, REG, Rf>; -impl<'a, REG> RfW<'a, REG> +pub type RF_W<'a, REG> = crate::BitWriter<'a, REG, RF_A>; +impl<'a, REG> RF_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No refill: this queue entry is converted once and then invalidated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rf::Value1) + self.variant(RF_A::VALUE1) } #[doc = "Automatic refill: this queue entry is automatically reloaded into QINRx when the related conversion is started"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rf::Value2) + self.variant(RF_A::VALUE2) } } #[doc = "Enable Source Interrupt\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ensi { +pub enum ENSI_A { #[doc = "0: No request source interrupt"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A request source event interrupt is generated upon a request source event (related conversion is finished)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ensi) -> Self { + fn from(variant: ENSI_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENSI` writer - Enable Source Interrupt"] -pub type EnsiW<'a, REG> = crate::BitWriter<'a, REG, Ensi>; -impl<'a, REG> EnsiW<'a, REG> +pub type ENSI_W<'a, REG> = crate::BitWriter<'a, REG, ENSI_A>; +impl<'a, REG> ENSI_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No request source interrupt"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Ensi::Value1) + self.variant(ENSI_A::VALUE1) } #[doc = "A request source event interrupt is generated upon a request source event (related conversion is finished)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Ensi::Value2) + self.variant(ENSI_A::VALUE2) } } #[doc = "External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Extr { +pub enum EXTR_A { #[doc = "0: A valid queue entry immediately leads to a conversion request."] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A valid queue entry waits for a trigger event to occur before issuing a conversion request."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Extr) -> Self { + fn from(variant: EXTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EXTR` writer - External Trigger"] -pub type ExtrW<'a, REG> = crate::BitWriter<'a, REG, Extr>; -impl<'a, REG> ExtrW<'a, REG> +pub type EXTR_W<'a, REG> = crate::BitWriter<'a, REG, EXTR_A>; +impl<'a, REG> EXTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A valid queue entry immediately leads to a conversion request."] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Extr::Value1) + self.variant(EXTR_A::VALUE1) } #[doc = "A valid queue entry waits for a trigger event to occur before issuing a conversion request."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Extr::Value2) + self.variant(EXTR_A::VALUE2) } } impl W { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] #[must_use] - pub fn reqchnr(&mut self) -> ReqchnrW { - ReqchnrW::new(self, 0) + pub fn reqchnr(&mut self) -> REQCHNR_W { + REQCHNR_W::new(self, 0) } #[doc = "Bit 5 - Refill"] #[inline(always)] #[must_use] - pub fn rf(&mut self) -> RfW { - RfW::new(self, 5) + pub fn rf(&mut self) -> RF_W { + RF_W::new(self, 5) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] #[must_use] - pub fn ensi(&mut self) -> EnsiW { - EnsiW::new(self, 6) + pub fn ensi(&mut self) -> ENSI_W { + ENSI_W::new(self, 6) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] #[must_use] - pub fn extr(&mut self) -> ExtrW { - ExtrW::new(self, 7) + pub fn extr(&mut self) -> EXTR_W { + EXTR_W::new(self, 7) } } #[doc = "Queue 0 Input Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qinr0::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Qinr0Spec; -impl crate::RegisterSpec for Qinr0Spec { +pub struct QINR0_SPEC; +impl crate::RegisterSpec for QINR0_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`qinr0::W`](W) writer structure"] -impl crate::Writable for Qinr0Spec { +impl crate::Writable for QINR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QINR0 to value 0"] -impl crate::Resettable for Qinr0Spec { +impl crate::Resettable for QINR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qmr0.rs b/src/vadc_g0/qmr0.rs index c113986f..b0217d66 100644 --- a/src/vadc_g0/qmr0.rs +++ b/src/vadc_g0/qmr0.rs @@ -1,68 +1,68 @@ #[doc = "Register `QMR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `QMR0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Enable Gate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Engt { +pub enum ENGT_A { #[doc = "0: No conversion requests are issued"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Engt) -> Self { + fn from(variant: ENGT_A) -> Self { variant as _ } } -impl crate::FieldSpec for Engt { +impl crate::FieldSpec for ENGT_A { type Ux = u8; } -impl crate::IsEnum for Engt {} +impl crate::IsEnum for ENGT_A {} #[doc = "Field `ENGT` reader - Enable Gate"] -pub type EngtR = crate::FieldReader; -impl EngtR { +pub type ENGT_R = crate::FieldReader; +impl ENGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Engt { + pub const fn variant(&self) -> ENGT_A { match self.bits { - 0 => Engt::Value1, - 1 => Engt::Value2, - 2 => Engt::Value3, - 3 => Engt::Value4, + 0 => ENGT_A::VALUE1, + 1 => ENGT_A::VALUE2, + 2 => ENGT_A::VALUE3, + 3 => ENGT_A::VALUE4, _ => unreachable!(), } } #[doc = "No conversion requests are issued"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Engt::Value1 + *self == ENGT_A::VALUE1 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Engt::Value2 + *self == ENGT_A::VALUE2 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Engt::Value3 + *self == ENGT_A::VALUE3 } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Engt::Value4 + *self == ENGT_A::VALUE4 } } #[doc = "Field `ENGT` writer - Enable Gate"] -pub type EngtW<'a, REG> = crate::FieldWriter<'a, REG, 2, Engt, crate::Safe>; -impl<'a, REG> EngtW<'a, REG> +pub type ENGT_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ENGT_A, crate::Safe>; +impl<'a, REG> ENGT_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,329 +70,329 @@ where #[doc = "No conversion requests are issued"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Engt::Value1) + self.variant(ENGT_A::VALUE1) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Engt::Value2) + self.variant(ENGT_A::VALUE2) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 1"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Engt::Value3) + self.variant(ENGT_A::VALUE3) } #[doc = "Conversion requests are issued if a valid conversion request is pending in the queue 0 register or in the backup register and REQGTx = 0"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Engt::Value4) + self.variant(ENGT_A::VALUE4) } } #[doc = "Enable External Trigger\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Entr { +pub enum ENTR_A { #[doc = "0: External trigger disabled"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The selected edge at the selected trigger input signal REQTR generates the trigger event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Entr) -> Self { + fn from(variant: ENTR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ENTR` reader - Enable External Trigger"] -pub type EntrR = crate::BitReader; -impl EntrR { +pub type ENTR_R = crate::BitReader; +impl ENTR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Entr { + pub const fn variant(&self) -> ENTR_A { match self.bits { - false => Entr::Value1, - true => Entr::Value2, + false => ENTR_A::VALUE1, + true => ENTR_A::VALUE2, } } #[doc = "External trigger disabled"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Entr::Value1 + *self == ENTR_A::VALUE1 } #[doc = "The selected edge at the selected trigger input signal REQTR generates the trigger event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Entr::Value2 + *self == ENTR_A::VALUE2 } } #[doc = "Field `ENTR` writer - Enable External Trigger"] -pub type EntrW<'a, REG> = crate::BitWriter<'a, REG, Entr>; -impl<'a, REG> EntrW<'a, REG> +pub type ENTR_W<'a, REG> = crate::BitWriter<'a, REG, ENTR_A>; +impl<'a, REG> ENTR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "External trigger disabled"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Entr::Value1) + self.variant(ENTR_A::VALUE1) } #[doc = "The selected edge at the selected trigger input signal REQTR generates the trigger event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Entr::Value2) + self.variant(ENTR_A::VALUE2) } } #[doc = "Clear Valid Bit\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Clrv { +pub enum CLRV_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Clrv) -> Self { + fn from(variant: CLRV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CLRV` writer - Clear Valid Bit"] -pub type ClrvW<'a, REG> = crate::BitWriter<'a, REG, Clrv>; -impl<'a, REG> ClrvW<'a, REG> +pub type CLRV_W<'a, REG> = crate::BitWriter<'a, REG, CLRV_A>; +impl<'a, REG> CLRV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Clrv::Value1) + self.variant(CLRV_A::VALUE1) } #[doc = "The next pending valid queue entry in the sequence and the event flag EV are cleared. If there is a valid entry in the queue backup register (QBUR.V = 1), this entry is cleared, otherwise the entry in queue register 0 is cleared."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Clrv::Value2) + self.variant(CLRV_A::VALUE2) } } #[doc = "Trigger Event\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Trev { +pub enum TREV_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Generate a trigger event by software"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Trev) -> Self { + fn from(variant: TREV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `TREV` writer - Trigger Event"] -pub type TrevW<'a, REG> = crate::BitWriter<'a, REG, Trev>; -impl<'a, REG> TrevW<'a, REG> +pub type TREV_W<'a, REG> = crate::BitWriter<'a, REG, TREV_A>; +impl<'a, REG> TREV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Trev::Value1) + self.variant(TREV_A::VALUE1) } #[doc = "Generate a trigger event by software"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Trev::Value2) + self.variant(TREV_A::VALUE2) } } #[doc = "Flush Queue\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Flush { +pub enum FLUSH_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry."] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Flush) -> Self { + fn from(variant: FLUSH_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FLUSH` writer - Flush Queue"] -pub type FlushW<'a, REG> = crate::BitWriter<'a, REG, Flush>; -impl<'a, REG> FlushW<'a, REG> +pub type FLUSH_W<'a, REG> = crate::BitWriter<'a, REG, FLUSH_A>; +impl<'a, REG> FLUSH_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Flush::Value1) + self.variant(FLUSH_A::VALUE1) } #[doc = "Clear all queue entries (including backup stage) and the event flag EV. The queue contains no more valid entry."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Flush::Value2) + self.variant(FLUSH_A::VALUE2) } } #[doc = "Clear Event Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Cev { +pub enum CEV_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear bit EV"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Cev) -> Self { + fn from(variant: CEV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `CEV` writer - Clear Event Flag"] -pub type CevW<'a, REG> = crate::BitWriter<'a, REG, Cev>; -impl<'a, REG> CevW<'a, REG> +pub type CEV_W<'a, REG> = crate::BitWriter<'a, REG, CEV_A>; +impl<'a, REG> CEV_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Cev::Value1) + self.variant(CEV_A::VALUE1) } #[doc = "Clear bit EV"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Cev::Value2) + self.variant(CEV_A::VALUE2) } } #[doc = "Repeat Disable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rptdis { +pub enum RPTDIS_A { #[doc = "0: A cancelled conversion is repeated"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A cancelled conversion is discarded"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rptdis) -> Self { + fn from(variant: RPTDIS_A) -> Self { variant as u8 != 0 } } #[doc = "Field `RPTDIS` reader - Repeat Disable"] -pub type RptdisR = crate::BitReader; -impl RptdisR { +pub type RPTDIS_R = crate::BitReader; +impl RPTDIS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rptdis { + pub const fn variant(&self) -> RPTDIS_A { match self.bits { - false => Rptdis::Value1, - true => Rptdis::Value2, + false => RPTDIS_A::VALUE1, + true => RPTDIS_A::VALUE2, } } #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rptdis::Value1 + *self == RPTDIS_A::VALUE1 } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rptdis::Value2 + *self == RPTDIS_A::VALUE2 } } #[doc = "Field `RPTDIS` writer - Repeat Disable"] -pub type RptdisW<'a, REG> = crate::BitWriter<'a, REG, Rptdis>; -impl<'a, REG> RptdisW<'a, REG> +pub type RPTDIS_W<'a, REG> = crate::BitWriter<'a, REG, RPTDIS_A>; +impl<'a, REG> RPTDIS_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "A cancelled conversion is repeated"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rptdis::Value1) + self.variant(RPTDIS_A::VALUE1) } #[doc = "A cancelled conversion is discarded"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rptdis::Value2) + self.variant(RPTDIS_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - pub fn engt(&self) -> EngtR { - EngtR::new((self.bits & 3) as u8) + pub fn engt(&self) -> ENGT_R { + ENGT_R::new((self.bits & 3) as u8) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - pub fn entr(&self) -> EntrR { - EntrR::new(((self.bits >> 2) & 1) != 0) + pub fn entr(&self) -> ENTR_R { + ENTR_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - pub fn rptdis(&self) -> RptdisR { - RptdisR::new(((self.bits >> 16) & 1) != 0) + pub fn rptdis(&self) -> RPTDIS_R { + RPTDIS_R::new(((self.bits >> 16) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] #[must_use] - pub fn engt(&mut self) -> EngtW { - EngtW::new(self, 0) + pub fn engt(&mut self) -> ENGT_W { + ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] #[must_use] - pub fn entr(&mut self) -> EntrW { - EntrW::new(self, 2) + pub fn entr(&mut self) -> ENTR_W { + ENTR_W::new(self, 2) } #[doc = "Bit 8 - Clear Valid Bit"] #[inline(always)] #[must_use] - pub fn clrv(&mut self) -> ClrvW { - ClrvW::new(self, 8) + pub fn clrv(&mut self) -> CLRV_W { + CLRV_W::new(self, 8) } #[doc = "Bit 9 - Trigger Event"] #[inline(always)] #[must_use] - pub fn trev(&mut self) -> TrevW { - TrevW::new(self, 9) + pub fn trev(&mut self) -> TREV_W { + TREV_W::new(self, 9) } #[doc = "Bit 10 - Flush Queue"] #[inline(always)] #[must_use] - pub fn flush(&mut self) -> FlushW { - FlushW::new(self, 10) + pub fn flush(&mut self) -> FLUSH_W { + FLUSH_W::new(self, 10) } #[doc = "Bit 11 - Clear Event Flag"] #[inline(always)] #[must_use] - pub fn cev(&mut self) -> CevW { - CevW::new(self, 11) + pub fn cev(&mut self) -> CEV_W { + CEV_W::new(self, 11) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] #[must_use] - pub fn rptdis(&mut self) -> RptdisW { - RptdisW::new(self, 16) + pub fn rptdis(&mut self) -> RPTDIS_W { + RPTDIS_W::new(self, 16) } } #[doc = "Queue 0 Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qmr0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`qmr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Qmr0Spec; -impl crate::RegisterSpec for Qmr0Spec { +pub struct QMR0_SPEC; +impl crate::RegisterSpec for QMR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`qmr0::R`](R) reader structure"] -impl crate::Readable for Qmr0Spec {} +impl crate::Readable for QMR0_SPEC {} #[doc = "`write(|w| ..)` method takes [`qmr0::W`](W) writer structure"] -impl crate::Writable for Qmr0Spec { +impl crate::Writable for QMR0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets QMR0 to value 0"] -impl crate::Resettable for Qmr0Spec { +impl crate::Resettable for QMR0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/qsr0.rs b/src/vadc_g0/qsr0.rs index c1952b91..09257d8f 100644 --- a/src/vadc_g0/qsr0.rs +++ b/src/vadc_g0/qsr0.rs @@ -1,201 +1,201 @@ #[doc = "Register `QSR0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Filling Level for Queue 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Fill { +pub enum FILL_A { #[doc = "0: There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: There are 2 valid entries in the queue"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: There are 3 valid entries in the queue"] - Value3 = 2, + VALUE3 = 2, #[doc = "7: There are 8 valid entries in the queue"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Fill) -> Self { + fn from(variant: FILL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Fill { +impl crate::FieldSpec for FILL_A { type Ux = u8; } -impl crate::IsEnum for Fill {} +impl crate::IsEnum for FILL_A {} #[doc = "Field `FILL` reader - Filling Level for Queue 2"] -pub type FillR = crate::FieldReader; -impl FillR { +pub type FILL_R = crate::FieldReader; +impl FILL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Fill::Value1), - 1 => Some(Fill::Value2), - 2 => Some(Fill::Value3), - 7 => Some(Fill::Value4), + 0 => Some(FILL_A::VALUE1), + 1 => Some(FILL_A::VALUE2), + 2 => Some(FILL_A::VALUE3), + 7 => Some(FILL_A::VALUE4), _ => None, } } #[doc = "There is 1 ( if EMPTY = 0) or no (if EMPTY = 1) valid entry in the queue"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fill::Value1 + *self == FILL_A::VALUE1 } #[doc = "There are 2 valid entries in the queue"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fill::Value2 + *self == FILL_A::VALUE2 } #[doc = "There are 3 valid entries in the queue"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Fill::Value3 + *self == FILL_A::VALUE3 } #[doc = "There are 8 valid entries in the queue"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Fill::Value4 + *self == FILL_A::VALUE4 } } #[doc = "Queue Empty\n\nValue on reset: 1"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Empty { +pub enum EMPTY_A { #[doc = "0: There are valid entries in the queue (see FILL)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: No valid entries (queue is empty)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Empty) -> Self { + fn from(variant: EMPTY_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EMPTY` reader - Queue Empty"] -pub type EmptyR = crate::BitReader; -impl EmptyR { +pub type EMPTY_R = crate::BitReader; +impl EMPTY_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Empty { + pub const fn variant(&self) -> EMPTY_A { match self.bits { - false => Empty::Value1, - true => Empty::Value2, + false => EMPTY_A::VALUE1, + true => EMPTY_A::VALUE2, } } #[doc = "There are valid entries in the queue (see FILL)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Empty::Value1 + *self == EMPTY_A::VALUE1 } #[doc = "No valid entries (queue is empty)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Empty::Value2 + *self == EMPTY_A::VALUE2 } } #[doc = "Request Gate Level\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Reqgt { +pub enum REQGT_A { #[doc = "0: The gate input is low"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: The gate input is high"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Reqgt) -> Self { + fn from(variant: REQGT_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REQGT` reader - Request Gate Level"] -pub type ReqgtR = crate::BitReader; -impl ReqgtR { +pub type REQGT_R = crate::BitReader; +impl REQGT_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Reqgt { + pub const fn variant(&self) -> REQGT_A { match self.bits { - false => Reqgt::Value1, - true => Reqgt::Value2, + false => REQGT_A::VALUE1, + true => REQGT_A::VALUE2, } } #[doc = "The gate input is low"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Reqgt::Value1 + *self == REQGT_A::VALUE1 } #[doc = "The gate input is high"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Reqgt::Value2 + *self == REQGT_A::VALUE2 } } #[doc = "Event Detected\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Ev { +pub enum EV_A { #[doc = "0: No trigger event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A trigger event has been detected"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Ev) -> Self { + fn from(variant: EV_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EV` reader - Event Detected"] -pub type EvR = crate::BitReader; -impl EvR { +pub type EV_R = crate::BitReader; +impl EV_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Ev { + pub const fn variant(&self) -> EV_A { match self.bits { - false => Ev::Value1, - true => Ev::Value2, + false => EV_A::VALUE1, + true => EV_A::VALUE2, } } #[doc = "No trigger event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Ev::Value1 + *self == EV_A::VALUE1 } #[doc = "A trigger event has been detected"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Ev::Value2 + *self == EV_A::VALUE2 } } impl R { #[doc = "Bits 0:3 - Filling Level for Queue 2"] #[inline(always)] - pub fn fill(&self) -> FillR { - FillR::new((self.bits & 0x0f) as u8) + pub fn fill(&self) -> FILL_R { + FILL_R::new((self.bits & 0x0f) as u8) } #[doc = "Bit 5 - Queue Empty"] #[inline(always)] - pub fn empty(&self) -> EmptyR { - EmptyR::new(((self.bits >> 5) & 1) != 0) + pub fn empty(&self) -> EMPTY_R { + EMPTY_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 7 - Request Gate Level"] #[inline(always)] - pub fn reqgt(&self) -> ReqgtR { - ReqgtR::new(((self.bits >> 7) & 1) != 0) + pub fn reqgt(&self) -> REQGT_R { + REQGT_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Event Detected"] #[inline(always)] - pub fn ev(&self) -> EvR { - EvR::new(((self.bits >> 8) & 1) != 0) + pub fn ev(&self) -> EV_R { + EV_R::new(((self.bits >> 8) & 1) != 0) } } #[doc = "Queue 0 Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`qsr0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Qsr0Spec; -impl crate::RegisterSpec for Qsr0Spec { +pub struct QSR0_SPEC; +impl crate::RegisterSpec for QSR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`qsr0::R`](R) reader structure"] -impl crate::Readable for Qsr0Spec {} +impl crate::Readable for QSR0_SPEC {} #[doc = "`reset()` method sets QSR0 to value 0x20"] -impl crate::Resettable for Qsr0Spec { +impl crate::Resettable for QSR0_SPEC { const RESET_VALUE: u32 = 0x20; } diff --git a/src/vadc_g0/rcr.rs b/src/vadc_g0/rcr.rs index 143b1383..0203d217 100644 --- a/src/vadc_g0/rcr.rs +++ b/src/vadc_g0/rcr.rs @@ -1,64 +1,64 @@ #[doc = "Register `RCR[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RCR[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `DRCTR` reader - Data Reduction Control"] -pub type DrctrR = crate::FieldReader; +pub type DRCTR_R = crate::FieldReader; #[doc = "Field `DRCTR` writer - Data Reduction Control"] -pub type DrctrW<'a, REG> = crate::FieldWriter<'a, REG, 4>; +pub type DRCTR_W<'a, REG> = crate::FieldWriter<'a, REG, 4>; #[doc = "Data Modification Mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Dmm { +pub enum DMM_A { #[doc = "0: Standard data reduction (accumulation)"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Result filtering mode"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Difference mode"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Dmm) -> Self { + fn from(variant: DMM_A) -> Self { variant as _ } } -impl crate::FieldSpec for Dmm { +impl crate::FieldSpec for DMM_A { type Ux = u8; } -impl crate::IsEnum for Dmm {} +impl crate::IsEnum for DMM_A {} #[doc = "Field `DMM` reader - Data Modification Mode"] -pub type DmmR = crate::FieldReader; -impl DmmR { +pub type DMM_R = crate::FieldReader; +impl DMM_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Dmm::Value1), - 1 => Some(Dmm::Value2), - 2 => Some(Dmm::Value3), + 0 => Some(DMM_A::VALUE1), + 1 => Some(DMM_A::VALUE2), + 2 => Some(DMM_A::VALUE3), _ => None, } } #[doc = "Standard data reduction (accumulation)"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Dmm::Value1 + *self == DMM_A::VALUE1 } #[doc = "Result filtering mode"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Dmm::Value2 + *self == DMM_A::VALUE2 } #[doc = "Difference mode"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Dmm::Value3 + *self == DMM_A::VALUE3 } } #[doc = "Field `DMM` writer - Data Modification Mode"] -pub type DmmW<'a, REG> = crate::FieldWriter<'a, REG, 2, Dmm>; -impl<'a, REG> DmmW<'a, REG> +pub type DMM_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DMM_A>; +impl<'a, REG> DMM_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -66,117 +66,117 @@ where #[doc = "Standard data reduction (accumulation)"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Dmm::Value1) + self.variant(DMM_A::VALUE1) } #[doc = "Result filtering mode"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Dmm::Value2) + self.variant(DMM_A::VALUE2) } #[doc = "Difference mode"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Dmm::Value3) + self.variant(DMM_A::VALUE3) } } #[doc = "Wait-for-Read Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Wfr { +pub enum WFR_A { #[doc = "0: Overwrite mode"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Wait-for-read mode enabled for this register"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Wfr) -> Self { + fn from(variant: WFR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `WFR` reader - Wait-for-Read Mode Enable"] -pub type WfrR = crate::BitReader; -impl WfrR { +pub type WFR_R = crate::BitReader; +impl WFR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Wfr { + pub const fn variant(&self) -> WFR_A { match self.bits { - false => Wfr::Value1, - true => Wfr::Value2, + false => WFR_A::VALUE1, + true => WFR_A::VALUE2, } } #[doc = "Overwrite mode"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Wfr::Value1 + *self == WFR_A::VALUE1 } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Wfr::Value2 + *self == WFR_A::VALUE2 } } #[doc = "Field `WFR` writer - Wait-for-Read Mode Enable"] -pub type WfrW<'a, REG> = crate::BitWriter<'a, REG, Wfr>; -impl<'a, REG> WfrW<'a, REG> +pub type WFR_W<'a, REG> = crate::BitWriter<'a, REG, WFR_A>; +impl<'a, REG> WFR_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Overwrite mode"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Wfr::Value1) + self.variant(WFR_A::VALUE1) } #[doc = "Wait-for-read mode enabled for this register"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Wfr::Value2) + self.variant(WFR_A::VALUE2) } } #[doc = "FIFO Mode Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Fen { +pub enum FEN_A { #[doc = "0: Separate result register"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Part of a FIFO structure: copy each new valid result"] - Value2 = 1, + VALUE2 = 1, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Fen) -> Self { + fn from(variant: FEN_A) -> Self { variant as _ } } -impl crate::FieldSpec for Fen { +impl crate::FieldSpec for FEN_A { type Ux = u8; } -impl crate::IsEnum for Fen {} +impl crate::IsEnum for FEN_A {} #[doc = "Field `FEN` reader - FIFO Mode Enable"] -pub type FenR = crate::FieldReader; -impl FenR { +pub type FEN_R = crate::FieldReader; +impl FEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Fen::Value1), - 1 => Some(Fen::Value2), + 0 => Some(FEN_A::VALUE1), + 1 => Some(FEN_A::VALUE2), _ => None, } } #[doc = "Separate result register"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fen::Value1 + *self == FEN_A::VALUE1 } #[doc = "Part of a FIFO structure: copy each new valid result"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fen::Value2 + *self == FEN_A::VALUE2 } } #[doc = "Field `FEN` writer - FIFO Mode Enable"] -pub type FenW<'a, REG> = crate::FieldWriter<'a, REG, 2, Fen>; -impl<'a, REG> FenW<'a, REG> +pub type FEN_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FEN_A>; +impl<'a, REG> FEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -184,141 +184,141 @@ where #[doc = "Separate result register"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Fen::Value1) + self.variant(FEN_A::VALUE1) } #[doc = "Part of a FIFO structure: copy each new valid result"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Fen::Value2) + self.variant(FEN_A::VALUE2) } } #[doc = "Service Request Generation Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Srgen { +pub enum SRGEN_A { #[doc = "0: No service request"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Service request after a result event"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Srgen) -> Self { + fn from(variant: SRGEN_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SRGEN` reader - Service Request Generation Enable"] -pub type SrgenR = crate::BitReader; -impl SrgenR { +pub type SRGEN_R = crate::BitReader; +impl SRGEN_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Srgen { + pub const fn variant(&self) -> SRGEN_A { match self.bits { - false => Srgen::Value1, - true => Srgen::Value2, + false => SRGEN_A::VALUE1, + true => SRGEN_A::VALUE2, } } #[doc = "No service request"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Srgen::Value1 + *self == SRGEN_A::VALUE1 } #[doc = "Service request after a result event"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Srgen::Value2 + *self == SRGEN_A::VALUE2 } } #[doc = "Field `SRGEN` writer - Service Request Generation Enable"] -pub type SrgenW<'a, REG> = crate::BitWriter<'a, REG, Srgen>; -impl<'a, REG> SrgenW<'a, REG> +pub type SRGEN_W<'a, REG> = crate::BitWriter<'a, REG, SRGEN_A>; +impl<'a, REG> SRGEN_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No service request"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Srgen::Value1) + self.variant(SRGEN_A::VALUE1) } #[doc = "Service request after a result event"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Srgen::Value2) + self.variant(SRGEN_A::VALUE2) } } impl R { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - pub fn drctr(&self) -> DrctrR { - DrctrR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drctr(&self) -> DRCTR_R { + DRCTR_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:21 - Data Modification Mode"] #[inline(always)] - pub fn dmm(&self) -> DmmR { - DmmR::new(((self.bits >> 20) & 3) as u8) + pub fn dmm(&self) -> DMM_R { + DMM_R::new(((self.bits >> 20) & 3) as u8) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - pub fn wfr(&self) -> WfrR { - WfrR::new(((self.bits >> 24) & 1) != 0) + pub fn wfr(&self) -> WFR_R { + WFR_R::new(((self.bits >> 24) & 1) != 0) } #[doc = "Bits 25:26 - FIFO Mode Enable"] #[inline(always)] - pub fn fen(&self) -> FenR { - FenR::new(((self.bits >> 25) & 3) as u8) + pub fn fen(&self) -> FEN_R { + FEN_R::new(((self.bits >> 25) & 3) as u8) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - pub fn srgen(&self) -> SrgenR { - SrgenR::new(((self.bits >> 31) & 1) != 0) + pub fn srgen(&self) -> SRGEN_R { + SRGEN_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] #[must_use] - pub fn drctr(&mut self) -> DrctrW { - DrctrW::new(self, 16) + pub fn drctr(&mut self) -> DRCTR_W { + DRCTR_W::new(self, 16) } #[doc = "Bits 20:21 - Data Modification Mode"] #[inline(always)] #[must_use] - pub fn dmm(&mut self) -> DmmW { - DmmW::new(self, 20) + pub fn dmm(&mut self) -> DMM_W { + DMM_W::new(self, 20) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] #[must_use] - pub fn wfr(&mut self) -> WfrW { - WfrW::new(self, 24) + pub fn wfr(&mut self) -> WFR_W { + WFR_W::new(self, 24) } #[doc = "Bits 25:26 - FIFO Mode Enable"] #[inline(always)] #[must_use] - pub fn fen(&mut self) -> FenW { - FenW::new(self, 25) + pub fn fen(&mut self) -> FEN_W { + FEN_W::new(self, 25) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] #[must_use] - pub fn srgen(&mut self) -> SrgenW { - SrgenW::new(self, 31) + pub fn srgen(&mut self) -> SRGEN_W { + SRGEN_W::new(self, 31) } } #[doc = "Result Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rcr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rcr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RcrSpec; -impl crate::RegisterSpec for RcrSpec { +pub struct RCR_SPEC; +impl crate::RegisterSpec for RCR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`rcr::R`](R) reader structure"] -impl crate::Readable for RcrSpec {} +impl crate::Readable for RCR_SPEC {} #[doc = "`write(|w| ..)` method takes [`rcr::W`](W) writer structure"] -impl crate::Writable for RcrSpec { +impl crate::Writable for RCR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RCR[%s] to value 0"] -impl crate::Resettable for RcrSpec { +impl crate::Resettable for RCR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/refclr.rs b/src/vadc_g0/refclr.rs index c416a7ad..5687ad2e 100644 --- a/src/vadc_g0/refclr.rs +++ b/src/vadc_g0/refclr.rs @@ -1,611 +1,611 @@ #[doc = "Register `REFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Result Event for Result Register 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev0 { +pub enum REV0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev0) -> Self { + fn from(variant: REV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV0` writer - Clear Result Event for Result Register 0"] -pub type Rev0W<'a, REG> = crate::BitWriter<'a, REG, Rev0>; -impl<'a, REG> Rev0W<'a, REG> +pub type REV0_W<'a, REG> = crate::BitWriter<'a, REG, REV0_A>; +impl<'a, REG> REV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev0::Value1) + self.variant(REV0_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev0::Value2) + self.variant(REV0_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev1 { +pub enum REV1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev1) -> Self { + fn from(variant: REV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV1` writer - Clear Result Event for Result Register 1"] -pub type Rev1W<'a, REG> = crate::BitWriter<'a, REG, Rev1>; -impl<'a, REG> Rev1W<'a, REG> +pub type REV1_W<'a, REG> = crate::BitWriter<'a, REG, REV1_A>; +impl<'a, REG> REV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev1::Value1) + self.variant(REV1_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev1::Value2) + self.variant(REV1_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev2 { +pub enum REV2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev2) -> Self { + fn from(variant: REV2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV2` writer - Clear Result Event for Result Register 2"] -pub type Rev2W<'a, REG> = crate::BitWriter<'a, REG, Rev2>; -impl<'a, REG> Rev2W<'a, REG> +pub type REV2_W<'a, REG> = crate::BitWriter<'a, REG, REV2_A>; +impl<'a, REG> REV2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev2::Value1) + self.variant(REV2_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev2::Value2) + self.variant(REV2_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev3 { +pub enum REV3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev3) -> Self { + fn from(variant: REV3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV3` writer - Clear Result Event for Result Register 3"] -pub type Rev3W<'a, REG> = crate::BitWriter<'a, REG, Rev3>; -impl<'a, REG> Rev3W<'a, REG> +pub type REV3_W<'a, REG> = crate::BitWriter<'a, REG, REV3_A>; +impl<'a, REG> REV3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev3::Value1) + self.variant(REV3_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev3::Value2) + self.variant(REV3_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev4 { +pub enum REV4_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev4) -> Self { + fn from(variant: REV4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV4` writer - Clear Result Event for Result Register 4"] -pub type Rev4W<'a, REG> = crate::BitWriter<'a, REG, Rev4>; -impl<'a, REG> Rev4W<'a, REG> +pub type REV4_W<'a, REG> = crate::BitWriter<'a, REG, REV4_A>; +impl<'a, REG> REV4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev4::Value1) + self.variant(REV4_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev4::Value2) + self.variant(REV4_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev5 { +pub enum REV5_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev5) -> Self { + fn from(variant: REV5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV5` writer - Clear Result Event for Result Register 5"] -pub type Rev5W<'a, REG> = crate::BitWriter<'a, REG, Rev5>; -impl<'a, REG> Rev5W<'a, REG> +pub type REV5_W<'a, REG> = crate::BitWriter<'a, REG, REV5_A>; +impl<'a, REG> REV5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev5::Value1) + self.variant(REV5_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev5::Value2) + self.variant(REV5_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev6 { +pub enum REV6_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev6) -> Self { + fn from(variant: REV6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV6` writer - Clear Result Event for Result Register 6"] -pub type Rev6W<'a, REG> = crate::BitWriter<'a, REG, Rev6>; -impl<'a, REG> Rev6W<'a, REG> +pub type REV6_W<'a, REG> = crate::BitWriter<'a, REG, REV6_A>; +impl<'a, REG> REV6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev6::Value1) + self.variant(REV6_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev6::Value2) + self.variant(REV6_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev7 { +pub enum REV7_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev7) -> Self { + fn from(variant: REV7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV7` writer - Clear Result Event for Result Register 7"] -pub type Rev7W<'a, REG> = crate::BitWriter<'a, REG, Rev7>; -impl<'a, REG> Rev7W<'a, REG> +pub type REV7_W<'a, REG> = crate::BitWriter<'a, REG, REV7_A>; +impl<'a, REG> REV7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev7::Value1) + self.variant(REV7_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev7::Value2) + self.variant(REV7_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev8 { +pub enum REV8_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev8) -> Self { + fn from(variant: REV8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV8` writer - Clear Result Event for Result Register 8"] -pub type Rev8W<'a, REG> = crate::BitWriter<'a, REG, Rev8>; -impl<'a, REG> Rev8W<'a, REG> +pub type REV8_W<'a, REG> = crate::BitWriter<'a, REG, REV8_A>; +impl<'a, REG> REV8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev8::Value1) + self.variant(REV8_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev8::Value2) + self.variant(REV8_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev9 { +pub enum REV9_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev9) -> Self { + fn from(variant: REV9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV9` writer - Clear Result Event for Result Register 9"] -pub type Rev9W<'a, REG> = crate::BitWriter<'a, REG, Rev9>; -impl<'a, REG> Rev9W<'a, REG> +pub type REV9_W<'a, REG> = crate::BitWriter<'a, REG, REV9_A>; +impl<'a, REG> REV9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev9::Value1) + self.variant(REV9_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev9::Value2) + self.variant(REV9_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev10 { +pub enum REV10_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev10) -> Self { + fn from(variant: REV10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV10` writer - Clear Result Event for Result Register 10"] -pub type Rev10W<'a, REG> = crate::BitWriter<'a, REG, Rev10>; -impl<'a, REG> Rev10W<'a, REG> +pub type REV10_W<'a, REG> = crate::BitWriter<'a, REG, REV10_A>; +impl<'a, REG> REV10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev10::Value1) + self.variant(REV10_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev10::Value2) + self.variant(REV10_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev11 { +pub enum REV11_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev11) -> Self { + fn from(variant: REV11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV11` writer - Clear Result Event for Result Register 11"] -pub type Rev11W<'a, REG> = crate::BitWriter<'a, REG, Rev11>; -impl<'a, REG> Rev11W<'a, REG> +pub type REV11_W<'a, REG> = crate::BitWriter<'a, REG, REV11_A>; +impl<'a, REG> REV11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev11::Value1) + self.variant(REV11_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev11::Value2) + self.variant(REV11_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev12 { +pub enum REV12_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev12) -> Self { + fn from(variant: REV12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV12` writer - Clear Result Event for Result Register 12"] -pub type Rev12W<'a, REG> = crate::BitWriter<'a, REG, Rev12>; -impl<'a, REG> Rev12W<'a, REG> +pub type REV12_W<'a, REG> = crate::BitWriter<'a, REG, REV12_A>; +impl<'a, REG> REV12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev12::Value1) + self.variant(REV12_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev12::Value2) + self.variant(REV12_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev13 { +pub enum REV13_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev13) -> Self { + fn from(variant: REV13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV13` writer - Clear Result Event for Result Register 13"] -pub type Rev13W<'a, REG> = crate::BitWriter<'a, REG, Rev13>; -impl<'a, REG> Rev13W<'a, REG> +pub type REV13_W<'a, REG> = crate::BitWriter<'a, REG, REV13_A>; +impl<'a, REG> REV13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev13::Value1) + self.variant(REV13_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev13::Value2) + self.variant(REV13_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev14 { +pub enum REV14_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev14) -> Self { + fn from(variant: REV14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV14` writer - Clear Result Event for Result Register 14"] -pub type Rev14W<'a, REG> = crate::BitWriter<'a, REG, Rev14>; -impl<'a, REG> Rev14W<'a, REG> +pub type REV14_W<'a, REG> = crate::BitWriter<'a, REG, REV14_A>; +impl<'a, REG> REV14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev14::Value1) + self.variant(REV14_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev14::Value2) + self.variant(REV14_A::VALUE2) } } #[doc = "Clear Result Event for Result Register 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev15 { +pub enum REV15_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the result event flag in GxREFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev15) -> Self { + fn from(variant: REV15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV15` writer - Clear Result Event for Result Register 15"] -pub type Rev15W<'a, REG> = crate::BitWriter<'a, REG, Rev15>; -impl<'a, REG> Rev15W<'a, REG> +pub type REV15_W<'a, REG> = crate::BitWriter<'a, REG, REV15_A>; +impl<'a, REG> REV15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev15::Value1) + self.variant(REV15_A::VALUE1) } #[doc = "Clear the result event flag in GxREFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev15::Value2) + self.variant(REV15_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Result Event for Result Register 0"] #[inline(always)] #[must_use] - pub fn rev0(&mut self) -> Rev0W { - Rev0W::new(self, 0) + pub fn rev0(&mut self) -> REV0_W { + REV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Result Event for Result Register 1"] #[inline(always)] #[must_use] - pub fn rev1(&mut self) -> Rev1W { - Rev1W::new(self, 1) + pub fn rev1(&mut self) -> REV1_W { + REV1_W::new(self, 1) } #[doc = "Bit 2 - Clear Result Event for Result Register 2"] #[inline(always)] #[must_use] - pub fn rev2(&mut self) -> Rev2W { - Rev2W::new(self, 2) + pub fn rev2(&mut self) -> REV2_W { + REV2_W::new(self, 2) } #[doc = "Bit 3 - Clear Result Event for Result Register 3"] #[inline(always)] #[must_use] - pub fn rev3(&mut self) -> Rev3W { - Rev3W::new(self, 3) + pub fn rev3(&mut self) -> REV3_W { + REV3_W::new(self, 3) } #[doc = "Bit 4 - Clear Result Event for Result Register 4"] #[inline(always)] #[must_use] - pub fn rev4(&mut self) -> Rev4W { - Rev4W::new(self, 4) + pub fn rev4(&mut self) -> REV4_W { + REV4_W::new(self, 4) } #[doc = "Bit 5 - Clear Result Event for Result Register 5"] #[inline(always)] #[must_use] - pub fn rev5(&mut self) -> Rev5W { - Rev5W::new(self, 5) + pub fn rev5(&mut self) -> REV5_W { + REV5_W::new(self, 5) } #[doc = "Bit 6 - Clear Result Event for Result Register 6"] #[inline(always)] #[must_use] - pub fn rev6(&mut self) -> Rev6W { - Rev6W::new(self, 6) + pub fn rev6(&mut self) -> REV6_W { + REV6_W::new(self, 6) } #[doc = "Bit 7 - Clear Result Event for Result Register 7"] #[inline(always)] #[must_use] - pub fn rev7(&mut self) -> Rev7W { - Rev7W::new(self, 7) + pub fn rev7(&mut self) -> REV7_W { + REV7_W::new(self, 7) } #[doc = "Bit 8 - Clear Result Event for Result Register 8"] #[inline(always)] #[must_use] - pub fn rev8(&mut self) -> Rev8W { - Rev8W::new(self, 8) + pub fn rev8(&mut self) -> REV8_W { + REV8_W::new(self, 8) } #[doc = "Bit 9 - Clear Result Event for Result Register 9"] #[inline(always)] #[must_use] - pub fn rev9(&mut self) -> Rev9W { - Rev9W::new(self, 9) + pub fn rev9(&mut self) -> REV9_W { + REV9_W::new(self, 9) } #[doc = "Bit 10 - Clear Result Event for Result Register 10"] #[inline(always)] #[must_use] - pub fn rev10(&mut self) -> Rev10W { - Rev10W::new(self, 10) + pub fn rev10(&mut self) -> REV10_W { + REV10_W::new(self, 10) } #[doc = "Bit 11 - Clear Result Event for Result Register 11"] #[inline(always)] #[must_use] - pub fn rev11(&mut self) -> Rev11W { - Rev11W::new(self, 11) + pub fn rev11(&mut self) -> REV11_W { + REV11_W::new(self, 11) } #[doc = "Bit 12 - Clear Result Event for Result Register 12"] #[inline(always)] #[must_use] - pub fn rev12(&mut self) -> Rev12W { - Rev12W::new(self, 12) + pub fn rev12(&mut self) -> REV12_W { + REV12_W::new(self, 12) } #[doc = "Bit 13 - Clear Result Event for Result Register 13"] #[inline(always)] #[must_use] - pub fn rev13(&mut self) -> Rev13W { - Rev13W::new(self, 13) + pub fn rev13(&mut self) -> REV13_W { + REV13_W::new(self, 13) } #[doc = "Bit 14 - Clear Result Event for Result Register 14"] #[inline(always)] #[must_use] - pub fn rev14(&mut self) -> Rev14W { - Rev14W::new(self, 14) + pub fn rev14(&mut self) -> REV14_W { + REV14_W::new(self, 14) } #[doc = "Bit 15 - Clear Result Event for Result Register 15"] #[inline(always)] #[must_use] - pub fn rev15(&mut self) -> Rev15W { - Rev15W::new(self, 15) + pub fn rev15(&mut self) -> REV15_W { + REV15_W::new(self, 15) } } #[doc = "Result Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct RefclrSpec; -impl crate::RegisterSpec for RefclrSpec { +pub struct REFCLR_SPEC; +impl crate::RegisterSpec for REFCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`refclr::W`](W) writer structure"] -impl crate::Writable for RefclrSpec { +impl crate::Writable for REFCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFCLR to value 0"] -impl crate::Resettable for RefclrSpec { +impl crate::Resettable for REFCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/reflag.rs b/src/vadc_g0/reflag.rs index 6fe24d41..eddab221 100644 --- a/src/vadc_g0/reflag.rs +++ b/src/vadc_g0/reflag.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `REFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REFLAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Result Event for Result Register 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev0 { +pub enum REV0_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev0) -> Self { + fn from(variant: REV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV0` reader - Result Event for Result Register 0"] -pub type Rev0R = crate::BitReader; -impl Rev0R { +pub type REV0_R = crate::BitReader; +impl REV0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev0 { + pub const fn variant(&self) -> REV0_A { match self.bits { - false => Rev0::Value1, - true => Rev0::Value2, + false => REV0_A::VALUE1, + true => REV0_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev0::Value1 + *self == REV0_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev0::Value2 + *self == REV0_A::VALUE2 } } #[doc = "Field `REV0` writer - Result Event for Result Register 0"] -pub type Rev0W<'a, REG> = crate::BitWriter<'a, REG, Rev0>; -impl<'a, REG> Rev0W<'a, REG> +pub type REV0_W<'a, REG> = crate::BitWriter<'a, REG, REV0_A>; +impl<'a, REG> REV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev0::Value1) + self.variant(REV0_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev0::Value2) + self.variant(REV0_A::VALUE2) } } #[doc = "Result Event for Result Register 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev1 { +pub enum REV1_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev1) -> Self { + fn from(variant: REV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV1` reader - Result Event for Result Register 1"] -pub type Rev1R = crate::BitReader; -impl Rev1R { +pub type REV1_R = crate::BitReader; +impl REV1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev1 { + pub const fn variant(&self) -> REV1_A { match self.bits { - false => Rev1::Value1, - true => Rev1::Value2, + false => REV1_A::VALUE1, + true => REV1_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev1::Value1 + *self == REV1_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev1::Value2 + *self == REV1_A::VALUE2 } } #[doc = "Field `REV1` writer - Result Event for Result Register 1"] -pub type Rev1W<'a, REG> = crate::BitWriter<'a, REG, Rev1>; -impl<'a, REG> Rev1W<'a, REG> +pub type REV1_W<'a, REG> = crate::BitWriter<'a, REG, REV1_A>; +impl<'a, REG> REV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev1::Value1) + self.variant(REV1_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev1::Value2) + self.variant(REV1_A::VALUE2) } } #[doc = "Result Event for Result Register 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev2 { +pub enum REV2_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev2) -> Self { + fn from(variant: REV2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV2` reader - Result Event for Result Register 2"] -pub type Rev2R = crate::BitReader; -impl Rev2R { +pub type REV2_R = crate::BitReader; +impl REV2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev2 { + pub const fn variant(&self) -> REV2_A { match self.bits { - false => Rev2::Value1, - true => Rev2::Value2, + false => REV2_A::VALUE1, + true => REV2_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev2::Value1 + *self == REV2_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev2::Value2 + *self == REV2_A::VALUE2 } } #[doc = "Field `REV2` writer - Result Event for Result Register 2"] -pub type Rev2W<'a, REG> = crate::BitWriter<'a, REG, Rev2>; -impl<'a, REG> Rev2W<'a, REG> +pub type REV2_W<'a, REG> = crate::BitWriter<'a, REG, REV2_A>; +impl<'a, REG> REV2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev2::Value1) + self.variant(REV2_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev2::Value2) + self.variant(REV2_A::VALUE2) } } #[doc = "Result Event for Result Register 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev3 { +pub enum REV3_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev3) -> Self { + fn from(variant: REV3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV3` reader - Result Event for Result Register 3"] -pub type Rev3R = crate::BitReader; -impl Rev3R { +pub type REV3_R = crate::BitReader; +impl REV3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev3 { + pub const fn variant(&self) -> REV3_A { match self.bits { - false => Rev3::Value1, - true => Rev3::Value2, + false => REV3_A::VALUE1, + true => REV3_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev3::Value1 + *self == REV3_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev3::Value2 + *self == REV3_A::VALUE2 } } #[doc = "Field `REV3` writer - Result Event for Result Register 3"] -pub type Rev3W<'a, REG> = crate::BitWriter<'a, REG, Rev3>; -impl<'a, REG> Rev3W<'a, REG> +pub type REV3_W<'a, REG> = crate::BitWriter<'a, REG, REV3_A>; +impl<'a, REG> REV3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev3::Value1) + self.variant(REV3_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev3::Value2) + self.variant(REV3_A::VALUE2) } } #[doc = "Result Event for Result Register 4\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev4 { +pub enum REV4_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev4) -> Self { + fn from(variant: REV4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV4` reader - Result Event for Result Register 4"] -pub type Rev4R = crate::BitReader; -impl Rev4R { +pub type REV4_R = crate::BitReader; +impl REV4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev4 { + pub const fn variant(&self) -> REV4_A { match self.bits { - false => Rev4::Value1, - true => Rev4::Value2, + false => REV4_A::VALUE1, + true => REV4_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev4::Value1 + *self == REV4_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev4::Value2 + *self == REV4_A::VALUE2 } } #[doc = "Field `REV4` writer - Result Event for Result Register 4"] -pub type Rev4W<'a, REG> = crate::BitWriter<'a, REG, Rev4>; -impl<'a, REG> Rev4W<'a, REG> +pub type REV4_W<'a, REG> = crate::BitWriter<'a, REG, REV4_A>; +impl<'a, REG> REV4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev4::Value1) + self.variant(REV4_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev4::Value2) + self.variant(REV4_A::VALUE2) } } #[doc = "Result Event for Result Register 5\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev5 { +pub enum REV5_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev5) -> Self { + fn from(variant: REV5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV5` reader - Result Event for Result Register 5"] -pub type Rev5R = crate::BitReader; -impl Rev5R { +pub type REV5_R = crate::BitReader; +impl REV5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev5 { + pub const fn variant(&self) -> REV5_A { match self.bits { - false => Rev5::Value1, - true => Rev5::Value2, + false => REV5_A::VALUE1, + true => REV5_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev5::Value1 + *self == REV5_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev5::Value2 + *self == REV5_A::VALUE2 } } #[doc = "Field `REV5` writer - Result Event for Result Register 5"] -pub type Rev5W<'a, REG> = crate::BitWriter<'a, REG, Rev5>; -impl<'a, REG> Rev5W<'a, REG> +pub type REV5_W<'a, REG> = crate::BitWriter<'a, REG, REV5_A>; +impl<'a, REG> REV5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev5::Value1) + self.variant(REV5_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev5::Value2) + self.variant(REV5_A::VALUE2) } } #[doc = "Result Event for Result Register 6\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev6 { +pub enum REV6_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev6) -> Self { + fn from(variant: REV6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV6` reader - Result Event for Result Register 6"] -pub type Rev6R = crate::BitReader; -impl Rev6R { +pub type REV6_R = crate::BitReader; +impl REV6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev6 { + pub const fn variant(&self) -> REV6_A { match self.bits { - false => Rev6::Value1, - true => Rev6::Value2, + false => REV6_A::VALUE1, + true => REV6_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev6::Value1 + *self == REV6_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev6::Value2 + *self == REV6_A::VALUE2 } } #[doc = "Field `REV6` writer - Result Event for Result Register 6"] -pub type Rev6W<'a, REG> = crate::BitWriter<'a, REG, Rev6>; -impl<'a, REG> Rev6W<'a, REG> +pub type REV6_W<'a, REG> = crate::BitWriter<'a, REG, REV6_A>; +impl<'a, REG> REV6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev6::Value1) + self.variant(REV6_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev6::Value2) + self.variant(REV6_A::VALUE2) } } #[doc = "Result Event for Result Register 7\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev7 { +pub enum REV7_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev7) -> Self { + fn from(variant: REV7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV7` reader - Result Event for Result Register 7"] -pub type Rev7R = crate::BitReader; -impl Rev7R { +pub type REV7_R = crate::BitReader; +impl REV7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev7 { + pub const fn variant(&self) -> REV7_A { match self.bits { - false => Rev7::Value1, - true => Rev7::Value2, + false => REV7_A::VALUE1, + true => REV7_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev7::Value1 + *self == REV7_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev7::Value2 + *self == REV7_A::VALUE2 } } #[doc = "Field `REV7` writer - Result Event for Result Register 7"] -pub type Rev7W<'a, REG> = crate::BitWriter<'a, REG, Rev7>; -impl<'a, REG> Rev7W<'a, REG> +pub type REV7_W<'a, REG> = crate::BitWriter<'a, REG, REV7_A>; +impl<'a, REG> REV7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev7::Value1) + self.variant(REV7_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev7::Value2) + self.variant(REV7_A::VALUE2) } } #[doc = "Result Event for Result Register 8\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev8 { +pub enum REV8_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev8) -> Self { + fn from(variant: REV8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV8` reader - Result Event for Result Register 8"] -pub type Rev8R = crate::BitReader; -impl Rev8R { +pub type REV8_R = crate::BitReader; +impl REV8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev8 { + pub const fn variant(&self) -> REV8_A { match self.bits { - false => Rev8::Value1, - true => Rev8::Value2, + false => REV8_A::VALUE1, + true => REV8_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev8::Value1 + *self == REV8_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev8::Value2 + *self == REV8_A::VALUE2 } } #[doc = "Field `REV8` writer - Result Event for Result Register 8"] -pub type Rev8W<'a, REG> = crate::BitWriter<'a, REG, Rev8>; -impl<'a, REG> Rev8W<'a, REG> +pub type REV8_W<'a, REG> = crate::BitWriter<'a, REG, REV8_A>; +impl<'a, REG> REV8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev8::Value1) + self.variant(REV8_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev8::Value2) + self.variant(REV8_A::VALUE2) } } #[doc = "Result Event for Result Register 9\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev9 { +pub enum REV9_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev9) -> Self { + fn from(variant: REV9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV9` reader - Result Event for Result Register 9"] -pub type Rev9R = crate::BitReader; -impl Rev9R { +pub type REV9_R = crate::BitReader; +impl REV9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev9 { + pub const fn variant(&self) -> REV9_A { match self.bits { - false => Rev9::Value1, - true => Rev9::Value2, + false => REV9_A::VALUE1, + true => REV9_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev9::Value1 + *self == REV9_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev9::Value2 + *self == REV9_A::VALUE2 } } #[doc = "Field `REV9` writer - Result Event for Result Register 9"] -pub type Rev9W<'a, REG> = crate::BitWriter<'a, REG, Rev9>; -impl<'a, REG> Rev9W<'a, REG> +pub type REV9_W<'a, REG> = crate::BitWriter<'a, REG, REV9_A>; +impl<'a, REG> REV9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev9::Value1) + self.variant(REV9_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev9::Value2) + self.variant(REV9_A::VALUE2) } } #[doc = "Result Event for Result Register 10\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev10 { +pub enum REV10_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev10) -> Self { + fn from(variant: REV10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV10` reader - Result Event for Result Register 10"] -pub type Rev10R = crate::BitReader; -impl Rev10R { +pub type REV10_R = crate::BitReader; +impl REV10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev10 { + pub const fn variant(&self) -> REV10_A { match self.bits { - false => Rev10::Value1, - true => Rev10::Value2, + false => REV10_A::VALUE1, + true => REV10_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev10::Value1 + *self == REV10_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev10::Value2 + *self == REV10_A::VALUE2 } } #[doc = "Field `REV10` writer - Result Event for Result Register 10"] -pub type Rev10W<'a, REG> = crate::BitWriter<'a, REG, Rev10>; -impl<'a, REG> Rev10W<'a, REG> +pub type REV10_W<'a, REG> = crate::BitWriter<'a, REG, REV10_A>; +impl<'a, REG> REV10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev10::Value1) + self.variant(REV10_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev10::Value2) + self.variant(REV10_A::VALUE2) } } #[doc = "Result Event for Result Register 11\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev11 { +pub enum REV11_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev11) -> Self { + fn from(variant: REV11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV11` reader - Result Event for Result Register 11"] -pub type Rev11R = crate::BitReader; -impl Rev11R { +pub type REV11_R = crate::BitReader; +impl REV11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev11 { + pub const fn variant(&self) -> REV11_A { match self.bits { - false => Rev11::Value1, - true => Rev11::Value2, + false => REV11_A::VALUE1, + true => REV11_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev11::Value1 + *self == REV11_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev11::Value2 + *self == REV11_A::VALUE2 } } #[doc = "Field `REV11` writer - Result Event for Result Register 11"] -pub type Rev11W<'a, REG> = crate::BitWriter<'a, REG, Rev11>; -impl<'a, REG> Rev11W<'a, REG> +pub type REV11_W<'a, REG> = crate::BitWriter<'a, REG, REV11_A>; +impl<'a, REG> REV11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev11::Value1) + self.variant(REV11_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev11::Value2) + self.variant(REV11_A::VALUE2) } } #[doc = "Result Event for Result Register 12\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev12 { +pub enum REV12_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev12) -> Self { + fn from(variant: REV12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV12` reader - Result Event for Result Register 12"] -pub type Rev12R = crate::BitReader; -impl Rev12R { +pub type REV12_R = crate::BitReader; +impl REV12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev12 { + pub const fn variant(&self) -> REV12_A { match self.bits { - false => Rev12::Value1, - true => Rev12::Value2, + false => REV12_A::VALUE1, + true => REV12_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev12::Value1 + *self == REV12_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev12::Value2 + *self == REV12_A::VALUE2 } } #[doc = "Field `REV12` writer - Result Event for Result Register 12"] -pub type Rev12W<'a, REG> = crate::BitWriter<'a, REG, Rev12>; -impl<'a, REG> Rev12W<'a, REG> +pub type REV12_W<'a, REG> = crate::BitWriter<'a, REG, REV12_A>; +impl<'a, REG> REV12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev12::Value1) + self.variant(REV12_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev12::Value2) + self.variant(REV12_A::VALUE2) } } #[doc = "Result Event for Result Register 13\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev13 { +pub enum REV13_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev13) -> Self { + fn from(variant: REV13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV13` reader - Result Event for Result Register 13"] -pub type Rev13R = crate::BitReader; -impl Rev13R { +pub type REV13_R = crate::BitReader; +impl REV13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev13 { + pub const fn variant(&self) -> REV13_A { match self.bits { - false => Rev13::Value1, - true => Rev13::Value2, + false => REV13_A::VALUE1, + true => REV13_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev13::Value1 + *self == REV13_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev13::Value2 + *self == REV13_A::VALUE2 } } #[doc = "Field `REV13` writer - Result Event for Result Register 13"] -pub type Rev13W<'a, REG> = crate::BitWriter<'a, REG, Rev13>; -impl<'a, REG> Rev13W<'a, REG> +pub type REV13_W<'a, REG> = crate::BitWriter<'a, REG, REV13_A>; +impl<'a, REG> REV13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev13::Value1) + self.variant(REV13_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev13::Value2) + self.variant(REV13_A::VALUE2) } } #[doc = "Result Event for Result Register 14\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev14 { +pub enum REV14_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev14) -> Self { + fn from(variant: REV14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV14` reader - Result Event for Result Register 14"] -pub type Rev14R = crate::BitReader; -impl Rev14R { +pub type REV14_R = crate::BitReader; +impl REV14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev14 { + pub const fn variant(&self) -> REV14_A { match self.bits { - false => Rev14::Value1, - true => Rev14::Value2, + false => REV14_A::VALUE1, + true => REV14_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev14::Value1 + *self == REV14_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev14::Value2 + *self == REV14_A::VALUE2 } } #[doc = "Field `REV14` writer - Result Event for Result Register 14"] -pub type Rev14W<'a, REG> = crate::BitWriter<'a, REG, Rev14>; -impl<'a, REG> Rev14W<'a, REG> +pub type REV14_W<'a, REG> = crate::BitWriter<'a, REG, REV14_A>; +impl<'a, REG> REV14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev14::Value1) + self.variant(REV14_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev14::Value2) + self.variant(REV14_A::VALUE2) } } #[doc = "Result Event for Result Register 15\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Rev15 { +pub enum REV15_A { #[doc = "0: No result event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: New result was stored in register GxRESy"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Rev15) -> Self { + fn from(variant: REV15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `REV15` reader - Result Event for Result Register 15"] -pub type Rev15R = crate::BitReader; -impl Rev15R { +pub type REV15_R = crate::BitReader; +impl REV15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Rev15 { + pub const fn variant(&self) -> REV15_A { match self.bits { - false => Rev15::Value1, - true => Rev15::Value2, + false => REV15_A::VALUE1, + true => REV15_A::VALUE2, } } #[doc = "No result event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev15::Value1 + *self == REV15_A::VALUE1 } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev15::Value2 + *self == REV15_A::VALUE2 } } #[doc = "Field `REV15` writer - Result Event for Result Register 15"] -pub type Rev15W<'a, REG> = crate::BitWriter<'a, REG, Rev15>; -impl<'a, REG> Rev15W<'a, REG> +pub type REV15_W<'a, REG> = crate::BitWriter<'a, REG, REV15_A>; +impl<'a, REG> REV15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No result event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev15::Value1) + self.variant(REV15_A::VALUE1) } #[doc = "New result was stored in register GxRESy"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev15::Value2) + self.variant(REV15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Result Event for Result Register 0"] #[inline(always)] - pub fn rev0(&self) -> Rev0R { - Rev0R::new((self.bits & 1) != 0) + pub fn rev0(&self) -> REV0_R { + REV0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Result Event for Result Register 1"] #[inline(always)] - pub fn rev1(&self) -> Rev1R { - Rev1R::new(((self.bits >> 1) & 1) != 0) + pub fn rev1(&self) -> REV1_R { + REV1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Result Event for Result Register 2"] #[inline(always)] - pub fn rev2(&self) -> Rev2R { - Rev2R::new(((self.bits >> 2) & 1) != 0) + pub fn rev2(&self) -> REV2_R { + REV2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Result Event for Result Register 3"] #[inline(always)] - pub fn rev3(&self) -> Rev3R { - Rev3R::new(((self.bits >> 3) & 1) != 0) + pub fn rev3(&self) -> REV3_R { + REV3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Result Event for Result Register 4"] #[inline(always)] - pub fn rev4(&self) -> Rev4R { - Rev4R::new(((self.bits >> 4) & 1) != 0) + pub fn rev4(&self) -> REV4_R { + REV4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Result Event for Result Register 5"] #[inline(always)] - pub fn rev5(&self) -> Rev5R { - Rev5R::new(((self.bits >> 5) & 1) != 0) + pub fn rev5(&self) -> REV5_R { + REV5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Result Event for Result Register 6"] #[inline(always)] - pub fn rev6(&self) -> Rev6R { - Rev6R::new(((self.bits >> 6) & 1) != 0) + pub fn rev6(&self) -> REV6_R { + REV6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Result Event for Result Register 7"] #[inline(always)] - pub fn rev7(&self) -> Rev7R { - Rev7R::new(((self.bits >> 7) & 1) != 0) + pub fn rev7(&self) -> REV7_R { + REV7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Result Event for Result Register 8"] #[inline(always)] - pub fn rev8(&self) -> Rev8R { - Rev8R::new(((self.bits >> 8) & 1) != 0) + pub fn rev8(&self) -> REV8_R { + REV8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Result Event for Result Register 9"] #[inline(always)] - pub fn rev9(&self) -> Rev9R { - Rev9R::new(((self.bits >> 9) & 1) != 0) + pub fn rev9(&self) -> REV9_R { + REV9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Result Event for Result Register 10"] #[inline(always)] - pub fn rev10(&self) -> Rev10R { - Rev10R::new(((self.bits >> 10) & 1) != 0) + pub fn rev10(&self) -> REV10_R { + REV10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Result Event for Result Register 11"] #[inline(always)] - pub fn rev11(&self) -> Rev11R { - Rev11R::new(((self.bits >> 11) & 1) != 0) + pub fn rev11(&self) -> REV11_R { + REV11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Result Event for Result Register 12"] #[inline(always)] - pub fn rev12(&self) -> Rev12R { - Rev12R::new(((self.bits >> 12) & 1) != 0) + pub fn rev12(&self) -> REV12_R { + REV12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Result Event for Result Register 13"] #[inline(always)] - pub fn rev13(&self) -> Rev13R { - Rev13R::new(((self.bits >> 13) & 1) != 0) + pub fn rev13(&self) -> REV13_R { + REV13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Result Event for Result Register 14"] #[inline(always)] - pub fn rev14(&self) -> Rev14R { - Rev14R::new(((self.bits >> 14) & 1) != 0) + pub fn rev14(&self) -> REV14_R { + REV14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Result Event for Result Register 15"] #[inline(always)] - pub fn rev15(&self) -> Rev15R { - Rev15R::new(((self.bits >> 15) & 1) != 0) + pub fn rev15(&self) -> REV15_R { + REV15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Result Event for Result Register 0"] #[inline(always)] #[must_use] - pub fn rev0(&mut self) -> Rev0W { - Rev0W::new(self, 0) + pub fn rev0(&mut self) -> REV0_W { + REV0_W::new(self, 0) } #[doc = "Bit 1 - Result Event for Result Register 1"] #[inline(always)] #[must_use] - pub fn rev1(&mut self) -> Rev1W { - Rev1W::new(self, 1) + pub fn rev1(&mut self) -> REV1_W { + REV1_W::new(self, 1) } #[doc = "Bit 2 - Result Event for Result Register 2"] #[inline(always)] #[must_use] - pub fn rev2(&mut self) -> Rev2W { - Rev2W::new(self, 2) + pub fn rev2(&mut self) -> REV2_W { + REV2_W::new(self, 2) } #[doc = "Bit 3 - Result Event for Result Register 3"] #[inline(always)] #[must_use] - pub fn rev3(&mut self) -> Rev3W { - Rev3W::new(self, 3) + pub fn rev3(&mut self) -> REV3_W { + REV3_W::new(self, 3) } #[doc = "Bit 4 - Result Event for Result Register 4"] #[inline(always)] #[must_use] - pub fn rev4(&mut self) -> Rev4W { - Rev4W::new(self, 4) + pub fn rev4(&mut self) -> REV4_W { + REV4_W::new(self, 4) } #[doc = "Bit 5 - Result Event for Result Register 5"] #[inline(always)] #[must_use] - pub fn rev5(&mut self) -> Rev5W { - Rev5W::new(self, 5) + pub fn rev5(&mut self) -> REV5_W { + REV5_W::new(self, 5) } #[doc = "Bit 6 - Result Event for Result Register 6"] #[inline(always)] #[must_use] - pub fn rev6(&mut self) -> Rev6W { - Rev6W::new(self, 6) + pub fn rev6(&mut self) -> REV6_W { + REV6_W::new(self, 6) } #[doc = "Bit 7 - Result Event for Result Register 7"] #[inline(always)] #[must_use] - pub fn rev7(&mut self) -> Rev7W { - Rev7W::new(self, 7) + pub fn rev7(&mut self) -> REV7_W { + REV7_W::new(self, 7) } #[doc = "Bit 8 - Result Event for Result Register 8"] #[inline(always)] #[must_use] - pub fn rev8(&mut self) -> Rev8W { - Rev8W::new(self, 8) + pub fn rev8(&mut self) -> REV8_W { + REV8_W::new(self, 8) } #[doc = "Bit 9 - Result Event for Result Register 9"] #[inline(always)] #[must_use] - pub fn rev9(&mut self) -> Rev9W { - Rev9W::new(self, 9) + pub fn rev9(&mut self) -> REV9_W { + REV9_W::new(self, 9) } #[doc = "Bit 10 - Result Event for Result Register 10"] #[inline(always)] #[must_use] - pub fn rev10(&mut self) -> Rev10W { - Rev10W::new(self, 10) + pub fn rev10(&mut self) -> REV10_W { + REV10_W::new(self, 10) } #[doc = "Bit 11 - Result Event for Result Register 11"] #[inline(always)] #[must_use] - pub fn rev11(&mut self) -> Rev11W { - Rev11W::new(self, 11) + pub fn rev11(&mut self) -> REV11_W { + REV11_W::new(self, 11) } #[doc = "Bit 12 - Result Event for Result Register 12"] #[inline(always)] #[must_use] - pub fn rev12(&mut self) -> Rev12W { - Rev12W::new(self, 12) + pub fn rev12(&mut self) -> REV12_W { + REV12_W::new(self, 12) } #[doc = "Bit 13 - Result Event for Result Register 13"] #[inline(always)] #[must_use] - pub fn rev13(&mut self) -> Rev13W { - Rev13W::new(self, 13) + pub fn rev13(&mut self) -> REV13_W { + REV13_W::new(self, 13) } #[doc = "Bit 14 - Result Event for Result Register 14"] #[inline(always)] #[must_use] - pub fn rev14(&mut self) -> Rev14W { - Rev14W::new(self, 14) + pub fn rev14(&mut self) -> REV14_W { + REV14_W::new(self, 14) } #[doc = "Bit 15 - Result Event for Result Register 15"] #[inline(always)] #[must_use] - pub fn rev15(&mut self) -> Rev15W { - Rev15W::new(self, 15) + pub fn rev15(&mut self) -> REV15_W { + REV15_W::new(self, 15) } } #[doc = "Result Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`reflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ReflagSpec; -impl crate::RegisterSpec for ReflagSpec { +pub struct REFLAG_SPEC; +impl crate::RegisterSpec for REFLAG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`reflag::R`](R) reader structure"] -impl crate::Readable for ReflagSpec {} +impl crate::Readable for REFLAG_SPEC {} #[doc = "`write(|w| ..)` method takes [`reflag::W`](W) writer structure"] -impl crate::Writable for ReflagSpec { +impl crate::Writable for REFLAG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REFLAG to value 0"] -impl crate::Resettable for ReflagSpec { +impl crate::Resettable for REFLAG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/res.rs b/src/vadc_g0/res.rs index 4da107fd..31e2a22f 100644 --- a/src/vadc_g0/res.rs +++ b/src/vadc_g0/res.rs @@ -1,199 +1,199 @@ #[doc = "Register `RES[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `RES[%s]` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `RESULT` reader - Result of Most Recent Conversion"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Field `RESULT` writer - Result of Most Recent Conversion"] -pub type ResultW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; +pub type RESULT_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; #[doc = "Field `DRC` reader - Data Reduction Counter"] -pub type DrcR = crate::FieldReader; +pub type DRC_R = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type ChnrR = crate::FieldReader; +pub type CHNR_R = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EmuxR = crate::FieldReader; +pub type EMUX_R = crate::FieldReader; #[doc = "Converted Request Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Crs { +pub enum CRS_A { #[doc = "0: Request source 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request source 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Request source 2"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Crs) -> Self { + fn from(variant: CRS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Crs { +impl crate::FieldSpec for CRS_A { type Ux = u8; } -impl crate::IsEnum for Crs {} +impl crate::IsEnum for CRS_A {} #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CrsR = crate::FieldReader; -impl CrsR { +pub type CRS_R = crate::FieldReader; +impl CRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Crs::Value1), - 1 => Some(Crs::Value2), - 2 => Some(Crs::Value3), + 0 => Some(CRS_A::VALUE1), + 1 => Some(CRS_A::VALUE2), + 2 => Some(CRS_A::VALUE3), _ => None, } } #[doc = "Request source 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Crs::Value1 + *self == CRS_A::VALUE1 } #[doc = "Request source 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Crs::Value2 + *self == CRS_A::VALUE2 } #[doc = "Request source 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Crs::Value3 + *self == CRS_A::VALUE3 } } #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcr { +pub enum FCR_A { #[doc = "0: Signal level was below compare value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal level was above compare value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcr) -> Self { + fn from(variant: FCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FcrR = crate::BitReader; -impl FcrR { +pub type FCR_R = crate::BitReader; +impl FCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcr { + pub const fn variant(&self) -> FCR_A { match self.bits { - false => Fcr::Value1, - true => Fcr::Value2, + false => FCR_A::VALUE1, + true => FCR_A::VALUE2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcr::Value1 + *self == FCR_A::VALUE1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcr::Value2 + *self == FCR_A::VALUE2 } } #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf { +pub enum VF_A { #[doc = "0: No new result available"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf) -> Self { + fn from(variant: VF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF` reader - Valid Flag"] -pub type VfR = crate::BitReader; -impl VfR { +pub type VF_R = crate::BitReader; +impl VF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf { + pub const fn variant(&self) -> VF_A { match self.bits { - false => Vf::Value1, - true => Vf::Value2, + false => VF_A::VALUE1, + true => VF_A::VALUE2, } } #[doc = "No new result available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf::Value1 + *self == VF_A::VALUE1 } #[doc = "Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf::Value2 + *self == VF_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Data Reduction Counter"] #[inline(always)] - pub fn drc(&self) -> DrcR { - DrcR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drc(&self) -> DRC_R { + DRC_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> ChnrR { - ChnrR::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> CHNR_R { + CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EmuxR { - EmuxR::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EMUX_R { + EMUX_R::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CrsR { - CrsR::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CRS_R { + CRS_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FcrR { - FcrR::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FCR_R { + FCR_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VfR { - VfR::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VF_R { + VF_R::new(((self.bits >> 31) & 1) != 0) } } impl W { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] #[must_use] - pub fn result(&mut self) -> ResultW { - ResultW::new(self, 0) + pub fn result(&mut self) -> RESULT_W { + RESULT_W::new(self, 0) } } #[doc = "Result Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`res::R`](R). WARN: One or more dependent resources other than the current register are immediately affected by a read operation. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`res::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ResSpec; -impl crate::RegisterSpec for ResSpec { +pub struct RES_SPEC; +impl crate::RegisterSpec for RES_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`res::R`](R) reader structure"] -impl crate::Readable for ResSpec {} +impl crate::Readable for RES_SPEC {} #[doc = "`write(|w| ..)` method takes [`res::W`](W) writer structure"] -impl crate::Writable for ResSpec { +impl crate::Writable for RES_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets RES[%s] to value 0"] -impl crate::Resettable for ResSpec { +impl crate::Resettable for RES_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/resd.rs b/src/vadc_g0/resd.rs index c5953c43..4aad761d 100644 --- a/src/vadc_g0/resd.rs +++ b/src/vadc_g0/resd.rs @@ -1,181 +1,181 @@ #[doc = "Register `RESD[%s]` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `RESULT` reader - Result of Most Recent Conversion"] -pub type ResultR = crate::FieldReader; +pub type RESULT_R = crate::FieldReader; #[doc = "Field `DRC` reader - Data Reduction Counter"] -pub type DrcR = crate::FieldReader; +pub type DRC_R = crate::FieldReader; #[doc = "Field `CHNR` reader - Channel Number"] -pub type ChnrR = crate::FieldReader; +pub type CHNR_R = crate::FieldReader; #[doc = "Field `EMUX` reader - External Multiplexer Setting"] -pub type EmuxR = crate::FieldReader; +pub type EMUX_R = crate::FieldReader; #[doc = "Converted Request Source\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Crs { +pub enum CRS_A { #[doc = "0: Request source 0"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Request source 1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Request source 2"] - Value3 = 2, + VALUE3 = 2, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Crs) -> Self { + fn from(variant: CRS_A) -> Self { variant as _ } } -impl crate::FieldSpec for Crs { +impl crate::FieldSpec for CRS_A { type Ux = u8; } -impl crate::IsEnum for Crs {} +impl crate::IsEnum for CRS_A {} #[doc = "Field `CRS` reader - Converted Request Source"] -pub type CrsR = crate::FieldReader; -impl CrsR { +pub type CRS_R = crate::FieldReader; +impl CRS_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Crs::Value1), - 1 => Some(Crs::Value2), - 2 => Some(Crs::Value3), + 0 => Some(CRS_A::VALUE1), + 1 => Some(CRS_A::VALUE2), + 2 => Some(CRS_A::VALUE3), _ => None, } } #[doc = "Request source 0"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Crs::Value1 + *self == CRS_A::VALUE1 } #[doc = "Request source 1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Crs::Value2 + *self == CRS_A::VALUE2 } #[doc = "Request source 2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Crs::Value3 + *self == CRS_A::VALUE3 } } #[doc = "Fast Compare Result\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Fcr { +pub enum FCR_A { #[doc = "0: Signal level was below compare value"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Signal level was above compare value"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Fcr) -> Self { + fn from(variant: FCR_A) -> Self { variant as u8 != 0 } } #[doc = "Field `FCR` reader - Fast Compare Result"] -pub type FcrR = crate::BitReader; -impl FcrR { +pub type FCR_R = crate::BitReader; +impl FCR_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Fcr { + pub const fn variant(&self) -> FCR_A { match self.bits { - false => Fcr::Value1, - true => Fcr::Value2, + false => FCR_A::VALUE1, + true => FCR_A::VALUE2, } } #[doc = "Signal level was below compare value"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Fcr::Value1 + *self == FCR_A::VALUE1 } #[doc = "Signal level was above compare value"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Fcr::Value2 + *self == FCR_A::VALUE2 } } #[doc = "Valid Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf { +pub enum VF_A { #[doc = "0: No new result available"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf) -> Self { + fn from(variant: VF_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF` reader - Valid Flag"] -pub type VfR = crate::BitReader; -impl VfR { +pub type VF_R = crate::BitReader; +impl VF_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf { + pub const fn variant(&self) -> VF_A { match self.bits { - false => Vf::Value1, - true => Vf::Value2, + false => VF_A::VALUE1, + true => VF_A::VALUE2, } } #[doc = "No new result available"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf::Value1 + *self == VF_A::VALUE1 } #[doc = "Bitfield RESULT has been updated with new result value and has not yet been read, or bit FCR has been updated"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf::Value2 + *self == VF_A::VALUE2 } } impl R { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] - pub fn result(&self) -> ResultR { - ResultR::new((self.bits & 0xffff) as u16) + pub fn result(&self) -> RESULT_R { + RESULT_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:19 - Data Reduction Counter"] #[inline(always)] - pub fn drc(&self) -> DrcR { - DrcR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn drc(&self) -> DRC_R { + DRC_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:24 - Channel Number"] #[inline(always)] - pub fn chnr(&self) -> ChnrR { - ChnrR::new(((self.bits >> 20) & 0x1f) as u8) + pub fn chnr(&self) -> CHNR_R { + CHNR_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 25:27 - External Multiplexer Setting"] #[inline(always)] - pub fn emux(&self) -> EmuxR { - EmuxR::new(((self.bits >> 25) & 7) as u8) + pub fn emux(&self) -> EMUX_R { + EMUX_R::new(((self.bits >> 25) & 7) as u8) } #[doc = "Bits 28:29 - Converted Request Source"] #[inline(always)] - pub fn crs(&self) -> CrsR { - CrsR::new(((self.bits >> 28) & 3) as u8) + pub fn crs(&self) -> CRS_R { + CRS_R::new(((self.bits >> 28) & 3) as u8) } #[doc = "Bit 30 - Fast Compare Result"] #[inline(always)] - pub fn fcr(&self) -> FcrR { - FcrR::new(((self.bits >> 30) & 1) != 0) + pub fn fcr(&self) -> FCR_R { + FCR_R::new(((self.bits >> 30) & 1) != 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - pub fn vf(&self) -> VfR { - VfR::new(((self.bits >> 31) & 1) != 0) + pub fn vf(&self) -> VF_R { + VF_R::new(((self.bits >> 31) & 1) != 0) } } #[doc = "Result Register, Debug\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`resd::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct ResdSpec; -impl crate::RegisterSpec for ResdSpec { +pub struct RESD_SPEC; +impl crate::RegisterSpec for RESD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`resd::R`](R) reader structure"] -impl crate::Readable for ResdSpec {} +impl crate::Readable for RESD_SPEC {} #[doc = "`reset()` method sets RESD[%s] to value 0"] -impl crate::Resettable for ResdSpec { +impl crate::Resettable for RESD_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/revnp0.rs b/src/vadc_g0/revnp0.rs index 22a8ccd1..f8a592e7 100644 --- a/src/vadc_g0/revnp0.rs +++ b/src/vadc_g0/revnp0.rs @@ -1,68 +1,68 @@ #[doc = "Register `REVNP0` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REVNP0` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev0np { +pub enum REV0NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev0np) -> Self { + fn from(variant: REV0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev0np { +impl crate::FieldSpec for REV0NP_A { type Ux = u8; } -impl crate::IsEnum for Rev0np {} +impl crate::IsEnum for REV0NP_A {} #[doc = "Field `REV0NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev0npR = crate::FieldReader; -impl Rev0npR { +pub type REV0NP_R = crate::FieldReader; +impl REV0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev0np::Value1), - 3 => Some(Rev0np::Value2), - 4 => Some(Rev0np::Value3), - 7 => Some(Rev0np::Value4), + 0 => Some(REV0NP_A::VALUE1), + 3 => Some(REV0NP_A::VALUE2), + 4 => Some(REV0NP_A::VALUE3), + 7 => Some(REV0NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev0np::Value1 + *self == REV0NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev0np::Value2 + *self == REV0NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev0np::Value3 + *self == REV0NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev0np::Value4 + *self == REV0NP_A::VALUE4 } } #[doc = "Field `REV0NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev0np>; -impl<'a, REG> Rev0npW<'a, REG> +pub type REV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV0NP_A>; +impl<'a, REG> REV0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev0np::Value1) + self.variant(REV0NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev0np::Value2) + self.variant(REV0NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev0np::Value3) + self.variant(REV0NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev0np::Value4) + self.variant(REV0NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev1np { +pub enum REV1NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev1np) -> Self { + fn from(variant: REV1NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev1np { +impl crate::FieldSpec for REV1NP_A { type Ux = u8; } -impl crate::IsEnum for Rev1np {} +impl crate::IsEnum for REV1NP_A {} #[doc = "Field `REV1NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev1npR = crate::FieldReader; -impl Rev1npR { +pub type REV1NP_R = crate::FieldReader; +impl REV1NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev1np::Value1), - 3 => Some(Rev1np::Value2), - 4 => Some(Rev1np::Value3), - 7 => Some(Rev1np::Value4), + 0 => Some(REV1NP_A::VALUE1), + 3 => Some(REV1NP_A::VALUE2), + 4 => Some(REV1NP_A::VALUE3), + 7 => Some(REV1NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev1np::Value1 + *self == REV1NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev1np::Value2 + *self == REV1NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev1np::Value3 + *self == REV1NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev1np::Value4 + *self == REV1NP_A::VALUE4 } } #[doc = "Field `REV1NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev1np>; -impl<'a, REG> Rev1npW<'a, REG> +pub type REV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV1NP_A>; +impl<'a, REG> REV1NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev1np::Value1) + self.variant(REV1NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev1np::Value2) + self.variant(REV1NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev1np::Value3) + self.variant(REV1NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev1np::Value4) + self.variant(REV1NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev2np { +pub enum REV2NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev2np) -> Self { + fn from(variant: REV2NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev2np { +impl crate::FieldSpec for REV2NP_A { type Ux = u8; } -impl crate::IsEnum for Rev2np {} +impl crate::IsEnum for REV2NP_A {} #[doc = "Field `REV2NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev2npR = crate::FieldReader; -impl Rev2npR { +pub type REV2NP_R = crate::FieldReader; +impl REV2NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev2np::Value1), - 3 => Some(Rev2np::Value2), - 4 => Some(Rev2np::Value3), - 7 => Some(Rev2np::Value4), + 0 => Some(REV2NP_A::VALUE1), + 3 => Some(REV2NP_A::VALUE2), + 4 => Some(REV2NP_A::VALUE3), + 7 => Some(REV2NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev2np::Value1 + *self == REV2NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev2np::Value2 + *self == REV2NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev2np::Value3 + *self == REV2NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev2np::Value4 + *self == REV2NP_A::VALUE4 } } #[doc = "Field `REV2NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev2npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev2np>; -impl<'a, REG> Rev2npW<'a, REG> +pub type REV2NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV2NP_A>; +impl<'a, REG> REV2NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev2np::Value1) + self.variant(REV2NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev2np::Value2) + self.variant(REV2NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev2np::Value3) + self.variant(REV2NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev2np::Value4) + self.variant(REV2NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev3np { +pub enum REV3NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev3np) -> Self { + fn from(variant: REV3NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev3np { +impl crate::FieldSpec for REV3NP_A { type Ux = u8; } -impl crate::IsEnum for Rev3np {} +impl crate::IsEnum for REV3NP_A {} #[doc = "Field `REV3NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev3npR = crate::FieldReader; -impl Rev3npR { +pub type REV3NP_R = crate::FieldReader; +impl REV3NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev3np::Value1), - 3 => Some(Rev3np::Value2), - 4 => Some(Rev3np::Value3), - 7 => Some(Rev3np::Value4), + 0 => Some(REV3NP_A::VALUE1), + 3 => Some(REV3NP_A::VALUE2), + 4 => Some(REV3NP_A::VALUE3), + 7 => Some(REV3NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev3np::Value1 + *self == REV3NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev3np::Value2 + *self == REV3NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev3np::Value3 + *self == REV3NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev3np::Value4 + *self == REV3NP_A::VALUE4 } } #[doc = "Field `REV3NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev3npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev3np>; -impl<'a, REG> Rev3npW<'a, REG> +pub type REV3NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV3NP_A>; +impl<'a, REG> REV3NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev3np::Value1) + self.variant(REV3NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev3np::Value2) + self.variant(REV3NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev3np::Value3) + self.variant(REV3NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev3np::Value4) + self.variant(REV3NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev4np { +pub enum REV4NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev4np) -> Self { + fn from(variant: REV4NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev4np { +impl crate::FieldSpec for REV4NP_A { type Ux = u8; } -impl crate::IsEnum for Rev4np {} +impl crate::IsEnum for REV4NP_A {} #[doc = "Field `REV4NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev4npR = crate::FieldReader; -impl Rev4npR { +pub type REV4NP_R = crate::FieldReader; +impl REV4NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev4np::Value1), - 3 => Some(Rev4np::Value2), - 4 => Some(Rev4np::Value3), - 7 => Some(Rev4np::Value4), + 0 => Some(REV4NP_A::VALUE1), + 3 => Some(REV4NP_A::VALUE2), + 4 => Some(REV4NP_A::VALUE3), + 7 => Some(REV4NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev4np::Value1 + *self == REV4NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev4np::Value2 + *self == REV4NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev4np::Value3 + *self == REV4NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev4np::Value4 + *self == REV4NP_A::VALUE4 } } #[doc = "Field `REV4NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev4npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev4np>; -impl<'a, REG> Rev4npW<'a, REG> +pub type REV4NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV4NP_A>; +impl<'a, REG> REV4NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev4np::Value1) + self.variant(REV4NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev4np::Value2) + self.variant(REV4NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev4np::Value3) + self.variant(REV4NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev4np::Value4) + self.variant(REV4NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev5np { +pub enum REV5NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev5np) -> Self { + fn from(variant: REV5NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev5np { +impl crate::FieldSpec for REV5NP_A { type Ux = u8; } -impl crate::IsEnum for Rev5np {} +impl crate::IsEnum for REV5NP_A {} #[doc = "Field `REV5NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev5npR = crate::FieldReader; -impl Rev5npR { +pub type REV5NP_R = crate::FieldReader; +impl REV5NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev5np::Value1), - 3 => Some(Rev5np::Value2), - 4 => Some(Rev5np::Value3), - 7 => Some(Rev5np::Value4), + 0 => Some(REV5NP_A::VALUE1), + 3 => Some(REV5NP_A::VALUE2), + 4 => Some(REV5NP_A::VALUE3), + 7 => Some(REV5NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev5np::Value1 + *self == REV5NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev5np::Value2 + *self == REV5NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev5np::Value3 + *self == REV5NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev5np::Value4 + *self == REV5NP_A::VALUE4 } } #[doc = "Field `REV5NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev5npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev5np>; -impl<'a, REG> Rev5npW<'a, REG> +pub type REV5NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV5NP_A>; +impl<'a, REG> REV5NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,85 +500,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev5np::Value1) + self.variant(REV5NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev5np::Value2) + self.variant(REV5NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev5np::Value3) + self.variant(REV5NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev5np::Value4) + self.variant(REV5NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev6np { +pub enum REV6NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev6np) -> Self { + fn from(variant: REV6NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev6np { +impl crate::FieldSpec for REV6NP_A { type Ux = u8; } -impl crate::IsEnum for Rev6np {} +impl crate::IsEnum for REV6NP_A {} #[doc = "Field `REV6NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev6npR = crate::FieldReader; -impl Rev6npR { +pub type REV6NP_R = crate::FieldReader; +impl REV6NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev6np::Value1), - 3 => Some(Rev6np::Value2), - 4 => Some(Rev6np::Value3), - 7 => Some(Rev6np::Value4), + 0 => Some(REV6NP_A::VALUE1), + 3 => Some(REV6NP_A::VALUE2), + 4 => Some(REV6NP_A::VALUE3), + 7 => Some(REV6NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev6np::Value1 + *self == REV6NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev6np::Value2 + *self == REV6NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev6np::Value3 + *self == REV6NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev6np::Value4 + *self == REV6NP_A::VALUE4 } } #[doc = "Field `REV6NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev6npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev6np>; -impl<'a, REG> Rev6npW<'a, REG> +pub type REV6NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV6NP_A>; +impl<'a, REG> REV6NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,85 +586,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev6np::Value1) + self.variant(REV6NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev6np::Value2) + self.variant(REV6NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev6np::Value3) + self.variant(REV6NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev6np::Value4) + self.variant(REV6NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev7np { +pub enum REV7NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev7np) -> Self { + fn from(variant: REV7NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev7np { +impl crate::FieldSpec for REV7NP_A { type Ux = u8; } -impl crate::IsEnum for Rev7np {} +impl crate::IsEnum for REV7NP_A {} #[doc = "Field `REV7NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev7npR = crate::FieldReader; -impl Rev7npR { +pub type REV7NP_R = crate::FieldReader; +impl REV7NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev7np::Value1), - 3 => Some(Rev7np::Value2), - 4 => Some(Rev7np::Value3), - 7 => Some(Rev7np::Value4), + 0 => Some(REV7NP_A::VALUE1), + 3 => Some(REV7NP_A::VALUE2), + 4 => Some(REV7NP_A::VALUE3), + 7 => Some(REV7NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev7np::Value1 + *self == REV7NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev7np::Value2 + *self == REV7NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev7np::Value3 + *self == REV7NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev7np::Value4 + *self == REV7NP_A::VALUE4 } } #[doc = "Field `REV7NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev7npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev7np>; -impl<'a, REG> Rev7npW<'a, REG> +pub type REV7NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV7NP_A>; +impl<'a, REG> REV7NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -672,130 +672,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev7np::Value1) + self.variant(REV7NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev7np::Value2) + self.variant(REV7NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev7np::Value3) + self.variant(REV7NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev7np::Value4) + self.variant(REV7NP_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev0np(&self) -> Rev0npR { - Rev0npR::new((self.bits & 0x0f) as u8) + pub fn rev0np(&self) -> REV0NP_R { + REV0NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev1np(&self) -> Rev1npR { - Rev1npR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rev1np(&self) -> REV1NP_R { + REV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev2np(&self) -> Rev2npR { - Rev2npR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rev2np(&self) -> REV2NP_R { + REV2NP_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev3np(&self) -> Rev3npR { - Rev3npR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rev3np(&self) -> REV3NP_R { + REV3NP_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev4np(&self) -> Rev4npR { - Rev4npR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev4np(&self) -> REV4NP_R { + REV4NP_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev5np(&self) -> Rev5npR { - Rev5npR::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rev5np(&self) -> REV5NP_R { + REV5NP_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev6np(&self) -> Rev6npR { - Rev6npR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rev6np(&self) -> REV6NP_R { + REV6NP_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev7np(&self) -> Rev7npR { - Rev7npR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rev7np(&self) -> REV7NP_R { + REV7NP_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev0np(&mut self) -> Rev0npW { - Rev0npW::new(self, 0) + pub fn rev0np(&mut self) -> REV0NP_W { + REV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev1np(&mut self) -> Rev1npW { - Rev1npW::new(self, 4) + pub fn rev1np(&mut self) -> REV1NP_W { + REV1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev2np(&mut self) -> Rev2npW { - Rev2npW::new(self, 8) + pub fn rev2np(&mut self) -> REV2NP_W { + REV2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev3np(&mut self) -> Rev3npW { - Rev3npW::new(self, 12) + pub fn rev3np(&mut self) -> REV3NP_W { + REV3NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev4np(&mut self) -> Rev4npW { - Rev4npW::new(self, 16) + pub fn rev4np(&mut self) -> REV4NP_W { + REV4NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev5np(&mut self) -> Rev5npW { - Rev5npW::new(self, 20) + pub fn rev5np(&mut self) -> REV5NP_W { + REV5NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev6np(&mut self) -> Rev6npW { - Rev6npW::new(self, 24) + pub fn rev6np(&mut self) -> REV6NP_W { + REV6NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev7np(&mut self) -> Rev7npW { - Rev7npW::new(self, 28) + pub fn rev7np(&mut self) -> REV7NP_W { + REV7NP_W::new(self, 28) } } #[doc = "Result Event Node Pointer Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Revnp0Spec; -impl crate::RegisterSpec for Revnp0Spec { +pub struct REVNP0_SPEC; +impl crate::RegisterSpec for REVNP0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`revnp0::R`](R) reader structure"] -impl crate::Readable for Revnp0Spec {} +impl crate::Readable for REVNP0_SPEC {} #[doc = "`write(|w| ..)` method takes [`revnp0::W`](W) writer structure"] -impl crate::Writable for Revnp0Spec { +impl crate::Writable for REVNP0_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REVNP0 to value 0"] -impl crate::Resettable for Revnp0Spec { +impl crate::Resettable for REVNP0_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/revnp1.rs b/src/vadc_g0/revnp1.rs index fece631b..5e2593fa 100644 --- a/src/vadc_g0/revnp1.rs +++ b/src/vadc_g0/revnp1.rs @@ -1,68 +1,68 @@ #[doc = "Register `REVNP1` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `REVNP1` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev8np { +pub enum REV8NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev8np) -> Self { + fn from(variant: REV8NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev8np { +impl crate::FieldSpec for REV8NP_A { type Ux = u8; } -impl crate::IsEnum for Rev8np {} +impl crate::IsEnum for REV8NP_A {} #[doc = "Field `REV8NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev8npR = crate::FieldReader; -impl Rev8npR { +pub type REV8NP_R = crate::FieldReader; +impl REV8NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev8np::Value1), - 3 => Some(Rev8np::Value2), - 4 => Some(Rev8np::Value3), - 7 => Some(Rev8np::Value4), + 0 => Some(REV8NP_A::VALUE1), + 3 => Some(REV8NP_A::VALUE2), + 4 => Some(REV8NP_A::VALUE3), + 7 => Some(REV8NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev8np::Value1 + *self == REV8NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev8np::Value2 + *self == REV8NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev8np::Value3 + *self == REV8NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev8np::Value4 + *self == REV8NP_A::VALUE4 } } #[doc = "Field `REV8NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev8npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev8np>; -impl<'a, REG> Rev8npW<'a, REG> +pub type REV8NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV8NP_A>; +impl<'a, REG> REV8NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev8np::Value1) + self.variant(REV8NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev8np::Value2) + self.variant(REV8NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev8np::Value3) + self.variant(REV8NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev8np::Value4) + self.variant(REV8NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev9np { +pub enum REV9NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev9np) -> Self { + fn from(variant: REV9NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev9np { +impl crate::FieldSpec for REV9NP_A { type Ux = u8; } -impl crate::IsEnum for Rev9np {} +impl crate::IsEnum for REV9NP_A {} #[doc = "Field `REV9NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev9npR = crate::FieldReader; -impl Rev9npR { +pub type REV9NP_R = crate::FieldReader; +impl REV9NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev9np::Value1), - 3 => Some(Rev9np::Value2), - 4 => Some(Rev9np::Value3), - 7 => Some(Rev9np::Value4), + 0 => Some(REV9NP_A::VALUE1), + 3 => Some(REV9NP_A::VALUE2), + 4 => Some(REV9NP_A::VALUE3), + 7 => Some(REV9NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev9np::Value1 + *self == REV9NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev9np::Value2 + *self == REV9NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev9np::Value3 + *self == REV9NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev9np::Value4 + *self == REV9NP_A::VALUE4 } } #[doc = "Field `REV9NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev9npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev9np>; -impl<'a, REG> Rev9npW<'a, REG> +pub type REV9NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV9NP_A>; +impl<'a, REG> REV9NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,85 +156,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev9np::Value1) + self.variant(REV9NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev9np::Value2) + self.variant(REV9NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev9np::Value3) + self.variant(REV9NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev9np::Value4) + self.variant(REV9NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev10np { +pub enum REV10NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev10np) -> Self { + fn from(variant: REV10NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev10np { +impl crate::FieldSpec for REV10NP_A { type Ux = u8; } -impl crate::IsEnum for Rev10np {} +impl crate::IsEnum for REV10NP_A {} #[doc = "Field `REV10NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev10npR = crate::FieldReader; -impl Rev10npR { +pub type REV10NP_R = crate::FieldReader; +impl REV10NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev10np::Value1), - 3 => Some(Rev10np::Value2), - 4 => Some(Rev10np::Value3), - 7 => Some(Rev10np::Value4), + 0 => Some(REV10NP_A::VALUE1), + 3 => Some(REV10NP_A::VALUE2), + 4 => Some(REV10NP_A::VALUE3), + 7 => Some(REV10NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev10np::Value1 + *self == REV10NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev10np::Value2 + *self == REV10NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev10np::Value3 + *self == REV10NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev10np::Value4 + *self == REV10NP_A::VALUE4 } } #[doc = "Field `REV10NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev10npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev10np>; -impl<'a, REG> Rev10npW<'a, REG> +pub type REV10NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV10NP_A>; +impl<'a, REG> REV10NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -242,85 +242,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev10np::Value1) + self.variant(REV10NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev10np::Value2) + self.variant(REV10NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev10np::Value3) + self.variant(REV10NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev10np::Value4) + self.variant(REV10NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev11np { +pub enum REV11NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev11np) -> Self { + fn from(variant: REV11NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev11np { +impl crate::FieldSpec for REV11NP_A { type Ux = u8; } -impl crate::IsEnum for Rev11np {} +impl crate::IsEnum for REV11NP_A {} #[doc = "Field `REV11NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev11npR = crate::FieldReader; -impl Rev11npR { +pub type REV11NP_R = crate::FieldReader; +impl REV11NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev11np::Value1), - 3 => Some(Rev11np::Value2), - 4 => Some(Rev11np::Value3), - 7 => Some(Rev11np::Value4), + 0 => Some(REV11NP_A::VALUE1), + 3 => Some(REV11NP_A::VALUE2), + 4 => Some(REV11NP_A::VALUE3), + 7 => Some(REV11NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev11np::Value1 + *self == REV11NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev11np::Value2 + *self == REV11NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev11np::Value3 + *self == REV11NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev11np::Value4 + *self == REV11NP_A::VALUE4 } } #[doc = "Field `REV11NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev11npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev11np>; -impl<'a, REG> Rev11npW<'a, REG> +pub type REV11NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV11NP_A>; +impl<'a, REG> REV11NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -328,85 +328,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev11np::Value1) + self.variant(REV11NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev11np::Value2) + self.variant(REV11NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev11np::Value3) + self.variant(REV11NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev11np::Value4) + self.variant(REV11NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev12np { +pub enum REV12NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev12np) -> Self { + fn from(variant: REV12NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev12np { +impl crate::FieldSpec for REV12NP_A { type Ux = u8; } -impl crate::IsEnum for Rev12np {} +impl crate::IsEnum for REV12NP_A {} #[doc = "Field `REV12NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev12npR = crate::FieldReader; -impl Rev12npR { +pub type REV12NP_R = crate::FieldReader; +impl REV12NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev12np::Value1), - 3 => Some(Rev12np::Value2), - 4 => Some(Rev12np::Value3), - 7 => Some(Rev12np::Value4), + 0 => Some(REV12NP_A::VALUE1), + 3 => Some(REV12NP_A::VALUE2), + 4 => Some(REV12NP_A::VALUE3), + 7 => Some(REV12NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev12np::Value1 + *self == REV12NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev12np::Value2 + *self == REV12NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev12np::Value3 + *self == REV12NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev12np::Value4 + *self == REV12NP_A::VALUE4 } } #[doc = "Field `REV12NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev12npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev12np>; -impl<'a, REG> Rev12npW<'a, REG> +pub type REV12NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV12NP_A>; +impl<'a, REG> REV12NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -414,85 +414,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev12np::Value1) + self.variant(REV12NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev12np::Value2) + self.variant(REV12NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev12np::Value3) + self.variant(REV12NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev12np::Value4) + self.variant(REV12NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev13np { +pub enum REV13NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev13np) -> Self { + fn from(variant: REV13NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev13np { +impl crate::FieldSpec for REV13NP_A { type Ux = u8; } -impl crate::IsEnum for Rev13np {} +impl crate::IsEnum for REV13NP_A {} #[doc = "Field `REV13NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev13npR = crate::FieldReader; -impl Rev13npR { +pub type REV13NP_R = crate::FieldReader; +impl REV13NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev13np::Value1), - 3 => Some(Rev13np::Value2), - 4 => Some(Rev13np::Value3), - 7 => Some(Rev13np::Value4), + 0 => Some(REV13NP_A::VALUE1), + 3 => Some(REV13NP_A::VALUE2), + 4 => Some(REV13NP_A::VALUE3), + 7 => Some(REV13NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev13np::Value1 + *self == REV13NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev13np::Value2 + *self == REV13NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev13np::Value3 + *self == REV13NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev13np::Value4 + *self == REV13NP_A::VALUE4 } } #[doc = "Field `REV13NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev13npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev13np>; -impl<'a, REG> Rev13npW<'a, REG> +pub type REV13NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV13NP_A>; +impl<'a, REG> REV13NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -500,85 +500,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev13np::Value1) + self.variant(REV13NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev13np::Value2) + self.variant(REV13NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev13np::Value3) + self.variant(REV13NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev13np::Value4) + self.variant(REV13NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev14np { +pub enum REV14NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev14np) -> Self { + fn from(variant: REV14NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev14np { +impl crate::FieldSpec for REV14NP_A { type Ux = u8; } -impl crate::IsEnum for Rev14np {} +impl crate::IsEnum for REV14NP_A {} #[doc = "Field `REV14NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev14npR = crate::FieldReader; -impl Rev14npR { +pub type REV14NP_R = crate::FieldReader; +impl REV14NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev14np::Value1), - 3 => Some(Rev14np::Value2), - 4 => Some(Rev14np::Value3), - 7 => Some(Rev14np::Value4), + 0 => Some(REV14NP_A::VALUE1), + 3 => Some(REV14NP_A::VALUE2), + 4 => Some(REV14NP_A::VALUE3), + 7 => Some(REV14NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev14np::Value1 + *self == REV14NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev14np::Value2 + *self == REV14NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev14np::Value3 + *self == REV14NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev14np::Value4 + *self == REV14NP_A::VALUE4 } } #[doc = "Field `REV14NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev14npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev14np>; -impl<'a, REG> Rev14npW<'a, REG> +pub type REV14NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV14NP_A>; +impl<'a, REG> REV14NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -586,85 +586,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev14np::Value1) + self.variant(REV14NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev14np::Value2) + self.variant(REV14NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev14np::Value3) + self.variant(REV14NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev14np::Value4) + self.variant(REV14NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Result Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Rev15np { +pub enum REV15NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Rev15np) -> Self { + fn from(variant: REV15NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Rev15np { +impl crate::FieldSpec for REV15NP_A { type Ux = u8; } -impl crate::IsEnum for Rev15np {} +impl crate::IsEnum for REV15NP_A {} #[doc = "Field `REV15NP` reader - Service Request Node Pointer Result Event i"] -pub type Rev15npR = crate::FieldReader; -impl Rev15npR { +pub type REV15NP_R = crate::FieldReader; +impl REV15NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Rev15np::Value1), - 3 => Some(Rev15np::Value2), - 4 => Some(Rev15np::Value3), - 7 => Some(Rev15np::Value4), + 0 => Some(REV15NP_A::VALUE1), + 3 => Some(REV15NP_A::VALUE2), + 4 => Some(REV15NP_A::VALUE3), + 7 => Some(REV15NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Rev15np::Value1 + *self == REV15NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Rev15np::Value2 + *self == REV15NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Rev15np::Value3 + *self == REV15NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Rev15np::Value4 + *self == REV15NP_A::VALUE4 } } #[doc = "Field `REV15NP` writer - Service Request Node Pointer Result Event i"] -pub type Rev15npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Rev15np>; -impl<'a, REG> Rev15npW<'a, REG> +pub type REV15NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, REV15NP_A>; +impl<'a, REG> REV15NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -672,130 +672,130 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Rev15np::Value1) + self.variant(REV15NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Rev15np::Value2) + self.variant(REV15NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Rev15np::Value3) + self.variant(REV15NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Rev15np::Value4) + self.variant(REV15NP_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev8np(&self) -> Rev8npR { - Rev8npR::new((self.bits & 0x0f) as u8) + pub fn rev8np(&self) -> REV8NP_R { + REV8NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev9np(&self) -> Rev9npR { - Rev9npR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn rev9np(&self) -> REV9NP_R { + REV9NP_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev10np(&self) -> Rev10npR { - Rev10npR::new(((self.bits >> 8) & 0x0f) as u8) + pub fn rev10np(&self) -> REV10NP_R { + REV10NP_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev11np(&self) -> Rev11npR { - Rev11npR::new(((self.bits >> 12) & 0x0f) as u8) + pub fn rev11np(&self) -> REV11NP_R { + REV11NP_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev12np(&self) -> Rev12npR { - Rev12npR::new(((self.bits >> 16) & 0x0f) as u8) + pub fn rev12np(&self) -> REV12NP_R { + REV12NP_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev13np(&self) -> Rev13npR { - Rev13npR::new(((self.bits >> 20) & 0x0f) as u8) + pub fn rev13np(&self) -> REV13NP_R { + REV13NP_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev14np(&self) -> Rev14npR { - Rev14npR::new(((self.bits >> 24) & 0x0f) as u8) + pub fn rev14np(&self) -> REV14NP_R { + REV14NP_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - pub fn rev15np(&self) -> Rev15npR { - Rev15npR::new(((self.bits >> 28) & 0x0f) as u8) + pub fn rev15np(&self) -> REV15NP_R { + REV15NP_R::new(((self.bits >> 28) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev8np(&mut self) -> Rev8npW { - Rev8npW::new(self, 0) + pub fn rev8np(&mut self) -> REV8NP_W { + REV8NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev9np(&mut self) -> Rev9npW { - Rev9npW::new(self, 4) + pub fn rev9np(&mut self) -> REV9NP_W { + REV9NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev10np(&mut self) -> Rev10npW { - Rev10npW::new(self, 8) + pub fn rev10np(&mut self) -> REV10NP_W { + REV10NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev11np(&mut self) -> Rev11npW { - Rev11npW::new(self, 12) + pub fn rev11np(&mut self) -> REV11NP_W { + REV11NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev12np(&mut self) -> Rev12npW { - Rev12npW::new(self, 16) + pub fn rev12np(&mut self) -> REV12NP_W { + REV12NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev13np(&mut self) -> Rev13npW { - Rev13npW::new(self, 20) + pub fn rev13np(&mut self) -> REV13NP_W { + REV13NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev14np(&mut self) -> Rev14npW { - Rev14npW::new(self, 24) + pub fn rev14np(&mut self) -> REV14NP_W { + REV14NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] #[must_use] - pub fn rev15np(&mut self) -> Rev15npW { - Rev15npW::new(self, 28) + pub fn rev15np(&mut self) -> REV15NP_W { + REV15NP_W::new(self, 28) } } #[doc = "Result Event Node Pointer Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`revnp1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`revnp1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct Revnp1Spec; -impl crate::RegisterSpec for Revnp1Spec { +pub struct REVNP1_SPEC; +impl crate::RegisterSpec for REVNP1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`revnp1::R`](R) reader structure"] -impl crate::Readable for Revnp1Spec {} +impl crate::Readable for REVNP1_SPEC {} #[doc = "`write(|w| ..)` method takes [`revnp1::W`](W) writer structure"] -impl crate::Writable for Revnp1Spec { +impl crate::Writable for REVNP1_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets REVNP1 to value 0"] -impl crate::Resettable for Revnp1Spec { +impl crate::Resettable for REVNP1_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sefclr.rs b/src/vadc_g0/sefclr.rs index aea533b8..a4b15a0e 100644 --- a/src/vadc_g0/sefclr.rs +++ b/src/vadc_g0/sefclr.rs @@ -1,93 +1,93 @@ #[doc = "Register `SEFCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Clear Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sev0 { +pub enum SEV0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the source event flag in GxSEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sev0) -> Self { + fn from(variant: SEV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV0` writer - Clear Source Event 0/1"] -pub type Sev0W<'a, REG> = crate::BitWriter<'a, REG, Sev0>; -impl<'a, REG> Sev0W<'a, REG> +pub type SEV0_W<'a, REG> = crate::BitWriter<'a, REG, SEV0_A>; +impl<'a, REG> SEV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev0::Value1) + self.variant(SEV0_A::VALUE1) } #[doc = "Clear the source event flag in GxSEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev0::Value2) + self.variant(SEV0_A::VALUE2) } } #[doc = "Clear Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sev1 { +pub enum SEV1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Clear the source event flag in GxSEFLAG"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sev1) -> Self { + fn from(variant: SEV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV1` writer - Clear Source Event 0/1"] -pub type Sev1W<'a, REG> = crate::BitWriter<'a, REG, Sev1>; -impl<'a, REG> Sev1W<'a, REG> +pub type SEV1_W<'a, REG> = crate::BitWriter<'a, REG, SEV1_A>; +impl<'a, REG> SEV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev1::Value1) + self.variant(SEV1_A::VALUE1) } #[doc = "Clear the source event flag in GxSEFLAG"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev1::Value2) + self.variant(SEV1_A::VALUE2) } } impl W { #[doc = "Bit 0 - Clear Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev0(&mut self) -> Sev0W { - Sev0W::new(self, 0) + pub fn sev0(&mut self) -> SEV0_W { + SEV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev1(&mut self) -> Sev1W { - Sev1W::new(self, 1) + pub fn sev1(&mut self) -> SEV1_W { + SEV1_W::new(self, 1) } } #[doc = "Source Event Flag Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sefclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SefclrSpec; -impl crate::RegisterSpec for SefclrSpec { +pub struct SEFCLR_SPEC; +impl crate::RegisterSpec for SEFCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sefclr::W`](W) writer structure"] -impl crate::Writable for SefclrSpec { +impl crate::Writable for SEFCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEFCLR to value 0"] -impl crate::Resettable for SefclrSpec { +impl crate::Resettable for SEFCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/seflag.rs b/src/vadc_g0/seflag.rs index d611902a..47ee0890 100644 --- a/src/vadc_g0/seflag.rs +++ b/src/vadc_g0/seflag.rs @@ -1,153 +1,153 @@ #[doc = "Register `SEFLAG` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SEFLAG` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sev0 { +pub enum SEV0_A { #[doc = "0: No source event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A source event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sev0) -> Self { + fn from(variant: SEV0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV0` reader - Source Event 0/1"] -pub type Sev0R = crate::BitReader; -impl Sev0R { +pub type SEV0_R = crate::BitReader; +impl SEV0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sev0 { + pub const fn variant(&self) -> SEV0_A { match self.bits { - false => Sev0::Value1, - true => Sev0::Value2, + false => SEV0_A::VALUE1, + true => SEV0_A::VALUE2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sev0::Value1 + *self == SEV0_A::VALUE1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sev0::Value2 + *self == SEV0_A::VALUE2 } } #[doc = "Field `SEV0` writer - Source Event 0/1"] -pub type Sev0W<'a, REG> = crate::BitWriter<'a, REG, Sev0>; -impl<'a, REG> Sev0W<'a, REG> +pub type SEV0_W<'a, REG> = crate::BitWriter<'a, REG, SEV0_A>; +impl<'a, REG> SEV0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev0::Value1) + self.variant(SEV0_A::VALUE1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev0::Value2) + self.variant(SEV0_A::VALUE2) } } #[doc = "Source Event 0/1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Sev1 { +pub enum SEV1_A { #[doc = "0: No source event"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: A source event has occurred"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Sev1) -> Self { + fn from(variant: SEV1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `SEV1` reader - Source Event 0/1"] -pub type Sev1R = crate::BitReader; -impl Sev1R { +pub type SEV1_R = crate::BitReader; +impl SEV1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Sev1 { + pub const fn variant(&self) -> SEV1_A { match self.bits { - false => Sev1::Value1, - true => Sev1::Value2, + false => SEV1_A::VALUE1, + true => SEV1_A::VALUE2, } } #[doc = "No source event"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sev1::Value1 + *self == SEV1_A::VALUE1 } #[doc = "A source event has occurred"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sev1::Value2 + *self == SEV1_A::VALUE2 } } #[doc = "Field `SEV1` writer - Source Event 0/1"] -pub type Sev1W<'a, REG> = crate::BitWriter<'a, REG, Sev1>; -impl<'a, REG> Sev1W<'a, REG> +pub type SEV1_W<'a, REG> = crate::BitWriter<'a, REG, SEV1_A>; +impl<'a, REG> SEV1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No source event"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev1::Value1) + self.variant(SEV1_A::VALUE1) } #[doc = "A source event has occurred"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev1::Value2) + self.variant(SEV1_A::VALUE2) } } impl R { #[doc = "Bit 0 - Source Event 0/1"] #[inline(always)] - pub fn sev0(&self) -> Sev0R { - Sev0R::new((self.bits & 1) != 0) + pub fn sev0(&self) -> SEV0_R { + SEV0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Source Event 0/1"] #[inline(always)] - pub fn sev1(&self) -> Sev1R { - Sev1R::new(((self.bits >> 1) & 1) != 0) + pub fn sev1(&self) -> SEV1_R { + SEV1_R::new(((self.bits >> 1) & 1) != 0) } } impl W { #[doc = "Bit 0 - Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev0(&mut self) -> Sev0W { - Sev0W::new(self, 0) + pub fn sev0(&mut self) -> SEV0_W { + SEV0_W::new(self, 0) } #[doc = "Bit 1 - Source Event 0/1"] #[inline(always)] #[must_use] - pub fn sev1(&mut self) -> Sev1W { - Sev1W::new(self, 1) + pub fn sev1(&mut self) -> SEV1_W { + SEV1_W::new(self, 1) } } #[doc = "Source Event Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`seflag::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`seflag::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SeflagSpec; -impl crate::RegisterSpec for SeflagSpec { +pub struct SEFLAG_SPEC; +impl crate::RegisterSpec for SEFLAG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`seflag::R`](R) reader structure"] -impl crate::Readable for SeflagSpec {} +impl crate::Readable for SEFLAG_SPEC {} #[doc = "`write(|w| ..)` method takes [`seflag::W`](W) writer structure"] -impl crate::Writable for SeflagSpec { +impl crate::Writable for SEFLAG_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEFLAG to value 0"] -impl crate::Resettable for SeflagSpec { +impl crate::Resettable for SEFLAG_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sevnp.rs b/src/vadc_g0/sevnp.rs index ae4bd226..273b2815 100644 --- a/src/vadc_g0/sevnp.rs +++ b/src/vadc_g0/sevnp.rs @@ -1,68 +1,68 @@ #[doc = "Register `SEVNP` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SEVNP` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Service Request Node Pointer Source Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sev0np { +pub enum SEV0NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sev0np) -> Self { + fn from(variant: SEV0NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sev0np { +impl crate::FieldSpec for SEV0NP_A { type Ux = u8; } -impl crate::IsEnum for Sev0np {} +impl crate::IsEnum for SEV0NP_A {} #[doc = "Field `SEV0NP` reader - Service Request Node Pointer Source Event i"] -pub type Sev0npR = crate::FieldReader; -impl Sev0npR { +pub type SEV0NP_R = crate::FieldReader; +impl SEV0NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sev0np::Value1), - 3 => Some(Sev0np::Value2), - 4 => Some(Sev0np::Value3), - 7 => Some(Sev0np::Value4), + 0 => Some(SEV0NP_A::VALUE1), + 3 => Some(SEV0NP_A::VALUE2), + 4 => Some(SEV0NP_A::VALUE3), + 7 => Some(SEV0NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sev0np::Value1 + *self == SEV0NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sev0np::Value2 + *self == SEV0NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sev0np::Value3 + *self == SEV0NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sev0np::Value4 + *self == SEV0NP_A::VALUE4 } } #[doc = "Field `SEV0NP` writer - Service Request Node Pointer Source Event i"] -pub type Sev0npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev0np>; -impl<'a, REG> Sev0npW<'a, REG> +pub type SEV0NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV0NP_A>; +impl<'a, REG> SEV0NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,85 +70,85 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev0np::Value1) + self.variant(SEV0NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev0np::Value2) + self.variant(SEV0NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sev0np::Value3) + self.variant(SEV0NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Sev0np::Value4) + self.variant(SEV0NP_A::VALUE4) } } #[doc = "Service Request Node Pointer Source Event i\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Sev1np { +pub enum SEV1NP_A { #[doc = "0: Select service request line 0 of group x"] - Value1 = 0, + VALUE1 = 0, #[doc = "3: Select service request line 3 of group x"] - Value2 = 3, + VALUE2 = 3, #[doc = "4: Select shared service request line 0"] - Value3 = 4, + VALUE3 = 4, #[doc = "7: Select shared service request line 3"] - Value4 = 7, + VALUE4 = 7, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Sev1np) -> Self { + fn from(variant: SEV1NP_A) -> Self { variant as _ } } -impl crate::FieldSpec for Sev1np { +impl crate::FieldSpec for SEV1NP_A { type Ux = u8; } -impl crate::IsEnum for Sev1np {} +impl crate::IsEnum for SEV1NP_A {} #[doc = "Field `SEV1NP` reader - Service Request Node Pointer Source Event i"] -pub type Sev1npR = crate::FieldReader; -impl Sev1npR { +pub type SEV1NP_R = crate::FieldReader; +impl SEV1NP_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Option { + pub const fn variant(&self) -> Option { match self.bits { - 0 => Some(Sev1np::Value1), - 3 => Some(Sev1np::Value2), - 4 => Some(Sev1np::Value3), - 7 => Some(Sev1np::Value4), + 0 => Some(SEV1NP_A::VALUE1), + 3 => Some(SEV1NP_A::VALUE2), + 4 => Some(SEV1NP_A::VALUE3), + 7 => Some(SEV1NP_A::VALUE4), _ => None, } } #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Sev1np::Value1 + *self == SEV1NP_A::VALUE1 } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Sev1np::Value2 + *self == SEV1NP_A::VALUE2 } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Sev1np::Value3 + *self == SEV1NP_A::VALUE3 } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Sev1np::Value4 + *self == SEV1NP_A::VALUE4 } } #[doc = "Field `SEV1NP` writer - Service Request Node Pointer Source Event i"] -pub type Sev1npW<'a, REG> = crate::FieldWriter<'a, REG, 4, Sev1np>; -impl<'a, REG> Sev1npW<'a, REG> +pub type SEV1NP_W<'a, REG> = crate::FieldWriter<'a, REG, 4, SEV1NP_A>; +impl<'a, REG> SEV1NP_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -156,64 +156,64 @@ where #[doc = "Select service request line 0 of group x"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Sev1np::Value1) + self.variant(SEV1NP_A::VALUE1) } #[doc = "Select service request line 3 of group x"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Sev1np::Value2) + self.variant(SEV1NP_A::VALUE2) } #[doc = "Select shared service request line 0"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Sev1np::Value3) + self.variant(SEV1NP_A::VALUE3) } #[doc = "Select shared service request line 3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Sev1np::Value4) + self.variant(SEV1NP_A::VALUE4) } } impl R { #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"] #[inline(always)] - pub fn sev0np(&self) -> Sev0npR { - Sev0npR::new((self.bits & 0x0f) as u8) + pub fn sev0np(&self) -> SEV0NP_R { + SEV0NP_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"] #[inline(always)] - pub fn sev1np(&self) -> Sev1npR { - Sev1npR::new(((self.bits >> 4) & 0x0f) as u8) + pub fn sev1np(&self) -> SEV1NP_R { + SEV1NP_R::new(((self.bits >> 4) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"] #[inline(always)] #[must_use] - pub fn sev0np(&mut self) -> Sev0npW { - Sev0npW::new(self, 0) + pub fn sev0np(&mut self) -> SEV0NP_W { + SEV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"] #[inline(always)] #[must_use] - pub fn sev1np(&mut self) -> Sev1npW { - Sev1npW::new(self, 4) + pub fn sev1np(&mut self) -> SEV1NP_W { + SEV1NP_W::new(self, 4) } } #[doc = "Source Event Node Pointer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sevnp::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sevnp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SevnpSpec; -impl crate::RegisterSpec for SevnpSpec { +pub struct SEVNP_SPEC; +impl crate::RegisterSpec for SEVNP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`sevnp::R`](R) reader structure"] -impl crate::Readable for SevnpSpec {} +impl crate::Readable for SEVNP_SPEC {} #[doc = "`write(|w| ..)` method takes [`sevnp::W`](W) writer structure"] -impl crate::Writable for SevnpSpec { +impl crate::Writable for SEVNP_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SEVNP to value 0"] -impl crate::Resettable for SevnpSpec { +impl crate::Resettable for SEVNP_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/sract.rs b/src/vadc_g0/sract.rs index 958c1332..ea7f518e 100644 --- a/src/vadc_g0/sract.rs +++ b/src/vadc_g0/sract.rs @@ -1,315 +1,315 @@ #[doc = "Register `SRACT` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Activate Group Service Request Node 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Agsr0 { +pub enum AGSR0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Agsr0) -> Self { + fn from(variant: AGSR0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR0` writer - Activate Group Service Request Node 0"] -pub type Agsr0W<'a, REG> = crate::BitWriter<'a, REG, Agsr0>; -impl<'a, REG> Agsr0W<'a, REG> +pub type AGSR0_W<'a, REG> = crate::BitWriter<'a, REG, AGSR0_A>; +impl<'a, REG> AGSR0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Agsr0::Value1) + self.variant(AGSR0_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Agsr0::Value2) + self.variant(AGSR0_A::VALUE2) } } #[doc = "Activate Group Service Request Node 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Agsr1 { +pub enum AGSR1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Agsr1) -> Self { + fn from(variant: AGSR1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR1` writer - Activate Group Service Request Node 1"] -pub type Agsr1W<'a, REG> = crate::BitWriter<'a, REG, Agsr1>; -impl<'a, REG> Agsr1W<'a, REG> +pub type AGSR1_W<'a, REG> = crate::BitWriter<'a, REG, AGSR1_A>; +impl<'a, REG> AGSR1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Agsr1::Value1) + self.variant(AGSR1_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Agsr1::Value2) + self.variant(AGSR1_A::VALUE2) } } #[doc = "Activate Group Service Request Node 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Agsr2 { +pub enum AGSR2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Agsr2) -> Self { + fn from(variant: AGSR2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR2` writer - Activate Group Service Request Node 2"] -pub type Agsr2W<'a, REG> = crate::BitWriter<'a, REG, Agsr2>; -impl<'a, REG> Agsr2W<'a, REG> +pub type AGSR2_W<'a, REG> = crate::BitWriter<'a, REG, AGSR2_A>; +impl<'a, REG> AGSR2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Agsr2::Value1) + self.variant(AGSR2_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Agsr2::Value2) + self.variant(AGSR2_A::VALUE2) } } #[doc = "Activate Group Service Request Node 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Agsr3 { +pub enum AGSR3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Agsr3) -> Self { + fn from(variant: AGSR3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `AGSR3` writer - Activate Group Service Request Node 3"] -pub type Agsr3W<'a, REG> = crate::BitWriter<'a, REG, Agsr3>; -impl<'a, REG> Agsr3W<'a, REG> +pub type AGSR3_W<'a, REG> = crate::BitWriter<'a, REG, AGSR3_A>; +impl<'a, REG> AGSR3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Agsr3::Value1) + self.variant(AGSR3_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Agsr3::Value2) + self.variant(AGSR3_A::VALUE2) } } #[doc = "Activate Shared Service Request Node 0\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assr0 { +pub enum ASSR0_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assr0) -> Self { + fn from(variant: ASSR0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR0` writer - Activate Shared Service Request Node 0"] -pub type Assr0W<'a, REG> = crate::BitWriter<'a, REG, Assr0>; -impl<'a, REG> Assr0W<'a, REG> +pub type ASSR0_W<'a, REG> = crate::BitWriter<'a, REG, ASSR0_A>; +impl<'a, REG> ASSR0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assr0::Value1) + self.variant(ASSR0_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assr0::Value2) + self.variant(ASSR0_A::VALUE2) } } #[doc = "Activate Shared Service Request Node 1\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assr1 { +pub enum ASSR1_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assr1) -> Self { + fn from(variant: ASSR1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR1` writer - Activate Shared Service Request Node 1"] -pub type Assr1W<'a, REG> = crate::BitWriter<'a, REG, Assr1>; -impl<'a, REG> Assr1W<'a, REG> +pub type ASSR1_W<'a, REG> = crate::BitWriter<'a, REG, ASSR1_A>; +impl<'a, REG> ASSR1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assr1::Value1) + self.variant(ASSR1_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assr1::Value2) + self.variant(ASSR1_A::VALUE2) } } #[doc = "Activate Shared Service Request Node 2\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assr2 { +pub enum ASSR2_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assr2) -> Self { + fn from(variant: ASSR2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR2` writer - Activate Shared Service Request Node 2"] -pub type Assr2W<'a, REG> = crate::BitWriter<'a, REG, Assr2>; -impl<'a, REG> Assr2W<'a, REG> +pub type ASSR2_W<'a, REG> = crate::BitWriter<'a, REG, ASSR2_A>; +impl<'a, REG> ASSR2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assr2::Value1) + self.variant(ASSR2_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assr2::Value2) + self.variant(ASSR2_A::VALUE2) } } #[doc = "Activate Shared Service Request Node 3\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Assr3 { +pub enum ASSR3_A { #[doc = "0: No action"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Activate the associated service request line"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Assr3) -> Self { + fn from(variant: ASSR3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `ASSR3` writer - Activate Shared Service Request Node 3"] -pub type Assr3W<'a, REG> = crate::BitWriter<'a, REG, Assr3>; -impl<'a, REG> Assr3W<'a, REG> +pub type ASSR3_W<'a, REG> = crate::BitWriter<'a, REG, ASSR3_A>; +impl<'a, REG> ASSR3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No action"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Assr3::Value1) + self.variant(ASSR3_A::VALUE1) } #[doc = "Activate the associated service request line"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Assr3::Value2) + self.variant(ASSR3_A::VALUE2) } } impl W { #[doc = "Bit 0 - Activate Group Service Request Node 0"] #[inline(always)] #[must_use] - pub fn agsr0(&mut self) -> Agsr0W { - Agsr0W::new(self, 0) + pub fn agsr0(&mut self) -> AGSR0_W { + AGSR0_W::new(self, 0) } #[doc = "Bit 1 - Activate Group Service Request Node 1"] #[inline(always)] #[must_use] - pub fn agsr1(&mut self) -> Agsr1W { - Agsr1W::new(self, 1) + pub fn agsr1(&mut self) -> AGSR1_W { + AGSR1_W::new(self, 1) } #[doc = "Bit 2 - Activate Group Service Request Node 2"] #[inline(always)] #[must_use] - pub fn agsr2(&mut self) -> Agsr2W { - Agsr2W::new(self, 2) + pub fn agsr2(&mut self) -> AGSR2_W { + AGSR2_W::new(self, 2) } #[doc = "Bit 3 - Activate Group Service Request Node 3"] #[inline(always)] #[must_use] - pub fn agsr3(&mut self) -> Agsr3W { - Agsr3W::new(self, 3) + pub fn agsr3(&mut self) -> AGSR3_W { + AGSR3_W::new(self, 3) } #[doc = "Bit 8 - Activate Shared Service Request Node 0"] #[inline(always)] #[must_use] - pub fn assr0(&mut self) -> Assr0W { - Assr0W::new(self, 8) + pub fn assr0(&mut self) -> ASSR0_W { + ASSR0_W::new(self, 8) } #[doc = "Bit 9 - Activate Shared Service Request Node 1"] #[inline(always)] #[must_use] - pub fn assr1(&mut self) -> Assr1W { - Assr1W::new(self, 9) + pub fn assr1(&mut self) -> ASSR1_W { + ASSR1_W::new(self, 9) } #[doc = "Bit 10 - Activate Shared Service Request Node 2"] #[inline(always)] #[must_use] - pub fn assr2(&mut self) -> Assr2W { - Assr2W::new(self, 10) + pub fn assr2(&mut self) -> ASSR2_W { + ASSR2_W::new(self, 10) } #[doc = "Bit 11 - Activate Shared Service Request Node 3"] #[inline(always)] #[must_use] - pub fn assr3(&mut self) -> Assr3W { - Assr3W::new(self, 11) + pub fn assr3(&mut self) -> ASSR3_W { + ASSR3_W::new(self, 11) } } #[doc = "Service Request Software Activation Trigger\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sract::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SractSpec; -impl crate::RegisterSpec for SractSpec { +pub struct SRACT_SPEC; +impl crate::RegisterSpec for SRACT_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`sract::W`](W) writer structure"] -impl crate::Writable for SractSpec { +impl crate::Writable for SRACT_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRACT to value 0"] -impl crate::Resettable for SractSpec { +impl crate::Resettable for SRACT_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/synctr.rs b/src/vadc_g0/synctr.rs index baf3b040..c6c76ceb 100644 --- a/src/vadc_g0/synctr.rs +++ b/src/vadc_g0/synctr.rs @@ -1,68 +1,68 @@ #[doc = "Register `SYNCTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `SYNCTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Start Selection\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] -pub enum Stsel { +pub enum STSEL_A { #[doc = "0: Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Kernel is synchronization slave: Control information from input CI1"] - Value2 = 1, + VALUE2 = 1, #[doc = "2: Kernel is synchronization slave: Control information from input CI2"] - Value3 = 2, + VALUE3 = 2, #[doc = "3: Kernel is synchronization slave: Control information from input CI3"] - Value4 = 3, + VALUE4 = 3, } -impl From for u8 { +impl From for u8 { #[inline(always)] - fn from(variant: Stsel) -> Self { + fn from(variant: STSEL_A) -> Self { variant as _ } } -impl crate::FieldSpec for Stsel { +impl crate::FieldSpec for STSEL_A { type Ux = u8; } -impl crate::IsEnum for Stsel {} +impl crate::IsEnum for STSEL_A {} #[doc = "Field `STSEL` reader - Start Selection"] -pub type StselR = crate::FieldReader; -impl StselR { +pub type STSEL_R = crate::FieldReader; +impl STSEL_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Stsel { + pub const fn variant(&self) -> STSEL_A { match self.bits { - 0 => Stsel::Value1, - 1 => Stsel::Value2, - 2 => Stsel::Value3, - 3 => Stsel::Value4, + 0 => STSEL_A::VALUE1, + 1 => STSEL_A::VALUE2, + 2 => STSEL_A::VALUE3, + 3 => STSEL_A::VALUE4, _ => unreachable!(), } } #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Stsel::Value1 + *self == STSEL_A::VALUE1 } #[doc = "Kernel is synchronization slave: Control information from input CI1"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Stsel::Value2 + *self == STSEL_A::VALUE2 } #[doc = "Kernel is synchronization slave: Control information from input CI2"] #[inline(always)] pub fn is_value3(&self) -> bool { - *self == Stsel::Value3 + *self == STSEL_A::VALUE3 } #[doc = "Kernel is synchronization slave: Control information from input CI3"] #[inline(always)] pub fn is_value4(&self) -> bool { - *self == Stsel::Value4 + *self == STSEL_A::VALUE4 } } #[doc = "Field `STSEL` writer - Start Selection"] -pub type StselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Stsel, crate::Safe>; -impl<'a, REG> StselW<'a, REG> +pub type STSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2, STSEL_A, crate::Safe>; +impl<'a, REG> STSEL_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, @@ -70,245 +70,245 @@ where #[doc = "Kernel is synchronization master: Use own bitfield GxARBCFG.ANONC"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Stsel::Value1) + self.variant(STSEL_A::VALUE1) } #[doc = "Kernel is synchronization slave: Control information from input CI1"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Stsel::Value2) + self.variant(STSEL_A::VALUE2) } #[doc = "Kernel is synchronization slave: Control information from input CI2"] #[inline(always)] pub fn value3(self) -> &'a mut crate::W { - self.variant(Stsel::Value3) + self.variant(STSEL_A::VALUE3) } #[doc = "Kernel is synchronization slave: Control information from input CI3"] #[inline(always)] pub fn value4(self) -> &'a mut crate::W { - self.variant(Stsel::Value4) + self.variant(STSEL_A::VALUE4) } } #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Evalr1 { +pub enum EVALR1_A { #[doc = "0: No ready input control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Evalr1) -> Self { + fn from(variant: EVALR1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EVALR1` reader - Evaluate Ready Input Rx"] -pub type Evalr1R = crate::BitReader; -impl Evalr1R { +pub type EVALR1_R = crate::BitReader; +impl EVALR1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Evalr1 { + pub const fn variant(&self) -> EVALR1_A { match self.bits { - false => Evalr1::Value1, - true => Evalr1::Value2, + false => EVALR1_A::VALUE1, + true => EVALR1_A::VALUE2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Evalr1::Value1 + *self == EVALR1_A::VALUE1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Evalr1::Value2 + *self == EVALR1_A::VALUE2 } } #[doc = "Field `EVALR1` writer - Evaluate Ready Input Rx"] -pub type Evalr1W<'a, REG> = crate::BitWriter<'a, REG, Evalr1>; -impl<'a, REG> Evalr1W<'a, REG> +pub type EVALR1_W<'a, REG> = crate::BitWriter<'a, REG, EVALR1_A>; +impl<'a, REG> EVALR1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Evalr1::Value1) + self.variant(EVALR1_A::VALUE1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Evalr1::Value2) + self.variant(EVALR1_A::VALUE2) } } #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Evalr2 { +pub enum EVALR2_A { #[doc = "0: No ready input control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Evalr2) -> Self { + fn from(variant: EVALR2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EVALR2` reader - Evaluate Ready Input Rx"] -pub type Evalr2R = crate::BitReader; -impl Evalr2R { +pub type EVALR2_R = crate::BitReader; +impl EVALR2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Evalr2 { + pub const fn variant(&self) -> EVALR2_A { match self.bits { - false => Evalr2::Value1, - true => Evalr2::Value2, + false => EVALR2_A::VALUE1, + true => EVALR2_A::VALUE2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Evalr2::Value1 + *self == EVALR2_A::VALUE1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Evalr2::Value2 + *self == EVALR2_A::VALUE2 } } #[doc = "Field `EVALR2` writer - Evaluate Ready Input Rx"] -pub type Evalr2W<'a, REG> = crate::BitWriter<'a, REG, Evalr2>; -impl<'a, REG> Evalr2W<'a, REG> +pub type EVALR2_W<'a, REG> = crate::BitWriter<'a, REG, EVALR2_A>; +impl<'a, REG> EVALR2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Evalr2::Value1) + self.variant(EVALR2_A::VALUE1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Evalr2::Value2) + self.variant(EVALR2_A::VALUE2) } } #[doc = "Evaluate Ready Input Rx\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Evalr3 { +pub enum EVALR3_A { #[doc = "0: No ready input control"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Ready input Rx is considered for the start of a parallel conversion of this conversion group"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Evalr3) -> Self { + fn from(variant: EVALR3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `EVALR3` reader - Evaluate Ready Input Rx"] -pub type Evalr3R = crate::BitReader; -impl Evalr3R { +pub type EVALR3_R = crate::BitReader; +impl EVALR3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Evalr3 { + pub const fn variant(&self) -> EVALR3_A { match self.bits { - false => Evalr3::Value1, - true => Evalr3::Value2, + false => EVALR3_A::VALUE1, + true => EVALR3_A::VALUE2, } } #[doc = "No ready input control"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Evalr3::Value1 + *self == EVALR3_A::VALUE1 } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Evalr3::Value2 + *self == EVALR3_A::VALUE2 } } #[doc = "Field `EVALR3` writer - Evaluate Ready Input Rx"] -pub type Evalr3W<'a, REG> = crate::BitWriter<'a, REG, Evalr3>; -impl<'a, REG> Evalr3W<'a, REG> +pub type EVALR3_W<'a, REG> = crate::BitWriter<'a, REG, EVALR3_A>; +impl<'a, REG> EVALR3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "No ready input control"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Evalr3::Value1) + self.variant(EVALR3_A::VALUE1) } #[doc = "Ready input Rx is considered for the start of a parallel conversion of this conversion group"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Evalr3::Value2) + self.variant(EVALR3_A::VALUE2) } } impl R { #[doc = "Bits 0:1 - Start Selection"] #[inline(always)] - pub fn stsel(&self) -> StselR { - StselR::new((self.bits & 3) as u8) + pub fn stsel(&self) -> STSEL_R { + STSEL_R::new((self.bits & 3) as u8) } #[doc = "Bit 4 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr1(&self) -> Evalr1R { - Evalr1R::new(((self.bits >> 4) & 1) != 0) + pub fn evalr1(&self) -> EVALR1_R { + EVALR1_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr2(&self) -> Evalr2R { - Evalr2R::new(((self.bits >> 5) & 1) != 0) + pub fn evalr2(&self) -> EVALR2_R { + EVALR2_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Evaluate Ready Input Rx"] #[inline(always)] - pub fn evalr3(&self) -> Evalr3R { - Evalr3R::new(((self.bits >> 6) & 1) != 0) + pub fn evalr3(&self) -> EVALR3_R { + EVALR3_R::new(((self.bits >> 6) & 1) != 0) } } impl W { #[doc = "Bits 0:1 - Start Selection"] #[inline(always)] #[must_use] - pub fn stsel(&mut self) -> StselW { - StselW::new(self, 0) + pub fn stsel(&mut self) -> STSEL_W { + STSEL_W::new(self, 0) } #[doc = "Bit 4 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr1(&mut self) -> Evalr1W { - Evalr1W::new(self, 4) + pub fn evalr1(&mut self) -> EVALR1_W { + EVALR1_W::new(self, 4) } #[doc = "Bit 5 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr2(&mut self) -> Evalr2W { - Evalr2W::new(self, 5) + pub fn evalr2(&mut self) -> EVALR2_W { + EVALR2_W::new(self, 5) } #[doc = "Bit 6 - Evaluate Ready Input Rx"] #[inline(always)] #[must_use] - pub fn evalr3(&mut self) -> Evalr3W { - Evalr3W::new(self, 6) + pub fn evalr3(&mut self) -> EVALR3_W { + EVALR3_W::new(self, 6) } } #[doc = "Synchronization Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`synctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`synctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SynctrSpec; -impl crate::RegisterSpec for SynctrSpec { +pub struct SYNCTR_SPEC; +impl crate::RegisterSpec for SYNCTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`synctr::R`](R) reader structure"] -impl crate::Readable for SynctrSpec {} +impl crate::Readable for SYNCTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`synctr::W`](W) writer structure"] -impl crate::Writable for SynctrSpec { +impl crate::Writable for SYNCTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SYNCTR to value 0"] -impl crate::Resettable for SynctrSpec { +impl crate::Resettable for SYNCTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/vadc_g0/vfr.rs b/src/vadc_g0/vfr.rs index 26640d15..6c70df98 100644 --- a/src/vadc_g0/vfr.rs +++ b/src/vadc_g0/vfr.rs @@ -1,1049 +1,1049 @@ #[doc = "Register `VFR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `VFR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf0 { +pub enum VF0_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf0) -> Self { + fn from(variant: VF0_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF0` reader - Valid Flag of Result Register x"] -pub type Vf0R = crate::BitReader; -impl Vf0R { +pub type VF0_R = crate::BitReader; +impl VF0_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf0 { + pub const fn variant(&self) -> VF0_A { match self.bits { - false => Vf0::Value1, - true => Vf0::Value2, + false => VF0_A::VALUE1, + true => VF0_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf0::Value1 + *self == VF0_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf0::Value2 + *self == VF0_A::VALUE2 } } #[doc = "Field `VF0` writer - Valid Flag of Result Register x"] -pub type Vf0W<'a, REG> = crate::BitWriter<'a, REG, Vf0>; -impl<'a, REG> Vf0W<'a, REG> +pub type VF0_W<'a, REG> = crate::BitWriter<'a, REG, VF0_A>; +impl<'a, REG> VF0_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf0::Value1) + self.variant(VF0_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf0::Value2) + self.variant(VF0_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf1 { +pub enum VF1_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf1) -> Self { + fn from(variant: VF1_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF1` reader - Valid Flag of Result Register x"] -pub type Vf1R = crate::BitReader; -impl Vf1R { +pub type VF1_R = crate::BitReader; +impl VF1_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf1 { + pub const fn variant(&self) -> VF1_A { match self.bits { - false => Vf1::Value1, - true => Vf1::Value2, + false => VF1_A::VALUE1, + true => VF1_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf1::Value1 + *self == VF1_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf1::Value2 + *self == VF1_A::VALUE2 } } #[doc = "Field `VF1` writer - Valid Flag of Result Register x"] -pub type Vf1W<'a, REG> = crate::BitWriter<'a, REG, Vf1>; -impl<'a, REG> Vf1W<'a, REG> +pub type VF1_W<'a, REG> = crate::BitWriter<'a, REG, VF1_A>; +impl<'a, REG> VF1_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf1::Value1) + self.variant(VF1_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf1::Value2) + self.variant(VF1_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf2 { +pub enum VF2_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf2) -> Self { + fn from(variant: VF2_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF2` reader - Valid Flag of Result Register x"] -pub type Vf2R = crate::BitReader; -impl Vf2R { +pub type VF2_R = crate::BitReader; +impl VF2_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf2 { + pub const fn variant(&self) -> VF2_A { match self.bits { - false => Vf2::Value1, - true => Vf2::Value2, + false => VF2_A::VALUE1, + true => VF2_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf2::Value1 + *self == VF2_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf2::Value2 + *self == VF2_A::VALUE2 } } #[doc = "Field `VF2` writer - Valid Flag of Result Register x"] -pub type Vf2W<'a, REG> = crate::BitWriter<'a, REG, Vf2>; -impl<'a, REG> Vf2W<'a, REG> +pub type VF2_W<'a, REG> = crate::BitWriter<'a, REG, VF2_A>; +impl<'a, REG> VF2_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf2::Value1) + self.variant(VF2_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf2::Value2) + self.variant(VF2_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf3 { +pub enum VF3_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf3) -> Self { + fn from(variant: VF3_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF3` reader - Valid Flag of Result Register x"] -pub type Vf3R = crate::BitReader; -impl Vf3R { +pub type VF3_R = crate::BitReader; +impl VF3_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf3 { + pub const fn variant(&self) -> VF3_A { match self.bits { - false => Vf3::Value1, - true => Vf3::Value2, + false => VF3_A::VALUE1, + true => VF3_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf3::Value1 + *self == VF3_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf3::Value2 + *self == VF3_A::VALUE2 } } #[doc = "Field `VF3` writer - Valid Flag of Result Register x"] -pub type Vf3W<'a, REG> = crate::BitWriter<'a, REG, Vf3>; -impl<'a, REG> Vf3W<'a, REG> +pub type VF3_W<'a, REG> = crate::BitWriter<'a, REG, VF3_A>; +impl<'a, REG> VF3_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf3::Value1) + self.variant(VF3_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf3::Value2) + self.variant(VF3_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf4 { +pub enum VF4_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf4) -> Self { + fn from(variant: VF4_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF4` reader - Valid Flag of Result Register x"] -pub type Vf4R = crate::BitReader; -impl Vf4R { +pub type VF4_R = crate::BitReader; +impl VF4_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf4 { + pub const fn variant(&self) -> VF4_A { match self.bits { - false => Vf4::Value1, - true => Vf4::Value2, + false => VF4_A::VALUE1, + true => VF4_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf4::Value1 + *self == VF4_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf4::Value2 + *self == VF4_A::VALUE2 } } #[doc = "Field `VF4` writer - Valid Flag of Result Register x"] -pub type Vf4W<'a, REG> = crate::BitWriter<'a, REG, Vf4>; -impl<'a, REG> Vf4W<'a, REG> +pub type VF4_W<'a, REG> = crate::BitWriter<'a, REG, VF4_A>; +impl<'a, REG> VF4_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf4::Value1) + self.variant(VF4_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf4::Value2) + self.variant(VF4_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf5 { +pub enum VF5_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf5) -> Self { + fn from(variant: VF5_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF5` reader - Valid Flag of Result Register x"] -pub type Vf5R = crate::BitReader; -impl Vf5R { +pub type VF5_R = crate::BitReader; +impl VF5_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf5 { + pub const fn variant(&self) -> VF5_A { match self.bits { - false => Vf5::Value1, - true => Vf5::Value2, + false => VF5_A::VALUE1, + true => VF5_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf5::Value1 + *self == VF5_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf5::Value2 + *self == VF5_A::VALUE2 } } #[doc = "Field `VF5` writer - Valid Flag of Result Register x"] -pub type Vf5W<'a, REG> = crate::BitWriter<'a, REG, Vf5>; -impl<'a, REG> Vf5W<'a, REG> +pub type VF5_W<'a, REG> = crate::BitWriter<'a, REG, VF5_A>; +impl<'a, REG> VF5_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf5::Value1) + self.variant(VF5_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf5::Value2) + self.variant(VF5_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf6 { +pub enum VF6_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf6) -> Self { + fn from(variant: VF6_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF6` reader - Valid Flag of Result Register x"] -pub type Vf6R = crate::BitReader; -impl Vf6R { +pub type VF6_R = crate::BitReader; +impl VF6_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf6 { + pub const fn variant(&self) -> VF6_A { match self.bits { - false => Vf6::Value1, - true => Vf6::Value2, + false => VF6_A::VALUE1, + true => VF6_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf6::Value1 + *self == VF6_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf6::Value2 + *self == VF6_A::VALUE2 } } #[doc = "Field `VF6` writer - Valid Flag of Result Register x"] -pub type Vf6W<'a, REG> = crate::BitWriter<'a, REG, Vf6>; -impl<'a, REG> Vf6W<'a, REG> +pub type VF6_W<'a, REG> = crate::BitWriter<'a, REG, VF6_A>; +impl<'a, REG> VF6_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf6::Value1) + self.variant(VF6_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf6::Value2) + self.variant(VF6_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf7 { +pub enum VF7_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf7) -> Self { + fn from(variant: VF7_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF7` reader - Valid Flag of Result Register x"] -pub type Vf7R = crate::BitReader; -impl Vf7R { +pub type VF7_R = crate::BitReader; +impl VF7_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf7 { + pub const fn variant(&self) -> VF7_A { match self.bits { - false => Vf7::Value1, - true => Vf7::Value2, + false => VF7_A::VALUE1, + true => VF7_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf7::Value1 + *self == VF7_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf7::Value2 + *self == VF7_A::VALUE2 } } #[doc = "Field `VF7` writer - Valid Flag of Result Register x"] -pub type Vf7W<'a, REG> = crate::BitWriter<'a, REG, Vf7>; -impl<'a, REG> Vf7W<'a, REG> +pub type VF7_W<'a, REG> = crate::BitWriter<'a, REG, VF7_A>; +impl<'a, REG> VF7_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf7::Value1) + self.variant(VF7_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf7::Value2) + self.variant(VF7_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf8 { +pub enum VF8_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf8) -> Self { + fn from(variant: VF8_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF8` reader - Valid Flag of Result Register x"] -pub type Vf8R = crate::BitReader; -impl Vf8R { +pub type VF8_R = crate::BitReader; +impl VF8_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf8 { + pub const fn variant(&self) -> VF8_A { match self.bits { - false => Vf8::Value1, - true => Vf8::Value2, + false => VF8_A::VALUE1, + true => VF8_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf8::Value1 + *self == VF8_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf8::Value2 + *self == VF8_A::VALUE2 } } #[doc = "Field `VF8` writer - Valid Flag of Result Register x"] -pub type Vf8W<'a, REG> = crate::BitWriter<'a, REG, Vf8>; -impl<'a, REG> Vf8W<'a, REG> +pub type VF8_W<'a, REG> = crate::BitWriter<'a, REG, VF8_A>; +impl<'a, REG> VF8_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf8::Value1) + self.variant(VF8_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf8::Value2) + self.variant(VF8_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf9 { +pub enum VF9_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf9) -> Self { + fn from(variant: VF9_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF9` reader - Valid Flag of Result Register x"] -pub type Vf9R = crate::BitReader; -impl Vf9R { +pub type VF9_R = crate::BitReader; +impl VF9_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf9 { + pub const fn variant(&self) -> VF9_A { match self.bits { - false => Vf9::Value1, - true => Vf9::Value2, + false => VF9_A::VALUE1, + true => VF9_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf9::Value1 + *self == VF9_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf9::Value2 + *self == VF9_A::VALUE2 } } #[doc = "Field `VF9` writer - Valid Flag of Result Register x"] -pub type Vf9W<'a, REG> = crate::BitWriter<'a, REG, Vf9>; -impl<'a, REG> Vf9W<'a, REG> +pub type VF9_W<'a, REG> = crate::BitWriter<'a, REG, VF9_A>; +impl<'a, REG> VF9_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf9::Value1) + self.variant(VF9_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf9::Value2) + self.variant(VF9_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf10 { +pub enum VF10_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf10) -> Self { + fn from(variant: VF10_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF10` reader - Valid Flag of Result Register x"] -pub type Vf10R = crate::BitReader; -impl Vf10R { +pub type VF10_R = crate::BitReader; +impl VF10_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf10 { + pub const fn variant(&self) -> VF10_A { match self.bits { - false => Vf10::Value1, - true => Vf10::Value2, + false => VF10_A::VALUE1, + true => VF10_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf10::Value1 + *self == VF10_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf10::Value2 + *self == VF10_A::VALUE2 } } #[doc = "Field `VF10` writer - Valid Flag of Result Register x"] -pub type Vf10W<'a, REG> = crate::BitWriter<'a, REG, Vf10>; -impl<'a, REG> Vf10W<'a, REG> +pub type VF10_W<'a, REG> = crate::BitWriter<'a, REG, VF10_A>; +impl<'a, REG> VF10_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf10::Value1) + self.variant(VF10_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf10::Value2) + self.variant(VF10_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf11 { +pub enum VF11_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf11) -> Self { + fn from(variant: VF11_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF11` reader - Valid Flag of Result Register x"] -pub type Vf11R = crate::BitReader; -impl Vf11R { +pub type VF11_R = crate::BitReader; +impl VF11_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf11 { + pub const fn variant(&self) -> VF11_A { match self.bits { - false => Vf11::Value1, - true => Vf11::Value2, + false => VF11_A::VALUE1, + true => VF11_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf11::Value1 + *self == VF11_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf11::Value2 + *self == VF11_A::VALUE2 } } #[doc = "Field `VF11` writer - Valid Flag of Result Register x"] -pub type Vf11W<'a, REG> = crate::BitWriter<'a, REG, Vf11>; -impl<'a, REG> Vf11W<'a, REG> +pub type VF11_W<'a, REG> = crate::BitWriter<'a, REG, VF11_A>; +impl<'a, REG> VF11_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf11::Value1) + self.variant(VF11_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf11::Value2) + self.variant(VF11_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf12 { +pub enum VF12_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf12) -> Self { + fn from(variant: VF12_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF12` reader - Valid Flag of Result Register x"] -pub type Vf12R = crate::BitReader; -impl Vf12R { +pub type VF12_R = crate::BitReader; +impl VF12_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf12 { + pub const fn variant(&self) -> VF12_A { match self.bits { - false => Vf12::Value1, - true => Vf12::Value2, + false => VF12_A::VALUE1, + true => VF12_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf12::Value1 + *self == VF12_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf12::Value2 + *self == VF12_A::VALUE2 } } #[doc = "Field `VF12` writer - Valid Flag of Result Register x"] -pub type Vf12W<'a, REG> = crate::BitWriter<'a, REG, Vf12>; -impl<'a, REG> Vf12W<'a, REG> +pub type VF12_W<'a, REG> = crate::BitWriter<'a, REG, VF12_A>; +impl<'a, REG> VF12_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf12::Value1) + self.variant(VF12_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf12::Value2) + self.variant(VF12_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf13 { +pub enum VF13_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf13) -> Self { + fn from(variant: VF13_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF13` reader - Valid Flag of Result Register x"] -pub type Vf13R = crate::BitReader; -impl Vf13R { +pub type VF13_R = crate::BitReader; +impl VF13_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf13 { + pub const fn variant(&self) -> VF13_A { match self.bits { - false => Vf13::Value1, - true => Vf13::Value2, + false => VF13_A::VALUE1, + true => VF13_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf13::Value1 + *self == VF13_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf13::Value2 + *self == VF13_A::VALUE2 } } #[doc = "Field `VF13` writer - Valid Flag of Result Register x"] -pub type Vf13W<'a, REG> = crate::BitWriter<'a, REG, Vf13>; -impl<'a, REG> Vf13W<'a, REG> +pub type VF13_W<'a, REG> = crate::BitWriter<'a, REG, VF13_A>; +impl<'a, REG> VF13_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf13::Value1) + self.variant(VF13_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf13::Value2) + self.variant(VF13_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf14 { +pub enum VF14_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf14) -> Self { + fn from(variant: VF14_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF14` reader - Valid Flag of Result Register x"] -pub type Vf14R = crate::BitReader; -impl Vf14R { +pub type VF14_R = crate::BitReader; +impl VF14_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf14 { + pub const fn variant(&self) -> VF14_A { match self.bits { - false => Vf14::Value1, - true => Vf14::Value2, + false => VF14_A::VALUE1, + true => VF14_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf14::Value1 + *self == VF14_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf14::Value2 + *self == VF14_A::VALUE2 } } #[doc = "Field `VF14` writer - Valid Flag of Result Register x"] -pub type Vf14W<'a, REG> = crate::BitWriter<'a, REG, Vf14>; -impl<'a, REG> Vf14W<'a, REG> +pub type VF14_W<'a, REG> = crate::BitWriter<'a, REG, VF14_A>; +impl<'a, REG> VF14_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf14::Value1) + self.variant(VF14_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf14::Value2) + self.variant(VF14_A::VALUE2) } } #[doc = "Valid Flag of Result Register x\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq, Eq)] -pub enum Vf15 { +pub enum VF15_A { #[doc = "0: Read access: No new valid data available Write access: No effect"] - Value1 = 0, + VALUE1 = 0, #[doc = "1: Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] - Value2 = 1, + VALUE2 = 1, } -impl From for bool { +impl From for bool { #[inline(always)] - fn from(variant: Vf15) -> Self { + fn from(variant: VF15_A) -> Self { variant as u8 != 0 } } #[doc = "Field `VF15` reader - Valid Flag of Result Register x"] -pub type Vf15R = crate::BitReader; -impl Vf15R { +pub type VF15_R = crate::BitReader; +impl VF15_R { #[doc = "Get enumerated values variant"] #[inline(always)] - pub const fn variant(&self) -> Vf15 { + pub const fn variant(&self) -> VF15_A { match self.bits { - false => Vf15::Value1, - true => Vf15::Value2, + false => VF15_A::VALUE1, + true => VF15_A::VALUE2, } } #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn is_value1(&self) -> bool { - *self == Vf15::Value1 + *self == VF15_A::VALUE1 } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn is_value2(&self) -> bool { - *self == Vf15::Value2 + *self == VF15_A::VALUE2 } } #[doc = "Field `VF15` writer - Valid Flag of Result Register x"] -pub type Vf15W<'a, REG> = crate::BitWriter<'a, REG, Vf15>; -impl<'a, REG> Vf15W<'a, REG> +pub type VF15_W<'a, REG> = crate::BitWriter<'a, REG, VF15_A>; +impl<'a, REG> VF15_W<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { #[doc = "Read access: No new valid data available Write access: No effect"] #[inline(always)] pub fn value1(self) -> &'a mut crate::W { - self.variant(Vf15::Value1) + self.variant(VF15_A::VALUE1) } #[doc = "Read access: Result register x contains valid data and has not yet been read, or bit FCR has been updated Write access: Clear this valid flag and bitfield DRC in register GxRESy (overrides a hardware set action)"] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { - self.variant(Vf15::Value2) + self.variant(VF15_A::VALUE2) } } impl R { #[doc = "Bit 0 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf0(&self) -> Vf0R { - Vf0R::new((self.bits & 1) != 0) + pub fn vf0(&self) -> VF0_R { + VF0_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf1(&self) -> Vf1R { - Vf1R::new(((self.bits >> 1) & 1) != 0) + pub fn vf1(&self) -> VF1_R { + VF1_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 2 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf2(&self) -> Vf2R { - Vf2R::new(((self.bits >> 2) & 1) != 0) + pub fn vf2(&self) -> VF2_R { + VF2_R::new(((self.bits >> 2) & 1) != 0) } #[doc = "Bit 3 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf3(&self) -> Vf3R { - Vf3R::new(((self.bits >> 3) & 1) != 0) + pub fn vf3(&self) -> VF3_R { + VF3_R::new(((self.bits >> 3) & 1) != 0) } #[doc = "Bit 4 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf4(&self) -> Vf4R { - Vf4R::new(((self.bits >> 4) & 1) != 0) + pub fn vf4(&self) -> VF4_R { + VF4_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bit 5 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf5(&self) -> Vf5R { - Vf5R::new(((self.bits >> 5) & 1) != 0) + pub fn vf5(&self) -> VF5_R { + VF5_R::new(((self.bits >> 5) & 1) != 0) } #[doc = "Bit 6 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf6(&self) -> Vf6R { - Vf6R::new(((self.bits >> 6) & 1) != 0) + pub fn vf6(&self) -> VF6_R { + VF6_R::new(((self.bits >> 6) & 1) != 0) } #[doc = "Bit 7 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf7(&self) -> Vf7R { - Vf7R::new(((self.bits >> 7) & 1) != 0) + pub fn vf7(&self) -> VF7_R { + VF7_R::new(((self.bits >> 7) & 1) != 0) } #[doc = "Bit 8 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf8(&self) -> Vf8R { - Vf8R::new(((self.bits >> 8) & 1) != 0) + pub fn vf8(&self) -> VF8_R { + VF8_R::new(((self.bits >> 8) & 1) != 0) } #[doc = "Bit 9 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf9(&self) -> Vf9R { - Vf9R::new(((self.bits >> 9) & 1) != 0) + pub fn vf9(&self) -> VF9_R { + VF9_R::new(((self.bits >> 9) & 1) != 0) } #[doc = "Bit 10 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf10(&self) -> Vf10R { - Vf10R::new(((self.bits >> 10) & 1) != 0) + pub fn vf10(&self) -> VF10_R { + VF10_R::new(((self.bits >> 10) & 1) != 0) } #[doc = "Bit 11 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf11(&self) -> Vf11R { - Vf11R::new(((self.bits >> 11) & 1) != 0) + pub fn vf11(&self) -> VF11_R { + VF11_R::new(((self.bits >> 11) & 1) != 0) } #[doc = "Bit 12 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf12(&self) -> Vf12R { - Vf12R::new(((self.bits >> 12) & 1) != 0) + pub fn vf12(&self) -> VF12_R { + VF12_R::new(((self.bits >> 12) & 1) != 0) } #[doc = "Bit 13 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf13(&self) -> Vf13R { - Vf13R::new(((self.bits >> 13) & 1) != 0) + pub fn vf13(&self) -> VF13_R { + VF13_R::new(((self.bits >> 13) & 1) != 0) } #[doc = "Bit 14 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf14(&self) -> Vf14R { - Vf14R::new(((self.bits >> 14) & 1) != 0) + pub fn vf14(&self) -> VF14_R { + VF14_R::new(((self.bits >> 14) & 1) != 0) } #[doc = "Bit 15 - Valid Flag of Result Register x"] #[inline(always)] - pub fn vf15(&self) -> Vf15R { - Vf15R::new(((self.bits >> 15) & 1) != 0) + pub fn vf15(&self) -> VF15_R { + VF15_R::new(((self.bits >> 15) & 1) != 0) } } impl W { #[doc = "Bit 0 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf0(&mut self) -> Vf0W { - Vf0W::new(self, 0) + pub fn vf0(&mut self) -> VF0_W { + VF0_W::new(self, 0) } #[doc = "Bit 1 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf1(&mut self) -> Vf1W { - Vf1W::new(self, 1) + pub fn vf1(&mut self) -> VF1_W { + VF1_W::new(self, 1) } #[doc = "Bit 2 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf2(&mut self) -> Vf2W { - Vf2W::new(self, 2) + pub fn vf2(&mut self) -> VF2_W { + VF2_W::new(self, 2) } #[doc = "Bit 3 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf3(&mut self) -> Vf3W { - Vf3W::new(self, 3) + pub fn vf3(&mut self) -> VF3_W { + VF3_W::new(self, 3) } #[doc = "Bit 4 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf4(&mut self) -> Vf4W { - Vf4W::new(self, 4) + pub fn vf4(&mut self) -> VF4_W { + VF4_W::new(self, 4) } #[doc = "Bit 5 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf5(&mut self) -> Vf5W { - Vf5W::new(self, 5) + pub fn vf5(&mut self) -> VF5_W { + VF5_W::new(self, 5) } #[doc = "Bit 6 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf6(&mut self) -> Vf6W { - Vf6W::new(self, 6) + pub fn vf6(&mut self) -> VF6_W { + VF6_W::new(self, 6) } #[doc = "Bit 7 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf7(&mut self) -> Vf7W { - Vf7W::new(self, 7) + pub fn vf7(&mut self) -> VF7_W { + VF7_W::new(self, 7) } #[doc = "Bit 8 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf8(&mut self) -> Vf8W { - Vf8W::new(self, 8) + pub fn vf8(&mut self) -> VF8_W { + VF8_W::new(self, 8) } #[doc = "Bit 9 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf9(&mut self) -> Vf9W { - Vf9W::new(self, 9) + pub fn vf9(&mut self) -> VF9_W { + VF9_W::new(self, 9) } #[doc = "Bit 10 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf10(&mut self) -> Vf10W { - Vf10W::new(self, 10) + pub fn vf10(&mut self) -> VF10_W { + VF10_W::new(self, 10) } #[doc = "Bit 11 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf11(&mut self) -> Vf11W { - Vf11W::new(self, 11) + pub fn vf11(&mut self) -> VF11_W { + VF11_W::new(self, 11) } #[doc = "Bit 12 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf12(&mut self) -> Vf12W { - Vf12W::new(self, 12) + pub fn vf12(&mut self) -> VF12_W { + VF12_W::new(self, 12) } #[doc = "Bit 13 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf13(&mut self) -> Vf13W { - Vf13W::new(self, 13) + pub fn vf13(&mut self) -> VF13_W { + VF13_W::new(self, 13) } #[doc = "Bit 14 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf14(&mut self) -> Vf14W { - Vf14W::new(self, 14) + pub fn vf14(&mut self) -> VF14_W { + VF14_W::new(self, 14) } #[doc = "Bit 15 - Valid Flag of Result Register x"] #[inline(always)] #[must_use] - pub fn vf15(&mut self) -> Vf15W { - Vf15W::new(self, 15) + pub fn vf15(&mut self) -> VF15_W { + VF15_W::new(self, 15) } } #[doc = "Valid Flag Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vfr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vfr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct VfrSpec; -impl crate::RegisterSpec for VfrSpec { +pub struct VFR_SPEC; +impl crate::RegisterSpec for VFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`vfr::R`](R) reader structure"] -impl crate::Readable for VfrSpec {} +impl crate::Readable for VFR_SPEC {} #[doc = "`write(|w| ..)` method takes [`vfr::W`](W) writer structure"] -impl crate::Writable for VfrSpec { +impl crate::Writable for VFR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets VFR to value 0"] -impl crate::Resettable for VfrSpec { +impl crate::Resettable for VFR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt.rs b/src/wdt.rs index 43925458..6e0a7382 100644 --- a/src/wdt.rs +++ b/src/wdt.rs @@ -1,102 +1,94 @@ #[repr(C)] #[doc = "Register block"] pub struct RegisterBlock { - id: Id, - ctr: Ctr, - srv: Srv, - tim: Tim, - wlb: Wlb, - wub: Wub, - wdtsts: Wdtsts, - wdtclr: Wdtclr, + id: ID, + ctr: CTR, + srv: SRV, + tim: TIM, + wlb: WLB, + wub: WUB, + wdtsts: WDTSTS, + wdtclr: WDTCLR, } impl RegisterBlock { #[doc = "0x00 - WDT ID Register"] #[inline(always)] - pub const fn id(&self) -> &Id { + pub const fn id(&self) -> &ID { &self.id } #[doc = "0x04 - WDT Control Register"] #[inline(always)] - pub const fn ctr(&self) -> &Ctr { + pub const fn ctr(&self) -> &CTR { &self.ctr } #[doc = "0x08 - WDT Service Register"] #[inline(always)] - pub const fn srv(&self) -> &Srv { + pub const fn srv(&self) -> &SRV { &self.srv } #[doc = "0x0c - WDT Timer Register"] #[inline(always)] - pub const fn tim(&self) -> &Tim { + pub const fn tim(&self) -> &TIM { &self.tim } #[doc = "0x10 - WDT Window Lower Bound Register"] #[inline(always)] - pub const fn wlb(&self) -> &Wlb { + pub const fn wlb(&self) -> &WLB { &self.wlb } #[doc = "0x14 - WDT Window Upper Bound Register"] #[inline(always)] - pub const fn wub(&self) -> &Wub { + pub const fn wub(&self) -> &WUB { &self.wub } #[doc = "0x18 - WDT Status Register"] #[inline(always)] - pub const fn wdtsts(&self) -> &Wdtsts { + pub const fn wdtsts(&self) -> &WDTSTS { &self.wdtsts } #[doc = "0x1c - WDT Clear Register"] #[inline(always)] - pub const fn wdtclr(&self) -> &Wdtclr { + pub const fn wdtclr(&self) -> &WDTCLR { &self.wdtclr } } #[doc = "ID (r) register accessor: WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@id`] module"] -#[doc(alias = "ID")] -pub type Id = crate::Reg; +pub type ID = crate::Reg; #[doc = "WDT ID Register"] pub mod id; #[doc = "CTR (rw) register accessor: WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctr`] module"] -#[doc(alias = "CTR")] -pub type Ctr = crate::Reg; +pub type CTR = crate::Reg; #[doc = "WDT Control Register"] pub mod ctr; #[doc = "SRV (w) register accessor: WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@srv`] module"] -#[doc(alias = "SRV")] -pub type Srv = crate::Reg; +pub type SRV = crate::Reg; #[doc = "WDT Service Register"] pub mod srv; #[doc = "TIM (r) register accessor: WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tim`] module"] -#[doc(alias = "TIM")] -pub type Tim = crate::Reg; +pub type TIM = crate::Reg; #[doc = "WDT Timer Register"] pub mod tim; #[doc = "WLB (rw) register accessor: WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wlb`] module"] -#[doc(alias = "WLB")] -pub type Wlb = crate::Reg; +pub type WLB = crate::Reg; #[doc = "WDT Window Lower Bound Register"] pub mod wlb; #[doc = "WUB (rw) register accessor: WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wub`] module"] -#[doc(alias = "WUB")] -pub type Wub = crate::Reg; +pub type WUB = crate::Reg; #[doc = "WDT Window Upper Bound Register"] pub mod wub; #[doc = "WDTSTS (r) register accessor: WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtsts`] module"] -#[doc(alias = "WDTSTS")] -pub type Wdtsts = crate::Reg; +pub type WDTSTS = crate::Reg; #[doc = "WDT Status Register"] pub mod wdtsts; #[doc = "WDTCLR (w) register accessor: WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdtclr`] module"] -#[doc(alias = "WDTCLR")] -pub type Wdtclr = crate::Reg; +pub type WDTCLR = crate::Reg; #[doc = "WDT Clear Register"] pub mod wdtclr; diff --git a/src/wdt/ctr.rs b/src/wdt/ctr.rs index 8529cf4b..22dd3335 100644 --- a/src/wdt/ctr.rs +++ b/src/wdt/ctr.rs @@ -1,85 +1,85 @@ #[doc = "Register `CTR` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `CTR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ENB` reader - Enable"] -pub type EnbR = crate::BitReader; +pub type ENB_R = crate::BitReader; #[doc = "Field `ENB` writer - Enable"] -pub type EnbW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ENB_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `PRE` reader - Pre-warning"] -pub type PreR = crate::BitReader; +pub type PRE_R = crate::BitReader; #[doc = "Field `PRE` writer - Pre-warning"] -pub type PreW<'a, REG> = crate::BitWriter<'a, REG>; +pub type PRE_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `DSP` reader - Debug Suspend"] -pub type DspR = crate::BitReader; +pub type DSP_R = crate::BitReader; #[doc = "Field `DSP` writer - Debug Suspend"] -pub type DspW<'a, REG> = crate::BitWriter<'a, REG>; +pub type DSP_W<'a, REG> = crate::BitWriter<'a, REG>; #[doc = "Field `SPW` reader - Service Indication Pulse Width"] -pub type SpwR = crate::FieldReader; +pub type SPW_R = crate::FieldReader; #[doc = "Field `SPW` writer - Service Indication Pulse Width"] -pub type SpwW<'a, REG> = crate::FieldWriter<'a, REG, 8>; +pub type SPW_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl R { #[doc = "Bit 0 - Enable"] #[inline(always)] - pub fn enb(&self) -> EnbR { - EnbR::new((self.bits & 1) != 0) + pub fn enb(&self) -> ENB_R { + ENB_R::new((self.bits & 1) != 0) } #[doc = "Bit 1 - Pre-warning"] #[inline(always)] - pub fn pre(&self) -> PreR { - PreR::new(((self.bits >> 1) & 1) != 0) + pub fn pre(&self) -> PRE_R { + PRE_R::new(((self.bits >> 1) & 1) != 0) } #[doc = "Bit 4 - Debug Suspend"] #[inline(always)] - pub fn dsp(&self) -> DspR { - DspR::new(((self.bits >> 4) & 1) != 0) + pub fn dsp(&self) -> DSP_R { + DSP_R::new(((self.bits >> 4) & 1) != 0) } #[doc = "Bits 8:15 - Service Indication Pulse Width"] #[inline(always)] - pub fn spw(&self) -> SpwR { - SpwR::new(((self.bits >> 8) & 0xff) as u8) + pub fn spw(&self) -> SPW_R { + SPW_R::new(((self.bits >> 8) & 0xff) as u8) } } impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] #[must_use] - pub fn enb(&mut self) -> EnbW { - EnbW::new(self, 0) + pub fn enb(&mut self) -> ENB_W { + ENB_W::new(self, 0) } #[doc = "Bit 1 - Pre-warning"] #[inline(always)] #[must_use] - pub fn pre(&mut self) -> PreW { - PreW::new(self, 1) + pub fn pre(&mut self) -> PRE_W { + PRE_W::new(self, 1) } #[doc = "Bit 4 - Debug Suspend"] #[inline(always)] #[must_use] - pub fn dsp(&mut self) -> DspW { - DspW::new(self, 4) + pub fn dsp(&mut self) -> DSP_W { + DSP_W::new(self, 4) } #[doc = "Bits 8:15 - Service Indication Pulse Width"] #[inline(always)] #[must_use] - pub fn spw(&mut self) -> SpwW { - SpwW::new(self, 8) + pub fn spw(&mut self) -> SPW_W { + SPW_W::new(self, 8) } } #[doc = "WDT Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct CtrSpec; -impl crate::RegisterSpec for CtrSpec { +pub struct CTR_SPEC; +impl crate::RegisterSpec for CTR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`ctr::R`](R) reader structure"] -impl crate::Readable for CtrSpec {} +impl crate::Readable for CTR_SPEC {} #[doc = "`write(|w| ..)` method takes [`ctr::W`](W) writer structure"] -impl crate::Writable for CtrSpec { +impl crate::Writable for CTR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets CTR to value 0"] -impl crate::Resettable for CtrSpec { +impl crate::Resettable for CTR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/id.rs b/src/wdt/id.rs index 31284eef..aff37fe6 100644 --- a/src/wdt/id.rs +++ b/src/wdt/id.rs @@ -1,36 +1,36 @@ #[doc = "Register `ID` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `MOD_REV` reader - Module Revision"] -pub type ModRevR = crate::FieldReader; +pub type MOD_REV_R = crate::FieldReader; #[doc = "Field `MOD_TYPE` reader - Module Type"] -pub type ModTypeR = crate::FieldReader; +pub type MOD_TYPE_R = crate::FieldReader; #[doc = "Field `MOD_NUMBER` reader - Module Number"] -pub type ModNumberR = crate::FieldReader; +pub type MOD_NUMBER_R = crate::FieldReader; impl R { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - pub fn mod_rev(&self) -> ModRevR { - ModRevR::new((self.bits & 0xff) as u8) + pub fn mod_rev(&self) -> MOD_REV_R { + MOD_REV_R::new((self.bits & 0xff) as u8) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - pub fn mod_type(&self) -> ModTypeR { - ModTypeR::new(((self.bits >> 8) & 0xff) as u8) + pub fn mod_type(&self) -> MOD_TYPE_R { + MOD_TYPE_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - pub fn mod_number(&self) -> ModNumberR { - ModNumberR::new(((self.bits >> 16) & 0xffff) as u16) + pub fn mod_number(&self) -> MOD_NUMBER_R { + MOD_NUMBER_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "WDT ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct IdSpec; -impl crate::RegisterSpec for IdSpec { +pub struct ID_SPEC; +impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`id::R`](R) reader structure"] -impl crate::Readable for IdSpec {} +impl crate::Readable for ID_SPEC {} #[doc = "`reset()` method sets ID to value 0x00ad_c000"] -impl crate::Resettable for IdSpec { +impl crate::Resettable for ID_SPEC { const RESET_VALUE: u32 = 0x00ad_c000; } diff --git a/src/wdt/srv.rs b/src/wdt/srv.rs index e8896284..abc4d917 100644 --- a/src/wdt/srv.rs +++ b/src/wdt/srv.rs @@ -1,27 +1,27 @@ #[doc = "Register `SRV` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `SRV` writer - Service"] -pub type SrvW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type SRV_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Service"] #[inline(always)] #[must_use] - pub fn srv(&mut self) -> SrvW { - SrvW::new(self, 0) + pub fn srv(&mut self) -> SRV_W { + SRV_W::new(self, 0) } } #[doc = "WDT Service Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`srv::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct SrvSpec; -impl crate::RegisterSpec for SrvSpec { +pub struct SRV_SPEC; +impl crate::RegisterSpec for SRV_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`srv::W`](W) writer structure"] -impl crate::Writable for SrvSpec { +impl crate::Writable for SRV_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets SRV to value 0"] -impl crate::Resettable for SrvSpec { +impl crate::Resettable for SRV_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/tim.rs b/src/wdt/tim.rs index 5ca28317..1c2e5b06 100644 --- a/src/wdt/tim.rs +++ b/src/wdt/tim.rs @@ -1,22 +1,22 @@ #[doc = "Register `TIM` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `TIM` reader - Timer Value"] -pub type TimR = crate::FieldReader; +pub type TIM_R = crate::FieldReader; impl R { #[doc = "Bits 0:31 - Timer Value"] #[inline(always)] - pub fn tim(&self) -> TimR { - TimR::new(self.bits) + pub fn tim(&self) -> TIM_R { + TIM_R::new(self.bits) } } #[doc = "WDT Timer Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct TimSpec; -impl crate::RegisterSpec for TimSpec { +pub struct TIM_SPEC; +impl crate::RegisterSpec for TIM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`tim::R`](R) reader structure"] -impl crate::Readable for TimSpec {} +impl crate::Readable for TIM_SPEC {} #[doc = "`reset()` method sets TIM to value 0"] -impl crate::Resettable for TimSpec { +impl crate::Resettable for TIM_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wdtclr.rs b/src/wdt/wdtclr.rs index 61bb919f..ab1c5fdf 100644 --- a/src/wdt/wdtclr.rs +++ b/src/wdt/wdtclr.rs @@ -1,27 +1,27 @@ #[doc = "Register `WDTCLR` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `ALMC` writer - Pre-warning Alarm"] -pub type AlmcW<'a, REG> = crate::BitWriter<'a, REG>; +pub type ALMC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Pre-warning Alarm"] #[inline(always)] #[must_use] - pub fn almc(&mut self) -> AlmcW { - AlmcW::new(self, 0) + pub fn almc(&mut self) -> ALMC_W { + ALMC_W::new(self, 0) } } #[doc = "WDT Clear Register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdtclr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WdtclrSpec; -impl crate::RegisterSpec for WdtclrSpec { +pub struct WDTCLR_SPEC; +impl crate::RegisterSpec for WDTCLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [`wdtclr::W`](W) writer structure"] -impl crate::Writable for WdtclrSpec { +impl crate::Writable for WDTCLR_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WDTCLR to value 0"] -impl crate::Resettable for WdtclrSpec { +impl crate::Resettable for WDTCLR_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wdtsts.rs b/src/wdt/wdtsts.rs index d5f03a5d..99190fa2 100644 --- a/src/wdt/wdtsts.rs +++ b/src/wdt/wdtsts.rs @@ -1,22 +1,22 @@ #[doc = "Register `WDTSTS` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Field `ALMS` reader - Pre-warning Alarm"] -pub type AlmsR = crate::BitReader; +pub type ALMS_R = crate::BitReader; impl R { #[doc = "Bit 0 - Pre-warning Alarm"] #[inline(always)] - pub fn alms(&self) -> AlmsR { - AlmsR::new((self.bits & 1) != 0) + pub fn alms(&self) -> ALMS_R { + ALMS_R::new((self.bits & 1) != 0) } } #[doc = "WDT Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdtsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WdtstsSpec; -impl crate::RegisterSpec for WdtstsSpec { +pub struct WDTSTS_SPEC; +impl crate::RegisterSpec for WDTSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`wdtsts::R`](R) reader structure"] -impl crate::Readable for WdtstsSpec {} +impl crate::Readable for WDTSTS_SPEC {} #[doc = "`reset()` method sets WDTSTS to value 0"] -impl crate::Resettable for WdtstsSpec { +impl crate::Resettable for WDTSTS_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wlb.rs b/src/wdt/wlb.rs index 23a9afee..c41a332e 100644 --- a/src/wdt/wlb.rs +++ b/src/wdt/wlb.rs @@ -1,40 +1,40 @@ #[doc = "Register `WLB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WLB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WLB` reader - Window Lower Bound"] -pub type WlbR = crate::FieldReader; +pub type WLB_R = crate::FieldReader; #[doc = "Field `WLB` writer - Window Lower Bound"] -pub type WlbW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WLB_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Window Lower Bound"] #[inline(always)] - pub fn wlb(&self) -> WlbR { - WlbR::new(self.bits) + pub fn wlb(&self) -> WLB_R { + WLB_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Window Lower Bound"] #[inline(always)] #[must_use] - pub fn wlb(&mut self) -> WlbW { - WlbW::new(self, 0) + pub fn wlb(&mut self) -> WLB_W { + WLB_W::new(self, 0) } } #[doc = "WDT Window Lower Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wlb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wlb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WlbSpec; -impl crate::RegisterSpec for WlbSpec { +pub struct WLB_SPEC; +impl crate::RegisterSpec for WLB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`wlb::R`](R) reader structure"] -impl crate::Readable for WlbSpec {} +impl crate::Readable for WLB_SPEC {} #[doc = "`write(|w| ..)` method takes [`wlb::W`](W) writer structure"] -impl crate::Writable for WlbSpec { +impl crate::Writable for WLB_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WLB to value 0"] -impl crate::Resettable for WlbSpec { +impl crate::Resettable for WLB_SPEC { const RESET_VALUE: u32 = 0; } diff --git a/src/wdt/wub.rs b/src/wdt/wub.rs index 2fd8b442..0d4006a3 100644 --- a/src/wdt/wub.rs +++ b/src/wdt/wub.rs @@ -1,40 +1,40 @@ #[doc = "Register `WUB` reader"] -pub type R = crate::R; +pub type R = crate::R; #[doc = "Register `WUB` writer"] -pub type W = crate::W; +pub type W = crate::W; #[doc = "Field `WUB` reader - Window Upper Bound"] -pub type WubR = crate::FieldReader; +pub type WUB_R = crate::FieldReader; #[doc = "Field `WUB` writer - Window Upper Bound"] -pub type WubW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; +pub type WUB_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl R { #[doc = "Bits 0:31 - Window Upper Bound"] #[inline(always)] - pub fn wub(&self) -> WubR { - WubR::new(self.bits) + pub fn wub(&self) -> WUB_R { + WUB_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Window Upper Bound"] #[inline(always)] #[must_use] - pub fn wub(&mut self) -> WubW { - WubW::new(self, 0) + pub fn wub(&mut self) -> WUB_W { + WUB_W::new(self, 0) } } #[doc = "WDT Window Upper Bound Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wub::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] -pub struct WubSpec; -impl crate::RegisterSpec for WubSpec { +pub struct WUB_SPEC; +impl crate::RegisterSpec for WUB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [`wub::R`](R) reader structure"] -impl crate::Readable for WubSpec {} +impl crate::Readable for WUB_SPEC {} #[doc = "`write(|w| ..)` method takes [`wub::W`](W) writer structure"] -impl crate::Writable for WubSpec { +impl crate::Writable for WUB_SPEC { type Safety = crate::Unsafe; const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0; const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0; } #[doc = "`reset()` method sets WUB to value 0xffff_ffff"] -impl crate::Resettable for WubSpec { +impl crate::Resettable for WUB_SPEC { const RESET_VALUE: u32 = 0xffff_ffff; }