From df95e0847d72966378681b21e31bdb501a0c528d Mon Sep 17 00:00:00 2001 From: David Garske Date: Tue, 7 May 2024 13:32:41 -0700 Subject: [PATCH] Fix RTC clock stop issue. Add new `BOOT_ENTRY_OFFSET` option for RX to provide offset to entry function. Improve RX arch flags for portability for building with older compiler. Cleanup the USE_GCC and GDB debugging options. --- .gitignore | 2 + Makefile | 4 +- arch.mk | 55 +++++++++++++++++++--------- config/examples/renesas-rx65n.config | 11 +++++- hal/rx65n.c | 4 +- hal/rx65n.ld | 3 +- include/user_settings.h | 2 - options.mk | 7 +++- src/boot_renesas.c | 22 ++++++++--- src/boot_renesas_start.S | 10 +++++ test-app/Makefile | 11 +++++- 11 files changed, 97 insertions(+), 34 deletions(-) diff --git a/.gitignore b/.gitignore index bcbd9174e..aec6e3a92 100644 --- a/.gitignore +++ b/.gitignore @@ -195,3 +195,5 @@ IDE/Renesas/e2studio/RX72N/app_RenesasRX01/HardwareDebug IDE/Renesas/e2studio/RX72N/app_RenesasRX01/src/smc_gen IDE/Renesas/e2studio/RX72N/wolfBoot/HardwareDebug IDE/Renesas/e2studio/RX72N/wolfBoot/src/smc_gen +lib/r_bsp_v7.42 +lib/r_flash_rx_v5.11 diff --git a/Makefile b/Makefile index 73fdaacf6..1abe8c29e 100644 --- a/Makefile +++ b/Makefile @@ -25,6 +25,8 @@ LIBS= SIGN_ALG= OBJCOPY_FLAGS= BIG_ENDIAN?=0 +USE_GCC?=1 +USE_GCC_HEADLESS?=1 OBJS:= \ ./hal/$(TARGET).o \ @@ -235,7 +237,7 @@ factory_wstage1.bin: $(BINASSEMBLE) stage1/loader_stage1.bin wolfboot.bin $(BOOT wolfboot_stage1.bin: wolfboot.elf stage1/loader_stage1.bin $(Q) cp stage1/loader_stage1.bin wolfboot_stage1.bin -wolfboot.elf: include/target.h $(LSCRIPT) $(OBJS) $(LIBS) $(BINASSEMBLE) FORCE +wolfboot.elf: include/target.h $(LSCRIPT) $(OBJS) $(BINASSEMBLE) FORCE $(Q)(test $(SIGN) = NONE) || (grep -q $(SIGN_ALG) src/keystore.c) || \ (echo "Key mismatch: please run 'make distclean' to remove all keys if you want to change algorithm" && false) @echo "\t[LD] $@" diff --git a/arch.mk b/arch.mk index d03f8aeb6..b684e73d9 100644 --- a/arch.mk +++ b/arch.mk @@ -273,28 +273,51 @@ endif ## Renesas RX ifeq ($(ARCH),RENESAS_RX) RX_GCC_PATH?=~/toolchains/gcc_8.3.0.202311_rx_elf - CROSS_COMPILE=$(RX_GCC_PATH)/bin/rx-elf- + CROSS_COMPILE?=$(RX_GCC_PATH)/bin/rx-elf- + ## Toolchain setup + ifeq ($(USE_GCC),0) + CC=$(CROSS_COMPILE)gcc + # Must use LD directly (gcc link calls LD with sysroot and is not supported) + LD=$(CROSS_COMPILE)ld + AS=$(CROSS_COMPILE)gcc + OBJCOPY?=$(CROSS_COMPILE)objcopy + SIZE=$(CROSS_COMPILE)size + + # Override flags + USE_GCC_HEADLESS=0 + LD_START_GROUP=--start-group + LD_END_GROUP=--end-group + CFLAGS+=-Wall -Wextra -ffreestanding -Wno-unused -nostartfiles -fno-common + CFLAGS+=-ffunction-sections -fdata-sections + CFLAGS+=-B$(dir $(CROSS_COMPILE)) + LDFLAGS+=-gc-sections -Map=wolfboot.map + LDFLAGS+=-T $(LSCRIPT) -L$(dir $(CROSS_COMPILE))../lib + LIBS+=-lgcc + endif + + # Renesas specific files OBJS+=src/boot_renesas.o src/boot_renesas_start.o - ifeq ($(SPMATH),1) MATH_OBJS += ./lib/wolfssl/wolfcrypt/src/sp_c32.o endif - ifeq ($(TARGET),rx65n) - #CFLAGS+=-misa=v2 -nofpu - endif - ifeq ($(TARGET),rx72n) - #CFLAGS+=-misa=v3 -nofpu - endif - # RX parts support big or little endian data depending on MDE register + CFLAGS+=-fomit-frame-pointer -nofpu ifeq ($(BIG_ENDIAN),1) - CFLAGS+=-mbig-endian-data -fno-use-linker-plugin - LDFLAGS+=-mbig-endian-data -fno-use-linker-plugin -Wl,--oformat=elf32-rx-be + CFLAGS+=-mbig-endian-data + ifeq ($(USE_GCC),1) + LDFLAGS+=-Wl,--oformat=elf32-rx-be + else + LDFLAGS+=--oformat=elf32-rx-be + endif else - CFLAGS+=-mlittle-endian-data -fno-use-linker-plugin - LDFLAGS+=-mlittle-endian-data -fno-use-linker-plugin -Wl,--oformat=elf32-rx-le + CFLAGS+=-mlittle-endian-data + ifeq ($(USE_GCC),1) + LDFLAGS+=-Wl,--oformat=elf32-rx-le + else + LDFLAGS+=--oformat=elf32-rx-le + endif endif ifeq ($(TSIP),1) @@ -692,10 +715,6 @@ ifeq ($(TARGET),psoc6) endif endif - - -USE_GCC?=1 -USE_GCC_HEADLESS?=1 ifeq ($(USE_GCC),1) ## Toolchain setup CC=$(CROSS_COMPILE)gcc @@ -703,8 +722,8 @@ ifeq ($(USE_GCC),1) AS=$(CROSS_COMPILE)gcc OBJCOPY?=$(CROSS_COMPILE)objcopy SIZE=$(CROSS_COMPILE)size - OUTPUT_FLAG=-o endif +OUTPUT_FLAG?=-o ifeq ($(filter $(TARGET),x86_fsp_qemu kontron_vx3060_s2),$(TARGET)) FSP=1 diff --git a/config/examples/renesas-rx65n.config b/config/examples/renesas-rx65n.config index 40b9103ad..c0d060aec 100644 --- a/config/examples/renesas-rx65n.config +++ b/config/examples/renesas-rx65n.config @@ -21,7 +21,7 @@ DUALBANK_SWAP?=0 IMAGE_HEADER_SIZE=1024 # Optionally switch to big endian data if MDE is set -BIG_ENDIAN=0 +#BIG_ENDIAN=1 # Flash is 2MB with 32KB sector size WOLFBOOT_SECTOR_SIZE?=0x8000 @@ -45,4 +45,11 @@ WOLFBOOT_PARTITION_SWAP_ADDRESS?=0xFFFE0000 # TSIP PKA?=0 -#CFLAGS_EXTRA+=-DTEST_FLASH +# Use optimization level 2 (default is -Os, which causes issues) +#OPTIMIZATION_LEVEL=2 + +# Include debug symbols (even for release build) +#DEBUG_SYMBOLS=1 + +# Location of reset entry point from start of flash +#CFLAGS_EXTRA+=-DBOOT_ENTRY_OFFSET=0x2C diff --git a/hal/rx65n.c b/hal/rx65n.c index 78f4c4a25..458b761ff 100644 --- a/hal/rx65n.c +++ b/hal/rx65n.c @@ -501,11 +501,11 @@ void hal_clk_init(void) reg = RTC_RCR4; /* dummy read (required) */ } while (RTC_RCR4 != 0) { RX_NOP(); } - RTC_RCR3 = 0; + RTC_RCR3 &= ~RTC_RCR3_RTCEN; /* stop osc */ for (i=0; i<4; i++) { reg = RTC_RCR3; /* dummy read (required) */ } - while (RTC_RCR3 != 0) { RX_NOP(); } + while ((RTC_RCR3 & RTC_RCR3_RTCEN) != RTC_RCR3_RTCEN) { RX_NOP(); } } /* ---- Sub-Clock OSC ---- */ diff --git a/hal/rx65n.ld b/hal/rx65n.ld index 64c9aa5e3..275ea8652 100644 --- a/hal/rx65n.ld +++ b/hal/rx65n.ld @@ -3,7 +3,8 @@ ENTRY(_PowerON_Reset) MEMORY { - RAM : ORIGIN = 0x0, LENGTH = 262144 + /* Do not use 0x0 RAM base, as it will fail NULL checks */ + RAM : ORIGIN = 0x1000, LENGTH = 262144 - 0x1000 RAM2 : ORIGIN = 0x00800000, LENGTH = 393216 ROM : ORIGIN = @WOLFBOOT_ORIGIN@ /* 0xFFE00000 */, LENGTH = @BOOTLOADER_PARTITION_SIZE@ /* 2097152 */ OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128 diff --git a/include/user_settings.h b/include/user_settings.h index 771f8355d..96b4fc648 100644 --- a/include/user_settings.h +++ b/include/user_settings.h @@ -115,7 +115,6 @@ extern int tolower(int c); # else # define HAVE_ECC_SIGN # define HAVE_ECC_CDH -# define WOLFSSL_SP # define WOLFSSL_SP_MATH # define WOLFSSL_SP_SMALL # define SP_WORD_SIZE 32 @@ -126,7 +125,6 @@ extern int tolower(int c); /* SP MATH */ # if !defined(USE_FAST_MATH) && !defined(WOLFSSL_SP_MATH_ALL) -# define WOLFSSL_SP # define WOLFSSL_SP_MATH # define WOLFSSL_SP_SMALL # define WOLFSSL_HAVE_SP_ECC diff --git a/options.mk b/options.mk index dbe6be25a..208902971 100644 --- a/options.mk +++ b/options.mk @@ -588,7 +588,12 @@ endif # allow elf inclusion of debug symbols even with optimizations enabled # make DEBUG_SYMBOLS=1 ifeq ($(DEBUG_SYMBOLS),1) - CFLAGS+=-g -ggdb3 + CFLAGS+=-g + ifeq ($(USE_GCC),1) + CFLAGS+=-ggdb3 + else + CFLAGS+=-gstabs + endif endif diff --git a/src/boot_renesas.c b/src/boot_renesas.c index 9facd8450..e8c26a5fb 100644 --- a/src/boot_renesas.c +++ b/src/boot_renesas.c @@ -52,15 +52,18 @@ void do_boot(const uint32_t *app_offset) (void) app_offset; (void) app_sp; (void) app_entry; + #ifndef BOOT_ENTRY_OFFSET + #define BOOT_ENTRY_OFFSET 0x00 + #endif + /* add byte offset to uint32_t */ + app_offset += BOOT_ENTRY_OFFSET/sizeof(uint32_t); #if defined(__RX__) /* Do unconditional jump (r1 = app_offset) */ #if defined(__CCRX__) longJump(app_offset); #else - /* address at r1 is the function table, so load value from r1 */ - __asm("mov.l [r1], r2"); - /* jump to address */ - __asm("jmp r2"); + app_entry = (void(*))(*app_offset); + app_entry(); #endif #elif defined(_RENESAS_RA_) app_sp = VECTOR_SP; @@ -89,8 +92,11 @@ void do_boot(const uint32_t *app_offset) /* Interrupt Handling and Linker Sections for RX */ #if defined(__RX__) typedef void (*fp) (void); /* generic interrupt function pointer typedef */ -extern void PowerON_Reset(void) __attribute__ ((interrupt)); +#ifdef NO_LEADING_UNDERSCORE +extern void _PowerON_Reset(void); +#else extern void PowerON_Reset(void); +#endif #define EXVECT_SECT __attribute__ ((section (".exvectors"))) #define FVECT_SECT __attribute__ ((section (".fvectors"))) @@ -248,7 +254,11 @@ const void *ExceptVectors[] EXVECT_SECT = { }; const void *HardwareVectors[] FVECT_SECT = { - PowerON_Reset +#ifdef NO_LEADING_UNDERSCORE + _PowerON_Reset +#else + PowerON_Reset +#endif }; const fp RelocatableVectors[] RVECT_SECT = { diff --git a/src/boot_renesas_start.S b/src/boot_renesas_start.S index 6c4a97198..947806b25 100644 --- a/src/boot_renesas_start.S +++ b/src/boot_renesas_start.S @@ -11,7 +11,11 @@ .extern _ustack .extern _istack .extern _rvectors +#ifdef NO_LEADING_UNDERSCORE + .extern main +#else .extern _main +#endif .global _PowerON_Reset /* global Start routine */ .type _PowerON_Reset, @function @@ -83,7 +87,11 @@ _PowerON_Reset : skip_psw_setup: /* start user program */ +#ifdef NO_LEADING_UNDERSCORE + mov #main, r7 +#else mov #_main, r7 +#endif jsr r7 mov #_exit, r7 jsr r7 @@ -99,7 +107,9 @@ __rx_fini: /* call to exit */ _exit: mov #0, r2 +#ifndef NO_LEADING_UNDERSCORE mov #___call_exitprocs, r7 +#endif jsr r7 _loop_here: bra _loop_here diff --git a/test-app/Makefile b/test-app/Makefile index fe8b048c8..a972a55d8 100644 --- a/test-app/Makefile +++ b/test-app/Makefile @@ -10,6 +10,8 @@ CFLAGS+=-I. -I.. CFLAGS+=-I./wcs DEBUG?=1 DELTA_DATA_SIZE?=2000 +USE_GCC?=1 +USE_GCC_HEADLESS?=1 ifeq ($(SIGN),RSA2048) IMAGE_HEADER_SIZE:=512 @@ -38,7 +40,14 @@ ifeq ($(TARGET),ti_hercules) APP_OBJS:=app_$(TARGET).o ../test-app/libwolfboot.o CFLAGS+=-I"../include" else - CFLAGS+=-g -ggdb -Wall -Wstack-usage=1024 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles + CFLAGS+=-Wall -Wstack-usage=1024 -ffreestanding -Wno-unused -DPLATFORM_$(TARGET) -I../include -nostartfiles + CFLAGS+=-g + ifeq ($(USE_GCC),1) + CFLAGS+=-ggdb3 + else + CFLAGS+=-gstabs + endif + ifeq ($(ARCH),RENESAS_RX) APP_OBJS:=app_renesas_rx.o ../test-app/libwolfboot.o ../src/boot_renesas.o ../src/boot_renesas_start.o LDFLAGS+=-ffreestanding -nostartfiles