diff --git a/bindings/rust/src/lib.rs b/bindings/rust/src/lib.rs
index b39a45a790..264494a051 100644
--- a/bindings/rust/src/lib.rs
+++ b/bindings/rust/src/lib.rs
@@ -1139,6 +1139,13 @@ impl<'a, D> Unicorn<'a, D> {
         unsafe { ffi::uc_ctl(self.get_handle(), UC_CTL_WRITE!(ControlType::UC_CTL_TLB_FLUSH)) }.into()
     }
 
+    pub fn ctl_context_mode(
+        &self,
+        mode: ContextMode,
+    ) -> Result<(), uc_error> {
+        unsafe { ffi::uc_ctl(self.get_handle(), UC_CTL_WRITE!(ControlType::UC_CTL_CONTEXT_MODE), mode) }.into()
+    }
+
     pub fn ctl_tlb_type(
         &self,
         t: TlbType,
diff --git a/bindings/rust/src/unicorn_const.rs b/bindings/rust/src/unicorn_const.rs
index a27c044225..5f8c80fd4a 100644
--- a/bindings/rust/src/unicorn_const.rs
+++ b/bindings/rust/src/unicorn_const.rs
@@ -281,10 +281,21 @@ pub enum ControlType {
     UC_CTL_TB_FLUSH     = 10,
     UC_CTL_TLB_FLUSH    = 11,
     UC_CTL_TLB_TYPE     = 12,
+    UC_CTL_TCG_BUFFER_SIZE = 13,
+    UC_CTL_CONTEXT_MODE = 14,
     UC_CTL_IO_READ      = 1 << 31,
     UC_CTL_IO_WRITE     = 1 << 30,
 }
 
+bitflags! {
+    #[derive(Debug, Copy, Clone)]
+    #[repr(C)]
+    pub struct ContextMode : u32 {
+        const CPU    = 1;
+        const Memory = 2;
+    }
+}
+
 #[repr(C)]
 #[derive(Debug, Clone, Copy)]
 pub struct TlbEntry {