diff --git a/src/main/scala/chisel3/tester/TreadleBackend.scala b/src/main/scala/chisel3/tester/TreadleBackend.scala
index a2a36c1fb..c84561174 100644
--- a/src/main/scala/chisel3/tester/TreadleBackend.scala
+++ b/src/main/scala/chisel3/tester/TreadleBackend.scala
@@ -235,6 +235,9 @@ object TreadleExecutive {
         firrtlExecutionResult match {
           case success: FirrtlExecutionSuccess =>
             val dut = getTopModule(circuit).asInstanceOf[T]
+            optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
+              annotations = success.circuitState.annotations.toSeq.toList
+            )
             val interpretiveTester = new TreadleTester(success.emitted, optionsManager)
 
             val portNames = DataMirror.modulePorts(dut).flatMap { case (name, data) =>