diff --git a/app/collins/models/AssetMeta.scala b/app/collins/models/AssetMeta.scala index a8d13c6ae..8ccd6921e 100644 --- a/app/collins/models/AssetMeta.scala +++ b/app/collins/models/AssetMeta.scala @@ -206,9 +206,15 @@ object AssetMeta extends Schema with AnormAdapter[AssetMeta] with AssetMetaKeys val BaseProduct = findOrCreateFromName("BASE_PRODUCT") val BaseVendor = findOrCreateFromName("BASE_VENDOR") val BaseSerial = findOrCreateFromName("BASE_SERIAL") + val GpuProduct= findOrCreateFromName("GPU_PRODUCT") + val GpuVendor = findOrCreateFromName("GPU_VENDOR") def getValues(): Seq[AssetMeta] = { - Seq(BaseDescription, BaseProduct, BaseVendor, BaseSerial) + Seq(BaseDescription, BaseProduct, BaseVendor, BaseSerial, GpuProduct, GpuVendor) + } + + def getLshwValues(): Set[AssetMeta] = { + Set(BaseDescription, BaseProduct, BaseVendor, BaseSerial, GpuProduct, GpuVendor) } } } diff --git a/app/collins/models/LshwHelper.scala b/app/collins/models/LshwHelper.scala index 72df84c8c..770db0861 100644 --- a/app/collins/models/LshwHelper.scala +++ b/app/collins/models/LshwHelper.scala @@ -3,6 +3,7 @@ package collins.models import collins.models.AssetMeta.DynamicEnum._ import collins.models.AssetMeta.Enum._ import collins.models.lshw.Cpu +import collins.models.lshw.Gpu import collins.models.lshw.Disk import collins.models.lshw.Memory import collins.models.lshw.Nic @@ -34,8 +35,11 @@ object LshwHelper extends CommonHelper[LshwRepresentation] { DiskStorageTotal ) + override val managedDynamicTags = AssetMeta.DynamicEnum.getLshwValues() + def construct(asset: Asset, lshw: LshwRepresentation): Seq[AssetMetaValue] = { collectCpus(asset, lshw) ++ + collectGpus(asset, lshw) ++ collectMemory(asset, lshw) ++ collectNics(asset, lshw) ++ collectDisks(asset, lshw) ++ @@ -45,11 +49,12 @@ object LshwHelper extends CommonHelper[LshwRepresentation] { def reconstruct(asset: Asset, assetMeta: Seq[MetaWrapper]): Reconstruction = { val metaMap = assetMeta.groupBy { _.getGroupId } val (cpus,postCpuMap) = reconstructCpu(metaMap) - val (memory,postMemoryMap) = reconstructMemory(postCpuMap) + val (gpus,postGpuMap) = reconstructGpu(postCpuMap) + val (memory,postMemoryMap) = reconstructMemory(postGpuMap) val (nics,postNicMap) = reconstructNics(postMemoryMap) val (disks,postDiskMap) = reconstructDisks(postNicMap) val (base,postBaseMap) = reconstructBase(postDiskMap) - (LshwRepresentation(cpus, memory, nics, disks, base.headOption.getOrElse(ServerBase())), postBaseMap.values.flatten.toSeq) + (LshwRepresentation(cpus, gpus, memory, nics, disks, base.headOption.getOrElse(ServerBase())), postBaseMap.values.flatten.toSeq) } protected def reconstructCpu(meta: Map[Int, Seq[MetaWrapper]]): FilteredSeq[Cpu] = { @@ -72,6 +77,7 @@ object LshwHelper extends CommonHelper[LshwRepresentation] { } (cpuSeq, filteredMeta) } + protected def collectCpus(asset: Asset, lshw: LshwRepresentation): Seq[AssetMetaValue] = { if (lshw.cpuCount < 1) { return Seq() @@ -86,6 +92,43 @@ object LshwHelper extends CommonHelper[LshwRepresentation] { ) } + protected def reconstructGpu(meta: Map[Int, Seq[MetaWrapper]]): FilteredSeq[Gpu] = { + val gpuSeq = meta.foldLeft(Seq[Gpu]()) { case (seq, map) => + val groupId = map._1 + val wrapSeq = map._2 + val product = amfinder(wrapSeq, GpuProduct, _.toString, "") + val vendor= amfinder(wrapSeq, GpuVendor, _.toString, "") + if (product.isEmpty || vendor.isEmpty) { + seq + } else { + Gpu("", product, vendor) +: seq + } + } + val filteredMeta = meta.map { case(groupId, metaSeq) => + val newSeq = filterNot( + metaSeq, + Set(GpuProduct.id, GpuVendor.id) + ) + groupId -> newSeq + } + (gpuSeq, filteredMeta) + } + + protected def collectGpus(asset: Asset, lshw: LshwRepresentation): Seq[AssetMetaValue] = { + if (lshw.gpuCount < 1) { + return Seq() + } + lshw.gpus.foldLeft((0,Seq[AssetMetaValue]())) { case (run,gpu) => + val groupId = run._1 + val total = run._2 + val res: Seq[AssetMetaValue] = Seq( + AssetMetaValue(asset, GpuProduct.id, groupId, gpu.product.toString), + AssetMetaValue(asset, GpuVendor.id, groupId, gpu.vendor.toString) + ) + (groupId + 1, total ++ res) + }._2 + } + protected def reconstructMemory(meta: Map[Int, Seq[MetaWrapper]]): FilteredSeq[Memory] = { if (!meta.contains(0)) { return (Seq[Memory](), meta) diff --git a/app/collins/models/lshw/Gpu.scala b/app/collins/models/lshw/Gpu.scala new file mode 100644 index 000000000..732d6c98a --- /dev/null +++ b/app/collins/models/lshw/Gpu.scala @@ -0,0 +1,27 @@ +package collins.models.lshw + +import play.api.libs.json.Format +import play.api.libs.json.JsObject +import play.api.libs.json.JsSuccess +import play.api.libs.json.JsValue +import play.api.libs.json.Json + +object Gpu { + + implicit object GpuFormat extends Format[Gpu] { + override def reads(json: JsValue) = JsSuccess(Gpu( + (json \ "DESCRIPTION").as[String], + (json \ "PRODUCT").as[String], + (json \ "VENDOR").as[String])) + override def writes(gpu: Gpu) = JsObject(Seq( + "DESCRIPTION" -> Json.toJson(gpu.description), + "PRODUCT" -> Json.toJson(gpu.product), + "VENDOR" -> Json.toJson(gpu.vendor))) + } +} + +case class Gpu( + description: String, product: String, vendor: String) extends LshwAsset { + import Gpu._ + override def toJsValue() = Json.toJson(this) +} diff --git a/app/collins/models/shared/CommonHelper.scala b/app/collins/models/shared/CommonHelper.scala index 142b2341f..dde068d3b 100644 --- a/app/collins/models/shared/CommonHelper.scala +++ b/app/collins/models/shared/CommonHelper.scala @@ -10,6 +10,7 @@ trait CommonHelper[T] { type FilteredSeq[T1] = Tuple2[Seq[T1], Map[Int, Seq[MetaWrapper]]] val managedTags: Set[AssetMeta.Enum] + val managedDynamicTags: Set[AssetMeta] = Set() /** * Construct an appropriate AssetMetaValue sequence from the representation @@ -27,7 +28,7 @@ trait CommonHelper[T] { def updateAsset(asset: Asset, rep: T): Boolean = { val mvs = construct(asset, rep) if (!managedTags.isEmpty) { - AssetMetaValue.deleteByAssetAndMetaId(asset, managedTags.map(_.id.toLong)) + AssetMetaValue.deleteByAssetAndMetaId(asset, ((managedTags.map(_.id.toLong) ++ managedDynamicTags.map(_.id)))) } mvs.size == AssetMetaValue.create(mvs) diff --git a/app/collins/util/LshwRepresentation.scala b/app/collins/util/LshwRepresentation.scala index 1ae6b0dd1..c7ba2dc10 100644 --- a/app/collins/util/LshwRepresentation.scala +++ b/app/collins/util/LshwRepresentation.scala @@ -8,6 +8,8 @@ import play.api.libs.json.Json import collins.models.lshw.Cpu import collins.models.lshw.Cpu.CpuFormat +import collins.models.lshw.Gpu +import collins.models.lshw.Gpu.GpuFormat import collins.models.lshw.Disk import collins.models.lshw.Disk.DiskFormat import collins.models.lshw.Memory @@ -19,10 +21,11 @@ import collins.models.lshw.ServerBase.ServerbaseFormat object LshwRepresentation { def empty(): LshwRepresentation = { - new LshwRepresentation(Seq(), Seq(), Seq(), Seq(), new ServerBase) + new LshwRepresentation(Seq(), Seq(), Seq(), Seq(), Seq(), new ServerBase) } implicit object LshwFormat extends Format[LshwRepresentation] { import Cpu._ + import Gpu._ import Disk._ import Memory._ import Nic._ @@ -30,12 +33,14 @@ object LshwRepresentation { import Json.toJson override def reads(json: JsValue) = JsSuccess(LshwRepresentation( (json \ "CPU").as[Seq[Cpu]], + (json \ "GPU").as[Seq[Gpu]], (json \ "MEMORY").as[Seq[Memory]], (json \ "NIC").as[Seq[Nic]], (json \ "DISK").as[Seq[Disk]], (json \ "BASE").as[ServerBase])) override def writes(lshw: LshwRepresentation) = JsObject(Seq( "CPU" -> Json.toJson(lshw.cpus), + "GPU" -> Json.toJson(lshw.gpus), "MEMORY" -> Json.toJson(lshw.memory), "NIC" -> Json.toJson(lshw.nics), "DISK" -> Json.toJson(lshw.disks), @@ -45,6 +50,7 @@ object LshwRepresentation { case class LshwRepresentation( cpus: Seq[Cpu], + gpus: Seq[Gpu], memory: Seq[Memory], nics: Seq[Nic], disks: Seq[Disk], @@ -61,6 +67,8 @@ case class LshwRepresentation( } def cpuSpeed: Double = cpus.sortBy(_.speedGhz).lastOption.map(_.speedGhz).getOrElse(0.0) + def gpuCount: Int = gpus.size + def totalMemory: ByteStorageUnit = memory.foldLeft(new ByteStorageUnit(0)) { case (total, mem) => new ByteStorageUnit(total.bytes + mem.size.bytes) diff --git a/app/collins/util/config/GpuConfig.scala b/app/collins/util/config/GpuConfig.scala new file mode 100644 index 000000000..934c9508d --- /dev/null +++ b/app/collins/util/config/GpuConfig.scala @@ -0,0 +1,12 @@ +package collins.util.config + +object GpuConfig extends Configurable { + override val namespace = "gpu" + override val referenceConfigFilename = "gpu_reference.conf" + + def supportedVendorStrings= getStringSet("supportedVendorStrings", Set("NVIDIA Corporation")) + + override protected def validateConfig() { + supportedVendorStrings + } +} diff --git a/app/collins/util/parsers/LshwParser.scala b/app/collins/util/parsers/LshwParser.scala index 97dbfa0d0..dbe61db47 100644 --- a/app/collins/util/parsers/LshwParser.scala +++ b/app/collins/util/parsers/LshwParser.scala @@ -2,12 +2,14 @@ package collins.util.parsers import collins.models.lshw.LshwAsset import collins.models.lshw.Cpu +import collins.models.lshw.Gpu import collins.models.lshw.Memory import collins.models.lshw.Disk import collins.models.lshw.Nic import collins.models.lshw.ServerBase import collins.util.config.LshwConfig +import collins.util.config.GpuConfig import collins.util.LshwRepresentation import collins.util.ByteStorageUnit import collins.util.BitStorageUnit @@ -25,10 +27,11 @@ class LshwParser(txt: String) extends CommonParser[LshwRepresentation](txt) { val wildcard: PartialFunction[NodeSeq, LshwAsset] = { case _ => null } lazy val matcher = cpuMatcher.orElse( - memMatcher.orElse( - diskMatcher.orElse( - nicMatcher.orElse( - wildcard)))) + gpuMatcher.orElse( + memMatcher.orElse( + diskMatcher.orElse( + nicMatcher.orElse( + wildcard))))) override def parse(): Either[Throwable, LshwRepresentation] = { val xml = try { @@ -40,10 +43,11 @@ class LshwParser(txt: String) extends CommonParser[LshwRepresentation](txt) { } val rep = try { val base = getBaseInfo(xml) - getCoreNodes(xml).foldLeft(LshwRepresentation(Nil, Nil, Nil, Nil, base)) { + getCoreNodes(xml).foldLeft(LshwRepresentation(Nil, Nil, Nil, Nil, Nil, base)) { case (holder, node) => matcher(node) match { case c: Cpu => holder.copy(cpus = c +: holder.cpus) + case g: Gpu => holder.copy(gpus = g +: holder.gpus) case m: Memory => holder.copy(memory = m.copy(bank = holder.memory.size) +: holder.memory) case d: Disk => holder.copy(disks = d +: holder.disks) case n: Nic => holder.copy(nics = n +: holder.nics) @@ -79,6 +83,13 @@ class LshwParser(txt: String) extends CommonParser[LshwRepresentation](txt) { Cpu(cores, threads, speed, asset.description, asset.product, asset.vendor) } + val gpuMatcher: PartialFunction[NodeSeq, Gpu] = { + case n if ((n \ "@class" text) == "display" && GpuConfig.supportedVendorStrings.exists(s => (n \\ "vendor" text).contains(s))) => { + val asset = getAsset(n) + Gpu(asset.description, asset.product, asset.vendor) + } + } + val memMatcher: PartialFunction[NodeSeq, Memory] = { case n if (n \ "@class" text) == "memory" && (n \ "@id" text).contains("bank:") => val asset = getAsset(n) diff --git a/app/views/asset/show_hwdetails.scala.html b/app/views/asset/show_hwdetails.scala.html index 135ff818f..837a6d59e 100644 --- a/app/views/asset/show_hwdetails.scala.html +++ b/app/views/asset/show_hwdetails.scala.html @@ -73,6 +73,26 @@

CPU Collected CPU Information

+ @if(aa.lshw.gpuCount > 0) { +

GPU Collected GPU Information

+ + + + + + + + @aa.lshw.gpus.zipWithIndex.map { case(gpu,id) => + + + + + + } + +
IdDescriptionVendor
@id@gpu.product@gpu.vendor
+ } +

Memory Collected Memory Information

diff --git a/app/views/asset/show_overview.scala.html b/app/views/asset/show_overview.scala.html index b5999396f..f6fe5f809 100644 --- a/app/views/asset/show_overview.scala.html +++ b/app/views/asset/show_overview.scala.html @@ -204,6 +204,15 @@

Hardware Summary Summary of system components reported by LSHW@{if (aa.lshw.hasHyperthreadingEnabled) "Yes" else "No"} +

+ + + + + + + + diff --git a/conf/docker/validations.conf b/conf/docker/validations.conf index a46e7bc4a..3e7c250ad 100644 --- a/conf/docker/validations.conf +++ b/conf/docker/validations.conf @@ -15,6 +15,7 @@ config.validations = [ collins.util.config.CryptoConfig, collins.util.config.IpmiConfig, collins.util.config.LshwConfig, + collins.util.config.GpuConfig, collins.util.config.LldpConfig, collins.util.config.NodeclassifierConfig, collins.util.power.PowerConfiguration, diff --git a/conf/evolutions/collins/14.sql b/conf/evolutions/collins/14.sql new file mode 100644 index 000000000..77688c71a --- /dev/null +++ b/conf/evolutions/collins/14.sql @@ -0,0 +1,11 @@ +# --- Add GPU information to asset_meta + +# --- !Ups + +INSERT INTO asset_meta (name, priority, label, description) VALUES ('GPU_PRODUCT', -1, 'GPU Product', 'GPU product (description of GPU)'); +INSERT INTO asset_meta (name, priority, label, description) VALUES ('GPU_VENDOR', -1, 'GPU Vendor', 'GPU vendor'); + +# --- !Downs + +DELETE FROM asset_meta WHERE name ='GPU_VENDOR' +DELETE FROM asset_meta WHERE name ='GPU_PRODUCT' diff --git a/conf/reference/gpu_reference.conf b/conf/reference/gpu_reference.conf new file mode 100644 index 000000000..fc4f09517 --- /dev/null +++ b/conf/reference/gpu_reference.conf @@ -0,0 +1,5 @@ +gpu { + # A list of hardware vendors that should be parsed by lshw as "gpu vendors" + gpuVendors = [] + +} diff --git a/conf/validations.conf b/conf/validations.conf index 63d931ffc..366723a0c 100644 --- a/conf/validations.conf +++ b/conf/validations.conf @@ -18,6 +18,7 @@ config.validations = [ collins.util.config.LshwConfig, collins.util.config.LldpConfig, collins.util.config.NodeclassifierConfig, + collins.util.config.GpuConfig, collins.util.power.PowerConfiguration, collins.util.security.AuthenticationProviderConfig, collins.util.security.FileAuthenticationProviderConfig, diff --git a/support/ruby/collins-client/lib/collins/asset.rb b/support/ruby/collins-client/lib/collins/asset.rb index 495de8584..898e910f2 100644 --- a/support/ruby/collins-client/lib/collins/asset.rb +++ b/support/ruby/collins-client/lib/collins/asset.rb @@ -193,6 +193,15 @@ def cpus extract(extras, "HARDWARE", "CPU") || [] end + # @return [Fixnum] Number of GPU's found + def gpu_count + (extract(extras, "HARDWARE", "GPU") || []).length + end + # @return [Array] GPU information + def gpus + extract(extras, "HARDWARE", "GPU") || [] + end + # @return [Array] Disk information def disks extract(extras, "HARDWARE", "DISK") || [] diff --git a/support/ruby/collins-client/spec/collins/asset_spec.rb b/support/ruby/collins-client/spec/collins/asset_spec.rb index ca58dbeac..1567abc5f 100644 --- a/support/ruby/collins-client/spec/collins/asset_spec.rb +++ b/support/ruby/collins-client/spec/collins/asset_spec.rb @@ -96,6 +96,14 @@ end end + context "assets with GPUs should have" do + subject { Collins::Asset.from_json(CollinsFixture.full_asset_with_gpu(true)) } + + it "#gpu_count" do + subject.gpu_count.should == 2 + end + end + context "Update" do it "lshw is not an attribute" do ["lshw","LSHW"].each do |name| diff --git a/support/ruby/collins-client/spec/fixtures/full_asset_with_gpu.json b/support/ruby/collins-client/spec/fixtures/full_asset_with_gpu.json new file mode 100644 index 000000000..332c0fc9a --- /dev/null +++ b/support/ruby/collins-client/spec/fixtures/full_asset_with_gpu.json @@ -0,0 +1 @@ +{"status":"success:ok","data":{"ASSET":{"ID":2,"TAG":"U000006","STATE":{"ID":1,"STATUS":null,"NAME":"NEW","LABEL":"New","DESCRIPTION":"A service in this state is inactive. It does minimal work and consumes minimal resources."},"STATUS":"New","TYPE":"SERVER_NODE","CREATED":"2017-04-26T16:52:36","UPDATED":"2017-04-26T16:52:38","DELETED":null},"HARDWARE":{"CPU":[{"CORES":6,"THREADS":6,"SPEED_GHZ":2.3,"DESCRIPTION":"AMD Opteron(tm) Processor 4174 HE Hynix Semiconductor (Hyundai Electronics)","PRODUCT":"","VENDOR":""},{"CORES":6,"THREADS":6,"SPEED_GHZ":2.3,"DESCRIPTION":"AMD Opteron(tm) Processor 4174 HE Hynix Semiconductor (Hyundai Electronics)","PRODUCT":"","VENDOR":""}],"GPU":[{"DESCRIPTION":"GM200GL [Quadro M6000] - NVIDIA Corporation","PRODUCT":"","VENDOR":""},{"DESCRIPTION":"GM200GL [Quadro M6000] - NVIDIA Corporation","PRODUCT":"","VENDOR":""}],"MEMORY":[{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":0,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":1,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":8589934592,"SIZE_S":"8589934592","SIZE_HUMAN":"8.00 GB","BANK":2,"DESCRIPTION":"DIMM DDR3 Synchronous 1333 MHz (0.8 ns) - Hyundai HMT31GR7BFR4A-H9","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":3,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":4,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":8589934592,"SIZE_S":"8589934592","SIZE_HUMAN":"8.00 GB","BANK":5,"DESCRIPTION":"DIMM DDR3 Synchronous 1333 MHz (0.8 ns) - Hyundai HMT31GR7BFR4A-H9","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":6,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":7,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":8589934592,"SIZE_S":"8589934592","SIZE_HUMAN":"8.00 GB","BANK":8,"DESCRIPTION":"DIMM DDR3 Synchronous 1333 MHz (0.8 ns) - Hyundai HMT31GR7BFR4A-H9","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":9,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":0,"SIZE_S":"0","SIZE_HUMAN":"0 Bytes","BANK":10,"DESCRIPTION":"Empty Memory Bank","PRODUCT":"","VENDOR":""},{"SIZE":8589934592,"SIZE_S":"8589934592","SIZE_HUMAN":"8.00 GB","BANK":11,"DESCRIPTION":"DIMM DDR3 Synchronous 1333 MHz (0.8 ns) - Hyundai HMT31GR7BFR4A-H9","PRODUCT":"","VENDOR":""}],"NIC":[],"DISK":[],"BASE":{"DESCRIPTION":"Rack Mount Chassis","PRODUCT":"PowerEdge C6105 (N/A)","VENDOR":"Winbond Electronics","SERIAL":"FZ22YQ1"}},"LLDP":{"INTERFACES":[{"NAME":"eth0","CHASSIS":{"NAME":"accessB07.corp.uhq.ua.tc","ID":{"TYPE":"mac","VALUE":"ec:3e:f7:1e:77:c0"},"DESCRIPTION":"Juniper Networks, Inc. ex4300-48p Ethernet Switch, kernel JUNOS 14.1X53-D30.3, Build date: 2015-10-02 12:40:24 UTC Copyright (c) 1996-2015 Juniper Networks, Inc."},"PORT":{"ID":{"TYPE":"local","VALUE":"529"},"DESCRIPTION":"ge-0/0/12"},"VLANS":[{"ID":40,"NAME":"vlan-40"}]}]},"IPMI":{"ASSET_ID":2,"ASSET_TAG":"U000006","IPMI_USERNAME":"root","IPMI_PASSWORD":"YCM0PCt6y37uJsHb","IPMI_GATEWAY":"172.16.32.1","IPMI_ADDRESS":"172.16.32.20","IPMI_NETMASK":"255.255.240.0","ID":2},"ADDRESSES":[],"POWER":[],"ATTRIBS":{"0":{"CHASSIS_TAG":"U000006"}}}} diff --git a/support/ruby/collins-client/spec/support/collins_fixture.rb b/support/ruby/collins-client/spec/support/collins_fixture.rb index e29e5e716..a5630ef6b 100644 --- a/support/ruby/collins-client/spec/support/collins_fixture.rb +++ b/support/ruby/collins-client/spec/support/collins_fixture.rb @@ -30,6 +30,9 @@ def partial_asset_no_state json = false def basic_log json=false get_fixture_data 'basic_log.json', json end + def full_asset_with_gpu json=false + get_fixture_data 'full_asset_with_gpu.json', json + end def data name File.read(fixture_file(name)) diff --git a/test/collins/models/LshwHelperSpec.scala b/test/collins/models/LshwHelperSpec.scala index 2ae5e1356..9704d0108 100644 --- a/test/collins/models/LshwHelperSpec.scala +++ b/test/collins/models/LshwHelperSpec.scala @@ -88,6 +88,20 @@ class LshwHelperSpec extends mutable.Specification { LshwHelper.updateAsset(asset, parsed()) asset.getMetaAttribute(AssetMeta.Enum.DiskType.toString) must beNone } + "with a dual NVIDIA GPU" in new LshwCommonHelper("lshw-gpu.xml") { + val lshw = parsed() + val stub = getStub() + val constructed: Seq[AssetMetaValue] = LshwHelper.construct(stub, lshw) + val reconstructed = LshwHelper.reconstruct(stub, metaValue2metaWrapper(constructed))._1 + lshw mustEqual reconstructed + } + "with a single NVIDIA GPU" in new LshwCommonHelper("lshw-dell.xml") { + val lshw = parsed() + val stub = getStub() + val constructed: Seq[AssetMetaValue] = LshwHelper.construct(stub, lshw) + val reconstructed = LshwHelper.reconstruct(stub, metaValue2metaWrapper(constructed))._1 + lshw mustEqual reconstructed + } } } diff --git a/test/collins/util/parsers/LshwParserSpec.scala b/test/collins/util/parsers/LshwParserSpec.scala index 75ec67f6c..9eb98d4af 100644 --- a/test/collins/util/parsers/LshwParserSpec.scala +++ b/test/collins/util/parsers/LshwParserSpec.scala @@ -493,5 +493,28 @@ class LshwParserSpec extends mutable.Specification { } } // wonky opterons + "Parse GPU server" in { + "dual nvidia GPU server" in new LshwParserHelper("lshw-gpu.xml"){ + val parseResults = parsed() + parseResults must beRight + parseResults.right.toOption must beSome.which { rep => + rep.cpuCount mustEqual 2 + rep.cpuCoreCount mustEqual 12 + + rep.gpuCount mustEqual 2 + } + } + "Dell single nvidia GPU server" in new LshwParserHelper("lshw-dell.xml"){ + val parseResults = parsed() + parseResults must beRight + parseResults.right.toOption must beSome.which { rep => + rep.cpuCount mustEqual 1 + rep.cpuCoreCount mustEqual 4 + + rep.gpuCount mustEqual 1 + } + } + } + } // The LSHW parser should } diff --git a/test/resources/lshw-dell.xml b/test/resources/lshw-dell.xml new file mode 100644 index 000000000..553cb91ee --- /dev/null +++ b/test/resources/lshw-dell.xml @@ -0,0 +1,837 @@ + + + + + + + + Laptop + Precision 7510 (06D9) + Dell Inc. + [REMOVED] + 64 + + + + + + + + + SMBIOS version 2.8 + DMI version 2.8 + 32-bit processes + + + Motherboard + 0M91XC + Dell Inc. + 0 + A00 + [REMOVED] + + BIOS + Dell Inc. + 0 + 1.9.5 + 12/22/2016 + 65536 + 16711680 + + PCI bus + Plug-and-Play + BIOS EEPROM can be upgraded + BIOS shadowing + Booting from CD-ROM/DVD + Selectable boot path + Enhanced Disk Drive extensions + 5.25" 1.2MB floppy + 3.5" 720KB floppy + 3.5" 2.88MB floppy + Print Screen key + i8042 keyboard controller + INT14 serial line control + INT17 printer control + ACPI + USB legacy emulation + Smart battery + BIOS boot specification + Function-key initiated network service boot + UEFI specification is supported + + + + L1 cache + 43 + L1 Cache + 131072 + 131072 + + Synchronous + Internal + Write-back + Data cache + + + + L1 cache + 44 + L1 Cache + 131072 + 131072 + + Synchronous + Internal + Write-back + Instruction cache + + + + L2 cache + 45 + L2 Cache + 1048576 + 1048576 + + Synchronous + Internal + Write-back + Unified cache + + + + L3 cache + 46 + L3 Cache + 8388608 + 8388608 + + Synchronous + Internal + Write-back + Unified cache + + + + CPU + Intel(R) Core(TM) i7-6820HQ CPU @ 2.70GHz + Intel Corp. + 47 + cpu@0 + Intel(R) Core(TM) i7-6820HQ CPU @ 2.70GHz + [REMOVED] + U3E1 + 3371203000 + 3371203000 + 64 + 100000000 + + + + + + + 64bits extensions (x86-64) + mathematical co-processor + FPU exceptions reporting + + virtual mode extensions + debugging extensions + page size extensions + time stamp counter + model-specific registers + 4GB+ memory addressing (Physical Address Extension) + machine check exceptions + compare and exchange 8-byte + on-chip advanced programmable interrupt controller (APIC) + fast system calls + memory type range registers + page global enable + machine check architecture + conditional move instruction + page attribute table + 36-bit page size extensions + + debug trace and EMON store MSRs + thermal control (ACPI) + multimedia extensions (MMX) + fast floating point save/restore + streaming SIMD extensions (SSE) + streaming SIMD extensions (SSE2) + self-snoop + HyperThreading + thermal interrupt and status + pending break event + fast system calls + no-execute bit (NX) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + CPU Frequency scaling + + + + System Memory + 48 + System board or motherboard + 34359738368 + + SODIMM Synchronous 2133 MHz (0.5 ns) + HMA82GS6MFR8N-TF + SK Hynix + 0 + [REMOVED] + ChannelA-DIMM0 + 17179869184 + 64 + 2133000000 + + + DIMM [empty] + 1 + ChannelB-DIMM0 + + + SODIMM Synchronous 2133 MHz (0.5 ns) + HMA82GS6MFR8N-TF + SK Hynix + 2 + [REMOVED] + ChannelB-DIMM1 + 17179869184 + 64 + 2133000000 + + + DIMM [empty] + 3 + ChannelA-DIMM1 + + + + Host bridge + Sky Lake Host Bridge/DRAM Registers + Intel Corporation + 100 + pci@0000:00:00.0 + 07 + 32 + 33000000 + + PCI bridge + Sky Lake PCIe Controller (x16) + Intel Corporation + 1 + pci@0000:00:01.0 + 07 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + + bus mastering + PCI capabilities listing + + + + + + + + + VGA compatible controller + GM107GLM [Quadro M2000M] + NVIDIA Corporation + 0 + pci@0000:01:00.0 + a2 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + + bus mastering + PCI capabilities listing + extension ROM + + + + + + + + + + + + Audio device + NVIDIA Corporation + NVIDIA Corporation + 0.1 + pci@0000:01:00.1 + a1 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + bus mastering + PCI capabilities listing + + + + + + + + + Signal processing controller + Intel Corporation + Intel Corporation + 4 + pci@0000:00:04.0 + 07 + 64 + 33000000 + + + + + + Message Signalled Interrupts + Power Management + PCI capabilities listing + + + + + + + + USB controller + Sunrise Point-H USB 3.0 xHCI Controller + Intel Corporation + 14 + pci@0000:00:14.0 + 31 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + + bus mastering + PCI capabilities listing + + + + + + + + Signal processing controller + Sunrise Point-H Thermal subsystem + Intel Corporation + 14.2 + pci@0000:00:14.2 + 31 + 64 + 33000000 + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + Communication controller + Sunrise Point-H CSME HECI #1 + Intel Corporation + 16 + pci@0000:00:16.0 + 31 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + + RAID bus controller + SATA Controller [RAID mode] + Intel Corporation + 17 + pci@0000:00:17.0 + 31 + 32 + 66000000 + + + + + + + Message Signalled Interrupts + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + + + + + PCI bridge + Sunrise Point-H PCI Express Root Port #2 + Intel Corporation + 1c + pci@0000:00:1c.0 + f1 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + PCI bridge + Sunrise Point-H PCI Express Root Port #3 + Intel Corporation + 1c.2 + pci@0000:00:1c.2 + f1 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + Unassigned class + Realtek Semiconductor Co., Ltd. + Realtek Semiconductor Co., Ltd. + 0 + pci@0000:03:00.0 + 01 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + bus mastering + PCI capabilities listing + + + + + + + + + PCI bridge + Sunrise Point-H PCI Express Root Port #5 + Intel Corporation + 1c.4 + pci@0000:00:1c.4 + f1 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + + ISA bridge + Sunrise Point-H LPC Controller + Intel Corporation + 1f + pci@0000:00:1f.0 + 31 + 32 + 33000000 + + + + + + bus mastering + + + + Memory controller + Sunrise Point-H PMC + Intel Corporation + 1f.2 + pci@0000:00:1f.2 + 31 + 32 + 33000000 + + + + + bus mastering + + + + + + + Audio device + Sunrise Point-H HD Audio + Intel Corporation + 1f.3 + pci@0000:00:1f.3 + 31 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + + + SMBus + Sunrise Point-H SMBus + Intel Corporation + 1f.4 + pci@0000:00:1f.4 + 31 + 64 + 33000000 + + + + + + + + + + Ethernet interface + Ethernet Connection (2) I219-LM + Intel Corporation + 1f.6 + pci@0000:00:1f.6 + eth0 + 31 + [REMOVED] + 1000000000 + 1000000000 + 32 + 33000000 + + + + + + + + + + + + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + Physical interface + twisted pair + 10Mbit/s + 10Mbit/s (full duplex) + 100Mbit/s + 100Mbit/s (full duplex) + 1Gbit/s (full duplex) + Auto-negotiation + + + + + + + + + 1 + scsi3 + + Emulated device + + + ATA Disk + Samsung SSD 850 + 0.0.0 + scsi@3:0.0.0 + /dev/sda + 8:0 + 2B6Q + [REMOVED] + 1024209543168 + + + + + + + Partitioned disk + MS-DOS partition table + + + EXT4 volume + Linux + 1 + scsi@3:0.0.0,1 + /dev/sda1 + / + /var/lib/docker/aufs + 8:1 + 1.0 + [REMOVED] + 990118936576 + 990118936576 + + + + + + + + + + + + Primary partition + Bootable partition (active) + + Extended Attributes + 4GB+ files + 16TB+ files + directories with 65000+ subdirs + needs recovery + extent-based allocation + + EXT2/EXT3 + initialized volume + + + + Extended partition + 2 + scsi@3:0.0.0,2 + /dev/sda2 + 8:2 + 34088158208 + 34088158208 + + Primary partition + Extended partition + Partitioned disk + Extended partition + + + Linux swap / Solaris partition + 5 + /dev/sda5 + 8:5 + 34088157184 + + No filesystem + + + + + + + + DELL RDYCT71 + LG + 1 + 12/29/2016 + [REMOVED] + Sys. Battery Bay + 90990 + + + + + + diff --git a/test/resources/lshw-gpu.xml b/test/resources/lshw-gpu.xml new file mode 100644 index 000000000..ff25685b8 --- /dev/null +++ b/test/resources/lshw-gpu.xml @@ -0,0 +1,1564 @@ + + + + + + + Rack Mount Chassis + PowerEdge C6105 (N/A) + Winbond Electronics + N/A + FZ22YQ1 + 64 + + + + + + + + + SMBIOS version 2.6 + DMI version 2.6 + 64-bit processes + 32-bit processes + + + Motherboard + 001V46 + Winbond Electronics + 0 + A01 + .FZ22YQ1.CN7170315N0004. + N/A + + BIOS + Winbond Electronics + 1 + 1.7.6 + 04/21/2011 + 65536 + 4128768 + + ISA bus + PCI bus + Plug-and-Play + BIOS EEPROM can be upgraded + BIOS shadowing + ESCD + Booting from CD-ROM/DVD + Selectable boot path + BIOS ROM is socketed + Enhanced Disk Drive extensions + Print Screen key + INT14 serial line control + INT17 printer control + INT10 CGA/Mono video + ACPI + USB legacy emulation + Booting from LS-120 + Booting from ATAPI ZIP + BIOS boot specification + + + + CPU + AMD Opteron(tm) Processor 4174 HE + Hynix Semiconductor (Hyundai Electronics) + 5 + cpu@0 + D1 + To Be Filled By O.E.M. + CPU 0 + 2300000000 + 2300000000 + 64 + 200000000 + + + + + + + 64bits extensions (x86-64) + mathematical co-processor + FPU exceptions reporting + + virtual mode extensions + debugging extensions + page size extensions + time stamp counter + model-specific registers + 4GB+ memory addressing (Physical Address Extension) + machine check exceptions + compare and exchange 8-byte + on-chip advanced programmable interrupt controller (APIC) + memory type range registers + page global enable + machine check architecture + conditional move instruction + page attribute table + 36-bit page size extensions + + multimedia extensions (MMX) + fast floating point save/restore + streaming SIMD extensions (SSE) + streaming SIMD extensions (SSE2) + HyperThreading + fast system calls + no-execute bit (NX) + multimedia extensions (MMXExt) + + + + multimedia extensions (3DNow!Ext) + multimedia extensions (3DNow!) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + L1 cache + 6 + L1-Cache + 786432 + 786432 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + L2 cache + 7 + L2-Cache + 3145728 + 3145728 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + L3 cache + 8 + L3-Cache + 6291456 + 6291456 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + + CPU + AMD Opteron(tm) Processor 4174 HE + Hynix Semiconductor (Hyundai Electronics) + 9 + cpu@1 + D1 + To Be Filled By O.E.M. + CPU 1 + 2300000000 + 2300000000 + 64 + 200000000 + + + + + + + 64bits extensions (x86-64) + mathematical co-processor + FPU exceptions reporting + + virtual mode extensions + debugging extensions + page size extensions + time stamp counter + model-specific registers + 4GB+ memory addressing (Physical Address Extension) + machine check exceptions + compare and exchange 8-byte + on-chip advanced programmable interrupt controller (APIC) + memory type range registers + page global enable + machine check architecture + conditional move instruction + page attribute table + 36-bit page size extensions + + multimedia extensions (MMX) + fast floating point save/restore + streaming SIMD extensions (SSE) + streaming SIMD extensions (SSE2) + HyperThreading + fast system calls + no-execute bit (NX) + multimedia extensions (MMXExt) + + + + multimedia extensions (3DNow!Ext) + multimedia extensions (3DNow!) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + L1 cache + a + L1-Cache + 786432 + 786432 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + L2 cache + b + L2-Cache + 3145728 + 3145728 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + L3 cache + c + L3-Cache + 6291456 + 6291456 + 1000000000 + + Pipeline burst + Internal + Write-back + Unified cache + + + + + System Memory + 28 + System board or motherboard + 34359738368 + + DIMM DDR3 Synchronous [empty] + ModulePartNumber00 + Manufacturer00 + 0 + SerNum00 + CPU0 DIMM A0 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber01 + Manufacturer01 + 1 + SerNum01 + CPU0 DIMM A1 + + + DIMM DDR3 Synchronous 1333 MHz (0.8 ns) + HMT31GR7BFR4A-H9 + Hyundai + 2 + 8AF9A71E + CPU0 DIMM A2 + 8589934592 + 64 + 1333000000 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber03 + Manufacturer03 + 3 + SerNum03 + CPU0 DIMM B0 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber04 + Manufacturer04 + 4 + SerNum04 + CPU0 DIMM B1 + + + DIMM DDR3 Synchronous 1333 MHz (0.8 ns) + HMT31GR7BFR4A-H9 + Hyundai + 5 + 8BF9171E + CPU0 DIMM B2 + 8589934592 + 64 + 1333000000 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber06 + Manufacturer06 + 6 + SerNum06 + CPU1 DIMM C0 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber07 + Manufacturer07 + 7 + SerNum07 + CPU1 DIMM C1 + + + DIMM DDR3 Synchronous 1333 MHz (0.8 ns) + HMT31GR7BFR4A-H9 + Hyundai + 8 + 95F9871E + CPU1 DIMM C2 + 8589934592 + 64 + 1333000000 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber09 + Manufacturer09 + 9 + SerNum09 + CPU1 DIMM D0 + + + DIMM DDR3 Synchronous [empty] + ModulePartNumber10 + Manufacturer10 + a + SerNum10 + CPU1 DIMM D1 + + + DIMM DDR3 Synchronous 1333 MHz (0.8 ns) + HMT31GR7BFR4A-H9 + Hyundai + b + A2F9B71E + CPU1 DIMM D2 + 8589934592 + 64 + 1333000000 + + + + Host bridge + Xeon E7 v3/Xeon E5 v3/Core i7 DMI2 + Intel Corporation + 100 + pci@0000:00:00.0 + 02 + 32 + 33000000 + + PCI bridge + Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 1 + Intel Corporation + 1 + pci@0000:00:01.0 + 02 + 32 + 33000000 + + + + + + Message Signalled Interrupts + PCI Express + Power Management + + bus mastering + PCI capabilities listing + + + + + + + PCI bridge + Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 2 + Intel Corporation + 2 + pci@0000:00:02.0 + 02 + 32 + 33000000 + + + + + + Message Signalled Interrupts + PCI Express + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + VGA compatible controller + GM200GL [Quadro M6000] + NVIDIA Corporation + 0 + pci@0000:02:00.0 + a1 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + + bus mastering + PCI capabilities listing + extension ROM + + + + + + + + + + + + + + Audio device + NVIDIA Corporation + NVIDIA Corporation + 0.1 + pci@0000:02:00.1 + a1 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + bus mastering + PCI capabilities listing + + + + + + + + + PCI bridge + Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 3 + Intel Corporation + 3 + pci@0000:00:03.0 + 02 + 32 + 33000000 + + + + + + Message Signalled Interrupts + PCI Express + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + VGA compatible controller + GM200GL [Quadro M6000] + NVIDIA Corporation + 0 + pci@0000:03:00.0 + a1 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + + bus mastering + PCI capabilities listing + extension ROM + + + + + + + + + + + + + + Audio device + NVIDIA Corporation + NVIDIA Corporation + 0.1 + pci@0000:03:00.1 + a1 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 0 + Intel Corporation + 4 + pci@0000:00:04.0 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 1 + Intel Corporation + 4.1 + pci@0000:00:04.1 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 2 + Intel Corporation + 4.2 + pci@0000:00:04.2 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 3 + Intel Corporation + 4.3 + pci@0000:00:04.3 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 4 + Intel Corporation + 4.4 + pci@0000:00:04.4 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 5 + Intel Corporation + 4.5 + pci@0000:00:04.5 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 6 + Intel Corporation + 4.6 + pci@0000:00:04.6 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 DMA Channel 7 + Intel Corporation + 4.7 + pci@0000:00:04.7 + 02 + 64 + 33000000 + + + + + + MSI-X + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + + + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 Address Map, VTd_Misc, System Management + Intel Corporation + 5 + pci@0000:00:05.0 + 02 + 32 + 33000000 + + + + + PCI Express + PCI capabilities listing + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 Hot Plug + Intel Corporation + 5.1 + pci@0000:00:05.1 + 02 + 32 + 33000000 + + + + + PCI Express + Message Signalled Interrupts + PCI capabilities listing + + + + System peripheral + Xeon E7 v3/Xeon E5 v3/Core i7 RAS, Control Status and Global Errors + Intel Corporation + 5.2 + pci@0000:00:05.2 + 02 + 32 + 33000000 + + + + + PCI Express + PCI capabilities listing + + + + PIC + Xeon E7 v3/Xeon E5 v3/Core i7 I/O APIC + Intel Corporation + 5.4 + pci@0000:00:05.4 + 02 + 32 + 33000000 + + + + + PCI Express + Power Management + + bus mastering + PCI capabilities listing + + + + + + + Unassigned class + C610/X99 series chipset SPSR + Intel Corporation + 11 + pci@0000:00:11.0 + 05 + 32 + 33000000 + + + + + PCI Express + Power Management + bus mastering + PCI capabilities listing + + + + SATA controller + C610/X99 series chipset sSATA Controller [AHCI mode] + Intel Corporation + 11.4 + pci@0000:00:11.4 + 05 + 32 + 66000000 + + + + + + + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + + + + + USB controller + C610/X99 series chipset USB xHCI Host Controller + Intel Corporation + 14 + pci@0000:00:14.0 + 05 + 64 + 33000000 + + + + + + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + Communication controller + C610/X99 series chipset MEI Controller #1 + Intel Corporation + 16 + pci@0000:00:16.0 + 05 + 64 + 33000000 + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + Communication controller + C610/X99 series chipset MEI Controller #2 + Intel Corporation + 16.1 + pci@0000:00:16.1 + 05 + 64 + 33000000 + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + USB controller + C610/X99 series chipset USB Enhanced Host Controller #2 + Intel Corporation + 1a + pci@0000:00:1a.0 + 05 + 32 + 33000000 + + + + + + Power Management + Debug port + Enhanced Host Controller Interface (USB2) + bus mastering + PCI capabilities listing + + + + + + + + Audio device + C610/X99 series chipset HD Audio Controller + Intel Corporation + 1b + pci@0000:00:1b.0 + 05 + 64 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + PCI Express + bus mastering + PCI capabilities listing + + + + + + + + + PCI bridge + C610/X99 series chipset PCI Express Root Port #1 + Intel Corporation + 1c + pci@0000:00:1c.0 + d5 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + PCI bridge + C610/X99 series chipset PCI Express Root Port #4 + Intel Corporation + 1c.3 + pci@0000:00:1c.3 + d5 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + PCI bridge + AST1150 PCI-to-PCI Bridge + ASPEED Technology, Inc. + 0 + pci@0000:05:00.0 + 03 + 32 + 33000000 + + + Message Signalled Interrupts + Power Management + PCI Express + + bus mastering + PCI capabilities listing + + + + + + + VGA compatible controller + ASPEED Graphics Family + ASPEED Technology, Inc. + 0 + pci@0000:06:00.0 + 30 + 32 + 33000000 + + + + + + Power Management + Message Signalled Interrupts + + bus mastering + PCI capabilities listing + extension ROM + + + + + + + + + + + + PCI bridge + C610/X99 series chipset PCI Express Root Port #5 + Intel Corporation + 1c.4 + pci@0000:00:1c.4 + d5 + 32 + 33000000 + + + + + + PCI Express + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + + USB controller + C610/X99 series chipset USB Enhanced Host Controller #1 + Intel Corporation + 1d + pci@0000:00:1d.0 + 05 + 32 + 33000000 + + + + + + Power Management + Debug port + Enhanced Host Controller Interface (USB2) + bus mastering + PCI capabilities listing + + + + + + + + ISA bridge + C610/X99 series chipset LPC Controller + Intel Corporation + 1f + pci@0000:00:1f.0 + 05 + 32 + 33000000 + + + + + + + bus mastering + PCI capabilities listing + + + + + + + SATA controller + C610/X99 series chipset 6-Port SATA Controller [AHCI mode] + Intel Corporation + 1f.2 + pci@0000:00:1f.2 + 05 + 32 + 66000000 + + + + + + + Message Signalled Interrupts + Power Management + + bus mastering + PCI capabilities listing + + + + + + + + + + + + + SMBus + C610/X99 series chipset SMBus Controller + Intel Corporation + 1f.3 + pci@0000:00:1f.3 + 05 + 64 + 33000000 + + + + + + + + + + + Signal processing controller + C610/X99 series chipset Thermal Subsystem + Intel Corporation + 1f.6 + pci@0000:00:1f.6 + 05 + 64 + 33000000 + + + + + Power Management + Message Signalled Interrupts + bus mastering + PCI capabilities listing + + + + + + + + + Host bridge + Family 10h Processor HyperTransport Configuration + Hynix Semiconductor (Hyundai Electronics) + 101 + pci@0000:00:18.0 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor Address Map + Hynix Semiconductor (Hyundai Electronics) + 102 + pci@0000:00:18.1 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor DRAM Controller + Hynix Semiconductor (Hyundai Electronics) + 103 + pci@0000:00:18.2 + 00 + 32 + 33000000 + + + + + + + + + Host bridge + Family 10h Processor Miscellaneous Control + Hynix Semiconductor (Hyundai Electronics) + 104 + pci@0000:00:18.3 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor Link Control + Hynix Semiconductor (Hyundai Electronics) + 105 + pci@0000:00:18.4 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor HyperTransport Configuration + Hynix Semiconductor (Hyundai Electronics) + 106 + pci@0000:00:19.0 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor Address Map + Hynix Semiconductor (Hyundai Electronics) + 107 + pci@0000:00:19.1 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor DRAM Controller + Hynix Semiconductor (Hyundai Electronics) + 108 + pci@0000:00:19.2 + 00 + 32 + 33000000 + + + + + + + + + Host bridge + Family 10h Processor Miscellaneous Control + Hynix Semiconductor (Hyundai Electronics) + 109 + pci@0000:00:19.3 + 00 + 32 + 33000000 + + + Host bridge + Family 10h Processor Link Control + Hynix Semiconductor (Hyundai Electronics) + 10a + pci@0000:00:19.4 + 00 + 32 + 33000000 + + + + Ethernet interface + 1 + bond0 + e8:9a:8f:23:15:72 + + + + + + + + + + + + Physical interface + + + + Ethernet interface + 2 + bond0.100 + e8:9a:8f:23:15:72 + + + + + + + + + + + + Physical interface + + + + Ethernet interface + 3 + bond0.101 + e8:9a:8f:23:15:72 + + + + + + + + + + + + Physical interface + + + + Ethernet interface + 4 + bond0.103 + e8:9a:8f:23:15:72 + + + + + + + + + + + + Physical interface + + + + Ethernet interface + 5 + bond0.105 + e8:9a:8f:23:15:72 + + + + + + + + + + + + + Physical interface + + + + Ethernet interface + 6 + vnet0 + fe:54:00:52:1a:d7 + 10000000 + + + + + + + + + + + + + + + Physical interface + + +
GPU
Total GPUs@aa.lshw.gpuCount
Memory