From f9d6cf2e9f885a1504b459cf437dd9d1931b1168 Mon Sep 17 00:00:00 2001 From: Alex Coplan Date: Tue, 2 Apr 2024 14:03:38 +0100 Subject: [PATCH] arm: Refactor condition for print_mve_shift_n This is intended to have no functional change, but refactors the condition guarding the call to print_mve_shift_n in arm-dis.c ahead of a later patch which adds additional insns to the set of those whose shift immediate is disassembled using print_mve_shift_n. --- opcodes/arm-dis.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 40f7fb3d780..ac5fb921d23 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -7965,6 +7965,30 @@ print_mve_size (struct disassemble_info *info, } } +/* Return true if INSN is a shift insn with an immediate shift amount + which needs decoding as per print_mve_shift_n. */ + +static bool +mve_shift_insn_p (enum mve_instructions insn) +{ + switch (insn) + { + case MVE_VQSHL_T2: + case MVE_VQSHLU_T3: + case MVE_VRSHR: + case MVE_VRSHRN: + case MVE_VSHL_T1: + case MVE_VSHLL_T1: + case MVE_VSHR: + case MVE_VSHRN: + case MVE_VSLI: + case MVE_VSRI: + return true; + default: + return false; + } +} + static void print_mve_shift_n (struct disassemble_info *info, long given, enum mve_instructions matched_insn) @@ -10225,16 +10249,7 @@ print_insn_mve (struct disassemble_info *info, long given) arm_regnames[value]); break; case 'd': - if (insn->mve_op == MVE_VQSHL_T2 - || insn->mve_op == MVE_VQSHLU_T3 - || insn->mve_op == MVE_VRSHR - || insn->mve_op == MVE_VRSHRN - || insn->mve_op == MVE_VSHL_T1 - || insn->mve_op == MVE_VSHLL_T1 - || insn->mve_op == MVE_VSHR - || insn->mve_op == MVE_VSHRN - || insn->mve_op == MVE_VSLI - || insn->mve_op == MVE_VSRI) + if (mve_shift_insn_p (insn->mve_op)) print_mve_shift_n (info, given, insn->mve_op); else if (insn->mve_op == MVE_VSHLL_T2) {