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debug.log
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Debug Log:
root@neo-VirtualBox:/newdisk/rv-github# /newdisk/rvqemu/riscv-qemu/build/bin/qemu-system-riscv64 -nographic -machine virt -smp 4 -kernel /disk/riscv/freedom-u-sdk/work/riscv-pk/bbl
SIFIVE, INC.
5555555555555555555555555
5555 5555
5555 5555
5555 5555
5555 5555555555555555555555
5555 555555555555555555555555
5555 5555
5555 5555
5555 5555
5555555555555555555555555555 55555
55555 555555555 55555
55555 55555 55555
55555 5 55555
55555 55555
55555 55555
55555 55555
55555 55555
55555 55555
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55555
5
SiFive RISC-V Coreplex
{
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
compatible = "riscv-virtio";
model = "riscv-virtio,qemu";
chosen {
bootargs = "";
stdout-path = <0x2f756172 0x74403130 0x30303030>;
}
uart@10000000 {
interrupts = <0x0000000a>;
interrupt-parent = <0x00000005>;
clock-frequency = <0x00384000>;
reg = <0x00000000 0x10000000 0x00000000 0x00000100>;
compatible = "ns16550a";
}
test@100000 {
reg = <0x00000000 0x00100000 0x00000000 0x00001000>;
compatible = "sifive,test0";
}
virtio_mmio@10008000 {
interrupts = <0x00000008>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10008000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10007000 {
interrupts = <0x00000007>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10007000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10006000 {
interrupts = <0x00000006>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10006000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10005000 {
interrupts = <0x00000005>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10005000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10004000 {
interrupts = <0x00000004>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10004000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10003000 {
interrupts = <0x00000003>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10003000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10002000 {
interrupts = <0x00000002>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10002000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
virtio_mmio@10001000 {
interrupts = <0x00000001>;
interrupt-parent = <0x00000005>;
reg = <0x00000000 0x10001000 0x00000000 0x00001000>;
compatible = "virtio,mmio";
}
cpus {
#address-cells = <0x00000001>;
#size-cells = <0x00000000>;
timebase-frequency = <0x00989680>;
cpu@0 {
device_type = "cpu";
reg = <0x00000000>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
clock-frequency = <0x3b9aca00>;
interrupt-controller {
#interrupt-cells = <0x00000001>;
interrupt-controller;
compatible = "riscv,cpu-intc";
linux,phandle = <0x00000004>;
phandle = <0x00000004>;
}
}
cpu@1 {
device_type = "cpu";
reg = <0x00000001>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
clock-frequency = <0x3b9aca00>;
interrupt-controller {
#interrupt-cells = <0x00000001>;
interrupt-controller;
compatible = "riscv,cpu-intc";
linux,phandle = <0x00000003>;
phandle = <0x00000003>;
}
}
cpu@2 {
device_type = "cpu";
reg = <0x00000002>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
clock-frequency = <0x3b9aca00>;
interrupt-controller {
#interrupt-cells = <0x00000001>;
interrupt-controller;
compatible = "riscv,cpu-intc";
linux,phandle = <0x00000002>;
phandle = <0x00000002>;
}
}
cpu@3 {
device_type = "cpu";
reg = <0x00000003>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
clock-frequency = <0x3b9aca00>;
interrupt-controller {
#interrupt-cells = <0x00000001>;
interrupt-controller;
compatible = "riscv,cpu-intc";
linux,phandle = <0x00000001>;
phandle = <0x00000001>;
}
}
}
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0x00000000 0x08000000>;
}
soc {
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
compatible = "simple-bus";
ranges;
interrupt-controller@c000000 {
linux,phandle = <0x00000005>;
phandle = <0x00000005>;
riscv,ndev = <0x0000000a>;
riscv,max-priority = <0x00000007>;
reg-names = "control";
reg = <0x00000000 0x0c000000 0x00000000 0x04000000>;
interrupts-extended = <0x00000004 0xffffffff 0x00000004 0x00000009 0x00000003 0xffffffff 0x00000003 0x00000009 0x00000002 0xffffffff 0x00000002 0x00000009 0x00000001 0xffffffff 0x00000001 0x00000009>;
interrupt-controller;
compatible = "riscv,plic0";
#interrupt-cells = <0x00000001>;
}
}
}
Early debug init successfully
initialize CPU
start CPU
initialize MMU
initialize base virtual memory support
initialize address space library
initialize global mapping
Debug init successfully
End of BSP init
initialize VxBus
install bus types:
vxbFdtBus(Flattened Device Tree bus type)
vxbNexusBus(Nexus bus type)
install drivers:
riscv-plic(riscv plic)
riscvTimer(Riscv Timer)
fdtBus(FDT bus controller)
simpleBus(simple bus controller)
ns16550(ns16550 serial OF driver)
mainbus(Generic Root Nexus Driver)
probe and attach devices
probe mainbus
attach mainbus:0
probe fdtBus
attach fdtBus:0
probe uart
attach ns16550:0
probe test
failed to probe test
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe virtio_mmio
failed to probe virtio_mmio
probe memory
failed to probe memory
probe soc
attach simpleBus:0
probe interrupt-controller
attach riscv-plic:0
reg 0xfffffff802002000
threshold 0x201000, 0x2002000, 0x2203000
threshold 0x203000, 0x2002000, 0x2205000
threshold 0x205000, 0x2002000, 0x2207000
threshold 0x207000, 0x2002000, 0x2209000
riscvTimerAttach OK
probe virtBus
failed to probe virtBus
armGenTimerISRSet
_________ _________
\77777777\ /77777777/
\77777777\ /77777777/
\77777777\ /77777777/
\77777777\ /77777777/
\77777777\ \7777777/
\77777777\ \77777/ VxWorks 7 SMP 64-bit
\77777777\ \777/
\77777777\ \7/ Core Kernel version: 2.0.0.0
\77777777\ - Build date: Feb 11 2019 16:08:31
\77777777\
\7777777/ Copyright Wind River Systems, Inc.
\77777/ - 1984-2019
\777/ /7\
\7/ /777\
- -------
Board: riscv-virtio,qemu
CPU Count: 4
OS Memory Size: 128MB
ED&R Policy Mode: Permanently Deployed
Adding 3185 symbols for standalone.
-> i
NAME TID PRI STATUS PC ERRNO CPU #
---------- ---------------- --- ---------- ---------------- ------- -----
tIsr0 fffffff800035680 0 PEND ffffffff801a35d8 0 -
tExcTask ffffffff80245910 0 PEND ffffffff801a35d8 0 -
tLogTask fffffff80003d020 0 PEND ffffffff801a19d8 0 -
tShell0 fffffff800059d70 1 READY ffffffff801b21d4 0 1
tVxdbgTask fffffff800044d80 25 PEND ffffffff801a35d8 0 -
tIdleTask0 ffffffff8024c460 287 READY ffffffff801a23b0 0 0
tIdleTask1 ffffffff80250950 287 READY ffffffff801a23b0 0 -
tIdleTask2 ffffffff80254e40 287 READY ffffffff801a23b0 0 2
tIdleTask3 ffffffff80259330 287 READY ffffffff801bdcd0 0 3
value = 0 = 0x0