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[FEATURE] IPC4 on i.MX #8375
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Hi all, I'm working on enabling IPC4 on i.MX, starting with i.MX8MP (imx8m) and I've found some issues:
These are all findings on first try compilation of imx8m with Any suggestions, comments are welcome. |
@lgirdwood @lyakh @kv2019i @plbossart I would also like to understand what is the plan for IPC3. Does Intel still uses it for some boards? Do you think this should be deprecated? AFAIK IPC4 was introduce in order for Intel support integration with Windows. |
No, Intel does NOT use IPC3 for any new devices. All Intel development effort is around IPC4.
Yes, I think we should like to eventually deprecate IPC3, but we need to get everyone using IPC4 first. This would also mean we can remove an abstraction and further simplify some IPC handling logic and APIs.
Yes, IPC4 has better API/feature coverage around the Windows audio architecture and use cases with no loss of flexibility for Linux. |
@thesofproject/amd @thesofproject/mediatek @thesofproject/google I think we've all discussed Intel IPC4 direction at previous TSCs, would be good to get feedback on IPC4 and see how we can all eventually integrate IPC4 as it's where the bulk of development is happening today. |
@lgirdwood I'm thinking to have another TSC around mid-November? Would that work for you? |
Works for me. Lots of progress since last TSC and updates that we can all share and align on. |
Yes, correct - however, if some IPC4 structures are vendor specific, like we had with DAIs for IPC3 we should make sure we split out vendor specific sections to vendor headers (like with IPC3).
Oh, it sounds like we need a
I would say the same answer here to Q2. we need to split any vendor specific logic.
So the ALH parts are Intel specific and should be split like 2 and 3. The copier part is generic though, it's job is to copy data to/from DMA buffers in a coherent manner that manages any races wrt DSP FW R/W pointers vs DMA HW R/W pointers. It's also useful to copy data from A->B in pipelines where needed, i.e. some modules need the copier to copy data.
Lets start with splitting some of the files into common.c and vendor.c, once this compiles lets merge and also merge an IPC4 build test for i.MX i.e. to enforce no vendor specific logic goes into common IPC4 files. |
There's also a relatively large change in programming models with the use of those copiers. With IPC3 the dais are configured by passing "human-readable" values that are converted into registers in firmware. With the Intel IPC4 implementation, the firmware receives a pre-canned set of register values stored in a binary blob. The binary blob is now generated with the ALSA utils and stored in the binary topology file, that may or may not be suitable for all vendors. |
Thanks @iuliana-prodan for the list, this is very useful. Adding to above comments, for (1) and (4) the Zephyr DAI interface (zephyr/include/zephyr/drivers/dai.h) is close copy of the DAI interface we had in SOF, so it should be straighforward to add non-Intel DAI implementations (as we had those in SOF DAIs as well). There's already e.g. types for DAI_IMX_SAI and DAI_IMX_ESAI in there in upstream Zephyr. Like Pierre noted, we change the parameter passing interface so that dai_config_set() gets a binary blob as bepsoke data. This matches Intel uses where we get such blobs e.g. from ACPI/NHLT. But we did also implement IPC3 support using the Zephyr DAI interface, so this should be doable as well (or define a IPC3-like-DAI-parameters container that can be used with IPC4 messages). For (3) on baseconfig, I think parts of this could be retrieved from Zephyr device-tree data, in a platform agnostic manner. For the information that is not related to hardware properties as such, I think we could use the platform.h abstraction (see #7248) to implement vendor/board specific way to get these properties and have common code in src/ipc/ipc4 for the handler. I filed #8391 to track this. |
@kv2019i I'm working on IPC4 with SOF drivers (not Zephyr native drivers). You think is better to have everything in Zephyr and then try IPC4?
For base_fw I also see this issue: #7549 |
Ack @iuliana-prodan , SOF drivers should still be doable. We did the initial IPC4 work with SOF driver interface and only later moved to native drivers, so both have worked. But just noting that when we added the DAI interface to Zephyr, we did think of bringing all SOF users onboard, so that is not Intel specific by design. For basefw, ack on that, I think most of those are not used. You can grep the Linux SOF driver on what fields are used in Linux (e.g. sof_ipc4_query_fw_configuration() shows a few field - I think only a few are really needed for functionality), and for rest, you can start by just not filling those values or having incorrect data in them. The full set of fw/hw properties is used by Intel Windows SW stack, |
While trying to load FW for IPC I'm getting different errors related with extended manifest (or header) for .ri image,
I've check and the extended manifest is computed (or a part of it) and parsed in rimage. Now, for imx8m we have: I've tried to use a higher version, like
So, my questions are:
Thanks! cc: @marc-hb @kv2019i @lgirdwood @RanderWang @singalsu @dbaluta @LaurentiuM1234 |
For the MAGIC_NUMBER I saw we use a new one for IPC4:
|
@iuliana-prodan could you try a "copy exactly" of an Intel toml file and only modify memory related data (I would probably use mtl toml file). I've put some inline comments below that may help/hinder you ;)
|
Try |
@lgirdwood @plbossart @kv2019i @lyakh @RanderWang @marc-hb I've tried
I get errors on For this I'm thinking of 3 possible solutions: Which should be better?
For IPC3 we have Can I use the ipc3 ops for loading?
Right now IPC4 seems over complicated and I don't understand its purpose. Thank you! |
Sorry, I don't know details of your platform. How do you load your firmware image to the DSP? Which parts do you copy to DSP's memory? I see two address ranges above: one starting with 0x3b6f8000 and another one starting with 0x92400000. The former contains exception vectors and similar things, the latter contains the usual .data, .text, .bss, .rodata, and custom sections. But if you include those custom sections, of which the largest one is .noinit with 0x9400 (37KiB) bytes apparently zero-initialised data (BSS type), that address range is contiguous. Could you move .noinit to the end to merge it with .bss to avoid loading them? Do you need to copy all the rest like "initlevel," "sw_isr_table," etc.? |
@lyakh @iuliana-prodan I think we might be facing here the same problem we had for IPC3. We describe memory blocks to be loaded based on their physical type (e.g IRAM, ROM, SRAM, SDRAM) while the current implementation (I guess) describe a memory block based on their logical memory type (e.g TEXT, DATA, RODATA). In the case of IMX we have multiple sections for TEXT (which aren't placed in the same physical memory area, eg. we load some parts of the TEXT into IRAM and some part of the text into SDRAM). Relevant past modifications for IPC3: thesofproject/rimage@b656186 I will have a deeper look together with @iuliana-prodan on this issue. |
@dbaluta @iuliana-prodan on Intel the older platforms did have separate and non contiguous IRAM and DRAM, they were based on IPC3 and did not have a complex manifest. Fwiw, today's manifest does allow for placing TEXT, DATA, BSS from many different manifest modules (not real modules, but the manifests ability to split up binaries) into multiple non contiguous memory locations. IIRC, Intel uses this feature on some platforms for a "BRNGUP" bring up module (second stage bootloader). TBH, it sounds like your current code loading manifest may be best suited for NXP arch. This manifest does not prevent IPC4 usage, IPC version is not tightly bound to the code loading manifest. However, the "extended manifest" is needed for IPC4 and this is pre-pended in front of the code loading manifest (it's parsed by the driver but not copied to DSP. I think this is @iuliana-prodan solution C above). |
@kv2019i @lgirdwood @lyakh When trying to load the topology I get:
Then, I’ve tried to load the tplg using IPC3 ops:
In this case from Linux, for tplg1, we send IPC3 commands which arrive in
So, to move forward, I only have one option to move to |
oh, ok - I guess topology 1 is missing some components/modules that will requirements for ipc4. Can you try and modifying an simple Intel based topology2 machine for NXP and see how that goes. Pls note that IPC4 has a new module called copier that will be used in many places by default (i.e. dont remove it from your test) |
Is your feature request related to a problem? Please describe.
Move to IPC4 for all i.MX platform
Describe the solution you'd like
Use the existing implementation of IPC4 on i.MX.
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