From e374b7bbe43ef7c340d9be1e3c166ca759642f55 Mon Sep 17 00:00:00 2001 From: Mateusz Krawiec Date: Fri, 29 Sep 2017 10:51:52 +0200 Subject: [PATCH] Fix memory map for stm32l496xx boards. --- src/gdbserver/gdb-server.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/src/gdbserver/gdb-server.c b/src/gdbserver/gdb-server.c index b6776107c..f5afa73b4 100644 --- a/src/gdbserver/gdb-server.c +++ b/src/gdbserver/gdb-server.c @@ -433,6 +433,25 @@ static const char* const memory_map_template_L4 = " " // option byte area ""; +static const char* const memory_map_template_L496 = + "" + "" + "" + " " // code = sram, bootrom or flash; flash is bigger + " " // SRAM2 (64 KB) + " " // SRAM1 (256 KB) + " " + " 0x800" + " " + " " // peripheral regs + " " // AHB3 Peripherals + " " // cortex regs + " " // bootrom + " " // option byte area + " " // option byte area + ""; + static const char* const memory_map_template = "" "sys_base, (unsigned int)sl->sys_size); } else if((sl->chip_id==STLINK_CHIPID_STM32_L4) || (sl->chip_id==STLINK_CHIPID_STM32_L43X) || - (sl->chip_id==STLINK_CHIPID_STM32_L46X) || - (sl->chip_id==STLINK_CHIPID_STM32_L496X)) { + (sl->chip_id==STLINK_CHIPID_STM32_L46X)) { snprintf(map, sz, memory_map_template_L4, (unsigned int)sl->flash_size, (unsigned int)sl->flash_size); + } else if(sl->chip_id==STLINK_CHIPID_STM32_L496X) { + snprintf(map, sz, memory_map_template_L496, + (unsigned int)sl->flash_size, (unsigned int)sl->flash_size); } else { snprintf(map, sz, memory_map_template, (unsigned int)sl->flash_size,