diff --git a/src/chipid.c b/src/chipid.c
index 546e2384e..7f8bbd3f9 100644
--- a/src/chipid.c
+++ b/src/chipid.c
@@ -9,7 +9,7 @@ static const struct stlink_chipid_params devices[] = {
             .flash_type = STLINK_FLASH_TYPE_F4,
             .flash_size_reg = 0x1ff0f442,      // section 45.2
             .flash_pagesize = 0x800,           // No flash pages
-            .sram_size = 0x5C000,              // "SRAM" byte size in hex from 
+            .sram_size = 0x80000,              // "SRAM" byte size in hex from
             .bootrom_base = 0x00200000,        //! "System memory" starting address from 
             .bootrom_size = 0xEDC0             //! @todo "System memory" byte size in hex from 
         },
diff --git a/src/gdbserver/gdb-server.c b/src/gdbserver/gdb-server.c
index c6746fb7a..15f837908 100644
--- a/src/gdbserver/gdb-server.c
+++ b/src/gdbserver/gdb-server.c
@@ -416,7 +416,7 @@ static const char* const memory_map_template_F7 =
     "<memory-map>"
     "  <memory type=\"ram\" start=\"0x00000000\" length=\"0x4000\"/>"       // ITCM ram 16kB
     "  <memory type=\"rom\" start=\"0x00200000\" length=\"0x100000\"/>"     // ITCM flash
-    "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x50000\"/>"      // sram
+    "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x%zx\"/>"      // sram
     "  <memory type=\"flash\" start=\"0x08000000\" length=\"0x20000\">"     // Sectors 0..3
     "    <property name=\"blocksize\">0x8000</property>"                    // 32kB
     "  </memory>"
@@ -435,26 +435,28 @@ static const char* const memory_map_template_F7 =
 
 char* make_memory_map(stlink_t *sl) {
     /* This will be freed in serve() */
-    char* map = malloc(4096);
+    const size_t sz = 4096;
+    char* map = malloc(sz);
     map[0] = '\0';
 
     if(sl->chip_id==STLINK_CHIPID_STM32_F4 || sl->chip_id==STLINK_CHIPID_STM32_F446) {
         strcpy(map, memory_map_template_F4);
-    } else if(sl->chip_id==STLINK_CHIPID_STM32_F4 || sl->core_id==STM32F7_CORE_ID) {
-        strcpy(map, memory_map_template_F7);
+    } else if(sl->core_id==STM32F7_CORE_ID) {
+        snprintf(map, sz, memory_map_template_F7,
+                sl->sram_size);
     } else if(sl->chip_id==STLINK_CHIPID_STM32_F4_HD) {
         strcpy(map, memory_map_template_F4_HD);
     } else if(sl->chip_id==STLINK_CHIPID_STM32_F2) {
-        snprintf(map, 4096, memory_map_template_F2,
+        snprintf(map, sz, memory_map_template_F2,
                 sl->flash_size,
                 sl->sram_size,
                 sl->flash_size - 0x20000,
                 sl->sys_base, sl->sys_size);
     } else if(sl->chip_id==STLINK_CHIPID_STM32_L4) {
-        snprintf(map, 4096, memory_map_template_L4,
+        snprintf(map, sz, memory_map_template_L4,
                 sl->flash_size, sl->flash_size);
     } else {
-        snprintf(map, 4096, memory_map_template,
+        snprintf(map, sz, memory_map_template,
                 sl->flash_size,
                 sl->sram_size,
                 sl->flash_size, sl->flash_pgsz,
@@ -1054,7 +1056,7 @@ int serve(stlink_t *sl, st_state_t *st) {
 
                 if(!strcmp(queryName, "Supported")) {
                     if(sl->chip_id==STLINK_CHIPID_STM32_F4
-		       || sl->chip_id==STLINK_CHIPID_STM32_F4_HD
+                       || sl->chip_id==STLINK_CHIPID_STM32_F4_HD
                        || sl->core_id==STM32F7_CORE_ID) {
                         reply = strdup("PacketSize=3fff;qXfer:memory-map:read+;qXfer:features:read+");
                     }